at91sam9x5.dtsi 7.4 KB

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  1. /*
  2. * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
  3. * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
  4. * AT91SAM9X25, AT91SAM9X35 SoC
  5. *
  6. * Copyright (C) 2012 Atmel,
  7. * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
  8. *
  9. * Licensed under GPLv2 or later.
  10. */
  11. /include/ "skeleton.dtsi"
  12. / {
  13. model = "Atmel AT91SAM9x5 family SoC";
  14. compatible = "atmel,at91sam9x5";
  15. interrupt-parent = <&aic>;
  16. aliases {
  17. serial0 = &dbgu;
  18. serial1 = &usart0;
  19. serial2 = &usart1;
  20. serial3 = &usart2;
  21. gpio0 = &pioA;
  22. gpio1 = &pioB;
  23. gpio2 = &pioC;
  24. gpio3 = &pioD;
  25. tcb0 = &tcb0;
  26. tcb1 = &tcb1;
  27. i2c0 = &i2c0;
  28. i2c1 = &i2c1;
  29. i2c2 = &i2c2;
  30. ssc0 = &ssc0;
  31. };
  32. cpus {
  33. cpu@0 {
  34. compatible = "arm,arm926ejs";
  35. };
  36. };
  37. memory {
  38. reg = <0x20000000 0x10000000>;
  39. };
  40. ahb {
  41. compatible = "simple-bus";
  42. #address-cells = <1>;
  43. #size-cells = <1>;
  44. ranges;
  45. apb {
  46. compatible = "simple-bus";
  47. #address-cells = <1>;
  48. #size-cells = <1>;
  49. ranges;
  50. aic: interrupt-controller@fffff000 {
  51. #interrupt-cells = <3>;
  52. compatible = "atmel,at91rm9200-aic";
  53. interrupt-controller;
  54. reg = <0xfffff000 0x200>;
  55. atmel,external-irqs = <31>;
  56. };
  57. ramc0: ramc@ffffe800 {
  58. compatible = "atmel,at91sam9g45-ddramc";
  59. reg = <0xffffe800 0x200>;
  60. };
  61. pmc: pmc@fffffc00 {
  62. compatible = "atmel,at91rm9200-pmc";
  63. reg = <0xfffffc00 0x100>;
  64. };
  65. rstc@fffffe00 {
  66. compatible = "atmel,at91sam9g45-rstc";
  67. reg = <0xfffffe00 0x10>;
  68. };
  69. shdwc@fffffe10 {
  70. compatible = "atmel,at91sam9x5-shdwc";
  71. reg = <0xfffffe10 0x10>;
  72. };
  73. pit: timer@fffffe30 {
  74. compatible = "atmel,at91sam9260-pit";
  75. reg = <0xfffffe30 0xf>;
  76. interrupts = <1 4 7>;
  77. };
  78. ssc0: ssc@f0010000 {
  79. compatible = "atmel,at91sam9g45-ssc";
  80. reg = <0xf0010000 0x4000>;
  81. interrupts = <28 4 5>;
  82. status = "disable";
  83. };
  84. tcb0: timer@f8008000 {
  85. compatible = "atmel,at91sam9x5-tcb";
  86. reg = <0xf8008000 0x100>;
  87. interrupts = <17 4 0>;
  88. };
  89. tcb1: timer@f800c000 {
  90. compatible = "atmel,at91sam9x5-tcb";
  91. reg = <0xf800c000 0x100>;
  92. interrupts = <17 4 0>;
  93. };
  94. dma0: dma-controller@ffffec00 {
  95. compatible = "atmel,at91sam9g45-dma";
  96. reg = <0xffffec00 0x200>;
  97. interrupts = <20 4 0>;
  98. };
  99. dma1: dma-controller@ffffee00 {
  100. compatible = "atmel,at91sam9g45-dma";
  101. reg = <0xffffee00 0x200>;
  102. interrupts = <21 4 0>;
  103. };
  104. pioA: gpio@fffff400 {
  105. compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
  106. reg = <0xfffff400 0x100>;
  107. interrupts = <2 4 1>;
  108. #gpio-cells = <2>;
  109. gpio-controller;
  110. interrupt-controller;
  111. #interrupt-cells = <2>;
  112. };
  113. pioB: gpio@fffff600 {
  114. compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
  115. reg = <0xfffff600 0x100>;
  116. interrupts = <2 4 1>;
  117. #gpio-cells = <2>;
  118. gpio-controller;
  119. interrupt-controller;
  120. #interrupt-cells = <2>;
  121. };
  122. pioC: gpio@fffff800 {
  123. compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
  124. reg = <0xfffff800 0x100>;
  125. interrupts = <3 4 1>;
  126. #gpio-cells = <2>;
  127. gpio-controller;
  128. interrupt-controller;
  129. #interrupt-cells = <2>;
  130. };
  131. pioD: gpio@fffffa00 {
  132. compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
  133. reg = <0xfffffa00 0x100>;
  134. interrupts = <3 4 1>;
  135. #gpio-cells = <2>;
  136. gpio-controller;
  137. interrupt-controller;
  138. #interrupt-cells = <2>;
  139. };
  140. dbgu: serial@fffff200 {
  141. compatible = "atmel,at91sam9260-usart";
  142. reg = <0xfffff200 0x200>;
  143. interrupts = <1 4 7>;
  144. status = "disabled";
  145. };
  146. usart0: serial@f801c000 {
  147. compatible = "atmel,at91sam9260-usart";
  148. reg = <0xf801c000 0x200>;
  149. interrupts = <5 4 5>;
  150. atmel,use-dma-rx;
  151. atmel,use-dma-tx;
  152. status = "disabled";
  153. };
  154. usart1: serial@f8020000 {
  155. compatible = "atmel,at91sam9260-usart";
  156. reg = <0xf8020000 0x200>;
  157. interrupts = <6 4 5>;
  158. atmel,use-dma-rx;
  159. atmel,use-dma-tx;
  160. status = "disabled";
  161. };
  162. usart2: serial@f8024000 {
  163. compatible = "atmel,at91sam9260-usart";
  164. reg = <0xf8024000 0x200>;
  165. interrupts = <7 4 5>;
  166. atmel,use-dma-rx;
  167. atmel,use-dma-tx;
  168. status = "disabled";
  169. };
  170. macb0: ethernet@f802c000 {
  171. compatible = "cdns,at32ap7000-macb", "cdns,macb";
  172. reg = <0xf802c000 0x100>;
  173. interrupts = <24 4 3>;
  174. status = "disabled";
  175. };
  176. macb1: ethernet@f8030000 {
  177. compatible = "cdns,at32ap7000-macb", "cdns,macb";
  178. reg = <0xf8030000 0x100>;
  179. interrupts = <27 4 3>;
  180. status = "disabled";
  181. };
  182. i2c0: i2c@f8010000 {
  183. compatible = "atmel,at91sam9x5-i2c";
  184. reg = <0xf8010000 0x100>;
  185. interrupts = <9 4 6>;
  186. #address-cells = <1>;
  187. #size-cells = <0>;
  188. status = "disabled";
  189. };
  190. i2c1: i2c@f8014000 {
  191. compatible = "atmel,at91sam9x5-i2c";
  192. reg = <0xf8014000 0x100>;
  193. interrupts = <10 4 6>;
  194. #address-cells = <1>;
  195. #size-cells = <0>;
  196. status = "disabled";
  197. };
  198. i2c2: i2c@f8018000 {
  199. compatible = "atmel,at91sam9x5-i2c";
  200. reg = <0xf8018000 0x100>;
  201. interrupts = <11 4 6>;
  202. #address-cells = <1>;
  203. #size-cells = <0>;
  204. status = "disabled";
  205. };
  206. adc0: adc@f804c000 {
  207. compatible = "atmel,at91sam9260-adc";
  208. reg = <0xf804c000 0x100>;
  209. interrupts = <19 4 0>;
  210. atmel,adc-use-external;
  211. atmel,adc-channels-used = <0xffff>;
  212. atmel,adc-vref = <3300>;
  213. atmel,adc-num-channels = <12>;
  214. atmel,adc-startup-time = <40>;
  215. atmel,adc-channel-base = <0x50>;
  216. atmel,adc-drdy-mask = <0x1000000>;
  217. atmel,adc-status-register = <0x30>;
  218. atmel,adc-trigger-register = <0xc0>;
  219. trigger@0 {
  220. trigger-name = "external-rising";
  221. trigger-value = <0x1>;
  222. trigger-external;
  223. };
  224. trigger@1 {
  225. trigger-name = "external-falling";
  226. trigger-value = <0x2>;
  227. trigger-external;
  228. };
  229. trigger@2 {
  230. trigger-name = "external-any";
  231. trigger-value = <0x3>;
  232. trigger-external;
  233. };
  234. trigger@3 {
  235. trigger-name = "continuous";
  236. trigger-value = <0x6>;
  237. };
  238. };
  239. };
  240. nand0: nand@40000000 {
  241. compatible = "atmel,at91rm9200-nand";
  242. #address-cells = <1>;
  243. #size-cells = <1>;
  244. reg = <0x40000000 0x10000000
  245. >;
  246. atmel,nand-addr-offset = <21>;
  247. atmel,nand-cmd-offset = <22>;
  248. gpios = <&pioD 5 0
  249. &pioD 4 0
  250. 0
  251. >;
  252. status = "disabled";
  253. };
  254. usb0: ohci@00600000 {
  255. compatible = "atmel,at91rm9200-ohci", "usb-ohci";
  256. reg = <0x00600000 0x100000>;
  257. interrupts = <22 4 2>;
  258. status = "disabled";
  259. };
  260. usb1: ehci@00700000 {
  261. compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
  262. reg = <0x00700000 0x100000>;
  263. interrupts = <22 4 2>;
  264. status = "disabled";
  265. };
  266. };
  267. i2c@0 {
  268. compatible = "i2c-gpio";
  269. gpios = <&pioA 30 0 /* sda */
  270. &pioA 31 0 /* scl */
  271. >;
  272. i2c-gpio,sda-open-drain;
  273. i2c-gpio,scl-open-drain;
  274. i2c-gpio,delay-us = <2>; /* ~100 kHz */
  275. #address-cells = <1>;
  276. #size-cells = <0>;
  277. status = "disabled";
  278. };
  279. i2c@1 {
  280. compatible = "i2c-gpio";
  281. gpios = <&pioC 0 0 /* sda */
  282. &pioC 1 0 /* scl */
  283. >;
  284. i2c-gpio,sda-open-drain;
  285. i2c-gpio,scl-open-drain;
  286. i2c-gpio,delay-us = <2>; /* ~100 kHz */
  287. #address-cells = <1>;
  288. #size-cells = <0>;
  289. status = "disabled";
  290. };
  291. i2c@2 {
  292. compatible = "i2c-gpio";
  293. gpios = <&pioB 4 0 /* sda */
  294. &pioB 5 0 /* scl */
  295. >;
  296. i2c-gpio,sda-open-drain;
  297. i2c-gpio,scl-open-drain;
  298. i2c-gpio,delay-us = <2>; /* ~100 kHz */
  299. #address-cells = <1>;
  300. #size-cells = <0>;
  301. status = "disabled";
  302. };
  303. };