mpi_ioc.h 57 KB

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  1. /*
  2. * Copyright (c) 2000-2006 LSI Logic Corporation.
  3. *
  4. *
  5. * Name: mpi_ioc.h
  6. * Title: MPI IOC, Port, Event, FW Download, and FW Upload messages
  7. * Creation Date: August 11, 2000
  8. *
  9. * mpi_ioc.h Version: 01.05.12
  10. *
  11. * Version History
  12. * ---------------
  13. *
  14. * Date Version Description
  15. * -------- -------- ------------------------------------------------------
  16. * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
  17. * 05-24-00 00.10.02 Added _MSG_IOC_INIT_REPLY structure.
  18. * 06-06-00 01.00.01 Added CurReplyFrameSize field to _MSG_IOC_FACTS_REPLY.
  19. * 06-12-00 01.00.02 Added _MSG_PORT_ENABLE_REPLY structure.
  20. * Added _MSG_EVENT_ACK_REPLY structure.
  21. * Added _MSG_FW_DOWNLOAD_REPLY structure.
  22. * Added _MSG_TOOLBOX_REPLY structure.
  23. * 06-30-00 01.00.03 Added MaxLanBuckets to _PORT_FACT_REPLY structure.
  24. * 07-27-00 01.00.04 Added _EVENT_DATA structure definitions for _SCSI,
  25. * _LINK_STATUS, _LOOP_STATE and _LOGOUT.
  26. * 08-11-00 01.00.05 Switched positions of MsgLength and Function fields in
  27. * _MSG_EVENT_ACK_REPLY structure to match specification.
  28. * 11-02-00 01.01.01 Original release for post 1.0 work.
  29. * Added a value for Manufacturer to WhoInit.
  30. * 12-04-00 01.01.02 Modified IOCFacts reply, added FWUpload messages, and
  31. * removed toolbox message.
  32. * 01-09-01 01.01.03 Added event enabled and disabled defines.
  33. * Added structures for FwHeader and DataHeader.
  34. * Added ImageType to FwUpload reply.
  35. * 02-20-01 01.01.04 Started using MPI_POINTER.
  36. * 02-27-01 01.01.05 Added event for RAID status change and its event data.
  37. * Added IocNumber field to MSG_IOC_FACTS_REPLY.
  38. * 03-27-01 01.01.06 Added defines for ProductId field of MPI_FW_HEADER.
  39. * Added structure offset comments.
  40. * 04-09-01 01.01.07 Added structure EVENT_DATA_EVENT_CHANGE.
  41. * 08-08-01 01.02.01 Original release for v1.2 work.
  42. * New format for FWVersion and ProductId in
  43. * MSG_IOC_FACTS_REPLY and MPI_FW_HEADER.
  44. * 08-31-01 01.02.02 Addded event MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE and
  45. * related structure and defines.
  46. * Added event MPI_EVENT_ON_BUS_TIMER_EXPIRED.
  47. * Added MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE.
  48. * Replaced a reserved field in MSG_IOC_FACTS_REPLY with
  49. * IOCExceptions and changed DataImageSize to reserved.
  50. * Added MPI_FW_DOWNLOAD_ITYPE_NVSTORE_DATA and
  51. * MPI_FW_UPLOAD_ITYPE_NVDATA.
  52. * 09-28-01 01.02.03 Modified Event Data for Integrated RAID.
  53. * 11-01-01 01.02.04 Added defines for MPI_EXT_IMAGE_HEADER ImageType field.
  54. * 03-14-02 01.02.05 Added HeaderVersion field to MSG_IOC_FACTS_REPLY.
  55. * 05-31-02 01.02.06 Added define for
  56. * MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID.
  57. * Added AliasIndex to EVENT_DATA_LOGOUT structure.
  58. * 04-01-03 01.02.07 Added defines for MPI_FW_HEADER_SIGNATURE_.
  59. * 06-26-03 01.02.08 Added new values to the product family defines.
  60. * 04-29-04 01.02.09 Added IOCCapabilities field to MSG_IOC_FACTS_REPLY and
  61. * added related defines.
  62. * 05-11-04 01.03.01 Original release for MPI v1.3.
  63. * 08-19-04 01.05.01 Added four new fields to MSG_IOC_INIT.
  64. * Added three new fields to MSG_IOC_FACTS_REPLY.
  65. * Defined four new bits for the IOCCapabilities field of
  66. * the IOCFacts reply.
  67. * Added two new PortTypes for the PortFacts reply.
  68. * Added six new events along with their EventData
  69. * structures.
  70. * Added a new MsgFlag to the FwDownload request to
  71. * indicate last segment.
  72. * Defined a new image type of boot loader.
  73. * Added FW family codes for SAS product families.
  74. * 10-05-04 01.05.02 Added ReplyFifoHostSignalingAddr field to
  75. * MSG_IOC_FACTS_REPLY.
  76. * 12-07-04 01.05.03 Added more defines for SAS Discovery Error event.
  77. * 12-09-04 01.05.04 Added Unsupported device to SAS Device event.
  78. * 01-15-05 01.05.05 Added event data for SAS SES Event.
  79. * 02-09-05 01.05.06 Added MPI_FW_UPLOAD_ITYPE_FW_BACKUP define.
  80. * 02-22-05 01.05.07 Added Host Page Buffer Persistent flag to IOC Facts
  81. * Reply and IOC Init Request.
  82. * 03-11-05 01.05.08 Added family code for 1068E family.
  83. * Removed IOCFacts Reply EEDP Capability bit.
  84. * 06-24-05 01.05.09 Added 5 new IOCFacts Reply IOCCapabilities bits.
  85. * Added Max SATA Targets to SAS Discovery Error event.
  86. * 08-30-05 01.05.10 Added 4 new events and their event data structures.
  87. * Added new ReasonCode value for SAS Device Status Change
  88. * event.
  89. * Added new family code for FC949E.
  90. * 03-27-06 01.05.11 Added MPI_IOCFACTS_CAPABILITY_TLR.
  91. * Added additional Reason Codes and more event data fields
  92. * to EVENT_DATA_SAS_DEVICE_STATUS_CHANGE.
  93. * Added EVENT_DATA_SAS_BROADCAST_PRIMITIVE structure and
  94. * new event.
  95. * Added MPI_EVENT_SAS_SMP_ERROR and event data structure.
  96. * Added MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE and event
  97. * data structure.
  98. * Added MPI_EVENT_SAS_INIT_TABLE_OVERFLOW and event
  99. * data structure.
  100. * Added MPI_EXT_IMAGE_TYPE_INITIALIZATION.
  101. * 10-11-06 01.05.12 Added MPI_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED.
  102. * Added MaxInitiators field to PortFacts reply.
  103. * Added SAS Device Status Change ReasonCode for
  104. * asynchronous notificaiton.
  105. * Added MPI_EVENT_SAS_EXPANDER_STATUS_CHANGE and event
  106. * data structure.
  107. * Added new ImageType values for FWDownload and FWUpload
  108. * requests.
  109. * --------------------------------------------------------------------------
  110. */
  111. #ifndef MPI_IOC_H
  112. #define MPI_IOC_H
  113. /*****************************************************************************
  114. *
  115. * I O C M e s s a g e s
  116. *
  117. *****************************************************************************/
  118. /****************************************************************************/
  119. /* IOCInit message */
  120. /****************************************************************************/
  121. typedef struct _MSG_IOC_INIT
  122. {
  123. U8 WhoInit; /* 00h */
  124. U8 Reserved; /* 01h */
  125. U8 ChainOffset; /* 02h */
  126. U8 Function; /* 03h */
  127. U8 Flags; /* 04h */
  128. U8 MaxDevices; /* 05h */
  129. U8 MaxBuses; /* 06h */
  130. U8 MsgFlags; /* 07h */
  131. U32 MsgContext; /* 08h */
  132. U16 ReplyFrameSize; /* 0Ch */
  133. U8 Reserved1[2]; /* 0Eh */
  134. U32 HostMfaHighAddr; /* 10h */
  135. U32 SenseBufferHighAddr; /* 14h */
  136. U32 ReplyFifoHostSignalingAddr; /* 18h */
  137. SGE_SIMPLE_UNION HostPageBufferSGE; /* 1Ch */
  138. U16 MsgVersion; /* 28h */
  139. U16 HeaderVersion; /* 2Ah */
  140. } MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT,
  141. IOCInit_t, MPI_POINTER pIOCInit_t;
  142. /* WhoInit values */
  143. #define MPI_WHOINIT_NO_ONE (0x00)
  144. #define MPI_WHOINIT_SYSTEM_BIOS (0x01)
  145. #define MPI_WHOINIT_ROM_BIOS (0x02)
  146. #define MPI_WHOINIT_PCI_PEER (0x03)
  147. #define MPI_WHOINIT_HOST_DRIVER (0x04)
  148. #define MPI_WHOINIT_MANUFACTURER (0x05)
  149. /* Flags values */
  150. #define MPI_IOCINIT_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
  151. #define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
  152. #define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE (0x01)
  153. /* MsgVersion */
  154. #define MPI_IOCINIT_MSGVERSION_MAJOR_MASK (0xFF00)
  155. #define MPI_IOCINIT_MSGVERSION_MAJOR_SHIFT (8)
  156. #define MPI_IOCINIT_MSGVERSION_MINOR_MASK (0x00FF)
  157. #define MPI_IOCINIT_MSGVERSION_MINOR_SHIFT (0)
  158. /* HeaderVersion */
  159. #define MPI_IOCINIT_HEADERVERSION_UNIT_MASK (0xFF00)
  160. #define MPI_IOCINIT_HEADERVERSION_UNIT_SHIFT (8)
  161. #define MPI_IOCINIT_HEADERVERSION_DEV_MASK (0x00FF)
  162. #define MPI_IOCINIT_HEADERVERSION_DEV_SHIFT (0)
  163. typedef struct _MSG_IOC_INIT_REPLY
  164. {
  165. U8 WhoInit; /* 00h */
  166. U8 Reserved; /* 01h */
  167. U8 MsgLength; /* 02h */
  168. U8 Function; /* 03h */
  169. U8 Flags; /* 04h */
  170. U8 MaxDevices; /* 05h */
  171. U8 MaxBuses; /* 06h */
  172. U8 MsgFlags; /* 07h */
  173. U32 MsgContext; /* 08h */
  174. U16 Reserved2; /* 0Ch */
  175. U16 IOCStatus; /* 0Eh */
  176. U32 IOCLogInfo; /* 10h */
  177. } MSG_IOC_INIT_REPLY, MPI_POINTER PTR_MSG_IOC_INIT_REPLY,
  178. IOCInitReply_t, MPI_POINTER pIOCInitReply_t;
  179. /****************************************************************************/
  180. /* IOC Facts message */
  181. /****************************************************************************/
  182. typedef struct _MSG_IOC_FACTS
  183. {
  184. U8 Reserved[2]; /* 00h */
  185. U8 ChainOffset; /* 01h */
  186. U8 Function; /* 02h */
  187. U8 Reserved1[3]; /* 03h */
  188. U8 MsgFlags; /* 04h */
  189. U32 MsgContext; /* 08h */
  190. } MSG_IOC_FACTS, MPI_POINTER PTR_IOC_FACTS,
  191. IOCFacts_t, MPI_POINTER pIOCFacts_t;
  192. typedef struct _MPI_FW_VERSION_STRUCT
  193. {
  194. U8 Dev; /* 00h */
  195. U8 Unit; /* 01h */
  196. U8 Minor; /* 02h */
  197. U8 Major; /* 03h */
  198. } MPI_FW_VERSION_STRUCT;
  199. typedef union _MPI_FW_VERSION
  200. {
  201. MPI_FW_VERSION_STRUCT Struct;
  202. U32 Word;
  203. } MPI_FW_VERSION;
  204. /* IOC Facts Reply */
  205. typedef struct _MSG_IOC_FACTS_REPLY
  206. {
  207. U16 MsgVersion; /* 00h */
  208. U8 MsgLength; /* 02h */
  209. U8 Function; /* 03h */
  210. U16 HeaderVersion; /* 04h */
  211. U8 IOCNumber; /* 06h */
  212. U8 MsgFlags; /* 07h */
  213. U32 MsgContext; /* 08h */
  214. U16 IOCExceptions; /* 0Ch */
  215. U16 IOCStatus; /* 0Eh */
  216. U32 IOCLogInfo; /* 10h */
  217. U8 MaxChainDepth; /* 14h */
  218. U8 WhoInit; /* 15h */
  219. U8 BlockSize; /* 16h */
  220. U8 Flags; /* 17h */
  221. U16 ReplyQueueDepth; /* 18h */
  222. U16 RequestFrameSize; /* 1Ah */
  223. U16 Reserved_0101_FWVersion; /* 1Ch */ /* obsolete 16-bit FWVersion */
  224. U16 ProductID; /* 1Eh */
  225. U32 CurrentHostMfaHighAddr; /* 20h */
  226. U16 GlobalCredits; /* 24h */
  227. U8 NumberOfPorts; /* 26h */
  228. U8 EventState; /* 27h */
  229. U32 CurrentSenseBufferHighAddr; /* 28h */
  230. U16 CurReplyFrameSize; /* 2Ch */
  231. U8 MaxDevices; /* 2Eh */
  232. U8 MaxBuses; /* 2Fh */
  233. U32 FWImageSize; /* 30h */
  234. U32 IOCCapabilities; /* 34h */
  235. MPI_FW_VERSION FWVersion; /* 38h */
  236. U16 HighPriorityQueueDepth; /* 3Ch */
  237. U16 Reserved2; /* 3Eh */
  238. SGE_SIMPLE_UNION HostPageBufferSGE; /* 40h */
  239. U32 ReplyFifoHostSignalingAddr; /* 4Ch */
  240. } MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY,
  241. IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t;
  242. #define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00)
  243. #define MPI_IOCFACTS_MSGVERSION_MAJOR_SHIFT (8)
  244. #define MPI_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF)
  245. #define MPI_IOCFACTS_MSGVERSION_MINOR_SHIFT (0)
  246. #define MPI_IOCFACTS_HDRVERSION_UNIT_MASK (0xFF00)
  247. #define MPI_IOCFACTS_HDRVERSION_UNIT_SHIFT (8)
  248. #define MPI_IOCFACTS_HDRVERSION_DEV_MASK (0x00FF)
  249. #define MPI_IOCFACTS_HDRVERSION_DEV_SHIFT (0)
  250. #define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001)
  251. #define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002)
  252. #define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004)
  253. #define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL (0x0008)
  254. #define MPI_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED (0x0010)
  255. #define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT (0x01)
  256. #define MPI_IOCFACTS_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
  257. #define MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
  258. #define MPI_IOCFACTS_EVENTSTATE_DISABLED (0x00)
  259. #define MPI_IOCFACTS_EVENTSTATE_ENABLED (0x01)
  260. #define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q (0x00000001)
  261. #define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL (0x00000002)
  262. #define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING (0x00000004)
  263. #define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008)
  264. #define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010)
  265. #define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER (0x00000020)
  266. #define MPI_IOCFACTS_CAPABILITY_EEDP (0x00000040)
  267. #define MPI_IOCFACTS_CAPABILITY_BIDIRECTIONAL (0x00000080)
  268. #define MPI_IOCFACTS_CAPABILITY_MULTICAST (0x00000100)
  269. #define MPI_IOCFACTS_CAPABILITY_SCSIIO32 (0x00000200)
  270. #define MPI_IOCFACTS_CAPABILITY_NO_SCSIIO16 (0x00000400)
  271. #define MPI_IOCFACTS_CAPABILITY_TLR (0x00000800)
  272. /*****************************************************************************
  273. *
  274. * P o r t M e s s a g e s
  275. *
  276. *****************************************************************************/
  277. /****************************************************************************/
  278. /* Port Facts message and Reply */
  279. /****************************************************************************/
  280. typedef struct _MSG_PORT_FACTS
  281. {
  282. U8 Reserved[2]; /* 00h */
  283. U8 ChainOffset; /* 02h */
  284. U8 Function; /* 03h */
  285. U8 Reserved1[2]; /* 04h */
  286. U8 PortNumber; /* 06h */
  287. U8 MsgFlags; /* 07h */
  288. U32 MsgContext; /* 08h */
  289. } MSG_PORT_FACTS, MPI_POINTER PTR_MSG_PORT_FACTS,
  290. PortFacts_t, MPI_POINTER pPortFacts_t;
  291. typedef struct _MSG_PORT_FACTS_REPLY
  292. {
  293. U16 Reserved; /* 00h */
  294. U8 MsgLength; /* 02h */
  295. U8 Function; /* 03h */
  296. U16 Reserved1; /* 04h */
  297. U8 PortNumber; /* 06h */
  298. U8 MsgFlags; /* 07h */
  299. U32 MsgContext; /* 08h */
  300. U16 Reserved2; /* 0Ch */
  301. U16 IOCStatus; /* 0Eh */
  302. U32 IOCLogInfo; /* 10h */
  303. U8 Reserved3; /* 14h */
  304. U8 PortType; /* 15h */
  305. U16 MaxDevices; /* 16h */
  306. U16 PortSCSIID; /* 18h */
  307. U16 ProtocolFlags; /* 1Ah */
  308. U16 MaxPostedCmdBuffers; /* 1Ch */
  309. U16 MaxPersistentIDs; /* 1Eh */
  310. U16 MaxLanBuckets; /* 20h */
  311. U8 MaxInitiators; /* 22h */
  312. U8 Reserved4; /* 23h */
  313. U32 Reserved5; /* 24h */
  314. } MSG_PORT_FACTS_REPLY, MPI_POINTER PTR_MSG_PORT_FACTS_REPLY,
  315. PortFactsReply_t, MPI_POINTER pPortFactsReply_t;
  316. /* PortTypes values */
  317. #define MPI_PORTFACTS_PORTTYPE_INACTIVE (0x00)
  318. #define MPI_PORTFACTS_PORTTYPE_SCSI (0x01)
  319. #define MPI_PORTFACTS_PORTTYPE_FC (0x10)
  320. #define MPI_PORTFACTS_PORTTYPE_ISCSI (0x20)
  321. #define MPI_PORTFACTS_PORTTYPE_SAS (0x30)
  322. /* ProtocolFlags values */
  323. #define MPI_PORTFACTS_PROTOCOL_LOGBUSADDR (0x01)
  324. #define MPI_PORTFACTS_PROTOCOL_LAN (0x02)
  325. #define MPI_PORTFACTS_PROTOCOL_TARGET (0x04)
  326. #define MPI_PORTFACTS_PROTOCOL_INITIATOR (0x08)
  327. /****************************************************************************/
  328. /* Port Enable Message */
  329. /****************************************************************************/
  330. typedef struct _MSG_PORT_ENABLE
  331. {
  332. U8 Reserved[2]; /* 00h */
  333. U8 ChainOffset; /* 02h */
  334. U8 Function; /* 03h */
  335. U8 Reserved1[2]; /* 04h */
  336. U8 PortNumber; /* 06h */
  337. U8 MsgFlags; /* 07h */
  338. U32 MsgContext; /* 08h */
  339. } MSG_PORT_ENABLE, MPI_POINTER PTR_MSG_PORT_ENABLE,
  340. PortEnable_t, MPI_POINTER pPortEnable_t;
  341. typedef struct _MSG_PORT_ENABLE_REPLY
  342. {
  343. U8 Reserved[2]; /* 00h */
  344. U8 MsgLength; /* 02h */
  345. U8 Function; /* 03h */
  346. U8 Reserved1[2]; /* 04h */
  347. U8 PortNumber; /* 05h */
  348. U8 MsgFlags; /* 07h */
  349. U32 MsgContext; /* 08h */
  350. U16 Reserved2; /* 0Ch */
  351. U16 IOCStatus; /* 0Eh */
  352. U32 IOCLogInfo; /* 10h */
  353. } MSG_PORT_ENABLE_REPLY, MPI_POINTER PTR_MSG_PORT_ENABLE_REPLY,
  354. PortEnableReply_t, MPI_POINTER pPortEnableReply_t;
  355. /*****************************************************************************
  356. *
  357. * E v e n t M e s s a g e s
  358. *
  359. *****************************************************************************/
  360. /****************************************************************************/
  361. /* Event Notification messages */
  362. /****************************************************************************/
  363. typedef struct _MSG_EVENT_NOTIFY
  364. {
  365. U8 Switch; /* 00h */
  366. U8 Reserved; /* 01h */
  367. U8 ChainOffset; /* 02h */
  368. U8 Function; /* 03h */
  369. U8 Reserved1[3]; /* 04h */
  370. U8 MsgFlags; /* 07h */
  371. U32 MsgContext; /* 08h */
  372. } MSG_EVENT_NOTIFY, MPI_POINTER PTR_MSG_EVENT_NOTIFY,
  373. EventNotification_t, MPI_POINTER pEventNotification_t;
  374. /* Event Notification Reply */
  375. typedef struct _MSG_EVENT_NOTIFY_REPLY
  376. {
  377. U16 EventDataLength; /* 00h */
  378. U8 MsgLength; /* 02h */
  379. U8 Function; /* 03h */
  380. U8 Reserved1[2]; /* 04h */
  381. U8 AckRequired; /* 06h */
  382. U8 MsgFlags; /* 07h */
  383. U32 MsgContext; /* 08h */
  384. U8 Reserved2[2]; /* 0Ch */
  385. U16 IOCStatus; /* 0Eh */
  386. U32 IOCLogInfo; /* 10h */
  387. U32 Event; /* 14h */
  388. U32 EventContext; /* 18h */
  389. U32 Data[1]; /* 1Ch */
  390. } MSG_EVENT_NOTIFY_REPLY, MPI_POINTER PTR_MSG_EVENT_NOTIFY_REPLY,
  391. EventNotificationReply_t, MPI_POINTER pEventNotificationReply_t;
  392. /* Event Acknowledge */
  393. typedef struct _MSG_EVENT_ACK
  394. {
  395. U8 Reserved[2]; /* 00h */
  396. U8 ChainOffset; /* 02h */
  397. U8 Function; /* 03h */
  398. U8 Reserved1[3]; /* 04h */
  399. U8 MsgFlags; /* 07h */
  400. U32 MsgContext; /* 08h */
  401. U32 Event; /* 0Ch */
  402. U32 EventContext; /* 10h */
  403. } MSG_EVENT_ACK, MPI_POINTER PTR_MSG_EVENT_ACK,
  404. EventAck_t, MPI_POINTER pEventAck_t;
  405. typedef struct _MSG_EVENT_ACK_REPLY
  406. {
  407. U8 Reserved[2]; /* 00h */
  408. U8 MsgLength; /* 02h */
  409. U8 Function; /* 03h */
  410. U8 Reserved1[3]; /* 04h */
  411. U8 MsgFlags; /* 07h */
  412. U32 MsgContext; /* 08h */
  413. U16 Reserved2; /* 0Ch */
  414. U16 IOCStatus; /* 0Eh */
  415. U32 IOCLogInfo; /* 10h */
  416. } MSG_EVENT_ACK_REPLY, MPI_POINTER PTR_MSG_EVENT_ACK_REPLY,
  417. EventAckReply_t, MPI_POINTER pEventAckReply_t;
  418. /* Switch */
  419. #define MPI_EVENT_NOTIFICATION_SWITCH_OFF (0x00)
  420. #define MPI_EVENT_NOTIFICATION_SWITCH_ON (0x01)
  421. /* Event */
  422. #define MPI_EVENT_NONE (0x00000000)
  423. #define MPI_EVENT_LOG_DATA (0x00000001)
  424. #define MPI_EVENT_STATE_CHANGE (0x00000002)
  425. #define MPI_EVENT_UNIT_ATTENTION (0x00000003)
  426. #define MPI_EVENT_IOC_BUS_RESET (0x00000004)
  427. #define MPI_EVENT_EXT_BUS_RESET (0x00000005)
  428. #define MPI_EVENT_RESCAN (0x00000006)
  429. #define MPI_EVENT_LINK_STATUS_CHANGE (0x00000007)
  430. #define MPI_EVENT_LOOP_STATE_CHANGE (0x00000008)
  431. #define MPI_EVENT_LOGOUT (0x00000009)
  432. #define MPI_EVENT_EVENT_CHANGE (0x0000000A)
  433. #define MPI_EVENT_INTEGRATED_RAID (0x0000000B)
  434. #define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE (0x0000000C)
  435. #define MPI_EVENT_ON_BUS_TIMER_EXPIRED (0x0000000D)
  436. #define MPI_EVENT_QUEUE_FULL (0x0000000E)
  437. #define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE (0x0000000F)
  438. #define MPI_EVENT_SAS_SES (0x00000010)
  439. #define MPI_EVENT_PERSISTENT_TABLE_FULL (0x00000011)
  440. #define MPI_EVENT_SAS_PHY_LINK_STATUS (0x00000012)
  441. #define MPI_EVENT_SAS_DISCOVERY_ERROR (0x00000013)
  442. #define MPI_EVENT_IR_RESYNC_UPDATE (0x00000014)
  443. #define MPI_EVENT_IR2 (0x00000015)
  444. #define MPI_EVENT_SAS_DISCOVERY (0x00000016)
  445. #define MPI_EVENT_SAS_BROADCAST_PRIMITIVE (0x00000017)
  446. #define MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE (0x00000018)
  447. #define MPI_EVENT_SAS_INIT_TABLE_OVERFLOW (0x00000019)
  448. #define MPI_EVENT_SAS_SMP_ERROR (0x0000001A)
  449. #define MPI_EVENT_SAS_EXPANDER_STATUS_CHANGE (0x0000001B)
  450. #define MPI_EVENT_LOG_ENTRY_ADDED (0x00000021)
  451. /* AckRequired field values */
  452. #define MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00)
  453. #define MPI_EVENT_NOTIFICATION_ACK_REQUIRED (0x01)
  454. /* EventChange Event data */
  455. typedef struct _EVENT_DATA_EVENT_CHANGE
  456. {
  457. U8 EventState; /* 00h */
  458. U8 Reserved; /* 01h */
  459. U16 Reserved1; /* 02h */
  460. } EVENT_DATA_EVENT_CHANGE, MPI_POINTER PTR_EVENT_DATA_EVENT_CHANGE,
  461. EventDataEventChange_t, MPI_POINTER pEventDataEventChange_t;
  462. /* LogEntryAdded Event data */
  463. /* this structure matches MPI_LOG_0_ENTRY in mpi_cnfg.h */
  464. #define MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH (0x1C)
  465. typedef struct _EVENT_DATA_LOG_ENTRY
  466. {
  467. U32 TimeStamp; /* 00h */
  468. U32 Reserved1; /* 04h */
  469. U16 LogSequence; /* 08h */
  470. U16 LogEntryQualifier; /* 0Ah */
  471. U8 LogData[MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH]; /* 0Ch */
  472. } EVENT_DATA_LOG_ENTRY, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY,
  473. MpiEventDataLogEntry_t, MPI_POINTER pMpiEventDataLogEntry_t;
  474. typedef struct _EVENT_DATA_LOG_ENTRY_ADDED
  475. {
  476. U16 LogSequence; /* 00h */
  477. U16 Reserved1; /* 02h */
  478. U32 Reserved2; /* 04h */
  479. EVENT_DATA_LOG_ENTRY LogEntry; /* 08h */
  480. } EVENT_DATA_LOG_ENTRY_ADDED, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY_ADDED,
  481. MpiEventDataLogEntryAdded_t, MPI_POINTER pMpiEventDataLogEntryAdded_t;
  482. /* SCSI Event data for Port, Bus and Device forms */
  483. typedef struct _EVENT_DATA_SCSI
  484. {
  485. U8 TargetID; /* 00h */
  486. U8 BusPort; /* 01h */
  487. U16 Reserved; /* 02h */
  488. } EVENT_DATA_SCSI, MPI_POINTER PTR_EVENT_DATA_SCSI,
  489. EventDataScsi_t, MPI_POINTER pEventDataScsi_t;
  490. /* SCSI Device Status Change Event data */
  491. typedef struct _EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE
  492. {
  493. U8 TargetID; /* 00h */
  494. U8 Bus; /* 01h */
  495. U8 ReasonCode; /* 02h */
  496. U8 LUN; /* 03h */
  497. U8 ASC; /* 04h */
  498. U8 ASCQ; /* 05h */
  499. U16 Reserved; /* 06h */
  500. } EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
  501. MPI_POINTER PTR_EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
  502. MpiEventDataScsiDeviceStatusChange_t,
  503. MPI_POINTER pMpiEventDataScsiDeviceStatusChange_t;
  504. /* MPI SCSI Device Status Change Event data ReasonCode values */
  505. #define MPI_EVENT_SCSI_DEV_STAT_RC_ADDED (0x03)
  506. #define MPI_EVENT_SCSI_DEV_STAT_RC_NOT_RESPONDING (0x04)
  507. #define MPI_EVENT_SCSI_DEV_STAT_RC_SMART_DATA (0x05)
  508. /* SAS Device Status Change Event data */
  509. typedef struct _EVENT_DATA_SAS_DEVICE_STATUS_CHANGE
  510. {
  511. U8 TargetID; /* 00h */
  512. U8 Bus; /* 01h */
  513. U8 ReasonCode; /* 02h */
  514. U8 Reserved; /* 03h */
  515. U8 ASC; /* 04h */
  516. U8 ASCQ; /* 05h */
  517. U16 DevHandle; /* 06h */
  518. U32 DeviceInfo; /* 08h */
  519. U16 ParentDevHandle; /* 0Ch */
  520. U8 PhyNum; /* 0Eh */
  521. U8 Reserved1; /* 0Fh */
  522. U64 SASAddress; /* 10h */
  523. U8 LUN[8]; /* 18h */
  524. U16 TaskTag; /* 20h */
  525. U16 Reserved2; /* 22h */
  526. } EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
  527. MPI_POINTER PTR_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
  528. MpiEventDataSasDeviceStatusChange_t,
  529. MPI_POINTER pMpiEventDataSasDeviceStatusChange_t;
  530. /* MPI SAS Device Status Change Event data ReasonCode values */
  531. #define MPI_EVENT_SAS_DEV_STAT_RC_ADDED (0x03)
  532. #define MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING (0x04)
  533. #define MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA (0x05)
  534. #define MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED (0x06)
  535. #define MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED (0x07)
  536. #define MPI_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET (0x08)
  537. #define MPI_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL (0x09)
  538. #define MPI_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL (0x0A)
  539. #define MPI_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL (0x0B)
  540. #define MPI_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL (0x0C)
  541. #define MPI_EVENT_SAS_DEV_STAT_RC_ASYNC_NOTIFICATION (0x0D)
  542. /* SCSI Event data for Queue Full event */
  543. typedef struct _EVENT_DATA_QUEUE_FULL
  544. {
  545. U8 TargetID; /* 00h */
  546. U8 Bus; /* 01h */
  547. U16 CurrentDepth; /* 02h */
  548. } EVENT_DATA_QUEUE_FULL, MPI_POINTER PTR_EVENT_DATA_QUEUE_FULL,
  549. EventDataQueueFull_t, MPI_POINTER pEventDataQueueFull_t;
  550. /* MPI Integrated RAID Event data */
  551. typedef struct _EVENT_DATA_RAID
  552. {
  553. U8 VolumeID; /* 00h */
  554. U8 VolumeBus; /* 01h */
  555. U8 ReasonCode; /* 02h */
  556. U8 PhysDiskNum; /* 03h */
  557. U8 ASC; /* 04h */
  558. U8 ASCQ; /* 05h */
  559. U16 Reserved; /* 06h */
  560. U32 SettingsStatus; /* 08h */
  561. } EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID,
  562. MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t;
  563. /* MPI Integrated RAID Event data ReasonCode values */
  564. #define MPI_EVENT_RAID_RC_VOLUME_CREATED (0x00)
  565. #define MPI_EVENT_RAID_RC_VOLUME_DELETED (0x01)
  566. #define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED (0x02)
  567. #define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED (0x03)
  568. #define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED (0x04)
  569. #define MPI_EVENT_RAID_RC_PHYSDISK_CREATED (0x05)
  570. #define MPI_EVENT_RAID_RC_PHYSDISK_DELETED (0x06)
  571. #define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED (0x07)
  572. #define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED (0x08)
  573. #define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED (0x09)
  574. #define MPI_EVENT_RAID_RC_SMART_DATA (0x0A)
  575. #define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED (0x0B)
  576. /* MPI Integrated RAID Resync Update Event data */
  577. typedef struct _MPI_EVENT_DATA_IR_RESYNC_UPDATE
  578. {
  579. U8 VolumeID; /* 00h */
  580. U8 VolumeBus; /* 01h */
  581. U8 ResyncComplete; /* 02h */
  582. U8 Reserved1; /* 03h */
  583. U32 Reserved2; /* 04h */
  584. } MPI_EVENT_DATA_IR_RESYNC_UPDATE,
  585. MPI_POINTER PTR_MPI_EVENT_DATA_IR_RESYNC_UPDATE,
  586. MpiEventDataIrResyncUpdate_t, MPI_POINTER pMpiEventDataIrResyncUpdate_t;
  587. /* MPI IR2 Event data */
  588. /* MPI_LD_STATE or MPI_PD_STATE */
  589. typedef struct _IR2_STATE_CHANGED
  590. {
  591. U16 PreviousState; /* 00h */
  592. U16 NewState; /* 02h */
  593. } IR2_STATE_CHANGED, MPI_POINTER PTR_IR2_STATE_CHANGED;
  594. typedef struct _IR2_PD_INFO
  595. {
  596. U16 DeviceHandle; /* 00h */
  597. U8 TruncEnclosureHandle; /* 02h */
  598. U8 TruncatedSlot; /* 03h */
  599. } IR2_PD_INFO, MPI_POINTER PTR_IR2_PD_INFO;
  600. typedef union _MPI_IR2_RC_EVENT_DATA
  601. {
  602. IR2_STATE_CHANGED StateChanged;
  603. U32 Lba;
  604. IR2_PD_INFO PdInfo;
  605. } MPI_IR2_RC_EVENT_DATA, MPI_POINTER PTR_MPI_IR2_RC_EVENT_DATA;
  606. typedef struct _MPI_EVENT_DATA_IR2
  607. {
  608. U8 TargetID; /* 00h */
  609. U8 Bus; /* 01h */
  610. U8 ReasonCode; /* 02h */
  611. U8 PhysDiskNum; /* 03h */
  612. MPI_IR2_RC_EVENT_DATA IR2EventData; /* 04h */
  613. } MPI_EVENT_DATA_IR2, MPI_POINTER PTR_MPI_EVENT_DATA_IR2,
  614. MpiEventDataIR2_t, MPI_POINTER pMpiEventDataIR2_t;
  615. /* MPI IR2 Event data ReasonCode values */
  616. #define MPI_EVENT_IR2_RC_LD_STATE_CHANGED (0x01)
  617. #define MPI_EVENT_IR2_RC_PD_STATE_CHANGED (0x02)
  618. #define MPI_EVENT_IR2_RC_BAD_BLOCK_TABLE_FULL (0x03)
  619. #define MPI_EVENT_IR2_RC_PD_INSERTED (0x04)
  620. #define MPI_EVENT_IR2_RC_PD_REMOVED (0x05)
  621. #define MPI_EVENT_IR2_RC_FOREIGN_CFG_DETECTED (0x06)
  622. #define MPI_EVENT_IR2_RC_REBUILD_MEDIUM_ERROR (0x07)
  623. /* defines for logical disk states */
  624. #define MPI_LD_STATE_OPTIMAL (0x00)
  625. #define MPI_LD_STATE_DEGRADED (0x01)
  626. #define MPI_LD_STATE_FAILED (0x02)
  627. #define MPI_LD_STATE_MISSING (0x03)
  628. #define MPI_LD_STATE_OFFLINE (0x04)
  629. /* defines for physical disk states */
  630. #define MPI_PD_STATE_ONLINE (0x00)
  631. #define MPI_PD_STATE_MISSING (0x01)
  632. #define MPI_PD_STATE_NOT_COMPATIBLE (0x02)
  633. #define MPI_PD_STATE_FAILED (0x03)
  634. #define MPI_PD_STATE_INITIALIZING (0x04)
  635. #define MPI_PD_STATE_OFFLINE_AT_HOST_REQUEST (0x05)
  636. #define MPI_PD_STATE_FAILED_AT_HOST_REQUEST (0x06)
  637. #define MPI_PD_STATE_OFFLINE_FOR_ANOTHER_REASON (0xFF)
  638. /* MPI Link Status Change Event data */
  639. typedef struct _EVENT_DATA_LINK_STATUS
  640. {
  641. U8 State; /* 00h */
  642. U8 Reserved; /* 01h */
  643. U16 Reserved1; /* 02h */
  644. U8 Reserved2; /* 04h */
  645. U8 Port; /* 05h */
  646. U16 Reserved3; /* 06h */
  647. } EVENT_DATA_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_LINK_STATUS,
  648. EventDataLinkStatus_t, MPI_POINTER pEventDataLinkStatus_t;
  649. #define MPI_EVENT_LINK_STATUS_FAILURE (0x00000000)
  650. #define MPI_EVENT_LINK_STATUS_ACTIVE (0x00000001)
  651. /* MPI Loop State Change Event data */
  652. typedef struct _EVENT_DATA_LOOP_STATE
  653. {
  654. U8 Character4; /* 00h */
  655. U8 Character3; /* 01h */
  656. U8 Type; /* 02h */
  657. U8 Reserved; /* 03h */
  658. U8 Reserved1; /* 04h */
  659. U8 Port; /* 05h */
  660. U16 Reserved2; /* 06h */
  661. } EVENT_DATA_LOOP_STATE, MPI_POINTER PTR_EVENT_DATA_LOOP_STATE,
  662. EventDataLoopState_t, MPI_POINTER pEventDataLoopState_t;
  663. #define MPI_EVENT_LOOP_STATE_CHANGE_LIP (0x0001)
  664. #define MPI_EVENT_LOOP_STATE_CHANGE_LPE (0x0002)
  665. #define MPI_EVENT_LOOP_STATE_CHANGE_LPB (0x0003)
  666. /* MPI LOGOUT Event data */
  667. typedef struct _EVENT_DATA_LOGOUT
  668. {
  669. U32 NPortID; /* 00h */
  670. U8 AliasIndex; /* 04h */
  671. U8 Port; /* 05h */
  672. U16 Reserved1; /* 06h */
  673. } EVENT_DATA_LOGOUT, MPI_POINTER PTR_EVENT_DATA_LOGOUT,
  674. EventDataLogout_t, MPI_POINTER pEventDataLogout_t;
  675. #define MPI_EVENT_LOGOUT_ALL_ALIASES (0xFF)
  676. /* SAS SES Event data */
  677. typedef struct _EVENT_DATA_SAS_SES
  678. {
  679. U8 PhyNum; /* 00h */
  680. U8 Port; /* 01h */
  681. U8 PortWidth; /* 02h */
  682. U8 Reserved1; /* 04h */
  683. } EVENT_DATA_SAS_SES, MPI_POINTER PTR_EVENT_DATA_SAS_SES,
  684. MpiEventDataSasSes_t, MPI_POINTER pMpiEventDataSasSes_t;
  685. /* SAS Broadcast Primitive Event data */
  686. typedef struct _EVENT_DATA_SAS_BROADCAST_PRIMITIVE
  687. {
  688. U8 PhyNum; /* 00h */
  689. U8 Port; /* 01h */
  690. U8 PortWidth; /* 02h */
  691. U8 Primitive; /* 04h */
  692. } EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
  693. MPI_POINTER PTR_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
  694. MpiEventDataSasBroadcastPrimitive_t,
  695. MPI_POINTER pMpiEventDataSasBroadcastPrimitive_t;
  696. #define MPI_EVENT_PRIMITIVE_CHANGE (0x01)
  697. #define MPI_EVENT_PRIMITIVE_EXPANDER (0x03)
  698. #define MPI_EVENT_PRIMITIVE_RESERVED2 (0x04)
  699. #define MPI_EVENT_PRIMITIVE_RESERVED3 (0x05)
  700. #define MPI_EVENT_PRIMITIVE_RESERVED4 (0x06)
  701. #define MPI_EVENT_PRIMITIVE_CHANGE0_RESERVED (0x07)
  702. #define MPI_EVENT_PRIMITIVE_CHANGE1_RESERVED (0x08)
  703. /* SAS Phy Link Status Event data */
  704. typedef struct _EVENT_DATA_SAS_PHY_LINK_STATUS
  705. {
  706. U8 PhyNum; /* 00h */
  707. U8 LinkRates; /* 01h */
  708. U16 DevHandle; /* 02h */
  709. U64 SASAddress; /* 04h */
  710. } EVENT_DATA_SAS_PHY_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_SAS_PHY_LINK_STATUS,
  711. MpiEventDataSasPhyLinkStatus_t, MPI_POINTER pMpiEventDataSasPhyLinkStatus_t;
  712. /* defines for the LinkRates field of the SAS PHY Link Status event */
  713. #define MPI_EVENT_SAS_PLS_LR_CURRENT_MASK (0xF0)
  714. #define MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT (4)
  715. #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_MASK (0x0F)
  716. #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_SHIFT (0)
  717. #define MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN (0x00)
  718. #define MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED (0x01)
  719. #define MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION (0x02)
  720. #define MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE (0x03)
  721. #define MPI_EVENT_SAS_PLS_LR_RATE_1_5 (0x08)
  722. #define MPI_EVENT_SAS_PLS_LR_RATE_3_0 (0x09)
  723. /* SAS Discovery Event data */
  724. typedef struct _EVENT_DATA_SAS_DISCOVERY
  725. {
  726. U32 DiscoveryStatus; /* 00h */
  727. U32 Reserved1; /* 04h */
  728. } EVENT_DATA_SAS_DISCOVERY, MPI_POINTER PTR_EVENT_DATA_SAS_DISCOVERY,
  729. EventDataSasDiscovery_t, MPI_POINTER pEventDataSasDiscovery_t;
  730. #define MPI_EVENT_SAS_DSCVRY_COMPLETE (0x00000000)
  731. #define MPI_EVENT_SAS_DSCVRY_IN_PROGRESS (0x00000001)
  732. #define MPI_EVENT_SAS_DSCVRY_PHY_BITS_MASK (0xFFFF0000)
  733. #define MPI_EVENT_SAS_DSCVRY_PHY_BITS_SHIFT (16)
  734. /* SAS Discovery Errror Event data */
  735. typedef struct _EVENT_DATA_DISCOVERY_ERROR
  736. {
  737. U32 DiscoveryStatus; /* 00h */
  738. U8 Port; /* 04h */
  739. U8 Reserved1; /* 05h */
  740. U16 Reserved2; /* 06h */
  741. } EVENT_DATA_DISCOVERY_ERROR, MPI_POINTER PTR_EVENT_DATA_DISCOVERY_ERROR,
  742. EventDataDiscoveryError_t, MPI_POINTER pEventDataDiscoveryError_t;
  743. #define MPI_EVENT_DSCVRY_ERR_DS_LOOP_DETECTED (0x00000001)
  744. #define MPI_EVENT_DSCVRY_ERR_DS_UNADDRESSABLE_DEVICE (0x00000002)
  745. #define MPI_EVENT_DSCVRY_ERR_DS_MULTIPLE_PORTS (0x00000004)
  746. #define MPI_EVENT_DSCVRY_ERR_DS_EXPANDER_ERR (0x00000008)
  747. #define MPI_EVENT_DSCVRY_ERR_DS_SMP_TIMEOUT (0x00000010)
  748. #define MPI_EVENT_DSCVRY_ERR_DS_OUT_ROUTE_ENTRIES (0x00000020)
  749. #define MPI_EVENT_DSCVRY_ERR_DS_INDEX_NOT_EXIST (0x00000040)
  750. #define MPI_EVENT_DSCVRY_ERR_DS_SMP_FUNCTION_FAILED (0x00000080)
  751. #define MPI_EVENT_DSCVRY_ERR_DS_SMP_CRC_ERROR (0x00000100)
  752. #define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_SUBTRACTIVE (0x00000200)
  753. #define MPI_EVENT_DSCVRY_ERR_DS_TABLE_TO_TABLE (0x00000400)
  754. #define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_PATHS (0x00000800)
  755. #define MPI_EVENT_DSCVRY_ERR_DS_MAX_SATA_TARGETS (0x00001000)
  756. /* SAS SMP Error Event data */
  757. typedef struct _EVENT_DATA_SAS_SMP_ERROR
  758. {
  759. U8 Status; /* 00h */
  760. U8 Port; /* 01h */
  761. U8 SMPFunctionResult; /* 02h */
  762. U8 Reserved1; /* 03h */
  763. U64 SASAddress; /* 04h */
  764. } EVENT_DATA_SAS_SMP_ERROR, MPI_POINTER PTR_EVENT_DATA_SAS_SMP_ERROR,
  765. MpiEventDataSasSmpError_t, MPI_POINTER pMpiEventDataSasSmpError_t;
  766. /* defines for the Status field of the SAS SMP Error event */
  767. #define MPI_EVENT_SAS_SMP_FUNCTION_RESULT_VALID (0x00)
  768. #define MPI_EVENT_SAS_SMP_CRC_ERROR (0x01)
  769. #define MPI_EVENT_SAS_SMP_TIMEOUT (0x02)
  770. #define MPI_EVENT_SAS_SMP_NO_DESTINATION (0x03)
  771. #define MPI_EVENT_SAS_SMP_BAD_DESTINATION (0x04)
  772. /* SAS Initiator Device Status Change Event data */
  773. typedef struct _EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE
  774. {
  775. U8 ReasonCode; /* 00h */
  776. U8 Port; /* 01h */
  777. U16 DevHandle; /* 02h */
  778. U64 SASAddress; /* 04h */
  779. } EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
  780. MPI_POINTER PTR_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
  781. MpiEventDataSasInitDevStatusChange_t,
  782. MPI_POINTER pMpiEventDataSasInitDevStatusChange_t;
  783. /* defines for the ReasonCode field of the SAS Initiator Device Status Change event */
  784. #define MPI_EVENT_SAS_INIT_RC_ADDED (0x01)
  785. /* SAS Initiator Device Table Overflow Event data */
  786. typedef struct _EVENT_DATA_SAS_INIT_TABLE_OVERFLOW
  787. {
  788. U8 MaxInit; /* 00h */
  789. U8 CurrentInit; /* 01h */
  790. U16 Reserved1; /* 02h */
  791. } EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
  792. MPI_POINTER PTR_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
  793. MpiEventDataSasInitTableOverflow_t,
  794. MPI_POINTER pMpiEventDataSasInitTableOverflow_t;
  795. /* SAS Expander Status Change Event data */
  796. typedef struct _EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE
  797. {
  798. U8 ReasonCode; /* 00h */
  799. U8 Reserved1; /* 01h */
  800. U16 Reserved2; /* 02h */
  801. U8 PhysicalPort; /* 04h */
  802. U8 Reserved3; /* 05h */
  803. U16 EnclosureHandle; /* 06h */
  804. U64 SASAddress; /* 08h */
  805. U32 DiscoveryStatus; /* 10h */
  806. U16 DevHandle; /* 14h */
  807. U16 ParentDevHandle; /* 16h */
  808. U16 ExpanderChangeCount; /* 18h */
  809. U16 ExpanderRouteIndexes; /* 1Ah */
  810. U8 NumPhys; /* 1Ch */
  811. U8 SASLevel; /* 1Dh */
  812. U8 Flags; /* 1Eh */
  813. U8 Reserved4; /* 1Fh */
  814. } EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE,
  815. MPI_POINTER PTR_EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE,
  816. MpiEventDataSasExpanderStatusChange_t,
  817. MPI_POINTER pMpiEventDataSasExpanderStatusChange_t;
  818. /* values for ReasonCode field of SAS Expander Status Change Event data */
  819. #define MPI_EVENT_SAS_EXP_RC_ADDED (0x00)
  820. #define MPI_EVENT_SAS_EXP_RC_NOT_RESPONDING (0x01)
  821. /* values for DiscoveryStatus field of SAS Expander Status Change Event data */
  822. #define MPI_EVENT_SAS_EXP_DS_LOOP_DETECTED (0x00000001)
  823. #define MPI_EVENT_SAS_EXP_DS_UNADDRESSABLE_DEVICE (0x00000002)
  824. #define MPI_EVENT_SAS_EXP_DS_MULTIPLE_PORTS (0x00000004)
  825. #define MPI_EVENT_SAS_EXP_DS_EXPANDER_ERR (0x00000008)
  826. #define MPI_EVENT_SAS_EXP_DS_SMP_TIMEOUT (0x00000010)
  827. #define MPI_EVENT_SAS_EXP_DS_OUT_ROUTE_ENTRIES (0x00000020)
  828. #define MPI_EVENT_SAS_EXP_DS_INDEX_NOT_EXIST (0x00000040)
  829. #define MPI_EVENT_SAS_EXP_DS_SMP_FUNCTION_FAILED (0x00000080)
  830. #define MPI_EVENT_SAS_EXP_DS_SMP_CRC_ERROR (0x00000100)
  831. #define MPI_EVENT_SAS_EXP_DS_SUBTRACTIVE_LINK (0x00000200)
  832. #define MPI_EVENT_SAS_EXP_DS_TABLE_LINK (0x00000400)
  833. #define MPI_EVENT_SAS_EXP_DS_UNSUPPORTED_DEVICE (0x00000800)
  834. /* values for Flags field of SAS Expander Status Change Event data */
  835. #define MPI_EVENT_SAS_EXP_FLAGS_ROUTE_TABLE_CONFIG (0x02)
  836. #define MPI_EVENT_SAS_EXP_FLAGS_CONFIG_IN_PROGRESS (0x01)
  837. /*****************************************************************************
  838. *
  839. * F i r m w a r e L o a d M e s s a g e s
  840. *
  841. *****************************************************************************/
  842. /****************************************************************************/
  843. /* Firmware Download message and associated structures */
  844. /****************************************************************************/
  845. typedef struct _MSG_FW_DOWNLOAD
  846. {
  847. U8 ImageType; /* 00h */
  848. U8 Reserved; /* 01h */
  849. U8 ChainOffset; /* 02h */
  850. U8 Function; /* 03h */
  851. U8 Reserved1[3]; /* 04h */
  852. U8 MsgFlags; /* 07h */
  853. U32 MsgContext; /* 08h */
  854. SGE_MPI_UNION SGL; /* 0Ch */
  855. } MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD,
  856. FWDownload_t, MPI_POINTER pFWDownload_t;
  857. #define MPI_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT (0x01)
  858. #define MPI_FW_DOWNLOAD_ITYPE_RESERVED (0x00)
  859. #define MPI_FW_DOWNLOAD_ITYPE_FW (0x01)
  860. #define MPI_FW_DOWNLOAD_ITYPE_BIOS (0x02)
  861. #define MPI_FW_DOWNLOAD_ITYPE_NVDATA (0x03)
  862. #define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER (0x04)
  863. #define MPI_FW_DOWNLOAD_ITYPE_MANUFACTURING (0x06)
  864. #define MPI_FW_DOWNLOAD_ITYPE_CONFIG_1 (0x07)
  865. #define MPI_FW_DOWNLOAD_ITYPE_CONFIG_2 (0x08)
  866. #define MPI_FW_DOWNLOAD_ITYPE_MEGARAID (0x09)
  867. typedef struct _FWDownloadTCSGE
  868. {
  869. U8 Reserved; /* 00h */
  870. U8 ContextSize; /* 01h */
  871. U8 DetailsLength; /* 02h */
  872. U8 Flags; /* 03h */
  873. U32 Reserved_0100_Checksum; /* 04h */ /* obsolete Checksum */
  874. U32 ImageOffset; /* 08h */
  875. U32 ImageSize; /* 0Ch */
  876. } FW_DOWNLOAD_TCSGE, MPI_POINTER PTR_FW_DOWNLOAD_TCSGE,
  877. FWDownloadTCSGE_t, MPI_POINTER pFWDownloadTCSGE_t;
  878. /* Firmware Download reply */
  879. typedef struct _MSG_FW_DOWNLOAD_REPLY
  880. {
  881. U8 ImageType; /* 00h */
  882. U8 Reserved; /* 01h */
  883. U8 MsgLength; /* 02h */
  884. U8 Function; /* 03h */
  885. U8 Reserved1[3]; /* 04h */
  886. U8 MsgFlags; /* 07h */
  887. U32 MsgContext; /* 08h */
  888. U16 Reserved2; /* 0Ch */
  889. U16 IOCStatus; /* 0Eh */
  890. U32 IOCLogInfo; /* 10h */
  891. } MSG_FW_DOWNLOAD_REPLY, MPI_POINTER PTR_MSG_FW_DOWNLOAD_REPLY,
  892. FWDownloadReply_t, MPI_POINTER pFWDownloadReply_t;
  893. /****************************************************************************/
  894. /* Firmware Upload message and associated structures */
  895. /****************************************************************************/
  896. typedef struct _MSG_FW_UPLOAD
  897. {
  898. U8 ImageType; /* 00h */
  899. U8 Reserved; /* 01h */
  900. U8 ChainOffset; /* 02h */
  901. U8 Function; /* 03h */
  902. U8 Reserved1[3]; /* 04h */
  903. U8 MsgFlags; /* 07h */
  904. U32 MsgContext; /* 08h */
  905. SGE_MPI_UNION SGL; /* 0Ch */
  906. } MSG_FW_UPLOAD, MPI_POINTER PTR_MSG_FW_UPLOAD,
  907. FWUpload_t, MPI_POINTER pFWUpload_t;
  908. #define MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM (0x00)
  909. #define MPI_FW_UPLOAD_ITYPE_FW_FLASH (0x01)
  910. #define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02)
  911. #define MPI_FW_UPLOAD_ITYPE_NVDATA (0x03)
  912. #define MPI_FW_UPLOAD_ITYPE_BOOTLOADER (0x04)
  913. #define MPI_FW_UPLOAD_ITYPE_FW_BACKUP (0x05)
  914. #define MPI_FW_UPLOAD_ITYPE_MANUFACTURING (0x06)
  915. #define MPI_FW_UPLOAD_ITYPE_CONFIG_1 (0x07)
  916. #define MPI_FW_UPLOAD_ITYPE_CONFIG_2 (0x08)
  917. #define MPI_FW_UPLOAD_ITYPE_MEGARAID (0x09)
  918. #define MPI_FW_UPLOAD_ITYPE_COMPLETE (0x0A)
  919. typedef struct _FWUploadTCSGE
  920. {
  921. U8 Reserved; /* 00h */
  922. U8 ContextSize; /* 01h */
  923. U8 DetailsLength; /* 02h */
  924. U8 Flags; /* 03h */
  925. U32 Reserved1; /* 04h */
  926. U32 ImageOffset; /* 08h */
  927. U32 ImageSize; /* 0Ch */
  928. } FW_UPLOAD_TCSGE, MPI_POINTER PTR_FW_UPLOAD_TCSGE,
  929. FWUploadTCSGE_t, MPI_POINTER pFWUploadTCSGE_t;
  930. /* Firmware Upload reply */
  931. typedef struct _MSG_FW_UPLOAD_REPLY
  932. {
  933. U8 ImageType; /* 00h */
  934. U8 Reserved; /* 01h */
  935. U8 MsgLength; /* 02h */
  936. U8 Function; /* 03h */
  937. U8 Reserved1[3]; /* 04h */
  938. U8 MsgFlags; /* 07h */
  939. U32 MsgContext; /* 08h */
  940. U16 Reserved2; /* 0Ch */
  941. U16 IOCStatus; /* 0Eh */
  942. U32 IOCLogInfo; /* 10h */
  943. U32 ActualImageSize; /* 14h */
  944. } MSG_FW_UPLOAD_REPLY, MPI_POINTER PTR_MSG_FW_UPLOAD_REPLY,
  945. FWUploadReply_t, MPI_POINTER pFWUploadReply_t;
  946. typedef struct _MPI_FW_HEADER
  947. {
  948. U32 ArmBranchInstruction0; /* 00h */
  949. U32 Signature0; /* 04h */
  950. U32 Signature1; /* 08h */
  951. U32 Signature2; /* 0Ch */
  952. U32 ArmBranchInstruction1; /* 10h */
  953. U32 ArmBranchInstruction2; /* 14h */
  954. U32 Reserved; /* 18h */
  955. U32 Checksum; /* 1Ch */
  956. U16 VendorId; /* 20h */
  957. U16 ProductId; /* 22h */
  958. MPI_FW_VERSION FWVersion; /* 24h */
  959. U32 SeqCodeVersion; /* 28h */
  960. U32 ImageSize; /* 2Ch */
  961. U32 NextImageHeaderOffset; /* 30h */
  962. U32 LoadStartAddress; /* 34h */
  963. U32 IopResetVectorValue; /* 38h */
  964. U32 IopResetRegAddr; /* 3Ch */
  965. U32 VersionNameWhat; /* 40h */
  966. U8 VersionName[32]; /* 44h */
  967. U32 VendorNameWhat; /* 64h */
  968. U8 VendorName[32]; /* 68h */
  969. } MPI_FW_HEADER, MPI_POINTER PTR_MPI_FW_HEADER,
  970. MpiFwHeader_t, MPI_POINTER pMpiFwHeader_t;
  971. #define MPI_FW_HEADER_WHAT_SIGNATURE (0x29232840)
  972. /* defines for using the ProductId field */
  973. #define MPI_FW_HEADER_PID_TYPE_MASK (0xF000)
  974. #define MPI_FW_HEADER_PID_TYPE_SCSI (0x0000)
  975. #define MPI_FW_HEADER_PID_TYPE_FC (0x1000)
  976. #define MPI_FW_HEADER_PID_TYPE_SAS (0x2000)
  977. #define MPI_FW_HEADER_SIGNATURE_0 (0x5AEAA55A)
  978. #define MPI_FW_HEADER_SIGNATURE_1 (0xA55AEAA5)
  979. #define MPI_FW_HEADER_SIGNATURE_2 (0x5AA55AEA)
  980. #define MPI_FW_HEADER_PID_PROD_MASK (0x0F00)
  981. #define MPI_FW_HEADER_PID_PROD_INITIATOR_SCSI (0x0100)
  982. #define MPI_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI (0x0200)
  983. #define MPI_FW_HEADER_PID_PROD_TARGET_SCSI (0x0300)
  984. #define MPI_FW_HEADER_PID_PROD_IM_SCSI (0x0400)
  985. #define MPI_FW_HEADER_PID_PROD_IS_SCSI (0x0500)
  986. #define MPI_FW_HEADER_PID_PROD_CTX_SCSI (0x0600)
  987. #define MPI_FW_HEADER_PID_PROD_IR_SCSI (0x0700)
  988. #define MPI_FW_HEADER_PID_FAMILY_MASK (0x00FF)
  989. /* SCSI */
  990. #define MPI_FW_HEADER_PID_FAMILY_1030A0_SCSI (0x0001)
  991. #define MPI_FW_HEADER_PID_FAMILY_1030B0_SCSI (0x0002)
  992. #define MPI_FW_HEADER_PID_FAMILY_1030B1_SCSI (0x0003)
  993. #define MPI_FW_HEADER_PID_FAMILY_1030C0_SCSI (0x0004)
  994. #define MPI_FW_HEADER_PID_FAMILY_1020A0_SCSI (0x0005)
  995. #define MPI_FW_HEADER_PID_FAMILY_1020B0_SCSI (0x0006)
  996. #define MPI_FW_HEADER_PID_FAMILY_1020B1_SCSI (0x0007)
  997. #define MPI_FW_HEADER_PID_FAMILY_1020C0_SCSI (0x0008)
  998. #define MPI_FW_HEADER_PID_FAMILY_1035A0_SCSI (0x0009)
  999. #define MPI_FW_HEADER_PID_FAMILY_1035B0_SCSI (0x000A)
  1000. #define MPI_FW_HEADER_PID_FAMILY_1030TA0_SCSI (0x000B)
  1001. #define MPI_FW_HEADER_PID_FAMILY_1020TA0_SCSI (0x000C)
  1002. /* Fibre Channel */
  1003. #define MPI_FW_HEADER_PID_FAMILY_909_FC (0x0000)
  1004. #define MPI_FW_HEADER_PID_FAMILY_919_FC (0x0001) /* 919 and 929 */
  1005. #define MPI_FW_HEADER_PID_FAMILY_919X_FC (0x0002) /* 919X and 929X */
  1006. #define MPI_FW_HEADER_PID_FAMILY_919XL_FC (0x0003) /* 919XL and 929XL */
  1007. #define MPI_FW_HEADER_PID_FAMILY_939X_FC (0x0004) /* 939X and 949X */
  1008. #define MPI_FW_HEADER_PID_FAMILY_959_FC (0x0005)
  1009. #define MPI_FW_HEADER_PID_FAMILY_949E_FC (0x0006)
  1010. /* SAS */
  1011. #define MPI_FW_HEADER_PID_FAMILY_1064_SAS (0x0001)
  1012. #define MPI_FW_HEADER_PID_FAMILY_1068_SAS (0x0002)
  1013. #define MPI_FW_HEADER_PID_FAMILY_1078_SAS (0x0003)
  1014. #define MPI_FW_HEADER_PID_FAMILY_106xE_SAS (0x0004) /* 1068E, 1066E, and 1064E */
  1015. typedef struct _MPI_EXT_IMAGE_HEADER
  1016. {
  1017. U8 ImageType; /* 00h */
  1018. U8 Reserved; /* 01h */
  1019. U16 Reserved1; /* 02h */
  1020. U32 Checksum; /* 04h */
  1021. U32 ImageSize; /* 08h */
  1022. U32 NextImageHeaderOffset; /* 0Ch */
  1023. U32 LoadStartAddress; /* 10h */
  1024. U32 Reserved2; /* 14h */
  1025. } MPI_EXT_IMAGE_HEADER, MPI_POINTER PTR_MPI_EXT_IMAGE_HEADER,
  1026. MpiExtImageHeader_t, MPI_POINTER pMpiExtImageHeader_t;
  1027. /* defines for the ImageType field */
  1028. #define MPI_EXT_IMAGE_TYPE_UNSPECIFIED (0x00)
  1029. #define MPI_EXT_IMAGE_TYPE_FW (0x01)
  1030. #define MPI_EXT_IMAGE_TYPE_NVDATA (0x03)
  1031. #define MPI_EXT_IMAGE_TYPE_BOOTLOADER (0x04)
  1032. #define MPI_EXT_IMAGE_TYPE_INITIALIZATION (0x05)
  1033. #endif