omap_hwmod.c 69 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. * Copyright (C) 2011 Texas Instruments, Inc.
  6. *
  7. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  8. *
  9. * Created in collaboration with (alphabetical order): Thara Gopinath,
  10. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  11. * Sawant, Santosh Shilimkar, Richard Woodruff
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Introduction
  18. * ------------
  19. * One way to view an OMAP SoC is as a collection of largely unrelated
  20. * IP blocks connected by interconnects. The IP blocks include
  21. * devices such as ARM processors, audio serial interfaces, UARTs,
  22. * etc. Some of these devices, like the DSP, are created by TI;
  23. * others, like the SGX, largely originate from external vendors. In
  24. * TI's documentation, on-chip devices are referred to as "OMAP
  25. * modules." Some of these IP blocks are identical across several
  26. * OMAP versions. Others are revised frequently.
  27. *
  28. * These OMAP modules are tied together by various interconnects.
  29. * Most of the address and data flow between modules is via OCP-based
  30. * interconnects such as the L3 and L4 buses; but there are other
  31. * interconnects that distribute the hardware clock tree, handle idle
  32. * and reset signaling, supply power, and connect the modules to
  33. * various pads or balls on the OMAP package.
  34. *
  35. * OMAP hwmod provides a consistent way to describe the on-chip
  36. * hardware blocks and their integration into the rest of the chip.
  37. * This description can be automatically generated from the TI
  38. * hardware database. OMAP hwmod provides a standard, consistent API
  39. * to reset, enable, idle, and disable these hardware blocks. And
  40. * hwmod provides a way for other core code, such as the Linux device
  41. * code or the OMAP power management and address space mapping code,
  42. * to query the hardware database.
  43. *
  44. * Using hwmod
  45. * -----------
  46. * Drivers won't call hwmod functions directly. That is done by the
  47. * omap_device code, and in rare occasions, by custom integration code
  48. * in arch/arm/ *omap*. The omap_device code includes functions to
  49. * build a struct platform_device using omap_hwmod data, and that is
  50. * currently how hwmod data is communicated to drivers and to the
  51. * Linux driver model. Most drivers will call omap_hwmod functions only
  52. * indirectly, via pm_runtime*() functions.
  53. *
  54. * From a layering perspective, here is where the OMAP hwmod code
  55. * fits into the kernel software stack:
  56. *
  57. * +-------------------------------+
  58. * | Device driver code |
  59. * | (e.g., drivers/) |
  60. * +-------------------------------+
  61. * | Linux driver model |
  62. * | (platform_device / |
  63. * | platform_driver data/code) |
  64. * +-------------------------------+
  65. * | OMAP core-driver integration |
  66. * |(arch/arm/mach-omap2/devices.c)|
  67. * +-------------------------------+
  68. * | omap_device code |
  69. * | (../plat-omap/omap_device.c) |
  70. * +-------------------------------+
  71. * ----> | omap_hwmod code/data | <-----
  72. * | (../mach-omap2/omap_hwmod*) |
  73. * +-------------------------------+
  74. * | OMAP clock/PRCM/register fns |
  75. * | (__raw_{read,write}l, clk*) |
  76. * +-------------------------------+
  77. *
  78. * Device drivers should not contain any OMAP-specific code or data in
  79. * them. They should only contain code to operate the IP block that
  80. * the driver is responsible for. This is because these IP blocks can
  81. * also appear in other SoCs, either from TI (such as DaVinci) or from
  82. * other manufacturers; and drivers should be reusable across other
  83. * platforms.
  84. *
  85. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  86. * devices upon boot. The goal here is for the kernel to be
  87. * completely self-reliant and independent from bootloaders. This is
  88. * to ensure a repeatable configuration, both to ensure consistent
  89. * runtime behavior, and to make it easier for others to reproduce
  90. * bugs.
  91. *
  92. * OMAP module activity states
  93. * ---------------------------
  94. * The hwmod code considers modules to be in one of several activity
  95. * states. IP blocks start out in an UNKNOWN state, then once they
  96. * are registered via the hwmod code, proceed to the REGISTERED state.
  97. * Once their clock names are resolved to clock pointers, the module
  98. * enters the CLKS_INITED state; and finally, once the module has been
  99. * reset and the integration registers programmed, the INITIALIZED state
  100. * is entered. The hwmod code will then place the module into either
  101. * the IDLE state to save power, or in the case of a critical system
  102. * module, the ENABLED state.
  103. *
  104. * OMAP core integration code can then call omap_hwmod*() functions
  105. * directly to move the module between the IDLE, ENABLED, and DISABLED
  106. * states, as needed. This is done during both the PM idle loop, and
  107. * in the OMAP core integration code's implementation of the PM runtime
  108. * functions.
  109. *
  110. * References
  111. * ----------
  112. * This is a partial list.
  113. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  114. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  115. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  116. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  117. * - Open Core Protocol Specification 2.2
  118. *
  119. * To do:
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <linux/spinlock.h>
  138. #include <plat/common.h>
  139. #include <plat/cpu.h>
  140. #include "clockdomain.h"
  141. #include "powerdomain.h"
  142. #include <plat/clock.h>
  143. #include <plat/omap_hwmod.h>
  144. #include <plat/prcm.h>
  145. #include "cm2xxx_3xxx.h"
  146. #include "cminst44xx.h"
  147. #include "prm2xxx_3xxx.h"
  148. #include "prm44xx.h"
  149. #include "prminst44xx.h"
  150. #include "mux.h"
  151. /* Maximum microseconds to wait for OMAP module to softreset */
  152. #define MAX_MODULE_SOFTRESET_WAIT 10000
  153. /* Name of the OMAP hwmod for the MPU */
  154. #define MPU_INITIATOR_NAME "mpu"
  155. /* omap_hwmod_list contains all registered struct omap_hwmods */
  156. static LIST_HEAD(omap_hwmod_list);
  157. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  158. static struct omap_hwmod *mpu_oh;
  159. /* Private functions */
  160. /**
  161. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  162. * @oh: struct omap_hwmod *
  163. *
  164. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  165. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  166. * OCP_SYSCONFIG register or 0 upon success.
  167. */
  168. static int _update_sysc_cache(struct omap_hwmod *oh)
  169. {
  170. if (!oh->class->sysc) {
  171. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  172. return -EINVAL;
  173. }
  174. /* XXX ensure module interface clock is up */
  175. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  176. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  177. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  178. return 0;
  179. }
  180. /**
  181. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  182. * @v: OCP_SYSCONFIG value to write
  183. * @oh: struct omap_hwmod *
  184. *
  185. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  186. * one. No return value.
  187. */
  188. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  189. {
  190. if (!oh->class->sysc) {
  191. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  192. return;
  193. }
  194. /* XXX ensure module interface clock is up */
  195. /* Module might have lost context, always update cache and register */
  196. oh->_sysc_cache = v;
  197. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  198. }
  199. /**
  200. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  201. * @oh: struct omap_hwmod *
  202. * @standbymode: MIDLEMODE field bits
  203. * @v: pointer to register contents to modify
  204. *
  205. * Update the master standby mode bits in @v to be @standbymode for
  206. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  207. * upon error or 0 upon success.
  208. */
  209. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  210. u32 *v)
  211. {
  212. u32 mstandby_mask;
  213. u8 mstandby_shift;
  214. if (!oh->class->sysc ||
  215. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  216. return -EINVAL;
  217. if (!oh->class->sysc->sysc_fields) {
  218. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  219. return -EINVAL;
  220. }
  221. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  222. mstandby_mask = (0x3 << mstandby_shift);
  223. *v &= ~mstandby_mask;
  224. *v |= __ffs(standbymode) << mstandby_shift;
  225. return 0;
  226. }
  227. /**
  228. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  229. * @oh: struct omap_hwmod *
  230. * @idlemode: SIDLEMODE field bits
  231. * @v: pointer to register contents to modify
  232. *
  233. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  234. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  235. * or 0 upon success.
  236. */
  237. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  238. {
  239. u32 sidle_mask;
  240. u8 sidle_shift;
  241. if (!oh->class->sysc ||
  242. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  243. return -EINVAL;
  244. if (!oh->class->sysc->sysc_fields) {
  245. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  246. return -EINVAL;
  247. }
  248. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  249. sidle_mask = (0x3 << sidle_shift);
  250. *v &= ~sidle_mask;
  251. *v |= __ffs(idlemode) << sidle_shift;
  252. return 0;
  253. }
  254. /**
  255. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  256. * @oh: struct omap_hwmod *
  257. * @clockact: CLOCKACTIVITY field bits
  258. * @v: pointer to register contents to modify
  259. *
  260. * Update the clockactivity mode bits in @v to be @clockact for the
  261. * @oh hwmod. Used for additional powersaving on some modules. Does
  262. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  263. * success.
  264. */
  265. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  266. {
  267. u32 clkact_mask;
  268. u8 clkact_shift;
  269. if (!oh->class->sysc ||
  270. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  271. return -EINVAL;
  272. if (!oh->class->sysc->sysc_fields) {
  273. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  274. return -EINVAL;
  275. }
  276. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  277. clkact_mask = (0x3 << clkact_shift);
  278. *v &= ~clkact_mask;
  279. *v |= clockact << clkact_shift;
  280. return 0;
  281. }
  282. /**
  283. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  284. * @oh: struct omap_hwmod *
  285. * @v: pointer to register contents to modify
  286. *
  287. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  288. * error or 0 upon success.
  289. */
  290. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  291. {
  292. u32 softrst_mask;
  293. if (!oh->class->sysc ||
  294. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  295. return -EINVAL;
  296. if (!oh->class->sysc->sysc_fields) {
  297. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  298. return -EINVAL;
  299. }
  300. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  301. *v |= softrst_mask;
  302. return 0;
  303. }
  304. /**
  305. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  306. * @oh: struct omap_hwmod *
  307. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  308. * @v: pointer to register contents to modify
  309. *
  310. * Update the module autoidle bit in @v to be @autoidle for the @oh
  311. * hwmod. The autoidle bit controls whether the module can gate
  312. * internal clocks automatically when it isn't doing anything; the
  313. * exact function of this bit varies on a per-module basis. This
  314. * function does not write to the hardware. Returns -EINVAL upon
  315. * error or 0 upon success.
  316. */
  317. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  318. u32 *v)
  319. {
  320. u32 autoidle_mask;
  321. u8 autoidle_shift;
  322. if (!oh->class->sysc ||
  323. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  324. return -EINVAL;
  325. if (!oh->class->sysc->sysc_fields) {
  326. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  327. return -EINVAL;
  328. }
  329. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  330. autoidle_mask = (0x1 << autoidle_shift);
  331. *v &= ~autoidle_mask;
  332. *v |= autoidle << autoidle_shift;
  333. return 0;
  334. }
  335. /**
  336. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  337. * @oh: struct omap_hwmod *
  338. *
  339. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  340. * upon error or 0 upon success.
  341. */
  342. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  343. {
  344. if (!oh->class->sysc ||
  345. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  346. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  347. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  348. return -EINVAL;
  349. if (!oh->class->sysc->sysc_fields) {
  350. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  351. return -EINVAL;
  352. }
  353. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  354. *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
  355. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  356. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  357. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  358. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  359. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  360. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  361. return 0;
  362. }
  363. /**
  364. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  365. * @oh: struct omap_hwmod *
  366. *
  367. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  368. * upon error or 0 upon success.
  369. */
  370. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  371. {
  372. if (!oh->class->sysc ||
  373. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  374. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  375. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  376. return -EINVAL;
  377. if (!oh->class->sysc->sysc_fields) {
  378. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  379. return -EINVAL;
  380. }
  381. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  382. *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  383. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  384. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  385. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  386. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  387. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  388. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  389. return 0;
  390. }
  391. /**
  392. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  393. * @oh: struct omap_hwmod *
  394. *
  395. * Prevent the hardware module @oh from entering idle while the
  396. * hardare module initiator @init_oh is active. Useful when a module
  397. * will be accessed by a particular initiator (e.g., if a module will
  398. * be accessed by the IVA, there should be a sleepdep between the IVA
  399. * initiator and the module). Only applies to modules in smart-idle
  400. * mode. If the clockdomain is marked as not needing autodeps, return
  401. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  402. * passes along clkdm_add_sleepdep() value upon success.
  403. */
  404. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  405. {
  406. if (!oh->_clk)
  407. return -EINVAL;
  408. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  409. return 0;
  410. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  411. }
  412. /**
  413. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  414. * @oh: struct omap_hwmod *
  415. *
  416. * Allow the hardware module @oh to enter idle while the hardare
  417. * module initiator @init_oh is active. Useful when a module will not
  418. * be accessed by a particular initiator (e.g., if a module will not
  419. * be accessed by the IVA, there should be no sleepdep between the IVA
  420. * initiator and the module). Only applies to modules in smart-idle
  421. * mode. If the clockdomain is marked as not needing autodeps, return
  422. * 0 without doing anything. Returns -EINVAL upon error or passes
  423. * along clkdm_del_sleepdep() value upon success.
  424. */
  425. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  426. {
  427. if (!oh->_clk)
  428. return -EINVAL;
  429. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  430. return 0;
  431. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  432. }
  433. /**
  434. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  435. * @oh: struct omap_hwmod *
  436. *
  437. * Called from _init_clocks(). Populates the @oh _clk (main
  438. * functional clock pointer) if a main_clk is present. Returns 0 on
  439. * success or -EINVAL on error.
  440. */
  441. static int _init_main_clk(struct omap_hwmod *oh)
  442. {
  443. int ret = 0;
  444. if (!oh->main_clk)
  445. return 0;
  446. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  447. if (!oh->_clk) {
  448. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  449. oh->name, oh->main_clk);
  450. return -EINVAL;
  451. }
  452. if (!oh->_clk->clkdm)
  453. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  454. oh->main_clk, oh->_clk->name);
  455. return ret;
  456. }
  457. /**
  458. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  459. * @oh: struct omap_hwmod *
  460. *
  461. * Called from _init_clocks(). Populates the @oh OCP slave interface
  462. * clock pointers. Returns 0 on success or -EINVAL on error.
  463. */
  464. static int _init_interface_clks(struct omap_hwmod *oh)
  465. {
  466. struct clk *c;
  467. int i;
  468. int ret = 0;
  469. if (oh->slaves_cnt == 0)
  470. return 0;
  471. for (i = 0; i < oh->slaves_cnt; i++) {
  472. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  473. if (!os->clk)
  474. continue;
  475. c = omap_clk_get_by_name(os->clk);
  476. if (!c) {
  477. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  478. oh->name, os->clk);
  479. ret = -EINVAL;
  480. }
  481. os->_clk = c;
  482. }
  483. return ret;
  484. }
  485. /**
  486. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  487. * @oh: struct omap_hwmod *
  488. *
  489. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  490. * clock pointers. Returns 0 on success or -EINVAL on error.
  491. */
  492. static int _init_opt_clks(struct omap_hwmod *oh)
  493. {
  494. struct omap_hwmod_opt_clk *oc;
  495. struct clk *c;
  496. int i;
  497. int ret = 0;
  498. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  499. c = omap_clk_get_by_name(oc->clk);
  500. if (!c) {
  501. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  502. oh->name, oc->clk);
  503. ret = -EINVAL;
  504. }
  505. oc->_clk = c;
  506. }
  507. return ret;
  508. }
  509. /**
  510. * _enable_clocks - enable hwmod main clock and interface clocks
  511. * @oh: struct omap_hwmod *
  512. *
  513. * Enables all clocks necessary for register reads and writes to succeed
  514. * on the hwmod @oh. Returns 0.
  515. */
  516. static int _enable_clocks(struct omap_hwmod *oh)
  517. {
  518. int i;
  519. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  520. if (oh->_clk)
  521. clk_enable(oh->_clk);
  522. if (oh->slaves_cnt > 0) {
  523. for (i = 0; i < oh->slaves_cnt; i++) {
  524. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  525. struct clk *c = os->_clk;
  526. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  527. clk_enable(c);
  528. }
  529. }
  530. /* The opt clocks are controlled by the device driver. */
  531. return 0;
  532. }
  533. /**
  534. * _disable_clocks - disable hwmod main clock and interface clocks
  535. * @oh: struct omap_hwmod *
  536. *
  537. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  538. */
  539. static int _disable_clocks(struct omap_hwmod *oh)
  540. {
  541. int i;
  542. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  543. if (oh->_clk)
  544. clk_disable(oh->_clk);
  545. if (oh->slaves_cnt > 0) {
  546. for (i = 0; i < oh->slaves_cnt; i++) {
  547. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  548. struct clk *c = os->_clk;
  549. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  550. clk_disable(c);
  551. }
  552. }
  553. /* The opt clocks are controlled by the device driver. */
  554. return 0;
  555. }
  556. static void _enable_optional_clocks(struct omap_hwmod *oh)
  557. {
  558. struct omap_hwmod_opt_clk *oc;
  559. int i;
  560. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  561. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  562. if (oc->_clk) {
  563. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  564. oc->_clk->name);
  565. clk_enable(oc->_clk);
  566. }
  567. }
  568. static void _disable_optional_clocks(struct omap_hwmod *oh)
  569. {
  570. struct omap_hwmod_opt_clk *oc;
  571. int i;
  572. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  573. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  574. if (oc->_clk) {
  575. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  576. oc->_clk->name);
  577. clk_disable(oc->_clk);
  578. }
  579. }
  580. /**
  581. * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
  582. * @oh: struct omap_hwmod *oh
  583. *
  584. * Count and return the number of MPU IRQs associated with the hwmod
  585. * @oh. Used to allocate struct resource data. Returns 0 if @oh is
  586. * NULL.
  587. */
  588. static int _count_mpu_irqs(struct omap_hwmod *oh)
  589. {
  590. struct omap_hwmod_irq_info *ohii;
  591. int i = 0;
  592. if (!oh || !oh->mpu_irqs)
  593. return 0;
  594. do {
  595. ohii = &oh->mpu_irqs[i++];
  596. } while (ohii->irq != -1);
  597. return i;
  598. }
  599. /**
  600. * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
  601. * @oh: struct omap_hwmod *oh
  602. *
  603. * Count and return the number of SDMA request lines associated with
  604. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  605. * if @oh is NULL.
  606. */
  607. static int _count_sdma_reqs(struct omap_hwmod *oh)
  608. {
  609. struct omap_hwmod_dma_info *ohdi;
  610. int i = 0;
  611. if (!oh || !oh->sdma_reqs)
  612. return 0;
  613. do {
  614. ohdi = &oh->sdma_reqs[i++];
  615. } while (ohdi->dma_req != -1);
  616. return i;
  617. }
  618. /**
  619. * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
  620. * @oh: struct omap_hwmod *oh
  621. *
  622. * Count and return the number of address space ranges associated with
  623. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  624. * if @oh is NULL.
  625. */
  626. static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
  627. {
  628. struct omap_hwmod_addr_space *mem;
  629. int i = 0;
  630. if (!os || !os->addr)
  631. return 0;
  632. do {
  633. mem = &os->addr[i++];
  634. } while (mem->pa_start != mem->pa_end);
  635. return i;
  636. }
  637. /**
  638. * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
  639. * @oh: struct omap_hwmod *
  640. *
  641. * Returns the array index of the OCP slave port that the MPU
  642. * addresses the device on, or -EINVAL upon error or not found.
  643. */
  644. static int __init _find_mpu_port_index(struct omap_hwmod *oh)
  645. {
  646. int i;
  647. int found = 0;
  648. if (!oh || oh->slaves_cnt == 0)
  649. return -EINVAL;
  650. for (i = 0; i < oh->slaves_cnt; i++) {
  651. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  652. if (os->user & OCP_USER_MPU) {
  653. found = 1;
  654. break;
  655. }
  656. }
  657. if (found)
  658. pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
  659. oh->name, i);
  660. else
  661. pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
  662. oh->name);
  663. return (found) ? i : -EINVAL;
  664. }
  665. /**
  666. * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
  667. * @oh: struct omap_hwmod *
  668. *
  669. * Return the virtual address of the base of the register target of
  670. * device @oh, or NULL on error.
  671. */
  672. static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
  673. {
  674. struct omap_hwmod_ocp_if *os;
  675. struct omap_hwmod_addr_space *mem;
  676. int i = 0, found = 0;
  677. void __iomem *va_start;
  678. if (!oh || oh->slaves_cnt == 0)
  679. return NULL;
  680. os = oh->slaves[index];
  681. if (!os->addr)
  682. return NULL;
  683. do {
  684. mem = &os->addr[i++];
  685. if (mem->flags & ADDR_TYPE_RT)
  686. found = 1;
  687. } while (!found && mem->pa_start != mem->pa_end);
  688. if (found) {
  689. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  690. if (!va_start) {
  691. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  692. return NULL;
  693. }
  694. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  695. oh->name, va_start);
  696. } else {
  697. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  698. oh->name);
  699. }
  700. return (found) ? va_start : NULL;
  701. }
  702. /**
  703. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  704. * @oh: struct omap_hwmod *
  705. *
  706. * If module is marked as SWSUP_SIDLE, force the module out of slave
  707. * idle; otherwise, configure it for smart-idle. If module is marked
  708. * as SWSUP_MSUSPEND, force the module out of master standby;
  709. * otherwise, configure it for smart-standby. No return value.
  710. */
  711. static void _enable_sysc(struct omap_hwmod *oh)
  712. {
  713. u8 idlemode, sf;
  714. u32 v;
  715. if (!oh->class->sysc)
  716. return;
  717. v = oh->_sysc_cache;
  718. sf = oh->class->sysc->sysc_flags;
  719. if (sf & SYSC_HAS_SIDLEMODE) {
  720. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  721. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  722. _set_slave_idlemode(oh, idlemode, &v);
  723. }
  724. if (sf & SYSC_HAS_MIDLEMODE) {
  725. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  726. idlemode = HWMOD_IDLEMODE_NO;
  727. } else {
  728. if (sf & SYSC_HAS_ENAWAKEUP)
  729. _enable_wakeup(oh, &v);
  730. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  731. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  732. else
  733. idlemode = HWMOD_IDLEMODE_SMART;
  734. }
  735. _set_master_standbymode(oh, idlemode, &v);
  736. }
  737. /*
  738. * XXX The clock framework should handle this, by
  739. * calling into this code. But this must wait until the
  740. * clock structures are tagged with omap_hwmod entries
  741. */
  742. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  743. (sf & SYSC_HAS_CLOCKACTIVITY))
  744. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  745. /* If slave is in SMARTIDLE, also enable wakeup */
  746. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  747. _enable_wakeup(oh, &v);
  748. _write_sysconfig(v, oh);
  749. /*
  750. * Set the autoidle bit only after setting the smartidle bit
  751. * Setting this will not have any impact on the other modules.
  752. */
  753. if (sf & SYSC_HAS_AUTOIDLE) {
  754. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  755. 0 : 1;
  756. _set_module_autoidle(oh, idlemode, &v);
  757. _write_sysconfig(v, oh);
  758. }
  759. }
  760. /**
  761. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  762. * @oh: struct omap_hwmod *
  763. *
  764. * If module is marked as SWSUP_SIDLE, force the module into slave
  765. * idle; otherwise, configure it for smart-idle. If module is marked
  766. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  767. * configure it for smart-standby. No return value.
  768. */
  769. static void _idle_sysc(struct omap_hwmod *oh)
  770. {
  771. u8 idlemode, sf;
  772. u32 v;
  773. if (!oh->class->sysc)
  774. return;
  775. v = oh->_sysc_cache;
  776. sf = oh->class->sysc->sysc_flags;
  777. if (sf & SYSC_HAS_SIDLEMODE) {
  778. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  779. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  780. _set_slave_idlemode(oh, idlemode, &v);
  781. }
  782. if (sf & SYSC_HAS_MIDLEMODE) {
  783. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  784. idlemode = HWMOD_IDLEMODE_FORCE;
  785. } else {
  786. if (sf & SYSC_HAS_ENAWAKEUP)
  787. _enable_wakeup(oh, &v);
  788. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  789. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  790. else
  791. idlemode = HWMOD_IDLEMODE_SMART;
  792. }
  793. _set_master_standbymode(oh, idlemode, &v);
  794. }
  795. /* If slave is in SMARTIDLE, also enable wakeup */
  796. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  797. _enable_wakeup(oh, &v);
  798. _write_sysconfig(v, oh);
  799. }
  800. /**
  801. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  802. * @oh: struct omap_hwmod *
  803. *
  804. * Force the module into slave idle and master suspend. No return
  805. * value.
  806. */
  807. static void _shutdown_sysc(struct omap_hwmod *oh)
  808. {
  809. u32 v;
  810. u8 sf;
  811. if (!oh->class->sysc)
  812. return;
  813. v = oh->_sysc_cache;
  814. sf = oh->class->sysc->sysc_flags;
  815. if (sf & SYSC_HAS_SIDLEMODE)
  816. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  817. if (sf & SYSC_HAS_MIDLEMODE)
  818. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  819. if (sf & SYSC_HAS_AUTOIDLE)
  820. _set_module_autoidle(oh, 1, &v);
  821. _write_sysconfig(v, oh);
  822. }
  823. /**
  824. * _lookup - find an omap_hwmod by name
  825. * @name: find an omap_hwmod by name
  826. *
  827. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  828. */
  829. static struct omap_hwmod *_lookup(const char *name)
  830. {
  831. struct omap_hwmod *oh, *temp_oh;
  832. oh = NULL;
  833. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  834. if (!strcmp(name, temp_oh->name)) {
  835. oh = temp_oh;
  836. break;
  837. }
  838. }
  839. return oh;
  840. }
  841. /**
  842. * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
  843. * @oh: struct omap_hwmod *
  844. *
  845. * Convert a clockdomain name stored in a struct omap_hwmod into a
  846. * clockdomain pointer, and save it into the struct omap_hwmod.
  847. * return -EINVAL if clkdm_name does not exist or if the lookup failed.
  848. */
  849. static int _init_clkdm(struct omap_hwmod *oh)
  850. {
  851. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  852. return 0;
  853. if (!oh->clkdm_name) {
  854. pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
  855. return -EINVAL;
  856. }
  857. oh->clkdm = clkdm_lookup(oh->clkdm_name);
  858. if (!oh->clkdm) {
  859. pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
  860. oh->name, oh->clkdm_name);
  861. return -EINVAL;
  862. }
  863. pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
  864. oh->name, oh->clkdm_name);
  865. return 0;
  866. }
  867. /**
  868. * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
  869. * well the clockdomain.
  870. * @oh: struct omap_hwmod *
  871. * @data: not used; pass NULL
  872. *
  873. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  874. * Resolves all clock names embedded in the hwmod. Returns 0 on
  875. * success, or a negative error code on failure.
  876. */
  877. static int _init_clocks(struct omap_hwmod *oh, void *data)
  878. {
  879. int ret = 0;
  880. if (oh->_state != _HWMOD_STATE_REGISTERED)
  881. return 0;
  882. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  883. ret |= _init_main_clk(oh);
  884. ret |= _init_interface_clks(oh);
  885. ret |= _init_opt_clks(oh);
  886. ret |= _init_clkdm(oh);
  887. if (!ret)
  888. oh->_state = _HWMOD_STATE_CLKS_INITED;
  889. else
  890. pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
  891. return ret;
  892. }
  893. /**
  894. * _wait_target_ready - wait for a module to leave slave idle
  895. * @oh: struct omap_hwmod *
  896. *
  897. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  898. * does not have an IDLEST bit or if the module successfully leaves
  899. * slave idle; otherwise, pass along the return value of the
  900. * appropriate *_cm*_wait_module_ready() function.
  901. */
  902. static int _wait_target_ready(struct omap_hwmod *oh)
  903. {
  904. struct omap_hwmod_ocp_if *os;
  905. int ret;
  906. if (!oh)
  907. return -EINVAL;
  908. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  909. return 0;
  910. os = oh->slaves[oh->_mpu_port_index];
  911. if (oh->flags & HWMOD_NO_IDLEST)
  912. return 0;
  913. /* XXX check module SIDLEMODE */
  914. /* XXX check clock enable states */
  915. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  916. ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  917. oh->prcm.omap2.idlest_reg_id,
  918. oh->prcm.omap2.idlest_idle_bit);
  919. } else if (cpu_is_omap44xx()) {
  920. if (!oh->clkdm)
  921. return -EINVAL;
  922. ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
  923. oh->clkdm->cm_inst,
  924. oh->clkdm->clkdm_offs,
  925. oh->prcm.omap4.clkctrl_offs);
  926. } else {
  927. BUG();
  928. };
  929. return ret;
  930. }
  931. /**
  932. * _wait_target_disable - wait for a module to be disabled
  933. * @oh: struct omap_hwmod *
  934. *
  935. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  936. * does not have an IDLEST bit or if the module successfully enters
  937. * slave idle; otherwise, pass along the return value of the
  938. * appropriate *_cm*_wait_module_idle() function.
  939. */
  940. static int _wait_target_disable(struct omap_hwmod *oh)
  941. {
  942. /* TODO: For now just handle OMAP4+ */
  943. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  944. return 0;
  945. if (!oh)
  946. return -EINVAL;
  947. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  948. return 0;
  949. if (oh->flags & HWMOD_NO_IDLEST)
  950. return 0;
  951. return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
  952. oh->clkdm->cm_inst,
  953. oh->clkdm->clkdm_offs,
  954. oh->prcm.omap4.clkctrl_offs);
  955. }
  956. /**
  957. * _lookup_hardreset - fill register bit info for this hwmod/reset line
  958. * @oh: struct omap_hwmod *
  959. * @name: name of the reset line in the context of this hwmod
  960. * @ohri: struct omap_hwmod_rst_info * that this function will fill in
  961. *
  962. * Return the bit position of the reset line that match the
  963. * input name. Return -ENOENT if not found.
  964. */
  965. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
  966. struct omap_hwmod_rst_info *ohri)
  967. {
  968. int i;
  969. for (i = 0; i < oh->rst_lines_cnt; i++) {
  970. const char *rst_line = oh->rst_lines[i].name;
  971. if (!strcmp(rst_line, name)) {
  972. ohri->rst_shift = oh->rst_lines[i].rst_shift;
  973. ohri->st_shift = oh->rst_lines[i].st_shift;
  974. pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
  975. oh->name, __func__, rst_line, ohri->rst_shift,
  976. ohri->st_shift);
  977. return 0;
  978. }
  979. }
  980. return -ENOENT;
  981. }
  982. /**
  983. * _assert_hardreset - assert the HW reset line of submodules
  984. * contained in the hwmod module.
  985. * @oh: struct omap_hwmod *
  986. * @name: name of the reset line to lookup and assert
  987. *
  988. * Some IP like dsp, ipu or iva contain processor that require
  989. * an HW reset line to be assert / deassert in order to enable fully
  990. * the IP.
  991. */
  992. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  993. {
  994. struct omap_hwmod_rst_info ohri;
  995. u8 ret;
  996. if (!oh)
  997. return -EINVAL;
  998. ret = _lookup_hardreset(oh, name, &ohri);
  999. if (IS_ERR_VALUE(ret))
  1000. return ret;
  1001. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  1002. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  1003. ohri.rst_shift);
  1004. else if (cpu_is_omap44xx())
  1005. return omap4_prminst_assert_hardreset(ohri.rst_shift,
  1006. oh->clkdm->pwrdm.ptr->prcm_partition,
  1007. oh->clkdm->pwrdm.ptr->prcm_offs,
  1008. oh->prcm.omap4.rstctrl_offs);
  1009. else
  1010. return -EINVAL;
  1011. }
  1012. /**
  1013. * _deassert_hardreset - deassert the HW reset line of submodules contained
  1014. * in the hwmod module.
  1015. * @oh: struct omap_hwmod *
  1016. * @name: name of the reset line to look up and deassert
  1017. *
  1018. * Some IP like dsp, ipu or iva contain processor that require
  1019. * an HW reset line to be assert / deassert in order to enable fully
  1020. * the IP.
  1021. */
  1022. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1023. {
  1024. struct omap_hwmod_rst_info ohri;
  1025. int ret;
  1026. if (!oh)
  1027. return -EINVAL;
  1028. ret = _lookup_hardreset(oh, name, &ohri);
  1029. if (IS_ERR_VALUE(ret))
  1030. return ret;
  1031. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1032. ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  1033. ohri.rst_shift,
  1034. ohri.st_shift);
  1035. } else if (cpu_is_omap44xx()) {
  1036. if (ohri.st_shift)
  1037. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  1038. oh->name, name);
  1039. ret = omap4_prminst_deassert_hardreset(ohri.rst_shift,
  1040. oh->clkdm->pwrdm.ptr->prcm_partition,
  1041. oh->clkdm->pwrdm.ptr->prcm_offs,
  1042. oh->prcm.omap4.rstctrl_offs);
  1043. } else {
  1044. return -EINVAL;
  1045. }
  1046. if (ret == -EBUSY)
  1047. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  1048. return ret;
  1049. }
  1050. /**
  1051. * _read_hardreset - read the HW reset line state of submodules
  1052. * contained in the hwmod module
  1053. * @oh: struct omap_hwmod *
  1054. * @name: name of the reset line to look up and read
  1055. *
  1056. * Return the state of the reset line.
  1057. */
  1058. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  1059. {
  1060. struct omap_hwmod_rst_info ohri;
  1061. u8 ret;
  1062. if (!oh)
  1063. return -EINVAL;
  1064. ret = _lookup_hardreset(oh, name, &ohri);
  1065. if (IS_ERR_VALUE(ret))
  1066. return ret;
  1067. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1068. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  1069. ohri.st_shift);
  1070. } else if (cpu_is_omap44xx()) {
  1071. return omap4_prminst_is_hardreset_asserted(ohri.rst_shift,
  1072. oh->clkdm->pwrdm.ptr->prcm_partition,
  1073. oh->clkdm->pwrdm.ptr->prcm_offs,
  1074. oh->prcm.omap4.rstctrl_offs);
  1075. } else {
  1076. return -EINVAL;
  1077. }
  1078. }
  1079. /**
  1080. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  1081. * @oh: struct omap_hwmod *
  1082. *
  1083. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  1084. * enabled for this to work. Returns -EINVAL if the hwmod cannot be
  1085. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  1086. * the module did not reset in time, or 0 upon success.
  1087. *
  1088. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  1089. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  1090. * use the SYSCONFIG softreset bit to provide the status.
  1091. *
  1092. * Note that some IP like McBSP do have reset control but don't have
  1093. * reset status.
  1094. */
  1095. static int _ocp_softreset(struct omap_hwmod *oh)
  1096. {
  1097. u32 v;
  1098. int c = 0;
  1099. int ret = 0;
  1100. if (!oh->class->sysc ||
  1101. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  1102. return -EINVAL;
  1103. /* clocks must be on for this operation */
  1104. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1105. pr_warning("omap_hwmod: %s: reset can only be entered from "
  1106. "enabled state\n", oh->name);
  1107. return -EINVAL;
  1108. }
  1109. /* For some modules, all optionnal clocks need to be enabled as well */
  1110. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1111. _enable_optional_clocks(oh);
  1112. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  1113. v = oh->_sysc_cache;
  1114. ret = _set_softreset(oh, &v);
  1115. if (ret)
  1116. goto dis_opt_clks;
  1117. _write_sysconfig(v, oh);
  1118. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  1119. omap_test_timeout((omap_hwmod_read(oh,
  1120. oh->class->sysc->syss_offs)
  1121. & SYSS_RESETDONE_MASK),
  1122. MAX_MODULE_SOFTRESET_WAIT, c);
  1123. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
  1124. omap_test_timeout(!(omap_hwmod_read(oh,
  1125. oh->class->sysc->sysc_offs)
  1126. & SYSC_TYPE2_SOFTRESET_MASK),
  1127. MAX_MODULE_SOFTRESET_WAIT, c);
  1128. if (c == MAX_MODULE_SOFTRESET_WAIT)
  1129. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  1130. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  1131. else
  1132. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  1133. /*
  1134. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  1135. * _wait_target_ready() or _reset()
  1136. */
  1137. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  1138. dis_opt_clks:
  1139. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1140. _disable_optional_clocks(oh);
  1141. return ret;
  1142. }
  1143. /**
  1144. * _reset - reset an omap_hwmod
  1145. * @oh: struct omap_hwmod *
  1146. *
  1147. * Resets an omap_hwmod @oh. The default software reset mechanism for
  1148. * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
  1149. * bit. However, some hwmods cannot be reset via this method: some
  1150. * are not targets and therefore have no OCP header registers to
  1151. * access; others (like the IVA) have idiosyncratic reset sequences.
  1152. * So for these relatively rare cases, custom reset code can be
  1153. * supplied in the struct omap_hwmod_class .reset function pointer.
  1154. * Passes along the return value from either _reset() or the custom
  1155. * reset function - these must return -EINVAL if the hwmod cannot be
  1156. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  1157. * the module did not reset in time, or 0 upon success.
  1158. */
  1159. static int _reset(struct omap_hwmod *oh)
  1160. {
  1161. int ret;
  1162. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1163. ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
  1164. return ret;
  1165. }
  1166. /**
  1167. * _enable - enable an omap_hwmod
  1168. * @oh: struct omap_hwmod *
  1169. *
  1170. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1171. * register target. Returns -EINVAL if the hwmod is in the wrong
  1172. * state or passes along the return value of _wait_target_ready().
  1173. */
  1174. static int _enable(struct omap_hwmod *oh)
  1175. {
  1176. int r;
  1177. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1178. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1179. oh->_state != _HWMOD_STATE_IDLE &&
  1180. oh->_state != _HWMOD_STATE_DISABLED) {
  1181. WARN(1, "omap_hwmod: %s: enabled state can only be entered "
  1182. "from initialized, idle, or disabled state\n", oh->name);
  1183. return -EINVAL;
  1184. }
  1185. /* Mux pins for device runtime if populated */
  1186. if (oh->mux && (!oh->mux->enabled ||
  1187. ((oh->_state == _HWMOD_STATE_IDLE) &&
  1188. oh->mux->pads_dynamic)))
  1189. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1190. _add_initiator_dep(oh, mpu_oh);
  1191. _enable_clocks(oh);
  1192. /*
  1193. * If an IP contains only one HW reset line, then de-assert it in order
  1194. * to allow the module state transition. Otherwise the PRCM will return
  1195. * Intransition status, and the init will failed.
  1196. */
  1197. if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
  1198. oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
  1199. _deassert_hardreset(oh, oh->rst_lines[0].name);
  1200. r = _wait_target_ready(oh);
  1201. if (r) {
  1202. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1203. oh->name, r);
  1204. _disable_clocks(oh);
  1205. return r;
  1206. }
  1207. oh->_state = _HWMOD_STATE_ENABLED;
  1208. /* Access the sysconfig only if the target is ready */
  1209. if (oh->class->sysc) {
  1210. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1211. _update_sysc_cache(oh);
  1212. _enable_sysc(oh);
  1213. }
  1214. return r;
  1215. }
  1216. /**
  1217. * _idle - idle an omap_hwmod
  1218. * @oh: struct omap_hwmod *
  1219. *
  1220. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1221. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1222. * state or returns 0.
  1223. */
  1224. static int _idle(struct omap_hwmod *oh)
  1225. {
  1226. int ret;
  1227. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1228. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1229. WARN(1, "omap_hwmod: %s: idle state can only be entered from "
  1230. "enabled state\n", oh->name);
  1231. return -EINVAL;
  1232. }
  1233. if (oh->class->sysc)
  1234. _idle_sysc(oh);
  1235. _del_initiator_dep(oh, mpu_oh);
  1236. _disable_clocks(oh);
  1237. ret = _wait_target_disable(oh);
  1238. if (ret)
  1239. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1240. oh->name);
  1241. /* Mux pins for device idle if populated */
  1242. if (oh->mux && oh->mux->pads_dynamic)
  1243. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1244. oh->_state = _HWMOD_STATE_IDLE;
  1245. return 0;
  1246. }
  1247. /**
  1248. * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
  1249. * @oh: struct omap_hwmod *
  1250. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  1251. *
  1252. * Sets the IP block's OCP autoidle bit in hardware, and updates our
  1253. * local copy. Intended to be used by drivers that require
  1254. * direct manipulation of the AUTOIDLE bits.
  1255. * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
  1256. * along the return value from _set_module_autoidle().
  1257. *
  1258. * Any users of this function should be scrutinized carefully.
  1259. */
  1260. int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
  1261. {
  1262. u32 v;
  1263. int retval = 0;
  1264. unsigned long flags;
  1265. if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
  1266. return -EINVAL;
  1267. spin_lock_irqsave(&oh->_lock, flags);
  1268. v = oh->_sysc_cache;
  1269. retval = _set_module_autoidle(oh, autoidle, &v);
  1270. if (!retval)
  1271. _write_sysconfig(v, oh);
  1272. spin_unlock_irqrestore(&oh->_lock, flags);
  1273. return retval;
  1274. }
  1275. /**
  1276. * _shutdown - shutdown an omap_hwmod
  1277. * @oh: struct omap_hwmod *
  1278. *
  1279. * Shut down an omap_hwmod @oh. This should be called when the driver
  1280. * used for the hwmod is removed or unloaded or if the driver is not
  1281. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1282. * state or returns 0.
  1283. */
  1284. static int _shutdown(struct omap_hwmod *oh)
  1285. {
  1286. int ret;
  1287. u8 prev_state;
  1288. if (oh->_state != _HWMOD_STATE_IDLE &&
  1289. oh->_state != _HWMOD_STATE_ENABLED) {
  1290. WARN(1, "omap_hwmod: %s: disabled state can only be entered "
  1291. "from idle, or enabled state\n", oh->name);
  1292. return -EINVAL;
  1293. }
  1294. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1295. if (oh->class->pre_shutdown) {
  1296. prev_state = oh->_state;
  1297. if (oh->_state == _HWMOD_STATE_IDLE)
  1298. _enable(oh);
  1299. ret = oh->class->pre_shutdown(oh);
  1300. if (ret) {
  1301. if (prev_state == _HWMOD_STATE_IDLE)
  1302. _idle(oh);
  1303. return ret;
  1304. }
  1305. }
  1306. if (oh->class->sysc) {
  1307. if (oh->_state == _HWMOD_STATE_IDLE)
  1308. _enable(oh);
  1309. _shutdown_sysc(oh);
  1310. }
  1311. /* clocks and deps are already disabled in idle */
  1312. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1313. _del_initiator_dep(oh, mpu_oh);
  1314. /* XXX what about the other system initiators here? dma, dsp */
  1315. _disable_clocks(oh);
  1316. ret = _wait_target_disable(oh);
  1317. if (ret)
  1318. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1319. oh->name);
  1320. }
  1321. /* XXX Should this code also force-disable the optional clocks? */
  1322. /*
  1323. * If an IP contains only one HW reset line, then assert it
  1324. * after disabling the clocks and before shutting down the IP.
  1325. */
  1326. if (oh->rst_lines_cnt == 1)
  1327. _assert_hardreset(oh, oh->rst_lines[0].name);
  1328. /* Mux pins to safe mode or use populated off mode values */
  1329. if (oh->mux)
  1330. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1331. oh->_state = _HWMOD_STATE_DISABLED;
  1332. return 0;
  1333. }
  1334. /**
  1335. * _setup - do initial configuration of omap_hwmod
  1336. * @oh: struct omap_hwmod *
  1337. *
  1338. * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
  1339. * OCP_SYSCONFIG register. Returns 0.
  1340. */
  1341. static int _setup(struct omap_hwmod *oh, void *data)
  1342. {
  1343. int i, r;
  1344. u8 postsetup_state;
  1345. if (oh->_state != _HWMOD_STATE_CLKS_INITED)
  1346. return 0;
  1347. /* Set iclk autoidle mode */
  1348. if (oh->slaves_cnt > 0) {
  1349. for (i = 0; i < oh->slaves_cnt; i++) {
  1350. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  1351. struct clk *c = os->_clk;
  1352. if (!c)
  1353. continue;
  1354. if (os->flags & OCPIF_SWSUP_IDLE) {
  1355. /* XXX omap_iclk_deny_idle(c); */
  1356. } else {
  1357. /* XXX omap_iclk_allow_idle(c); */
  1358. clk_enable(c);
  1359. }
  1360. }
  1361. }
  1362. oh->_state = _HWMOD_STATE_INITIALIZED;
  1363. /*
  1364. * In the case of hwmod with hardreset that should not be
  1365. * de-assert at boot time, we have to keep the module
  1366. * initialized, because we cannot enable it properly with the
  1367. * reset asserted. Exit without warning because that behavior is
  1368. * expected.
  1369. */
  1370. if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
  1371. return 0;
  1372. r = _enable(oh);
  1373. if (r) {
  1374. pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
  1375. oh->name, oh->_state);
  1376. return 0;
  1377. }
  1378. if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
  1379. _reset(oh);
  1380. /*
  1381. * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
  1382. * The _enable() function should be split to
  1383. * avoid the rewrite of the OCP_SYSCONFIG register.
  1384. */
  1385. if (oh->class->sysc) {
  1386. _update_sysc_cache(oh);
  1387. _enable_sysc(oh);
  1388. }
  1389. }
  1390. postsetup_state = oh->_postsetup_state;
  1391. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  1392. postsetup_state = _HWMOD_STATE_ENABLED;
  1393. /*
  1394. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  1395. * it should be set by the core code as a runtime flag during startup
  1396. */
  1397. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  1398. (postsetup_state == _HWMOD_STATE_IDLE))
  1399. postsetup_state = _HWMOD_STATE_ENABLED;
  1400. if (postsetup_state == _HWMOD_STATE_IDLE)
  1401. _idle(oh);
  1402. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  1403. _shutdown(oh);
  1404. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  1405. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  1406. oh->name, postsetup_state);
  1407. return 0;
  1408. }
  1409. /**
  1410. * _register - register a struct omap_hwmod
  1411. * @oh: struct omap_hwmod *
  1412. *
  1413. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  1414. * already has been registered by the same name; -EINVAL if the
  1415. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  1416. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  1417. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  1418. * success.
  1419. *
  1420. * XXX The data should be copied into bootmem, so the original data
  1421. * should be marked __initdata and freed after init. This would allow
  1422. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  1423. * that the copy process would be relatively complex due to the large number
  1424. * of substructures.
  1425. */
  1426. static int __init _register(struct omap_hwmod *oh)
  1427. {
  1428. int ms_id;
  1429. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  1430. (oh->_state != _HWMOD_STATE_UNKNOWN))
  1431. return -EINVAL;
  1432. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  1433. if (_lookup(oh->name))
  1434. return -EEXIST;
  1435. ms_id = _find_mpu_port_index(oh);
  1436. if (!IS_ERR_VALUE(ms_id))
  1437. oh->_mpu_port_index = ms_id;
  1438. else
  1439. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1440. list_add_tail(&oh->node, &omap_hwmod_list);
  1441. spin_lock_init(&oh->_lock);
  1442. oh->_state = _HWMOD_STATE_REGISTERED;
  1443. /*
  1444. * XXX Rather than doing a strcmp(), this should test a flag
  1445. * set in the hwmod data, inserted by the autogenerator code.
  1446. */
  1447. if (!strcmp(oh->name, MPU_INITIATOR_NAME))
  1448. mpu_oh = oh;
  1449. return 0;
  1450. }
  1451. /* Public functions */
  1452. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  1453. {
  1454. if (oh->flags & HWMOD_16BIT_REG)
  1455. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  1456. else
  1457. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  1458. }
  1459. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  1460. {
  1461. if (oh->flags & HWMOD_16BIT_REG)
  1462. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  1463. else
  1464. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  1465. }
  1466. /**
  1467. * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
  1468. * @oh: struct omap_hwmod *
  1469. *
  1470. * This is a public function exposed to drivers. Some drivers may need to do
  1471. * some settings before and after resetting the device. Those drivers after
  1472. * doing the necessary settings could use this function to start a reset by
  1473. * setting the SYSCONFIG.SOFTRESET bit.
  1474. */
  1475. int omap_hwmod_softreset(struct omap_hwmod *oh)
  1476. {
  1477. u32 v;
  1478. int ret;
  1479. if (!oh || !(oh->_sysc_cache))
  1480. return -EINVAL;
  1481. v = oh->_sysc_cache;
  1482. ret = _set_softreset(oh, &v);
  1483. if (ret)
  1484. goto error;
  1485. _write_sysconfig(v, oh);
  1486. error:
  1487. return ret;
  1488. }
  1489. /**
  1490. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  1491. * @oh: struct omap_hwmod *
  1492. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  1493. *
  1494. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  1495. * local copy. Intended to be used by drivers that have some erratum
  1496. * that requires direct manipulation of the SIDLEMODE bits. Returns
  1497. * -EINVAL if @oh is null, or passes along the return value from
  1498. * _set_slave_idlemode().
  1499. *
  1500. * XXX Does this function have any current users? If not, we should
  1501. * remove it; it is better to let the rest of the hwmod code handle this.
  1502. * Any users of this function should be scrutinized carefully.
  1503. */
  1504. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  1505. {
  1506. u32 v;
  1507. int retval = 0;
  1508. if (!oh)
  1509. return -EINVAL;
  1510. v = oh->_sysc_cache;
  1511. retval = _set_slave_idlemode(oh, idlemode, &v);
  1512. if (!retval)
  1513. _write_sysconfig(v, oh);
  1514. return retval;
  1515. }
  1516. /**
  1517. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  1518. * @name: name of the omap_hwmod to look up
  1519. *
  1520. * Given a @name of an omap_hwmod, return a pointer to the registered
  1521. * struct omap_hwmod *, or NULL upon error.
  1522. */
  1523. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  1524. {
  1525. struct omap_hwmod *oh;
  1526. if (!name)
  1527. return NULL;
  1528. oh = _lookup(name);
  1529. return oh;
  1530. }
  1531. /**
  1532. * omap_hwmod_for_each - call function for each registered omap_hwmod
  1533. * @fn: pointer to a callback function
  1534. * @data: void * data to pass to callback function
  1535. *
  1536. * Call @fn for each registered omap_hwmod, passing @data to each
  1537. * function. @fn must return 0 for success or any other value for
  1538. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  1539. * will stop and the non-zero return value will be passed to the
  1540. * caller of omap_hwmod_for_each(). @fn is called with
  1541. * omap_hwmod_for_each() held.
  1542. */
  1543. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  1544. void *data)
  1545. {
  1546. struct omap_hwmod *temp_oh;
  1547. int ret = 0;
  1548. if (!fn)
  1549. return -EINVAL;
  1550. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1551. ret = (*fn)(temp_oh, data);
  1552. if (ret)
  1553. break;
  1554. }
  1555. return ret;
  1556. }
  1557. /**
  1558. * omap_hwmod_register - register an array of hwmods
  1559. * @ohs: pointer to an array of omap_hwmods to register
  1560. *
  1561. * Intended to be called early in boot before the clock framework is
  1562. * initialized. If @ohs is not null, will register all omap_hwmods
  1563. * listed in @ohs that are valid for this chip. Returns 0.
  1564. */
  1565. int __init omap_hwmod_register(struct omap_hwmod **ohs)
  1566. {
  1567. int r, i;
  1568. if (!ohs)
  1569. return 0;
  1570. i = 0;
  1571. do {
  1572. if (!omap_chip_is(ohs[i]->omap_chip))
  1573. continue;
  1574. r = _register(ohs[i]);
  1575. WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
  1576. r);
  1577. } while (ohs[++i]);
  1578. return 0;
  1579. }
  1580. /*
  1581. * _populate_mpu_rt_base - populate the virtual address for a hwmod
  1582. *
  1583. * Must be called only from omap_hwmod_setup_*() so ioremap works properly.
  1584. * Assumes the caller takes care of locking if needed.
  1585. */
  1586. static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
  1587. {
  1588. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1589. return 0;
  1590. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1591. return 0;
  1592. oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
  1593. return 0;
  1594. }
  1595. /**
  1596. * omap_hwmod_setup_one - set up a single hwmod
  1597. * @oh_name: const char * name of the already-registered hwmod to set up
  1598. *
  1599. * Must be called after omap2_clk_init(). Resolves the struct clk
  1600. * names to struct clk pointers for each registered omap_hwmod. Also
  1601. * calls _setup() on each hwmod. Returns -EINVAL upon error or 0 upon
  1602. * success.
  1603. */
  1604. int __init omap_hwmod_setup_one(const char *oh_name)
  1605. {
  1606. struct omap_hwmod *oh;
  1607. int r;
  1608. pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
  1609. if (!mpu_oh) {
  1610. pr_err("omap_hwmod: %s: cannot setup_one: MPU initiator hwmod %s not yet registered\n",
  1611. oh_name, MPU_INITIATOR_NAME);
  1612. return -EINVAL;
  1613. }
  1614. oh = _lookup(oh_name);
  1615. if (!oh) {
  1616. WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
  1617. return -EINVAL;
  1618. }
  1619. if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
  1620. omap_hwmod_setup_one(MPU_INITIATOR_NAME);
  1621. r = _populate_mpu_rt_base(oh, NULL);
  1622. if (IS_ERR_VALUE(r)) {
  1623. WARN(1, "omap_hwmod: %s: couldn't set mpu_rt_base\n", oh_name);
  1624. return -EINVAL;
  1625. }
  1626. r = _init_clocks(oh, NULL);
  1627. if (IS_ERR_VALUE(r)) {
  1628. WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh_name);
  1629. return -EINVAL;
  1630. }
  1631. _setup(oh, NULL);
  1632. return 0;
  1633. }
  1634. /**
  1635. * omap_hwmod_setup - do some post-clock framework initialization
  1636. *
  1637. * Must be called after omap2_clk_init(). Resolves the struct clk names
  1638. * to struct clk pointers for each registered omap_hwmod. Also calls
  1639. * _setup() on each hwmod. Returns 0 upon success.
  1640. */
  1641. static int __init omap_hwmod_setup_all(void)
  1642. {
  1643. int r;
  1644. if (!mpu_oh) {
  1645. pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
  1646. __func__, MPU_INITIATOR_NAME);
  1647. return -EINVAL;
  1648. }
  1649. r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);
  1650. r = omap_hwmod_for_each(_init_clocks, NULL);
  1651. WARN(IS_ERR_VALUE(r),
  1652. "omap_hwmod: %s: _init_clocks failed\n", __func__);
  1653. omap_hwmod_for_each(_setup, NULL);
  1654. return 0;
  1655. }
  1656. core_initcall(omap_hwmod_setup_all);
  1657. /**
  1658. * omap_hwmod_enable - enable an omap_hwmod
  1659. * @oh: struct omap_hwmod *
  1660. *
  1661. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  1662. * Returns -EINVAL on error or passes along the return value from _enable().
  1663. */
  1664. int omap_hwmod_enable(struct omap_hwmod *oh)
  1665. {
  1666. int r;
  1667. unsigned long flags;
  1668. if (!oh)
  1669. return -EINVAL;
  1670. spin_lock_irqsave(&oh->_lock, flags);
  1671. r = _enable(oh);
  1672. spin_unlock_irqrestore(&oh->_lock, flags);
  1673. return r;
  1674. }
  1675. /**
  1676. * omap_hwmod_idle - idle an omap_hwmod
  1677. * @oh: struct omap_hwmod *
  1678. *
  1679. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  1680. * Returns -EINVAL on error or passes along the return value from _idle().
  1681. */
  1682. int omap_hwmod_idle(struct omap_hwmod *oh)
  1683. {
  1684. unsigned long flags;
  1685. if (!oh)
  1686. return -EINVAL;
  1687. spin_lock_irqsave(&oh->_lock, flags);
  1688. _idle(oh);
  1689. spin_unlock_irqrestore(&oh->_lock, flags);
  1690. return 0;
  1691. }
  1692. /**
  1693. * omap_hwmod_shutdown - shutdown an omap_hwmod
  1694. * @oh: struct omap_hwmod *
  1695. *
  1696. * Shutdown an omap_hwmod @oh. Intended to be called by
  1697. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  1698. * the return value from _shutdown().
  1699. */
  1700. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  1701. {
  1702. unsigned long flags;
  1703. if (!oh)
  1704. return -EINVAL;
  1705. spin_lock_irqsave(&oh->_lock, flags);
  1706. _shutdown(oh);
  1707. spin_unlock_irqrestore(&oh->_lock, flags);
  1708. return 0;
  1709. }
  1710. /**
  1711. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  1712. * @oh: struct omap_hwmod *oh
  1713. *
  1714. * Intended to be called by the omap_device code.
  1715. */
  1716. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  1717. {
  1718. unsigned long flags;
  1719. spin_lock_irqsave(&oh->_lock, flags);
  1720. _enable_clocks(oh);
  1721. spin_unlock_irqrestore(&oh->_lock, flags);
  1722. return 0;
  1723. }
  1724. /**
  1725. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  1726. * @oh: struct omap_hwmod *oh
  1727. *
  1728. * Intended to be called by the omap_device code.
  1729. */
  1730. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  1731. {
  1732. unsigned long flags;
  1733. spin_lock_irqsave(&oh->_lock, flags);
  1734. _disable_clocks(oh);
  1735. spin_unlock_irqrestore(&oh->_lock, flags);
  1736. return 0;
  1737. }
  1738. /**
  1739. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  1740. * @oh: struct omap_hwmod *oh
  1741. *
  1742. * Intended to be called by drivers and core code when all posted
  1743. * writes to a device must complete before continuing further
  1744. * execution (for example, after clearing some device IRQSTATUS
  1745. * register bits)
  1746. *
  1747. * XXX what about targets with multiple OCP threads?
  1748. */
  1749. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  1750. {
  1751. BUG_ON(!oh);
  1752. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  1753. WARN(1, "omap_device: %s: OCP barrier impossible due to "
  1754. "device configuration\n", oh->name);
  1755. return;
  1756. }
  1757. /*
  1758. * Forces posted writes to complete on the OCP thread handling
  1759. * register writes
  1760. */
  1761. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  1762. }
  1763. /**
  1764. * omap_hwmod_reset - reset the hwmod
  1765. * @oh: struct omap_hwmod *
  1766. *
  1767. * Under some conditions, a driver may wish to reset the entire device.
  1768. * Called from omap_device code. Returns -EINVAL on error or passes along
  1769. * the return value from _reset().
  1770. */
  1771. int omap_hwmod_reset(struct omap_hwmod *oh)
  1772. {
  1773. int r;
  1774. unsigned long flags;
  1775. if (!oh)
  1776. return -EINVAL;
  1777. spin_lock_irqsave(&oh->_lock, flags);
  1778. r = _reset(oh);
  1779. spin_unlock_irqrestore(&oh->_lock, flags);
  1780. return r;
  1781. }
  1782. /**
  1783. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  1784. * @oh: struct omap_hwmod *
  1785. * @res: pointer to the first element of an array of struct resource to fill
  1786. *
  1787. * Count the number of struct resource array elements necessary to
  1788. * contain omap_hwmod @oh resources. Intended to be called by code
  1789. * that registers omap_devices. Intended to be used to determine the
  1790. * size of a dynamically-allocated struct resource array, before
  1791. * calling omap_hwmod_fill_resources(). Returns the number of struct
  1792. * resource array elements needed.
  1793. *
  1794. * XXX This code is not optimized. It could attempt to merge adjacent
  1795. * resource IDs.
  1796. *
  1797. */
  1798. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  1799. {
  1800. int ret, i;
  1801. ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
  1802. for (i = 0; i < oh->slaves_cnt; i++)
  1803. ret += _count_ocp_if_addr_spaces(oh->slaves[i]);
  1804. return ret;
  1805. }
  1806. /**
  1807. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  1808. * @oh: struct omap_hwmod *
  1809. * @res: pointer to the first element of an array of struct resource to fill
  1810. *
  1811. * Fill the struct resource array @res with resource data from the
  1812. * omap_hwmod @oh. Intended to be called by code that registers
  1813. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  1814. * number of array elements filled.
  1815. */
  1816. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  1817. {
  1818. int i, j, mpu_irqs_cnt, sdma_reqs_cnt;
  1819. int r = 0;
  1820. /* For each IRQ, DMA, memory area, fill in array.*/
  1821. mpu_irqs_cnt = _count_mpu_irqs(oh);
  1822. for (i = 0; i < mpu_irqs_cnt; i++) {
  1823. (res + r)->name = (oh->mpu_irqs + i)->name;
  1824. (res + r)->start = (oh->mpu_irqs + i)->irq;
  1825. (res + r)->end = (oh->mpu_irqs + i)->irq;
  1826. (res + r)->flags = IORESOURCE_IRQ;
  1827. r++;
  1828. }
  1829. sdma_reqs_cnt = _count_sdma_reqs(oh);
  1830. for (i = 0; i < sdma_reqs_cnt; i++) {
  1831. (res + r)->name = (oh->sdma_reqs + i)->name;
  1832. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  1833. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  1834. (res + r)->flags = IORESOURCE_DMA;
  1835. r++;
  1836. }
  1837. for (i = 0; i < oh->slaves_cnt; i++) {
  1838. struct omap_hwmod_ocp_if *os;
  1839. int addr_cnt;
  1840. os = oh->slaves[i];
  1841. addr_cnt = _count_ocp_if_addr_spaces(os);
  1842. for (j = 0; j < addr_cnt; j++) {
  1843. (res + r)->name = (os->addr + j)->name;
  1844. (res + r)->start = (os->addr + j)->pa_start;
  1845. (res + r)->end = (os->addr + j)->pa_end;
  1846. (res + r)->flags = IORESOURCE_MEM;
  1847. r++;
  1848. }
  1849. }
  1850. return r;
  1851. }
  1852. /**
  1853. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  1854. * @oh: struct omap_hwmod *
  1855. *
  1856. * Return the powerdomain pointer associated with the OMAP module
  1857. * @oh's main clock. If @oh does not have a main clk, return the
  1858. * powerdomain associated with the interface clock associated with the
  1859. * module's MPU port. (XXX Perhaps this should use the SDMA port
  1860. * instead?) Returns NULL on error, or a struct powerdomain * on
  1861. * success.
  1862. */
  1863. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  1864. {
  1865. struct clk *c;
  1866. if (!oh)
  1867. return NULL;
  1868. if (oh->_clk) {
  1869. c = oh->_clk;
  1870. } else {
  1871. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1872. return NULL;
  1873. c = oh->slaves[oh->_mpu_port_index]->_clk;
  1874. }
  1875. if (!c->clkdm)
  1876. return NULL;
  1877. return c->clkdm->pwrdm.ptr;
  1878. }
  1879. /**
  1880. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  1881. * @oh: struct omap_hwmod *
  1882. *
  1883. * Returns the virtual address corresponding to the beginning of the
  1884. * module's register target, in the address range that is intended to
  1885. * be used by the MPU. Returns the virtual address upon success or NULL
  1886. * upon error.
  1887. */
  1888. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  1889. {
  1890. if (!oh)
  1891. return NULL;
  1892. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1893. return NULL;
  1894. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  1895. return NULL;
  1896. return oh->_mpu_rt_va;
  1897. }
  1898. /**
  1899. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  1900. * @oh: struct omap_hwmod *
  1901. * @init_oh: struct omap_hwmod * (initiator)
  1902. *
  1903. * Add a sleep dependency between the initiator @init_oh and @oh.
  1904. * Intended to be called by DSP/Bridge code via platform_data for the
  1905. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1906. * code needs to add/del initiator dependencies dynamically
  1907. * before/after accessing a device. Returns the return value from
  1908. * _add_initiator_dep().
  1909. *
  1910. * XXX Keep a usecount in the clockdomain code
  1911. */
  1912. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  1913. struct omap_hwmod *init_oh)
  1914. {
  1915. return _add_initiator_dep(oh, init_oh);
  1916. }
  1917. /*
  1918. * XXX what about functions for drivers to save/restore ocp_sysconfig
  1919. * for context save/restore operations?
  1920. */
  1921. /**
  1922. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  1923. * @oh: struct omap_hwmod *
  1924. * @init_oh: struct omap_hwmod * (initiator)
  1925. *
  1926. * Remove a sleep dependency between the initiator @init_oh and @oh.
  1927. * Intended to be called by DSP/Bridge code via platform_data for the
  1928. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  1929. * code needs to add/del initiator dependencies dynamically
  1930. * before/after accessing a device. Returns the return value from
  1931. * _del_initiator_dep().
  1932. *
  1933. * XXX Keep a usecount in the clockdomain code
  1934. */
  1935. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  1936. struct omap_hwmod *init_oh)
  1937. {
  1938. return _del_initiator_dep(oh, init_oh);
  1939. }
  1940. /**
  1941. * omap_hwmod_enable_wakeup - allow device to wake up the system
  1942. * @oh: struct omap_hwmod *
  1943. *
  1944. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  1945. * send wakeups to the PRCM. Eventually this should sets PRCM wakeup
  1946. * registers to cause the PRCM to receive wakeup events from the
  1947. * module. Does not set any wakeup routing registers beyond this
  1948. * point - if the module is to wake up any other module or subsystem,
  1949. * that must be set separately. Called by omap_device code. Returns
  1950. * -EINVAL on error or 0 upon success.
  1951. */
  1952. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  1953. {
  1954. unsigned long flags;
  1955. u32 v;
  1956. if (!oh->class->sysc ||
  1957. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1958. return -EINVAL;
  1959. spin_lock_irqsave(&oh->_lock, flags);
  1960. v = oh->_sysc_cache;
  1961. _enable_wakeup(oh, &v);
  1962. _write_sysconfig(v, oh);
  1963. spin_unlock_irqrestore(&oh->_lock, flags);
  1964. return 0;
  1965. }
  1966. /**
  1967. * omap_hwmod_disable_wakeup - prevent device from waking the system
  1968. * @oh: struct omap_hwmod *
  1969. *
  1970. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  1971. * from sending wakeups to the PRCM. Eventually this should clear
  1972. * PRCM wakeup registers to cause the PRCM to ignore wakeup events
  1973. * from the module. Does not set any wakeup routing registers beyond
  1974. * this point - if the module is to wake up any other module or
  1975. * subsystem, that must be set separately. Called by omap_device
  1976. * code. Returns -EINVAL on error or 0 upon success.
  1977. */
  1978. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  1979. {
  1980. unsigned long flags;
  1981. u32 v;
  1982. if (!oh->class->sysc ||
  1983. !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
  1984. return -EINVAL;
  1985. spin_lock_irqsave(&oh->_lock, flags);
  1986. v = oh->_sysc_cache;
  1987. _disable_wakeup(oh, &v);
  1988. _write_sysconfig(v, oh);
  1989. spin_unlock_irqrestore(&oh->_lock, flags);
  1990. return 0;
  1991. }
  1992. /**
  1993. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  1994. * contained in the hwmod module.
  1995. * @oh: struct omap_hwmod *
  1996. * @name: name of the reset line to lookup and assert
  1997. *
  1998. * Some IP like dsp, ipu or iva contain processor that require
  1999. * an HW reset line to be assert / deassert in order to enable fully
  2000. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  2001. * yet supported on this OMAP; otherwise, passes along the return value
  2002. * from _assert_hardreset().
  2003. */
  2004. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  2005. {
  2006. int ret;
  2007. unsigned long flags;
  2008. if (!oh)
  2009. return -EINVAL;
  2010. spin_lock_irqsave(&oh->_lock, flags);
  2011. ret = _assert_hardreset(oh, name);
  2012. spin_unlock_irqrestore(&oh->_lock, flags);
  2013. return ret;
  2014. }
  2015. /**
  2016. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  2017. * contained in the hwmod module.
  2018. * @oh: struct omap_hwmod *
  2019. * @name: name of the reset line to look up and deassert
  2020. *
  2021. * Some IP like dsp, ipu or iva contain processor that require
  2022. * an HW reset line to be assert / deassert in order to enable fully
  2023. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  2024. * yet supported on this OMAP; otherwise, passes along the return value
  2025. * from _deassert_hardreset().
  2026. */
  2027. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  2028. {
  2029. int ret;
  2030. unsigned long flags;
  2031. if (!oh)
  2032. return -EINVAL;
  2033. spin_lock_irqsave(&oh->_lock, flags);
  2034. ret = _deassert_hardreset(oh, name);
  2035. spin_unlock_irqrestore(&oh->_lock, flags);
  2036. return ret;
  2037. }
  2038. /**
  2039. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  2040. * contained in the hwmod module
  2041. * @oh: struct omap_hwmod *
  2042. * @name: name of the reset line to look up and read
  2043. *
  2044. * Return the current state of the hwmod @oh's reset line named @name:
  2045. * returns -EINVAL upon parameter error or if this operation
  2046. * is unsupported on the current OMAP; otherwise, passes along the return
  2047. * value from _read_hardreset().
  2048. */
  2049. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  2050. {
  2051. int ret;
  2052. unsigned long flags;
  2053. if (!oh)
  2054. return -EINVAL;
  2055. spin_lock_irqsave(&oh->_lock, flags);
  2056. ret = _read_hardreset(oh, name);
  2057. spin_unlock_irqrestore(&oh->_lock, flags);
  2058. return ret;
  2059. }
  2060. /**
  2061. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  2062. * @classname: struct omap_hwmod_class name to search for
  2063. * @fn: callback function pointer to call for each hwmod in class @classname
  2064. * @user: arbitrary context data to pass to the callback function
  2065. *
  2066. * For each omap_hwmod of class @classname, call @fn.
  2067. * If the callback function returns something other than
  2068. * zero, the iterator is terminated, and the callback function's return
  2069. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  2070. * if @classname or @fn are NULL, or passes back the error code from @fn.
  2071. */
  2072. int omap_hwmod_for_each_by_class(const char *classname,
  2073. int (*fn)(struct omap_hwmod *oh,
  2074. void *user),
  2075. void *user)
  2076. {
  2077. struct omap_hwmod *temp_oh;
  2078. int ret = 0;
  2079. if (!classname || !fn)
  2080. return -EINVAL;
  2081. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  2082. __func__, classname);
  2083. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  2084. if (!strcmp(temp_oh->class->name, classname)) {
  2085. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  2086. __func__, temp_oh->name);
  2087. ret = (*fn)(temp_oh, user);
  2088. if (ret)
  2089. break;
  2090. }
  2091. }
  2092. if (ret)
  2093. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  2094. __func__, ret);
  2095. return ret;
  2096. }
  2097. /**
  2098. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  2099. * @oh: struct omap_hwmod *
  2100. * @state: state that _setup() should leave the hwmod in
  2101. *
  2102. * Sets the hwmod state that @oh will enter at the end of _setup()
  2103. * (called by omap_hwmod_setup_*()). Only valid to call between
  2104. * calling omap_hwmod_register() and omap_hwmod_setup_*(). Returns
  2105. * 0 upon success or -EINVAL if there is a problem with the arguments
  2106. * or if the hwmod is in the wrong state.
  2107. */
  2108. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  2109. {
  2110. int ret;
  2111. unsigned long flags;
  2112. if (!oh)
  2113. return -EINVAL;
  2114. if (state != _HWMOD_STATE_DISABLED &&
  2115. state != _HWMOD_STATE_ENABLED &&
  2116. state != _HWMOD_STATE_IDLE)
  2117. return -EINVAL;
  2118. spin_lock_irqsave(&oh->_lock, flags);
  2119. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2120. ret = -EINVAL;
  2121. goto ohsps_unlock;
  2122. }
  2123. oh->_postsetup_state = state;
  2124. ret = 0;
  2125. ohsps_unlock:
  2126. spin_unlock_irqrestore(&oh->_lock, flags);
  2127. return ret;
  2128. }
  2129. /**
  2130. * omap_hwmod_get_context_loss_count - get lost context count
  2131. * @oh: struct omap_hwmod *
  2132. *
  2133. * Query the powerdomain of of @oh to get the context loss
  2134. * count for this device.
  2135. *
  2136. * Returns the context loss count of the powerdomain assocated with @oh
  2137. * upon success, or zero if no powerdomain exists for @oh.
  2138. */
  2139. u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  2140. {
  2141. struct powerdomain *pwrdm;
  2142. int ret = 0;
  2143. pwrdm = omap_hwmod_get_pwrdm(oh);
  2144. if (pwrdm)
  2145. ret = pwrdm_get_context_loss_count(pwrdm);
  2146. return ret;
  2147. }
  2148. /**
  2149. * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
  2150. * @oh: struct omap_hwmod *
  2151. *
  2152. * Prevent the hwmod @oh from being reset during the setup process.
  2153. * Intended for use by board-*.c files on boards with devices that
  2154. * cannot tolerate being reset. Must be called before the hwmod has
  2155. * been set up. Returns 0 upon success or negative error code upon
  2156. * failure.
  2157. */
  2158. int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
  2159. {
  2160. if (!oh)
  2161. return -EINVAL;
  2162. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2163. pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
  2164. oh->name);
  2165. return -EINVAL;
  2166. }
  2167. oh->flags |= HWMOD_INIT_NO_RESET;
  2168. return 0;
  2169. }