enic_main.c 61 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533
  1. /*
  2. * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
  3. * Copyright 2007 Nuova Systems, Inc. All rights reserved.
  4. *
  5. * This program is free software; you may redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  10. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  11. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  12. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  13. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  14. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  15. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  16. * SOFTWARE.
  17. *
  18. */
  19. #include <linux/module.h>
  20. #include <linux/kernel.h>
  21. #include <linux/string.h>
  22. #include <linux/errno.h>
  23. #include <linux/types.h>
  24. #include <linux/init.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/workqueue.h>
  27. #include <linux/pci.h>
  28. #include <linux/netdevice.h>
  29. #include <linux/etherdevice.h>
  30. #include <linux/if_ether.h>
  31. #include <linux/if_vlan.h>
  32. #include <linux/ethtool.h>
  33. #include <linux/in.h>
  34. #include <linux/ip.h>
  35. #include <linux/ipv6.h>
  36. #include <linux/tcp.h>
  37. #include <linux/rtnetlink.h>
  38. #include <linux/prefetch.h>
  39. #include <net/ip6_checksum.h>
  40. #include "cq_enet_desc.h"
  41. #include "vnic_dev.h"
  42. #include "vnic_intr.h"
  43. #include "vnic_stats.h"
  44. #include "vnic_vic.h"
  45. #include "enic_res.h"
  46. #include "enic.h"
  47. #include "enic_dev.h"
  48. #include "enic_pp.h"
  49. #define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ)
  50. #define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS)
  51. #define MAX_TSO (1 << 16)
  52. #define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
  53. #define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */
  54. #define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */
  55. /* Supported devices */
  56. static DEFINE_PCI_DEVICE_TABLE(enic_id_table) = {
  57. { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
  58. { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
  59. { 0, } /* end of table */
  60. };
  61. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  62. MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
  63. MODULE_LICENSE("GPL");
  64. MODULE_VERSION(DRV_VERSION);
  65. MODULE_DEVICE_TABLE(pci, enic_id_table);
  66. struct enic_stat {
  67. char name[ETH_GSTRING_LEN];
  68. unsigned int offset;
  69. };
  70. #define ENIC_TX_STAT(stat) \
  71. { .name = #stat, .offset = offsetof(struct vnic_tx_stats, stat) / 8 }
  72. #define ENIC_RX_STAT(stat) \
  73. { .name = #stat, .offset = offsetof(struct vnic_rx_stats, stat) / 8 }
  74. static const struct enic_stat enic_tx_stats[] = {
  75. ENIC_TX_STAT(tx_frames_ok),
  76. ENIC_TX_STAT(tx_unicast_frames_ok),
  77. ENIC_TX_STAT(tx_multicast_frames_ok),
  78. ENIC_TX_STAT(tx_broadcast_frames_ok),
  79. ENIC_TX_STAT(tx_bytes_ok),
  80. ENIC_TX_STAT(tx_unicast_bytes_ok),
  81. ENIC_TX_STAT(tx_multicast_bytes_ok),
  82. ENIC_TX_STAT(tx_broadcast_bytes_ok),
  83. ENIC_TX_STAT(tx_drops),
  84. ENIC_TX_STAT(tx_errors),
  85. ENIC_TX_STAT(tx_tso),
  86. };
  87. static const struct enic_stat enic_rx_stats[] = {
  88. ENIC_RX_STAT(rx_frames_ok),
  89. ENIC_RX_STAT(rx_frames_total),
  90. ENIC_RX_STAT(rx_unicast_frames_ok),
  91. ENIC_RX_STAT(rx_multicast_frames_ok),
  92. ENIC_RX_STAT(rx_broadcast_frames_ok),
  93. ENIC_RX_STAT(rx_bytes_ok),
  94. ENIC_RX_STAT(rx_unicast_bytes_ok),
  95. ENIC_RX_STAT(rx_multicast_bytes_ok),
  96. ENIC_RX_STAT(rx_broadcast_bytes_ok),
  97. ENIC_RX_STAT(rx_drop),
  98. ENIC_RX_STAT(rx_no_bufs),
  99. ENIC_RX_STAT(rx_errors),
  100. ENIC_RX_STAT(rx_rss),
  101. ENIC_RX_STAT(rx_crc_errors),
  102. ENIC_RX_STAT(rx_frames_64),
  103. ENIC_RX_STAT(rx_frames_127),
  104. ENIC_RX_STAT(rx_frames_255),
  105. ENIC_RX_STAT(rx_frames_511),
  106. ENIC_RX_STAT(rx_frames_1023),
  107. ENIC_RX_STAT(rx_frames_1518),
  108. ENIC_RX_STAT(rx_frames_to_max),
  109. };
  110. static const unsigned int enic_n_tx_stats = ARRAY_SIZE(enic_tx_stats);
  111. static const unsigned int enic_n_rx_stats = ARRAY_SIZE(enic_rx_stats);
  112. static int enic_is_dynamic(struct enic *enic)
  113. {
  114. return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
  115. }
  116. static inline unsigned int enic_cq_rq(struct enic *enic, unsigned int rq)
  117. {
  118. return rq;
  119. }
  120. static inline unsigned int enic_cq_wq(struct enic *enic, unsigned int wq)
  121. {
  122. return enic->rq_count + wq;
  123. }
  124. static inline unsigned int enic_legacy_io_intr(void)
  125. {
  126. return 0;
  127. }
  128. static inline unsigned int enic_legacy_err_intr(void)
  129. {
  130. return 1;
  131. }
  132. static inline unsigned int enic_legacy_notify_intr(void)
  133. {
  134. return 2;
  135. }
  136. static inline unsigned int enic_msix_rq_intr(struct enic *enic, unsigned int rq)
  137. {
  138. return enic->cq[enic_cq_rq(enic, rq)].interrupt_offset;
  139. }
  140. static inline unsigned int enic_msix_wq_intr(struct enic *enic, unsigned int wq)
  141. {
  142. return enic->cq[enic_cq_wq(enic, wq)].interrupt_offset;
  143. }
  144. static inline unsigned int enic_msix_err_intr(struct enic *enic)
  145. {
  146. return enic->rq_count + enic->wq_count;
  147. }
  148. static inline unsigned int enic_msix_notify_intr(struct enic *enic)
  149. {
  150. return enic->rq_count + enic->wq_count + 1;
  151. }
  152. static int enic_get_settings(struct net_device *netdev,
  153. struct ethtool_cmd *ecmd)
  154. {
  155. struct enic *enic = netdev_priv(netdev);
  156. ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
  157. ecmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_FIBRE);
  158. ecmd->port = PORT_FIBRE;
  159. ecmd->transceiver = XCVR_EXTERNAL;
  160. if (netif_carrier_ok(netdev)) {
  161. ethtool_cmd_speed_set(ecmd, vnic_dev_port_speed(enic->vdev));
  162. ecmd->duplex = DUPLEX_FULL;
  163. } else {
  164. ethtool_cmd_speed_set(ecmd, -1);
  165. ecmd->duplex = -1;
  166. }
  167. ecmd->autoneg = AUTONEG_DISABLE;
  168. return 0;
  169. }
  170. static void enic_get_drvinfo(struct net_device *netdev,
  171. struct ethtool_drvinfo *drvinfo)
  172. {
  173. struct enic *enic = netdev_priv(netdev);
  174. struct vnic_devcmd_fw_info *fw_info;
  175. enic_dev_fw_info(enic, &fw_info);
  176. strncpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
  177. strncpy(drvinfo->version, DRV_VERSION, sizeof(drvinfo->version));
  178. strncpy(drvinfo->fw_version, fw_info->fw_version,
  179. sizeof(drvinfo->fw_version));
  180. strncpy(drvinfo->bus_info, pci_name(enic->pdev),
  181. sizeof(drvinfo->bus_info));
  182. }
  183. static void enic_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
  184. {
  185. unsigned int i;
  186. switch (stringset) {
  187. case ETH_SS_STATS:
  188. for (i = 0; i < enic_n_tx_stats; i++) {
  189. memcpy(data, enic_tx_stats[i].name, ETH_GSTRING_LEN);
  190. data += ETH_GSTRING_LEN;
  191. }
  192. for (i = 0; i < enic_n_rx_stats; i++) {
  193. memcpy(data, enic_rx_stats[i].name, ETH_GSTRING_LEN);
  194. data += ETH_GSTRING_LEN;
  195. }
  196. break;
  197. }
  198. }
  199. static int enic_get_sset_count(struct net_device *netdev, int sset)
  200. {
  201. switch (sset) {
  202. case ETH_SS_STATS:
  203. return enic_n_tx_stats + enic_n_rx_stats;
  204. default:
  205. return -EOPNOTSUPP;
  206. }
  207. }
  208. static void enic_get_ethtool_stats(struct net_device *netdev,
  209. struct ethtool_stats *stats, u64 *data)
  210. {
  211. struct enic *enic = netdev_priv(netdev);
  212. struct vnic_stats *vstats;
  213. unsigned int i;
  214. enic_dev_stats_dump(enic, &vstats);
  215. for (i = 0; i < enic_n_tx_stats; i++)
  216. *(data++) = ((u64 *)&vstats->tx)[enic_tx_stats[i].offset];
  217. for (i = 0; i < enic_n_rx_stats; i++)
  218. *(data++) = ((u64 *)&vstats->rx)[enic_rx_stats[i].offset];
  219. }
  220. static u32 enic_get_msglevel(struct net_device *netdev)
  221. {
  222. struct enic *enic = netdev_priv(netdev);
  223. return enic->msg_enable;
  224. }
  225. static void enic_set_msglevel(struct net_device *netdev, u32 value)
  226. {
  227. struct enic *enic = netdev_priv(netdev);
  228. enic->msg_enable = value;
  229. }
  230. static int enic_get_coalesce(struct net_device *netdev,
  231. struct ethtool_coalesce *ecmd)
  232. {
  233. struct enic *enic = netdev_priv(netdev);
  234. ecmd->tx_coalesce_usecs = enic->tx_coalesce_usecs;
  235. ecmd->rx_coalesce_usecs = enic->rx_coalesce_usecs;
  236. return 0;
  237. }
  238. static int enic_set_coalesce(struct net_device *netdev,
  239. struct ethtool_coalesce *ecmd)
  240. {
  241. struct enic *enic = netdev_priv(netdev);
  242. u32 tx_coalesce_usecs;
  243. u32 rx_coalesce_usecs;
  244. unsigned int i, intr;
  245. tx_coalesce_usecs = min_t(u32, ecmd->tx_coalesce_usecs,
  246. vnic_dev_get_intr_coal_timer_max(enic->vdev));
  247. rx_coalesce_usecs = min_t(u32, ecmd->rx_coalesce_usecs,
  248. vnic_dev_get_intr_coal_timer_max(enic->vdev));
  249. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  250. case VNIC_DEV_INTR_MODE_INTX:
  251. if (tx_coalesce_usecs != rx_coalesce_usecs)
  252. return -EINVAL;
  253. intr = enic_legacy_io_intr();
  254. vnic_intr_coalescing_timer_set(&enic->intr[intr],
  255. tx_coalesce_usecs);
  256. break;
  257. case VNIC_DEV_INTR_MODE_MSI:
  258. if (tx_coalesce_usecs != rx_coalesce_usecs)
  259. return -EINVAL;
  260. vnic_intr_coalescing_timer_set(&enic->intr[0],
  261. tx_coalesce_usecs);
  262. break;
  263. case VNIC_DEV_INTR_MODE_MSIX:
  264. for (i = 0; i < enic->wq_count; i++) {
  265. intr = enic_msix_wq_intr(enic, i);
  266. vnic_intr_coalescing_timer_set(&enic->intr[intr],
  267. tx_coalesce_usecs);
  268. }
  269. for (i = 0; i < enic->rq_count; i++) {
  270. intr = enic_msix_rq_intr(enic, i);
  271. vnic_intr_coalescing_timer_set(&enic->intr[intr],
  272. rx_coalesce_usecs);
  273. }
  274. break;
  275. default:
  276. break;
  277. }
  278. enic->tx_coalesce_usecs = tx_coalesce_usecs;
  279. enic->rx_coalesce_usecs = rx_coalesce_usecs;
  280. return 0;
  281. }
  282. static const struct ethtool_ops enic_ethtool_ops = {
  283. .get_settings = enic_get_settings,
  284. .get_drvinfo = enic_get_drvinfo,
  285. .get_msglevel = enic_get_msglevel,
  286. .set_msglevel = enic_set_msglevel,
  287. .get_link = ethtool_op_get_link,
  288. .get_strings = enic_get_strings,
  289. .get_sset_count = enic_get_sset_count,
  290. .get_ethtool_stats = enic_get_ethtool_stats,
  291. .get_coalesce = enic_get_coalesce,
  292. .set_coalesce = enic_set_coalesce,
  293. };
  294. static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
  295. {
  296. struct enic *enic = vnic_dev_priv(wq->vdev);
  297. if (buf->sop)
  298. pci_unmap_single(enic->pdev, buf->dma_addr,
  299. buf->len, PCI_DMA_TODEVICE);
  300. else
  301. pci_unmap_page(enic->pdev, buf->dma_addr,
  302. buf->len, PCI_DMA_TODEVICE);
  303. if (buf->os_buf)
  304. dev_kfree_skb_any(buf->os_buf);
  305. }
  306. static void enic_wq_free_buf(struct vnic_wq *wq,
  307. struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
  308. {
  309. enic_free_wq_buf(wq, buf);
  310. }
  311. static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
  312. u8 type, u16 q_number, u16 completed_index, void *opaque)
  313. {
  314. struct enic *enic = vnic_dev_priv(vdev);
  315. spin_lock(&enic->wq_lock[q_number]);
  316. vnic_wq_service(&enic->wq[q_number], cq_desc,
  317. completed_index, enic_wq_free_buf,
  318. opaque);
  319. if (netif_queue_stopped(enic->netdev) &&
  320. vnic_wq_desc_avail(&enic->wq[q_number]) >=
  321. (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
  322. netif_wake_queue(enic->netdev);
  323. spin_unlock(&enic->wq_lock[q_number]);
  324. return 0;
  325. }
  326. static void enic_log_q_error(struct enic *enic)
  327. {
  328. unsigned int i;
  329. u32 error_status;
  330. for (i = 0; i < enic->wq_count; i++) {
  331. error_status = vnic_wq_error_status(&enic->wq[i]);
  332. if (error_status)
  333. netdev_err(enic->netdev, "WQ[%d] error_status %d\n",
  334. i, error_status);
  335. }
  336. for (i = 0; i < enic->rq_count; i++) {
  337. error_status = vnic_rq_error_status(&enic->rq[i]);
  338. if (error_status)
  339. netdev_err(enic->netdev, "RQ[%d] error_status %d\n",
  340. i, error_status);
  341. }
  342. }
  343. static void enic_msglvl_check(struct enic *enic)
  344. {
  345. u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
  346. if (msg_enable != enic->msg_enable) {
  347. netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n",
  348. enic->msg_enable, msg_enable);
  349. enic->msg_enable = msg_enable;
  350. }
  351. }
  352. static void enic_mtu_check(struct enic *enic)
  353. {
  354. u32 mtu = vnic_dev_mtu(enic->vdev);
  355. struct net_device *netdev = enic->netdev;
  356. if (mtu && mtu != enic->port_mtu) {
  357. enic->port_mtu = mtu;
  358. if (enic_is_dynamic(enic)) {
  359. mtu = max_t(int, ENIC_MIN_MTU,
  360. min_t(int, ENIC_MAX_MTU, mtu));
  361. if (mtu != netdev->mtu)
  362. schedule_work(&enic->change_mtu_work);
  363. } else {
  364. if (mtu < netdev->mtu)
  365. netdev_warn(netdev,
  366. "interface MTU (%d) set higher "
  367. "than switch port MTU (%d)\n",
  368. netdev->mtu, mtu);
  369. }
  370. }
  371. }
  372. static void enic_link_check(struct enic *enic)
  373. {
  374. int link_status = vnic_dev_link_status(enic->vdev);
  375. int carrier_ok = netif_carrier_ok(enic->netdev);
  376. if (link_status && !carrier_ok) {
  377. netdev_info(enic->netdev, "Link UP\n");
  378. netif_carrier_on(enic->netdev);
  379. } else if (!link_status && carrier_ok) {
  380. netdev_info(enic->netdev, "Link DOWN\n");
  381. netif_carrier_off(enic->netdev);
  382. }
  383. }
  384. static void enic_notify_check(struct enic *enic)
  385. {
  386. enic_msglvl_check(enic);
  387. enic_mtu_check(enic);
  388. enic_link_check(enic);
  389. }
  390. #define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
  391. static irqreturn_t enic_isr_legacy(int irq, void *data)
  392. {
  393. struct net_device *netdev = data;
  394. struct enic *enic = netdev_priv(netdev);
  395. unsigned int io_intr = enic_legacy_io_intr();
  396. unsigned int err_intr = enic_legacy_err_intr();
  397. unsigned int notify_intr = enic_legacy_notify_intr();
  398. u32 pba;
  399. vnic_intr_mask(&enic->intr[io_intr]);
  400. pba = vnic_intr_legacy_pba(enic->legacy_pba);
  401. if (!pba) {
  402. vnic_intr_unmask(&enic->intr[io_intr]);
  403. return IRQ_NONE; /* not our interrupt */
  404. }
  405. if (ENIC_TEST_INTR(pba, notify_intr)) {
  406. vnic_intr_return_all_credits(&enic->intr[notify_intr]);
  407. enic_notify_check(enic);
  408. }
  409. if (ENIC_TEST_INTR(pba, err_intr)) {
  410. vnic_intr_return_all_credits(&enic->intr[err_intr]);
  411. enic_log_q_error(enic);
  412. /* schedule recovery from WQ/RQ error */
  413. schedule_work(&enic->reset);
  414. return IRQ_HANDLED;
  415. }
  416. if (ENIC_TEST_INTR(pba, io_intr)) {
  417. if (napi_schedule_prep(&enic->napi[0]))
  418. __napi_schedule(&enic->napi[0]);
  419. } else {
  420. vnic_intr_unmask(&enic->intr[io_intr]);
  421. }
  422. return IRQ_HANDLED;
  423. }
  424. static irqreturn_t enic_isr_msi(int irq, void *data)
  425. {
  426. struct enic *enic = data;
  427. /* With MSI, there is no sharing of interrupts, so this is
  428. * our interrupt and there is no need to ack it. The device
  429. * is not providing per-vector masking, so the OS will not
  430. * write to PCI config space to mask/unmask the interrupt.
  431. * We're using mask_on_assertion for MSI, so the device
  432. * automatically masks the interrupt when the interrupt is
  433. * generated. Later, when exiting polling, the interrupt
  434. * will be unmasked (see enic_poll).
  435. *
  436. * Also, the device uses the same PCIe Traffic Class (TC)
  437. * for Memory Write data and MSI, so there are no ordering
  438. * issues; the MSI will always arrive at the Root Complex
  439. * _after_ corresponding Memory Writes (i.e. descriptor
  440. * writes).
  441. */
  442. napi_schedule(&enic->napi[0]);
  443. return IRQ_HANDLED;
  444. }
  445. static irqreturn_t enic_isr_msix_rq(int irq, void *data)
  446. {
  447. struct napi_struct *napi = data;
  448. /* schedule NAPI polling for RQ cleanup */
  449. napi_schedule(napi);
  450. return IRQ_HANDLED;
  451. }
  452. static irqreturn_t enic_isr_msix_wq(int irq, void *data)
  453. {
  454. struct enic *enic = data;
  455. unsigned int cq = enic_cq_wq(enic, 0);
  456. unsigned int intr = enic_msix_wq_intr(enic, 0);
  457. unsigned int wq_work_to_do = -1; /* no limit */
  458. unsigned int wq_work_done;
  459. wq_work_done = vnic_cq_service(&enic->cq[cq],
  460. wq_work_to_do, enic_wq_service, NULL);
  461. vnic_intr_return_credits(&enic->intr[intr],
  462. wq_work_done,
  463. 1 /* unmask intr */,
  464. 1 /* reset intr timer */);
  465. return IRQ_HANDLED;
  466. }
  467. static irqreturn_t enic_isr_msix_err(int irq, void *data)
  468. {
  469. struct enic *enic = data;
  470. unsigned int intr = enic_msix_err_intr(enic);
  471. vnic_intr_return_all_credits(&enic->intr[intr]);
  472. enic_log_q_error(enic);
  473. /* schedule recovery from WQ/RQ error */
  474. schedule_work(&enic->reset);
  475. return IRQ_HANDLED;
  476. }
  477. static irqreturn_t enic_isr_msix_notify(int irq, void *data)
  478. {
  479. struct enic *enic = data;
  480. unsigned int intr = enic_msix_notify_intr(enic);
  481. vnic_intr_return_all_credits(&enic->intr[intr]);
  482. enic_notify_check(enic);
  483. return IRQ_HANDLED;
  484. }
  485. static inline void enic_queue_wq_skb_cont(struct enic *enic,
  486. struct vnic_wq *wq, struct sk_buff *skb,
  487. unsigned int len_left, int loopback)
  488. {
  489. skb_frag_t *frag;
  490. /* Queue additional data fragments */
  491. for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
  492. len_left -= frag->size;
  493. enic_queue_wq_desc_cont(wq, skb,
  494. pci_map_page(enic->pdev, frag->page,
  495. frag->page_offset, frag->size,
  496. PCI_DMA_TODEVICE),
  497. frag->size,
  498. (len_left == 0), /* EOP? */
  499. loopback);
  500. }
  501. }
  502. static inline void enic_queue_wq_skb_vlan(struct enic *enic,
  503. struct vnic_wq *wq, struct sk_buff *skb,
  504. int vlan_tag_insert, unsigned int vlan_tag, int loopback)
  505. {
  506. unsigned int head_len = skb_headlen(skb);
  507. unsigned int len_left = skb->len - head_len;
  508. int eop = (len_left == 0);
  509. /* Queue the main skb fragment. The fragments are no larger
  510. * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
  511. * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
  512. * per fragment is queued.
  513. */
  514. enic_queue_wq_desc(wq, skb,
  515. pci_map_single(enic->pdev, skb->data,
  516. head_len, PCI_DMA_TODEVICE),
  517. head_len,
  518. vlan_tag_insert, vlan_tag,
  519. eop, loopback);
  520. if (!eop)
  521. enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
  522. }
  523. static inline void enic_queue_wq_skb_csum_l4(struct enic *enic,
  524. struct vnic_wq *wq, struct sk_buff *skb,
  525. int vlan_tag_insert, unsigned int vlan_tag, int loopback)
  526. {
  527. unsigned int head_len = skb_headlen(skb);
  528. unsigned int len_left = skb->len - head_len;
  529. unsigned int hdr_len = skb_checksum_start_offset(skb);
  530. unsigned int csum_offset = hdr_len + skb->csum_offset;
  531. int eop = (len_left == 0);
  532. /* Queue the main skb fragment. The fragments are no larger
  533. * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
  534. * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
  535. * per fragment is queued.
  536. */
  537. enic_queue_wq_desc_csum_l4(wq, skb,
  538. pci_map_single(enic->pdev, skb->data,
  539. head_len, PCI_DMA_TODEVICE),
  540. head_len,
  541. csum_offset,
  542. hdr_len,
  543. vlan_tag_insert, vlan_tag,
  544. eop, loopback);
  545. if (!eop)
  546. enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
  547. }
  548. static inline void enic_queue_wq_skb_tso(struct enic *enic,
  549. struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss,
  550. int vlan_tag_insert, unsigned int vlan_tag, int loopback)
  551. {
  552. unsigned int frag_len_left = skb_headlen(skb);
  553. unsigned int len_left = skb->len - frag_len_left;
  554. unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  555. int eop = (len_left == 0);
  556. unsigned int len;
  557. dma_addr_t dma_addr;
  558. unsigned int offset = 0;
  559. skb_frag_t *frag;
  560. /* Preload TCP csum field with IP pseudo hdr calculated
  561. * with IP length set to zero. HW will later add in length
  562. * to each TCP segment resulting from the TSO.
  563. */
  564. if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
  565. ip_hdr(skb)->check = 0;
  566. tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
  567. ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
  568. } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
  569. tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
  570. &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
  571. }
  572. /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
  573. * for the main skb fragment
  574. */
  575. while (frag_len_left) {
  576. len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
  577. dma_addr = pci_map_single(enic->pdev, skb->data + offset,
  578. len, PCI_DMA_TODEVICE);
  579. enic_queue_wq_desc_tso(wq, skb,
  580. dma_addr,
  581. len,
  582. mss, hdr_len,
  583. vlan_tag_insert, vlan_tag,
  584. eop && (len == frag_len_left), loopback);
  585. frag_len_left -= len;
  586. offset += len;
  587. }
  588. if (eop)
  589. return;
  590. /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
  591. * for additional data fragments
  592. */
  593. for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
  594. len_left -= frag->size;
  595. frag_len_left = frag->size;
  596. offset = frag->page_offset;
  597. while (frag_len_left) {
  598. len = min(frag_len_left,
  599. (unsigned int)WQ_ENET_MAX_DESC_LEN);
  600. dma_addr = pci_map_page(enic->pdev, frag->page,
  601. offset, len,
  602. PCI_DMA_TODEVICE);
  603. enic_queue_wq_desc_cont(wq, skb,
  604. dma_addr,
  605. len,
  606. (len_left == 0) &&
  607. (len == frag_len_left), /* EOP? */
  608. loopback);
  609. frag_len_left -= len;
  610. offset += len;
  611. }
  612. }
  613. }
  614. static inline void enic_queue_wq_skb(struct enic *enic,
  615. struct vnic_wq *wq, struct sk_buff *skb)
  616. {
  617. unsigned int mss = skb_shinfo(skb)->gso_size;
  618. unsigned int vlan_tag = 0;
  619. int vlan_tag_insert = 0;
  620. int loopback = 0;
  621. if (vlan_tx_tag_present(skb)) {
  622. /* VLAN tag from trunking driver */
  623. vlan_tag_insert = 1;
  624. vlan_tag = vlan_tx_tag_get(skb);
  625. } else if (enic->loop_enable) {
  626. vlan_tag = enic->loop_tag;
  627. loopback = 1;
  628. }
  629. if (mss)
  630. enic_queue_wq_skb_tso(enic, wq, skb, mss,
  631. vlan_tag_insert, vlan_tag, loopback);
  632. else if (skb->ip_summed == CHECKSUM_PARTIAL)
  633. enic_queue_wq_skb_csum_l4(enic, wq, skb,
  634. vlan_tag_insert, vlan_tag, loopback);
  635. else
  636. enic_queue_wq_skb_vlan(enic, wq, skb,
  637. vlan_tag_insert, vlan_tag, loopback);
  638. }
  639. /* netif_tx_lock held, process context with BHs disabled, or BH */
  640. static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
  641. struct net_device *netdev)
  642. {
  643. struct enic *enic = netdev_priv(netdev);
  644. struct vnic_wq *wq = &enic->wq[0];
  645. unsigned long flags;
  646. if (skb->len <= 0) {
  647. dev_kfree_skb(skb);
  648. return NETDEV_TX_OK;
  649. }
  650. /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
  651. * which is very likely. In the off chance it's going to take
  652. * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
  653. */
  654. if (skb_shinfo(skb)->gso_size == 0 &&
  655. skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
  656. skb_linearize(skb)) {
  657. dev_kfree_skb(skb);
  658. return NETDEV_TX_OK;
  659. }
  660. spin_lock_irqsave(&enic->wq_lock[0], flags);
  661. if (vnic_wq_desc_avail(wq) <
  662. skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
  663. netif_stop_queue(netdev);
  664. /* This is a hard error, log it */
  665. netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");
  666. spin_unlock_irqrestore(&enic->wq_lock[0], flags);
  667. return NETDEV_TX_BUSY;
  668. }
  669. enic_queue_wq_skb(enic, wq, skb);
  670. if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
  671. netif_stop_queue(netdev);
  672. spin_unlock_irqrestore(&enic->wq_lock[0], flags);
  673. return NETDEV_TX_OK;
  674. }
  675. /* dev_base_lock rwlock held, nominally process context */
  676. static struct rtnl_link_stats64 *enic_get_stats(struct net_device *netdev,
  677. struct rtnl_link_stats64 *net_stats)
  678. {
  679. struct enic *enic = netdev_priv(netdev);
  680. struct vnic_stats *stats;
  681. enic_dev_stats_dump(enic, &stats);
  682. net_stats->tx_packets = stats->tx.tx_frames_ok;
  683. net_stats->tx_bytes = stats->tx.tx_bytes_ok;
  684. net_stats->tx_errors = stats->tx.tx_errors;
  685. net_stats->tx_dropped = stats->tx.tx_drops;
  686. net_stats->rx_packets = stats->rx.rx_frames_ok;
  687. net_stats->rx_bytes = stats->rx.rx_bytes_ok;
  688. net_stats->rx_errors = stats->rx.rx_errors;
  689. net_stats->multicast = stats->rx.rx_multicast_frames_ok;
  690. net_stats->rx_over_errors = enic->rq_truncated_pkts;
  691. net_stats->rx_crc_errors = enic->rq_bad_fcs;
  692. net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
  693. return net_stats;
  694. }
  695. void enic_reset_addr_lists(struct enic *enic)
  696. {
  697. enic->mc_count = 0;
  698. enic->uc_count = 0;
  699. enic->flags = 0;
  700. }
  701. static int enic_set_mac_addr(struct net_device *netdev, char *addr)
  702. {
  703. struct enic *enic = netdev_priv(netdev);
  704. if (enic_is_dynamic(enic)) {
  705. if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
  706. return -EADDRNOTAVAIL;
  707. } else {
  708. if (!is_valid_ether_addr(addr))
  709. return -EADDRNOTAVAIL;
  710. }
  711. memcpy(netdev->dev_addr, addr, netdev->addr_len);
  712. return 0;
  713. }
  714. static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
  715. {
  716. struct enic *enic = netdev_priv(netdev);
  717. struct sockaddr *saddr = p;
  718. char *addr = saddr->sa_data;
  719. int err;
  720. if (netif_running(enic->netdev)) {
  721. err = enic_dev_del_station_addr(enic);
  722. if (err)
  723. return err;
  724. }
  725. err = enic_set_mac_addr(netdev, addr);
  726. if (err)
  727. return err;
  728. if (netif_running(enic->netdev)) {
  729. err = enic_dev_add_station_addr(enic);
  730. if (err)
  731. return err;
  732. }
  733. return err;
  734. }
  735. static int enic_set_mac_address(struct net_device *netdev, void *p)
  736. {
  737. struct sockaddr *saddr = p;
  738. char *addr = saddr->sa_data;
  739. struct enic *enic = netdev_priv(netdev);
  740. int err;
  741. err = enic_dev_del_station_addr(enic);
  742. if (err)
  743. return err;
  744. err = enic_set_mac_addr(netdev, addr);
  745. if (err)
  746. return err;
  747. return enic_dev_add_station_addr(enic);
  748. }
  749. static void enic_update_multicast_addr_list(struct enic *enic)
  750. {
  751. struct net_device *netdev = enic->netdev;
  752. struct netdev_hw_addr *ha;
  753. unsigned int mc_count = netdev_mc_count(netdev);
  754. u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
  755. unsigned int i, j;
  756. if (mc_count > ENIC_MULTICAST_PERFECT_FILTERS) {
  757. netdev_warn(netdev, "Registering only %d out of %d "
  758. "multicast addresses\n",
  759. ENIC_MULTICAST_PERFECT_FILTERS, mc_count);
  760. mc_count = ENIC_MULTICAST_PERFECT_FILTERS;
  761. }
  762. /* Is there an easier way? Trying to minimize to
  763. * calls to add/del multicast addrs. We keep the
  764. * addrs from the last call in enic->mc_addr and
  765. * look for changes to add/del.
  766. */
  767. i = 0;
  768. netdev_for_each_mc_addr(ha, netdev) {
  769. if (i == mc_count)
  770. break;
  771. memcpy(mc_addr[i++], ha->addr, ETH_ALEN);
  772. }
  773. for (i = 0; i < enic->mc_count; i++) {
  774. for (j = 0; j < mc_count; j++)
  775. if (compare_ether_addr(enic->mc_addr[i],
  776. mc_addr[j]) == 0)
  777. break;
  778. if (j == mc_count)
  779. enic_dev_del_addr(enic, enic->mc_addr[i]);
  780. }
  781. for (i = 0; i < mc_count; i++) {
  782. for (j = 0; j < enic->mc_count; j++)
  783. if (compare_ether_addr(mc_addr[i],
  784. enic->mc_addr[j]) == 0)
  785. break;
  786. if (j == enic->mc_count)
  787. enic_dev_add_addr(enic, mc_addr[i]);
  788. }
  789. /* Save the list to compare against next time
  790. */
  791. for (i = 0; i < mc_count; i++)
  792. memcpy(enic->mc_addr[i], mc_addr[i], ETH_ALEN);
  793. enic->mc_count = mc_count;
  794. }
  795. static void enic_update_unicast_addr_list(struct enic *enic)
  796. {
  797. struct net_device *netdev = enic->netdev;
  798. struct netdev_hw_addr *ha;
  799. unsigned int uc_count = netdev_uc_count(netdev);
  800. u8 uc_addr[ENIC_UNICAST_PERFECT_FILTERS][ETH_ALEN];
  801. unsigned int i, j;
  802. if (uc_count > ENIC_UNICAST_PERFECT_FILTERS) {
  803. netdev_warn(netdev, "Registering only %d out of %d "
  804. "unicast addresses\n",
  805. ENIC_UNICAST_PERFECT_FILTERS, uc_count);
  806. uc_count = ENIC_UNICAST_PERFECT_FILTERS;
  807. }
  808. /* Is there an easier way? Trying to minimize to
  809. * calls to add/del unicast addrs. We keep the
  810. * addrs from the last call in enic->uc_addr and
  811. * look for changes to add/del.
  812. */
  813. i = 0;
  814. netdev_for_each_uc_addr(ha, netdev) {
  815. if (i == uc_count)
  816. break;
  817. memcpy(uc_addr[i++], ha->addr, ETH_ALEN);
  818. }
  819. for (i = 0; i < enic->uc_count; i++) {
  820. for (j = 0; j < uc_count; j++)
  821. if (compare_ether_addr(enic->uc_addr[i],
  822. uc_addr[j]) == 0)
  823. break;
  824. if (j == uc_count)
  825. enic_dev_del_addr(enic, enic->uc_addr[i]);
  826. }
  827. for (i = 0; i < uc_count; i++) {
  828. for (j = 0; j < enic->uc_count; j++)
  829. if (compare_ether_addr(uc_addr[i],
  830. enic->uc_addr[j]) == 0)
  831. break;
  832. if (j == enic->uc_count)
  833. enic_dev_add_addr(enic, uc_addr[i]);
  834. }
  835. /* Save the list to compare against next time
  836. */
  837. for (i = 0; i < uc_count; i++)
  838. memcpy(enic->uc_addr[i], uc_addr[i], ETH_ALEN);
  839. enic->uc_count = uc_count;
  840. }
  841. /* netif_tx_lock held, BHs disabled */
  842. static void enic_set_rx_mode(struct net_device *netdev)
  843. {
  844. struct enic *enic = netdev_priv(netdev);
  845. int directed = 1;
  846. int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
  847. int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
  848. int promisc = (netdev->flags & IFF_PROMISC) ||
  849. netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS;
  850. int allmulti = (netdev->flags & IFF_ALLMULTI) ||
  851. netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS;
  852. unsigned int flags = netdev->flags |
  853. (allmulti ? IFF_ALLMULTI : 0) |
  854. (promisc ? IFF_PROMISC : 0);
  855. if (enic->flags != flags) {
  856. enic->flags = flags;
  857. enic_dev_packet_filter(enic, directed,
  858. multicast, broadcast, promisc, allmulti);
  859. }
  860. if (!promisc) {
  861. enic_update_unicast_addr_list(enic);
  862. if (!allmulti)
  863. enic_update_multicast_addr_list(enic);
  864. }
  865. }
  866. /* rtnl lock is held */
  867. static void enic_vlan_rx_register(struct net_device *netdev,
  868. struct vlan_group *vlan_group)
  869. {
  870. struct enic *enic = netdev_priv(netdev);
  871. enic->vlan_group = vlan_group;
  872. }
  873. /* netif_tx_lock held, BHs disabled */
  874. static void enic_tx_timeout(struct net_device *netdev)
  875. {
  876. struct enic *enic = netdev_priv(netdev);
  877. schedule_work(&enic->reset);
  878. }
  879. static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
  880. {
  881. struct enic *enic = netdev_priv(netdev);
  882. if (vf != PORT_SELF_VF)
  883. return -EOPNOTSUPP;
  884. /* Ignore the vf argument for now. We can assume the request
  885. * is coming on a vf.
  886. */
  887. if (is_valid_ether_addr(mac)) {
  888. memcpy(enic->pp.vf_mac, mac, ETH_ALEN);
  889. return 0;
  890. } else
  891. return -EINVAL;
  892. }
  893. static int enic_set_vf_port(struct net_device *netdev, int vf,
  894. struct nlattr *port[])
  895. {
  896. struct enic *enic = netdev_priv(netdev);
  897. struct enic_port_profile prev_pp;
  898. int err = 0, restore_pp = 1;
  899. /* don't support VFs, yet */
  900. if (vf != PORT_SELF_VF)
  901. return -EOPNOTSUPP;
  902. if (!port[IFLA_PORT_REQUEST])
  903. return -EOPNOTSUPP;
  904. memcpy(&prev_pp, &enic->pp, sizeof(enic->pp));
  905. memset(&enic->pp, 0, sizeof(enic->pp));
  906. enic->pp.set |= ENIC_SET_REQUEST;
  907. enic->pp.request = nla_get_u8(port[IFLA_PORT_REQUEST]);
  908. if (port[IFLA_PORT_PROFILE]) {
  909. enic->pp.set |= ENIC_SET_NAME;
  910. memcpy(enic->pp.name, nla_data(port[IFLA_PORT_PROFILE]),
  911. PORT_PROFILE_MAX);
  912. }
  913. if (port[IFLA_PORT_INSTANCE_UUID]) {
  914. enic->pp.set |= ENIC_SET_INSTANCE;
  915. memcpy(enic->pp.instance_uuid,
  916. nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX);
  917. }
  918. if (port[IFLA_PORT_HOST_UUID]) {
  919. enic->pp.set |= ENIC_SET_HOST;
  920. memcpy(enic->pp.host_uuid,
  921. nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX);
  922. }
  923. /* Special case handling: mac came from IFLA_VF_MAC */
  924. if (!is_zero_ether_addr(prev_pp.vf_mac))
  925. memcpy(enic->pp.mac_addr, prev_pp.vf_mac, ETH_ALEN);
  926. if (is_zero_ether_addr(netdev->dev_addr))
  927. random_ether_addr(netdev->dev_addr);
  928. err = enic_process_set_pp_request(enic, &prev_pp, &restore_pp);
  929. if (err) {
  930. if (restore_pp) {
  931. /* Things are still the way they were: Implicit
  932. * DISASSOCIATE failed
  933. */
  934. memcpy(&enic->pp, &prev_pp, sizeof(enic->pp));
  935. } else {
  936. memset(&enic->pp, 0, sizeof(enic->pp));
  937. memset(netdev->dev_addr, 0, ETH_ALEN);
  938. }
  939. } else {
  940. /* Set flag to indicate that the port assoc/disassoc
  941. * request has been sent out to fw
  942. */
  943. enic->pp.set |= ENIC_PORT_REQUEST_APPLIED;
  944. /* If DISASSOCIATE, clean up all assigned/saved macaddresses */
  945. if (enic->pp.request == PORT_REQUEST_DISASSOCIATE) {
  946. memset(enic->pp.mac_addr, 0, ETH_ALEN);
  947. memset(netdev->dev_addr, 0, ETH_ALEN);
  948. }
  949. }
  950. memset(enic->pp.vf_mac, 0, ETH_ALEN);
  951. return err;
  952. }
  953. static int enic_get_vf_port(struct net_device *netdev, int vf,
  954. struct sk_buff *skb)
  955. {
  956. struct enic *enic = netdev_priv(netdev);
  957. u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
  958. int err;
  959. if (!(enic->pp.set & ENIC_PORT_REQUEST_APPLIED))
  960. return -ENODATA;
  961. err = enic_process_get_pp_request(enic, enic->pp.request, &response);
  962. if (err)
  963. return err;
  964. NLA_PUT_U16(skb, IFLA_PORT_REQUEST, enic->pp.request);
  965. NLA_PUT_U16(skb, IFLA_PORT_RESPONSE, response);
  966. if (enic->pp.set & ENIC_SET_NAME)
  967. NLA_PUT(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX,
  968. enic->pp.name);
  969. if (enic->pp.set & ENIC_SET_INSTANCE)
  970. NLA_PUT(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
  971. enic->pp.instance_uuid);
  972. if (enic->pp.set & ENIC_SET_HOST)
  973. NLA_PUT(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX,
  974. enic->pp.host_uuid);
  975. return 0;
  976. nla_put_failure:
  977. return -EMSGSIZE;
  978. }
  979. static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
  980. {
  981. struct enic *enic = vnic_dev_priv(rq->vdev);
  982. if (!buf->os_buf)
  983. return;
  984. pci_unmap_single(enic->pdev, buf->dma_addr,
  985. buf->len, PCI_DMA_FROMDEVICE);
  986. dev_kfree_skb_any(buf->os_buf);
  987. }
  988. static int enic_rq_alloc_buf(struct vnic_rq *rq)
  989. {
  990. struct enic *enic = vnic_dev_priv(rq->vdev);
  991. struct net_device *netdev = enic->netdev;
  992. struct sk_buff *skb;
  993. unsigned int len = netdev->mtu + VLAN_ETH_HLEN;
  994. unsigned int os_buf_index = 0;
  995. dma_addr_t dma_addr;
  996. skb = netdev_alloc_skb_ip_align(netdev, len);
  997. if (!skb)
  998. return -ENOMEM;
  999. dma_addr = pci_map_single(enic->pdev, skb->data,
  1000. len, PCI_DMA_FROMDEVICE);
  1001. enic_queue_rq_desc(rq, skb, os_buf_index,
  1002. dma_addr, len);
  1003. return 0;
  1004. }
  1005. static void enic_rq_indicate_buf(struct vnic_rq *rq,
  1006. struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
  1007. int skipped, void *opaque)
  1008. {
  1009. struct enic *enic = vnic_dev_priv(rq->vdev);
  1010. struct net_device *netdev = enic->netdev;
  1011. struct sk_buff *skb;
  1012. u8 type, color, eop, sop, ingress_port, vlan_stripped;
  1013. u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
  1014. u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
  1015. u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
  1016. u8 packet_error;
  1017. u16 q_number, completed_index, bytes_written, vlan_tci, checksum;
  1018. u32 rss_hash;
  1019. if (skipped)
  1020. return;
  1021. skb = buf->os_buf;
  1022. prefetch(skb->data - NET_IP_ALIGN);
  1023. pci_unmap_single(enic->pdev, buf->dma_addr,
  1024. buf->len, PCI_DMA_FROMDEVICE);
  1025. cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
  1026. &type, &color, &q_number, &completed_index,
  1027. &ingress_port, &fcoe, &eop, &sop, &rss_type,
  1028. &csum_not_calc, &rss_hash, &bytes_written,
  1029. &packet_error, &vlan_stripped, &vlan_tci, &checksum,
  1030. &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
  1031. &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
  1032. &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
  1033. &fcs_ok);
  1034. if (packet_error) {
  1035. if (!fcs_ok) {
  1036. if (bytes_written > 0)
  1037. enic->rq_bad_fcs++;
  1038. else if (bytes_written == 0)
  1039. enic->rq_truncated_pkts++;
  1040. }
  1041. dev_kfree_skb_any(skb);
  1042. return;
  1043. }
  1044. if (eop && bytes_written > 0) {
  1045. /* Good receive
  1046. */
  1047. skb_put(skb, bytes_written);
  1048. skb->protocol = eth_type_trans(skb, netdev);
  1049. if ((netdev->features & NETIF_F_RXCSUM) && !csum_not_calc) {
  1050. skb->csum = htons(checksum);
  1051. skb->ip_summed = CHECKSUM_COMPLETE;
  1052. }
  1053. skb->dev = netdev;
  1054. if (vlan_stripped) {
  1055. if (netdev->features & NETIF_F_GRO)
  1056. vlan_gro_receive(&enic->napi[q_number],
  1057. enic->vlan_group, vlan_tci, skb);
  1058. else
  1059. vlan_hwaccel_receive_skb(skb,
  1060. enic->vlan_group, vlan_tci);
  1061. } else {
  1062. if (netdev->features & NETIF_F_GRO)
  1063. napi_gro_receive(&enic->napi[q_number], skb);
  1064. else
  1065. netif_receive_skb(skb);
  1066. }
  1067. } else {
  1068. /* Buffer overflow
  1069. */
  1070. dev_kfree_skb_any(skb);
  1071. }
  1072. }
  1073. static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
  1074. u8 type, u16 q_number, u16 completed_index, void *opaque)
  1075. {
  1076. struct enic *enic = vnic_dev_priv(vdev);
  1077. vnic_rq_service(&enic->rq[q_number], cq_desc,
  1078. completed_index, VNIC_RQ_RETURN_DESC,
  1079. enic_rq_indicate_buf, opaque);
  1080. return 0;
  1081. }
  1082. static int enic_poll(struct napi_struct *napi, int budget)
  1083. {
  1084. struct net_device *netdev = napi->dev;
  1085. struct enic *enic = netdev_priv(netdev);
  1086. unsigned int cq_rq = enic_cq_rq(enic, 0);
  1087. unsigned int cq_wq = enic_cq_wq(enic, 0);
  1088. unsigned int intr = enic_legacy_io_intr();
  1089. unsigned int rq_work_to_do = budget;
  1090. unsigned int wq_work_to_do = -1; /* no limit */
  1091. unsigned int work_done, rq_work_done, wq_work_done;
  1092. int err;
  1093. /* Service RQ (first) and WQ
  1094. */
  1095. rq_work_done = vnic_cq_service(&enic->cq[cq_rq],
  1096. rq_work_to_do, enic_rq_service, NULL);
  1097. wq_work_done = vnic_cq_service(&enic->cq[cq_wq],
  1098. wq_work_to_do, enic_wq_service, NULL);
  1099. /* Accumulate intr event credits for this polling
  1100. * cycle. An intr event is the completion of a
  1101. * a WQ or RQ packet.
  1102. */
  1103. work_done = rq_work_done + wq_work_done;
  1104. if (work_done > 0)
  1105. vnic_intr_return_credits(&enic->intr[intr],
  1106. work_done,
  1107. 0 /* don't unmask intr */,
  1108. 0 /* don't reset intr timer */);
  1109. err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
  1110. /* Buffer allocation failed. Stay in polling
  1111. * mode so we can try to fill the ring again.
  1112. */
  1113. if (err)
  1114. rq_work_done = rq_work_to_do;
  1115. if (rq_work_done < rq_work_to_do) {
  1116. /* Some work done, but not enough to stay in polling,
  1117. * exit polling
  1118. */
  1119. napi_complete(napi);
  1120. vnic_intr_unmask(&enic->intr[intr]);
  1121. }
  1122. return rq_work_done;
  1123. }
  1124. static int enic_poll_msix(struct napi_struct *napi, int budget)
  1125. {
  1126. struct net_device *netdev = napi->dev;
  1127. struct enic *enic = netdev_priv(netdev);
  1128. unsigned int rq = (napi - &enic->napi[0]);
  1129. unsigned int cq = enic_cq_rq(enic, rq);
  1130. unsigned int intr = enic_msix_rq_intr(enic, rq);
  1131. unsigned int work_to_do = budget;
  1132. unsigned int work_done;
  1133. int err;
  1134. /* Service RQ
  1135. */
  1136. work_done = vnic_cq_service(&enic->cq[cq],
  1137. work_to_do, enic_rq_service, NULL);
  1138. /* Return intr event credits for this polling
  1139. * cycle. An intr event is the completion of a
  1140. * RQ packet.
  1141. */
  1142. if (work_done > 0)
  1143. vnic_intr_return_credits(&enic->intr[intr],
  1144. work_done,
  1145. 0 /* don't unmask intr */,
  1146. 0 /* don't reset intr timer */);
  1147. err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf);
  1148. /* Buffer allocation failed. Stay in polling mode
  1149. * so we can try to fill the ring again.
  1150. */
  1151. if (err)
  1152. work_done = work_to_do;
  1153. if (work_done < work_to_do) {
  1154. /* Some work done, but not enough to stay in polling,
  1155. * exit polling
  1156. */
  1157. napi_complete(napi);
  1158. vnic_intr_unmask(&enic->intr[intr]);
  1159. }
  1160. return work_done;
  1161. }
  1162. static void enic_notify_timer(unsigned long data)
  1163. {
  1164. struct enic *enic = (struct enic *)data;
  1165. enic_notify_check(enic);
  1166. mod_timer(&enic->notify_timer,
  1167. round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
  1168. }
  1169. static void enic_free_intr(struct enic *enic)
  1170. {
  1171. struct net_device *netdev = enic->netdev;
  1172. unsigned int i;
  1173. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1174. case VNIC_DEV_INTR_MODE_INTX:
  1175. free_irq(enic->pdev->irq, netdev);
  1176. break;
  1177. case VNIC_DEV_INTR_MODE_MSI:
  1178. free_irq(enic->pdev->irq, enic);
  1179. break;
  1180. case VNIC_DEV_INTR_MODE_MSIX:
  1181. for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
  1182. if (enic->msix[i].requested)
  1183. free_irq(enic->msix_entry[i].vector,
  1184. enic->msix[i].devid);
  1185. break;
  1186. default:
  1187. break;
  1188. }
  1189. }
  1190. static int enic_request_intr(struct enic *enic)
  1191. {
  1192. struct net_device *netdev = enic->netdev;
  1193. unsigned int i, intr;
  1194. int err = 0;
  1195. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1196. case VNIC_DEV_INTR_MODE_INTX:
  1197. err = request_irq(enic->pdev->irq, enic_isr_legacy,
  1198. IRQF_SHARED, netdev->name, netdev);
  1199. break;
  1200. case VNIC_DEV_INTR_MODE_MSI:
  1201. err = request_irq(enic->pdev->irq, enic_isr_msi,
  1202. 0, netdev->name, enic);
  1203. break;
  1204. case VNIC_DEV_INTR_MODE_MSIX:
  1205. for (i = 0; i < enic->rq_count; i++) {
  1206. intr = enic_msix_rq_intr(enic, i);
  1207. sprintf(enic->msix[intr].devname,
  1208. "%.11s-rx-%d", netdev->name, i);
  1209. enic->msix[intr].isr = enic_isr_msix_rq;
  1210. enic->msix[intr].devid = &enic->napi[i];
  1211. }
  1212. for (i = 0; i < enic->wq_count; i++) {
  1213. intr = enic_msix_wq_intr(enic, i);
  1214. sprintf(enic->msix[intr].devname,
  1215. "%.11s-tx-%d", netdev->name, i);
  1216. enic->msix[intr].isr = enic_isr_msix_wq;
  1217. enic->msix[intr].devid = enic;
  1218. }
  1219. intr = enic_msix_err_intr(enic);
  1220. sprintf(enic->msix[intr].devname,
  1221. "%.11s-err", netdev->name);
  1222. enic->msix[intr].isr = enic_isr_msix_err;
  1223. enic->msix[intr].devid = enic;
  1224. intr = enic_msix_notify_intr(enic);
  1225. sprintf(enic->msix[intr].devname,
  1226. "%.11s-notify", netdev->name);
  1227. enic->msix[intr].isr = enic_isr_msix_notify;
  1228. enic->msix[intr].devid = enic;
  1229. for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
  1230. enic->msix[i].requested = 0;
  1231. for (i = 0; i < enic->intr_count; i++) {
  1232. err = request_irq(enic->msix_entry[i].vector,
  1233. enic->msix[i].isr, 0,
  1234. enic->msix[i].devname,
  1235. enic->msix[i].devid);
  1236. if (err) {
  1237. enic_free_intr(enic);
  1238. break;
  1239. }
  1240. enic->msix[i].requested = 1;
  1241. }
  1242. break;
  1243. default:
  1244. break;
  1245. }
  1246. return err;
  1247. }
  1248. static void enic_synchronize_irqs(struct enic *enic)
  1249. {
  1250. unsigned int i;
  1251. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1252. case VNIC_DEV_INTR_MODE_INTX:
  1253. case VNIC_DEV_INTR_MODE_MSI:
  1254. synchronize_irq(enic->pdev->irq);
  1255. break;
  1256. case VNIC_DEV_INTR_MODE_MSIX:
  1257. for (i = 0; i < enic->intr_count; i++)
  1258. synchronize_irq(enic->msix_entry[i].vector);
  1259. break;
  1260. default:
  1261. break;
  1262. }
  1263. }
  1264. static int enic_dev_notify_set(struct enic *enic)
  1265. {
  1266. int err;
  1267. spin_lock(&enic->devcmd_lock);
  1268. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1269. case VNIC_DEV_INTR_MODE_INTX:
  1270. err = vnic_dev_notify_set(enic->vdev,
  1271. enic_legacy_notify_intr());
  1272. break;
  1273. case VNIC_DEV_INTR_MODE_MSIX:
  1274. err = vnic_dev_notify_set(enic->vdev,
  1275. enic_msix_notify_intr(enic));
  1276. break;
  1277. default:
  1278. err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
  1279. break;
  1280. }
  1281. spin_unlock(&enic->devcmd_lock);
  1282. return err;
  1283. }
  1284. static void enic_notify_timer_start(struct enic *enic)
  1285. {
  1286. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1287. case VNIC_DEV_INTR_MODE_MSI:
  1288. mod_timer(&enic->notify_timer, jiffies);
  1289. break;
  1290. default:
  1291. /* Using intr for notification for INTx/MSI-X */
  1292. break;
  1293. }
  1294. }
  1295. /* rtnl lock is held, process context */
  1296. static int enic_open(struct net_device *netdev)
  1297. {
  1298. struct enic *enic = netdev_priv(netdev);
  1299. unsigned int i;
  1300. int err;
  1301. err = enic_request_intr(enic);
  1302. if (err) {
  1303. netdev_err(netdev, "Unable to request irq.\n");
  1304. return err;
  1305. }
  1306. err = enic_dev_notify_set(enic);
  1307. if (err) {
  1308. netdev_err(netdev,
  1309. "Failed to alloc notify buffer, aborting.\n");
  1310. goto err_out_free_intr;
  1311. }
  1312. for (i = 0; i < enic->rq_count; i++) {
  1313. vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf);
  1314. /* Need at least one buffer on ring to get going */
  1315. if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
  1316. netdev_err(netdev, "Unable to alloc receive buffers\n");
  1317. err = -ENOMEM;
  1318. goto err_out_notify_unset;
  1319. }
  1320. }
  1321. for (i = 0; i < enic->wq_count; i++)
  1322. vnic_wq_enable(&enic->wq[i]);
  1323. for (i = 0; i < enic->rq_count; i++)
  1324. vnic_rq_enable(&enic->rq[i]);
  1325. if (enic_is_dynamic(enic) && !is_zero_ether_addr(enic->pp.mac_addr))
  1326. enic_dev_add_addr(enic, enic->pp.mac_addr);
  1327. else
  1328. enic_dev_add_station_addr(enic);
  1329. enic_set_rx_mode(netdev);
  1330. netif_wake_queue(netdev);
  1331. for (i = 0; i < enic->rq_count; i++)
  1332. napi_enable(&enic->napi[i]);
  1333. enic_dev_enable(enic);
  1334. for (i = 0; i < enic->intr_count; i++)
  1335. vnic_intr_unmask(&enic->intr[i]);
  1336. enic_notify_timer_start(enic);
  1337. return 0;
  1338. err_out_notify_unset:
  1339. enic_dev_notify_unset(enic);
  1340. err_out_free_intr:
  1341. enic_free_intr(enic);
  1342. return err;
  1343. }
  1344. /* rtnl lock is held, process context */
  1345. static int enic_stop(struct net_device *netdev)
  1346. {
  1347. struct enic *enic = netdev_priv(netdev);
  1348. unsigned int i;
  1349. int err;
  1350. for (i = 0; i < enic->intr_count; i++) {
  1351. vnic_intr_mask(&enic->intr[i]);
  1352. (void)vnic_intr_masked(&enic->intr[i]); /* flush write */
  1353. }
  1354. enic_synchronize_irqs(enic);
  1355. del_timer_sync(&enic->notify_timer);
  1356. enic_dev_disable(enic);
  1357. for (i = 0; i < enic->rq_count; i++)
  1358. napi_disable(&enic->napi[i]);
  1359. netif_carrier_off(netdev);
  1360. netif_tx_disable(netdev);
  1361. if (enic_is_dynamic(enic) && !is_zero_ether_addr(enic->pp.mac_addr))
  1362. enic_dev_del_addr(enic, enic->pp.mac_addr);
  1363. else
  1364. enic_dev_del_station_addr(enic);
  1365. for (i = 0; i < enic->wq_count; i++) {
  1366. err = vnic_wq_disable(&enic->wq[i]);
  1367. if (err)
  1368. return err;
  1369. }
  1370. for (i = 0; i < enic->rq_count; i++) {
  1371. err = vnic_rq_disable(&enic->rq[i]);
  1372. if (err)
  1373. return err;
  1374. }
  1375. enic_dev_notify_unset(enic);
  1376. enic_free_intr(enic);
  1377. for (i = 0; i < enic->wq_count; i++)
  1378. vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
  1379. for (i = 0; i < enic->rq_count; i++)
  1380. vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
  1381. for (i = 0; i < enic->cq_count; i++)
  1382. vnic_cq_clean(&enic->cq[i]);
  1383. for (i = 0; i < enic->intr_count; i++)
  1384. vnic_intr_clean(&enic->intr[i]);
  1385. return 0;
  1386. }
  1387. static int enic_change_mtu(struct net_device *netdev, int new_mtu)
  1388. {
  1389. struct enic *enic = netdev_priv(netdev);
  1390. int running = netif_running(netdev);
  1391. if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
  1392. return -EINVAL;
  1393. if (enic_is_dynamic(enic))
  1394. return -EOPNOTSUPP;
  1395. if (running)
  1396. enic_stop(netdev);
  1397. netdev->mtu = new_mtu;
  1398. if (netdev->mtu > enic->port_mtu)
  1399. netdev_warn(netdev,
  1400. "interface MTU (%d) set higher than port MTU (%d)\n",
  1401. netdev->mtu, enic->port_mtu);
  1402. if (running)
  1403. enic_open(netdev);
  1404. return 0;
  1405. }
  1406. static void enic_change_mtu_work(struct work_struct *work)
  1407. {
  1408. struct enic *enic = container_of(work, struct enic, change_mtu_work);
  1409. struct net_device *netdev = enic->netdev;
  1410. int new_mtu = vnic_dev_mtu(enic->vdev);
  1411. int err;
  1412. unsigned int i;
  1413. new_mtu = max_t(int, ENIC_MIN_MTU, min_t(int, ENIC_MAX_MTU, new_mtu));
  1414. rtnl_lock();
  1415. /* Stop RQ */
  1416. del_timer_sync(&enic->notify_timer);
  1417. for (i = 0; i < enic->rq_count; i++)
  1418. napi_disable(&enic->napi[i]);
  1419. vnic_intr_mask(&enic->intr[0]);
  1420. enic_synchronize_irqs(enic);
  1421. err = vnic_rq_disable(&enic->rq[0]);
  1422. if (err) {
  1423. netdev_err(netdev, "Unable to disable RQ.\n");
  1424. return;
  1425. }
  1426. vnic_rq_clean(&enic->rq[0], enic_free_rq_buf);
  1427. vnic_cq_clean(&enic->cq[0]);
  1428. vnic_intr_clean(&enic->intr[0]);
  1429. /* Fill RQ with new_mtu-sized buffers */
  1430. netdev->mtu = new_mtu;
  1431. vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
  1432. /* Need at least one buffer on ring to get going */
  1433. if (vnic_rq_desc_used(&enic->rq[0]) == 0) {
  1434. netdev_err(netdev, "Unable to alloc receive buffers.\n");
  1435. return;
  1436. }
  1437. /* Start RQ */
  1438. vnic_rq_enable(&enic->rq[0]);
  1439. napi_enable(&enic->napi[0]);
  1440. vnic_intr_unmask(&enic->intr[0]);
  1441. enic_notify_timer_start(enic);
  1442. rtnl_unlock();
  1443. netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu);
  1444. }
  1445. #ifdef CONFIG_NET_POLL_CONTROLLER
  1446. static void enic_poll_controller(struct net_device *netdev)
  1447. {
  1448. struct enic *enic = netdev_priv(netdev);
  1449. struct vnic_dev *vdev = enic->vdev;
  1450. unsigned int i, intr;
  1451. switch (vnic_dev_get_intr_mode(vdev)) {
  1452. case VNIC_DEV_INTR_MODE_MSIX:
  1453. for (i = 0; i < enic->rq_count; i++) {
  1454. intr = enic_msix_rq_intr(enic, i);
  1455. enic_isr_msix_rq(enic->msix_entry[intr].vector,
  1456. &enic->napi[i]);
  1457. }
  1458. for (i = 0; i < enic->wq_count; i++) {
  1459. intr = enic_msix_wq_intr(enic, i);
  1460. enic_isr_msix_wq(enic->msix_entry[intr].vector, enic);
  1461. }
  1462. break;
  1463. case VNIC_DEV_INTR_MODE_MSI:
  1464. enic_isr_msi(enic->pdev->irq, enic);
  1465. break;
  1466. case VNIC_DEV_INTR_MODE_INTX:
  1467. enic_isr_legacy(enic->pdev->irq, netdev);
  1468. break;
  1469. default:
  1470. break;
  1471. }
  1472. }
  1473. #endif
  1474. static int enic_dev_wait(struct vnic_dev *vdev,
  1475. int (*start)(struct vnic_dev *, int),
  1476. int (*finished)(struct vnic_dev *, int *),
  1477. int arg)
  1478. {
  1479. unsigned long time;
  1480. int done;
  1481. int err;
  1482. BUG_ON(in_interrupt());
  1483. err = start(vdev, arg);
  1484. if (err)
  1485. return err;
  1486. /* Wait for func to complete...2 seconds max
  1487. */
  1488. time = jiffies + (HZ * 2);
  1489. do {
  1490. err = finished(vdev, &done);
  1491. if (err)
  1492. return err;
  1493. if (done)
  1494. return 0;
  1495. schedule_timeout_uninterruptible(HZ / 10);
  1496. } while (time_after(time, jiffies));
  1497. return -ETIMEDOUT;
  1498. }
  1499. static int enic_dev_open(struct enic *enic)
  1500. {
  1501. int err;
  1502. err = enic_dev_wait(enic->vdev, vnic_dev_open,
  1503. vnic_dev_open_done, 0);
  1504. if (err)
  1505. dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n",
  1506. err);
  1507. return err;
  1508. }
  1509. static int enic_dev_hang_reset(struct enic *enic)
  1510. {
  1511. int err;
  1512. err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset,
  1513. vnic_dev_hang_reset_done, 0);
  1514. if (err)
  1515. netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n",
  1516. err);
  1517. return err;
  1518. }
  1519. static int enic_set_rsskey(struct enic *enic)
  1520. {
  1521. dma_addr_t rss_key_buf_pa;
  1522. union vnic_rss_key *rss_key_buf_va = NULL;
  1523. union vnic_rss_key rss_key = {
  1524. .key[0].b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101},
  1525. .key[1].b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101},
  1526. .key[2].b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115},
  1527. .key[3].b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108},
  1528. };
  1529. int err;
  1530. rss_key_buf_va = pci_alloc_consistent(enic->pdev,
  1531. sizeof(union vnic_rss_key), &rss_key_buf_pa);
  1532. if (!rss_key_buf_va)
  1533. return -ENOMEM;
  1534. memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
  1535. spin_lock(&enic->devcmd_lock);
  1536. err = enic_set_rss_key(enic,
  1537. rss_key_buf_pa,
  1538. sizeof(union vnic_rss_key));
  1539. spin_unlock(&enic->devcmd_lock);
  1540. pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key),
  1541. rss_key_buf_va, rss_key_buf_pa);
  1542. return err;
  1543. }
  1544. static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
  1545. {
  1546. dma_addr_t rss_cpu_buf_pa;
  1547. union vnic_rss_cpu *rss_cpu_buf_va = NULL;
  1548. unsigned int i;
  1549. int err;
  1550. rss_cpu_buf_va = pci_alloc_consistent(enic->pdev,
  1551. sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa);
  1552. if (!rss_cpu_buf_va)
  1553. return -ENOMEM;
  1554. for (i = 0; i < (1 << rss_hash_bits); i++)
  1555. (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count;
  1556. spin_lock(&enic->devcmd_lock);
  1557. err = enic_set_rss_cpu(enic,
  1558. rss_cpu_buf_pa,
  1559. sizeof(union vnic_rss_cpu));
  1560. spin_unlock(&enic->devcmd_lock);
  1561. pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu),
  1562. rss_cpu_buf_va, rss_cpu_buf_pa);
  1563. return err;
  1564. }
  1565. static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
  1566. u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
  1567. {
  1568. const u8 tso_ipid_split_en = 0;
  1569. const u8 ig_vlan_strip_en = 1;
  1570. int err;
  1571. /* Enable VLAN tag stripping.
  1572. */
  1573. spin_lock(&enic->devcmd_lock);
  1574. err = enic_set_nic_cfg(enic,
  1575. rss_default_cpu, rss_hash_type,
  1576. rss_hash_bits, rss_base_cpu,
  1577. rss_enable, tso_ipid_split_en,
  1578. ig_vlan_strip_en);
  1579. spin_unlock(&enic->devcmd_lock);
  1580. return err;
  1581. }
  1582. static int enic_set_rss_nic_cfg(struct enic *enic)
  1583. {
  1584. struct device *dev = enic_get_dev(enic);
  1585. const u8 rss_default_cpu = 0;
  1586. const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
  1587. NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
  1588. NIC_CFG_RSS_HASH_TYPE_IPV6 |
  1589. NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
  1590. const u8 rss_hash_bits = 7;
  1591. const u8 rss_base_cpu = 0;
  1592. u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
  1593. if (rss_enable) {
  1594. if (!enic_set_rsskey(enic)) {
  1595. if (enic_set_rsscpu(enic, rss_hash_bits)) {
  1596. rss_enable = 0;
  1597. dev_warn(dev, "RSS disabled, "
  1598. "Failed to set RSS cpu indirection table.");
  1599. }
  1600. } else {
  1601. rss_enable = 0;
  1602. dev_warn(dev, "RSS disabled, Failed to set RSS key.\n");
  1603. }
  1604. }
  1605. return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
  1606. rss_hash_bits, rss_base_cpu, rss_enable);
  1607. }
  1608. static void enic_reset(struct work_struct *work)
  1609. {
  1610. struct enic *enic = container_of(work, struct enic, reset);
  1611. if (!netif_running(enic->netdev))
  1612. return;
  1613. rtnl_lock();
  1614. enic_dev_hang_notify(enic);
  1615. enic_stop(enic->netdev);
  1616. enic_dev_hang_reset(enic);
  1617. enic_reset_addr_lists(enic);
  1618. enic_init_vnic_resources(enic);
  1619. enic_set_rss_nic_cfg(enic);
  1620. enic_dev_set_ig_vlan_rewrite_mode(enic);
  1621. enic_open(enic->netdev);
  1622. rtnl_unlock();
  1623. }
  1624. static int enic_set_intr_mode(struct enic *enic)
  1625. {
  1626. unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX);
  1627. unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX);
  1628. unsigned int i;
  1629. /* Set interrupt mode (INTx, MSI, MSI-X) depending
  1630. * on system capabilities.
  1631. *
  1632. * Try MSI-X first
  1633. *
  1634. * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
  1635. * (the second to last INTR is used for WQ/RQ errors)
  1636. * (the last INTR is used for notifications)
  1637. */
  1638. BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
  1639. for (i = 0; i < n + m + 2; i++)
  1640. enic->msix_entry[i].entry = i;
  1641. /* Use multiple RQs if RSS is enabled
  1642. */
  1643. if (ENIC_SETTING(enic, RSS) &&
  1644. enic->config.intr_mode < 1 &&
  1645. enic->rq_count >= n &&
  1646. enic->wq_count >= m &&
  1647. enic->cq_count >= n + m &&
  1648. enic->intr_count >= n + m + 2) {
  1649. if (!pci_enable_msix(enic->pdev, enic->msix_entry, n + m + 2)) {
  1650. enic->rq_count = n;
  1651. enic->wq_count = m;
  1652. enic->cq_count = n + m;
  1653. enic->intr_count = n + m + 2;
  1654. vnic_dev_set_intr_mode(enic->vdev,
  1655. VNIC_DEV_INTR_MODE_MSIX);
  1656. return 0;
  1657. }
  1658. }
  1659. if (enic->config.intr_mode < 1 &&
  1660. enic->rq_count >= 1 &&
  1661. enic->wq_count >= m &&
  1662. enic->cq_count >= 1 + m &&
  1663. enic->intr_count >= 1 + m + 2) {
  1664. if (!pci_enable_msix(enic->pdev, enic->msix_entry, 1 + m + 2)) {
  1665. enic->rq_count = 1;
  1666. enic->wq_count = m;
  1667. enic->cq_count = 1 + m;
  1668. enic->intr_count = 1 + m + 2;
  1669. vnic_dev_set_intr_mode(enic->vdev,
  1670. VNIC_DEV_INTR_MODE_MSIX);
  1671. return 0;
  1672. }
  1673. }
  1674. /* Next try MSI
  1675. *
  1676. * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
  1677. */
  1678. if (enic->config.intr_mode < 2 &&
  1679. enic->rq_count >= 1 &&
  1680. enic->wq_count >= 1 &&
  1681. enic->cq_count >= 2 &&
  1682. enic->intr_count >= 1 &&
  1683. !pci_enable_msi(enic->pdev)) {
  1684. enic->rq_count = 1;
  1685. enic->wq_count = 1;
  1686. enic->cq_count = 2;
  1687. enic->intr_count = 1;
  1688. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
  1689. return 0;
  1690. }
  1691. /* Next try INTx
  1692. *
  1693. * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
  1694. * (the first INTR is used for WQ/RQ)
  1695. * (the second INTR is used for WQ/RQ errors)
  1696. * (the last INTR is used for notifications)
  1697. */
  1698. if (enic->config.intr_mode < 3 &&
  1699. enic->rq_count >= 1 &&
  1700. enic->wq_count >= 1 &&
  1701. enic->cq_count >= 2 &&
  1702. enic->intr_count >= 3) {
  1703. enic->rq_count = 1;
  1704. enic->wq_count = 1;
  1705. enic->cq_count = 2;
  1706. enic->intr_count = 3;
  1707. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
  1708. return 0;
  1709. }
  1710. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
  1711. return -EINVAL;
  1712. }
  1713. static void enic_clear_intr_mode(struct enic *enic)
  1714. {
  1715. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1716. case VNIC_DEV_INTR_MODE_MSIX:
  1717. pci_disable_msix(enic->pdev);
  1718. break;
  1719. case VNIC_DEV_INTR_MODE_MSI:
  1720. pci_disable_msi(enic->pdev);
  1721. break;
  1722. default:
  1723. break;
  1724. }
  1725. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
  1726. }
  1727. static const struct net_device_ops enic_netdev_dynamic_ops = {
  1728. .ndo_open = enic_open,
  1729. .ndo_stop = enic_stop,
  1730. .ndo_start_xmit = enic_hard_start_xmit,
  1731. .ndo_get_stats64 = enic_get_stats,
  1732. .ndo_validate_addr = eth_validate_addr,
  1733. .ndo_set_rx_mode = enic_set_rx_mode,
  1734. .ndo_set_multicast_list = enic_set_rx_mode,
  1735. .ndo_set_mac_address = enic_set_mac_address_dynamic,
  1736. .ndo_change_mtu = enic_change_mtu,
  1737. .ndo_vlan_rx_register = enic_vlan_rx_register,
  1738. .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
  1739. .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
  1740. .ndo_tx_timeout = enic_tx_timeout,
  1741. .ndo_set_vf_port = enic_set_vf_port,
  1742. .ndo_get_vf_port = enic_get_vf_port,
  1743. .ndo_set_vf_mac = enic_set_vf_mac,
  1744. #ifdef CONFIG_NET_POLL_CONTROLLER
  1745. .ndo_poll_controller = enic_poll_controller,
  1746. #endif
  1747. };
  1748. static const struct net_device_ops enic_netdev_ops = {
  1749. .ndo_open = enic_open,
  1750. .ndo_stop = enic_stop,
  1751. .ndo_start_xmit = enic_hard_start_xmit,
  1752. .ndo_get_stats64 = enic_get_stats,
  1753. .ndo_validate_addr = eth_validate_addr,
  1754. .ndo_set_mac_address = enic_set_mac_address,
  1755. .ndo_set_rx_mode = enic_set_rx_mode,
  1756. .ndo_set_multicast_list = enic_set_rx_mode,
  1757. .ndo_change_mtu = enic_change_mtu,
  1758. .ndo_vlan_rx_register = enic_vlan_rx_register,
  1759. .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
  1760. .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
  1761. .ndo_tx_timeout = enic_tx_timeout,
  1762. #ifdef CONFIG_NET_POLL_CONTROLLER
  1763. .ndo_poll_controller = enic_poll_controller,
  1764. #endif
  1765. };
  1766. static void enic_dev_deinit(struct enic *enic)
  1767. {
  1768. unsigned int i;
  1769. for (i = 0; i < enic->rq_count; i++)
  1770. netif_napi_del(&enic->napi[i]);
  1771. enic_free_vnic_resources(enic);
  1772. enic_clear_intr_mode(enic);
  1773. }
  1774. static int enic_dev_init(struct enic *enic)
  1775. {
  1776. struct device *dev = enic_get_dev(enic);
  1777. struct net_device *netdev = enic->netdev;
  1778. unsigned int i;
  1779. int err;
  1780. /* Get interrupt coalesce timer info */
  1781. err = enic_dev_intr_coal_timer_info(enic);
  1782. if (err) {
  1783. dev_warn(dev, "Using default conversion factor for "
  1784. "interrupt coalesce timer\n");
  1785. vnic_dev_intr_coal_timer_info_default(enic->vdev);
  1786. }
  1787. /* Get vNIC configuration
  1788. */
  1789. err = enic_get_vnic_config(enic);
  1790. if (err) {
  1791. dev_err(dev, "Get vNIC configuration failed, aborting\n");
  1792. return err;
  1793. }
  1794. /* Get available resource counts
  1795. */
  1796. enic_get_res_counts(enic);
  1797. /* Set interrupt mode based on resource counts and system
  1798. * capabilities
  1799. */
  1800. err = enic_set_intr_mode(enic);
  1801. if (err) {
  1802. dev_err(dev, "Failed to set intr mode based on resource "
  1803. "counts and system capabilities, aborting\n");
  1804. return err;
  1805. }
  1806. /* Allocate and configure vNIC resources
  1807. */
  1808. err = enic_alloc_vnic_resources(enic);
  1809. if (err) {
  1810. dev_err(dev, "Failed to alloc vNIC resources, aborting\n");
  1811. goto err_out_free_vnic_resources;
  1812. }
  1813. enic_init_vnic_resources(enic);
  1814. err = enic_set_rss_nic_cfg(enic);
  1815. if (err) {
  1816. dev_err(dev, "Failed to config nic, aborting\n");
  1817. goto err_out_free_vnic_resources;
  1818. }
  1819. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1820. default:
  1821. netif_napi_add(netdev, &enic->napi[0], enic_poll, 64);
  1822. break;
  1823. case VNIC_DEV_INTR_MODE_MSIX:
  1824. for (i = 0; i < enic->rq_count; i++)
  1825. netif_napi_add(netdev, &enic->napi[i],
  1826. enic_poll_msix, 64);
  1827. break;
  1828. }
  1829. return 0;
  1830. err_out_free_vnic_resources:
  1831. enic_clear_intr_mode(enic);
  1832. enic_free_vnic_resources(enic);
  1833. return err;
  1834. }
  1835. static void enic_iounmap(struct enic *enic)
  1836. {
  1837. unsigned int i;
  1838. for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
  1839. if (enic->bar[i].vaddr)
  1840. iounmap(enic->bar[i].vaddr);
  1841. }
  1842. static int __devinit enic_probe(struct pci_dev *pdev,
  1843. const struct pci_device_id *ent)
  1844. {
  1845. struct device *dev = &pdev->dev;
  1846. struct net_device *netdev;
  1847. struct enic *enic;
  1848. int using_dac = 0;
  1849. unsigned int i;
  1850. int err;
  1851. /* Allocate net device structure and initialize. Private
  1852. * instance data is initialized to zero.
  1853. */
  1854. netdev = alloc_etherdev(sizeof(struct enic));
  1855. if (!netdev) {
  1856. pr_err("Etherdev alloc failed, aborting\n");
  1857. return -ENOMEM;
  1858. }
  1859. pci_set_drvdata(pdev, netdev);
  1860. SET_NETDEV_DEV(netdev, &pdev->dev);
  1861. enic = netdev_priv(netdev);
  1862. enic->netdev = netdev;
  1863. enic->pdev = pdev;
  1864. /* Setup PCI resources
  1865. */
  1866. err = pci_enable_device_mem(pdev);
  1867. if (err) {
  1868. dev_err(dev, "Cannot enable PCI device, aborting\n");
  1869. goto err_out_free_netdev;
  1870. }
  1871. err = pci_request_regions(pdev, DRV_NAME);
  1872. if (err) {
  1873. dev_err(dev, "Cannot request PCI regions, aborting\n");
  1874. goto err_out_disable_device;
  1875. }
  1876. pci_set_master(pdev);
  1877. /* Query PCI controller on system for DMA addressing
  1878. * limitation for the device. Try 40-bit first, and
  1879. * fail to 32-bit.
  1880. */
  1881. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40));
  1882. if (err) {
  1883. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  1884. if (err) {
  1885. dev_err(dev, "No usable DMA configuration, aborting\n");
  1886. goto err_out_release_regions;
  1887. }
  1888. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  1889. if (err) {
  1890. dev_err(dev, "Unable to obtain %u-bit DMA "
  1891. "for consistent allocations, aborting\n", 32);
  1892. goto err_out_release_regions;
  1893. }
  1894. } else {
  1895. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
  1896. if (err) {
  1897. dev_err(dev, "Unable to obtain %u-bit DMA "
  1898. "for consistent allocations, aborting\n", 40);
  1899. goto err_out_release_regions;
  1900. }
  1901. using_dac = 1;
  1902. }
  1903. /* Map vNIC resources from BAR0-5
  1904. */
  1905. for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
  1906. if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
  1907. continue;
  1908. enic->bar[i].len = pci_resource_len(pdev, i);
  1909. enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
  1910. if (!enic->bar[i].vaddr) {
  1911. dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i);
  1912. err = -ENODEV;
  1913. goto err_out_iounmap;
  1914. }
  1915. enic->bar[i].bus_addr = pci_resource_start(pdev, i);
  1916. }
  1917. /* Register vNIC device
  1918. */
  1919. enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
  1920. ARRAY_SIZE(enic->bar));
  1921. if (!enic->vdev) {
  1922. dev_err(dev, "vNIC registration failed, aborting\n");
  1923. err = -ENODEV;
  1924. goto err_out_iounmap;
  1925. }
  1926. /* Issue device open to get device in known state
  1927. */
  1928. err = enic_dev_open(enic);
  1929. if (err) {
  1930. dev_err(dev, "vNIC dev open failed, aborting\n");
  1931. goto err_out_vnic_unregister;
  1932. }
  1933. /* Setup devcmd lock
  1934. */
  1935. spin_lock_init(&enic->devcmd_lock);
  1936. /*
  1937. * Set ingress vlan rewrite mode before vnic initialization
  1938. */
  1939. err = enic_dev_set_ig_vlan_rewrite_mode(enic);
  1940. if (err) {
  1941. dev_err(dev,
  1942. "Failed to set ingress vlan rewrite mode, aborting.\n");
  1943. goto err_out_dev_close;
  1944. }
  1945. /* Issue device init to initialize the vnic-to-switch link.
  1946. * We'll start with carrier off and wait for link UP
  1947. * notification later to turn on carrier. We don't need
  1948. * to wait here for the vnic-to-switch link initialization
  1949. * to complete; link UP notification is the indication that
  1950. * the process is complete.
  1951. */
  1952. netif_carrier_off(netdev);
  1953. /* Do not call dev_init for a dynamic vnic.
  1954. * For a dynamic vnic, init_prov_info will be
  1955. * called later by an upper layer.
  1956. */
  1957. if (!enic_is_dynamic(enic)) {
  1958. err = vnic_dev_init(enic->vdev, 0);
  1959. if (err) {
  1960. dev_err(dev, "vNIC dev init failed, aborting\n");
  1961. goto err_out_dev_close;
  1962. }
  1963. }
  1964. err = enic_dev_init(enic);
  1965. if (err) {
  1966. dev_err(dev, "Device initialization failed, aborting\n");
  1967. goto err_out_dev_close;
  1968. }
  1969. /* Setup notification timer, HW reset task, and wq locks
  1970. */
  1971. init_timer(&enic->notify_timer);
  1972. enic->notify_timer.function = enic_notify_timer;
  1973. enic->notify_timer.data = (unsigned long)enic;
  1974. INIT_WORK(&enic->reset, enic_reset);
  1975. INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work);
  1976. for (i = 0; i < enic->wq_count; i++)
  1977. spin_lock_init(&enic->wq_lock[i]);
  1978. /* Register net device
  1979. */
  1980. enic->port_mtu = enic->config.mtu;
  1981. (void)enic_change_mtu(netdev, enic->port_mtu);
  1982. err = enic_set_mac_addr(netdev, enic->mac_addr);
  1983. if (err) {
  1984. dev_err(dev, "Invalid MAC address, aborting\n");
  1985. goto err_out_dev_deinit;
  1986. }
  1987. enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
  1988. enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
  1989. if (enic_is_dynamic(enic))
  1990. netdev->netdev_ops = &enic_netdev_dynamic_ops;
  1991. else
  1992. netdev->netdev_ops = &enic_netdev_ops;
  1993. netdev->watchdog_timeo = 2 * HZ;
  1994. netdev->ethtool_ops = &enic_ethtool_ops;
  1995. netdev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
  1996. if (ENIC_SETTING(enic, LOOP)) {
  1997. netdev->features &= ~NETIF_F_HW_VLAN_TX;
  1998. enic->loop_enable = 1;
  1999. enic->loop_tag = enic->config.loop_tag;
  2000. dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag);
  2001. }
  2002. if (ENIC_SETTING(enic, TXCSUM))
  2003. netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM;
  2004. if (ENIC_SETTING(enic, TSO))
  2005. netdev->hw_features |= NETIF_F_TSO |
  2006. NETIF_F_TSO6 | NETIF_F_TSO_ECN;
  2007. if (ENIC_SETTING(enic, RXCSUM))
  2008. netdev->hw_features |= NETIF_F_RXCSUM;
  2009. netdev->features |= netdev->hw_features;
  2010. if (using_dac)
  2011. netdev->features |= NETIF_F_HIGHDMA;
  2012. err = register_netdev(netdev);
  2013. if (err) {
  2014. dev_err(dev, "Cannot register net device, aborting\n");
  2015. goto err_out_dev_deinit;
  2016. }
  2017. return 0;
  2018. err_out_dev_deinit:
  2019. enic_dev_deinit(enic);
  2020. err_out_dev_close:
  2021. vnic_dev_close(enic->vdev);
  2022. err_out_vnic_unregister:
  2023. vnic_dev_unregister(enic->vdev);
  2024. err_out_iounmap:
  2025. enic_iounmap(enic);
  2026. err_out_release_regions:
  2027. pci_release_regions(pdev);
  2028. err_out_disable_device:
  2029. pci_disable_device(pdev);
  2030. err_out_free_netdev:
  2031. pci_set_drvdata(pdev, NULL);
  2032. free_netdev(netdev);
  2033. return err;
  2034. }
  2035. static void __devexit enic_remove(struct pci_dev *pdev)
  2036. {
  2037. struct net_device *netdev = pci_get_drvdata(pdev);
  2038. if (netdev) {
  2039. struct enic *enic = netdev_priv(netdev);
  2040. cancel_work_sync(&enic->reset);
  2041. cancel_work_sync(&enic->change_mtu_work);
  2042. unregister_netdev(netdev);
  2043. enic_dev_deinit(enic);
  2044. vnic_dev_close(enic->vdev);
  2045. vnic_dev_unregister(enic->vdev);
  2046. enic_iounmap(enic);
  2047. pci_release_regions(pdev);
  2048. pci_disable_device(pdev);
  2049. pci_set_drvdata(pdev, NULL);
  2050. free_netdev(netdev);
  2051. }
  2052. }
  2053. static struct pci_driver enic_driver = {
  2054. .name = DRV_NAME,
  2055. .id_table = enic_id_table,
  2056. .probe = enic_probe,
  2057. .remove = __devexit_p(enic_remove),
  2058. };
  2059. static int __init enic_init_module(void)
  2060. {
  2061. pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
  2062. return pci_register_driver(&enic_driver);
  2063. }
  2064. static void __exit enic_cleanup_module(void)
  2065. {
  2066. pci_unregister_driver(&enic_driver);
  2067. }
  2068. module_init(enic_init_module);
  2069. module_exit(enic_cleanup_module);