chip.c 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727
  1. /*
  2. * linux/kernel/irq/chip.c
  3. *
  4. * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
  5. * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
  6. *
  7. * This file contains the core interrupt handling code, for irq-chip
  8. * based architectures.
  9. *
  10. * Detailed information is available in Documentation/DocBook/genericirq
  11. */
  12. #include <linux/irq.h>
  13. #include <linux/msi.h>
  14. #include <linux/module.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel_stat.h>
  17. #include "internals.h"
  18. /**
  19. * irq_set_chip - set the irq chip for an irq
  20. * @irq: irq number
  21. * @chip: pointer to irq chip description structure
  22. */
  23. int irq_set_chip(unsigned int irq, struct irq_chip *chip)
  24. {
  25. unsigned long flags;
  26. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  27. if (!desc)
  28. return -EINVAL;
  29. if (!chip)
  30. chip = &no_irq_chip;
  31. desc->irq_data.chip = chip;
  32. irq_put_desc_unlock(desc, flags);
  33. /*
  34. * For !CONFIG_SPARSE_IRQ make the irq show up in
  35. * allocated_irqs. For the CONFIG_SPARSE_IRQ case, it is
  36. * already marked, and this call is harmless.
  37. */
  38. irq_reserve_irq(irq);
  39. return 0;
  40. }
  41. EXPORT_SYMBOL(irq_set_chip);
  42. /**
  43. * irq_set_type - set the irq trigger type for an irq
  44. * @irq: irq number
  45. * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
  46. */
  47. int irq_set_irq_type(unsigned int irq, unsigned int type)
  48. {
  49. unsigned long flags;
  50. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
  51. int ret = 0;
  52. if (!desc)
  53. return -EINVAL;
  54. type &= IRQ_TYPE_SENSE_MASK;
  55. if (type != IRQ_TYPE_NONE)
  56. ret = __irq_set_trigger(desc, irq, type);
  57. irq_put_desc_busunlock(desc, flags);
  58. return ret;
  59. }
  60. EXPORT_SYMBOL(irq_set_irq_type);
  61. /**
  62. * irq_set_handler_data - set irq handler data for an irq
  63. * @irq: Interrupt number
  64. * @data: Pointer to interrupt specific data
  65. *
  66. * Set the hardware irq controller data for an irq
  67. */
  68. int irq_set_handler_data(unsigned int irq, void *data)
  69. {
  70. unsigned long flags;
  71. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  72. if (!desc)
  73. return -EINVAL;
  74. desc->irq_data.handler_data = data;
  75. irq_put_desc_unlock(desc, flags);
  76. return 0;
  77. }
  78. EXPORT_SYMBOL(irq_set_handler_data);
  79. /**
  80. * irq_set_msi_desc - set MSI descriptor data for an irq
  81. * @irq: Interrupt number
  82. * @entry: Pointer to MSI descriptor data
  83. *
  84. * Set the MSI descriptor entry for an irq
  85. */
  86. int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
  87. {
  88. unsigned long flags;
  89. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
  90. if (!desc)
  91. return -EINVAL;
  92. desc->irq_data.msi_desc = entry;
  93. if (entry)
  94. entry->irq = irq;
  95. irq_put_desc_unlock(desc, flags);
  96. return 0;
  97. }
  98. /**
  99. * irq_set_chip_data - set irq chip data for an irq
  100. * @irq: Interrupt number
  101. * @data: Pointer to chip specific data
  102. *
  103. * Set the hardware irq chip data for an irq
  104. */
  105. int irq_set_chip_data(unsigned int irq, void *data)
  106. {
  107. unsigned long flags;
  108. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  109. if (!desc)
  110. return -EINVAL;
  111. desc->irq_data.chip_data = data;
  112. irq_put_desc_unlock(desc, flags);
  113. return 0;
  114. }
  115. EXPORT_SYMBOL(irq_set_chip_data);
  116. struct irq_data *irq_get_irq_data(unsigned int irq)
  117. {
  118. struct irq_desc *desc = irq_to_desc(irq);
  119. return desc ? &desc->irq_data : NULL;
  120. }
  121. EXPORT_SYMBOL_GPL(irq_get_irq_data);
  122. static void irq_state_clr_disabled(struct irq_desc *desc)
  123. {
  124. irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
  125. }
  126. static void irq_state_set_disabled(struct irq_desc *desc)
  127. {
  128. irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
  129. }
  130. static void irq_state_clr_masked(struct irq_desc *desc)
  131. {
  132. irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
  133. }
  134. static void irq_state_set_masked(struct irq_desc *desc)
  135. {
  136. irqd_set(&desc->irq_data, IRQD_IRQ_MASKED);
  137. }
  138. int irq_startup(struct irq_desc *desc)
  139. {
  140. irq_state_clr_disabled(desc);
  141. desc->depth = 0;
  142. if (desc->irq_data.chip->irq_startup) {
  143. int ret = desc->irq_data.chip->irq_startup(&desc->irq_data);
  144. irq_state_clr_masked(desc);
  145. return ret;
  146. }
  147. irq_enable(desc);
  148. return 0;
  149. }
  150. void irq_shutdown(struct irq_desc *desc)
  151. {
  152. irq_state_set_disabled(desc);
  153. desc->depth = 1;
  154. if (desc->irq_data.chip->irq_shutdown)
  155. desc->irq_data.chip->irq_shutdown(&desc->irq_data);
  156. else if (desc->irq_data.chip->irq_disable)
  157. desc->irq_data.chip->irq_disable(&desc->irq_data);
  158. else
  159. desc->irq_data.chip->irq_mask(&desc->irq_data);
  160. irq_state_set_masked(desc);
  161. }
  162. void irq_enable(struct irq_desc *desc)
  163. {
  164. irq_state_clr_disabled(desc);
  165. if (desc->irq_data.chip->irq_enable)
  166. desc->irq_data.chip->irq_enable(&desc->irq_data);
  167. else
  168. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  169. irq_state_clr_masked(desc);
  170. }
  171. void irq_disable(struct irq_desc *desc)
  172. {
  173. irq_state_set_disabled(desc);
  174. if (desc->irq_data.chip->irq_disable) {
  175. desc->irq_data.chip->irq_disable(&desc->irq_data);
  176. irq_state_set_masked(desc);
  177. }
  178. }
  179. void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu)
  180. {
  181. if (desc->irq_data.chip->irq_enable)
  182. desc->irq_data.chip->irq_enable(&desc->irq_data);
  183. else
  184. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  185. cpumask_set_cpu(cpu, desc->percpu_enabled);
  186. }
  187. void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu)
  188. {
  189. if (desc->irq_data.chip->irq_disable)
  190. desc->irq_data.chip->irq_disable(&desc->irq_data);
  191. else
  192. desc->irq_data.chip->irq_mask(&desc->irq_data);
  193. cpumask_clear_cpu(cpu, desc->percpu_enabled);
  194. }
  195. static inline void mask_ack_irq(struct irq_desc *desc)
  196. {
  197. if (desc->irq_data.chip->irq_mask_ack)
  198. desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
  199. else {
  200. desc->irq_data.chip->irq_mask(&desc->irq_data);
  201. if (desc->irq_data.chip->irq_ack)
  202. desc->irq_data.chip->irq_ack(&desc->irq_data);
  203. }
  204. irq_state_set_masked(desc);
  205. }
  206. void mask_irq(struct irq_desc *desc)
  207. {
  208. if (desc->irq_data.chip->irq_mask) {
  209. desc->irq_data.chip->irq_mask(&desc->irq_data);
  210. irq_state_set_masked(desc);
  211. }
  212. }
  213. void unmask_irq(struct irq_desc *desc)
  214. {
  215. if (desc->irq_data.chip->irq_unmask) {
  216. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  217. irq_state_clr_masked(desc);
  218. }
  219. }
  220. /*
  221. * handle_nested_irq - Handle a nested irq from a irq thread
  222. * @irq: the interrupt number
  223. *
  224. * Handle interrupts which are nested into a threaded interrupt
  225. * handler. The handler function is called inside the calling
  226. * threads context.
  227. */
  228. void handle_nested_irq(unsigned int irq)
  229. {
  230. struct irq_desc *desc = irq_to_desc(irq);
  231. struct irqaction *action;
  232. irqreturn_t action_ret;
  233. might_sleep();
  234. raw_spin_lock_irq(&desc->lock);
  235. kstat_incr_irqs_this_cpu(irq, desc);
  236. action = desc->action;
  237. if (unlikely(!action || irqd_irq_disabled(&desc->irq_data)))
  238. goto out_unlock;
  239. irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  240. raw_spin_unlock_irq(&desc->lock);
  241. action_ret = action->thread_fn(action->irq, action->dev_id);
  242. if (!noirqdebug)
  243. note_interrupt(irq, desc, action_ret);
  244. raw_spin_lock_irq(&desc->lock);
  245. irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  246. out_unlock:
  247. raw_spin_unlock_irq(&desc->lock);
  248. }
  249. EXPORT_SYMBOL_GPL(handle_nested_irq);
  250. static bool irq_check_poll(struct irq_desc *desc)
  251. {
  252. if (!(desc->istate & IRQS_POLL_INPROGRESS))
  253. return false;
  254. return irq_wait_for_poll(desc);
  255. }
  256. /**
  257. * handle_simple_irq - Simple and software-decoded IRQs.
  258. * @irq: the interrupt number
  259. * @desc: the interrupt description structure for this irq
  260. *
  261. * Simple interrupts are either sent from a demultiplexing interrupt
  262. * handler or come from hardware, where no interrupt hardware control
  263. * is necessary.
  264. *
  265. * Note: The caller is expected to handle the ack, clear, mask and
  266. * unmask issues if necessary.
  267. */
  268. void
  269. handle_simple_irq(unsigned int irq, struct irq_desc *desc)
  270. {
  271. raw_spin_lock(&desc->lock);
  272. if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
  273. if (!irq_check_poll(desc))
  274. goto out_unlock;
  275. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  276. kstat_incr_irqs_this_cpu(irq, desc);
  277. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data)))
  278. goto out_unlock;
  279. handle_irq_event(desc);
  280. out_unlock:
  281. raw_spin_unlock(&desc->lock);
  282. }
  283. EXPORT_SYMBOL_GPL(handle_simple_irq);
  284. /**
  285. * handle_level_irq - Level type irq handler
  286. * @irq: the interrupt number
  287. * @desc: the interrupt description structure for this irq
  288. *
  289. * Level type interrupts are active as long as the hardware line has
  290. * the active level. This may require to mask the interrupt and unmask
  291. * it after the associated handler has acknowledged the device, so the
  292. * interrupt line is back to inactive.
  293. */
  294. void
  295. handle_level_irq(unsigned int irq, struct irq_desc *desc)
  296. {
  297. raw_spin_lock(&desc->lock);
  298. mask_ack_irq(desc);
  299. if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
  300. if (!irq_check_poll(desc))
  301. goto out_unlock;
  302. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  303. kstat_incr_irqs_this_cpu(irq, desc);
  304. /*
  305. * If its disabled or no action available
  306. * keep it masked and get out of here
  307. */
  308. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data)))
  309. goto out_unlock;
  310. handle_irq_event(desc);
  311. if (!irqd_irq_disabled(&desc->irq_data) && !(desc->istate & IRQS_ONESHOT))
  312. unmask_irq(desc);
  313. out_unlock:
  314. raw_spin_unlock(&desc->lock);
  315. }
  316. EXPORT_SYMBOL_GPL(handle_level_irq);
  317. #ifdef CONFIG_IRQ_PREFLOW_FASTEOI
  318. static inline void preflow_handler(struct irq_desc *desc)
  319. {
  320. if (desc->preflow_handler)
  321. desc->preflow_handler(&desc->irq_data);
  322. }
  323. #else
  324. static inline void preflow_handler(struct irq_desc *desc) { }
  325. #endif
  326. /**
  327. * handle_fasteoi_irq - irq handler for transparent controllers
  328. * @irq: the interrupt number
  329. * @desc: the interrupt description structure for this irq
  330. *
  331. * Only a single callback will be issued to the chip: an ->eoi()
  332. * call when the interrupt has been serviced. This enables support
  333. * for modern forms of interrupt handlers, which handle the flow
  334. * details in hardware, transparently.
  335. */
  336. void
  337. handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
  338. {
  339. raw_spin_lock(&desc->lock);
  340. if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
  341. if (!irq_check_poll(desc))
  342. goto out;
  343. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  344. kstat_incr_irqs_this_cpu(irq, desc);
  345. /*
  346. * If its disabled or no action available
  347. * then mask it and get out of here:
  348. */
  349. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  350. desc->istate |= IRQS_PENDING;
  351. mask_irq(desc);
  352. goto out;
  353. }
  354. if (desc->istate & IRQS_ONESHOT)
  355. mask_irq(desc);
  356. preflow_handler(desc);
  357. handle_irq_event(desc);
  358. out_eoi:
  359. desc->irq_data.chip->irq_eoi(&desc->irq_data);
  360. out_unlock:
  361. raw_spin_unlock(&desc->lock);
  362. return;
  363. out:
  364. if (!(desc->irq_data.chip->flags & IRQCHIP_EOI_IF_HANDLED))
  365. goto out_eoi;
  366. goto out_unlock;
  367. }
  368. /**
  369. * handle_edge_irq - edge type IRQ handler
  370. * @irq: the interrupt number
  371. * @desc: the interrupt description structure for this irq
  372. *
  373. * Interrupt occures on the falling and/or rising edge of a hardware
  374. * signal. The occurrence is latched into the irq controller hardware
  375. * and must be acked in order to be reenabled. After the ack another
  376. * interrupt can happen on the same source even before the first one
  377. * is handled by the associated event handler. If this happens it
  378. * might be necessary to disable (mask) the interrupt depending on the
  379. * controller hardware. This requires to reenable the interrupt inside
  380. * of the loop which handles the interrupts which have arrived while
  381. * the handler was running. If all pending interrupts are handled, the
  382. * loop is left.
  383. */
  384. void
  385. handle_edge_irq(unsigned int irq, struct irq_desc *desc)
  386. {
  387. raw_spin_lock(&desc->lock);
  388. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  389. /*
  390. * If we're currently running this IRQ, or its disabled,
  391. * we shouldn't process the IRQ. Mark it pending, handle
  392. * the necessary masking and go out
  393. */
  394. if (unlikely(irqd_irq_disabled(&desc->irq_data) ||
  395. irqd_irq_inprogress(&desc->irq_data) || !desc->action)) {
  396. if (!irq_check_poll(desc)) {
  397. desc->istate |= IRQS_PENDING;
  398. mask_ack_irq(desc);
  399. goto out_unlock;
  400. }
  401. }
  402. kstat_incr_irqs_this_cpu(irq, desc);
  403. /* Start handling the irq */
  404. desc->irq_data.chip->irq_ack(&desc->irq_data);
  405. do {
  406. if (unlikely(!desc->action)) {
  407. mask_irq(desc);
  408. goto out_unlock;
  409. }
  410. /*
  411. * When another irq arrived while we were handling
  412. * one, we could have masked the irq.
  413. * Renable it, if it was not disabled in meantime.
  414. */
  415. if (unlikely(desc->istate & IRQS_PENDING)) {
  416. if (!irqd_irq_disabled(&desc->irq_data) &&
  417. irqd_irq_masked(&desc->irq_data))
  418. unmask_irq(desc);
  419. }
  420. handle_irq_event(desc);
  421. } while ((desc->istate & IRQS_PENDING) &&
  422. !irqd_irq_disabled(&desc->irq_data));
  423. out_unlock:
  424. raw_spin_unlock(&desc->lock);
  425. }
  426. #ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
  427. /**
  428. * handle_edge_eoi_irq - edge eoi type IRQ handler
  429. * @irq: the interrupt number
  430. * @desc: the interrupt description structure for this irq
  431. *
  432. * Similar as the above handle_edge_irq, but using eoi and w/o the
  433. * mask/unmask logic.
  434. */
  435. void handle_edge_eoi_irq(unsigned int irq, struct irq_desc *desc)
  436. {
  437. struct irq_chip *chip = irq_desc_get_chip(desc);
  438. raw_spin_lock(&desc->lock);
  439. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  440. /*
  441. * If we're currently running this IRQ, or its disabled,
  442. * we shouldn't process the IRQ. Mark it pending, handle
  443. * the necessary masking and go out
  444. */
  445. if (unlikely(irqd_irq_disabled(&desc->irq_data) ||
  446. irqd_irq_inprogress(&desc->irq_data) || !desc->action)) {
  447. if (!irq_check_poll(desc)) {
  448. desc->istate |= IRQS_PENDING;
  449. goto out_eoi;
  450. }
  451. }
  452. kstat_incr_irqs_this_cpu(irq, desc);
  453. do {
  454. if (unlikely(!desc->action))
  455. goto out_eoi;
  456. handle_irq_event(desc);
  457. } while ((desc->istate & IRQS_PENDING) &&
  458. !irqd_irq_disabled(&desc->irq_data));
  459. out_eoi:
  460. chip->irq_eoi(&desc->irq_data);
  461. raw_spin_unlock(&desc->lock);
  462. }
  463. #endif
  464. /**
  465. * handle_percpu_irq - Per CPU local irq handler
  466. * @irq: the interrupt number
  467. * @desc: the interrupt description structure for this irq
  468. *
  469. * Per CPU interrupts on SMP machines without locking requirements
  470. */
  471. void
  472. handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
  473. {
  474. struct irq_chip *chip = irq_desc_get_chip(desc);
  475. kstat_incr_irqs_this_cpu(irq, desc);
  476. if (chip->irq_ack)
  477. chip->irq_ack(&desc->irq_data);
  478. handle_irq_event_percpu(desc, desc->action);
  479. if (chip->irq_eoi)
  480. chip->irq_eoi(&desc->irq_data);
  481. }
  482. /**
  483. * handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids
  484. * @irq: the interrupt number
  485. * @desc: the interrupt description structure for this irq
  486. *
  487. * Per CPU interrupts on SMP machines without locking requirements. Same as
  488. * handle_percpu_irq() above but with the following extras:
  489. *
  490. * action->percpu_dev_id is a pointer to percpu variables which
  491. * contain the real device id for the cpu on which this handler is
  492. * called
  493. */
  494. void handle_percpu_devid_irq(unsigned int irq, struct irq_desc *desc)
  495. {
  496. struct irq_chip *chip = irq_desc_get_chip(desc);
  497. struct irqaction *action = desc->action;
  498. void *dev_id = __this_cpu_ptr(action->percpu_dev_id);
  499. irqreturn_t res;
  500. kstat_incr_irqs_this_cpu(irq, desc);
  501. if (chip->irq_ack)
  502. chip->irq_ack(&desc->irq_data);
  503. trace_irq_handler_entry(irq, action);
  504. res = action->handler(irq, dev_id);
  505. trace_irq_handler_exit(irq, action, res);
  506. if (chip->irq_eoi)
  507. chip->irq_eoi(&desc->irq_data);
  508. }
  509. void
  510. __irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
  511. const char *name)
  512. {
  513. unsigned long flags;
  514. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
  515. if (!desc)
  516. return;
  517. if (!handle) {
  518. handle = handle_bad_irq;
  519. } else {
  520. if (WARN_ON(desc->irq_data.chip == &no_irq_chip))
  521. goto out;
  522. }
  523. /* Uninstall? */
  524. if (handle == handle_bad_irq) {
  525. if (desc->irq_data.chip != &no_irq_chip)
  526. mask_ack_irq(desc);
  527. irq_state_set_disabled(desc);
  528. desc->depth = 1;
  529. }
  530. desc->handle_irq = handle;
  531. desc->name = name;
  532. if (handle != handle_bad_irq && is_chained) {
  533. irq_settings_set_noprobe(desc);
  534. irq_settings_set_norequest(desc);
  535. irq_settings_set_nothread(desc);
  536. irq_startup(desc);
  537. }
  538. out:
  539. irq_put_desc_busunlock(desc, flags);
  540. }
  541. EXPORT_SYMBOL_GPL(__irq_set_handler);
  542. void
  543. irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
  544. irq_flow_handler_t handle, const char *name)
  545. {
  546. irq_set_chip(irq, chip);
  547. __irq_set_handler(irq, handle, 0, name);
  548. }
  549. void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
  550. {
  551. unsigned long flags;
  552. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  553. if (!desc)
  554. return;
  555. irq_settings_clr_and_set(desc, clr, set);
  556. irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
  557. IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
  558. if (irq_settings_has_no_balance_set(desc))
  559. irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
  560. if (irq_settings_is_per_cpu(desc))
  561. irqd_set(&desc->irq_data, IRQD_PER_CPU);
  562. if (irq_settings_can_move_pcntxt(desc))
  563. irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
  564. if (irq_settings_is_level(desc))
  565. irqd_set(&desc->irq_data, IRQD_LEVEL);
  566. irqd_set(&desc->irq_data, irq_settings_get_trigger_mask(desc));
  567. irq_put_desc_unlock(desc, flags);
  568. }
  569. EXPORT_SYMBOL_GPL(irq_modify_status);
  570. /**
  571. * irq_cpu_online - Invoke all irq_cpu_online functions.
  572. *
  573. * Iterate through all irqs and invoke the chip.irq_cpu_online()
  574. * for each.
  575. */
  576. void irq_cpu_online(void)
  577. {
  578. struct irq_desc *desc;
  579. struct irq_chip *chip;
  580. unsigned long flags;
  581. unsigned int irq;
  582. for_each_active_irq(irq) {
  583. desc = irq_to_desc(irq);
  584. if (!desc)
  585. continue;
  586. raw_spin_lock_irqsave(&desc->lock, flags);
  587. chip = irq_data_get_irq_chip(&desc->irq_data);
  588. if (chip && chip->irq_cpu_online &&
  589. (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
  590. !irqd_irq_disabled(&desc->irq_data)))
  591. chip->irq_cpu_online(&desc->irq_data);
  592. raw_spin_unlock_irqrestore(&desc->lock, flags);
  593. }
  594. }
  595. /**
  596. * irq_cpu_offline - Invoke all irq_cpu_offline functions.
  597. *
  598. * Iterate through all irqs and invoke the chip.irq_cpu_offline()
  599. * for each.
  600. */
  601. void irq_cpu_offline(void)
  602. {
  603. struct irq_desc *desc;
  604. struct irq_chip *chip;
  605. unsigned long flags;
  606. unsigned int irq;
  607. for_each_active_irq(irq) {
  608. desc = irq_to_desc(irq);
  609. if (!desc)
  610. continue;
  611. raw_spin_lock_irqsave(&desc->lock, flags);
  612. chip = irq_data_get_irq_chip(&desc->irq_data);
  613. if (chip && chip->irq_cpu_offline &&
  614. (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
  615. !irqd_irq_disabled(&desc->irq_data)))
  616. chip->irq_cpu_offline(&desc->irq_data);
  617. raw_spin_unlock_irqrestore(&desc->lock, flags);
  618. }
  619. }