iwl3945-base.c 239 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. /*
  30. * NOTE: This file (iwl-base.c) is used to build to multiple hardware targets
  31. * by defining IWL to either 3945 or 4965. The Makefile used when building
  32. * the base targets will create base-3945.o and base-4965.o
  33. *
  34. * The eventual goal is to move as many of the #if IWL / #endif blocks out of
  35. * this file and into the hardware specific implementation files (iwl-XXXX.c)
  36. * and leave only the common (non #ifdef sprinkled) code in this file
  37. */
  38. #include <linux/kernel.h>
  39. #include <linux/module.h>
  40. #include <linux/version.h>
  41. #include <linux/init.h>
  42. #include <linux/pci.h>
  43. #include <linux/dma-mapping.h>
  44. #include <linux/delay.h>
  45. #include <linux/skbuff.h>
  46. #include <linux/netdevice.h>
  47. #include <linux/wireless.h>
  48. #include <linux/firmware.h>
  49. #include <linux/skbuff.h>
  50. #include <linux/netdevice.h>
  51. #include <linux/etherdevice.h>
  52. #include <linux/if_arp.h>
  53. #include <net/ieee80211_radiotap.h>
  54. #include <net/mac80211.h>
  55. #include <asm/div64.h>
  56. #define IWL 3945
  57. #include "iwlwifi.h"
  58. #include "iwl-3945.h"
  59. #include "iwl-helpers.h"
  60. #ifdef CONFIG_IWLWIFI_DEBUG
  61. u32 iwl_debug_level;
  62. #endif
  63. /******************************************************************************
  64. *
  65. * module boiler plate
  66. *
  67. ******************************************************************************/
  68. /* module parameters */
  69. int iwl_param_disable_hw_scan;
  70. int iwl_param_debug;
  71. int iwl_param_disable; /* def: enable radio */
  72. int iwl_param_antenna; /* def: 0 = both antennas (use diversity) */
  73. int iwl_param_hwcrypto; /* def: using software encryption */
  74. int iwl_param_qos_enable = 1;
  75. int iwl_param_queues_num = IWL_MAX_NUM_QUEUES;
  76. /*
  77. * module name, copyright, version, etc.
  78. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  79. */
  80. #define DRV_DESCRIPTION \
  81. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  82. #ifdef CONFIG_IWLWIFI_DEBUG
  83. #define VD "d"
  84. #else
  85. #define VD
  86. #endif
  87. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  88. #define VS "s"
  89. #else
  90. #define VS
  91. #endif
  92. #define IWLWIFI_VERSION "0.1.15k" VD VS
  93. #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
  94. #define DRV_VERSION IWLWIFI_VERSION
  95. /* Change firmware file name, using "-" and incrementing number,
  96. * *only* when uCode interface or architecture changes so that it
  97. * is not compatible with earlier drivers.
  98. * This number will also appear in << 8 position of 1st dword of uCode file */
  99. #define IWL3945_UCODE_API "-1"
  100. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  101. MODULE_VERSION(DRV_VERSION);
  102. MODULE_AUTHOR(DRV_COPYRIGHT);
  103. MODULE_LICENSE("GPL");
  104. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  105. {
  106. u16 fc = le16_to_cpu(hdr->frame_control);
  107. int hdr_len = ieee80211_get_hdrlen(fc);
  108. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  109. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  110. return NULL;
  111. }
  112. static const struct ieee80211_hw_mode *iwl_get_hw_mode(
  113. struct iwl_priv *priv, int mode)
  114. {
  115. int i;
  116. for (i = 0; i < 3; i++)
  117. if (priv->modes[i].mode == mode)
  118. return &priv->modes[i];
  119. return NULL;
  120. }
  121. static int iwl_is_empty_essid(const char *essid, int essid_len)
  122. {
  123. /* Single white space is for Linksys APs */
  124. if (essid_len == 1 && essid[0] == ' ')
  125. return 1;
  126. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  127. while (essid_len) {
  128. essid_len--;
  129. if (essid[essid_len] != '\0')
  130. return 0;
  131. }
  132. return 1;
  133. }
  134. static const char *iwl_escape_essid(const char *essid, u8 essid_len)
  135. {
  136. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  137. const char *s = essid;
  138. char *d = escaped;
  139. if (iwl_is_empty_essid(essid, essid_len)) {
  140. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  141. return escaped;
  142. }
  143. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  144. while (essid_len--) {
  145. if (*s == '\0') {
  146. *d++ = '\\';
  147. *d++ = '0';
  148. s++;
  149. } else
  150. *d++ = *s++;
  151. }
  152. *d = '\0';
  153. return escaped;
  154. }
  155. static void iwl_print_hex_dump(int level, void *p, u32 len)
  156. {
  157. #ifdef CONFIG_IWLWIFI_DEBUG
  158. if (!(iwl_debug_level & level))
  159. return;
  160. print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
  161. p, len, 1);
  162. #endif
  163. }
  164. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  165. * DMA services
  166. *
  167. * Theory of operation
  168. *
  169. * A queue is a circular buffers with 'Read' and 'Write' pointers.
  170. * 2 empty entries always kept in the buffer to protect from overflow.
  171. *
  172. * For Tx queue, there are low mark and high mark limits. If, after queuing
  173. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  174. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  175. * Tx queue resumed.
  176. *
  177. * The IPW operates with six queues, one receive queue in the device's
  178. * sram, one transmit queue for sending commands to the device firmware,
  179. * and four transmit queues for data.
  180. ***************************************************/
  181. static int iwl_queue_space(const struct iwl_queue *q)
  182. {
  183. int s = q->last_used - q->first_empty;
  184. if (q->last_used > q->first_empty)
  185. s -= q->n_bd;
  186. if (s <= 0)
  187. s += q->n_window;
  188. /* keep some reserve to not confuse empty and full situations */
  189. s -= 2;
  190. if (s < 0)
  191. s = 0;
  192. return s;
  193. }
  194. /* XXX: n_bd must be power-of-two size */
  195. static inline int iwl_queue_inc_wrap(int index, int n_bd)
  196. {
  197. return ++index & (n_bd - 1);
  198. }
  199. /* XXX: n_bd must be power-of-two size */
  200. static inline int iwl_queue_dec_wrap(int index, int n_bd)
  201. {
  202. return --index & (n_bd - 1);
  203. }
  204. static inline int x2_queue_used(const struct iwl_queue *q, int i)
  205. {
  206. return q->first_empty > q->last_used ?
  207. (i >= q->last_used && i < q->first_empty) :
  208. !(i < q->last_used && i >= q->first_empty);
  209. }
  210. static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge)
  211. {
  212. if (is_huge)
  213. return q->n_window;
  214. return index & (q->n_window - 1);
  215. }
  216. static int iwl_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
  217. int count, int slots_num, u32 id)
  218. {
  219. q->n_bd = count;
  220. q->n_window = slots_num;
  221. q->id = id;
  222. /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
  223. * and iwl_queue_dec_wrap are broken. */
  224. BUG_ON(!is_power_of_2(count));
  225. /* slots_num must be power-of-two size, otherwise
  226. * get_cmd_index is broken. */
  227. BUG_ON(!is_power_of_2(slots_num));
  228. q->low_mark = q->n_window / 4;
  229. if (q->low_mark < 4)
  230. q->low_mark = 4;
  231. q->high_mark = q->n_window / 8;
  232. if (q->high_mark < 2)
  233. q->high_mark = 2;
  234. q->first_empty = q->last_used = 0;
  235. return 0;
  236. }
  237. static int iwl_tx_queue_alloc(struct iwl_priv *priv,
  238. struct iwl_tx_queue *txq, u32 id)
  239. {
  240. struct pci_dev *dev = priv->pci_dev;
  241. if (id != IWL_CMD_QUEUE_NUM) {
  242. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  243. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  244. if (!txq->txb) {
  245. IWL_ERROR("kmalloc for auxilary BD "
  246. "structures failed\n");
  247. goto error;
  248. }
  249. } else
  250. txq->txb = NULL;
  251. txq->bd = pci_alloc_consistent(dev,
  252. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  253. &txq->q.dma_addr);
  254. if (!txq->bd) {
  255. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  256. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  257. goto error;
  258. }
  259. txq->q.id = id;
  260. return 0;
  261. error:
  262. if (txq->txb) {
  263. kfree(txq->txb);
  264. txq->txb = NULL;
  265. }
  266. return -ENOMEM;
  267. }
  268. int iwl_tx_queue_init(struct iwl_priv *priv,
  269. struct iwl_tx_queue *txq, int slots_num, u32 txq_id)
  270. {
  271. struct pci_dev *dev = priv->pci_dev;
  272. int len;
  273. int rc = 0;
  274. /* alocate command space + one big command for scan since scan
  275. * command is very huge the system will not have two scan at the
  276. * same time */
  277. len = sizeof(struct iwl_cmd) * slots_num;
  278. if (txq_id == IWL_CMD_QUEUE_NUM)
  279. len += IWL_MAX_SCAN_SIZE;
  280. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  281. if (!txq->cmd)
  282. return -ENOMEM;
  283. rc = iwl_tx_queue_alloc(priv, txq, txq_id);
  284. if (rc) {
  285. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  286. return -ENOMEM;
  287. }
  288. txq->need_update = 0;
  289. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  290. * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
  291. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  292. iwl_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  293. iwl_hw_tx_queue_init(priv, txq);
  294. return 0;
  295. }
  296. /**
  297. * iwl_tx_queue_free - Deallocate DMA queue.
  298. * @txq: Transmit queue to deallocate.
  299. *
  300. * Empty queue by removing and destroying all BD's.
  301. * Free all buffers. txq itself is not freed.
  302. *
  303. */
  304. void iwl_tx_queue_free(struct iwl_priv *priv, struct iwl_tx_queue *txq)
  305. {
  306. struct iwl_queue *q = &txq->q;
  307. struct pci_dev *dev = priv->pci_dev;
  308. int len;
  309. if (q->n_bd == 0)
  310. return;
  311. /* first, empty all BD's */
  312. for (; q->first_empty != q->last_used;
  313. q->last_used = iwl_queue_inc_wrap(q->last_used, q->n_bd))
  314. iwl_hw_txq_free_tfd(priv, txq);
  315. len = sizeof(struct iwl_cmd) * q->n_window;
  316. if (q->id == IWL_CMD_QUEUE_NUM)
  317. len += IWL_MAX_SCAN_SIZE;
  318. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  319. /* free buffers belonging to queue itself */
  320. if (txq->q.n_bd)
  321. pci_free_consistent(dev, sizeof(struct iwl_tfd_frame) *
  322. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  323. if (txq->txb) {
  324. kfree(txq->txb);
  325. txq->txb = NULL;
  326. }
  327. /* 0 fill whole structure */
  328. memset(txq, 0, sizeof(*txq));
  329. }
  330. const u8 BROADCAST_ADDR[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  331. /*************** STATION TABLE MANAGEMENT ****
  332. *
  333. * NOTE: This needs to be overhauled to better synchronize between
  334. * how the iwl-4965.c is using iwl_hw_find_station vs. iwl-3945.c
  335. *
  336. * mac80211 should also be examined to determine if sta_info is duplicating
  337. * the functionality provided here
  338. */
  339. /**************************************************************/
  340. static u8 iwl_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  341. {
  342. int index = IWL_INVALID_STATION;
  343. int i;
  344. unsigned long flags;
  345. spin_lock_irqsave(&priv->sta_lock, flags);
  346. if (is_ap)
  347. index = IWL_AP_ID;
  348. else if (is_broadcast_ether_addr(addr))
  349. index = priv->hw_setting.bcast_sta_id;
  350. else
  351. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  352. if (priv->stations[i].used &&
  353. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  354. addr)) {
  355. index = i;
  356. break;
  357. }
  358. if (unlikely(index == IWL_INVALID_STATION))
  359. goto out;
  360. if (priv->stations[index].used) {
  361. priv->stations[index].used = 0;
  362. priv->num_stations--;
  363. }
  364. BUG_ON(priv->num_stations < 0);
  365. out:
  366. spin_unlock_irqrestore(&priv->sta_lock, flags);
  367. return 0;
  368. }
  369. static void iwl_clear_stations_table(struct iwl_priv *priv)
  370. {
  371. unsigned long flags;
  372. spin_lock_irqsave(&priv->sta_lock, flags);
  373. priv->num_stations = 0;
  374. memset(priv->stations, 0, sizeof(priv->stations));
  375. spin_unlock_irqrestore(&priv->sta_lock, flags);
  376. }
  377. u8 iwl_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
  378. {
  379. int i;
  380. int index = IWL_INVALID_STATION;
  381. struct iwl_station_entry *station;
  382. unsigned long flags_spin;
  383. DECLARE_MAC_BUF(mac);
  384. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  385. if (is_ap)
  386. index = IWL_AP_ID;
  387. else if (is_broadcast_ether_addr(addr))
  388. index = priv->hw_setting.bcast_sta_id;
  389. else
  390. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  391. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  392. addr)) {
  393. index = i;
  394. break;
  395. }
  396. if (!priv->stations[i].used &&
  397. index == IWL_INVALID_STATION)
  398. index = i;
  399. }
  400. /* These twh conditions has the same outcome but keep them separate
  401. since they have different meaning */
  402. if (unlikely(index == IWL_INVALID_STATION)) {
  403. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  404. return index;
  405. }
  406. if (priv->stations[index].used &&
  407. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  408. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  409. return index;
  410. }
  411. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  412. station = &priv->stations[index];
  413. station->used = 1;
  414. priv->num_stations++;
  415. memset(&station->sta, 0, sizeof(struct iwl_addsta_cmd));
  416. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  417. station->sta.mode = 0;
  418. station->sta.sta.sta_id = index;
  419. station->sta.station_flags = 0;
  420. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  421. iwl_send_add_station(priv, &station->sta, flags);
  422. return index;
  423. }
  424. /*************** DRIVER STATUS FUNCTIONS *****/
  425. static inline int iwl_is_ready(struct iwl_priv *priv)
  426. {
  427. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  428. * set but EXIT_PENDING is not */
  429. return test_bit(STATUS_READY, &priv->status) &&
  430. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  431. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  432. }
  433. static inline int iwl_is_alive(struct iwl_priv *priv)
  434. {
  435. return test_bit(STATUS_ALIVE, &priv->status);
  436. }
  437. static inline int iwl_is_init(struct iwl_priv *priv)
  438. {
  439. return test_bit(STATUS_INIT, &priv->status);
  440. }
  441. static inline int iwl_is_rfkill(struct iwl_priv *priv)
  442. {
  443. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  444. test_bit(STATUS_RF_KILL_SW, &priv->status);
  445. }
  446. static inline int iwl_is_ready_rf(struct iwl_priv *priv)
  447. {
  448. if (iwl_is_rfkill(priv))
  449. return 0;
  450. return iwl_is_ready(priv);
  451. }
  452. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  453. #define IWL_CMD(x) case x : return #x
  454. static const char *get_cmd_string(u8 cmd)
  455. {
  456. switch (cmd) {
  457. IWL_CMD(REPLY_ALIVE);
  458. IWL_CMD(REPLY_ERROR);
  459. IWL_CMD(REPLY_RXON);
  460. IWL_CMD(REPLY_RXON_ASSOC);
  461. IWL_CMD(REPLY_QOS_PARAM);
  462. IWL_CMD(REPLY_RXON_TIMING);
  463. IWL_CMD(REPLY_ADD_STA);
  464. IWL_CMD(REPLY_REMOVE_STA);
  465. IWL_CMD(REPLY_REMOVE_ALL_STA);
  466. IWL_CMD(REPLY_3945_RX);
  467. IWL_CMD(REPLY_TX);
  468. IWL_CMD(REPLY_RATE_SCALE);
  469. IWL_CMD(REPLY_LEDS_CMD);
  470. IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
  471. IWL_CMD(RADAR_NOTIFICATION);
  472. IWL_CMD(REPLY_QUIET_CMD);
  473. IWL_CMD(REPLY_CHANNEL_SWITCH);
  474. IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
  475. IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
  476. IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
  477. IWL_CMD(POWER_TABLE_CMD);
  478. IWL_CMD(PM_SLEEP_NOTIFICATION);
  479. IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
  480. IWL_CMD(REPLY_SCAN_CMD);
  481. IWL_CMD(REPLY_SCAN_ABORT_CMD);
  482. IWL_CMD(SCAN_START_NOTIFICATION);
  483. IWL_CMD(SCAN_RESULTS_NOTIFICATION);
  484. IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
  485. IWL_CMD(BEACON_NOTIFICATION);
  486. IWL_CMD(REPLY_TX_BEACON);
  487. IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
  488. IWL_CMD(QUIET_NOTIFICATION);
  489. IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
  490. IWL_CMD(MEASURE_ABORT_NOTIFICATION);
  491. IWL_CMD(REPLY_BT_CONFIG);
  492. IWL_CMD(REPLY_STATISTICS_CMD);
  493. IWL_CMD(STATISTICS_NOTIFICATION);
  494. IWL_CMD(REPLY_CARD_STATE_CMD);
  495. IWL_CMD(CARD_STATE_NOTIFICATION);
  496. IWL_CMD(MISSED_BEACONS_NOTIFICATION);
  497. default:
  498. return "UNKNOWN";
  499. }
  500. }
  501. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  502. /**
  503. * iwl_enqueue_hcmd - enqueue a uCode command
  504. * @priv: device private data point
  505. * @cmd: a point to the ucode command structure
  506. *
  507. * The function returns < 0 values to indicate the operation is
  508. * failed. On success, it turns the index (> 0) of command in the
  509. * command queue.
  510. */
  511. static int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  512. {
  513. struct iwl_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  514. struct iwl_queue *q = &txq->q;
  515. struct iwl_tfd_frame *tfd;
  516. u32 *control_flags;
  517. struct iwl_cmd *out_cmd;
  518. u32 idx;
  519. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  520. dma_addr_t phys_addr;
  521. int pad;
  522. u16 count;
  523. int ret;
  524. unsigned long flags;
  525. /* If any of the command structures end up being larger than
  526. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  527. * we will need to increase the size of the TFD entries */
  528. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  529. !(cmd->meta.flags & CMD_SIZE_HUGE));
  530. if (iwl_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  531. IWL_ERROR("No space for Tx\n");
  532. return -ENOSPC;
  533. }
  534. spin_lock_irqsave(&priv->hcmd_lock, flags);
  535. tfd = &txq->bd[q->first_empty];
  536. memset(tfd, 0, sizeof(*tfd));
  537. control_flags = (u32 *) tfd;
  538. idx = get_cmd_index(q, q->first_empty, cmd->meta.flags & CMD_SIZE_HUGE);
  539. out_cmd = &txq->cmd[idx];
  540. out_cmd->hdr.cmd = cmd->id;
  541. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  542. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  543. /* At this point, the out_cmd now has all of the incoming cmd
  544. * information */
  545. out_cmd->hdr.flags = 0;
  546. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  547. INDEX_TO_SEQ(q->first_empty));
  548. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  549. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  550. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  551. offsetof(struct iwl_cmd, hdr);
  552. iwl_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  553. pad = U32_PAD(cmd->len);
  554. count = TFD_CTL_COUNT_GET(*control_flags);
  555. *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
  556. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  557. "%d bytes at %d[%d]:%d\n",
  558. get_cmd_string(out_cmd->hdr.cmd),
  559. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  560. fix_size, q->first_empty, idx, IWL_CMD_QUEUE_NUM);
  561. txq->need_update = 1;
  562. q->first_empty = iwl_queue_inc_wrap(q->first_empty, q->n_bd);
  563. ret = iwl_tx_queue_update_write_ptr(priv, txq);
  564. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  565. return ret ? ret : idx;
  566. }
  567. int iwl_send_cmd_async(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  568. {
  569. int ret;
  570. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  571. /* An asynchronous command can not expect an SKB to be set. */
  572. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  573. /* An asynchronous command MUST have a callback. */
  574. BUG_ON(!cmd->meta.u.callback);
  575. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  576. return -EBUSY;
  577. ret = iwl_enqueue_hcmd(priv, cmd);
  578. if (ret < 0) {
  579. IWL_ERROR("Error sending %s: iwl_enqueue_hcmd failed: %d\n",
  580. get_cmd_string(cmd->id), ret);
  581. return ret;
  582. }
  583. return 0;
  584. }
  585. int iwl_send_cmd_sync(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  586. {
  587. int cmd_idx;
  588. int ret;
  589. static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
  590. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  591. /* A synchronous command can not have a callback set. */
  592. BUG_ON(cmd->meta.u.callback != NULL);
  593. if (atomic_xchg(&entry, 1)) {
  594. IWL_ERROR("Error sending %s: Already sending a host command\n",
  595. get_cmd_string(cmd->id));
  596. return -EBUSY;
  597. }
  598. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  599. if (cmd->meta.flags & CMD_WANT_SKB)
  600. cmd->meta.source = &cmd->meta;
  601. cmd_idx = iwl_enqueue_hcmd(priv, cmd);
  602. if (cmd_idx < 0) {
  603. ret = cmd_idx;
  604. IWL_ERROR("Error sending %s: iwl_enqueue_hcmd failed: %d\n",
  605. get_cmd_string(cmd->id), ret);
  606. goto out;
  607. }
  608. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  609. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  610. HOST_COMPLETE_TIMEOUT);
  611. if (!ret) {
  612. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  613. IWL_ERROR("Error sending %s: time out after %dms.\n",
  614. get_cmd_string(cmd->id),
  615. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  616. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  617. ret = -ETIMEDOUT;
  618. goto cancel;
  619. }
  620. }
  621. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  622. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  623. get_cmd_string(cmd->id));
  624. ret = -ECANCELED;
  625. goto fail;
  626. }
  627. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  628. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  629. get_cmd_string(cmd->id));
  630. ret = -EIO;
  631. goto fail;
  632. }
  633. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  634. IWL_ERROR("Error: Response NULL in '%s'\n",
  635. get_cmd_string(cmd->id));
  636. ret = -EIO;
  637. goto out;
  638. }
  639. ret = 0;
  640. goto out;
  641. cancel:
  642. if (cmd->meta.flags & CMD_WANT_SKB) {
  643. struct iwl_cmd *qcmd;
  644. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  645. * TX cmd queue. Otherwise in case the cmd comes
  646. * in later, it will possibly set an invalid
  647. * address (cmd->meta.source). */
  648. qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  649. qcmd->meta.flags &= ~CMD_WANT_SKB;
  650. }
  651. fail:
  652. if (cmd->meta.u.skb) {
  653. dev_kfree_skb_any(cmd->meta.u.skb);
  654. cmd->meta.u.skb = NULL;
  655. }
  656. out:
  657. atomic_set(&entry, 0);
  658. return ret;
  659. }
  660. int iwl_send_cmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  661. {
  662. /* A command can not be asynchronous AND expect an SKB to be set. */
  663. BUG_ON((cmd->meta.flags & CMD_ASYNC) &&
  664. (cmd->meta.flags & CMD_WANT_SKB));
  665. if (cmd->meta.flags & CMD_ASYNC)
  666. return iwl_send_cmd_async(priv, cmd);
  667. return iwl_send_cmd_sync(priv, cmd);
  668. }
  669. int iwl_send_cmd_pdu(struct iwl_priv *priv, u8 id, u16 len, const void *data)
  670. {
  671. struct iwl_host_cmd cmd = {
  672. .id = id,
  673. .len = len,
  674. .data = data,
  675. };
  676. return iwl_send_cmd_sync(priv, &cmd);
  677. }
  678. static int __must_check iwl_send_cmd_u32(struct iwl_priv *priv, u8 id, u32 val)
  679. {
  680. struct iwl_host_cmd cmd = {
  681. .id = id,
  682. .len = sizeof(val),
  683. .data = &val,
  684. };
  685. return iwl_send_cmd_sync(priv, &cmd);
  686. }
  687. int iwl_send_statistics_request(struct iwl_priv *priv)
  688. {
  689. return iwl_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  690. }
  691. /**
  692. * iwl_rxon_add_station - add station into station table.
  693. *
  694. * there is only one AP station with id= IWL_AP_ID
  695. * NOTE: mutex must be held before calling the this fnction
  696. */
  697. static int iwl_rxon_add_station(struct iwl_priv *priv,
  698. const u8 *addr, int is_ap)
  699. {
  700. u8 rc;
  701. /* Remove this station if it happens to already exist */
  702. iwl_remove_station(priv, addr, is_ap);
  703. rc = iwl_add_station(priv, addr, is_ap, 0);
  704. return rc;
  705. }
  706. /**
  707. * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
  708. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  709. * @channel: Any channel valid for the requested phymode
  710. * In addition to setting the staging RXON, priv->phymode is also set.
  711. *
  712. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  713. * in the staging RXON flag structure based on the phymode
  714. */
  715. static int iwl_set_rxon_channel(struct iwl_priv *priv, u8 phymode, u16 channel)
  716. {
  717. if (!iwl_get_channel_info(priv, phymode, channel)) {
  718. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  719. channel, phymode);
  720. return -EINVAL;
  721. }
  722. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  723. (priv->phymode == phymode))
  724. return 0;
  725. priv->staging_rxon.channel = cpu_to_le16(channel);
  726. if (phymode == MODE_IEEE80211A)
  727. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  728. else
  729. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  730. priv->phymode = phymode;
  731. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
  732. return 0;
  733. }
  734. /**
  735. * iwl_check_rxon_cmd - validate RXON structure is valid
  736. *
  737. * NOTE: This is really only useful during development and can eventually
  738. * be #ifdef'd out once the driver is stable and folks aren't actively
  739. * making changes
  740. */
  741. static int iwl_check_rxon_cmd(struct iwl_rxon_cmd *rxon)
  742. {
  743. int error = 0;
  744. int counter = 1;
  745. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  746. error |= le32_to_cpu(rxon->flags &
  747. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  748. RXON_FLG_RADAR_DETECT_MSK));
  749. if (error)
  750. IWL_WARNING("check 24G fields %d | %d\n",
  751. counter++, error);
  752. } else {
  753. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  754. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  755. if (error)
  756. IWL_WARNING("check 52 fields %d | %d\n",
  757. counter++, error);
  758. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  759. if (error)
  760. IWL_WARNING("check 52 CCK %d | %d\n",
  761. counter++, error);
  762. }
  763. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  764. if (error)
  765. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  766. /* make sure basic rates 6Mbps and 1Mbps are supported */
  767. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  768. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  769. if (error)
  770. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  771. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  772. if (error)
  773. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  774. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  775. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  776. if (error)
  777. IWL_WARNING("check CCK and short slot %d | %d\n",
  778. counter++, error);
  779. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  780. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  781. if (error)
  782. IWL_WARNING("check CCK & auto detect %d | %d\n",
  783. counter++, error);
  784. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  785. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  786. if (error)
  787. IWL_WARNING("check TGG and auto detect %d | %d\n",
  788. counter++, error);
  789. if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
  790. error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
  791. RXON_FLG_ANT_A_MSK)) == 0);
  792. if (error)
  793. IWL_WARNING("check antenna %d %d\n", counter++, error);
  794. if (error)
  795. IWL_WARNING("Tuning to channel %d\n",
  796. le16_to_cpu(rxon->channel));
  797. if (error) {
  798. IWL_ERROR("Not a valid iwl_rxon_assoc_cmd field values\n");
  799. return -1;
  800. }
  801. return 0;
  802. }
  803. /**
  804. * iwl_full_rxon_required - determine if RXON_ASSOC can be used in RXON commit
  805. * @priv: staging_rxon is comapred to active_rxon
  806. *
  807. * If the RXON structure is changing sufficient to require a new
  808. * tune or to clear and reset the RXON_FILTER_ASSOC_MSK then return 1
  809. * to indicate a new tune is required.
  810. */
  811. static int iwl_full_rxon_required(struct iwl_priv *priv)
  812. {
  813. /* These items are only settable from the full RXON command */
  814. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  815. compare_ether_addr(priv->staging_rxon.bssid_addr,
  816. priv->active_rxon.bssid_addr) ||
  817. compare_ether_addr(priv->staging_rxon.node_addr,
  818. priv->active_rxon.node_addr) ||
  819. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  820. priv->active_rxon.wlap_bssid_addr) ||
  821. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  822. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  823. (priv->staging_rxon.air_propagation !=
  824. priv->active_rxon.air_propagation) ||
  825. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  826. return 1;
  827. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  828. * be updated with the RXON_ASSOC command -- however only some
  829. * flag transitions are allowed using RXON_ASSOC */
  830. /* Check if we are not switching bands */
  831. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  832. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  833. return 1;
  834. /* Check if we are switching association toggle */
  835. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  836. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  837. return 1;
  838. return 0;
  839. }
  840. static int iwl_send_rxon_assoc(struct iwl_priv *priv)
  841. {
  842. int rc = 0;
  843. struct iwl_rx_packet *res = NULL;
  844. struct iwl_rxon_assoc_cmd rxon_assoc;
  845. struct iwl_host_cmd cmd = {
  846. .id = REPLY_RXON_ASSOC,
  847. .len = sizeof(rxon_assoc),
  848. .meta.flags = CMD_WANT_SKB,
  849. .data = &rxon_assoc,
  850. };
  851. const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
  852. const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
  853. if ((rxon1->flags == rxon2->flags) &&
  854. (rxon1->filter_flags == rxon2->filter_flags) &&
  855. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  856. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  857. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  858. return 0;
  859. }
  860. rxon_assoc.flags = priv->staging_rxon.flags;
  861. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  862. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  863. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  864. rxon_assoc.reserved = 0;
  865. rc = iwl_send_cmd_sync(priv, &cmd);
  866. if (rc)
  867. return rc;
  868. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  869. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  870. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  871. rc = -EIO;
  872. }
  873. priv->alloc_rxb_skb--;
  874. dev_kfree_skb_any(cmd.meta.u.skb);
  875. return rc;
  876. }
  877. /**
  878. * iwl_commit_rxon - commit staging_rxon to hardware
  879. *
  880. * The RXON command in staging_rxon is commited to the hardware and
  881. * the active_rxon structure is updated with the new data. This
  882. * function correctly transitions out of the RXON_ASSOC_MSK state if
  883. * a HW tune is required based on the RXON structure changes.
  884. */
  885. static int iwl_commit_rxon(struct iwl_priv *priv)
  886. {
  887. /* cast away the const for active_rxon in this function */
  888. struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  889. int rc = 0;
  890. DECLARE_MAC_BUF(mac);
  891. if (!iwl_is_alive(priv))
  892. return -1;
  893. /* always get timestamp with Rx frame */
  894. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  895. /* select antenna */
  896. priv->staging_rxon.flags &=
  897. ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
  898. priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);
  899. rc = iwl_check_rxon_cmd(&priv->staging_rxon);
  900. if (rc) {
  901. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  902. return -EINVAL;
  903. }
  904. /* If we don't need to send a full RXON, we can use
  905. * iwl_rxon_assoc_cmd which is used to reconfigure filter
  906. * and other flags for the current radio configuration. */
  907. if (!iwl_full_rxon_required(priv)) {
  908. rc = iwl_send_rxon_assoc(priv);
  909. if (rc) {
  910. IWL_ERROR("Error setting RXON_ASSOC "
  911. "configuration (%d).\n", rc);
  912. return rc;
  913. }
  914. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  915. return 0;
  916. }
  917. /* If we are currently associated and the new config requires
  918. * an RXON_ASSOC and the new config wants the associated mask enabled,
  919. * we must clear the associated from the active configuration
  920. * before we apply the new config */
  921. if (iwl_is_associated(priv) &&
  922. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  923. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  924. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  925. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  926. sizeof(struct iwl_rxon_cmd),
  927. &priv->active_rxon);
  928. /* If the mask clearing failed then we set
  929. * active_rxon back to what it was previously */
  930. if (rc) {
  931. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  932. IWL_ERROR("Error clearing ASSOC_MSK on current "
  933. "configuration (%d).\n", rc);
  934. return rc;
  935. }
  936. /* The RXON bit toggling will have cleared out the
  937. * station table in the uCode, so blank it in the driver
  938. * as well */
  939. iwl_clear_stations_table(priv);
  940. } else if (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) {
  941. /* When switching from non-associated to associated, the
  942. * uCode clears out the station table; so clear it in the
  943. * driver as well */
  944. iwl_clear_stations_table(priv);
  945. }
  946. IWL_DEBUG_INFO("Sending RXON\n"
  947. "* with%s RXON_FILTER_ASSOC_MSK\n"
  948. "* channel = %d\n"
  949. "* bssid = %s\n",
  950. ((priv->staging_rxon.filter_flags &
  951. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  952. le16_to_cpu(priv->staging_rxon.channel),
  953. print_mac(mac, priv->staging_rxon.bssid_addr));
  954. /* Apply the new configuration */
  955. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  956. sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
  957. if (rc) {
  958. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  959. return rc;
  960. }
  961. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  962. /* If we issue a new RXON command which required a tune then we must
  963. * send a new TXPOWER command or we won't be able to Tx any frames */
  964. rc = iwl_hw_reg_send_txpower(priv);
  965. if (rc) {
  966. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  967. return rc;
  968. }
  969. /* Add the broadcast address so we can send broadcast frames */
  970. if (iwl_rxon_add_station(priv, BROADCAST_ADDR, 0) ==
  971. IWL_INVALID_STATION) {
  972. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  973. return -EIO;
  974. }
  975. /* If we have set the ASSOC_MSK and we are in BSS mode then
  976. * add the IWL_AP_ID to the station rate table */
  977. if (iwl_is_associated(priv) &&
  978. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  979. if (iwl_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  980. == IWL_INVALID_STATION) {
  981. IWL_ERROR("Error adding AP address for transmit.\n");
  982. return -EIO;
  983. }
  984. /* Init the hardware's rate fallback order based on the
  985. * phymode */
  986. rc = iwl3945_init_hw_rate_table(priv);
  987. if (rc) {
  988. IWL_ERROR("Error setting HW rate table: %02X\n", rc);
  989. return -EIO;
  990. }
  991. return 0;
  992. }
  993. static int iwl_send_bt_config(struct iwl_priv *priv)
  994. {
  995. struct iwl_bt_cmd bt_cmd = {
  996. .flags = 3,
  997. .lead_time = 0xAA,
  998. .max_kill = 1,
  999. .kill_ack_mask = 0,
  1000. .kill_cts_mask = 0,
  1001. };
  1002. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1003. sizeof(struct iwl_bt_cmd), &bt_cmd);
  1004. }
  1005. static int iwl_send_scan_abort(struct iwl_priv *priv)
  1006. {
  1007. int rc = 0;
  1008. struct iwl_rx_packet *res;
  1009. struct iwl_host_cmd cmd = {
  1010. .id = REPLY_SCAN_ABORT_CMD,
  1011. .meta.flags = CMD_WANT_SKB,
  1012. };
  1013. /* If there isn't a scan actively going on in the hardware
  1014. * then we are in between scan bands and not actually
  1015. * actively scanning, so don't send the abort command */
  1016. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1017. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1018. return 0;
  1019. }
  1020. rc = iwl_send_cmd_sync(priv, &cmd);
  1021. if (rc) {
  1022. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1023. return rc;
  1024. }
  1025. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  1026. if (res->u.status != CAN_ABORT_STATUS) {
  1027. /* The scan abort will return 1 for success or
  1028. * 2 for "failure". A failure condition can be
  1029. * due to simply not being in an active scan which
  1030. * can occur if we send the scan abort before we
  1031. * the microcode has notified us that a scan is
  1032. * completed. */
  1033. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  1034. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1035. clear_bit(STATUS_SCAN_HW, &priv->status);
  1036. }
  1037. dev_kfree_skb_any(cmd.meta.u.skb);
  1038. return rc;
  1039. }
  1040. static int iwl_card_state_sync_callback(struct iwl_priv *priv,
  1041. struct iwl_cmd *cmd,
  1042. struct sk_buff *skb)
  1043. {
  1044. return 1;
  1045. }
  1046. /*
  1047. * CARD_STATE_CMD
  1048. *
  1049. * Use: Sets the internal card state to enable, disable, or halt
  1050. *
  1051. * When in the 'enable' state the card operates as normal.
  1052. * When in the 'disable' state, the card enters into a low power mode.
  1053. * When in the 'halt' state, the card is shut down and must be fully
  1054. * restarted to come back on.
  1055. */
  1056. static int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  1057. {
  1058. struct iwl_host_cmd cmd = {
  1059. .id = REPLY_CARD_STATE_CMD,
  1060. .len = sizeof(u32),
  1061. .data = &flags,
  1062. .meta.flags = meta_flag,
  1063. };
  1064. if (meta_flag & CMD_ASYNC)
  1065. cmd.meta.u.callback = iwl_card_state_sync_callback;
  1066. return iwl_send_cmd(priv, &cmd);
  1067. }
  1068. static int iwl_add_sta_sync_callback(struct iwl_priv *priv,
  1069. struct iwl_cmd *cmd, struct sk_buff *skb)
  1070. {
  1071. struct iwl_rx_packet *res = NULL;
  1072. if (!skb) {
  1073. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  1074. return 1;
  1075. }
  1076. res = (struct iwl_rx_packet *)skb->data;
  1077. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1078. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1079. res->hdr.flags);
  1080. return 1;
  1081. }
  1082. switch (res->u.add_sta.status) {
  1083. case ADD_STA_SUCCESS_MSK:
  1084. break;
  1085. default:
  1086. break;
  1087. }
  1088. /* We didn't cache the SKB; let the caller free it */
  1089. return 1;
  1090. }
  1091. int iwl_send_add_station(struct iwl_priv *priv,
  1092. struct iwl_addsta_cmd *sta, u8 flags)
  1093. {
  1094. struct iwl_rx_packet *res = NULL;
  1095. int rc = 0;
  1096. struct iwl_host_cmd cmd = {
  1097. .id = REPLY_ADD_STA,
  1098. .len = sizeof(struct iwl_addsta_cmd),
  1099. .meta.flags = flags,
  1100. .data = sta,
  1101. };
  1102. if (flags & CMD_ASYNC)
  1103. cmd.meta.u.callback = iwl_add_sta_sync_callback;
  1104. else
  1105. cmd.meta.flags |= CMD_WANT_SKB;
  1106. rc = iwl_send_cmd(priv, &cmd);
  1107. if (rc || (flags & CMD_ASYNC))
  1108. return rc;
  1109. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  1110. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1111. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1112. res->hdr.flags);
  1113. rc = -EIO;
  1114. }
  1115. if (rc == 0) {
  1116. switch (res->u.add_sta.status) {
  1117. case ADD_STA_SUCCESS_MSK:
  1118. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  1119. break;
  1120. default:
  1121. rc = -EIO;
  1122. IWL_WARNING("REPLY_ADD_STA failed\n");
  1123. break;
  1124. }
  1125. }
  1126. priv->alloc_rxb_skb--;
  1127. dev_kfree_skb_any(cmd.meta.u.skb);
  1128. return rc;
  1129. }
  1130. static int iwl_update_sta_key_info(struct iwl_priv *priv,
  1131. struct ieee80211_key_conf *keyconf,
  1132. u8 sta_id)
  1133. {
  1134. unsigned long flags;
  1135. __le16 key_flags = 0;
  1136. switch (keyconf->alg) {
  1137. case ALG_CCMP:
  1138. key_flags |= STA_KEY_FLG_CCMP;
  1139. key_flags |= cpu_to_le16(
  1140. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  1141. key_flags &= ~STA_KEY_FLG_INVALID;
  1142. break;
  1143. case ALG_TKIP:
  1144. case ALG_WEP:
  1145. return -EINVAL;
  1146. default:
  1147. return -EINVAL;
  1148. }
  1149. spin_lock_irqsave(&priv->sta_lock, flags);
  1150. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  1151. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  1152. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  1153. keyconf->keylen);
  1154. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  1155. keyconf->keylen);
  1156. priv->stations[sta_id].sta.key.key_flags = key_flags;
  1157. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1158. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1159. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1160. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  1161. iwl_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1162. return 0;
  1163. }
  1164. static int iwl_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  1165. {
  1166. unsigned long flags;
  1167. spin_lock_irqsave(&priv->sta_lock, flags);
  1168. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  1169. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl_keyinfo));
  1170. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1171. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1172. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1173. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1174. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1175. iwl_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1176. return 0;
  1177. }
  1178. static void iwl_clear_free_frames(struct iwl_priv *priv)
  1179. {
  1180. struct list_head *element;
  1181. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1182. priv->frames_count);
  1183. while (!list_empty(&priv->free_frames)) {
  1184. element = priv->free_frames.next;
  1185. list_del(element);
  1186. kfree(list_entry(element, struct iwl_frame, list));
  1187. priv->frames_count--;
  1188. }
  1189. if (priv->frames_count) {
  1190. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1191. priv->frames_count);
  1192. priv->frames_count = 0;
  1193. }
  1194. }
  1195. static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
  1196. {
  1197. struct iwl_frame *frame;
  1198. struct list_head *element;
  1199. if (list_empty(&priv->free_frames)) {
  1200. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1201. if (!frame) {
  1202. IWL_ERROR("Could not allocate frame!\n");
  1203. return NULL;
  1204. }
  1205. priv->frames_count++;
  1206. return frame;
  1207. }
  1208. element = priv->free_frames.next;
  1209. list_del(element);
  1210. return list_entry(element, struct iwl_frame, list);
  1211. }
  1212. static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
  1213. {
  1214. memset(frame, 0, sizeof(*frame));
  1215. list_add(&frame->list, &priv->free_frames);
  1216. }
  1217. unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
  1218. struct ieee80211_hdr *hdr,
  1219. const u8 *dest, int left)
  1220. {
  1221. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  1222. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1223. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1224. return 0;
  1225. if (priv->ibss_beacon->len > left)
  1226. return 0;
  1227. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1228. return priv->ibss_beacon->len;
  1229. }
  1230. static int iwl_rate_index_from_plcp(int plcp)
  1231. {
  1232. int i = 0;
  1233. for (i = 0; i < IWL_RATE_COUNT; i++)
  1234. if (iwl_rates[i].plcp == plcp)
  1235. return i;
  1236. return -1;
  1237. }
  1238. static u8 iwl_rate_get_lowest_plcp(int rate_mask)
  1239. {
  1240. u8 i;
  1241. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1242. i = iwl_rates[i].next_ieee) {
  1243. if (rate_mask & (1 << i))
  1244. return iwl_rates[i].plcp;
  1245. }
  1246. return IWL_RATE_INVALID;
  1247. }
  1248. static int iwl_send_beacon_cmd(struct iwl_priv *priv)
  1249. {
  1250. struct iwl_frame *frame;
  1251. unsigned int frame_size;
  1252. int rc;
  1253. u8 rate;
  1254. frame = iwl_get_free_frame(priv);
  1255. if (!frame) {
  1256. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1257. "command.\n");
  1258. return -ENOMEM;
  1259. }
  1260. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1261. rate = iwl_rate_get_lowest_plcp(priv->active_rate_basic &
  1262. 0xFF0);
  1263. if (rate == IWL_INVALID_RATE)
  1264. rate = IWL_RATE_6M_PLCP;
  1265. } else {
  1266. rate = iwl_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1267. if (rate == IWL_INVALID_RATE)
  1268. rate = IWL_RATE_1M_PLCP;
  1269. }
  1270. frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
  1271. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1272. &frame->u.cmd[0]);
  1273. iwl_free_frame(priv, frame);
  1274. return rc;
  1275. }
  1276. /******************************************************************************
  1277. *
  1278. * EEPROM related functions
  1279. *
  1280. ******************************************************************************/
  1281. static void get_eeprom_mac(struct iwl_priv *priv, u8 *mac)
  1282. {
  1283. memcpy(mac, priv->eeprom.mac_address, 6);
  1284. }
  1285. /**
  1286. * iwl_eeprom_init - read EEPROM contents
  1287. *
  1288. * Load the EEPROM from adapter into priv->eeprom
  1289. *
  1290. * NOTE: This routine uses the non-debug IO access functions.
  1291. */
  1292. int iwl_eeprom_init(struct iwl_priv *priv)
  1293. {
  1294. u16 *e = (u16 *)&priv->eeprom;
  1295. u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
  1296. u32 r;
  1297. int sz = sizeof(priv->eeprom);
  1298. int rc;
  1299. int i;
  1300. u16 addr;
  1301. /* The EEPROM structure has several padding buffers within it
  1302. * and when adding new EEPROM maps is subject to programmer errors
  1303. * which may be very difficult to identify without explicitly
  1304. * checking the resulting size of the eeprom map. */
  1305. BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
  1306. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  1307. IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
  1308. return -ENOENT;
  1309. }
  1310. rc = iwl_eeprom_aqcuire_semaphore(priv);
  1311. if (rc < 0) {
  1312. IWL_ERROR("Failed to aqcuire EEPROM semaphore.\n");
  1313. return -ENOENT;
  1314. }
  1315. /* eeprom is an array of 16bit values */
  1316. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  1317. _iwl_write32(priv, CSR_EEPROM_REG, addr << 1);
  1318. _iwl_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  1319. for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
  1320. i += IWL_EEPROM_ACCESS_DELAY) {
  1321. r = _iwl_read_restricted(priv, CSR_EEPROM_REG);
  1322. if (r & CSR_EEPROM_REG_READ_VALID_MSK)
  1323. break;
  1324. udelay(IWL_EEPROM_ACCESS_DELAY);
  1325. }
  1326. if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
  1327. IWL_ERROR("Time out reading EEPROM[%d]", addr);
  1328. return -ETIMEDOUT;
  1329. }
  1330. e[addr / 2] = le16_to_cpu(r >> 16);
  1331. }
  1332. return 0;
  1333. }
  1334. /******************************************************************************
  1335. *
  1336. * Misc. internal state and helper functions
  1337. *
  1338. ******************************************************************************/
  1339. #ifdef CONFIG_IWLWIFI_DEBUG
  1340. /**
  1341. * iwl_report_frame - dump frame to syslog during debug sessions
  1342. *
  1343. * hack this function to show different aspects of received frames,
  1344. * including selective frame dumps.
  1345. * group100 parameter selects whether to show 1 out of 100 good frames.
  1346. *
  1347. * TODO: ieee80211_hdr stuff is common to 3945 and 4965, so frame type
  1348. * info output is okay, but some of this stuff (e.g. iwl_rx_frame_stats)
  1349. * is 3945-specific and gives bad output for 4965. Need to split the
  1350. * functionality, keep common stuff here.
  1351. */
  1352. void iwl_report_frame(struct iwl_priv *priv,
  1353. struct iwl_rx_packet *pkt,
  1354. struct ieee80211_hdr *header, int group100)
  1355. {
  1356. u32 to_us;
  1357. u32 print_summary = 0;
  1358. u32 print_dump = 0; /* set to 1 to dump all frames' contents */
  1359. u32 hundred = 0;
  1360. u32 dataframe = 0;
  1361. u16 fc;
  1362. u16 seq_ctl;
  1363. u16 channel;
  1364. u16 phy_flags;
  1365. int rate_sym;
  1366. u16 length;
  1367. u16 status;
  1368. u16 bcn_tmr;
  1369. u32 tsf_low;
  1370. u64 tsf;
  1371. u8 rssi;
  1372. u8 agc;
  1373. u16 sig_avg;
  1374. u16 noise_diff;
  1375. struct iwl_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
  1376. struct iwl_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
  1377. struct iwl_rx_frame_end *rx_end = IWL_RX_END(pkt);
  1378. u8 *data = IWL_RX_DATA(pkt);
  1379. /* MAC header */
  1380. fc = le16_to_cpu(header->frame_control);
  1381. seq_ctl = le16_to_cpu(header->seq_ctrl);
  1382. /* metadata */
  1383. channel = le16_to_cpu(rx_hdr->channel);
  1384. phy_flags = le16_to_cpu(rx_hdr->phy_flags);
  1385. rate_sym = rx_hdr->rate;
  1386. length = le16_to_cpu(rx_hdr->len);
  1387. /* end-of-frame status and timestamp */
  1388. status = le32_to_cpu(rx_end->status);
  1389. bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
  1390. tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
  1391. tsf = le64_to_cpu(rx_end->timestamp);
  1392. /* signal statistics */
  1393. rssi = rx_stats->rssi;
  1394. agc = rx_stats->agc;
  1395. sig_avg = le16_to_cpu(rx_stats->sig_avg);
  1396. noise_diff = le16_to_cpu(rx_stats->noise_diff);
  1397. to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
  1398. /* if data frame is to us and all is good,
  1399. * (optionally) print summary for only 1 out of every 100 */
  1400. if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
  1401. (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
  1402. dataframe = 1;
  1403. if (!group100)
  1404. print_summary = 1; /* print each frame */
  1405. else if (priv->framecnt_to_us < 100) {
  1406. priv->framecnt_to_us++;
  1407. print_summary = 0;
  1408. } else {
  1409. priv->framecnt_to_us = 0;
  1410. print_summary = 1;
  1411. hundred = 1;
  1412. }
  1413. } else {
  1414. /* print summary for all other frames */
  1415. print_summary = 1;
  1416. }
  1417. if (print_summary) {
  1418. char *title;
  1419. u32 rate;
  1420. if (hundred)
  1421. title = "100Frames";
  1422. else if (fc & IEEE80211_FCTL_RETRY)
  1423. title = "Retry";
  1424. else if (ieee80211_is_assoc_response(fc))
  1425. title = "AscRsp";
  1426. else if (ieee80211_is_reassoc_response(fc))
  1427. title = "RasRsp";
  1428. else if (ieee80211_is_probe_response(fc)) {
  1429. title = "PrbRsp";
  1430. print_dump = 1; /* dump frame contents */
  1431. } else if (ieee80211_is_beacon(fc)) {
  1432. title = "Beacon";
  1433. print_dump = 1; /* dump frame contents */
  1434. } else if (ieee80211_is_atim(fc))
  1435. title = "ATIM";
  1436. else if (ieee80211_is_auth(fc))
  1437. title = "Auth";
  1438. else if (ieee80211_is_deauth(fc))
  1439. title = "DeAuth";
  1440. else if (ieee80211_is_disassoc(fc))
  1441. title = "DisAssoc";
  1442. else
  1443. title = "Frame";
  1444. rate = iwl_rate_index_from_plcp(rate_sym);
  1445. if (rate == -1)
  1446. rate = 0;
  1447. else
  1448. rate = iwl_rates[rate].ieee / 2;
  1449. /* print frame summary.
  1450. * MAC addresses show just the last byte (for brevity),
  1451. * but you can hack it to show more, if you'd like to. */
  1452. if (dataframe)
  1453. IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
  1454. "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
  1455. title, fc, header->addr1[5],
  1456. length, rssi, channel, rate);
  1457. else {
  1458. /* src/dst addresses assume managed mode */
  1459. IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
  1460. "src=0x%02x, rssi=%u, tim=%lu usec, "
  1461. "phy=0x%02x, chnl=%d\n",
  1462. title, fc, header->addr1[5],
  1463. header->addr3[5], rssi,
  1464. tsf_low - priv->scan_start_tsf,
  1465. phy_flags, channel);
  1466. }
  1467. }
  1468. if (print_dump)
  1469. iwl_print_hex_dump(IWL_DL_RX, data, length);
  1470. }
  1471. #endif
  1472. static void iwl_unset_hw_setting(struct iwl_priv *priv)
  1473. {
  1474. if (priv->hw_setting.shared_virt)
  1475. pci_free_consistent(priv->pci_dev,
  1476. sizeof(struct iwl_shared),
  1477. priv->hw_setting.shared_virt,
  1478. priv->hw_setting.shared_phys);
  1479. }
  1480. /**
  1481. * iwl_supported_rate_to_ie - fill in the supported rate in IE field
  1482. *
  1483. * return : set the bit for each supported rate insert in ie
  1484. */
  1485. static u16 iwl_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1486. u16 basic_rate, int max_count)
  1487. {
  1488. u16 ret_rates = 0, bit;
  1489. int i;
  1490. u8 *rates;
  1491. rates = &(ie[1]);
  1492. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1493. if (bit & supported_rate) {
  1494. ret_rates |= bit;
  1495. rates[*ie] = iwl_rates[i].ieee |
  1496. ((bit & basic_rate) ? 0x80 : 0x00);
  1497. *ie = *ie + 1;
  1498. if (*ie >= max_count)
  1499. break;
  1500. }
  1501. }
  1502. return ret_rates;
  1503. }
  1504. /**
  1505. * iwl_fill_probe_req - fill in all required fields and IE for probe request
  1506. */
  1507. static u16 iwl_fill_probe_req(struct iwl_priv *priv,
  1508. struct ieee80211_mgmt *frame,
  1509. int left, int is_direct)
  1510. {
  1511. int len = 0;
  1512. u8 *pos = NULL;
  1513. u16 ret_rates;
  1514. /* Make sure there is enough space for the probe request,
  1515. * two mandatory IEs and the data */
  1516. left -= 24;
  1517. if (left < 0)
  1518. return 0;
  1519. len += 24;
  1520. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1521. memcpy(frame->da, BROADCAST_ADDR, ETH_ALEN);
  1522. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1523. memcpy(frame->bssid, BROADCAST_ADDR, ETH_ALEN);
  1524. frame->seq_ctrl = 0;
  1525. /* fill in our indirect SSID IE */
  1526. /* ...next IE... */
  1527. left -= 2;
  1528. if (left < 0)
  1529. return 0;
  1530. len += 2;
  1531. pos = &(frame->u.probe_req.variable[0]);
  1532. *pos++ = WLAN_EID_SSID;
  1533. *pos++ = 0;
  1534. /* fill in our direct SSID IE... */
  1535. if (is_direct) {
  1536. /* ...next IE... */
  1537. left -= 2 + priv->essid_len;
  1538. if (left < 0)
  1539. return 0;
  1540. /* ... fill it in... */
  1541. *pos++ = WLAN_EID_SSID;
  1542. *pos++ = priv->essid_len;
  1543. memcpy(pos, priv->essid, priv->essid_len);
  1544. pos += priv->essid_len;
  1545. len += 2 + priv->essid_len;
  1546. }
  1547. /* fill in supported rate */
  1548. /* ...next IE... */
  1549. left -= 2;
  1550. if (left < 0)
  1551. return 0;
  1552. /* ... fill it in... */
  1553. *pos++ = WLAN_EID_SUPP_RATES;
  1554. *pos = 0;
  1555. ret_rates = priv->active_rate = priv->rates_mask;
  1556. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  1557. iwl_supported_rate_to_ie(pos, priv->active_rate,
  1558. priv->active_rate_basic, left);
  1559. len += 2 + *pos;
  1560. pos += (*pos) + 1;
  1561. ret_rates = ~ret_rates & priv->active_rate;
  1562. if (ret_rates == 0)
  1563. goto fill_end;
  1564. /* fill in supported extended rate */
  1565. /* ...next IE... */
  1566. left -= 2;
  1567. if (left < 0)
  1568. return 0;
  1569. /* ... fill it in... */
  1570. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1571. *pos = 0;
  1572. iwl_supported_rate_to_ie(pos, ret_rates, priv->active_rate_basic, left);
  1573. if (*pos > 0)
  1574. len += 2 + *pos;
  1575. fill_end:
  1576. return (u16)len;
  1577. }
  1578. /*
  1579. * QoS support
  1580. */
  1581. #ifdef CONFIG_IWLWIFI_QOS
  1582. static int iwl_send_qos_params_command(struct iwl_priv *priv,
  1583. struct iwl_qosparam_cmd *qos)
  1584. {
  1585. return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1586. sizeof(struct iwl_qosparam_cmd), qos);
  1587. }
  1588. static void iwl_reset_qos(struct iwl_priv *priv)
  1589. {
  1590. u16 cw_min = 15;
  1591. u16 cw_max = 1023;
  1592. u8 aifs = 2;
  1593. u8 is_legacy = 0;
  1594. unsigned long flags;
  1595. int i;
  1596. spin_lock_irqsave(&priv->lock, flags);
  1597. priv->qos_data.qos_active = 0;
  1598. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
  1599. if (priv->qos_data.qos_enable)
  1600. priv->qos_data.qos_active = 1;
  1601. if (!(priv->active_rate & 0xfff0)) {
  1602. cw_min = 31;
  1603. is_legacy = 1;
  1604. }
  1605. } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1606. if (priv->qos_data.qos_enable)
  1607. priv->qos_data.qos_active = 1;
  1608. } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
  1609. cw_min = 31;
  1610. is_legacy = 1;
  1611. }
  1612. if (priv->qos_data.qos_active)
  1613. aifs = 3;
  1614. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  1615. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  1616. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  1617. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  1618. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  1619. if (priv->qos_data.qos_active) {
  1620. i = 1;
  1621. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  1622. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  1623. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  1624. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1625. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1626. i = 2;
  1627. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1628. cpu_to_le16((cw_min + 1) / 2 - 1);
  1629. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1630. cpu_to_le16(cw_max);
  1631. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1632. if (is_legacy)
  1633. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1634. cpu_to_le16(6016);
  1635. else
  1636. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1637. cpu_to_le16(3008);
  1638. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1639. i = 3;
  1640. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1641. cpu_to_le16((cw_min + 1) / 4 - 1);
  1642. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1643. cpu_to_le16((cw_max + 1) / 2 - 1);
  1644. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1645. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1646. if (is_legacy)
  1647. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1648. cpu_to_le16(3264);
  1649. else
  1650. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1651. cpu_to_le16(1504);
  1652. } else {
  1653. for (i = 1; i < 4; i++) {
  1654. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1655. cpu_to_le16(cw_min);
  1656. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1657. cpu_to_le16(cw_max);
  1658. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  1659. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1660. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1661. }
  1662. }
  1663. IWL_DEBUG_QOS("set QoS to default \n");
  1664. spin_unlock_irqrestore(&priv->lock, flags);
  1665. }
  1666. static void iwl_activate_qos(struct iwl_priv *priv, u8 force)
  1667. {
  1668. unsigned long flags;
  1669. if (priv == NULL)
  1670. return;
  1671. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1672. return;
  1673. if (!priv->qos_data.qos_enable)
  1674. return;
  1675. spin_lock_irqsave(&priv->lock, flags);
  1676. priv->qos_data.def_qos_parm.qos_flags = 0;
  1677. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1678. !priv->qos_data.qos_cap.q_AP.txop_request)
  1679. priv->qos_data.def_qos_parm.qos_flags |=
  1680. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1681. if (priv->qos_data.qos_active)
  1682. priv->qos_data.def_qos_parm.qos_flags |=
  1683. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1684. spin_unlock_irqrestore(&priv->lock, flags);
  1685. if (force || iwl_is_associated(priv)) {
  1686. IWL_DEBUG_QOS("send QoS cmd with Qos active %d \n",
  1687. priv->qos_data.qos_active);
  1688. iwl_send_qos_params_command(priv,
  1689. &(priv->qos_data.def_qos_parm));
  1690. }
  1691. }
  1692. #endif /* CONFIG_IWLWIFI_QOS */
  1693. /*
  1694. * Power management (not Tx power!) functions
  1695. */
  1696. #define MSEC_TO_USEC 1024
  1697. #define NOSLP __constant_cpu_to_le32(0)
  1698. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK
  1699. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1700. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1701. __constant_cpu_to_le32(X1), \
  1702. __constant_cpu_to_le32(X2), \
  1703. __constant_cpu_to_le32(X3), \
  1704. __constant_cpu_to_le32(X4)}
  1705. /* default power management (not Tx power) table values */
  1706. /* for tim 0-10 */
  1707. static struct iwl_power_vec_entry range_0[IWL_POWER_AC] = {
  1708. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1709. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1710. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1711. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1712. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1713. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1714. };
  1715. /* for tim > 10 */
  1716. static struct iwl_power_vec_entry range_1[IWL_POWER_AC] = {
  1717. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1718. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1719. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1720. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1721. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1722. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1723. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1724. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1725. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1726. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1727. };
  1728. int iwl_power_init_handle(struct iwl_priv *priv)
  1729. {
  1730. int rc = 0, i;
  1731. struct iwl_power_mgr *pow_data;
  1732. int size = sizeof(struct iwl_power_vec_entry) * IWL_POWER_AC;
  1733. u16 pci_pm;
  1734. IWL_DEBUG_POWER("Initialize power \n");
  1735. pow_data = &(priv->power_data);
  1736. memset(pow_data, 0, sizeof(*pow_data));
  1737. pow_data->active_index = IWL_POWER_RANGE_0;
  1738. pow_data->dtim_val = 0xffff;
  1739. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1740. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1741. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1742. if (rc != 0)
  1743. return 0;
  1744. else {
  1745. struct iwl_powertable_cmd *cmd;
  1746. IWL_DEBUG_POWER("adjust power command flags\n");
  1747. for (i = 0; i < IWL_POWER_AC; i++) {
  1748. cmd = &pow_data->pwr_range_0[i].cmd;
  1749. if (pci_pm & 0x1)
  1750. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1751. else
  1752. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1753. }
  1754. }
  1755. return rc;
  1756. }
  1757. static int iwl_update_power_cmd(struct iwl_priv *priv,
  1758. struct iwl_powertable_cmd *cmd, u32 mode)
  1759. {
  1760. int rc = 0, i;
  1761. u8 skip;
  1762. u32 max_sleep = 0;
  1763. struct iwl_power_vec_entry *range;
  1764. u8 period = 0;
  1765. struct iwl_power_mgr *pow_data;
  1766. if (mode > IWL_POWER_INDEX_5) {
  1767. IWL_DEBUG_POWER("Error invalid power mode \n");
  1768. return -1;
  1769. }
  1770. pow_data = &(priv->power_data);
  1771. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1772. range = &pow_data->pwr_range_0[0];
  1773. else
  1774. range = &pow_data->pwr_range_1[1];
  1775. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl_powertable_cmd));
  1776. #ifdef IWL_MAC80211_DISABLE
  1777. if (priv->assoc_network != NULL) {
  1778. unsigned long flags;
  1779. period = priv->assoc_network->tim.tim_period;
  1780. }
  1781. #endif /*IWL_MAC80211_DISABLE */
  1782. skip = range[mode].no_dtim;
  1783. if (period == 0) {
  1784. period = 1;
  1785. skip = 0;
  1786. }
  1787. if (skip == 0) {
  1788. max_sleep = period;
  1789. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1790. } else {
  1791. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1792. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1793. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1794. }
  1795. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1796. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1797. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1798. }
  1799. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1800. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1801. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1802. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1803. le32_to_cpu(cmd->sleep_interval[0]),
  1804. le32_to_cpu(cmd->sleep_interval[1]),
  1805. le32_to_cpu(cmd->sleep_interval[2]),
  1806. le32_to_cpu(cmd->sleep_interval[3]),
  1807. le32_to_cpu(cmd->sleep_interval[4]));
  1808. return rc;
  1809. }
  1810. static int iwl_send_power_mode(struct iwl_priv *priv, u32 mode)
  1811. {
  1812. u32 final_mode = mode;
  1813. int rc;
  1814. struct iwl_powertable_cmd cmd;
  1815. /* If on battery, set to 3,
  1816. * if plugged into AC power, set to CAM ("continuosly aware mode"),
  1817. * else user level */
  1818. switch (mode) {
  1819. case IWL_POWER_BATTERY:
  1820. final_mode = IWL_POWER_INDEX_3;
  1821. break;
  1822. case IWL_POWER_AC:
  1823. final_mode = IWL_POWER_MODE_CAM;
  1824. break;
  1825. default:
  1826. final_mode = mode;
  1827. break;
  1828. }
  1829. iwl_update_power_cmd(priv, &cmd, final_mode);
  1830. rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1831. if (final_mode == IWL_POWER_MODE_CAM)
  1832. clear_bit(STATUS_POWER_PMI, &priv->status);
  1833. else
  1834. set_bit(STATUS_POWER_PMI, &priv->status);
  1835. return rc;
  1836. }
  1837. int iwl_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  1838. {
  1839. /* Filter incoming packets to determine if they are targeted toward
  1840. * this network, discarding packets coming from ourselves */
  1841. switch (priv->iw_mode) {
  1842. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1843. /* packets from our adapter are dropped (echo) */
  1844. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1845. return 0;
  1846. /* {broad,multi}cast packets to our IBSS go through */
  1847. if (is_multicast_ether_addr(header->addr1))
  1848. return !compare_ether_addr(header->addr3, priv->bssid);
  1849. /* packets to our adapter go through */
  1850. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1851. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1852. /* packets from our adapter are dropped (echo) */
  1853. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1854. return 0;
  1855. /* {broad,multi}cast packets to our BSS go through */
  1856. if (is_multicast_ether_addr(header->addr1))
  1857. return !compare_ether_addr(header->addr2, priv->bssid);
  1858. /* packets to our adapter go through */
  1859. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1860. }
  1861. return 1;
  1862. }
  1863. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1864. const char *iwl_get_tx_fail_reason(u32 status)
  1865. {
  1866. switch (status & TX_STATUS_MSK) {
  1867. case TX_STATUS_SUCCESS:
  1868. return "SUCCESS";
  1869. TX_STATUS_ENTRY(SHORT_LIMIT);
  1870. TX_STATUS_ENTRY(LONG_LIMIT);
  1871. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1872. TX_STATUS_ENTRY(MGMNT_ABORT);
  1873. TX_STATUS_ENTRY(NEXT_FRAG);
  1874. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1875. TX_STATUS_ENTRY(DEST_PS);
  1876. TX_STATUS_ENTRY(ABORTED);
  1877. TX_STATUS_ENTRY(BT_RETRY);
  1878. TX_STATUS_ENTRY(STA_INVALID);
  1879. TX_STATUS_ENTRY(FRAG_DROPPED);
  1880. TX_STATUS_ENTRY(TID_DISABLE);
  1881. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1882. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1883. TX_STATUS_ENTRY(TX_LOCKED);
  1884. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1885. }
  1886. return "UNKNOWN";
  1887. }
  1888. /**
  1889. * iwl_scan_cancel - Cancel any currently executing HW scan
  1890. *
  1891. * NOTE: priv->mutex is not required before calling this function
  1892. */
  1893. static int iwl_scan_cancel(struct iwl_priv *priv)
  1894. {
  1895. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1896. clear_bit(STATUS_SCANNING, &priv->status);
  1897. return 0;
  1898. }
  1899. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1900. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1901. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  1902. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  1903. queue_work(priv->workqueue, &priv->abort_scan);
  1904. } else
  1905. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  1906. return test_bit(STATUS_SCANNING, &priv->status);
  1907. }
  1908. return 0;
  1909. }
  1910. /**
  1911. * iwl_scan_cancel_timeout - Cancel any currently executing HW scan
  1912. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1913. *
  1914. * NOTE: priv->mutex must be held before calling this function
  1915. */
  1916. static int iwl_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
  1917. {
  1918. unsigned long now = jiffies;
  1919. int ret;
  1920. ret = iwl_scan_cancel(priv);
  1921. if (ret && ms) {
  1922. mutex_unlock(&priv->mutex);
  1923. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  1924. test_bit(STATUS_SCANNING, &priv->status))
  1925. msleep(1);
  1926. mutex_lock(&priv->mutex);
  1927. return test_bit(STATUS_SCANNING, &priv->status);
  1928. }
  1929. return ret;
  1930. }
  1931. static void iwl_sequence_reset(struct iwl_priv *priv)
  1932. {
  1933. /* Reset ieee stats */
  1934. /* We don't reset the net_device_stats (ieee->stats) on
  1935. * re-association */
  1936. priv->last_seq_num = -1;
  1937. priv->last_frag_num = -1;
  1938. priv->last_packet_time = 0;
  1939. iwl_scan_cancel(priv);
  1940. }
  1941. #define MAX_UCODE_BEACON_INTERVAL 1024
  1942. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1943. static __le16 iwl_adjust_beacon_interval(u16 beacon_val)
  1944. {
  1945. u16 new_val = 0;
  1946. u16 beacon_factor = 0;
  1947. beacon_factor =
  1948. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  1949. / MAX_UCODE_BEACON_INTERVAL;
  1950. new_val = beacon_val / beacon_factor;
  1951. return cpu_to_le16(new_val);
  1952. }
  1953. static void iwl_setup_rxon_timing(struct iwl_priv *priv)
  1954. {
  1955. u64 interval_tm_unit;
  1956. u64 tsf, result;
  1957. unsigned long flags;
  1958. struct ieee80211_conf *conf = NULL;
  1959. u16 beacon_int = 0;
  1960. conf = ieee80211_get_hw_conf(priv->hw);
  1961. spin_lock_irqsave(&priv->lock, flags);
  1962. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  1963. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  1964. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  1965. tsf = priv->timestamp1;
  1966. tsf = ((tsf << 32) | priv->timestamp0);
  1967. beacon_int = priv->beacon_int;
  1968. spin_unlock_irqrestore(&priv->lock, flags);
  1969. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  1970. if (beacon_int == 0) {
  1971. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  1972. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  1973. } else {
  1974. priv->rxon_timing.beacon_interval =
  1975. cpu_to_le16(beacon_int);
  1976. priv->rxon_timing.beacon_interval =
  1977. iwl_adjust_beacon_interval(
  1978. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1979. }
  1980. priv->rxon_timing.atim_window = 0;
  1981. } else {
  1982. priv->rxon_timing.beacon_interval =
  1983. iwl_adjust_beacon_interval(conf->beacon_int);
  1984. /* TODO: we need to get atim_window from upper stack
  1985. * for now we set to 0 */
  1986. priv->rxon_timing.atim_window = 0;
  1987. }
  1988. interval_tm_unit =
  1989. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  1990. result = do_div(tsf, interval_tm_unit);
  1991. priv->rxon_timing.beacon_init_val =
  1992. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  1993. IWL_DEBUG_ASSOC
  1994. ("beacon interval %d beacon timer %d beacon tim %d\n",
  1995. le16_to_cpu(priv->rxon_timing.beacon_interval),
  1996. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  1997. le16_to_cpu(priv->rxon_timing.atim_window));
  1998. }
  1999. static int iwl_scan_initiate(struct iwl_priv *priv)
  2000. {
  2001. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  2002. IWL_ERROR("APs don't scan.\n");
  2003. return 0;
  2004. }
  2005. if (!iwl_is_ready_rf(priv)) {
  2006. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  2007. return -EIO;
  2008. }
  2009. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2010. IWL_DEBUG_SCAN("Scan already in progress.\n");
  2011. return -EAGAIN;
  2012. }
  2013. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2014. IWL_DEBUG_SCAN("Scan request while abort pending. "
  2015. "Queuing.\n");
  2016. return -EAGAIN;
  2017. }
  2018. IWL_DEBUG_INFO("Starting scan...\n");
  2019. priv->scan_bands = 2;
  2020. set_bit(STATUS_SCANNING, &priv->status);
  2021. priv->scan_start = jiffies;
  2022. priv->scan_pass_start = priv->scan_start;
  2023. queue_work(priv->workqueue, &priv->request_scan);
  2024. return 0;
  2025. }
  2026. static int iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  2027. {
  2028. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  2029. if (hw_decrypt)
  2030. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  2031. else
  2032. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  2033. return 0;
  2034. }
  2035. static void iwl_set_flags_for_phymode(struct iwl_priv *priv, u8 phymode)
  2036. {
  2037. if (phymode == MODE_IEEE80211A) {
  2038. priv->staging_rxon.flags &=
  2039. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  2040. | RXON_FLG_CCK_MSK);
  2041. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2042. } else {
  2043. /* Copied from iwl_bg_post_associate() */
  2044. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2045. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2046. else
  2047. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2048. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  2049. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2050. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  2051. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  2052. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  2053. }
  2054. }
  2055. /*
  2056. * initilize rxon structure with default values fromm eeprom
  2057. */
  2058. static void iwl_connection_init_rx_config(struct iwl_priv *priv)
  2059. {
  2060. const struct iwl_channel_info *ch_info;
  2061. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2062. switch (priv->iw_mode) {
  2063. case IEEE80211_IF_TYPE_AP:
  2064. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  2065. break;
  2066. case IEEE80211_IF_TYPE_STA:
  2067. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  2068. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  2069. break;
  2070. case IEEE80211_IF_TYPE_IBSS:
  2071. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  2072. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  2073. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  2074. RXON_FILTER_ACCEPT_GRP_MSK;
  2075. break;
  2076. case IEEE80211_IF_TYPE_MNTR:
  2077. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  2078. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  2079. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  2080. break;
  2081. }
  2082. #if 0
  2083. /* TODO: Figure out when short_preamble would be set and cache from
  2084. * that */
  2085. if (!hw_to_local(priv->hw)->short_preamble)
  2086. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2087. else
  2088. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2089. #endif
  2090. ch_info = iwl_get_channel_info(priv, priv->phymode,
  2091. le16_to_cpu(priv->staging_rxon.channel));
  2092. if (!ch_info)
  2093. ch_info = &priv->channel_info[0];
  2094. /*
  2095. * in some case A channels are all non IBSS
  2096. * in this case force B/G channel
  2097. */
  2098. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  2099. !(is_channel_ibss(ch_info)))
  2100. ch_info = &priv->channel_info[0];
  2101. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  2102. if (is_channel_a_band(ch_info))
  2103. priv->phymode = MODE_IEEE80211A;
  2104. else
  2105. priv->phymode = MODE_IEEE80211G;
  2106. iwl_set_flags_for_phymode(priv, priv->phymode);
  2107. priv->staging_rxon.ofdm_basic_rates =
  2108. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2109. priv->staging_rxon.cck_basic_rates =
  2110. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2111. }
  2112. static int iwl_set_mode(struct iwl_priv *priv, int mode)
  2113. {
  2114. if (!iwl_is_ready_rf(priv))
  2115. return -EAGAIN;
  2116. if (mode == IEEE80211_IF_TYPE_IBSS) {
  2117. const struct iwl_channel_info *ch_info;
  2118. ch_info = iwl_get_channel_info(priv,
  2119. priv->phymode,
  2120. le16_to_cpu(priv->staging_rxon.channel));
  2121. if (!ch_info || !is_channel_ibss(ch_info)) {
  2122. IWL_ERROR("channel %d not IBSS channel\n",
  2123. le16_to_cpu(priv->staging_rxon.channel));
  2124. return -EINVAL;
  2125. }
  2126. }
  2127. cancel_delayed_work(&priv->scan_check);
  2128. if (iwl_scan_cancel_timeout(priv, 100)) {
  2129. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  2130. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  2131. return -EAGAIN;
  2132. }
  2133. priv->iw_mode = mode;
  2134. iwl_connection_init_rx_config(priv);
  2135. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2136. iwl_clear_stations_table(priv);
  2137. iwl_commit_rxon(priv);
  2138. return 0;
  2139. }
  2140. static void iwl_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  2141. struct ieee80211_tx_control *ctl,
  2142. struct iwl_cmd *cmd,
  2143. struct sk_buff *skb_frag,
  2144. int last_frag)
  2145. {
  2146. struct iwl_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
  2147. switch (keyinfo->alg) {
  2148. case ALG_CCMP:
  2149. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  2150. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  2151. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  2152. break;
  2153. case ALG_TKIP:
  2154. #if 0
  2155. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  2156. if (last_frag)
  2157. memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
  2158. 8);
  2159. else
  2160. memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
  2161. #endif
  2162. break;
  2163. case ALG_WEP:
  2164. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  2165. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  2166. if (keyinfo->keylen == 13)
  2167. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  2168. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  2169. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  2170. "with key %d\n", ctl->key_idx);
  2171. break;
  2172. case ALG_NONE:
  2173. IWL_DEBUG_TX("Tx packet in the clear (encrypt requested).\n");
  2174. break;
  2175. default:
  2176. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  2177. break;
  2178. }
  2179. }
  2180. /*
  2181. * handle build REPLY_TX command notification.
  2182. */
  2183. static void iwl_build_tx_cmd_basic(struct iwl_priv *priv,
  2184. struct iwl_cmd *cmd,
  2185. struct ieee80211_tx_control *ctrl,
  2186. struct ieee80211_hdr *hdr,
  2187. int is_unicast, u8 std_id)
  2188. {
  2189. __le16 *qc;
  2190. u16 fc = le16_to_cpu(hdr->frame_control);
  2191. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  2192. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2193. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  2194. tx_flags |= TX_CMD_FLG_ACK_MSK;
  2195. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  2196. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2197. if (ieee80211_is_probe_response(fc) &&
  2198. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  2199. tx_flags |= TX_CMD_FLG_TSF_MSK;
  2200. } else {
  2201. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  2202. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2203. }
  2204. cmd->cmd.tx.sta_id = std_id;
  2205. if (ieee80211_get_morefrag(hdr))
  2206. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  2207. qc = ieee80211_get_qos_ctrl(hdr);
  2208. if (qc) {
  2209. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  2210. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  2211. } else
  2212. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2213. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  2214. tx_flags |= TX_CMD_FLG_RTS_MSK;
  2215. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2216. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  2217. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2218. tx_flags |= TX_CMD_FLG_CTS_MSK;
  2219. }
  2220. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  2221. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2222. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  2223. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  2224. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  2225. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  2226. cmd->cmd.tx.timeout.pm_frame_timeout =
  2227. cpu_to_le16(3);
  2228. else
  2229. cmd->cmd.tx.timeout.pm_frame_timeout =
  2230. cpu_to_le16(2);
  2231. } else
  2232. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  2233. cmd->cmd.tx.driver_txop = 0;
  2234. cmd->cmd.tx.tx_flags = tx_flags;
  2235. cmd->cmd.tx.next_frame_len = 0;
  2236. }
  2237. static int iwl_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
  2238. {
  2239. int sta_id;
  2240. u16 fc = le16_to_cpu(hdr->frame_control);
  2241. /* If this frame is broadcast or not data then use the broadcast
  2242. * station id */
  2243. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  2244. is_multicast_ether_addr(hdr->addr1))
  2245. return priv->hw_setting.bcast_sta_id;
  2246. switch (priv->iw_mode) {
  2247. /* If this frame is part of a BSS network (we're a station), then
  2248. * we use the AP's station id */
  2249. case IEEE80211_IF_TYPE_STA:
  2250. return IWL_AP_ID;
  2251. /* If we are an AP, then find the station, or use BCAST */
  2252. case IEEE80211_IF_TYPE_AP:
  2253. sta_id = iwl_hw_find_station(priv, hdr->addr1);
  2254. if (sta_id != IWL_INVALID_STATION)
  2255. return sta_id;
  2256. return priv->hw_setting.bcast_sta_id;
  2257. /* If this frame is part of a IBSS network, then we use the
  2258. * target specific station id */
  2259. case IEEE80211_IF_TYPE_IBSS: {
  2260. DECLARE_MAC_BUF(mac);
  2261. sta_id = iwl_hw_find_station(priv, hdr->addr1);
  2262. if (sta_id != IWL_INVALID_STATION)
  2263. return sta_id;
  2264. sta_id = iwl_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
  2265. if (sta_id != IWL_INVALID_STATION)
  2266. return sta_id;
  2267. IWL_DEBUG_DROP("Station %s not in station map. "
  2268. "Defaulting to broadcast...\n",
  2269. print_mac(mac, hdr->addr1));
  2270. iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  2271. return priv->hw_setting.bcast_sta_id;
  2272. }
  2273. default:
  2274. IWL_WARNING("Unkown mode of operation: %d", priv->iw_mode);
  2275. return priv->hw_setting.bcast_sta_id;
  2276. }
  2277. }
  2278. /*
  2279. * start REPLY_TX command process
  2280. */
  2281. static int iwl_tx_skb(struct iwl_priv *priv,
  2282. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  2283. {
  2284. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2285. struct iwl_tfd_frame *tfd;
  2286. u32 *control_flags;
  2287. int txq_id = ctl->queue;
  2288. struct iwl_tx_queue *txq = NULL;
  2289. struct iwl_queue *q = NULL;
  2290. dma_addr_t phys_addr;
  2291. dma_addr_t txcmd_phys;
  2292. struct iwl_cmd *out_cmd = NULL;
  2293. u16 len, idx, len_org;
  2294. u8 id, hdr_len, unicast;
  2295. u8 sta_id;
  2296. u16 seq_number = 0;
  2297. u16 fc;
  2298. __le16 *qc;
  2299. u8 wait_write_ptr = 0;
  2300. unsigned long flags;
  2301. int rc;
  2302. spin_lock_irqsave(&priv->lock, flags);
  2303. if (iwl_is_rfkill(priv)) {
  2304. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  2305. goto drop_unlock;
  2306. }
  2307. if (!priv->interface_id) {
  2308. IWL_DEBUG_DROP("Dropping - !priv->interface_id\n");
  2309. goto drop_unlock;
  2310. }
  2311. if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
  2312. IWL_ERROR("ERROR: No TX rate available.\n");
  2313. goto drop_unlock;
  2314. }
  2315. unicast = !is_multicast_ether_addr(hdr->addr1);
  2316. id = 0;
  2317. fc = le16_to_cpu(hdr->frame_control);
  2318. #ifdef CONFIG_IWLWIFI_DEBUG
  2319. if (ieee80211_is_auth(fc))
  2320. IWL_DEBUG_TX("Sending AUTH frame\n");
  2321. else if (ieee80211_is_assoc_request(fc))
  2322. IWL_DEBUG_TX("Sending ASSOC frame\n");
  2323. else if (ieee80211_is_reassoc_request(fc))
  2324. IWL_DEBUG_TX("Sending REASSOC frame\n");
  2325. #endif
  2326. if (!iwl_is_associated(priv) &&
  2327. ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
  2328. IWL_DEBUG_DROP("Dropping - !iwl_is_associated\n");
  2329. goto drop_unlock;
  2330. }
  2331. spin_unlock_irqrestore(&priv->lock, flags);
  2332. hdr_len = ieee80211_get_hdrlen(fc);
  2333. sta_id = iwl_get_sta_id(priv, hdr);
  2334. if (sta_id == IWL_INVALID_STATION) {
  2335. DECLARE_MAC_BUF(mac);
  2336. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  2337. print_mac(mac, hdr->addr1));
  2338. goto drop;
  2339. }
  2340. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  2341. qc = ieee80211_get_qos_ctrl(hdr);
  2342. if (qc) {
  2343. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2344. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  2345. IEEE80211_SCTL_SEQ;
  2346. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  2347. (hdr->seq_ctrl &
  2348. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  2349. seq_number += 0x10;
  2350. }
  2351. txq = &priv->txq[txq_id];
  2352. q = &txq->q;
  2353. spin_lock_irqsave(&priv->lock, flags);
  2354. tfd = &txq->bd[q->first_empty];
  2355. memset(tfd, 0, sizeof(*tfd));
  2356. control_flags = (u32 *) tfd;
  2357. idx = get_cmd_index(q, q->first_empty, 0);
  2358. memset(&(txq->txb[q->first_empty]), 0, sizeof(struct iwl_tx_info));
  2359. txq->txb[q->first_empty].skb[0] = skb;
  2360. memcpy(&(txq->txb[q->first_empty].status.control),
  2361. ctl, sizeof(struct ieee80211_tx_control));
  2362. out_cmd = &txq->cmd[idx];
  2363. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2364. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2365. out_cmd->hdr.cmd = REPLY_TX;
  2366. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2367. INDEX_TO_SEQ(q->first_empty)));
  2368. /* copy frags header */
  2369. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2370. /* hdr = (struct ieee80211_hdr *)out_cmd->cmd.tx.hdr; */
  2371. len = priv->hw_setting.tx_cmd_len +
  2372. sizeof(struct iwl_cmd_header) + hdr_len;
  2373. len_org = len;
  2374. len = (len + 3) & ~3;
  2375. if (len_org != len)
  2376. len_org = 1;
  2377. else
  2378. len_org = 0;
  2379. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
  2380. offsetof(struct iwl_cmd, hdr);
  2381. iwl_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2382. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2383. iwl_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
  2384. /* 802.11 null functions have no payload... */
  2385. len = skb->len - hdr_len;
  2386. if (len) {
  2387. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2388. len, PCI_DMA_TODEVICE);
  2389. iwl_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2390. }
  2391. /* If there is no payload, then only one TFD is used */
  2392. if (!len)
  2393. *control_flags = TFD_CTL_COUNT_SET(1);
  2394. else
  2395. *control_flags = TFD_CTL_COUNT_SET(2) |
  2396. TFD_CTL_PAD_SET(U32_PAD(len));
  2397. len = (u16)skb->len;
  2398. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2399. /* TODO need this for burst mode later on */
  2400. iwl_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2401. /* set is_hcca to 0; it probably will never be implemented */
  2402. iwl_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2403. out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  2404. out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  2405. if (!ieee80211_get_morefrag(hdr)) {
  2406. txq->need_update = 1;
  2407. if (qc) {
  2408. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2409. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2410. }
  2411. } else {
  2412. wait_write_ptr = 1;
  2413. txq->need_update = 0;
  2414. }
  2415. iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2416. sizeof(out_cmd->cmd.tx));
  2417. iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2418. ieee80211_get_hdrlen(fc));
  2419. q->first_empty = iwl_queue_inc_wrap(q->first_empty, q->n_bd);
  2420. rc = iwl_tx_queue_update_write_ptr(priv, txq);
  2421. spin_unlock_irqrestore(&priv->lock, flags);
  2422. if (rc)
  2423. return rc;
  2424. if ((iwl_queue_space(q) < q->high_mark)
  2425. && priv->mac80211_registered) {
  2426. if (wait_write_ptr) {
  2427. spin_lock_irqsave(&priv->lock, flags);
  2428. txq->need_update = 1;
  2429. iwl_tx_queue_update_write_ptr(priv, txq);
  2430. spin_unlock_irqrestore(&priv->lock, flags);
  2431. }
  2432. ieee80211_stop_queue(priv->hw, ctl->queue);
  2433. }
  2434. return 0;
  2435. drop_unlock:
  2436. spin_unlock_irqrestore(&priv->lock, flags);
  2437. drop:
  2438. return -1;
  2439. }
  2440. static void iwl_set_rate(struct iwl_priv *priv)
  2441. {
  2442. const struct ieee80211_hw_mode *hw = NULL;
  2443. struct ieee80211_rate *rate;
  2444. int i;
  2445. hw = iwl_get_hw_mode(priv, priv->phymode);
  2446. priv->active_rate = 0;
  2447. priv->active_rate_basic = 0;
  2448. IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
  2449. hw->mode == MODE_IEEE80211A ?
  2450. 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
  2451. for (i = 0; i < hw->num_rates; i++) {
  2452. rate = &(hw->rates[i]);
  2453. if ((rate->val < IWL_RATE_COUNT) &&
  2454. (rate->flags & IEEE80211_RATE_SUPPORTED)) {
  2455. IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
  2456. rate->val, iwl_rates[rate->val].plcp,
  2457. (rate->flags & IEEE80211_RATE_BASIC) ?
  2458. "*" : "");
  2459. priv->active_rate |= (1 << rate->val);
  2460. if (rate->flags & IEEE80211_RATE_BASIC)
  2461. priv->active_rate_basic |= (1 << rate->val);
  2462. } else
  2463. IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
  2464. rate->val, iwl_rates[rate->val].plcp);
  2465. }
  2466. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2467. priv->active_rate, priv->active_rate_basic);
  2468. /*
  2469. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2470. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2471. * OFDM
  2472. */
  2473. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2474. priv->staging_rxon.cck_basic_rates =
  2475. ((priv->active_rate_basic &
  2476. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2477. else
  2478. priv->staging_rxon.cck_basic_rates =
  2479. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2480. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2481. priv->staging_rxon.ofdm_basic_rates =
  2482. ((priv->active_rate_basic &
  2483. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2484. IWL_FIRST_OFDM_RATE) & 0xFF;
  2485. else
  2486. priv->staging_rxon.ofdm_basic_rates =
  2487. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2488. }
  2489. static void iwl_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
  2490. {
  2491. unsigned long flags;
  2492. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2493. return;
  2494. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2495. disable_radio ? "OFF" : "ON");
  2496. if (disable_radio) {
  2497. iwl_scan_cancel(priv);
  2498. /* FIXME: This is a workaround for AP */
  2499. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2500. spin_lock_irqsave(&priv->lock, flags);
  2501. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2502. CSR_UCODE_SW_BIT_RFKILL);
  2503. spin_unlock_irqrestore(&priv->lock, flags);
  2504. iwl_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2505. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2506. }
  2507. return;
  2508. }
  2509. spin_lock_irqsave(&priv->lock, flags);
  2510. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2511. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2512. spin_unlock_irqrestore(&priv->lock, flags);
  2513. /* wake up ucode */
  2514. msleep(10);
  2515. spin_lock_irqsave(&priv->lock, flags);
  2516. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  2517. if (!iwl_grab_restricted_access(priv))
  2518. iwl_release_restricted_access(priv);
  2519. spin_unlock_irqrestore(&priv->lock, flags);
  2520. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2521. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2522. "disabled by HW switch\n");
  2523. return;
  2524. }
  2525. queue_work(priv->workqueue, &priv->restart);
  2526. return;
  2527. }
  2528. void iwl_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
  2529. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2530. {
  2531. u16 fc =
  2532. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2533. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2534. return;
  2535. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2536. return;
  2537. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2538. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2539. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2540. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2541. RX_RES_STATUS_BAD_ICV_MIC)
  2542. stats->flag |= RX_FLAG_MMIC_ERROR;
  2543. case RX_RES_STATUS_SEC_TYPE_WEP:
  2544. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2545. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2546. RX_RES_STATUS_DECRYPT_OK) {
  2547. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2548. stats->flag |= RX_FLAG_DECRYPTED;
  2549. }
  2550. break;
  2551. default:
  2552. break;
  2553. }
  2554. }
  2555. void iwl_handle_data_packet_monitor(struct iwl_priv *priv,
  2556. struct iwl_rx_mem_buffer *rxb,
  2557. void *data, short len,
  2558. struct ieee80211_rx_status *stats,
  2559. u16 phy_flags)
  2560. {
  2561. struct iwl_rt_rx_hdr *iwl_rt;
  2562. /* First cache any information we need before we overwrite
  2563. * the information provided in the skb from the hardware */
  2564. s8 signal = stats->ssi;
  2565. s8 noise = 0;
  2566. int rate = stats->rate;
  2567. u64 tsf = stats->mactime;
  2568. __le16 phy_flags_hw = cpu_to_le16(phy_flags);
  2569. /* We received data from the HW, so stop the watchdog */
  2570. if (len > IWL_RX_BUF_SIZE - sizeof(*iwl_rt)) {
  2571. IWL_DEBUG_DROP("Dropping too large packet in monitor\n");
  2572. return;
  2573. }
  2574. /* copy the frame data to write after where the radiotap header goes */
  2575. iwl_rt = (void *)rxb->skb->data;
  2576. memmove(iwl_rt->payload, data, len);
  2577. iwl_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
  2578. iwl_rt->rt_hdr.it_pad = 0; /* always good to zero */
  2579. /* total header + data */
  2580. iwl_rt->rt_hdr.it_len = cpu_to_le16(sizeof(*iwl_rt));
  2581. /* Set the size of the skb to the size of the frame */
  2582. skb_put(rxb->skb, sizeof(*iwl_rt) + len);
  2583. /* Big bitfield of all the fields we provide in radiotap */
  2584. iwl_rt->rt_hdr.it_present =
  2585. cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
  2586. (1 << IEEE80211_RADIOTAP_FLAGS) |
  2587. (1 << IEEE80211_RADIOTAP_RATE) |
  2588. (1 << IEEE80211_RADIOTAP_CHANNEL) |
  2589. (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
  2590. (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
  2591. (1 << IEEE80211_RADIOTAP_ANTENNA));
  2592. /* Zero the flags, we'll add to them as we go */
  2593. iwl_rt->rt_flags = 0;
  2594. iwl_rt->rt_tsf = cpu_to_le64(tsf);
  2595. /* Convert to dBm */
  2596. iwl_rt->rt_dbmsignal = signal;
  2597. iwl_rt->rt_dbmnoise = noise;
  2598. /* Convert the channel frequency and set the flags */
  2599. iwl_rt->rt_channelMHz = cpu_to_le16(stats->freq);
  2600. if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
  2601. iwl_rt->rt_chbitmask =
  2602. cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ));
  2603. else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
  2604. iwl_rt->rt_chbitmask =
  2605. cpu_to_le16((IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ));
  2606. else /* 802.11g */
  2607. iwl_rt->rt_chbitmask =
  2608. cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ));
  2609. rate = iwl_rate_index_from_plcp(rate);
  2610. if (rate == -1)
  2611. iwl_rt->rt_rate = 0;
  2612. else
  2613. iwl_rt->rt_rate = iwl_rates[rate].ieee;
  2614. /* antenna number */
  2615. iwl_rt->rt_antenna =
  2616. le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
  2617. /* set the preamble flag if we have it */
  2618. if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
  2619. iwl_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
  2620. IWL_DEBUG_RX("Rx packet of %d bytes.\n", rxb->skb->len);
  2621. stats->flag |= RX_FLAG_RADIOTAP;
  2622. ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
  2623. rxb->skb = NULL;
  2624. }
  2625. #define IWL_PACKET_RETRY_TIME HZ
  2626. int is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  2627. {
  2628. u16 sc = le16_to_cpu(header->seq_ctrl);
  2629. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2630. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2631. u16 *last_seq, *last_frag;
  2632. unsigned long *last_time;
  2633. switch (priv->iw_mode) {
  2634. case IEEE80211_IF_TYPE_IBSS:{
  2635. struct list_head *p;
  2636. struct iwl_ibss_seq *entry = NULL;
  2637. u8 *mac = header->addr2;
  2638. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2639. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2640. entry =
  2641. list_entry(p, struct iwl_ibss_seq, list);
  2642. if (!compare_ether_addr(entry->mac, mac))
  2643. break;
  2644. }
  2645. if (p == &priv->ibss_mac_hash[index]) {
  2646. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2647. if (!entry) {
  2648. IWL_ERROR
  2649. ("Cannot malloc new mac entry\n");
  2650. return 0;
  2651. }
  2652. memcpy(entry->mac, mac, ETH_ALEN);
  2653. entry->seq_num = seq;
  2654. entry->frag_num = frag;
  2655. entry->packet_time = jiffies;
  2656. list_add(&entry->list,
  2657. &priv->ibss_mac_hash[index]);
  2658. return 0;
  2659. }
  2660. last_seq = &entry->seq_num;
  2661. last_frag = &entry->frag_num;
  2662. last_time = &entry->packet_time;
  2663. break;
  2664. }
  2665. case IEEE80211_IF_TYPE_STA:
  2666. last_seq = &priv->last_seq_num;
  2667. last_frag = &priv->last_frag_num;
  2668. last_time = &priv->last_packet_time;
  2669. break;
  2670. default:
  2671. return 0;
  2672. }
  2673. if ((*last_seq == seq) &&
  2674. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2675. if (*last_frag == frag)
  2676. goto drop;
  2677. if (*last_frag + 1 != frag)
  2678. /* out-of-order fragment */
  2679. goto drop;
  2680. } else
  2681. *last_seq = seq;
  2682. *last_frag = frag;
  2683. *last_time = jiffies;
  2684. return 0;
  2685. drop:
  2686. return 1;
  2687. }
  2688. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  2689. #include "iwl-spectrum.h"
  2690. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2691. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2692. #define TIME_UNIT 1024
  2693. /*
  2694. * extended beacon time format
  2695. * time in usec will be changed into a 32-bit value in 8:24 format
  2696. * the high 1 byte is the beacon counts
  2697. * the lower 3 bytes is the time in usec within one beacon interval
  2698. */
  2699. static u32 iwl_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2700. {
  2701. u32 quot;
  2702. u32 rem;
  2703. u32 interval = beacon_interval * 1024;
  2704. if (!interval || !usec)
  2705. return 0;
  2706. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2707. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2708. return (quot << 24) + rem;
  2709. }
  2710. /* base is usually what we get from ucode with each received frame,
  2711. * the same as HW timer counter counting down
  2712. */
  2713. static __le32 iwl_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2714. {
  2715. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2716. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2717. u32 interval = beacon_interval * TIME_UNIT;
  2718. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2719. (addon & BEACON_TIME_MASK_HIGH);
  2720. if (base_low > addon_low)
  2721. res += base_low - addon_low;
  2722. else if (base_low < addon_low) {
  2723. res += interval + base_low - addon_low;
  2724. res += (1 << 24);
  2725. } else
  2726. res += (1 << 24);
  2727. return cpu_to_le32(res);
  2728. }
  2729. static int iwl_get_measurement(struct iwl_priv *priv,
  2730. struct ieee80211_measurement_params *params,
  2731. u8 type)
  2732. {
  2733. struct iwl_spectrum_cmd spectrum;
  2734. struct iwl_rx_packet *res;
  2735. struct iwl_host_cmd cmd = {
  2736. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2737. .data = (void *)&spectrum,
  2738. .meta.flags = CMD_WANT_SKB,
  2739. };
  2740. u32 add_time = le64_to_cpu(params->start_time);
  2741. int rc;
  2742. int spectrum_resp_status;
  2743. int duration = le16_to_cpu(params->duration);
  2744. if (iwl_is_associated(priv))
  2745. add_time =
  2746. iwl_usecs_to_beacons(
  2747. le64_to_cpu(params->start_time) - priv->last_tsf,
  2748. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2749. memset(&spectrum, 0, sizeof(spectrum));
  2750. spectrum.channel_count = cpu_to_le16(1);
  2751. spectrum.flags =
  2752. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2753. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2754. cmd.len = sizeof(spectrum);
  2755. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2756. if (iwl_is_associated(priv))
  2757. spectrum.start_time =
  2758. iwl_add_beacon_time(priv->last_beacon_time,
  2759. add_time,
  2760. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2761. else
  2762. spectrum.start_time = 0;
  2763. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2764. spectrum.channels[0].channel = params->channel;
  2765. spectrum.channels[0].type = type;
  2766. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2767. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2768. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2769. rc = iwl_send_cmd_sync(priv, &cmd);
  2770. if (rc)
  2771. return rc;
  2772. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  2773. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2774. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2775. rc = -EIO;
  2776. }
  2777. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2778. switch (spectrum_resp_status) {
  2779. case 0: /* Command will be handled */
  2780. if (res->u.spectrum.id != 0xff) {
  2781. IWL_DEBUG_INFO
  2782. ("Replaced existing measurement: %d\n",
  2783. res->u.spectrum.id);
  2784. priv->measurement_status &= ~MEASUREMENT_READY;
  2785. }
  2786. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2787. rc = 0;
  2788. break;
  2789. case 1: /* Command will not be handled */
  2790. rc = -EAGAIN;
  2791. break;
  2792. }
  2793. dev_kfree_skb_any(cmd.meta.u.skb);
  2794. return rc;
  2795. }
  2796. #endif
  2797. static void iwl_txstatus_to_ieee(struct iwl_priv *priv,
  2798. struct iwl_tx_info *tx_sta)
  2799. {
  2800. tx_sta->status.ack_signal = 0;
  2801. tx_sta->status.excessive_retries = 0;
  2802. tx_sta->status.queue_length = 0;
  2803. tx_sta->status.queue_number = 0;
  2804. if (in_interrupt())
  2805. ieee80211_tx_status_irqsafe(priv->hw,
  2806. tx_sta->skb[0], &(tx_sta->status));
  2807. else
  2808. ieee80211_tx_status(priv->hw,
  2809. tx_sta->skb[0], &(tx_sta->status));
  2810. tx_sta->skb[0] = NULL;
  2811. }
  2812. /**
  2813. * iwl_tx_queue_reclaim - Reclaim Tx queue entries no more used by NIC.
  2814. *
  2815. * When FW advances 'R' index, all entries between old and
  2816. * new 'R' index need to be reclaimed. As result, some free space
  2817. * forms. If there is enough free space (> low mark), wake Tx queue.
  2818. */
  2819. int iwl_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
  2820. {
  2821. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  2822. struct iwl_queue *q = &txq->q;
  2823. int nfreed = 0;
  2824. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2825. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2826. "is out of range [0-%d] %d %d.\n", txq_id,
  2827. index, q->n_bd, q->first_empty, q->last_used);
  2828. return 0;
  2829. }
  2830. for (index = iwl_queue_inc_wrap(index, q->n_bd);
  2831. q->last_used != index;
  2832. q->last_used = iwl_queue_inc_wrap(q->last_used, q->n_bd)) {
  2833. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2834. iwl_txstatus_to_ieee(priv,
  2835. &(txq->txb[txq->q.last_used]));
  2836. iwl_hw_txq_free_tfd(priv, txq);
  2837. } else if (nfreed > 1) {
  2838. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2839. q->first_empty, q->last_used);
  2840. queue_work(priv->workqueue, &priv->restart);
  2841. }
  2842. nfreed++;
  2843. }
  2844. if (iwl_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2845. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2846. priv->mac80211_registered)
  2847. ieee80211_wake_queue(priv->hw, txq_id);
  2848. return nfreed;
  2849. }
  2850. static int iwl_is_tx_success(u32 status)
  2851. {
  2852. return (status & 0xFF) == 0x1;
  2853. }
  2854. /******************************************************************************
  2855. *
  2856. * Generic RX handler implementations
  2857. *
  2858. ******************************************************************************/
  2859. static void iwl_rx_reply_tx(struct iwl_priv *priv,
  2860. struct iwl_rx_mem_buffer *rxb)
  2861. {
  2862. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2863. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2864. int txq_id = SEQ_TO_QUEUE(sequence);
  2865. int index = SEQ_TO_INDEX(sequence);
  2866. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  2867. struct ieee80211_tx_status *tx_status;
  2868. struct iwl_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  2869. u32 status = le32_to_cpu(tx_resp->status);
  2870. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  2871. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  2872. "is out of range [0-%d] %d %d\n", txq_id,
  2873. index, txq->q.n_bd, txq->q.first_empty,
  2874. txq->q.last_used);
  2875. return;
  2876. }
  2877. tx_status = &(txq->txb[txq->q.last_used].status);
  2878. tx_status->retry_count = tx_resp->failure_frame;
  2879. tx_status->queue_number = status;
  2880. tx_status->queue_length = tx_resp->bt_kill_count;
  2881. tx_status->queue_length |= tx_resp->failure_rts;
  2882. tx_status->flags =
  2883. iwl_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  2884. tx_status->control.tx_rate = iwl_rate_index_from_plcp(tx_resp->rate);
  2885. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
  2886. txq_id, iwl_get_tx_fail_reason(status), status,
  2887. tx_resp->rate, tx_resp->failure_frame);
  2888. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  2889. if (index != -1)
  2890. iwl_tx_queue_reclaim(priv, txq_id, index);
  2891. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  2892. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  2893. }
  2894. static void iwl_rx_reply_alive(struct iwl_priv *priv,
  2895. struct iwl_rx_mem_buffer *rxb)
  2896. {
  2897. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2898. struct iwl_alive_resp *palive;
  2899. struct delayed_work *pwork;
  2900. palive = &pkt->u.alive_frame;
  2901. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  2902. "0x%01X 0x%01X\n",
  2903. palive->is_valid, palive->ver_type,
  2904. palive->ver_subtype);
  2905. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  2906. IWL_DEBUG_INFO("Initialization Alive received.\n");
  2907. memcpy(&priv->card_alive_init,
  2908. &pkt->u.alive_frame,
  2909. sizeof(struct iwl_init_alive_resp));
  2910. pwork = &priv->init_alive_start;
  2911. } else {
  2912. IWL_DEBUG_INFO("Runtime Alive received.\n");
  2913. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  2914. sizeof(struct iwl_alive_resp));
  2915. pwork = &priv->alive_start;
  2916. iwl_disable_events(priv);
  2917. }
  2918. /* We delay the ALIVE response by 5ms to
  2919. * give the HW RF Kill time to activate... */
  2920. if (palive->is_valid == UCODE_VALID_OK)
  2921. queue_delayed_work(priv->workqueue, pwork,
  2922. msecs_to_jiffies(5));
  2923. else
  2924. IWL_WARNING("uCode did not respond OK.\n");
  2925. }
  2926. static void iwl_rx_reply_add_sta(struct iwl_priv *priv,
  2927. struct iwl_rx_mem_buffer *rxb)
  2928. {
  2929. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2930. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  2931. return;
  2932. }
  2933. static void iwl_rx_reply_error(struct iwl_priv *priv,
  2934. struct iwl_rx_mem_buffer *rxb)
  2935. {
  2936. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2937. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  2938. "seq 0x%04X ser 0x%08X\n",
  2939. le32_to_cpu(pkt->u.err_resp.error_type),
  2940. get_cmd_string(pkt->u.err_resp.cmd_id),
  2941. pkt->u.err_resp.cmd_id,
  2942. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  2943. le32_to_cpu(pkt->u.err_resp.error_info));
  2944. }
  2945. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  2946. static void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  2947. {
  2948. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2949. struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
  2950. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  2951. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  2952. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  2953. rxon->channel = csa->channel;
  2954. priv->staging_rxon.channel = csa->channel;
  2955. }
  2956. static void iwl_rx_spectrum_measure_notif(struct iwl_priv *priv,
  2957. struct iwl_rx_mem_buffer *rxb)
  2958. {
  2959. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  2960. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2961. struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2962. if (!report->state) {
  2963. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  2964. "Spectrum Measure Notification: Start\n");
  2965. return;
  2966. }
  2967. memcpy(&priv->measure_report, report, sizeof(*report));
  2968. priv->measurement_status |= MEASUREMENT_READY;
  2969. #endif
  2970. }
  2971. static void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
  2972. struct iwl_rx_mem_buffer *rxb)
  2973. {
  2974. #ifdef CONFIG_IWLWIFI_DEBUG
  2975. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2976. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  2977. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  2978. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  2979. #endif
  2980. }
  2981. static void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  2982. struct iwl_rx_mem_buffer *rxb)
  2983. {
  2984. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2985. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  2986. "notification for %s:\n",
  2987. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  2988. iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  2989. }
  2990. static void iwl_bg_beacon_update(struct work_struct *work)
  2991. {
  2992. struct iwl_priv *priv =
  2993. container_of(work, struct iwl_priv, beacon_update);
  2994. struct sk_buff *beacon;
  2995. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  2996. beacon = ieee80211_beacon_get(priv->hw, priv->interface_id, NULL);
  2997. if (!beacon) {
  2998. IWL_ERROR("update beacon failed\n");
  2999. return;
  3000. }
  3001. mutex_lock(&priv->mutex);
  3002. /* new beacon skb is allocated every time; dispose previous.*/
  3003. if (priv->ibss_beacon)
  3004. dev_kfree_skb(priv->ibss_beacon);
  3005. priv->ibss_beacon = beacon;
  3006. mutex_unlock(&priv->mutex);
  3007. iwl_send_beacon_cmd(priv);
  3008. }
  3009. static void iwl_rx_beacon_notif(struct iwl_priv *priv,
  3010. struct iwl_rx_mem_buffer *rxb)
  3011. {
  3012. #ifdef CONFIG_IWLWIFI_DEBUG
  3013. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3014. struct iwl_beacon_notif *beacon = &(pkt->u.beacon_status);
  3015. u8 rate = beacon->beacon_notify_hdr.rate;
  3016. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  3017. "tsf %d %d rate %d\n",
  3018. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  3019. beacon->beacon_notify_hdr.failure_frame,
  3020. le32_to_cpu(beacon->ibss_mgr_status),
  3021. le32_to_cpu(beacon->high_tsf),
  3022. le32_to_cpu(beacon->low_tsf), rate);
  3023. #endif
  3024. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  3025. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  3026. queue_work(priv->workqueue, &priv->beacon_update);
  3027. }
  3028. /* Service response to REPLY_SCAN_CMD (0x80) */
  3029. static void iwl_rx_reply_scan(struct iwl_priv *priv,
  3030. struct iwl_rx_mem_buffer *rxb)
  3031. {
  3032. #ifdef CONFIG_IWLWIFI_DEBUG
  3033. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3034. struct iwl_scanreq_notification *notif =
  3035. (struct iwl_scanreq_notification *)pkt->u.raw;
  3036. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  3037. #endif
  3038. }
  3039. /* Service SCAN_START_NOTIFICATION (0x82) */
  3040. static void iwl_rx_scan_start_notif(struct iwl_priv *priv,
  3041. struct iwl_rx_mem_buffer *rxb)
  3042. {
  3043. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3044. struct iwl_scanstart_notification *notif =
  3045. (struct iwl_scanstart_notification *)pkt->u.raw;
  3046. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  3047. IWL_DEBUG_SCAN("Scan start: "
  3048. "%d [802.11%s] "
  3049. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  3050. notif->channel,
  3051. notif->band ? "bg" : "a",
  3052. notif->tsf_high,
  3053. notif->tsf_low, notif->status, notif->beacon_timer);
  3054. }
  3055. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  3056. static void iwl_rx_scan_results_notif(struct iwl_priv *priv,
  3057. struct iwl_rx_mem_buffer *rxb)
  3058. {
  3059. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3060. struct iwl_scanresults_notification *notif =
  3061. (struct iwl_scanresults_notification *)pkt->u.raw;
  3062. IWL_DEBUG_SCAN("Scan ch.res: "
  3063. "%d [802.11%s] "
  3064. "(TSF: 0x%08X:%08X) - %d "
  3065. "elapsed=%lu usec (%dms since last)\n",
  3066. notif->channel,
  3067. notif->band ? "bg" : "a",
  3068. le32_to_cpu(notif->tsf_high),
  3069. le32_to_cpu(notif->tsf_low),
  3070. le32_to_cpu(notif->statistics[0]),
  3071. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  3072. jiffies_to_msecs(elapsed_jiffies
  3073. (priv->last_scan_jiffies, jiffies)));
  3074. priv->last_scan_jiffies = jiffies;
  3075. }
  3076. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  3077. static void iwl_rx_scan_complete_notif(struct iwl_priv *priv,
  3078. struct iwl_rx_mem_buffer *rxb)
  3079. {
  3080. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3081. struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  3082. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  3083. scan_notif->scanned_channels,
  3084. scan_notif->tsf_low,
  3085. scan_notif->tsf_high, scan_notif->status);
  3086. /* The HW is no longer scanning */
  3087. clear_bit(STATUS_SCAN_HW, &priv->status);
  3088. /* The scan completion notification came in, so kill that timer... */
  3089. cancel_delayed_work(&priv->scan_check);
  3090. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  3091. (priv->scan_bands == 2) ? "2.4" : "5.2",
  3092. jiffies_to_msecs(elapsed_jiffies
  3093. (priv->scan_pass_start, jiffies)));
  3094. /* Remove this scanned band from the list
  3095. * of pending bands to scan */
  3096. priv->scan_bands--;
  3097. /* If a request to abort was given, or the scan did not succeed
  3098. * then we reset the scan state machine and terminate,
  3099. * re-queuing another scan if one has been requested */
  3100. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3101. IWL_DEBUG_INFO("Aborted scan completed.\n");
  3102. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  3103. } else {
  3104. /* If there are more bands on this scan pass reschedule */
  3105. if (priv->scan_bands > 0)
  3106. goto reschedule;
  3107. }
  3108. priv->last_scan_jiffies = jiffies;
  3109. IWL_DEBUG_INFO("Setting scan to off\n");
  3110. clear_bit(STATUS_SCANNING, &priv->status);
  3111. IWL_DEBUG_INFO("Scan took %dms\n",
  3112. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  3113. queue_work(priv->workqueue, &priv->scan_completed);
  3114. return;
  3115. reschedule:
  3116. priv->scan_pass_start = jiffies;
  3117. queue_work(priv->workqueue, &priv->request_scan);
  3118. }
  3119. /* Handle notification from uCode that card's power state is changing
  3120. * due to software, hardware, or critical temperature RFKILL */
  3121. static void iwl_rx_card_state_notif(struct iwl_priv *priv,
  3122. struct iwl_rx_mem_buffer *rxb)
  3123. {
  3124. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3125. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  3126. unsigned long status = priv->status;
  3127. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  3128. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  3129. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  3130. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3131. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3132. if (flags & HW_CARD_DISABLED)
  3133. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3134. else
  3135. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3136. if (flags & SW_CARD_DISABLED)
  3137. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3138. else
  3139. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  3140. iwl_scan_cancel(priv);
  3141. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  3142. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  3143. (test_bit(STATUS_RF_KILL_SW, &status) !=
  3144. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  3145. queue_work(priv->workqueue, &priv->rf_kill);
  3146. else
  3147. wake_up_interruptible(&priv->wait_command_queue);
  3148. }
  3149. /**
  3150. * iwl_setup_rx_handlers - Initialize Rx handler callbacks
  3151. *
  3152. * Setup the RX handlers for each of the reply types sent from the uCode
  3153. * to the host.
  3154. *
  3155. * This function chains into the hardware specific files for them to setup
  3156. * any hardware specific handlers as well.
  3157. */
  3158. static void iwl_setup_rx_handlers(struct iwl_priv *priv)
  3159. {
  3160. priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
  3161. priv->rx_handlers[REPLY_ADD_STA] = iwl_rx_reply_add_sta;
  3162. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  3163. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  3164. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  3165. iwl_rx_spectrum_measure_notif;
  3166. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  3167. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  3168. iwl_rx_pm_debug_statistics_notif;
  3169. priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
  3170. /* NOTE: iwl_rx_statistics is different based on whether
  3171. * the build is for the 3945 or the 4965. See the
  3172. * corresponding implementation in iwl-XXXX.c
  3173. *
  3174. * The same handler is used for both the REPLY to a
  3175. * discrete statistics request from the host as well as
  3176. * for the periodic statistics notification from the uCode
  3177. */
  3178. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_hw_rx_statistics;
  3179. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_hw_rx_statistics;
  3180. priv->rx_handlers[REPLY_SCAN_CMD] = iwl_rx_reply_scan;
  3181. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl_rx_scan_start_notif;
  3182. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3183. iwl_rx_scan_results_notif;
  3184. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3185. iwl_rx_scan_complete_notif;
  3186. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
  3187. priv->rx_handlers[REPLY_TX] = iwl_rx_reply_tx;
  3188. /* Setup hardware specific Rx handlers */
  3189. iwl_hw_rx_handler_setup(priv);
  3190. }
  3191. /**
  3192. * iwl_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3193. * @rxb: Rx buffer to reclaim
  3194. *
  3195. * If an Rx buffer has an async callback associated with it the callback
  3196. * will be executed. The attached skb (if present) will only be freed
  3197. * if the callback returns 1
  3198. */
  3199. static void iwl_tx_cmd_complete(struct iwl_priv *priv,
  3200. struct iwl_rx_mem_buffer *rxb)
  3201. {
  3202. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  3203. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3204. int txq_id = SEQ_TO_QUEUE(sequence);
  3205. int index = SEQ_TO_INDEX(sequence);
  3206. int huge = sequence & SEQ_HUGE_FRAME;
  3207. int cmd_index;
  3208. struct iwl_cmd *cmd;
  3209. /* If a Tx command is being handled and it isn't in the actual
  3210. * command queue then there a command routing bug has been introduced
  3211. * in the queue management code. */
  3212. if (txq_id != IWL_CMD_QUEUE_NUM)
  3213. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3214. txq_id, pkt->hdr.cmd);
  3215. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3216. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3217. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3218. /* Input error checking is done when commands are added to queue. */
  3219. if (cmd->meta.flags & CMD_WANT_SKB) {
  3220. cmd->meta.source->u.skb = rxb->skb;
  3221. rxb->skb = NULL;
  3222. } else if (cmd->meta.u.callback &&
  3223. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3224. rxb->skb = NULL;
  3225. iwl_tx_queue_reclaim(priv, txq_id, index);
  3226. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3227. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3228. wake_up_interruptible(&priv->wait_command_queue);
  3229. }
  3230. }
  3231. /************************** RX-FUNCTIONS ****************************/
  3232. /*
  3233. * Rx theory of operation
  3234. *
  3235. * The host allocates 32 DMA target addresses and passes the host address
  3236. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  3237. * 0 to 31
  3238. *
  3239. * Rx Queue Indexes
  3240. * The host/firmware share two index registers for managing the Rx buffers.
  3241. *
  3242. * The READ index maps to the first position that the firmware may be writing
  3243. * to -- the driver can read up to (but not including) this position and get
  3244. * good data.
  3245. * The READ index is managed by the firmware once the card is enabled.
  3246. *
  3247. * The WRITE index maps to the last position the driver has read from -- the
  3248. * position preceding WRITE is the last slot the firmware can place a packet.
  3249. *
  3250. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3251. * WRITE = READ.
  3252. *
  3253. * During initialization the host sets up the READ queue position to the first
  3254. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3255. *
  3256. * When the firmware places a packet in a buffer it will advance the READ index
  3257. * and fire the RX interrupt. The driver can then query the READ index and
  3258. * process as many packets as possible, moving the WRITE index forward as it
  3259. * resets the Rx queue buffers with new memory.
  3260. *
  3261. * The management in the driver is as follows:
  3262. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3263. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3264. * to replensish the iwl->rxq->rx_free.
  3265. * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
  3266. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3267. * 'processed' and 'read' driver indexes as well)
  3268. * + A received packet is processed and handed to the kernel network stack,
  3269. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3270. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3271. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3272. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3273. * were enough free buffers and RX_STALLED is set it is cleared.
  3274. *
  3275. *
  3276. * Driver sequence:
  3277. *
  3278. * iwl_rx_queue_alloc() Allocates rx_free
  3279. * iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3280. * iwl_rx_queue_restock
  3281. * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
  3282. * queue, updates firmware pointers, and updates
  3283. * the WRITE index. If insufficient rx_free buffers
  3284. * are available, schedules iwl_rx_replenish
  3285. *
  3286. * -- enable interrupts --
  3287. * ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the
  3288. * READ INDEX, detaching the SKB from the pool.
  3289. * Moves the packet buffer from queue to rx_used.
  3290. * Calls iwl_rx_queue_restock to refill any empty
  3291. * slots.
  3292. * ...
  3293. *
  3294. */
  3295. /**
  3296. * iwl_rx_queue_space - Return number of free slots available in queue.
  3297. */
  3298. static int iwl_rx_queue_space(const struct iwl_rx_queue *q)
  3299. {
  3300. int s = q->read - q->write;
  3301. if (s <= 0)
  3302. s += RX_QUEUE_SIZE;
  3303. /* keep some buffer to not confuse full and empty queue */
  3304. s -= 2;
  3305. if (s < 0)
  3306. s = 0;
  3307. return s;
  3308. }
  3309. /**
  3310. * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3311. *
  3312. * NOTE: This function has 3945 and 4965 specific code sections
  3313. * but is declared in base due to the majority of the
  3314. * implementation being the same (only a numeric constant is
  3315. * different)
  3316. *
  3317. */
  3318. int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
  3319. {
  3320. u32 reg = 0;
  3321. int rc = 0;
  3322. unsigned long flags;
  3323. spin_lock_irqsave(&q->lock, flags);
  3324. if (q->need_update == 0)
  3325. goto exit_unlock;
  3326. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3327. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3328. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3329. iwl_set_bit(priv, CSR_GP_CNTRL,
  3330. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3331. goto exit_unlock;
  3332. }
  3333. rc = iwl_grab_restricted_access(priv);
  3334. if (rc)
  3335. goto exit_unlock;
  3336. iwl_write_restricted(priv, FH_RSCSR_CHNL0_WPTR,
  3337. q->write & ~0x7);
  3338. iwl_release_restricted_access(priv);
  3339. } else
  3340. iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3341. q->need_update = 0;
  3342. exit_unlock:
  3343. spin_unlock_irqrestore(&q->lock, flags);
  3344. return rc;
  3345. }
  3346. /**
  3347. * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer pointer.
  3348. *
  3349. * NOTE: This function has 3945 and 4965 specific code paths in it.
  3350. */
  3351. static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
  3352. dma_addr_t dma_addr)
  3353. {
  3354. return cpu_to_le32((u32)dma_addr);
  3355. }
  3356. /**
  3357. * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
  3358. *
  3359. * If there are slots in the RX queue that need to be restocked,
  3360. * and we have free pre-allocated buffers, fill the ranks as much
  3361. * as we can pulling from rx_free.
  3362. *
  3363. * This moves the 'write' index forward to catch up with 'processed', and
  3364. * also updates the memory address in the firmware to reference the new
  3365. * target buffer.
  3366. */
  3367. int iwl_rx_queue_restock(struct iwl_priv *priv)
  3368. {
  3369. struct iwl_rx_queue *rxq = &priv->rxq;
  3370. struct list_head *element;
  3371. struct iwl_rx_mem_buffer *rxb;
  3372. unsigned long flags;
  3373. int write, rc;
  3374. spin_lock_irqsave(&rxq->lock, flags);
  3375. write = rxq->write & ~0x7;
  3376. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3377. element = rxq->rx_free.next;
  3378. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  3379. list_del(element);
  3380. rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3381. rxq->queue[rxq->write] = rxb;
  3382. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3383. rxq->free_count--;
  3384. }
  3385. spin_unlock_irqrestore(&rxq->lock, flags);
  3386. /* If the pre-allocated buffer pool is dropping low, schedule to
  3387. * refill it */
  3388. if (rxq->free_count <= RX_LOW_WATERMARK)
  3389. queue_work(priv->workqueue, &priv->rx_replenish);
  3390. /* If we've added more space for the firmware to place data, tell it */
  3391. if ((write != (rxq->write & ~0x7))
  3392. || (abs(rxq->write - rxq->read) > 7)) {
  3393. spin_lock_irqsave(&rxq->lock, flags);
  3394. rxq->need_update = 1;
  3395. spin_unlock_irqrestore(&rxq->lock, flags);
  3396. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  3397. if (rc)
  3398. return rc;
  3399. }
  3400. return 0;
  3401. }
  3402. /**
  3403. * iwl_rx_replensih - Move all used packet from rx_used to rx_free
  3404. *
  3405. * When moving to rx_free an SKB is allocated for the slot.
  3406. *
  3407. * Also restock the Rx queue via iwl_rx_queue_restock.
  3408. * This is called as a scheduled work item (except for during intialization)
  3409. */
  3410. void iwl_rx_replenish(void *data)
  3411. {
  3412. struct iwl_priv *priv = data;
  3413. struct iwl_rx_queue *rxq = &priv->rxq;
  3414. struct list_head *element;
  3415. struct iwl_rx_mem_buffer *rxb;
  3416. unsigned long flags;
  3417. spin_lock_irqsave(&rxq->lock, flags);
  3418. while (!list_empty(&rxq->rx_used)) {
  3419. element = rxq->rx_used.next;
  3420. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  3421. rxb->skb =
  3422. alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
  3423. if (!rxb->skb) {
  3424. if (net_ratelimit())
  3425. printk(KERN_CRIT DRV_NAME
  3426. ": Can not allocate SKB buffers\n");
  3427. /* We don't reschedule replenish work here -- we will
  3428. * call the restock method and if it still needs
  3429. * more buffers it will schedule replenish */
  3430. break;
  3431. }
  3432. priv->alloc_rxb_skb++;
  3433. list_del(element);
  3434. rxb->dma_addr =
  3435. pci_map_single(priv->pci_dev, rxb->skb->data,
  3436. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3437. list_add_tail(&rxb->list, &rxq->rx_free);
  3438. rxq->free_count++;
  3439. }
  3440. spin_unlock_irqrestore(&rxq->lock, flags);
  3441. spin_lock_irqsave(&priv->lock, flags);
  3442. iwl_rx_queue_restock(priv);
  3443. spin_unlock_irqrestore(&priv->lock, flags);
  3444. }
  3445. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3446. * If an SKB has been detached, the POOL needs to have it's SKB set to NULL
  3447. * This free routine walks the list of POOL entries and if SKB is set to
  3448. * non NULL it is unmapped and freed
  3449. */
  3450. void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  3451. {
  3452. int i;
  3453. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3454. if (rxq->pool[i].skb != NULL) {
  3455. pci_unmap_single(priv->pci_dev,
  3456. rxq->pool[i].dma_addr,
  3457. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3458. dev_kfree_skb(rxq->pool[i].skb);
  3459. }
  3460. }
  3461. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3462. rxq->dma_addr);
  3463. rxq->bd = NULL;
  3464. }
  3465. int iwl_rx_queue_alloc(struct iwl_priv *priv)
  3466. {
  3467. struct iwl_rx_queue *rxq = &priv->rxq;
  3468. struct pci_dev *dev = priv->pci_dev;
  3469. int i;
  3470. spin_lock_init(&rxq->lock);
  3471. INIT_LIST_HEAD(&rxq->rx_free);
  3472. INIT_LIST_HEAD(&rxq->rx_used);
  3473. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3474. if (!rxq->bd)
  3475. return -ENOMEM;
  3476. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3477. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3478. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3479. /* Set us so that we have processed and used all buffers, but have
  3480. * not restocked the Rx queue with fresh buffers */
  3481. rxq->read = rxq->write = 0;
  3482. rxq->free_count = 0;
  3483. rxq->need_update = 0;
  3484. return 0;
  3485. }
  3486. void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  3487. {
  3488. unsigned long flags;
  3489. int i;
  3490. spin_lock_irqsave(&rxq->lock, flags);
  3491. INIT_LIST_HEAD(&rxq->rx_free);
  3492. INIT_LIST_HEAD(&rxq->rx_used);
  3493. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3494. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3495. /* In the reset function, these buffers may have been allocated
  3496. * to an SKB, so we need to unmap and free potential storage */
  3497. if (rxq->pool[i].skb != NULL) {
  3498. pci_unmap_single(priv->pci_dev,
  3499. rxq->pool[i].dma_addr,
  3500. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3501. priv->alloc_rxb_skb--;
  3502. dev_kfree_skb(rxq->pool[i].skb);
  3503. rxq->pool[i].skb = NULL;
  3504. }
  3505. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3506. }
  3507. /* Set us so that we have processed and used all buffers, but have
  3508. * not restocked the Rx queue with fresh buffers */
  3509. rxq->read = rxq->write = 0;
  3510. rxq->free_count = 0;
  3511. spin_unlock_irqrestore(&rxq->lock, flags);
  3512. }
  3513. /* Convert linear signal-to-noise ratio into dB */
  3514. static u8 ratio2dB[100] = {
  3515. /* 0 1 2 3 4 5 6 7 8 9 */
  3516. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3517. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3518. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3519. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3520. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3521. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3522. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3523. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3524. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3525. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3526. };
  3527. /* Calculates a relative dB value from a ratio of linear
  3528. * (i.e. not dB) signal levels.
  3529. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3530. int iwl_calc_db_from_ratio(int sig_ratio)
  3531. {
  3532. /* Anything above 1000:1 just report as 60 dB */
  3533. if (sig_ratio > 1000)
  3534. return 60;
  3535. /* Above 100:1, divide by 10 and use table,
  3536. * add 20 dB to make up for divide by 10 */
  3537. if (sig_ratio > 100)
  3538. return (20 + (int)ratio2dB[sig_ratio/10]);
  3539. /* We shouldn't see this */
  3540. if (sig_ratio < 1)
  3541. return 0;
  3542. /* Use table for ratios 1:1 - 99:1 */
  3543. return (int)ratio2dB[sig_ratio];
  3544. }
  3545. #define PERFECT_RSSI (-20) /* dBm */
  3546. #define WORST_RSSI (-95) /* dBm */
  3547. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3548. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3549. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3550. * about formulas used below. */
  3551. int iwl_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3552. {
  3553. int sig_qual;
  3554. int degradation = PERFECT_RSSI - rssi_dbm;
  3555. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3556. * as indicator; formula is (signal dbm - noise dbm).
  3557. * SNR at or above 40 is a great signal (100%).
  3558. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3559. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3560. if (noise_dbm) {
  3561. if (rssi_dbm - noise_dbm >= 40)
  3562. return 100;
  3563. else if (rssi_dbm < noise_dbm)
  3564. return 0;
  3565. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3566. /* Else use just the signal level.
  3567. * This formula is a least squares fit of data points collected and
  3568. * compared with a reference system that had a percentage (%) display
  3569. * for signal quality. */
  3570. } else
  3571. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3572. (15 * RSSI_RANGE + 62 * degradation)) /
  3573. (RSSI_RANGE * RSSI_RANGE);
  3574. if (sig_qual > 100)
  3575. sig_qual = 100;
  3576. else if (sig_qual < 1)
  3577. sig_qual = 0;
  3578. return sig_qual;
  3579. }
  3580. /**
  3581. * iwl_rx_handle - Main entry function for receiving responses from the uCode
  3582. *
  3583. * Uses the priv->rx_handlers callback function array to invoke
  3584. * the appropriate handlers, including command responses,
  3585. * frame-received notifications, and other notifications.
  3586. */
  3587. static void iwl_rx_handle(struct iwl_priv *priv)
  3588. {
  3589. struct iwl_rx_mem_buffer *rxb;
  3590. struct iwl_rx_packet *pkt;
  3591. struct iwl_rx_queue *rxq = &priv->rxq;
  3592. u32 r, i;
  3593. int reclaim;
  3594. unsigned long flags;
  3595. r = iwl_hw_get_rx_read(priv);
  3596. i = rxq->read;
  3597. /* Rx interrupt, but nothing sent from uCode */
  3598. if (i == r)
  3599. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3600. while (i != r) {
  3601. rxb = rxq->queue[i];
  3602. /* If an RXB doesn't have a queue slot associated with it
  3603. * then a bug has been introduced in the queue refilling
  3604. * routines -- catch it here */
  3605. BUG_ON(rxb == NULL);
  3606. rxq->queue[i] = NULL;
  3607. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3608. IWL_RX_BUF_SIZE,
  3609. PCI_DMA_FROMDEVICE);
  3610. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  3611. /* Reclaim a command buffer only if this packet is a response
  3612. * to a (driver-originated) command.
  3613. * If the packet (e.g. Rx frame) originated from uCode,
  3614. * there is no command buffer to reclaim.
  3615. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3616. * but apparently a few don't get set; catch them here. */
  3617. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3618. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3619. (pkt->hdr.cmd != REPLY_TX);
  3620. /* Based on type of command response or notification,
  3621. * handle those that need handling via function in
  3622. * rx_handlers table. See iwl_setup_rx_handlers() */
  3623. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3624. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3625. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3626. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3627. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3628. } else {
  3629. /* No handling needed */
  3630. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3631. "r %d i %d No handler needed for %s, 0x%02x\n",
  3632. r, i, get_cmd_string(pkt->hdr.cmd),
  3633. pkt->hdr.cmd);
  3634. }
  3635. if (reclaim) {
  3636. /* Invoke any callbacks, transfer the skb to caller,
  3637. * and fire off the (possibly) blocking iwl_send_cmd()
  3638. * as we reclaim the driver command queue */
  3639. if (rxb && rxb->skb)
  3640. iwl_tx_cmd_complete(priv, rxb);
  3641. else
  3642. IWL_WARNING("Claim null rxb?\n");
  3643. }
  3644. /* For now we just don't re-use anything. We can tweak this
  3645. * later to try and re-use notification packets and SKBs that
  3646. * fail to Rx correctly */
  3647. if (rxb->skb != NULL) {
  3648. priv->alloc_rxb_skb--;
  3649. dev_kfree_skb_any(rxb->skb);
  3650. rxb->skb = NULL;
  3651. }
  3652. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3653. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3654. spin_lock_irqsave(&rxq->lock, flags);
  3655. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3656. spin_unlock_irqrestore(&rxq->lock, flags);
  3657. i = (i + 1) & RX_QUEUE_MASK;
  3658. }
  3659. /* Backtrack one entry */
  3660. priv->rxq.read = i;
  3661. iwl_rx_queue_restock(priv);
  3662. }
  3663. int iwl_tx_queue_update_write_ptr(struct iwl_priv *priv,
  3664. struct iwl_tx_queue *txq)
  3665. {
  3666. u32 reg = 0;
  3667. int rc = 0;
  3668. int txq_id = txq->q.id;
  3669. if (txq->need_update == 0)
  3670. return rc;
  3671. /* if we're trying to save power */
  3672. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3673. /* wake up nic if it's powered down ...
  3674. * uCode will wake up, and interrupt us again, so next
  3675. * time we'll skip this part. */
  3676. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3677. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3678. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  3679. iwl_set_bit(priv, CSR_GP_CNTRL,
  3680. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3681. return rc;
  3682. }
  3683. /* restore this queue's parameters in nic hardware. */
  3684. rc = iwl_grab_restricted_access(priv);
  3685. if (rc)
  3686. return rc;
  3687. iwl_write_restricted(priv, HBUS_TARG_WRPTR,
  3688. txq->q.first_empty | (txq_id << 8));
  3689. iwl_release_restricted_access(priv);
  3690. /* else not in power-save mode, uCode will never sleep when we're
  3691. * trying to tx (during RFKILL, we're not trying to tx). */
  3692. } else
  3693. iwl_write32(priv, HBUS_TARG_WRPTR,
  3694. txq->q.first_empty | (txq_id << 8));
  3695. txq->need_update = 0;
  3696. return rc;
  3697. }
  3698. #ifdef CONFIG_IWLWIFI_DEBUG
  3699. static void iwl_print_rx_config_cmd(struct iwl_rxon_cmd *rxon)
  3700. {
  3701. DECLARE_MAC_BUF(mac);
  3702. IWL_DEBUG_RADIO("RX CONFIG:\n");
  3703. iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3704. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3705. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3706. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  3707. le32_to_cpu(rxon->filter_flags));
  3708. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3709. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3710. rxon->ofdm_basic_rates);
  3711. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3712. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  3713. print_mac(mac, rxon->node_addr));
  3714. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  3715. print_mac(mac, rxon->bssid_addr));
  3716. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3717. }
  3718. #endif
  3719. static void iwl_enable_interrupts(struct iwl_priv *priv)
  3720. {
  3721. IWL_DEBUG_ISR("Enabling interrupts\n");
  3722. set_bit(STATUS_INT_ENABLED, &priv->status);
  3723. iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  3724. }
  3725. static inline void iwl_disable_interrupts(struct iwl_priv *priv)
  3726. {
  3727. clear_bit(STATUS_INT_ENABLED, &priv->status);
  3728. /* disable interrupts from uCode/NIC to host */
  3729. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  3730. /* acknowledge/clear/reset any interrupts still pending
  3731. * from uCode or flow handler (Rx/Tx DMA) */
  3732. iwl_write32(priv, CSR_INT, 0xffffffff);
  3733. iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  3734. IWL_DEBUG_ISR("Disabled interrupts\n");
  3735. }
  3736. static const char *desc_lookup(int i)
  3737. {
  3738. switch (i) {
  3739. case 1:
  3740. return "FAIL";
  3741. case 2:
  3742. return "BAD_PARAM";
  3743. case 3:
  3744. return "BAD_CHECKSUM";
  3745. case 4:
  3746. return "NMI_INTERRUPT";
  3747. case 5:
  3748. return "SYSASSERT";
  3749. case 6:
  3750. return "FATAL_ERROR";
  3751. }
  3752. return "UNKNOWN";
  3753. }
  3754. #define ERROR_START_OFFSET (1 * sizeof(u32))
  3755. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  3756. static void iwl_dump_nic_error_log(struct iwl_priv *priv)
  3757. {
  3758. u32 i;
  3759. u32 desc, time, count, base, data1;
  3760. u32 blink1, blink2, ilink1, ilink2;
  3761. int rc;
  3762. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  3763. if (!iwl_hw_valid_rtc_data_addr(base)) {
  3764. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  3765. return;
  3766. }
  3767. rc = iwl_grab_restricted_access(priv);
  3768. if (rc) {
  3769. IWL_WARNING("Can not read from adapter at this time.\n");
  3770. return;
  3771. }
  3772. count = iwl_read_restricted_mem(priv, base);
  3773. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  3774. IWL_ERROR("Start IWL Error Log Dump:\n");
  3775. IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
  3776. priv->status, priv->config, count);
  3777. }
  3778. IWL_ERROR("Desc Time asrtPC blink2 "
  3779. "ilink1 nmiPC Line\n");
  3780. for (i = ERROR_START_OFFSET;
  3781. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  3782. i += ERROR_ELEM_SIZE) {
  3783. desc = iwl_read_restricted_mem(priv, base + i);
  3784. time =
  3785. iwl_read_restricted_mem(priv, base + i + 1 * sizeof(u32));
  3786. blink1 =
  3787. iwl_read_restricted_mem(priv, base + i + 2 * sizeof(u32));
  3788. blink2 =
  3789. iwl_read_restricted_mem(priv, base + i + 3 * sizeof(u32));
  3790. ilink1 =
  3791. iwl_read_restricted_mem(priv, base + i + 4 * sizeof(u32));
  3792. ilink2 =
  3793. iwl_read_restricted_mem(priv, base + i + 5 * sizeof(u32));
  3794. data1 =
  3795. iwl_read_restricted_mem(priv, base + i + 6 * sizeof(u32));
  3796. IWL_ERROR
  3797. ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  3798. desc_lookup(desc), desc, time, blink1, blink2,
  3799. ilink1, ilink2, data1);
  3800. }
  3801. iwl_release_restricted_access(priv);
  3802. }
  3803. #define EVENT_START_OFFSET (4 * sizeof(u32))
  3804. /**
  3805. * iwl_print_event_log - Dump error event log to syslog
  3806. *
  3807. * NOTE: Must be called with iwl_grab_restricted_access() already obtained!
  3808. */
  3809. static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
  3810. u32 num_events, u32 mode)
  3811. {
  3812. u32 i;
  3813. u32 base; /* SRAM byte address of event log header */
  3814. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  3815. u32 ptr; /* SRAM byte address of log data */
  3816. u32 ev, time, data; /* event log data */
  3817. if (num_events == 0)
  3818. return;
  3819. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3820. if (mode == 0)
  3821. event_size = 2 * sizeof(u32);
  3822. else
  3823. event_size = 3 * sizeof(u32);
  3824. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  3825. /* "time" is actually "data" for mode 0 (no timestamp).
  3826. * place event id # at far right for easier visual parsing. */
  3827. for (i = 0; i < num_events; i++) {
  3828. ev = iwl_read_restricted_mem(priv, ptr);
  3829. ptr += sizeof(u32);
  3830. time = iwl_read_restricted_mem(priv, ptr);
  3831. ptr += sizeof(u32);
  3832. if (mode == 0)
  3833. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  3834. else {
  3835. data = iwl_read_restricted_mem(priv, ptr);
  3836. ptr += sizeof(u32);
  3837. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  3838. }
  3839. }
  3840. }
  3841. static void iwl_dump_nic_event_log(struct iwl_priv *priv)
  3842. {
  3843. int rc;
  3844. u32 base; /* SRAM byte address of event log header */
  3845. u32 capacity; /* event log capacity in # entries */
  3846. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  3847. u32 num_wraps; /* # times uCode wrapped to top of log */
  3848. u32 next_entry; /* index of next entry to be written by uCode */
  3849. u32 size; /* # entries that we'll print */
  3850. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3851. if (!iwl_hw_valid_rtc_data_addr(base)) {
  3852. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  3853. return;
  3854. }
  3855. rc = iwl_grab_restricted_access(priv);
  3856. if (rc) {
  3857. IWL_WARNING("Can not read from adapter at this time.\n");
  3858. return;
  3859. }
  3860. /* event log header */
  3861. capacity = iwl_read_restricted_mem(priv, base);
  3862. mode = iwl_read_restricted_mem(priv, base + (1 * sizeof(u32)));
  3863. num_wraps = iwl_read_restricted_mem(priv, base + (2 * sizeof(u32)));
  3864. next_entry = iwl_read_restricted_mem(priv, base + (3 * sizeof(u32)));
  3865. size = num_wraps ? capacity : next_entry;
  3866. /* bail out if nothing in log */
  3867. if (size == 0) {
  3868. IWL_ERROR("Start IPW Event Log Dump: nothing in log\n");
  3869. iwl_release_restricted_access(priv);
  3870. return;
  3871. }
  3872. IWL_ERROR("Start IPW Event Log Dump: display count %d, wraps %d\n",
  3873. size, num_wraps);
  3874. /* if uCode has wrapped back to top of log, start at the oldest entry,
  3875. * i.e the next one that uCode would fill. */
  3876. if (num_wraps)
  3877. iwl_print_event_log(priv, next_entry,
  3878. capacity - next_entry, mode);
  3879. /* (then/else) start at top of log */
  3880. iwl_print_event_log(priv, 0, next_entry, mode);
  3881. iwl_release_restricted_access(priv);
  3882. }
  3883. /**
  3884. * iwl_irq_handle_error - called for HW or SW error interrupt from card
  3885. */
  3886. static void iwl_irq_handle_error(struct iwl_priv *priv)
  3887. {
  3888. /* Set the FW error flag -- cleared on iwl_down */
  3889. set_bit(STATUS_FW_ERROR, &priv->status);
  3890. /* Cancel currently queued command. */
  3891. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3892. #ifdef CONFIG_IWLWIFI_DEBUG
  3893. if (iwl_debug_level & IWL_DL_FW_ERRORS) {
  3894. iwl_dump_nic_error_log(priv);
  3895. iwl_dump_nic_event_log(priv);
  3896. iwl_print_rx_config_cmd(&priv->staging_rxon);
  3897. }
  3898. #endif
  3899. wake_up_interruptible(&priv->wait_command_queue);
  3900. /* Keep the restart process from trying to send host
  3901. * commands by clearing the INIT status bit */
  3902. clear_bit(STATUS_READY, &priv->status);
  3903. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  3904. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  3905. "Restarting adapter due to uCode error.\n");
  3906. if (iwl_is_associated(priv)) {
  3907. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  3908. sizeof(priv->recovery_rxon));
  3909. priv->error_recovering = 1;
  3910. }
  3911. queue_work(priv->workqueue, &priv->restart);
  3912. }
  3913. }
  3914. static void iwl_error_recovery(struct iwl_priv *priv)
  3915. {
  3916. unsigned long flags;
  3917. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  3918. sizeof(priv->staging_rxon));
  3919. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3920. iwl_commit_rxon(priv);
  3921. iwl_rxon_add_station(priv, priv->bssid, 1);
  3922. spin_lock_irqsave(&priv->lock, flags);
  3923. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  3924. priv->error_recovering = 0;
  3925. spin_unlock_irqrestore(&priv->lock, flags);
  3926. }
  3927. static void iwl_irq_tasklet(struct iwl_priv *priv)
  3928. {
  3929. u32 inta, handled = 0;
  3930. u32 inta_fh;
  3931. unsigned long flags;
  3932. #ifdef CONFIG_IWLWIFI_DEBUG
  3933. u32 inta_mask;
  3934. #endif
  3935. spin_lock_irqsave(&priv->lock, flags);
  3936. /* Ack/clear/reset pending uCode interrupts.
  3937. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  3938. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  3939. inta = iwl_read32(priv, CSR_INT);
  3940. iwl_write32(priv, CSR_INT, inta);
  3941. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  3942. * Any new interrupts that happen after this, either while we're
  3943. * in this tasklet, or later, will show up in next ISR/tasklet. */
  3944. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3945. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  3946. #ifdef CONFIG_IWLWIFI_DEBUG
  3947. if (iwl_debug_level & IWL_DL_ISR) {
  3948. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  3949. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3950. inta, inta_mask, inta_fh);
  3951. }
  3952. #endif
  3953. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  3954. * atomic, make sure that inta covers all the interrupts that
  3955. * we've discovered, even if FH interrupt came in just after
  3956. * reading CSR_INT. */
  3957. if (inta_fh & CSR_FH_INT_RX_MASK)
  3958. inta |= CSR_INT_BIT_FH_RX;
  3959. if (inta_fh & CSR_FH_INT_TX_MASK)
  3960. inta |= CSR_INT_BIT_FH_TX;
  3961. /* Now service all interrupt bits discovered above. */
  3962. if (inta & CSR_INT_BIT_HW_ERR) {
  3963. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  3964. /* Tell the device to stop sending interrupts */
  3965. iwl_disable_interrupts(priv);
  3966. iwl_irq_handle_error(priv);
  3967. handled |= CSR_INT_BIT_HW_ERR;
  3968. spin_unlock_irqrestore(&priv->lock, flags);
  3969. return;
  3970. }
  3971. #ifdef CONFIG_IWLWIFI_DEBUG
  3972. if (iwl_debug_level & (IWL_DL_ISR)) {
  3973. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  3974. if (inta & CSR_INT_BIT_MAC_CLK_ACTV)
  3975. IWL_DEBUG_ISR("Microcode started or stopped.\n");
  3976. /* Alive notification via Rx interrupt will do the real work */
  3977. if (inta & CSR_INT_BIT_ALIVE)
  3978. IWL_DEBUG_ISR("Alive interrupt\n");
  3979. }
  3980. #endif
  3981. /* Safely ignore these bits for debug checks below */
  3982. inta &= ~(CSR_INT_BIT_MAC_CLK_ACTV | CSR_INT_BIT_ALIVE);
  3983. /* HW RF KILL switch toggled (4965 only) */
  3984. if (inta & CSR_INT_BIT_RF_KILL) {
  3985. int hw_rf_kill = 0;
  3986. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  3987. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  3988. hw_rf_kill = 1;
  3989. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  3990. "RF_KILL bit toggled to %s.\n",
  3991. hw_rf_kill ? "disable radio":"enable radio");
  3992. /* Queue restart only if RF_KILL switch was set to "kill"
  3993. * when we loaded driver, and is now set to "enable".
  3994. * After we're Alive, RF_KILL gets handled by
  3995. * iwl_rx_card_state_notif() */
  3996. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status))
  3997. queue_work(priv->workqueue, &priv->restart);
  3998. handled |= CSR_INT_BIT_RF_KILL;
  3999. }
  4000. /* Chip got too hot and stopped itself (4965 only) */
  4001. if (inta & CSR_INT_BIT_CT_KILL) {
  4002. IWL_ERROR("Microcode CT kill error detected.\n");
  4003. handled |= CSR_INT_BIT_CT_KILL;
  4004. }
  4005. /* Error detected by uCode */
  4006. if (inta & CSR_INT_BIT_SW_ERR) {
  4007. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  4008. inta);
  4009. iwl_irq_handle_error(priv);
  4010. handled |= CSR_INT_BIT_SW_ERR;
  4011. }
  4012. /* uCode wakes up after power-down sleep */
  4013. if (inta & CSR_INT_BIT_WAKEUP) {
  4014. IWL_DEBUG_ISR("Wakeup interrupt\n");
  4015. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  4016. iwl_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  4017. iwl_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  4018. iwl_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  4019. iwl_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  4020. iwl_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  4021. iwl_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  4022. handled |= CSR_INT_BIT_WAKEUP;
  4023. }
  4024. /* All uCode command responses, including Tx command responses,
  4025. * Rx "responses" (frame-received notification), and other
  4026. * notifications from uCode come through here*/
  4027. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  4028. iwl_rx_handle(priv);
  4029. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  4030. }
  4031. if (inta & CSR_INT_BIT_FH_TX) {
  4032. IWL_DEBUG_ISR("Tx interrupt\n");
  4033. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  4034. if (!iwl_grab_restricted_access(priv)) {
  4035. iwl_write_restricted(priv,
  4036. FH_TCSR_CREDIT
  4037. (ALM_FH_SRVC_CHNL), 0x0);
  4038. iwl_release_restricted_access(priv);
  4039. }
  4040. handled |= CSR_INT_BIT_FH_TX;
  4041. }
  4042. if (inta & ~handled)
  4043. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  4044. if (inta & ~CSR_INI_SET_MASK) {
  4045. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  4046. inta & ~CSR_INI_SET_MASK);
  4047. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  4048. }
  4049. /* Re-enable all interrupts */
  4050. iwl_enable_interrupts(priv);
  4051. #ifdef CONFIG_IWLWIFI_DEBUG
  4052. if (iwl_debug_level & (IWL_DL_ISR)) {
  4053. inta = iwl_read32(priv, CSR_INT);
  4054. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  4055. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  4056. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  4057. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  4058. }
  4059. #endif
  4060. spin_unlock_irqrestore(&priv->lock, flags);
  4061. }
  4062. static irqreturn_t iwl_isr(int irq, void *data)
  4063. {
  4064. struct iwl_priv *priv = data;
  4065. u32 inta, inta_mask;
  4066. u32 inta_fh;
  4067. if (!priv)
  4068. return IRQ_NONE;
  4069. spin_lock(&priv->lock);
  4070. /* Disable (but don't clear!) interrupts here to avoid
  4071. * back-to-back ISRs and sporadic interrupts from our NIC.
  4072. * If we have something to service, the tasklet will re-enable ints.
  4073. * If we *don't* have something, we'll re-enable before leaving here. */
  4074. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  4075. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  4076. /* Discover which interrupts are active/pending */
  4077. inta = iwl_read32(priv, CSR_INT);
  4078. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  4079. /* Ignore interrupt if there's nothing in NIC to service.
  4080. * This may be due to IRQ shared with another device,
  4081. * or due to sporadic interrupts thrown from our NIC. */
  4082. if (!inta && !inta_fh) {
  4083. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4084. goto none;
  4085. }
  4086. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  4087. /* Hardware disappeared */
  4088. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  4089. goto none;
  4090. }
  4091. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4092. inta, inta_mask, inta_fh);
  4093. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  4094. tasklet_schedule(&priv->irq_tasklet);
  4095. spin_unlock(&priv->lock);
  4096. return IRQ_HANDLED;
  4097. none:
  4098. /* re-enable interrupts here since we don't have anything to service. */
  4099. iwl_enable_interrupts(priv);
  4100. spin_unlock(&priv->lock);
  4101. return IRQ_NONE;
  4102. }
  4103. /************************** EEPROM BANDS ****************************
  4104. *
  4105. * The iwl_eeprom_band definitions below provide the mapping from the
  4106. * EEPROM contents to the specific channel number supported for each
  4107. * band.
  4108. *
  4109. * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
  4110. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  4111. * The specific geography and calibration information for that channel
  4112. * is contained in the eeprom map itself.
  4113. *
  4114. * During init, we copy the eeprom information and channel map
  4115. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  4116. *
  4117. * channel_map_24/52 provides the index in the channel_info array for a
  4118. * given channel. We have to have two separate maps as there is channel
  4119. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  4120. * band_2
  4121. *
  4122. * A value of 0xff stored in the channel_map indicates that the channel
  4123. * is not supported by the hardware at all.
  4124. *
  4125. * A value of 0xfe in the channel_map indicates that the channel is not
  4126. * valid for Tx with the current hardware. This means that
  4127. * while the system can tune and receive on a given channel, it may not
  4128. * be able to associate or transmit any frames on that
  4129. * channel. There is no corresponding channel information for that
  4130. * entry.
  4131. *
  4132. *********************************************************************/
  4133. /* 2.4 GHz */
  4134. static const u8 iwl_eeprom_band_1[14] = {
  4135. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  4136. };
  4137. /* 5.2 GHz bands */
  4138. static const u8 iwl_eeprom_band_2[] = {
  4139. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  4140. };
  4141. static const u8 iwl_eeprom_band_3[] = { /* 5205-5320MHz */
  4142. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  4143. };
  4144. static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */
  4145. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  4146. };
  4147. static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */
  4148. 145, 149, 153, 157, 161, 165
  4149. };
  4150. static void iwl_init_band_reference(const struct iwl_priv *priv, int band,
  4151. int *eeprom_ch_count,
  4152. const struct iwl_eeprom_channel
  4153. **eeprom_ch_info,
  4154. const u8 **eeprom_ch_index)
  4155. {
  4156. switch (band) {
  4157. case 1: /* 2.4GHz band */
  4158. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
  4159. *eeprom_ch_info = priv->eeprom.band_1_channels;
  4160. *eeprom_ch_index = iwl_eeprom_band_1;
  4161. break;
  4162. case 2: /* 5.2GHz band */
  4163. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
  4164. *eeprom_ch_info = priv->eeprom.band_2_channels;
  4165. *eeprom_ch_index = iwl_eeprom_band_2;
  4166. break;
  4167. case 3: /* 5.2GHz band */
  4168. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
  4169. *eeprom_ch_info = priv->eeprom.band_3_channels;
  4170. *eeprom_ch_index = iwl_eeprom_band_3;
  4171. break;
  4172. case 4: /* 5.2GHz band */
  4173. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
  4174. *eeprom_ch_info = priv->eeprom.band_4_channels;
  4175. *eeprom_ch_index = iwl_eeprom_band_4;
  4176. break;
  4177. case 5: /* 5.2GHz band */
  4178. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
  4179. *eeprom_ch_info = priv->eeprom.band_5_channels;
  4180. *eeprom_ch_index = iwl_eeprom_band_5;
  4181. break;
  4182. default:
  4183. BUG();
  4184. return;
  4185. }
  4186. }
  4187. const struct iwl_channel_info *iwl_get_channel_info(const struct iwl_priv *priv,
  4188. int phymode, u16 channel)
  4189. {
  4190. int i;
  4191. switch (phymode) {
  4192. case MODE_IEEE80211A:
  4193. for (i = 14; i < priv->channel_count; i++) {
  4194. if (priv->channel_info[i].channel == channel)
  4195. return &priv->channel_info[i];
  4196. }
  4197. break;
  4198. case MODE_IEEE80211B:
  4199. case MODE_IEEE80211G:
  4200. if (channel >= 1 && channel <= 14)
  4201. return &priv->channel_info[channel - 1];
  4202. break;
  4203. }
  4204. return NULL;
  4205. }
  4206. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  4207. ? # x " " : "")
  4208. static int iwl_init_channel_map(struct iwl_priv *priv)
  4209. {
  4210. int eeprom_ch_count = 0;
  4211. const u8 *eeprom_ch_index = NULL;
  4212. const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
  4213. int band, ch;
  4214. struct iwl_channel_info *ch_info;
  4215. if (priv->channel_count) {
  4216. IWL_DEBUG_INFO("Channel map already initialized.\n");
  4217. return 0;
  4218. }
  4219. if (priv->eeprom.version < 0x2f) {
  4220. IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
  4221. priv->eeprom.version);
  4222. return -EINVAL;
  4223. }
  4224. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  4225. priv->channel_count =
  4226. ARRAY_SIZE(iwl_eeprom_band_1) +
  4227. ARRAY_SIZE(iwl_eeprom_band_2) +
  4228. ARRAY_SIZE(iwl_eeprom_band_3) +
  4229. ARRAY_SIZE(iwl_eeprom_band_4) +
  4230. ARRAY_SIZE(iwl_eeprom_band_5);
  4231. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  4232. priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
  4233. priv->channel_count, GFP_KERNEL);
  4234. if (!priv->channel_info) {
  4235. IWL_ERROR("Could not allocate channel_info\n");
  4236. priv->channel_count = 0;
  4237. return -ENOMEM;
  4238. }
  4239. ch_info = priv->channel_info;
  4240. /* Loop through the 5 EEPROM bands adding them in order to the
  4241. * channel map we maintain (that contains additional information than
  4242. * what just in the EEPROM) */
  4243. for (band = 1; band <= 5; band++) {
  4244. iwl_init_band_reference(priv, band, &eeprom_ch_count,
  4245. &eeprom_ch_info, &eeprom_ch_index);
  4246. /* Loop through each band adding each of the channels */
  4247. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4248. ch_info->channel = eeprom_ch_index[ch];
  4249. ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
  4250. MODE_IEEE80211A;
  4251. /* permanently store EEPROM's channel regulatory flags
  4252. * and max power in channel info database. */
  4253. ch_info->eeprom = eeprom_ch_info[ch];
  4254. /* Copy the run-time flags so they are there even on
  4255. * invalid channels */
  4256. ch_info->flags = eeprom_ch_info[ch].flags;
  4257. if (!(is_channel_valid(ch_info))) {
  4258. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  4259. "No traffic\n",
  4260. ch_info->channel,
  4261. ch_info->flags,
  4262. is_channel_a_band(ch_info) ?
  4263. "5.2" : "2.4");
  4264. ch_info++;
  4265. continue;
  4266. }
  4267. /* Initialize regulatory-based run-time data */
  4268. ch_info->max_power_avg = ch_info->curr_txpow =
  4269. eeprom_ch_info[ch].max_power_avg;
  4270. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  4271. ch_info->min_power = 0;
  4272. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
  4273. " %ddBm): Ad-Hoc %ssupported\n",
  4274. ch_info->channel,
  4275. is_channel_a_band(ch_info) ?
  4276. "5.2" : "2.4",
  4277. CHECK_AND_PRINT(IBSS),
  4278. CHECK_AND_PRINT(ACTIVE),
  4279. CHECK_AND_PRINT(RADAR),
  4280. CHECK_AND_PRINT(WIDE),
  4281. CHECK_AND_PRINT(NARROW),
  4282. CHECK_AND_PRINT(DFS),
  4283. eeprom_ch_info[ch].flags,
  4284. eeprom_ch_info[ch].max_power_avg,
  4285. ((eeprom_ch_info[ch].
  4286. flags & EEPROM_CHANNEL_IBSS)
  4287. && !(eeprom_ch_info[ch].
  4288. flags & EEPROM_CHANNEL_RADAR))
  4289. ? "" : "not ");
  4290. /* Set the user_txpower_limit to the highest power
  4291. * supported by any channel */
  4292. if (eeprom_ch_info[ch].max_power_avg >
  4293. priv->user_txpower_limit)
  4294. priv->user_txpower_limit =
  4295. eeprom_ch_info[ch].max_power_avg;
  4296. ch_info++;
  4297. }
  4298. }
  4299. if (iwl3945_txpower_set_from_eeprom(priv))
  4300. return -EIO;
  4301. return 0;
  4302. }
  4303. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  4304. * sending probe req. This should be set long enough to hear probe responses
  4305. * from more than one AP. */
  4306. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  4307. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  4308. /* For faster active scanning, scan will move to the next channel if fewer than
  4309. * PLCP_QUIET_THRESH packets are heard on this channel within
  4310. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  4311. * time if it's a quiet channel (nothing responded to our probe, and there's
  4312. * no other traffic).
  4313. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  4314. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  4315. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  4316. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  4317. * Must be set longer than active dwell time.
  4318. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  4319. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  4320. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  4321. #define IWL_PASSIVE_DWELL_BASE (100)
  4322. #define IWL_CHANNEL_TUNE_TIME 5
  4323. static inline u16 iwl_get_active_dwell_time(struct iwl_priv *priv, int phymode)
  4324. {
  4325. if (phymode == MODE_IEEE80211A)
  4326. return IWL_ACTIVE_DWELL_TIME_52;
  4327. else
  4328. return IWL_ACTIVE_DWELL_TIME_24;
  4329. }
  4330. static u16 iwl_get_passive_dwell_time(struct iwl_priv *priv, int phymode)
  4331. {
  4332. u16 active = iwl_get_active_dwell_time(priv, phymode);
  4333. u16 passive = (phymode != MODE_IEEE80211A) ?
  4334. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4335. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4336. if (iwl_is_associated(priv)) {
  4337. /* If we're associated, we clamp the maximum passive
  4338. * dwell time to be 98% of the beacon interval (minus
  4339. * 2 * channel tune time) */
  4340. passive = priv->beacon_int;
  4341. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4342. passive = IWL_PASSIVE_DWELL_BASE;
  4343. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4344. }
  4345. if (passive <= active)
  4346. passive = active + 1;
  4347. return passive;
  4348. }
  4349. static int iwl_get_channels_for_scan(struct iwl_priv *priv, int phymode,
  4350. u8 is_active, u8 direct_mask,
  4351. struct iwl_scan_channel *scan_ch)
  4352. {
  4353. const struct ieee80211_channel *channels = NULL;
  4354. const struct ieee80211_hw_mode *hw_mode;
  4355. const struct iwl_channel_info *ch_info;
  4356. u16 passive_dwell = 0;
  4357. u16 active_dwell = 0;
  4358. int added, i;
  4359. hw_mode = iwl_get_hw_mode(priv, phymode);
  4360. if (!hw_mode)
  4361. return 0;
  4362. channels = hw_mode->channels;
  4363. active_dwell = iwl_get_active_dwell_time(priv, phymode);
  4364. passive_dwell = iwl_get_passive_dwell_time(priv, phymode);
  4365. for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
  4366. if (channels[i].chan ==
  4367. le16_to_cpu(priv->active_rxon.channel)) {
  4368. if (iwl_is_associated(priv)) {
  4369. IWL_DEBUG_SCAN
  4370. ("Skipping current channel %d\n",
  4371. le16_to_cpu(priv->active_rxon.channel));
  4372. continue;
  4373. }
  4374. } else if (priv->only_active_channel)
  4375. continue;
  4376. scan_ch->channel = channels[i].chan;
  4377. ch_info = iwl_get_channel_info(priv, phymode, scan_ch->channel);
  4378. if (!is_channel_valid(ch_info)) {
  4379. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4380. scan_ch->channel);
  4381. continue;
  4382. }
  4383. if (!is_active || is_channel_passive(ch_info) ||
  4384. !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
  4385. scan_ch->type = 0; /* passive */
  4386. else
  4387. scan_ch->type = 1; /* active */
  4388. if (scan_ch->type & 1)
  4389. scan_ch->type |= (direct_mask << 1);
  4390. if (is_channel_narrow(ch_info))
  4391. scan_ch->type |= (1 << 7);
  4392. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4393. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4394. /* Set power levels to defaults */
  4395. scan_ch->tpc.dsp_atten = 110;
  4396. /* scan_pwr_info->tpc.dsp_atten; */
  4397. /*scan_pwr_info->tpc.tx_gain; */
  4398. if (phymode == MODE_IEEE80211A)
  4399. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4400. else {
  4401. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4402. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4403. * power level
  4404. scan_ch->tpc.tx_gain = ((1<<5) | (2 << 3)) | 3;
  4405. */
  4406. }
  4407. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4408. scan_ch->channel,
  4409. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4410. (scan_ch->type & 1) ?
  4411. active_dwell : passive_dwell);
  4412. scan_ch++;
  4413. added++;
  4414. }
  4415. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4416. return added;
  4417. }
  4418. static void iwl_reset_channel_flag(struct iwl_priv *priv)
  4419. {
  4420. int i, j;
  4421. for (i = 0; i < 3; i++) {
  4422. struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
  4423. for (j = 0; j < hw_mode->num_channels; j++)
  4424. hw_mode->channels[j].flag = hw_mode->channels[j].val;
  4425. }
  4426. }
  4427. static void iwl_init_hw_rates(struct iwl_priv *priv,
  4428. struct ieee80211_rate *rates)
  4429. {
  4430. int i;
  4431. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4432. rates[i].rate = iwl_rates[i].ieee * 5;
  4433. rates[i].val = i; /* Rate scaling will work on indexes */
  4434. rates[i].val2 = i;
  4435. rates[i].flags = IEEE80211_RATE_SUPPORTED;
  4436. /* Only OFDM have the bits-per-symbol set */
  4437. if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
  4438. rates[i].flags |= IEEE80211_RATE_OFDM;
  4439. else {
  4440. /*
  4441. * If CCK 1M then set rate flag to CCK else CCK_2
  4442. * which is CCK | PREAMBLE2
  4443. */
  4444. rates[i].flags |= (iwl_rates[i].plcp == 10) ?
  4445. IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
  4446. }
  4447. /* Set up which ones are basic rates... */
  4448. if (IWL_BASIC_RATES_MASK & (1 << i))
  4449. rates[i].flags |= IEEE80211_RATE_BASIC;
  4450. }
  4451. }
  4452. /**
  4453. * iwl_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4454. */
  4455. static int iwl_init_geos(struct iwl_priv *priv)
  4456. {
  4457. struct iwl_channel_info *ch;
  4458. struct ieee80211_hw_mode *modes;
  4459. struct ieee80211_channel *channels;
  4460. struct ieee80211_channel *geo_ch;
  4461. struct ieee80211_rate *rates;
  4462. int i = 0;
  4463. enum {
  4464. A = 0,
  4465. B = 1,
  4466. G = 2,
  4467. };
  4468. int mode_count = 3;
  4469. if (priv->modes) {
  4470. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4471. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4472. return 0;
  4473. }
  4474. modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
  4475. GFP_KERNEL);
  4476. if (!modes)
  4477. return -ENOMEM;
  4478. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4479. priv->channel_count, GFP_KERNEL);
  4480. if (!channels) {
  4481. kfree(modes);
  4482. return -ENOMEM;
  4483. }
  4484. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
  4485. GFP_KERNEL);
  4486. if (!rates) {
  4487. kfree(modes);
  4488. kfree(channels);
  4489. return -ENOMEM;
  4490. }
  4491. /* 0 = 802.11a
  4492. * 1 = 802.11b
  4493. * 2 = 802.11g
  4494. */
  4495. /* 5.2GHz channels start after the 2.4GHz channels */
  4496. modes[A].mode = MODE_IEEE80211A;
  4497. modes[A].channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  4498. modes[A].rates = rates;
  4499. modes[A].num_rates = 8; /* just OFDM */
  4500. modes[A].num_channels = 0;
  4501. modes[B].mode = MODE_IEEE80211B;
  4502. modes[B].channels = channels;
  4503. modes[B].rates = &rates[8];
  4504. modes[B].num_rates = 4; /* just CCK */
  4505. modes[B].num_channels = 0;
  4506. modes[G].mode = MODE_IEEE80211G;
  4507. modes[G].channels = channels;
  4508. modes[G].rates = rates;
  4509. modes[G].num_rates = 12; /* OFDM & CCK */
  4510. modes[G].num_channels = 0;
  4511. priv->ieee_channels = channels;
  4512. priv->ieee_rates = rates;
  4513. iwl_init_hw_rates(priv, rates);
  4514. for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
  4515. ch = &priv->channel_info[i];
  4516. if (!is_channel_valid(ch)) {
  4517. IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
  4518. "skipping.\n",
  4519. ch->channel, is_channel_a_band(ch) ?
  4520. "5.2" : "2.4");
  4521. continue;
  4522. }
  4523. if (is_channel_a_band(ch))
  4524. geo_ch = &modes[A].channels[modes[A].num_channels++];
  4525. else {
  4526. geo_ch = &modes[B].channels[modes[B].num_channels++];
  4527. modes[G].num_channels++;
  4528. }
  4529. geo_ch->freq = ieee80211chan2mhz(ch->channel);
  4530. geo_ch->chan = ch->channel;
  4531. geo_ch->power_level = ch->max_power_avg;
  4532. geo_ch->antenna_max = 0xff;
  4533. if (is_channel_valid(ch)) {
  4534. geo_ch->flag = IEEE80211_CHAN_W_SCAN;
  4535. if (ch->flags & EEPROM_CHANNEL_IBSS)
  4536. geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
  4537. if (ch->flags & EEPROM_CHANNEL_ACTIVE)
  4538. geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
  4539. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4540. geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
  4541. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4542. priv->max_channel_txpower_limit =
  4543. ch->max_power_avg;
  4544. }
  4545. geo_ch->val = geo_ch->flag;
  4546. }
  4547. if ((modes[A].num_channels == 0) && priv->is_abg) {
  4548. printk(KERN_INFO DRV_NAME
  4549. ": Incorrectly detected BG card as ABG. Please send "
  4550. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4551. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4552. priv->is_abg = 0;
  4553. }
  4554. printk(KERN_INFO DRV_NAME
  4555. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4556. modes[G].num_channels, modes[A].num_channels);
  4557. /*
  4558. * NOTE: We register these in preference of order -- the
  4559. * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
  4560. * a phymode based on rates or AP capabilities but seems to
  4561. * configure it purely on if the channel being configured
  4562. * is supported by a mode -- and the first match is taken
  4563. */
  4564. if (modes[G].num_channels)
  4565. ieee80211_register_hwmode(priv->hw, &modes[G]);
  4566. if (modes[B].num_channels)
  4567. ieee80211_register_hwmode(priv->hw, &modes[B]);
  4568. if (modes[A].num_channels)
  4569. ieee80211_register_hwmode(priv->hw, &modes[A]);
  4570. priv->modes = modes;
  4571. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4572. return 0;
  4573. }
  4574. /******************************************************************************
  4575. *
  4576. * uCode download functions
  4577. *
  4578. ******************************************************************************/
  4579. static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
  4580. {
  4581. if (priv->ucode_code.v_addr != NULL) {
  4582. pci_free_consistent(priv->pci_dev,
  4583. priv->ucode_code.len,
  4584. priv->ucode_code.v_addr,
  4585. priv->ucode_code.p_addr);
  4586. priv->ucode_code.v_addr = NULL;
  4587. }
  4588. if (priv->ucode_data.v_addr != NULL) {
  4589. pci_free_consistent(priv->pci_dev,
  4590. priv->ucode_data.len,
  4591. priv->ucode_data.v_addr,
  4592. priv->ucode_data.p_addr);
  4593. priv->ucode_data.v_addr = NULL;
  4594. }
  4595. if (priv->ucode_data_backup.v_addr != NULL) {
  4596. pci_free_consistent(priv->pci_dev,
  4597. priv->ucode_data_backup.len,
  4598. priv->ucode_data_backup.v_addr,
  4599. priv->ucode_data_backup.p_addr);
  4600. priv->ucode_data_backup.v_addr = NULL;
  4601. }
  4602. if (priv->ucode_init.v_addr != NULL) {
  4603. pci_free_consistent(priv->pci_dev,
  4604. priv->ucode_init.len,
  4605. priv->ucode_init.v_addr,
  4606. priv->ucode_init.p_addr);
  4607. priv->ucode_init.v_addr = NULL;
  4608. }
  4609. if (priv->ucode_init_data.v_addr != NULL) {
  4610. pci_free_consistent(priv->pci_dev,
  4611. priv->ucode_init_data.len,
  4612. priv->ucode_init_data.v_addr,
  4613. priv->ucode_init_data.p_addr);
  4614. priv->ucode_init_data.v_addr = NULL;
  4615. }
  4616. if (priv->ucode_boot.v_addr != NULL) {
  4617. pci_free_consistent(priv->pci_dev,
  4618. priv->ucode_boot.len,
  4619. priv->ucode_boot.v_addr,
  4620. priv->ucode_boot.p_addr);
  4621. priv->ucode_boot.v_addr = NULL;
  4622. }
  4623. }
  4624. /**
  4625. * iwl_verify_inst_full - verify runtime uCode image in card vs. host,
  4626. * looking at all data.
  4627. */
  4628. static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 * image, u32 len)
  4629. {
  4630. u32 val;
  4631. u32 save_len = len;
  4632. int rc = 0;
  4633. u32 errcnt;
  4634. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4635. rc = iwl_grab_restricted_access(priv);
  4636. if (rc)
  4637. return rc;
  4638. iwl_write_restricted(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4639. errcnt = 0;
  4640. for (; len > 0; len -= sizeof(u32), image++) {
  4641. /* read data comes through single port, auto-incr addr */
  4642. /* NOTE: Use the debugless read so we don't flood kernel log
  4643. * if IWL_DL_IO is set */
  4644. val = _iwl_read_restricted(priv, HBUS_TARG_MEM_RDAT);
  4645. if (val != le32_to_cpu(*image)) {
  4646. IWL_ERROR("uCode INST section is invalid at "
  4647. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4648. save_len - len, val, le32_to_cpu(*image));
  4649. rc = -EIO;
  4650. errcnt++;
  4651. if (errcnt >= 20)
  4652. break;
  4653. }
  4654. }
  4655. iwl_release_restricted_access(priv);
  4656. if (!errcnt)
  4657. IWL_DEBUG_INFO
  4658. ("ucode image in INSTRUCTION memory is good\n");
  4659. return rc;
  4660. }
  4661. /**
  4662. * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4663. * using sample data 100 bytes apart. If these sample points are good,
  4664. * it's a pretty good bet that everything between them is good, too.
  4665. */
  4666. static int iwl_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  4667. {
  4668. u32 val;
  4669. int rc = 0;
  4670. u32 errcnt = 0;
  4671. u32 i;
  4672. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4673. rc = iwl_grab_restricted_access(priv);
  4674. if (rc)
  4675. return rc;
  4676. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  4677. /* read data comes through single port, auto-incr addr */
  4678. /* NOTE: Use the debugless read so we don't flood kernel log
  4679. * if IWL_DL_IO is set */
  4680. iwl_write_restricted(priv, HBUS_TARG_MEM_RADDR,
  4681. i + RTC_INST_LOWER_BOUND);
  4682. val = _iwl_read_restricted(priv, HBUS_TARG_MEM_RDAT);
  4683. if (val != le32_to_cpu(*image)) {
  4684. #if 0 /* Enable this if you want to see details */
  4685. IWL_ERROR("uCode INST section is invalid at "
  4686. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4687. i, val, *image);
  4688. #endif
  4689. rc = -EIO;
  4690. errcnt++;
  4691. if (errcnt >= 3)
  4692. break;
  4693. }
  4694. }
  4695. iwl_release_restricted_access(priv);
  4696. return rc;
  4697. }
  4698. /**
  4699. * iwl_verify_ucode - determine which instruction image is in SRAM,
  4700. * and verify its contents
  4701. */
  4702. static int iwl_verify_ucode(struct iwl_priv *priv)
  4703. {
  4704. __le32 *image;
  4705. u32 len;
  4706. int rc = 0;
  4707. /* Try bootstrap */
  4708. image = (__le32 *)priv->ucode_boot.v_addr;
  4709. len = priv->ucode_boot.len;
  4710. rc = iwl_verify_inst_sparse(priv, image, len);
  4711. if (rc == 0) {
  4712. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  4713. return 0;
  4714. }
  4715. /* Try initialize */
  4716. image = (__le32 *)priv->ucode_init.v_addr;
  4717. len = priv->ucode_init.len;
  4718. rc = iwl_verify_inst_sparse(priv, image, len);
  4719. if (rc == 0) {
  4720. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  4721. return 0;
  4722. }
  4723. /* Try runtime/protocol */
  4724. image = (__le32 *)priv->ucode_code.v_addr;
  4725. len = priv->ucode_code.len;
  4726. rc = iwl_verify_inst_sparse(priv, image, len);
  4727. if (rc == 0) {
  4728. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  4729. return 0;
  4730. }
  4731. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  4732. /* Show first several data entries in instruction SRAM.
  4733. * Selection of bootstrap image is arbitrary. */
  4734. image = (__le32 *)priv->ucode_boot.v_addr;
  4735. len = priv->ucode_boot.len;
  4736. rc = iwl_verify_inst_full(priv, image, len);
  4737. return rc;
  4738. }
  4739. /* check contents of special bootstrap uCode SRAM */
  4740. static int iwl_verify_bsm(struct iwl_priv *priv)
  4741. {
  4742. __le32 *image = priv->ucode_boot.v_addr;
  4743. u32 len = priv->ucode_boot.len;
  4744. u32 reg;
  4745. u32 val;
  4746. IWL_DEBUG_INFO("Begin verify bsm\n");
  4747. /* verify BSM SRAM contents */
  4748. val = iwl_read_restricted_reg(priv, BSM_WR_DWCOUNT_REG);
  4749. for (reg = BSM_SRAM_LOWER_BOUND;
  4750. reg < BSM_SRAM_LOWER_BOUND + len;
  4751. reg += sizeof(u32), image ++) {
  4752. val = iwl_read_restricted_reg(priv, reg);
  4753. if (val != le32_to_cpu(*image)) {
  4754. IWL_ERROR("BSM uCode verification failed at "
  4755. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  4756. BSM_SRAM_LOWER_BOUND,
  4757. reg - BSM_SRAM_LOWER_BOUND, len,
  4758. val, le32_to_cpu(*image));
  4759. return -EIO;
  4760. }
  4761. }
  4762. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  4763. return 0;
  4764. }
  4765. /**
  4766. * iwl_load_bsm - Load bootstrap instructions
  4767. *
  4768. * BSM operation:
  4769. *
  4770. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  4771. * in special SRAM that does not power down during RFKILL. When powering back
  4772. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  4773. * the bootstrap program into the on-board processor, and starts it.
  4774. *
  4775. * The bootstrap program loads (via DMA) instructions and data for a new
  4776. * program from host DRAM locations indicated by the host driver in the
  4777. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  4778. * automatically.
  4779. *
  4780. * When initializing the NIC, the host driver points the BSM to the
  4781. * "initialize" uCode image. This uCode sets up some internal data, then
  4782. * notifies host via "initialize alive" that it is complete.
  4783. *
  4784. * The host then replaces the BSM_DRAM_* pointer values to point to the
  4785. * normal runtime uCode instructions and a backup uCode data cache buffer
  4786. * (filled initially with starting data values for the on-board processor),
  4787. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  4788. * which begins normal operation.
  4789. *
  4790. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  4791. * the backup data cache in DRAM before SRAM is powered down.
  4792. *
  4793. * When powering back up, the BSM loads the bootstrap program. This reloads
  4794. * the runtime uCode instructions and the backup data cache into SRAM,
  4795. * and re-launches the runtime uCode from where it left off.
  4796. */
  4797. static int iwl_load_bsm(struct iwl_priv *priv)
  4798. {
  4799. __le32 *image = priv->ucode_boot.v_addr;
  4800. u32 len = priv->ucode_boot.len;
  4801. dma_addr_t pinst;
  4802. dma_addr_t pdata;
  4803. u32 inst_len;
  4804. u32 data_len;
  4805. int rc;
  4806. int i;
  4807. u32 done;
  4808. u32 reg_offset;
  4809. IWL_DEBUG_INFO("Begin load bsm\n");
  4810. /* make sure bootstrap program is no larger than BSM's SRAM size */
  4811. if (len > IWL_MAX_BSM_SIZE)
  4812. return -EINVAL;
  4813. /* Tell bootstrap uCode where to find the "Initialize" uCode
  4814. * in host DRAM ... bits 31:0 for 3945, bits 35:4 for 4965.
  4815. * NOTE: iwl_initialize_alive_start() will replace these values,
  4816. * after the "initialize" uCode has run, to point to
  4817. * runtime/protocol instructions and backup data cache. */
  4818. pinst = priv->ucode_init.p_addr;
  4819. pdata = priv->ucode_init_data.p_addr;
  4820. inst_len = priv->ucode_init.len;
  4821. data_len = priv->ucode_init_data.len;
  4822. rc = iwl_grab_restricted_access(priv);
  4823. if (rc)
  4824. return rc;
  4825. iwl_write_restricted_reg(priv, BSM_DRAM_INST_PTR_REG, pinst);
  4826. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  4827. iwl_write_restricted_reg(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  4828. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  4829. /* Fill BSM memory with bootstrap instructions */
  4830. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  4831. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  4832. reg_offset += sizeof(u32), image++)
  4833. _iwl_write_restricted_reg(priv, reg_offset,
  4834. le32_to_cpu(*image));
  4835. rc = iwl_verify_bsm(priv);
  4836. if (rc) {
  4837. iwl_release_restricted_access(priv);
  4838. return rc;
  4839. }
  4840. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  4841. iwl_write_restricted_reg(priv, BSM_WR_MEM_SRC_REG, 0x0);
  4842. iwl_write_restricted_reg(priv, BSM_WR_MEM_DST_REG,
  4843. RTC_INST_LOWER_BOUND);
  4844. iwl_write_restricted_reg(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  4845. /* Load bootstrap code into instruction SRAM now,
  4846. * to prepare to load "initialize" uCode */
  4847. iwl_write_restricted_reg(priv, BSM_WR_CTRL_REG,
  4848. BSM_WR_CTRL_REG_BIT_START);
  4849. /* Wait for load of bootstrap uCode to finish */
  4850. for (i = 0; i < 100; i++) {
  4851. done = iwl_read_restricted_reg(priv, BSM_WR_CTRL_REG);
  4852. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  4853. break;
  4854. udelay(10);
  4855. }
  4856. if (i < 100)
  4857. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  4858. else {
  4859. IWL_ERROR("BSM write did not complete!\n");
  4860. return -EIO;
  4861. }
  4862. /* Enable future boot loads whenever power management unit triggers it
  4863. * (e.g. when powering back up after power-save shutdown) */
  4864. iwl_write_restricted_reg(priv, BSM_WR_CTRL_REG,
  4865. BSM_WR_CTRL_REG_BIT_START_EN);
  4866. iwl_release_restricted_access(priv);
  4867. return 0;
  4868. }
  4869. static void iwl_nic_start(struct iwl_priv *priv)
  4870. {
  4871. /* Remove all resets to allow NIC to operate */
  4872. iwl_write32(priv, CSR_RESET, 0);
  4873. }
  4874. /**
  4875. * iwl_read_ucode - Read uCode images from disk file.
  4876. *
  4877. * Copy into buffers for card to fetch via bus-mastering
  4878. */
  4879. static int iwl_read_ucode(struct iwl_priv *priv)
  4880. {
  4881. struct iwl_ucode *ucode;
  4882. int rc = 0;
  4883. const struct firmware *ucode_raw;
  4884. /* firmware file name contains uCode/driver compatibility version */
  4885. const char *name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode";
  4886. u8 *src;
  4887. size_t len;
  4888. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  4889. /* Ask kernel firmware_class module to get the boot firmware off disk.
  4890. * request_firmware() is synchronous, file is in memory on return. */
  4891. rc = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  4892. if (rc < 0) {
  4893. IWL_ERROR("%s firmware file req failed: Reason %d\n", name, rc);
  4894. goto error;
  4895. }
  4896. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  4897. name, ucode_raw->size);
  4898. /* Make sure that we got at least our header! */
  4899. if (ucode_raw->size < sizeof(*ucode)) {
  4900. IWL_ERROR("File size way too small!\n");
  4901. rc = -EINVAL;
  4902. goto err_release;
  4903. }
  4904. /* Data from ucode file: header followed by uCode images */
  4905. ucode = (void *)ucode_raw->data;
  4906. ver = le32_to_cpu(ucode->ver);
  4907. inst_size = le32_to_cpu(ucode->inst_size);
  4908. data_size = le32_to_cpu(ucode->data_size);
  4909. init_size = le32_to_cpu(ucode->init_size);
  4910. init_data_size = le32_to_cpu(ucode->init_data_size);
  4911. boot_size = le32_to_cpu(ucode->boot_size);
  4912. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  4913. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  4914. inst_size);
  4915. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  4916. data_size);
  4917. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  4918. init_size);
  4919. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  4920. init_data_size);
  4921. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  4922. boot_size);
  4923. /* Verify size of file vs. image size info in file's header */
  4924. if (ucode_raw->size < sizeof(*ucode) +
  4925. inst_size + data_size + init_size +
  4926. init_data_size + boot_size) {
  4927. IWL_DEBUG_INFO("uCode file size %d too small\n",
  4928. (int)ucode_raw->size);
  4929. rc = -EINVAL;
  4930. goto err_release;
  4931. }
  4932. /* Verify that uCode images will fit in card's SRAM */
  4933. if (inst_size > IWL_MAX_INST_SIZE) {
  4934. IWL_DEBUG_INFO("uCode instr len %d too large to fit in card\n",
  4935. (int)inst_size);
  4936. rc = -EINVAL;
  4937. goto err_release;
  4938. }
  4939. if (data_size > IWL_MAX_DATA_SIZE) {
  4940. IWL_DEBUG_INFO("uCode data len %d too large to fit in card\n",
  4941. (int)data_size);
  4942. rc = -EINVAL;
  4943. goto err_release;
  4944. }
  4945. if (init_size > IWL_MAX_INST_SIZE) {
  4946. IWL_DEBUG_INFO
  4947. ("uCode init instr len %d too large to fit in card\n",
  4948. (int)init_size);
  4949. rc = -EINVAL;
  4950. goto err_release;
  4951. }
  4952. if (init_data_size > IWL_MAX_DATA_SIZE) {
  4953. IWL_DEBUG_INFO
  4954. ("uCode init data len %d too large to fit in card\n",
  4955. (int)init_data_size);
  4956. rc = -EINVAL;
  4957. goto err_release;
  4958. }
  4959. if (boot_size > IWL_MAX_BSM_SIZE) {
  4960. IWL_DEBUG_INFO
  4961. ("uCode boot instr len %d too large to fit in bsm\n",
  4962. (int)boot_size);
  4963. rc = -EINVAL;
  4964. goto err_release;
  4965. }
  4966. /* Allocate ucode buffers for card's bus-master loading ... */
  4967. /* Runtime instructions and 2 copies of data:
  4968. * 1) unmodified from disk
  4969. * 2) backup cache for save/restore during power-downs */
  4970. priv->ucode_code.len = inst_size;
  4971. priv->ucode_code.v_addr =
  4972. pci_alloc_consistent(priv->pci_dev,
  4973. priv->ucode_code.len,
  4974. &(priv->ucode_code.p_addr));
  4975. priv->ucode_data.len = data_size;
  4976. priv->ucode_data.v_addr =
  4977. pci_alloc_consistent(priv->pci_dev,
  4978. priv->ucode_data.len,
  4979. &(priv->ucode_data.p_addr));
  4980. priv->ucode_data_backup.len = data_size;
  4981. priv->ucode_data_backup.v_addr =
  4982. pci_alloc_consistent(priv->pci_dev,
  4983. priv->ucode_data_backup.len,
  4984. &(priv->ucode_data_backup.p_addr));
  4985. /* Initialization instructions and data */
  4986. priv->ucode_init.len = init_size;
  4987. priv->ucode_init.v_addr =
  4988. pci_alloc_consistent(priv->pci_dev,
  4989. priv->ucode_init.len,
  4990. &(priv->ucode_init.p_addr));
  4991. priv->ucode_init_data.len = init_data_size;
  4992. priv->ucode_init_data.v_addr =
  4993. pci_alloc_consistent(priv->pci_dev,
  4994. priv->ucode_init_data.len,
  4995. &(priv->ucode_init_data.p_addr));
  4996. /* Bootstrap (instructions only, no data) */
  4997. priv->ucode_boot.len = boot_size;
  4998. priv->ucode_boot.v_addr =
  4999. pci_alloc_consistent(priv->pci_dev,
  5000. priv->ucode_boot.len,
  5001. &(priv->ucode_boot.p_addr));
  5002. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  5003. !priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr ||
  5004. !priv->ucode_boot.v_addr || !priv->ucode_data_backup.v_addr)
  5005. goto err_pci_alloc;
  5006. /* Copy images into buffers for card's bus-master reads ... */
  5007. /* Runtime instructions (first block of data in file) */
  5008. src = &ucode->data[0];
  5009. len = priv->ucode_code.len;
  5010. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %d\n",
  5011. (int)len);
  5012. memcpy(priv->ucode_code.v_addr, src, len);
  5013. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  5014. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  5015. /* Runtime data (2nd block)
  5016. * NOTE: Copy into backup buffer will be done in iwl_up() */
  5017. src = &ucode->data[inst_size];
  5018. len = priv->ucode_data.len;
  5019. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %d\n",
  5020. (int)len);
  5021. memcpy(priv->ucode_data.v_addr, src, len);
  5022. memcpy(priv->ucode_data_backup.v_addr, src, len);
  5023. /* Initialization instructions (3rd block) */
  5024. if (init_size) {
  5025. src = &ucode->data[inst_size + data_size];
  5026. len = priv->ucode_init.len;
  5027. IWL_DEBUG_INFO("Copying (but not loading) init instr len %d\n",
  5028. (int)len);
  5029. memcpy(priv->ucode_init.v_addr, src, len);
  5030. }
  5031. /* Initialization data (4th block) */
  5032. if (init_data_size) {
  5033. src = &ucode->data[inst_size + data_size + init_size];
  5034. len = priv->ucode_init_data.len;
  5035. IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
  5036. (int)len);
  5037. memcpy(priv->ucode_init_data.v_addr, src, len);
  5038. }
  5039. /* Bootstrap instructions (5th block) */
  5040. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  5041. len = priv->ucode_boot.len;
  5042. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
  5043. (int)len);
  5044. memcpy(priv->ucode_boot.v_addr, src, len);
  5045. /* We have our copies now, allow OS release its copies */
  5046. release_firmware(ucode_raw);
  5047. return 0;
  5048. err_pci_alloc:
  5049. IWL_ERROR("failed to allocate pci memory\n");
  5050. rc = -ENOMEM;
  5051. iwl_dealloc_ucode_pci(priv);
  5052. err_release:
  5053. release_firmware(ucode_raw);
  5054. error:
  5055. return rc;
  5056. }
  5057. /**
  5058. * iwl_set_ucode_ptrs - Set uCode address location
  5059. *
  5060. * Tell initialization uCode where to find runtime uCode.
  5061. *
  5062. * BSM registers initially contain pointers to initialization uCode.
  5063. * We need to replace them to load runtime uCode inst and data,
  5064. * and to save runtime data when powering down.
  5065. */
  5066. static int iwl_set_ucode_ptrs(struct iwl_priv *priv)
  5067. {
  5068. dma_addr_t pinst;
  5069. dma_addr_t pdata;
  5070. int rc = 0;
  5071. unsigned long flags;
  5072. /* bits 31:0 for 3945 */
  5073. pinst = priv->ucode_code.p_addr;
  5074. pdata = priv->ucode_data_backup.p_addr;
  5075. spin_lock_irqsave(&priv->lock, flags);
  5076. rc = iwl_grab_restricted_access(priv);
  5077. if (rc) {
  5078. spin_unlock_irqrestore(&priv->lock, flags);
  5079. return rc;
  5080. }
  5081. /* Tell bootstrap uCode where to find image to load */
  5082. iwl_write_restricted_reg(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5083. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5084. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  5085. priv->ucode_data.len);
  5086. /* Inst bytecount must be last to set up, bit 31 signals uCode
  5087. * that all new ptr/size info is in place */
  5088. iwl_write_restricted_reg(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  5089. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  5090. iwl_release_restricted_access(priv);
  5091. spin_unlock_irqrestore(&priv->lock, flags);
  5092. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  5093. return rc;
  5094. }
  5095. /**
  5096. * iwl_init_alive_start - Called after REPLY_ALIVE notification receieved
  5097. *
  5098. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  5099. *
  5100. * The 4965 "initialize" ALIVE reply contains calibration data for:
  5101. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  5102. * (3945 does not contain this data).
  5103. *
  5104. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  5105. */
  5106. static void iwl_init_alive_start(struct iwl_priv *priv)
  5107. {
  5108. /* Check alive response for "valid" sign from uCode */
  5109. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  5110. /* We had an error bringing up the hardware, so take it
  5111. * all the way back down so we can try again */
  5112. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  5113. goto restart;
  5114. }
  5115. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  5116. * This is a paranoid check, because we would not have gotten the
  5117. * "initialize" alive if code weren't properly loaded. */
  5118. if (iwl_verify_ucode(priv)) {
  5119. /* Runtime instruction load was bad;
  5120. * take it all the way back down so we can try again */
  5121. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  5122. goto restart;
  5123. }
  5124. /* Send pointers to protocol/runtime uCode image ... init code will
  5125. * load and launch runtime uCode, which will send us another "Alive"
  5126. * notification. */
  5127. IWL_DEBUG_INFO("Initialization Alive received.\n");
  5128. if (iwl_set_ucode_ptrs(priv)) {
  5129. /* Runtime instruction load won't happen;
  5130. * take it all the way back down so we can try again */
  5131. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  5132. goto restart;
  5133. }
  5134. return;
  5135. restart:
  5136. queue_work(priv->workqueue, &priv->restart);
  5137. }
  5138. /**
  5139. * iwl_alive_start - called after REPLY_ALIVE notification received
  5140. * from protocol/runtime uCode (initialization uCode's
  5141. * Alive gets handled by iwl_init_alive_start()).
  5142. */
  5143. static void iwl_alive_start(struct iwl_priv *priv)
  5144. {
  5145. int rc = 0;
  5146. int thermal_spin = 0;
  5147. u32 rfkill;
  5148. IWL_DEBUG_INFO("Runtime Alive received.\n");
  5149. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  5150. /* We had an error bringing up the hardware, so take it
  5151. * all the way back down so we can try again */
  5152. IWL_DEBUG_INFO("Alive failed.\n");
  5153. goto restart;
  5154. }
  5155. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  5156. * This is a paranoid check, because we would not have gotten the
  5157. * "runtime" alive if code weren't properly loaded. */
  5158. if (iwl_verify_ucode(priv)) {
  5159. /* Runtime instruction load was bad;
  5160. * take it all the way back down so we can try again */
  5161. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  5162. goto restart;
  5163. }
  5164. iwl_clear_stations_table(priv);
  5165. rc = iwl_grab_restricted_access(priv);
  5166. if (rc) {
  5167. IWL_WARNING("Can not read rfkill status from adapter\n");
  5168. return;
  5169. }
  5170. rfkill = iwl_read_restricted_reg(priv, APMG_RFKILL_REG);
  5171. IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
  5172. iwl_release_restricted_access(priv);
  5173. if (rfkill & 0x1) {
  5174. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  5175. /* if rfkill is not on, then wait for thermal
  5176. * sensor in adapter to kick in */
  5177. while (iwl_hw_get_temperature(priv) == 0) {
  5178. thermal_spin++;
  5179. udelay(10);
  5180. }
  5181. if (thermal_spin)
  5182. IWL_DEBUG_INFO("Thermal calibration took %dus\n",
  5183. thermal_spin * 10);
  5184. } else
  5185. set_bit(STATUS_RF_KILL_HW, &priv->status);
  5186. /* After the ALIVE response, we can process host commands */
  5187. set_bit(STATUS_ALIVE, &priv->status);
  5188. /* Clear out the uCode error bit if it is set */
  5189. clear_bit(STATUS_FW_ERROR, &priv->status);
  5190. rc = iwl_init_channel_map(priv);
  5191. if (rc) {
  5192. IWL_ERROR("initializing regulatory failed: %d\n", rc);
  5193. return;
  5194. }
  5195. iwl_init_geos(priv);
  5196. if (iwl_is_rfkill(priv))
  5197. return;
  5198. if (!priv->mac80211_registered) {
  5199. /* Unlock so any user space entry points can call back into
  5200. * the driver without a deadlock... */
  5201. mutex_unlock(&priv->mutex);
  5202. iwl_rate_control_register(priv->hw);
  5203. rc = ieee80211_register_hw(priv->hw);
  5204. priv->hw->conf.beacon_int = 100;
  5205. mutex_lock(&priv->mutex);
  5206. if (rc) {
  5207. IWL_ERROR("Failed to register network "
  5208. "device (error %d)\n", rc);
  5209. return;
  5210. }
  5211. priv->mac80211_registered = 1;
  5212. iwl_reset_channel_flag(priv);
  5213. } else
  5214. ieee80211_start_queues(priv->hw);
  5215. priv->active_rate = priv->rates_mask;
  5216. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  5217. iwl_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  5218. if (iwl_is_associated(priv)) {
  5219. struct iwl_rxon_cmd *active_rxon =
  5220. (struct iwl_rxon_cmd *)(&priv->active_rxon);
  5221. memcpy(&priv->staging_rxon, &priv->active_rxon,
  5222. sizeof(priv->staging_rxon));
  5223. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5224. } else {
  5225. /* Initialize our rx_config data */
  5226. iwl_connection_init_rx_config(priv);
  5227. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  5228. }
  5229. /* Configure BT coexistence */
  5230. iwl_send_bt_config(priv);
  5231. /* Configure the adapter for unassociated operation */
  5232. iwl_commit_rxon(priv);
  5233. /* At this point, the NIC is initialized and operational */
  5234. priv->notif_missed_beacons = 0;
  5235. set_bit(STATUS_READY, &priv->status);
  5236. iwl3945_reg_txpower_periodic(priv);
  5237. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  5238. if (priv->error_recovering)
  5239. iwl_error_recovery(priv);
  5240. return;
  5241. restart:
  5242. queue_work(priv->workqueue, &priv->restart);
  5243. }
  5244. static void iwl_cancel_deferred_work(struct iwl_priv *priv);
  5245. static void __iwl_down(struct iwl_priv *priv)
  5246. {
  5247. unsigned long flags;
  5248. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  5249. struct ieee80211_conf *conf = NULL;
  5250. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  5251. conf = ieee80211_get_hw_conf(priv->hw);
  5252. if (!exit_pending)
  5253. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5254. iwl_clear_stations_table(priv);
  5255. /* Unblock any waiting calls */
  5256. wake_up_interruptible_all(&priv->wait_command_queue);
  5257. iwl_cancel_deferred_work(priv);
  5258. /* Wipe out the EXIT_PENDING status bit if we are not actually
  5259. * exiting the module */
  5260. if (!exit_pending)
  5261. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  5262. /* stop and reset the on-board processor */
  5263. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  5264. /* tell the device to stop sending interrupts */
  5265. iwl_disable_interrupts(priv);
  5266. if (priv->mac80211_registered)
  5267. ieee80211_stop_queues(priv->hw);
  5268. /* If we have not previously called iwl_init() then
  5269. * clear all bits but the RF Kill and SUSPEND bits and return */
  5270. if (!iwl_is_init(priv)) {
  5271. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5272. STATUS_RF_KILL_HW |
  5273. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5274. STATUS_RF_KILL_SW |
  5275. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5276. STATUS_IN_SUSPEND;
  5277. goto exit;
  5278. }
  5279. /* ...otherwise clear out all the status bits but the RF Kill and
  5280. * SUSPEND bits and continue taking the NIC down. */
  5281. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5282. STATUS_RF_KILL_HW |
  5283. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5284. STATUS_RF_KILL_SW |
  5285. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5286. STATUS_IN_SUSPEND |
  5287. test_bit(STATUS_FW_ERROR, &priv->status) <<
  5288. STATUS_FW_ERROR;
  5289. spin_lock_irqsave(&priv->lock, flags);
  5290. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  5291. spin_unlock_irqrestore(&priv->lock, flags);
  5292. iwl_hw_txq_ctx_stop(priv);
  5293. iwl_hw_rxq_stop(priv);
  5294. spin_lock_irqsave(&priv->lock, flags);
  5295. if (!iwl_grab_restricted_access(priv)) {
  5296. iwl_write_restricted_reg(priv, APMG_CLK_DIS_REG,
  5297. APMG_CLK_VAL_DMA_CLK_RQT);
  5298. iwl_release_restricted_access(priv);
  5299. }
  5300. spin_unlock_irqrestore(&priv->lock, flags);
  5301. udelay(5);
  5302. iwl_hw_nic_stop_master(priv);
  5303. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  5304. iwl_hw_nic_reset(priv);
  5305. exit:
  5306. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  5307. if (priv->ibss_beacon)
  5308. dev_kfree_skb(priv->ibss_beacon);
  5309. priv->ibss_beacon = NULL;
  5310. /* clear out any free frames */
  5311. iwl_clear_free_frames(priv);
  5312. }
  5313. static void iwl_down(struct iwl_priv *priv)
  5314. {
  5315. mutex_lock(&priv->mutex);
  5316. __iwl_down(priv);
  5317. mutex_unlock(&priv->mutex);
  5318. }
  5319. #define MAX_HW_RESTARTS 5
  5320. static int __iwl_up(struct iwl_priv *priv)
  5321. {
  5322. DECLARE_MAC_BUF(mac);
  5323. int rc, i;
  5324. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5325. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  5326. return -EIO;
  5327. }
  5328. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  5329. IWL_WARNING("Radio disabled by SW RF kill (module "
  5330. "parameter)\n");
  5331. return 0;
  5332. }
  5333. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  5334. rc = iwl_hw_nic_init(priv);
  5335. if (rc) {
  5336. IWL_ERROR("Unable to int nic\n");
  5337. return rc;
  5338. }
  5339. /* make sure rfkill handshake bits are cleared */
  5340. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5341. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  5342. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  5343. /* clear (again), then enable host interrupts */
  5344. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  5345. iwl_enable_interrupts(priv);
  5346. /* really make sure rfkill handshake bits are cleared */
  5347. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5348. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5349. /* Copy original ucode data image from disk into backup cache.
  5350. * This will be used to initialize the on-board processor's
  5351. * data SRAM for a clean start when the runtime program first loads. */
  5352. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  5353. priv->ucode_data.len);
  5354. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  5355. iwl_clear_stations_table(priv);
  5356. /* load bootstrap state machine,
  5357. * load bootstrap program into processor's memory,
  5358. * prepare to load the "initialize" uCode */
  5359. rc = iwl_load_bsm(priv);
  5360. if (rc) {
  5361. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  5362. continue;
  5363. }
  5364. /* start card; "initialize" will load runtime ucode */
  5365. iwl_nic_start(priv);
  5366. /* MAC Address location in EEPROM same for 3945/4965 */
  5367. get_eeprom_mac(priv, priv->mac_addr);
  5368. IWL_DEBUG_INFO("MAC address: %s\n",
  5369. print_mac(mac, priv->mac_addr));
  5370. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  5371. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  5372. return 0;
  5373. }
  5374. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5375. __iwl_down(priv);
  5376. /* tried to restart and config the device for as long as our
  5377. * patience could withstand */
  5378. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  5379. return -EIO;
  5380. }
  5381. /*****************************************************************************
  5382. *
  5383. * Workqueue callbacks
  5384. *
  5385. *****************************************************************************/
  5386. static void iwl_bg_init_alive_start(struct work_struct *data)
  5387. {
  5388. struct iwl_priv *priv =
  5389. container_of(data, struct iwl_priv, init_alive_start.work);
  5390. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5391. return;
  5392. mutex_lock(&priv->mutex);
  5393. iwl_init_alive_start(priv);
  5394. mutex_unlock(&priv->mutex);
  5395. }
  5396. static void iwl_bg_alive_start(struct work_struct *data)
  5397. {
  5398. struct iwl_priv *priv =
  5399. container_of(data, struct iwl_priv, alive_start.work);
  5400. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5401. return;
  5402. mutex_lock(&priv->mutex);
  5403. iwl_alive_start(priv);
  5404. mutex_unlock(&priv->mutex);
  5405. }
  5406. static void iwl_bg_rf_kill(struct work_struct *work)
  5407. {
  5408. struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
  5409. wake_up_interruptible(&priv->wait_command_queue);
  5410. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5411. return;
  5412. mutex_lock(&priv->mutex);
  5413. if (!iwl_is_rfkill(priv)) {
  5414. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5415. "HW and/or SW RF Kill no longer active, restarting "
  5416. "device\n");
  5417. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5418. queue_work(priv->workqueue, &priv->restart);
  5419. } else {
  5420. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5421. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5422. "disabled by SW switch\n");
  5423. else
  5424. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5425. "Kill switch must be turned off for "
  5426. "wireless networking to work.\n");
  5427. }
  5428. mutex_unlock(&priv->mutex);
  5429. }
  5430. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5431. static void iwl_bg_scan_check(struct work_struct *data)
  5432. {
  5433. struct iwl_priv *priv =
  5434. container_of(data, struct iwl_priv, scan_check.work);
  5435. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5436. return;
  5437. mutex_lock(&priv->mutex);
  5438. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5439. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5440. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5441. "Scan completion watchdog resetting adapter (%dms)\n",
  5442. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5443. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5444. queue_work(priv->workqueue, &priv->restart);
  5445. }
  5446. mutex_unlock(&priv->mutex);
  5447. }
  5448. static void iwl_bg_request_scan(struct work_struct *data)
  5449. {
  5450. struct iwl_priv *priv =
  5451. container_of(data, struct iwl_priv, request_scan);
  5452. struct iwl_host_cmd cmd = {
  5453. .id = REPLY_SCAN_CMD,
  5454. .len = sizeof(struct iwl_scan_cmd),
  5455. .meta.flags = CMD_SIZE_HUGE,
  5456. };
  5457. int rc = 0;
  5458. struct iwl_scan_cmd *scan;
  5459. struct ieee80211_conf *conf = NULL;
  5460. u8 direct_mask;
  5461. int phymode;
  5462. conf = ieee80211_get_hw_conf(priv->hw);
  5463. mutex_lock(&priv->mutex);
  5464. if (!iwl_is_ready(priv)) {
  5465. IWL_WARNING("request scan called when driver not ready.\n");
  5466. goto done;
  5467. }
  5468. /* Make sure the scan wasn't cancelled before this queued work
  5469. * was given the chance to run... */
  5470. if (!test_bit(STATUS_SCANNING, &priv->status))
  5471. goto done;
  5472. /* This should never be called or scheduled if there is currently
  5473. * a scan active in the hardware. */
  5474. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5475. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5476. "Ignoring second request.\n");
  5477. rc = -EIO;
  5478. goto done;
  5479. }
  5480. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5481. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5482. goto done;
  5483. }
  5484. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5485. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5486. goto done;
  5487. }
  5488. if (iwl_is_rfkill(priv)) {
  5489. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5490. goto done;
  5491. }
  5492. if (!test_bit(STATUS_READY, &priv->status)) {
  5493. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5494. goto done;
  5495. }
  5496. if (!priv->scan_bands) {
  5497. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5498. goto done;
  5499. }
  5500. if (!priv->scan) {
  5501. priv->scan = kmalloc(sizeof(struct iwl_scan_cmd) +
  5502. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5503. if (!priv->scan) {
  5504. rc = -ENOMEM;
  5505. goto done;
  5506. }
  5507. }
  5508. scan = priv->scan;
  5509. memset(scan, 0, sizeof(struct iwl_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5510. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5511. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5512. if (iwl_is_associated(priv)) {
  5513. u16 interval = 0;
  5514. u32 extra;
  5515. u32 suspend_time = 100;
  5516. u32 scan_suspend_time = 100;
  5517. unsigned long flags;
  5518. IWL_DEBUG_INFO("Scanning while associated...\n");
  5519. spin_lock_irqsave(&priv->lock, flags);
  5520. interval = priv->beacon_int;
  5521. spin_unlock_irqrestore(&priv->lock, flags);
  5522. scan->suspend_time = 0;
  5523. scan->max_out_time = cpu_to_le32(600 * 1024);
  5524. if (!interval)
  5525. interval = suspend_time;
  5526. /*
  5527. * suspend time format:
  5528. * 0-19: beacon interval in usec (time before exec.)
  5529. * 20-23: 0
  5530. * 24-31: number of beacons (suspend between channels)
  5531. */
  5532. extra = (suspend_time / interval) << 24;
  5533. scan_suspend_time = 0xFF0FFFFF &
  5534. (extra | ((suspend_time % interval) * 1024));
  5535. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5536. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5537. scan_suspend_time, interval);
  5538. }
  5539. /* We should add the ability for user to lock to PASSIVE ONLY */
  5540. if (priv->one_direct_scan) {
  5541. IWL_DEBUG_SCAN
  5542. ("Kicking off one direct scan for '%s'\n",
  5543. iwl_escape_essid(priv->direct_ssid,
  5544. priv->direct_ssid_len));
  5545. scan->direct_scan[0].id = WLAN_EID_SSID;
  5546. scan->direct_scan[0].len = priv->direct_ssid_len;
  5547. memcpy(scan->direct_scan[0].ssid,
  5548. priv->direct_ssid, priv->direct_ssid_len);
  5549. direct_mask = 1;
  5550. } else if (!iwl_is_associated(priv)) {
  5551. scan->direct_scan[0].id = WLAN_EID_SSID;
  5552. scan->direct_scan[0].len = priv->essid_len;
  5553. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5554. direct_mask = 1;
  5555. } else
  5556. direct_mask = 0;
  5557. /* We don't build a direct scan probe request; the uCode will do
  5558. * that based on the direct_mask added to each channel entry */
  5559. scan->tx_cmd.len = cpu_to_le16(
  5560. iwl_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
  5561. IWL_MAX_SCAN_SIZE - sizeof(scan), 0));
  5562. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5563. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5564. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5565. /* flags + rate selection */
  5566. switch (priv->scan_bands) {
  5567. case 2:
  5568. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5569. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  5570. scan->good_CRC_th = 0;
  5571. phymode = MODE_IEEE80211G;
  5572. break;
  5573. case 1:
  5574. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  5575. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5576. phymode = MODE_IEEE80211A;
  5577. break;
  5578. default:
  5579. IWL_WARNING("Invalid scan band count\n");
  5580. goto done;
  5581. }
  5582. /* select Rx antennas */
  5583. scan->flags |= iwl3945_get_antenna_flags(priv);
  5584. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5585. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5586. if (direct_mask)
  5587. IWL_DEBUG_SCAN
  5588. ("Initiating direct scan for %s.\n",
  5589. iwl_escape_essid(priv->essid, priv->essid_len));
  5590. else
  5591. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5592. scan->channel_count =
  5593. iwl_get_channels_for_scan(
  5594. priv, phymode, 1, /* active */
  5595. direct_mask,
  5596. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5597. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5598. scan->channel_count * sizeof(struct iwl_scan_channel);
  5599. cmd.data = scan;
  5600. scan->len = cpu_to_le16(cmd.len);
  5601. set_bit(STATUS_SCAN_HW, &priv->status);
  5602. rc = iwl_send_cmd_sync(priv, &cmd);
  5603. if (rc)
  5604. goto done;
  5605. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5606. IWL_SCAN_CHECK_WATCHDOG);
  5607. mutex_unlock(&priv->mutex);
  5608. return;
  5609. done:
  5610. /* inform mac80211 sacn aborted */
  5611. queue_work(priv->workqueue, &priv->scan_completed);
  5612. mutex_unlock(&priv->mutex);
  5613. }
  5614. static void iwl_bg_up(struct work_struct *data)
  5615. {
  5616. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  5617. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5618. return;
  5619. mutex_lock(&priv->mutex);
  5620. __iwl_up(priv);
  5621. mutex_unlock(&priv->mutex);
  5622. }
  5623. static void iwl_bg_restart(struct work_struct *data)
  5624. {
  5625. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  5626. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5627. return;
  5628. iwl_down(priv);
  5629. queue_work(priv->workqueue, &priv->up);
  5630. }
  5631. static void iwl_bg_rx_replenish(struct work_struct *data)
  5632. {
  5633. struct iwl_priv *priv =
  5634. container_of(data, struct iwl_priv, rx_replenish);
  5635. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5636. return;
  5637. mutex_lock(&priv->mutex);
  5638. iwl_rx_replenish(priv);
  5639. mutex_unlock(&priv->mutex);
  5640. }
  5641. static void iwl_bg_post_associate(struct work_struct *data)
  5642. {
  5643. struct iwl_priv *priv = container_of(data, struct iwl_priv,
  5644. post_associate.work);
  5645. int rc = 0;
  5646. struct ieee80211_conf *conf = NULL;
  5647. DECLARE_MAC_BUF(mac);
  5648. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5649. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5650. return;
  5651. }
  5652. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5653. priv->assoc_id,
  5654. print_mac(mac, priv->active_rxon.bssid_addr));
  5655. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5656. return;
  5657. mutex_lock(&priv->mutex);
  5658. conf = ieee80211_get_hw_conf(priv->hw);
  5659. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5660. iwl_commit_rxon(priv);
  5661. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  5662. iwl_setup_rxon_timing(priv);
  5663. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5664. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5665. if (rc)
  5666. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5667. "Attempting to continue.\n");
  5668. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5669. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5670. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  5671. priv->assoc_id, priv->beacon_int);
  5672. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5673. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5674. else
  5675. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5676. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5677. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5678. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  5679. else
  5680. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5681. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5682. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5683. }
  5684. iwl_commit_rxon(priv);
  5685. switch (priv->iw_mode) {
  5686. case IEEE80211_IF_TYPE_STA:
  5687. iwl_rate_scale_init(priv->hw, IWL_AP_ID);
  5688. break;
  5689. case IEEE80211_IF_TYPE_IBSS:
  5690. /* clear out the station table */
  5691. iwl_clear_stations_table(priv);
  5692. iwl_rxon_add_station(priv, BROADCAST_ADDR, 0);
  5693. iwl_rxon_add_station(priv, priv->bssid, 0);
  5694. iwl3945_sync_sta(priv, IWL_STA_ID,
  5695. (priv->phymode == MODE_IEEE80211A)?
  5696. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  5697. CMD_ASYNC);
  5698. iwl_rate_scale_init(priv->hw, IWL_STA_ID);
  5699. iwl_send_beacon_cmd(priv);
  5700. break;
  5701. default:
  5702. IWL_ERROR("%s Should not be called in %d mode\n",
  5703. __FUNCTION__, priv->iw_mode);
  5704. break;
  5705. }
  5706. iwl_sequence_reset(priv);
  5707. #ifdef CONFIG_IWLWIFI_QOS
  5708. iwl_activate_qos(priv, 0);
  5709. #endif /* CONFIG_IWLWIFI_QOS */
  5710. mutex_unlock(&priv->mutex);
  5711. }
  5712. static void iwl_bg_abort_scan(struct work_struct *work)
  5713. {
  5714. struct iwl_priv *priv = container_of(work, struct iwl_priv,
  5715. abort_scan);
  5716. if (!iwl_is_ready(priv))
  5717. return;
  5718. mutex_lock(&priv->mutex);
  5719. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  5720. iwl_send_scan_abort(priv);
  5721. mutex_unlock(&priv->mutex);
  5722. }
  5723. static void iwl_bg_scan_completed(struct work_struct *work)
  5724. {
  5725. struct iwl_priv *priv =
  5726. container_of(work, struct iwl_priv, scan_completed);
  5727. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  5728. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5729. return;
  5730. ieee80211_scan_completed(priv->hw);
  5731. /* Since setting the TXPOWER may have been deferred while
  5732. * performing the scan, fire one off */
  5733. mutex_lock(&priv->mutex);
  5734. iwl_hw_reg_send_txpower(priv);
  5735. mutex_unlock(&priv->mutex);
  5736. }
  5737. /*****************************************************************************
  5738. *
  5739. * mac80211 entry point functions
  5740. *
  5741. *****************************************************************************/
  5742. static int iwl_mac_start(struct ieee80211_hw *hw)
  5743. {
  5744. struct iwl_priv *priv = hw->priv;
  5745. IWL_DEBUG_MAC80211("enter\n");
  5746. /* we should be verifying the device is ready to be opened */
  5747. mutex_lock(&priv->mutex);
  5748. priv->is_open = 1;
  5749. if (!iwl_is_rfkill(priv))
  5750. ieee80211_start_queues(priv->hw);
  5751. mutex_unlock(&priv->mutex);
  5752. IWL_DEBUG_MAC80211("leave\n");
  5753. return 0;
  5754. }
  5755. static void iwl_mac_stop(struct ieee80211_hw *hw)
  5756. {
  5757. struct iwl_priv *priv = hw->priv;
  5758. IWL_DEBUG_MAC80211("enter\n");
  5759. priv->is_open = 0;
  5760. /*netif_stop_queue(dev); */
  5761. flush_workqueue(priv->workqueue);
  5762. IWL_DEBUG_MAC80211("leave\n");
  5763. }
  5764. static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  5765. struct ieee80211_tx_control *ctl)
  5766. {
  5767. struct iwl_priv *priv = hw->priv;
  5768. IWL_DEBUG_MAC80211("enter\n");
  5769. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  5770. IWL_DEBUG_MAC80211("leave - monitor\n");
  5771. return -1;
  5772. }
  5773. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  5774. ctl->tx_rate);
  5775. if (iwl_tx_skb(priv, skb, ctl))
  5776. dev_kfree_skb_any(skb);
  5777. IWL_DEBUG_MAC80211("leave\n");
  5778. return 0;
  5779. }
  5780. static int iwl_mac_add_interface(struct ieee80211_hw *hw,
  5781. struct ieee80211_if_init_conf *conf)
  5782. {
  5783. struct iwl_priv *priv = hw->priv;
  5784. unsigned long flags;
  5785. DECLARE_MAC_BUF(mac);
  5786. IWL_DEBUG_MAC80211("enter: id %d, type %d\n", conf->if_id, conf->type);
  5787. if (conf->mac_addr)
  5788. IWL_DEBUG_MAC80211("enter: MAC %s\n",
  5789. print_mac(mac, conf->mac_addr));
  5790. if (priv->interface_id) {
  5791. IWL_DEBUG_MAC80211("leave - interface_id != 0\n");
  5792. return 0;
  5793. }
  5794. spin_lock_irqsave(&priv->lock, flags);
  5795. priv->interface_id = conf->if_id;
  5796. spin_unlock_irqrestore(&priv->lock, flags);
  5797. mutex_lock(&priv->mutex);
  5798. iwl_set_mode(priv, conf->type);
  5799. IWL_DEBUG_MAC80211("leave\n");
  5800. mutex_unlock(&priv->mutex);
  5801. return 0;
  5802. }
  5803. /**
  5804. * iwl_mac_config - mac80211 config callback
  5805. *
  5806. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  5807. * be set inappropriately and the driver currently sets the hardware up to
  5808. * use it whenever needed.
  5809. */
  5810. static int iwl_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  5811. {
  5812. struct iwl_priv *priv = hw->priv;
  5813. const struct iwl_channel_info *ch_info;
  5814. unsigned long flags;
  5815. mutex_lock(&priv->mutex);
  5816. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
  5817. if (!iwl_is_ready(priv)) {
  5818. IWL_DEBUG_MAC80211("leave - not ready\n");
  5819. mutex_unlock(&priv->mutex);
  5820. return -EIO;
  5821. }
  5822. /* TODO: Figure out how to get ieee80211_local->sta_scanning w/ only
  5823. * what is exposed through include/ declrations */
  5824. if (unlikely(!iwl_param_disable_hw_scan &&
  5825. test_bit(STATUS_SCANNING, &priv->status))) {
  5826. IWL_DEBUG_MAC80211("leave - scanning\n");
  5827. mutex_unlock(&priv->mutex);
  5828. return 0;
  5829. }
  5830. spin_lock_irqsave(&priv->lock, flags);
  5831. ch_info = iwl_get_channel_info(priv, conf->phymode, conf->channel);
  5832. if (!is_channel_valid(ch_info)) {
  5833. IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
  5834. conf->channel, conf->phymode);
  5835. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  5836. spin_unlock_irqrestore(&priv->lock, flags);
  5837. mutex_unlock(&priv->mutex);
  5838. return -EINVAL;
  5839. }
  5840. iwl_set_rxon_channel(priv, conf->phymode, conf->channel);
  5841. iwl_set_flags_for_phymode(priv, conf->phymode);
  5842. /* The list of supported rates and rate mask can be different
  5843. * for each phymode; since the phymode may have changed, reset
  5844. * the rate mask to what mac80211 lists */
  5845. iwl_set_rate(priv);
  5846. spin_unlock_irqrestore(&priv->lock, flags);
  5847. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  5848. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  5849. iwl_hw_channel_switch(priv, conf->channel);
  5850. mutex_unlock(&priv->mutex);
  5851. return 0;
  5852. }
  5853. #endif
  5854. iwl_radio_kill_sw(priv, !conf->radio_enabled);
  5855. if (!conf->radio_enabled) {
  5856. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  5857. mutex_unlock(&priv->mutex);
  5858. return 0;
  5859. }
  5860. if (iwl_is_rfkill(priv)) {
  5861. IWL_DEBUG_MAC80211("leave - RF kill\n");
  5862. mutex_unlock(&priv->mutex);
  5863. return -EIO;
  5864. }
  5865. iwl_set_rate(priv);
  5866. if (memcmp(&priv->active_rxon,
  5867. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  5868. iwl_commit_rxon(priv);
  5869. else
  5870. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  5871. IWL_DEBUG_MAC80211("leave\n");
  5872. mutex_unlock(&priv->mutex);
  5873. return 0;
  5874. }
  5875. static void iwl_config_ap(struct iwl_priv *priv)
  5876. {
  5877. int rc = 0;
  5878. if (priv->status & STATUS_EXIT_PENDING)
  5879. return;
  5880. /* The following should be done only at AP bring up */
  5881. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  5882. /* RXON - unassoc (to set timing command) */
  5883. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5884. iwl_commit_rxon(priv);
  5885. /* RXON Timing */
  5886. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  5887. iwl_setup_rxon_timing(priv);
  5888. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5889. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5890. if (rc)
  5891. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5892. "Attempting to continue.\n");
  5893. /* FIXME: what should be the assoc_id for AP? */
  5894. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5895. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5896. priv->staging_rxon.flags |=
  5897. RXON_FLG_SHORT_PREAMBLE_MSK;
  5898. else
  5899. priv->staging_rxon.flags &=
  5900. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5901. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5902. if (priv->assoc_capability &
  5903. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5904. priv->staging_rxon.flags |=
  5905. RXON_FLG_SHORT_SLOT_MSK;
  5906. else
  5907. priv->staging_rxon.flags &=
  5908. ~RXON_FLG_SHORT_SLOT_MSK;
  5909. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5910. priv->staging_rxon.flags &=
  5911. ~RXON_FLG_SHORT_SLOT_MSK;
  5912. }
  5913. /* restore RXON assoc */
  5914. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5915. iwl_commit_rxon(priv);
  5916. iwl_rxon_add_station(priv, BROADCAST_ADDR, 0);
  5917. iwl_send_beacon_cmd(priv);
  5918. } else
  5919. iwl_send_beacon_cmd(priv);
  5920. /* FIXME - we need to add code here to detect a totally new
  5921. * configuration, reset the AP, unassoc, rxon timing, assoc,
  5922. * clear sta table, add BCAST sta... */
  5923. }
  5924. static int iwl_mac_config_interface(struct ieee80211_hw *hw, int if_id,
  5925. struct ieee80211_if_conf *conf)
  5926. {
  5927. struct iwl_priv *priv = hw->priv;
  5928. DECLARE_MAC_BUF(mac);
  5929. unsigned long flags;
  5930. int rc;
  5931. if (conf == NULL)
  5932. return -EIO;
  5933. /* XXX: this MUST use conf->mac_addr */
  5934. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  5935. (!conf->beacon || !conf->ssid_len)) {
  5936. IWL_DEBUG_MAC80211
  5937. ("Leaving in AP mode because HostAPD is not ready.\n");
  5938. return 0;
  5939. }
  5940. mutex_lock(&priv->mutex);
  5941. IWL_DEBUG_MAC80211("enter: interface id %d\n", if_id);
  5942. if (conf->bssid)
  5943. IWL_DEBUG_MAC80211("bssid: %s\n",
  5944. print_mac(mac, conf->bssid));
  5945. /*
  5946. * very dubious code was here; the probe filtering flag is never set:
  5947. *
  5948. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  5949. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  5950. */
  5951. if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
  5952. IWL_DEBUG_MAC80211("leave - scanning\n");
  5953. mutex_unlock(&priv->mutex);
  5954. return 0;
  5955. }
  5956. if (priv->interface_id != if_id) {
  5957. IWL_DEBUG_MAC80211("leave - interface_id != if_id\n");
  5958. mutex_unlock(&priv->mutex);
  5959. return 0;
  5960. }
  5961. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5962. if (!conf->bssid) {
  5963. conf->bssid = priv->mac_addr;
  5964. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  5965. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  5966. print_mac(mac, conf->bssid));
  5967. }
  5968. if (priv->ibss_beacon)
  5969. dev_kfree_skb(priv->ibss_beacon);
  5970. priv->ibss_beacon = conf->beacon;
  5971. }
  5972. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  5973. !is_multicast_ether_addr(conf->bssid)) {
  5974. /* If there is currently a HW scan going on in the background
  5975. * then we need to cancel it else the RXON below will fail. */
  5976. if (iwl_scan_cancel_timeout(priv, 100)) {
  5977. IWL_WARNING("Aborted scan still in progress "
  5978. "after 100ms\n");
  5979. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  5980. mutex_unlock(&priv->mutex);
  5981. return -EAGAIN;
  5982. }
  5983. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  5984. /* TODO: Audit driver for usage of these members and see
  5985. * if mac80211 deprecates them (priv->bssid looks like it
  5986. * shouldn't be there, but I haven't scanned the IBSS code
  5987. * to verify) - jpk */
  5988. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  5989. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  5990. iwl_config_ap(priv);
  5991. else {
  5992. priv->staging_rxon.filter_flags |=
  5993. RXON_FILTER_ASSOC_MSK;
  5994. rc = iwl_commit_rxon(priv);
  5995. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  5996. iwl_rxon_add_station(
  5997. priv, priv->active_rxon.bssid_addr, 1);
  5998. }
  5999. } else {
  6000. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6001. iwl_commit_rxon(priv);
  6002. }
  6003. spin_lock_irqsave(&priv->lock, flags);
  6004. if (!conf->ssid_len)
  6005. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6006. else
  6007. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  6008. priv->essid_len = conf->ssid_len;
  6009. spin_unlock_irqrestore(&priv->lock, flags);
  6010. IWL_DEBUG_MAC80211("leave\n");
  6011. mutex_unlock(&priv->mutex);
  6012. return 0;
  6013. }
  6014. static void iwl_configure_filter(struct ieee80211_hw *hw,
  6015. unsigned int changed_flags,
  6016. unsigned int *total_flags,
  6017. int mc_count, struct dev_addr_list *mc_list)
  6018. {
  6019. /*
  6020. * XXX: dummy
  6021. * see also iwl_connection_init_rx_config
  6022. */
  6023. *total_flags = 0;
  6024. }
  6025. static void iwl_mac_remove_interface(struct ieee80211_hw *hw,
  6026. struct ieee80211_if_init_conf *conf)
  6027. {
  6028. struct iwl_priv *priv = hw->priv;
  6029. IWL_DEBUG_MAC80211("enter\n");
  6030. mutex_lock(&priv->mutex);
  6031. if (priv->interface_id == conf->if_id) {
  6032. priv->interface_id = 0;
  6033. memset(priv->bssid, 0, ETH_ALEN);
  6034. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6035. priv->essid_len = 0;
  6036. }
  6037. mutex_unlock(&priv->mutex);
  6038. IWL_DEBUG_MAC80211("leave\n");
  6039. }
  6040. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  6041. static int iwl_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  6042. {
  6043. int rc = 0;
  6044. unsigned long flags;
  6045. struct iwl_priv *priv = hw->priv;
  6046. IWL_DEBUG_MAC80211("enter\n");
  6047. spin_lock_irqsave(&priv->lock, flags);
  6048. if (!iwl_is_ready_rf(priv)) {
  6049. rc = -EIO;
  6050. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  6051. goto out_unlock;
  6052. }
  6053. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  6054. rc = -EIO;
  6055. IWL_ERROR("ERROR: APs don't scan\n");
  6056. goto out_unlock;
  6057. }
  6058. /* if we just finished scan ask for delay */
  6059. if (priv->last_scan_jiffies &&
  6060. time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
  6061. jiffies)) {
  6062. rc = -EAGAIN;
  6063. goto out_unlock;
  6064. }
  6065. if (len) {
  6066. IWL_DEBUG_SCAN("direct scan for "
  6067. "%s [%d]\n ",
  6068. iwl_escape_essid(ssid, len), (int)len);
  6069. priv->one_direct_scan = 1;
  6070. priv->direct_ssid_len = (u8)
  6071. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  6072. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  6073. }
  6074. rc = iwl_scan_initiate(priv);
  6075. IWL_DEBUG_MAC80211("leave\n");
  6076. out_unlock:
  6077. spin_unlock_irqrestore(&priv->lock, flags);
  6078. return rc;
  6079. }
  6080. static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  6081. const u8 *local_addr, const u8 *addr,
  6082. struct ieee80211_key_conf *key)
  6083. {
  6084. struct iwl_priv *priv = hw->priv;
  6085. int rc = 0;
  6086. u8 sta_id;
  6087. IWL_DEBUG_MAC80211("enter\n");
  6088. if (!iwl_param_hwcrypto) {
  6089. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  6090. return -EOPNOTSUPP;
  6091. }
  6092. if (is_zero_ether_addr(addr))
  6093. /* only support pairwise keys */
  6094. return -EOPNOTSUPP;
  6095. sta_id = iwl_hw_find_station(priv, addr);
  6096. if (sta_id == IWL_INVALID_STATION) {
  6097. DECLARE_MAC_BUF(mac);
  6098. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  6099. print_mac(mac, addr));
  6100. return -EINVAL;
  6101. }
  6102. mutex_lock(&priv->mutex);
  6103. switch (cmd) {
  6104. case SET_KEY:
  6105. rc = iwl_update_sta_key_info(priv, key, sta_id);
  6106. if (!rc) {
  6107. iwl_set_rxon_hwcrypto(priv, 1);
  6108. iwl_commit_rxon(priv);
  6109. key->hw_key_idx = sta_id;
  6110. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  6111. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  6112. }
  6113. break;
  6114. case DISABLE_KEY:
  6115. rc = iwl_clear_sta_key_info(priv, sta_id);
  6116. if (!rc) {
  6117. iwl_set_rxon_hwcrypto(priv, 0);
  6118. iwl_commit_rxon(priv);
  6119. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  6120. }
  6121. break;
  6122. default:
  6123. rc = -EINVAL;
  6124. }
  6125. IWL_DEBUG_MAC80211("leave\n");
  6126. mutex_unlock(&priv->mutex);
  6127. return rc;
  6128. }
  6129. static int iwl_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  6130. const struct ieee80211_tx_queue_params *params)
  6131. {
  6132. struct iwl_priv *priv = hw->priv;
  6133. #ifdef CONFIG_IWLWIFI_QOS
  6134. unsigned long flags;
  6135. int q;
  6136. #endif /* CONFIG_IWL_QOS */
  6137. IWL_DEBUG_MAC80211("enter\n");
  6138. if (!iwl_is_ready_rf(priv)) {
  6139. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6140. return -EIO;
  6141. }
  6142. if (queue >= AC_NUM) {
  6143. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  6144. return 0;
  6145. }
  6146. #ifdef CONFIG_IWLWIFI_QOS
  6147. if (!priv->qos_data.qos_enable) {
  6148. priv->qos_data.qos_active = 0;
  6149. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  6150. return 0;
  6151. }
  6152. q = AC_NUM - 1 - queue;
  6153. spin_lock_irqsave(&priv->lock, flags);
  6154. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  6155. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  6156. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  6157. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  6158. cpu_to_le16((params->burst_time * 100));
  6159. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  6160. priv->qos_data.qos_active = 1;
  6161. spin_unlock_irqrestore(&priv->lock, flags);
  6162. mutex_lock(&priv->mutex);
  6163. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6164. iwl_activate_qos(priv, 1);
  6165. else if (priv->assoc_id && iwl_is_associated(priv))
  6166. iwl_activate_qos(priv, 0);
  6167. mutex_unlock(&priv->mutex);
  6168. #endif /*CONFIG_IWLWIFI_QOS */
  6169. IWL_DEBUG_MAC80211("leave\n");
  6170. return 0;
  6171. }
  6172. static int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
  6173. struct ieee80211_tx_queue_stats *stats)
  6174. {
  6175. struct iwl_priv *priv = hw->priv;
  6176. int i, avail;
  6177. struct iwl_tx_queue *txq;
  6178. struct iwl_queue *q;
  6179. unsigned long flags;
  6180. IWL_DEBUG_MAC80211("enter\n");
  6181. if (!iwl_is_ready_rf(priv)) {
  6182. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6183. return -EIO;
  6184. }
  6185. spin_lock_irqsave(&priv->lock, flags);
  6186. for (i = 0; i < AC_NUM; i++) {
  6187. txq = &priv->txq[i];
  6188. q = &txq->q;
  6189. avail = iwl_queue_space(q);
  6190. stats->data[i].len = q->n_window - avail;
  6191. stats->data[i].limit = q->n_window - q->high_mark;
  6192. stats->data[i].count = q->n_window;
  6193. }
  6194. spin_unlock_irqrestore(&priv->lock, flags);
  6195. IWL_DEBUG_MAC80211("leave\n");
  6196. return 0;
  6197. }
  6198. static int iwl_mac_get_stats(struct ieee80211_hw *hw,
  6199. struct ieee80211_low_level_stats *stats)
  6200. {
  6201. IWL_DEBUG_MAC80211("enter\n");
  6202. IWL_DEBUG_MAC80211("leave\n");
  6203. return 0;
  6204. }
  6205. static u64 iwl_mac_get_tsf(struct ieee80211_hw *hw)
  6206. {
  6207. IWL_DEBUG_MAC80211("enter\n");
  6208. IWL_DEBUG_MAC80211("leave\n");
  6209. return 0;
  6210. }
  6211. static void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
  6212. {
  6213. struct iwl_priv *priv = hw->priv;
  6214. unsigned long flags;
  6215. mutex_lock(&priv->mutex);
  6216. IWL_DEBUG_MAC80211("enter\n");
  6217. #ifdef CONFIG_IWLWIFI_QOS
  6218. iwl_reset_qos(priv);
  6219. #endif
  6220. cancel_delayed_work(&priv->post_associate);
  6221. spin_lock_irqsave(&priv->lock, flags);
  6222. priv->assoc_id = 0;
  6223. priv->assoc_capability = 0;
  6224. priv->call_post_assoc_from_beacon = 0;
  6225. /* new association get rid of ibss beacon skb */
  6226. if (priv->ibss_beacon)
  6227. dev_kfree_skb(priv->ibss_beacon);
  6228. priv->ibss_beacon = NULL;
  6229. priv->beacon_int = priv->hw->conf.beacon_int;
  6230. priv->timestamp1 = 0;
  6231. priv->timestamp0 = 0;
  6232. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6233. priv->beacon_int = 0;
  6234. spin_unlock_irqrestore(&priv->lock, flags);
  6235. /* Per mac80211.h: This is only used in IBSS mode... */
  6236. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6237. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6238. mutex_unlock(&priv->mutex);
  6239. return;
  6240. }
  6241. if (!iwl_is_ready_rf(priv)) {
  6242. IWL_DEBUG_MAC80211("leave - not ready\n");
  6243. mutex_unlock(&priv->mutex);
  6244. return;
  6245. }
  6246. priv->only_active_channel = 0;
  6247. iwl_set_rate(priv);
  6248. mutex_unlock(&priv->mutex);
  6249. IWL_DEBUG_MAC80211("leave\n");
  6250. }
  6251. static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6252. struct ieee80211_tx_control *control)
  6253. {
  6254. struct iwl_priv *priv = hw->priv;
  6255. unsigned long flags;
  6256. mutex_lock(&priv->mutex);
  6257. IWL_DEBUG_MAC80211("enter\n");
  6258. if (!iwl_is_ready_rf(priv)) {
  6259. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6260. mutex_unlock(&priv->mutex);
  6261. return -EIO;
  6262. }
  6263. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6264. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6265. mutex_unlock(&priv->mutex);
  6266. return -EIO;
  6267. }
  6268. spin_lock_irqsave(&priv->lock, flags);
  6269. if (priv->ibss_beacon)
  6270. dev_kfree_skb(priv->ibss_beacon);
  6271. priv->ibss_beacon = skb;
  6272. priv->assoc_id = 0;
  6273. IWL_DEBUG_MAC80211("leave\n");
  6274. spin_unlock_irqrestore(&priv->lock, flags);
  6275. #ifdef CONFIG_IWLWIFI_QOS
  6276. iwl_reset_qos(priv);
  6277. #endif
  6278. queue_work(priv->workqueue, &priv->post_associate.work);
  6279. mutex_unlock(&priv->mutex);
  6280. return 0;
  6281. }
  6282. /*****************************************************************************
  6283. *
  6284. * sysfs attributes
  6285. *
  6286. *****************************************************************************/
  6287. #ifdef CONFIG_IWLWIFI_DEBUG
  6288. /*
  6289. * The following adds a new attribute to the sysfs representation
  6290. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6291. * used for controlling the debug level.
  6292. *
  6293. * See the level definitions in iwl for details.
  6294. */
  6295. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6296. {
  6297. return sprintf(buf, "0x%08X\n", iwl_debug_level);
  6298. }
  6299. static ssize_t store_debug_level(struct device_driver *d,
  6300. const char *buf, size_t count)
  6301. {
  6302. char *p = (char *)buf;
  6303. u32 val;
  6304. val = simple_strtoul(p, &p, 0);
  6305. if (p == buf)
  6306. printk(KERN_INFO DRV_NAME
  6307. ": %s is not in hex or decimal form.\n", buf);
  6308. else
  6309. iwl_debug_level = val;
  6310. return strnlen(buf, count);
  6311. }
  6312. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6313. show_debug_level, store_debug_level);
  6314. #endif /* CONFIG_IWLWIFI_DEBUG */
  6315. static ssize_t show_rf_kill(struct device *d,
  6316. struct device_attribute *attr, char *buf)
  6317. {
  6318. /*
  6319. * 0 - RF kill not enabled
  6320. * 1 - SW based RF kill active (sysfs)
  6321. * 2 - HW based RF kill active
  6322. * 3 - Both HW and SW based RF kill active
  6323. */
  6324. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6325. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  6326. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  6327. return sprintf(buf, "%i\n", val);
  6328. }
  6329. static ssize_t store_rf_kill(struct device *d,
  6330. struct device_attribute *attr,
  6331. const char *buf, size_t count)
  6332. {
  6333. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6334. mutex_lock(&priv->mutex);
  6335. iwl_radio_kill_sw(priv, buf[0] == '1');
  6336. mutex_unlock(&priv->mutex);
  6337. return count;
  6338. }
  6339. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  6340. static ssize_t show_temperature(struct device *d,
  6341. struct device_attribute *attr, char *buf)
  6342. {
  6343. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6344. if (!iwl_is_alive(priv))
  6345. return -EAGAIN;
  6346. return sprintf(buf, "%d\n", iwl_hw_get_temperature(priv));
  6347. }
  6348. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6349. static ssize_t show_rs_window(struct device *d,
  6350. struct device_attribute *attr,
  6351. char *buf)
  6352. {
  6353. struct iwl_priv *priv = d->driver_data;
  6354. return iwl_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6355. }
  6356. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6357. static ssize_t show_tx_power(struct device *d,
  6358. struct device_attribute *attr, char *buf)
  6359. {
  6360. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6361. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6362. }
  6363. static ssize_t store_tx_power(struct device *d,
  6364. struct device_attribute *attr,
  6365. const char *buf, size_t count)
  6366. {
  6367. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6368. char *p = (char *)buf;
  6369. u32 val;
  6370. val = simple_strtoul(p, &p, 10);
  6371. if (p == buf)
  6372. printk(KERN_INFO DRV_NAME
  6373. ": %s is not in decimal form.\n", buf);
  6374. else
  6375. iwl_hw_reg_set_txpower(priv, val);
  6376. return count;
  6377. }
  6378. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6379. static ssize_t show_flags(struct device *d,
  6380. struct device_attribute *attr, char *buf)
  6381. {
  6382. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6383. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6384. }
  6385. static ssize_t store_flags(struct device *d,
  6386. struct device_attribute *attr,
  6387. const char *buf, size_t count)
  6388. {
  6389. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6390. u32 flags = simple_strtoul(buf, NULL, 0);
  6391. mutex_lock(&priv->mutex);
  6392. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6393. /* Cancel any currently running scans... */
  6394. if (iwl_scan_cancel_timeout(priv, 100))
  6395. IWL_WARNING("Could not cancel scan.\n");
  6396. else {
  6397. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6398. flags);
  6399. priv->staging_rxon.flags = cpu_to_le32(flags);
  6400. iwl_commit_rxon(priv);
  6401. }
  6402. }
  6403. mutex_unlock(&priv->mutex);
  6404. return count;
  6405. }
  6406. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6407. static ssize_t show_filter_flags(struct device *d,
  6408. struct device_attribute *attr, char *buf)
  6409. {
  6410. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6411. return sprintf(buf, "0x%04X\n",
  6412. le32_to_cpu(priv->active_rxon.filter_flags));
  6413. }
  6414. static ssize_t store_filter_flags(struct device *d,
  6415. struct device_attribute *attr,
  6416. const char *buf, size_t count)
  6417. {
  6418. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6419. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6420. mutex_lock(&priv->mutex);
  6421. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6422. /* Cancel any currently running scans... */
  6423. if (iwl_scan_cancel_timeout(priv, 100))
  6424. IWL_WARNING("Could not cancel scan.\n");
  6425. else {
  6426. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6427. "0x%04X\n", filter_flags);
  6428. priv->staging_rxon.filter_flags =
  6429. cpu_to_le32(filter_flags);
  6430. iwl_commit_rxon(priv);
  6431. }
  6432. }
  6433. mutex_unlock(&priv->mutex);
  6434. return count;
  6435. }
  6436. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  6437. store_filter_flags);
  6438. static ssize_t show_tune(struct device *d,
  6439. struct device_attribute *attr, char *buf)
  6440. {
  6441. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6442. return sprintf(buf, "0x%04X\n",
  6443. (priv->phymode << 8) |
  6444. le16_to_cpu(priv->active_rxon.channel));
  6445. }
  6446. static void iwl_set_flags_for_phymode(struct iwl_priv *priv, u8 phymode);
  6447. static ssize_t store_tune(struct device *d,
  6448. struct device_attribute *attr,
  6449. const char *buf, size_t count)
  6450. {
  6451. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6452. char *p = (char *)buf;
  6453. u16 tune = simple_strtoul(p, &p, 0);
  6454. u8 phymode = (tune >> 8) & 0xff;
  6455. u16 channel = tune & 0xff;
  6456. IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
  6457. mutex_lock(&priv->mutex);
  6458. if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
  6459. (priv->phymode != phymode)) {
  6460. const struct iwl_channel_info *ch_info;
  6461. ch_info = iwl_get_channel_info(priv, phymode, channel);
  6462. if (!ch_info) {
  6463. IWL_WARNING("Requested invalid phymode/channel "
  6464. "combination: %d %d\n", phymode, channel);
  6465. mutex_unlock(&priv->mutex);
  6466. return -EINVAL;
  6467. }
  6468. /* Cancel any currently running scans... */
  6469. if (iwl_scan_cancel_timeout(priv, 100))
  6470. IWL_WARNING("Could not cancel scan.\n");
  6471. else {
  6472. IWL_DEBUG_INFO("Committing phymode and "
  6473. "rxon.channel = %d %d\n",
  6474. phymode, channel);
  6475. iwl_set_rxon_channel(priv, phymode, channel);
  6476. iwl_set_flags_for_phymode(priv, phymode);
  6477. iwl_set_rate(priv);
  6478. iwl_commit_rxon(priv);
  6479. }
  6480. }
  6481. mutex_unlock(&priv->mutex);
  6482. return count;
  6483. }
  6484. static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
  6485. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  6486. static ssize_t show_measurement(struct device *d,
  6487. struct device_attribute *attr, char *buf)
  6488. {
  6489. struct iwl_priv *priv = dev_get_drvdata(d);
  6490. struct iwl_spectrum_notification measure_report;
  6491. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  6492. u8 *data = (u8 *) & measure_report;
  6493. unsigned long flags;
  6494. spin_lock_irqsave(&priv->lock, flags);
  6495. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  6496. spin_unlock_irqrestore(&priv->lock, flags);
  6497. return 0;
  6498. }
  6499. memcpy(&measure_report, &priv->measure_report, size);
  6500. priv->measurement_status = 0;
  6501. spin_unlock_irqrestore(&priv->lock, flags);
  6502. while (size && (PAGE_SIZE - len)) {
  6503. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6504. PAGE_SIZE - len, 1);
  6505. len = strlen(buf);
  6506. if (PAGE_SIZE - len)
  6507. buf[len++] = '\n';
  6508. ofs += 16;
  6509. size -= min(size, 16U);
  6510. }
  6511. return len;
  6512. }
  6513. static ssize_t store_measurement(struct device *d,
  6514. struct device_attribute *attr,
  6515. const char *buf, size_t count)
  6516. {
  6517. struct iwl_priv *priv = dev_get_drvdata(d);
  6518. struct ieee80211_measurement_params params = {
  6519. .channel = le16_to_cpu(priv->active_rxon.channel),
  6520. .start_time = cpu_to_le64(priv->last_tsf),
  6521. .duration = cpu_to_le16(1),
  6522. };
  6523. u8 type = IWL_MEASURE_BASIC;
  6524. u8 buffer[32];
  6525. u8 channel;
  6526. if (count) {
  6527. char *p = buffer;
  6528. strncpy(buffer, buf, min(sizeof(buffer), count));
  6529. channel = simple_strtoul(p, NULL, 0);
  6530. if (channel)
  6531. params.channel = channel;
  6532. p = buffer;
  6533. while (*p && *p != ' ')
  6534. p++;
  6535. if (*p)
  6536. type = simple_strtoul(p + 1, NULL, 0);
  6537. }
  6538. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  6539. "channel %d (for '%s')\n", type, params.channel, buf);
  6540. iwl_get_measurement(priv, &params, type);
  6541. return count;
  6542. }
  6543. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  6544. show_measurement, store_measurement);
  6545. #endif /* CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT */
  6546. static ssize_t show_rate(struct device *d,
  6547. struct device_attribute *attr, char *buf)
  6548. {
  6549. struct iwl_priv *priv = dev_get_drvdata(d);
  6550. unsigned long flags;
  6551. int i;
  6552. spin_lock_irqsave(&priv->sta_lock, flags);
  6553. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  6554. i = priv->stations[IWL_AP_ID].current_rate.s.rate;
  6555. else
  6556. i = priv->stations[IWL_STA_ID].current_rate.s.rate;
  6557. spin_unlock_irqrestore(&priv->sta_lock, flags);
  6558. i = iwl_rate_index_from_plcp(i);
  6559. if (i == -1)
  6560. return sprintf(buf, "0\n");
  6561. return sprintf(buf, "%d%s\n",
  6562. (iwl_rates[i].ieee >> 1),
  6563. (iwl_rates[i].ieee & 0x1) ? ".5" : "");
  6564. }
  6565. static DEVICE_ATTR(rate, S_IRUSR, show_rate, NULL);
  6566. static ssize_t store_retry_rate(struct device *d,
  6567. struct device_attribute *attr,
  6568. const char *buf, size_t count)
  6569. {
  6570. struct iwl_priv *priv = dev_get_drvdata(d);
  6571. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  6572. if (priv->retry_rate <= 0)
  6573. priv->retry_rate = 1;
  6574. return count;
  6575. }
  6576. static ssize_t show_retry_rate(struct device *d,
  6577. struct device_attribute *attr, char *buf)
  6578. {
  6579. struct iwl_priv *priv = dev_get_drvdata(d);
  6580. return sprintf(buf, "%d", priv->retry_rate);
  6581. }
  6582. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  6583. store_retry_rate);
  6584. static ssize_t store_power_level(struct device *d,
  6585. struct device_attribute *attr,
  6586. const char *buf, size_t count)
  6587. {
  6588. struct iwl_priv *priv = dev_get_drvdata(d);
  6589. int rc;
  6590. int mode;
  6591. mode = simple_strtoul(buf, NULL, 0);
  6592. mutex_lock(&priv->mutex);
  6593. if (!iwl_is_ready(priv)) {
  6594. rc = -EAGAIN;
  6595. goto out;
  6596. }
  6597. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  6598. mode = IWL_POWER_AC;
  6599. else
  6600. mode |= IWL_POWER_ENABLED;
  6601. if (mode != priv->power_mode) {
  6602. rc = iwl_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  6603. if (rc) {
  6604. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  6605. goto out;
  6606. }
  6607. priv->power_mode = mode;
  6608. }
  6609. rc = count;
  6610. out:
  6611. mutex_unlock(&priv->mutex);
  6612. return rc;
  6613. }
  6614. #define MAX_WX_STRING 80
  6615. /* Values are in microsecond */
  6616. static const s32 timeout_duration[] = {
  6617. 350000,
  6618. 250000,
  6619. 75000,
  6620. 37000,
  6621. 25000,
  6622. };
  6623. static const s32 period_duration[] = {
  6624. 400000,
  6625. 700000,
  6626. 1000000,
  6627. 1000000,
  6628. 1000000
  6629. };
  6630. static ssize_t show_power_level(struct device *d,
  6631. struct device_attribute *attr, char *buf)
  6632. {
  6633. struct iwl_priv *priv = dev_get_drvdata(d);
  6634. int level = IWL_POWER_LEVEL(priv->power_mode);
  6635. char *p = buf;
  6636. p += sprintf(p, "%d ", level);
  6637. switch (level) {
  6638. case IWL_POWER_MODE_CAM:
  6639. case IWL_POWER_AC:
  6640. p += sprintf(p, "(AC)");
  6641. break;
  6642. case IWL_POWER_BATTERY:
  6643. p += sprintf(p, "(BATTERY)");
  6644. break;
  6645. default:
  6646. p += sprintf(p,
  6647. "(Timeout %dms, Period %dms)",
  6648. timeout_duration[level - 1] / 1000,
  6649. period_duration[level - 1] / 1000);
  6650. }
  6651. if (!(priv->power_mode & IWL_POWER_ENABLED))
  6652. p += sprintf(p, " OFF\n");
  6653. else
  6654. p += sprintf(p, " \n");
  6655. return (p - buf + 1);
  6656. }
  6657. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  6658. store_power_level);
  6659. static ssize_t show_channels(struct device *d,
  6660. struct device_attribute *attr, char *buf)
  6661. {
  6662. struct iwl_priv *priv = dev_get_drvdata(d);
  6663. int len = 0, i;
  6664. struct ieee80211_channel *channels = NULL;
  6665. const struct ieee80211_hw_mode *hw_mode = NULL;
  6666. int count = 0;
  6667. if (!iwl_is_ready(priv))
  6668. return -EAGAIN;
  6669. hw_mode = iwl_get_hw_mode(priv, MODE_IEEE80211G);
  6670. if (!hw_mode)
  6671. hw_mode = iwl_get_hw_mode(priv, MODE_IEEE80211B);
  6672. if (hw_mode) {
  6673. channels = hw_mode->channels;
  6674. count = hw_mode->num_channels;
  6675. }
  6676. len +=
  6677. sprintf(&buf[len],
  6678. "Displaying %d channels in 2.4GHz band "
  6679. "(802.11bg):\n", count);
  6680. for (i = 0; i < count; i++)
  6681. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  6682. channels[i].chan,
  6683. channels[i].power_level,
  6684. channels[i].
  6685. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  6686. " (IEEE 802.11h required)" : "",
  6687. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  6688. || (channels[i].
  6689. flag &
  6690. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  6691. ", IBSS",
  6692. channels[i].
  6693. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  6694. "active/passive" : "passive only");
  6695. hw_mode = iwl_get_hw_mode(priv, MODE_IEEE80211A);
  6696. if (hw_mode) {
  6697. channels = hw_mode->channels;
  6698. count = hw_mode->num_channels;
  6699. } else {
  6700. channels = NULL;
  6701. count = 0;
  6702. }
  6703. len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
  6704. "(802.11a):\n", count);
  6705. for (i = 0; i < count; i++)
  6706. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  6707. channels[i].chan,
  6708. channels[i].power_level,
  6709. channels[i].
  6710. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  6711. " (IEEE 802.11h required)" : "",
  6712. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  6713. || (channels[i].
  6714. flag &
  6715. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  6716. ", IBSS",
  6717. channels[i].
  6718. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  6719. "active/passive" : "passive only");
  6720. return len;
  6721. }
  6722. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  6723. static ssize_t show_statistics(struct device *d,
  6724. struct device_attribute *attr, char *buf)
  6725. {
  6726. struct iwl_priv *priv = dev_get_drvdata(d);
  6727. u32 size = sizeof(struct iwl_notif_statistics);
  6728. u32 len = 0, ofs = 0;
  6729. u8 *data = (u8 *) & priv->statistics;
  6730. int rc = 0;
  6731. if (!iwl_is_alive(priv))
  6732. return -EAGAIN;
  6733. mutex_lock(&priv->mutex);
  6734. rc = iwl_send_statistics_request(priv);
  6735. mutex_unlock(&priv->mutex);
  6736. if (rc) {
  6737. len = sprintf(buf,
  6738. "Error sending statistics request: 0x%08X\n", rc);
  6739. return len;
  6740. }
  6741. while (size && (PAGE_SIZE - len)) {
  6742. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6743. PAGE_SIZE - len, 1);
  6744. len = strlen(buf);
  6745. if (PAGE_SIZE - len)
  6746. buf[len++] = '\n';
  6747. ofs += 16;
  6748. size -= min(size, 16U);
  6749. }
  6750. return len;
  6751. }
  6752. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  6753. static ssize_t show_antenna(struct device *d,
  6754. struct device_attribute *attr, char *buf)
  6755. {
  6756. struct iwl_priv *priv = dev_get_drvdata(d);
  6757. if (!iwl_is_alive(priv))
  6758. return -EAGAIN;
  6759. return sprintf(buf, "%d\n", priv->antenna);
  6760. }
  6761. static ssize_t store_antenna(struct device *d,
  6762. struct device_attribute *attr,
  6763. const char *buf, size_t count)
  6764. {
  6765. int ant;
  6766. struct iwl_priv *priv = dev_get_drvdata(d);
  6767. if (count == 0)
  6768. return 0;
  6769. if (sscanf(buf, "%1i", &ant) != 1) {
  6770. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  6771. return count;
  6772. }
  6773. if ((ant >= 0) && (ant <= 2)) {
  6774. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  6775. priv->antenna = (enum iwl_antenna)ant;
  6776. } else
  6777. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  6778. return count;
  6779. }
  6780. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  6781. static ssize_t show_status(struct device *d,
  6782. struct device_attribute *attr, char *buf)
  6783. {
  6784. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6785. if (!iwl_is_alive(priv))
  6786. return -EAGAIN;
  6787. return sprintf(buf, "0x%08x\n", (int)priv->status);
  6788. }
  6789. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  6790. static ssize_t dump_error_log(struct device *d,
  6791. struct device_attribute *attr,
  6792. const char *buf, size_t count)
  6793. {
  6794. char *p = (char *)buf;
  6795. if (p[0] == '1')
  6796. iwl_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  6797. return strnlen(buf, count);
  6798. }
  6799. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  6800. static ssize_t dump_event_log(struct device *d,
  6801. struct device_attribute *attr,
  6802. const char *buf, size_t count)
  6803. {
  6804. char *p = (char *)buf;
  6805. if (p[0] == '1')
  6806. iwl_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  6807. return strnlen(buf, count);
  6808. }
  6809. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  6810. /*****************************************************************************
  6811. *
  6812. * driver setup and teardown
  6813. *
  6814. *****************************************************************************/
  6815. static void iwl_setup_deferred_work(struct iwl_priv *priv)
  6816. {
  6817. priv->workqueue = create_workqueue(DRV_NAME);
  6818. init_waitqueue_head(&priv->wait_command_queue);
  6819. INIT_WORK(&priv->up, iwl_bg_up);
  6820. INIT_WORK(&priv->restart, iwl_bg_restart);
  6821. INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
  6822. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  6823. INIT_WORK(&priv->request_scan, iwl_bg_request_scan);
  6824. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  6825. INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
  6826. INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
  6827. INIT_DELAYED_WORK(&priv->post_associate, iwl_bg_post_associate);
  6828. INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
  6829. INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
  6830. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  6831. iwl_hw_setup_deferred_work(priv);
  6832. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  6833. iwl_irq_tasklet, (unsigned long)priv);
  6834. }
  6835. static void iwl_cancel_deferred_work(struct iwl_priv *priv)
  6836. {
  6837. iwl_hw_cancel_deferred_work(priv);
  6838. cancel_delayed_work(&priv->scan_check);
  6839. cancel_delayed_work(&priv->alive_start);
  6840. cancel_delayed_work(&priv->post_associate);
  6841. cancel_work_sync(&priv->beacon_update);
  6842. }
  6843. static struct attribute *iwl_sysfs_entries[] = {
  6844. &dev_attr_antenna.attr,
  6845. &dev_attr_channels.attr,
  6846. &dev_attr_dump_errors.attr,
  6847. &dev_attr_dump_events.attr,
  6848. &dev_attr_flags.attr,
  6849. &dev_attr_filter_flags.attr,
  6850. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  6851. &dev_attr_measurement.attr,
  6852. #endif
  6853. &dev_attr_power_level.attr,
  6854. &dev_attr_rate.attr,
  6855. &dev_attr_retry_rate.attr,
  6856. &dev_attr_rf_kill.attr,
  6857. &dev_attr_rs_window.attr,
  6858. &dev_attr_statistics.attr,
  6859. &dev_attr_status.attr,
  6860. &dev_attr_temperature.attr,
  6861. &dev_attr_tune.attr,
  6862. &dev_attr_tx_power.attr,
  6863. NULL
  6864. };
  6865. static struct attribute_group iwl_attribute_group = {
  6866. .name = NULL, /* put in device directory */
  6867. .attrs = iwl_sysfs_entries,
  6868. };
  6869. static struct ieee80211_ops iwl_hw_ops = {
  6870. .tx = iwl_mac_tx,
  6871. .start = iwl_mac_start,
  6872. .stop = iwl_mac_stop,
  6873. .add_interface = iwl_mac_add_interface,
  6874. .remove_interface = iwl_mac_remove_interface,
  6875. .config = iwl_mac_config,
  6876. .config_interface = iwl_mac_config_interface,
  6877. .configure_filter = iwl_configure_filter,
  6878. .set_key = iwl_mac_set_key,
  6879. .get_stats = iwl_mac_get_stats,
  6880. .get_tx_stats = iwl_mac_get_tx_stats,
  6881. .conf_tx = iwl_mac_conf_tx,
  6882. .get_tsf = iwl_mac_get_tsf,
  6883. .reset_tsf = iwl_mac_reset_tsf,
  6884. .beacon_update = iwl_mac_beacon_update,
  6885. .hw_scan = iwl_mac_hw_scan
  6886. };
  6887. static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  6888. {
  6889. int err = 0;
  6890. u32 pci_id;
  6891. struct iwl_priv *priv;
  6892. struct ieee80211_hw *hw;
  6893. int i;
  6894. if (iwl_param_disable_hw_scan) {
  6895. IWL_DEBUG_INFO("Disabling hw_scan\n");
  6896. iwl_hw_ops.hw_scan = NULL;
  6897. }
  6898. if ((iwl_param_queues_num > IWL_MAX_NUM_QUEUES) ||
  6899. (iwl_param_queues_num < IWL_MIN_NUM_QUEUES)) {
  6900. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  6901. IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
  6902. err = -EINVAL;
  6903. goto out;
  6904. }
  6905. /* mac80211 allocates memory for this device instance, including
  6906. * space for this driver's private structure */
  6907. hw = ieee80211_alloc_hw(sizeof(struct iwl_priv), &iwl_hw_ops);
  6908. if (hw == NULL) {
  6909. IWL_ERROR("Can not allocate network device\n");
  6910. err = -ENOMEM;
  6911. goto out;
  6912. }
  6913. SET_IEEE80211_DEV(hw, &pdev->dev);
  6914. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  6915. priv = hw->priv;
  6916. priv->hw = hw;
  6917. priv->pci_dev = pdev;
  6918. priv->antenna = (enum iwl_antenna)iwl_param_antenna;
  6919. #ifdef CONFIG_IWLWIFI_DEBUG
  6920. iwl_debug_level = iwl_param_debug;
  6921. atomic_set(&priv->restrict_refcnt, 0);
  6922. #endif
  6923. priv->retry_rate = 1;
  6924. priv->ibss_beacon = NULL;
  6925. /* Tell mac80211 and its clients (e.g. Wireless Extensions)
  6926. * the range of signal quality values that we'll provide.
  6927. * Negative values for level/noise indicate that we'll provide dBm.
  6928. * For WE, at least, non-0 values here *enable* display of values
  6929. * in app (iwconfig). */
  6930. hw->max_rssi = -20; /* signal level, negative indicates dBm */
  6931. hw->max_noise = -20; /* noise level, negative indicates dBm */
  6932. hw->max_signal = 100; /* link quality indication (%) */
  6933. /* Tell mac80211 our Tx characteristics */
  6934. hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
  6935. hw->queues = 4;
  6936. spin_lock_init(&priv->lock);
  6937. spin_lock_init(&priv->power_data.lock);
  6938. spin_lock_init(&priv->sta_lock);
  6939. spin_lock_init(&priv->hcmd_lock);
  6940. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
  6941. INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
  6942. INIT_LIST_HEAD(&priv->free_frames);
  6943. mutex_init(&priv->mutex);
  6944. if (pci_enable_device(pdev)) {
  6945. err = -ENODEV;
  6946. goto out_ieee80211_free_hw;
  6947. }
  6948. pci_set_master(pdev);
  6949. iwl_clear_stations_table(priv);
  6950. priv->data_retry_limit = -1;
  6951. priv->ieee_channels = NULL;
  6952. priv->ieee_rates = NULL;
  6953. priv->phymode = -1;
  6954. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  6955. if (!err)
  6956. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  6957. if (err) {
  6958. printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
  6959. goto out_pci_disable_device;
  6960. }
  6961. pci_set_drvdata(pdev, priv);
  6962. err = pci_request_regions(pdev, DRV_NAME);
  6963. if (err)
  6964. goto out_pci_disable_device;
  6965. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  6966. * PCI Tx retries from interfering with C3 CPU state */
  6967. pci_write_config_byte(pdev, 0x41, 0x00);
  6968. priv->hw_base = pci_iomap(pdev, 0, 0);
  6969. if (!priv->hw_base) {
  6970. err = -ENODEV;
  6971. goto out_pci_release_regions;
  6972. }
  6973. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  6974. (unsigned long long) pci_resource_len(pdev, 0));
  6975. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  6976. /* Initialize module parameter values here */
  6977. if (iwl_param_disable) {
  6978. set_bit(STATUS_RF_KILL_SW, &priv->status);
  6979. IWL_DEBUG_INFO("Radio disabled.\n");
  6980. }
  6981. priv->iw_mode = IEEE80211_IF_TYPE_STA;
  6982. pci_id =
  6983. (priv->pci_dev->device << 16) | priv->pci_dev->subsystem_device;
  6984. switch (pci_id) {
  6985. case 0x42221005: /* 0x4222 0x8086 0x1005 is BG SKU */
  6986. case 0x42221034: /* 0x4222 0x8086 0x1034 is BG SKU */
  6987. case 0x42271014: /* 0x4227 0x8086 0x1014 is BG SKU */
  6988. case 0x42221044: /* 0x4222 0x8086 0x1044 is BG SKU */
  6989. priv->is_abg = 0;
  6990. break;
  6991. /*
  6992. * Rest are assumed ABG SKU -- if this is not the
  6993. * case then the card will get the wrong 'Detected'
  6994. * line in the kernel log however the code that
  6995. * initializes the GEO table will detect no A-band
  6996. * channels and remove the is_abg mask.
  6997. */
  6998. default:
  6999. priv->is_abg = 1;
  7000. break;
  7001. }
  7002. printk(KERN_INFO DRV_NAME
  7003. ": Detected Intel PRO/Wireless 3945%sBG Network Connection\n",
  7004. priv->is_abg ? "A" : "");
  7005. /* Device-specific setup */
  7006. if (iwl_hw_set_hw_setting(priv)) {
  7007. IWL_ERROR("failed to set hw settings\n");
  7008. mutex_unlock(&priv->mutex);
  7009. goto out_iounmap;
  7010. }
  7011. #ifdef CONFIG_IWLWIFI_QOS
  7012. if (iwl_param_qos_enable)
  7013. priv->qos_data.qos_enable = 1;
  7014. iwl_reset_qos(priv);
  7015. priv->qos_data.qos_active = 0;
  7016. priv->qos_data.qos_cap.val = 0;
  7017. #endif /* CONFIG_IWLWIFI_QOS */
  7018. iwl_set_rxon_channel(priv, MODE_IEEE80211G, 6);
  7019. iwl_setup_deferred_work(priv);
  7020. iwl_setup_rx_handlers(priv);
  7021. priv->rates_mask = IWL_RATES_MASK;
  7022. /* If power management is turned on, default to AC mode */
  7023. priv->power_mode = IWL_POWER_AC;
  7024. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  7025. pci_enable_msi(pdev);
  7026. err = request_irq(pdev->irq, iwl_isr, IRQF_SHARED, DRV_NAME, priv);
  7027. if (err) {
  7028. IWL_ERROR("Error allocating IRQ %d\n", pdev->irq);
  7029. goto out_disable_msi;
  7030. }
  7031. mutex_lock(&priv->mutex);
  7032. err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
  7033. if (err) {
  7034. IWL_ERROR("failed to create sysfs device attributes\n");
  7035. mutex_unlock(&priv->mutex);
  7036. goto out_release_irq;
  7037. }
  7038. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  7039. * ucode filename and max sizes are card-specific. */
  7040. err = iwl_read_ucode(priv);
  7041. if (err) {
  7042. IWL_ERROR("Could not read microcode: %d\n", err);
  7043. mutex_unlock(&priv->mutex);
  7044. goto out_pci_alloc;
  7045. }
  7046. mutex_unlock(&priv->mutex);
  7047. IWL_DEBUG_INFO("Queing UP work.\n");
  7048. queue_work(priv->workqueue, &priv->up);
  7049. return 0;
  7050. out_pci_alloc:
  7051. iwl_dealloc_ucode_pci(priv);
  7052. sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
  7053. out_release_irq:
  7054. free_irq(pdev->irq, priv);
  7055. out_disable_msi:
  7056. pci_disable_msi(pdev);
  7057. destroy_workqueue(priv->workqueue);
  7058. priv->workqueue = NULL;
  7059. iwl_unset_hw_setting(priv);
  7060. out_iounmap:
  7061. pci_iounmap(pdev, priv->hw_base);
  7062. out_pci_release_regions:
  7063. pci_release_regions(pdev);
  7064. out_pci_disable_device:
  7065. pci_disable_device(pdev);
  7066. pci_set_drvdata(pdev, NULL);
  7067. out_ieee80211_free_hw:
  7068. ieee80211_free_hw(priv->hw);
  7069. out:
  7070. return err;
  7071. }
  7072. static void iwl_pci_remove(struct pci_dev *pdev)
  7073. {
  7074. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7075. struct list_head *p, *q;
  7076. int i;
  7077. if (!priv)
  7078. return;
  7079. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  7080. mutex_lock(&priv->mutex);
  7081. set_bit(STATUS_EXIT_PENDING, &priv->status);
  7082. __iwl_down(priv);
  7083. mutex_unlock(&priv->mutex);
  7084. /* Free MAC hash list for ADHOC */
  7085. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  7086. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  7087. list_del(p);
  7088. kfree(list_entry(p, struct iwl_ibss_seq, list));
  7089. }
  7090. }
  7091. sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
  7092. iwl_dealloc_ucode_pci(priv);
  7093. if (priv->rxq.bd)
  7094. iwl_rx_queue_free(priv, &priv->rxq);
  7095. iwl_hw_txq_ctx_free(priv);
  7096. iwl_unset_hw_setting(priv);
  7097. iwl_clear_stations_table(priv);
  7098. if (priv->mac80211_registered) {
  7099. ieee80211_unregister_hw(priv->hw);
  7100. iwl_rate_control_unregister(priv->hw);
  7101. }
  7102. /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
  7103. * priv->workqueue... so we can't take down the workqueue
  7104. * until now... */
  7105. destroy_workqueue(priv->workqueue);
  7106. priv->workqueue = NULL;
  7107. free_irq(pdev->irq, priv);
  7108. pci_disable_msi(pdev);
  7109. pci_iounmap(pdev, priv->hw_base);
  7110. pci_release_regions(pdev);
  7111. pci_disable_device(pdev);
  7112. pci_set_drvdata(pdev, NULL);
  7113. kfree(priv->channel_info);
  7114. kfree(priv->ieee_channels);
  7115. kfree(priv->ieee_rates);
  7116. if (priv->ibss_beacon)
  7117. dev_kfree_skb(priv->ibss_beacon);
  7118. ieee80211_free_hw(priv->hw);
  7119. }
  7120. #ifdef CONFIG_PM
  7121. static int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  7122. {
  7123. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7124. mutex_lock(&priv->mutex);
  7125. set_bit(STATUS_IN_SUSPEND, &priv->status);
  7126. /* Take down the device; powers it off, etc. */
  7127. __iwl_down(priv);
  7128. if (priv->mac80211_registered)
  7129. ieee80211_stop_queues(priv->hw);
  7130. pci_save_state(pdev);
  7131. pci_disable_device(pdev);
  7132. pci_set_power_state(pdev, PCI_D3hot);
  7133. mutex_unlock(&priv->mutex);
  7134. return 0;
  7135. }
  7136. static void iwl_resume(struct iwl_priv *priv)
  7137. {
  7138. unsigned long flags;
  7139. /* The following it a temporary work around due to the
  7140. * suspend / resume not fully initializing the NIC correctly.
  7141. * Without all of the following, resume will not attempt to take
  7142. * down the NIC (it shouldn't really need to) and will just try
  7143. * and bring the NIC back up. However that fails during the
  7144. * ucode verification process. This then causes iwl_down to be
  7145. * called *after* iwl_hw_nic_init() has succeeded -- which
  7146. * then lets the next init sequence succeed. So, we've
  7147. * replicated all of that NIC init code here... */
  7148. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  7149. iwl_hw_nic_init(priv);
  7150. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7151. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  7152. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  7153. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  7154. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7155. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7156. /* tell the device to stop sending interrupts */
  7157. iwl_disable_interrupts(priv);
  7158. spin_lock_irqsave(&priv->lock, flags);
  7159. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  7160. if (!iwl_grab_restricted_access(priv)) {
  7161. iwl_write_restricted_reg(priv, APMG_CLK_DIS_REG,
  7162. APMG_CLK_VAL_DMA_CLK_RQT);
  7163. iwl_release_restricted_access(priv);
  7164. }
  7165. spin_unlock_irqrestore(&priv->lock, flags);
  7166. udelay(5);
  7167. iwl_hw_nic_reset(priv);
  7168. /* Bring the device back up */
  7169. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  7170. queue_work(priv->workqueue, &priv->up);
  7171. }
  7172. static int iwl_pci_resume(struct pci_dev *pdev)
  7173. {
  7174. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7175. int err;
  7176. printk(KERN_INFO "Coming out of suspend...\n");
  7177. mutex_lock(&priv->mutex);
  7178. pci_set_power_state(pdev, PCI_D0);
  7179. err = pci_enable_device(pdev);
  7180. pci_restore_state(pdev);
  7181. /*
  7182. * Suspend/Resume resets the PCI configuration space, so we have to
  7183. * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
  7184. * from interfering with C3 CPU state. pci_restore_state won't help
  7185. * here since it only restores the first 64 bytes pci config header.
  7186. */
  7187. pci_write_config_byte(pdev, 0x41, 0x00);
  7188. iwl_resume(priv);
  7189. mutex_unlock(&priv->mutex);
  7190. return 0;
  7191. }
  7192. #endif /* CONFIG_PM */
  7193. /*****************************************************************************
  7194. *
  7195. * driver and module entry point
  7196. *
  7197. *****************************************************************************/
  7198. static struct pci_driver iwl_driver = {
  7199. .name = DRV_NAME,
  7200. .id_table = iwl_hw_card_ids,
  7201. .probe = iwl_pci_probe,
  7202. .remove = __devexit_p(iwl_pci_remove),
  7203. #ifdef CONFIG_PM
  7204. .suspend = iwl_pci_suspend,
  7205. .resume = iwl_pci_resume,
  7206. #endif
  7207. };
  7208. static int __init iwl_init(void)
  7209. {
  7210. int ret;
  7211. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  7212. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  7213. ret = pci_register_driver(&iwl_driver);
  7214. if (ret) {
  7215. IWL_ERROR("Unable to initialize PCI module\n");
  7216. return ret;
  7217. }
  7218. #ifdef CONFIG_IWLWIFI_DEBUG
  7219. ret = driver_create_file(&iwl_driver.driver, &driver_attr_debug_level);
  7220. if (ret) {
  7221. IWL_ERROR("Unable to create driver sysfs file\n");
  7222. pci_unregister_driver(&iwl_driver);
  7223. return ret;
  7224. }
  7225. #endif
  7226. return ret;
  7227. }
  7228. static void __exit iwl_exit(void)
  7229. {
  7230. #ifdef CONFIG_IWLWIFI_DEBUG
  7231. driver_remove_file(&iwl_driver.driver, &driver_attr_debug_level);
  7232. #endif
  7233. pci_unregister_driver(&iwl_driver);
  7234. }
  7235. module_param_named(antenna, iwl_param_antenna, int, 0444);
  7236. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  7237. module_param_named(disable, iwl_param_disable, int, 0444);
  7238. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  7239. module_param_named(hwcrypto, iwl_param_hwcrypto, int, 0444);
  7240. MODULE_PARM_DESC(hwcrypto,
  7241. "using hardware crypto engine (default 0 [software])\n");
  7242. module_param_named(debug, iwl_param_debug, int, 0444);
  7243. MODULE_PARM_DESC(debug, "debug output mask");
  7244. module_param_named(disable_hw_scan, iwl_param_disable_hw_scan, int, 0444);
  7245. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  7246. module_param_named(queues_num, iwl_param_queues_num, int, 0444);
  7247. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  7248. /* QoS */
  7249. module_param_named(qos_enable, iwl_param_qos_enable, int, 0444);
  7250. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  7251. module_exit(iwl_exit);
  7252. module_init(iwl_init);