highbank.c 4.5 KB

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  1. /*
  2. * Copyright 2010-2011 Calxeda, Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. *
  13. * You should have received a copy of the GNU General Public License along with
  14. * this program. If not, see <http://www.gnu.org/licenses/>.
  15. */
  16. #include <linux/clk.h>
  17. #include <linux/clkdev.h>
  18. #include <linux/clocksource.h>
  19. #include <linux/dma-mapping.h>
  20. #include <linux/input.h>
  21. #include <linux/io.h>
  22. #include <linux/irqchip.h>
  23. #include <linux/mailbox.h>
  24. #include <linux/of.h>
  25. #include <linux/of_irq.h>
  26. #include <linux/of_platform.h>
  27. #include <linux/of_address.h>
  28. #include <linux/reboot.h>
  29. #include <linux/amba/bus.h>
  30. #include <linux/platform_device.h>
  31. #include <asm/psci.h>
  32. #include <asm/hardware/cache-l2x0.h>
  33. #include <asm/mach/arch.h>
  34. #include <asm/mach/map.h>
  35. #include "core.h"
  36. #include "sysregs.h"
  37. void __iomem *sregs_base;
  38. void __iomem *scu_base_addr;
  39. static void __init highbank_scu_map_io(void)
  40. {
  41. unsigned long base;
  42. /* Get SCU base */
  43. asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
  44. scu_base_addr = ioremap(base, SZ_4K);
  45. }
  46. static void highbank_l2x0_disable(void)
  47. {
  48. /* Disable PL310 L2 Cache controller */
  49. highbank_smc1(0x102, 0x0);
  50. }
  51. static void __init highbank_init_irq(void)
  52. {
  53. irqchip_init();
  54. if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9"))
  55. highbank_scu_map_io();
  56. /* Enable PL310 L2 Cache controller */
  57. if (IS_ENABLED(CONFIG_CACHE_L2X0) &&
  58. of_find_compatible_node(NULL, NULL, "arm,pl310-cache")) {
  59. highbank_smc1(0x102, 0x1);
  60. l2x0_of_init(0, ~0UL);
  61. outer_cache.disable = highbank_l2x0_disable;
  62. }
  63. }
  64. static void highbank_power_off(void)
  65. {
  66. highbank_set_pwr_shutdown();
  67. while (1)
  68. cpu_do_idle();
  69. }
  70. static int highbank_platform_notifier(struct notifier_block *nb,
  71. unsigned long event, void *__dev)
  72. {
  73. struct resource *res;
  74. int reg = -1;
  75. u32 val;
  76. struct device *dev = __dev;
  77. if (event != BUS_NOTIFY_ADD_DEVICE)
  78. return NOTIFY_DONE;
  79. if (of_device_is_compatible(dev->of_node, "calxeda,hb-ahci"))
  80. reg = 0xc;
  81. else if (of_device_is_compatible(dev->of_node, "calxeda,hb-sdhci"))
  82. reg = 0x18;
  83. else if (of_device_is_compatible(dev->of_node, "arm,pl330"))
  84. reg = 0x20;
  85. else if (of_device_is_compatible(dev->of_node, "calxeda,hb-xgmac")) {
  86. res = platform_get_resource(to_platform_device(dev),
  87. IORESOURCE_MEM, 0);
  88. if (res) {
  89. if (res->start == 0xfff50000)
  90. reg = 0;
  91. else if (res->start == 0xfff51000)
  92. reg = 4;
  93. }
  94. }
  95. if (reg < 0)
  96. return NOTIFY_DONE;
  97. if (of_property_read_bool(dev->of_node, "dma-coherent")) {
  98. val = readl(sregs_base + reg);
  99. writel(val | 0xff01, sregs_base + reg);
  100. set_dma_ops(dev, &arm_coherent_dma_ops);
  101. }
  102. return NOTIFY_OK;
  103. }
  104. static struct notifier_block highbank_amba_nb = {
  105. .notifier_call = highbank_platform_notifier,
  106. };
  107. static struct notifier_block highbank_platform_nb = {
  108. .notifier_call = highbank_platform_notifier,
  109. };
  110. static struct platform_device highbank_cpuidle_device = {
  111. .name = "cpuidle-calxeda",
  112. };
  113. static int hb_keys_notifier(struct notifier_block *nb, unsigned long event, void *data)
  114. {
  115. u32 key = *(u32 *)data;
  116. if (event != 0x1000)
  117. return 0;
  118. if (key == KEY_POWER)
  119. orderly_poweroff(false);
  120. else if (key == 0xffff)
  121. ctrl_alt_del();
  122. return 0;
  123. }
  124. static struct notifier_block hb_keys_nb = {
  125. .notifier_call = hb_keys_notifier,
  126. };
  127. static void __init highbank_init(void)
  128. {
  129. struct device_node *np;
  130. /* Map system registers */
  131. np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs");
  132. sregs_base = of_iomap(np, 0);
  133. WARN_ON(!sregs_base);
  134. pm_power_off = highbank_power_off;
  135. highbank_pm_init();
  136. bus_register_notifier(&platform_bus_type, &highbank_platform_nb);
  137. bus_register_notifier(&amba_bustype, &highbank_amba_nb);
  138. pl320_ipc_register_notifier(&hb_keys_nb);
  139. of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
  140. if (psci_ops.cpu_suspend)
  141. platform_device_register(&highbank_cpuidle_device);
  142. }
  143. static const char *highbank_match[] __initconst = {
  144. "calxeda,highbank",
  145. "calxeda,ecx-2000",
  146. NULL,
  147. };
  148. DT_MACHINE_START(HIGHBANK, "Highbank")
  149. #if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE)
  150. .dma_zone_size = (4ULL * SZ_1G),
  151. #endif
  152. .init_irq = highbank_init_irq,
  153. .init_machine = highbank_init,
  154. .dt_compat = highbank_match,
  155. .restart = highbank_restart,
  156. MACHINE_END