at91sam9260.c 7.0 KB

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  1. /*
  2. * arch/arm/mach-at91rm9200/at91sam9260.c
  3. *
  4. * Copyright (C) 2006 SAN People
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. */
  12. #include <linux/module.h>
  13. #include <asm/mach/arch.h>
  14. #include <asm/mach/map.h>
  15. #include <asm/arch/at91sam9260.h>
  16. #include <asm/arch/at91_pmc.h>
  17. #include "generic.h"
  18. #include "clock.h"
  19. static struct map_desc at91sam9260_io_desc[] __initdata = {
  20. {
  21. .virtual = AT91_VA_BASE_SYS,
  22. .pfn = __phys_to_pfn(AT91_BASE_SYS),
  23. .length = SZ_16K,
  24. .type = MT_DEVICE,
  25. }, {
  26. .virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE,
  27. .pfn = __phys_to_pfn(AT91SAM9260_SRAM0_BASE),
  28. .length = AT91SAM9260_SRAM0_SIZE,
  29. .type = MT_DEVICE,
  30. }, {
  31. .virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE - AT91SAM9260_SRAM1_SIZE,
  32. .pfn = __phys_to_pfn(AT91SAM9260_SRAM1_BASE),
  33. .length = AT91SAM9260_SRAM1_SIZE,
  34. .type = MT_DEVICE,
  35. },
  36. };
  37. /* --------------------------------------------------------------------
  38. * Clocks
  39. * -------------------------------------------------------------------- */
  40. /*
  41. * The peripheral clocks.
  42. */
  43. static struct clk pioA_clk = {
  44. .name = "pioA_clk",
  45. .pmc_mask = 1 << AT91SAM9260_ID_PIOA,
  46. .type = CLK_TYPE_PERIPHERAL,
  47. };
  48. static struct clk pioB_clk = {
  49. .name = "pioB_clk",
  50. .pmc_mask = 1 << AT91SAM9260_ID_PIOB,
  51. .type = CLK_TYPE_PERIPHERAL,
  52. };
  53. static struct clk pioC_clk = {
  54. .name = "pioC_clk",
  55. .pmc_mask = 1 << AT91SAM9260_ID_PIOC,
  56. .type = CLK_TYPE_PERIPHERAL,
  57. };
  58. static struct clk adc_clk = {
  59. .name = "adc_clk",
  60. .pmc_mask = 1 << AT91SAM9260_ID_ADC,
  61. .type = CLK_TYPE_PERIPHERAL,
  62. };
  63. static struct clk usart0_clk = {
  64. .name = "usart0_clk",
  65. .pmc_mask = 1 << AT91SAM9260_ID_US0,
  66. .type = CLK_TYPE_PERIPHERAL,
  67. };
  68. static struct clk usart1_clk = {
  69. .name = "usart1_clk",
  70. .pmc_mask = 1 << AT91SAM9260_ID_US1,
  71. .type = CLK_TYPE_PERIPHERAL,
  72. };
  73. static struct clk usart2_clk = {
  74. .name = "usart2_clk",
  75. .pmc_mask = 1 << AT91SAM9260_ID_US2,
  76. .type = CLK_TYPE_PERIPHERAL,
  77. };
  78. static struct clk mmc_clk = {
  79. .name = "mci_clk",
  80. .pmc_mask = 1 << AT91SAM9260_ID_MCI,
  81. .type = CLK_TYPE_PERIPHERAL,
  82. };
  83. static struct clk udc_clk = {
  84. .name = "udc_clk",
  85. .pmc_mask = 1 << AT91SAM9260_ID_UDP,
  86. .type = CLK_TYPE_PERIPHERAL,
  87. };
  88. static struct clk twi_clk = {
  89. .name = "twi_clk",
  90. .pmc_mask = 1 << AT91SAM9260_ID_TWI,
  91. .type = CLK_TYPE_PERIPHERAL,
  92. };
  93. static struct clk spi0_clk = {
  94. .name = "spi0_clk",
  95. .pmc_mask = 1 << AT91SAM9260_ID_SPI0,
  96. .type = CLK_TYPE_PERIPHERAL,
  97. };
  98. static struct clk spi1_clk = {
  99. .name = "spi1_clk",
  100. .pmc_mask = 1 << AT91SAM9260_ID_SPI1,
  101. .type = CLK_TYPE_PERIPHERAL,
  102. };
  103. static struct clk ohci_clk = {
  104. .name = "ohci_clk",
  105. .pmc_mask = 1 << AT91SAM9260_ID_UHP,
  106. .type = CLK_TYPE_PERIPHERAL,
  107. };
  108. static struct clk ether_clk = {
  109. .name = "ether_clk",
  110. .pmc_mask = 1 << AT91SAM9260_ID_EMAC,
  111. .type = CLK_TYPE_PERIPHERAL,
  112. };
  113. static struct clk isi_clk = {
  114. .name = "isi_clk",
  115. .pmc_mask = 1 << AT91SAM9260_ID_ISI,
  116. .type = CLK_TYPE_PERIPHERAL,
  117. };
  118. static struct clk usart3_clk = {
  119. .name = "usart3_clk",
  120. .pmc_mask = 1 << AT91SAM9260_ID_US3,
  121. .type = CLK_TYPE_PERIPHERAL,
  122. };
  123. static struct clk usart4_clk = {
  124. .name = "usart4_clk",
  125. .pmc_mask = 1 << AT91SAM9260_ID_US4,
  126. .type = CLK_TYPE_PERIPHERAL,
  127. };
  128. static struct clk usart5_clk = {
  129. .name = "usart5_clk",
  130. .pmc_mask = 1 << AT91SAM9260_ID_US5,
  131. .type = CLK_TYPE_PERIPHERAL,
  132. };
  133. static struct clk *periph_clocks[] __initdata = {
  134. &pioA_clk,
  135. &pioB_clk,
  136. &pioC_clk,
  137. &adc_clk,
  138. &usart0_clk,
  139. &usart1_clk,
  140. &usart2_clk,
  141. &mmc_clk,
  142. &udc_clk,
  143. &twi_clk,
  144. &spi0_clk,
  145. &spi1_clk,
  146. // ssc
  147. // tc0 .. tc2
  148. &ohci_clk,
  149. &ether_clk,
  150. &isi_clk,
  151. &usart3_clk,
  152. &usart4_clk,
  153. &usart5_clk,
  154. // tc3 .. tc5
  155. // irq0 .. irq2
  156. };
  157. /*
  158. * The two programmable clocks.
  159. * You must configure pin multiplexing to bring these signals out.
  160. */
  161. static struct clk pck0 = {
  162. .name = "pck0",
  163. .pmc_mask = AT91_PMC_PCK0,
  164. .type = CLK_TYPE_PROGRAMMABLE,
  165. .id = 0,
  166. };
  167. static struct clk pck1 = {
  168. .name = "pck1",
  169. .pmc_mask = AT91_PMC_PCK1,
  170. .type = CLK_TYPE_PROGRAMMABLE,
  171. .id = 1,
  172. };
  173. static void __init at91sam9260_register_clocks(void)
  174. {
  175. int i;
  176. for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
  177. clk_register(periph_clocks[i]);
  178. clk_register(&pck0);
  179. clk_register(&pck1);
  180. }
  181. /* --------------------------------------------------------------------
  182. * GPIO
  183. * -------------------------------------------------------------------- */
  184. static struct at91_gpio_bank at91sam9260_gpio[] = {
  185. {
  186. .id = AT91SAM9260_ID_PIOA,
  187. .offset = AT91_PIOA,
  188. .clock = &pioA_clk,
  189. }, {
  190. .id = AT91SAM9260_ID_PIOB,
  191. .offset = AT91_PIOB,
  192. .clock = &pioB_clk,
  193. }, {
  194. .id = AT91SAM9260_ID_PIOC,
  195. .offset = AT91_PIOC,
  196. .clock = &pioC_clk,
  197. }
  198. };
  199. static void at91sam9260_reset(void)
  200. {
  201. #warning "Implement CPU reset"
  202. }
  203. /* --------------------------------------------------------------------
  204. * AT91SAM9260 processor initialization
  205. * -------------------------------------------------------------------- */
  206. void __init at91sam9260_initialize(unsigned long main_clock)
  207. {
  208. /* Map peripherals */
  209. iotable_init(at91sam9260_io_desc, ARRAY_SIZE(at91sam9260_io_desc));
  210. at91_arch_reset = at91sam9260_reset;
  211. at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
  212. | (1 << AT91SAM9260_ID_IRQ2);
  213. /* Init clock subsystem */
  214. at91_clock_init(main_clock);
  215. /* Register the processor-specific clocks */
  216. at91sam9260_register_clocks();
  217. /* Register GPIO subsystem */
  218. at91_gpio_init(at91sam9260_gpio, 3);
  219. }
  220. /* --------------------------------------------------------------------
  221. * Interrupt initialization
  222. * -------------------------------------------------------------------- */
  223. /*
  224. * The default interrupt priority levels (0 = lowest, 7 = highest).
  225. */
  226. static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
  227. 7, /* Advanced Interrupt Controller */
  228. 7, /* System Peripherals */
  229. 0, /* Parallel IO Controller A */
  230. 0, /* Parallel IO Controller B */
  231. 0, /* Parallel IO Controller C */
  232. 0, /* Analog-to-Digital Converter */
  233. 6, /* USART 0 */
  234. 6, /* USART 1 */
  235. 6, /* USART 2 */
  236. 0, /* Multimedia Card Interface */
  237. 4, /* USB Device Port */
  238. 0, /* Two-Wire Interface */
  239. 6, /* Serial Peripheral Interface 0 */
  240. 6, /* Serial Peripheral Interface 1 */
  241. 5, /* Serial Synchronous Controller */
  242. 0,
  243. 0,
  244. 0, /* Timer Counter 0 */
  245. 0, /* Timer Counter 1 */
  246. 0, /* Timer Counter 2 */
  247. 3, /* USB Host port */
  248. 3, /* Ethernet */
  249. 0, /* Image Sensor Interface */
  250. 6, /* USART 3 */
  251. 6, /* USART 4 */
  252. 6, /* USART 5 */
  253. 0, /* Timer Counter 3 */
  254. 0, /* Timer Counter 4 */
  255. 0, /* Timer Counter 5 */
  256. 0, /* Advanced Interrupt Controller */
  257. 0, /* Advanced Interrupt Controller */
  258. 0, /* Advanced Interrupt Controller */
  259. };
  260. void __init at91sam9260_init_interrupts(unsigned int priority[NR_AIC_IRQS])
  261. {
  262. if (!priority)
  263. priority = at91sam9260_default_irq_priority;
  264. /* Initialize the AIC interrupt controller */
  265. at91_aic_init(priority);
  266. /* Enable GPIO interrupts */
  267. at91_gpio_irq_setup();
  268. }