at803x.c 4.6 KB

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  1. /*
  2. * drivers/net/phy/at803x.c
  3. *
  4. * Driver for Atheros 803x PHY
  5. *
  6. * Author: Matus Ujhelyi <ujhelyi.m@gmail.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. #include <linux/phy.h>
  14. #include <linux/module.h>
  15. #include <linux/string.h>
  16. #include <linux/netdevice.h>
  17. #include <linux/etherdevice.h>
  18. #define AT803X_INTR_ENABLE 0x12
  19. #define AT803X_INTR_STATUS 0x13
  20. #define AT803X_WOL_ENABLE 0x01
  21. #define AT803X_DEVICE_ADDR 0x03
  22. #define AT803X_LOC_MAC_ADDR_0_15_OFFSET 0x804C
  23. #define AT803X_LOC_MAC_ADDR_16_31_OFFSET 0x804B
  24. #define AT803X_LOC_MAC_ADDR_32_47_OFFSET 0x804A
  25. #define AT803X_MMD_ACCESS_CONTROL 0x0D
  26. #define AT803X_MMD_ACCESS_CONTROL_DATA 0x0E
  27. #define AT803X_FUNC_DATA 0x4003
  28. MODULE_DESCRIPTION("Atheros 803x PHY driver");
  29. MODULE_AUTHOR("Matus Ujhelyi");
  30. MODULE_LICENSE("GPL");
  31. static int at803x_set_wol(struct phy_device *phydev,
  32. struct ethtool_wolinfo *wol)
  33. {
  34. struct net_device *ndev = phydev->attached_dev;
  35. const u8 *mac;
  36. int ret;
  37. u32 value;
  38. unsigned int i, offsets[] = {
  39. AT803X_LOC_MAC_ADDR_32_47_OFFSET,
  40. AT803X_LOC_MAC_ADDR_16_31_OFFSET,
  41. AT803X_LOC_MAC_ADDR_0_15_OFFSET,
  42. };
  43. if (!ndev)
  44. return -ENODEV;
  45. if (wol->wolopts & WAKE_MAGIC) {
  46. mac = (const u8 *) ndev->dev_addr;
  47. if (!is_valid_ether_addr(mac))
  48. return -EFAULT;
  49. for (i = 0; i < 3; i++) {
  50. phy_write(phydev, AT803X_MMD_ACCESS_CONTROL,
  51. AT803X_DEVICE_ADDR);
  52. phy_write(phydev, AT803X_MMD_ACCESS_CONTROL_DATA,
  53. offsets[i]);
  54. phy_write(phydev, AT803X_MMD_ACCESS_CONTROL,
  55. AT803X_FUNC_DATA);
  56. phy_write(phydev, AT803X_MMD_ACCESS_CONTROL_DATA,
  57. mac[(i * 2) + 1] | (mac[(i * 2)] << 8));
  58. }
  59. value = phy_read(phydev, AT803X_INTR_ENABLE);
  60. value |= AT803X_WOL_ENABLE;
  61. ret = phy_write(phydev, AT803X_INTR_ENABLE, value);
  62. if (ret)
  63. return ret;
  64. value = phy_read(phydev, AT803X_INTR_STATUS);
  65. } else {
  66. value = phy_read(phydev, AT803X_INTR_ENABLE);
  67. value &= (~AT803X_WOL_ENABLE);
  68. ret = phy_write(phydev, AT803X_INTR_ENABLE, value);
  69. if (ret)
  70. return ret;
  71. value = phy_read(phydev, AT803X_INTR_STATUS);
  72. }
  73. return ret;
  74. }
  75. static void at803x_get_wol(struct phy_device *phydev,
  76. struct ethtool_wolinfo *wol)
  77. {
  78. u32 value;
  79. wol->supported = WAKE_MAGIC;
  80. wol->wolopts = 0;
  81. value = phy_read(phydev, AT803X_INTR_ENABLE);
  82. if (value & AT803X_WOL_ENABLE)
  83. wol->wolopts |= WAKE_MAGIC;
  84. }
  85. static int at803x_config_init(struct phy_device *phydev)
  86. {
  87. int val;
  88. u32 features;
  89. features = SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_AUI |
  90. SUPPORTED_FIBRE | SUPPORTED_BNC;
  91. val = phy_read(phydev, MII_BMSR);
  92. if (val < 0)
  93. return val;
  94. if (val & BMSR_ANEGCAPABLE)
  95. features |= SUPPORTED_Autoneg;
  96. if (val & BMSR_100FULL)
  97. features |= SUPPORTED_100baseT_Full;
  98. if (val & BMSR_100HALF)
  99. features |= SUPPORTED_100baseT_Half;
  100. if (val & BMSR_10FULL)
  101. features |= SUPPORTED_10baseT_Full;
  102. if (val & BMSR_10HALF)
  103. features |= SUPPORTED_10baseT_Half;
  104. if (val & BMSR_ESTATEN) {
  105. val = phy_read(phydev, MII_ESTATUS);
  106. if (val < 0)
  107. return val;
  108. if (val & ESTATUS_1000_TFULL)
  109. features |= SUPPORTED_1000baseT_Full;
  110. if (val & ESTATUS_1000_THALF)
  111. features |= SUPPORTED_1000baseT_Half;
  112. }
  113. phydev->supported = features;
  114. phydev->advertising = features;
  115. return 0;
  116. }
  117. static struct phy_driver at803x_driver[] = {
  118. {
  119. /* ATHEROS 8035 */
  120. .phy_id = 0x004dd072,
  121. .name = "Atheros 8035 ethernet",
  122. .phy_id_mask = 0xffffffef,
  123. .config_init = at803x_config_init,
  124. .set_wol = at803x_set_wol,
  125. .get_wol = at803x_get_wol,
  126. .features = PHY_GBIT_FEATURES,
  127. .flags = PHY_HAS_INTERRUPT,
  128. .config_aneg = &genphy_config_aneg,
  129. .read_status = &genphy_read_status,
  130. .driver = {
  131. .owner = THIS_MODULE,
  132. },
  133. }, {
  134. /* ATHEROS 8030 */
  135. .phy_id = 0x004dd076,
  136. .name = "Atheros 8030 ethernet",
  137. .phy_id_mask = 0xffffffef,
  138. .config_init = at803x_config_init,
  139. .set_wol = at803x_set_wol,
  140. .get_wol = at803x_get_wol,
  141. .features = PHY_GBIT_FEATURES,
  142. .flags = PHY_HAS_INTERRUPT,
  143. .config_aneg = &genphy_config_aneg,
  144. .read_status = &genphy_read_status,
  145. .driver = {
  146. .owner = THIS_MODULE,
  147. },
  148. } };
  149. static int __init atheros_init(void)
  150. {
  151. return phy_drivers_register(at803x_driver,
  152. ARRAY_SIZE(at803x_driver));
  153. }
  154. static void __exit atheros_exit(void)
  155. {
  156. return phy_drivers_unregister(at803x_driver,
  157. ARRAY_SIZE(at803x_driver));
  158. }
  159. module_init(atheros_init);
  160. module_exit(atheros_exit);
  161. static struct mdio_device_id __maybe_unused atheros_tbl[] = {
  162. { 0x004dd076, 0xffffffef },
  163. { 0x004dd072, 0xffffffef },
  164. { }
  165. };
  166. MODULE_DEVICE_TABLE(mdio, atheros_tbl);