chip.c 20 KB

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  1. /*
  2. * linux/kernel/irq/chip.c
  3. *
  4. * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
  5. * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
  6. *
  7. * This file contains the core interrupt handling code, for irq-chip
  8. * based architectures.
  9. *
  10. * Detailed information is available in Documentation/DocBook/genericirq
  11. */
  12. #include <linux/irq.h>
  13. #include <linux/msi.h>
  14. #include <linux/module.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel_stat.h>
  17. #include <trace/events/irq.h>
  18. #include "internals.h"
  19. /**
  20. * irq_set_chip - set the irq chip for an irq
  21. * @irq: irq number
  22. * @chip: pointer to irq chip description structure
  23. */
  24. int irq_set_chip(unsigned int irq, struct irq_chip *chip)
  25. {
  26. unsigned long flags;
  27. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  28. if (!desc)
  29. return -EINVAL;
  30. if (!chip)
  31. chip = &no_irq_chip;
  32. desc->irq_data.chip = chip;
  33. irq_put_desc_unlock(desc, flags);
  34. /*
  35. * For !CONFIG_SPARSE_IRQ make the irq show up in
  36. * allocated_irqs. For the CONFIG_SPARSE_IRQ case, it is
  37. * already marked, and this call is harmless.
  38. */
  39. irq_reserve_irq(irq);
  40. return 0;
  41. }
  42. EXPORT_SYMBOL(irq_set_chip);
  43. /**
  44. * irq_set_type - set the irq trigger type for an irq
  45. * @irq: irq number
  46. * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
  47. */
  48. int irq_set_irq_type(unsigned int irq, unsigned int type)
  49. {
  50. unsigned long flags;
  51. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
  52. int ret = 0;
  53. if (!desc)
  54. return -EINVAL;
  55. type &= IRQ_TYPE_SENSE_MASK;
  56. ret = __irq_set_trigger(desc, irq, type);
  57. irq_put_desc_busunlock(desc, flags);
  58. return ret;
  59. }
  60. EXPORT_SYMBOL(irq_set_irq_type);
  61. /**
  62. * irq_set_handler_data - set irq handler data for an irq
  63. * @irq: Interrupt number
  64. * @data: Pointer to interrupt specific data
  65. *
  66. * Set the hardware irq controller data for an irq
  67. */
  68. int irq_set_handler_data(unsigned int irq, void *data)
  69. {
  70. unsigned long flags;
  71. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  72. if (!desc)
  73. return -EINVAL;
  74. desc->irq_data.handler_data = data;
  75. irq_put_desc_unlock(desc, flags);
  76. return 0;
  77. }
  78. EXPORT_SYMBOL(irq_set_handler_data);
  79. /**
  80. * irq_set_msi_desc_off - set MSI descriptor data for an irq at offset
  81. * @irq_base: Interrupt number base
  82. * @irq_offset: Interrupt number offset
  83. * @entry: Pointer to MSI descriptor data
  84. *
  85. * Set the MSI descriptor entry for an irq at offset
  86. */
  87. int irq_set_msi_desc_off(unsigned int irq_base, unsigned int irq_offset,
  88. struct msi_desc *entry)
  89. {
  90. unsigned long flags;
  91. struct irq_desc *desc = irq_get_desc_lock(irq_base + irq_offset, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
  92. if (!desc)
  93. return -EINVAL;
  94. desc->irq_data.msi_desc = entry;
  95. if (entry && !irq_offset)
  96. entry->irq = irq_base;
  97. irq_put_desc_unlock(desc, flags);
  98. return 0;
  99. }
  100. /**
  101. * irq_set_msi_desc - set MSI descriptor data for an irq
  102. * @irq: Interrupt number
  103. * @entry: Pointer to MSI descriptor data
  104. *
  105. * Set the MSI descriptor entry for an irq
  106. */
  107. int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
  108. {
  109. return irq_set_msi_desc_off(irq, 0, entry);
  110. }
  111. /**
  112. * irq_set_chip_data - set irq chip data for an irq
  113. * @irq: Interrupt number
  114. * @data: Pointer to chip specific data
  115. *
  116. * Set the hardware irq chip data for an irq
  117. */
  118. int irq_set_chip_data(unsigned int irq, void *data)
  119. {
  120. unsigned long flags;
  121. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  122. if (!desc)
  123. return -EINVAL;
  124. desc->irq_data.chip_data = data;
  125. irq_put_desc_unlock(desc, flags);
  126. return 0;
  127. }
  128. EXPORT_SYMBOL(irq_set_chip_data);
  129. struct irq_data *irq_get_irq_data(unsigned int irq)
  130. {
  131. struct irq_desc *desc = irq_to_desc(irq);
  132. return desc ? &desc->irq_data : NULL;
  133. }
  134. EXPORT_SYMBOL_GPL(irq_get_irq_data);
  135. static void irq_state_clr_disabled(struct irq_desc *desc)
  136. {
  137. irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
  138. }
  139. static void irq_state_set_disabled(struct irq_desc *desc)
  140. {
  141. irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
  142. }
  143. static void irq_state_clr_masked(struct irq_desc *desc)
  144. {
  145. irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
  146. }
  147. static void irq_state_set_masked(struct irq_desc *desc)
  148. {
  149. irqd_set(&desc->irq_data, IRQD_IRQ_MASKED);
  150. }
  151. int irq_startup(struct irq_desc *desc, bool resend)
  152. {
  153. int ret = 0;
  154. irq_state_clr_disabled(desc);
  155. desc->depth = 0;
  156. if (desc->irq_data.chip->irq_startup) {
  157. ret = desc->irq_data.chip->irq_startup(&desc->irq_data);
  158. irq_state_clr_masked(desc);
  159. } else {
  160. irq_enable(desc);
  161. }
  162. if (resend)
  163. check_irq_resend(desc, desc->irq_data.irq);
  164. return ret;
  165. }
  166. void irq_shutdown(struct irq_desc *desc)
  167. {
  168. irq_state_set_disabled(desc);
  169. desc->depth = 1;
  170. if (desc->irq_data.chip->irq_shutdown)
  171. desc->irq_data.chip->irq_shutdown(&desc->irq_data);
  172. else if (desc->irq_data.chip->irq_disable)
  173. desc->irq_data.chip->irq_disable(&desc->irq_data);
  174. else
  175. desc->irq_data.chip->irq_mask(&desc->irq_data);
  176. irq_state_set_masked(desc);
  177. }
  178. void irq_enable(struct irq_desc *desc)
  179. {
  180. irq_state_clr_disabled(desc);
  181. if (desc->irq_data.chip->irq_enable)
  182. desc->irq_data.chip->irq_enable(&desc->irq_data);
  183. else
  184. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  185. irq_state_clr_masked(desc);
  186. }
  187. /**
  188. * irq_disable - Mark interupt disabled
  189. * @desc: irq descriptor which should be disabled
  190. *
  191. * If the chip does not implement the irq_disable callback, we
  192. * use a lazy disable approach. That means we mark the interrupt
  193. * disabled, but leave the hardware unmasked. That's an
  194. * optimization because we avoid the hardware access for the
  195. * common case where no interrupt happens after we marked it
  196. * disabled. If an interrupt happens, then the interrupt flow
  197. * handler masks the line at the hardware level and marks it
  198. * pending.
  199. */
  200. void irq_disable(struct irq_desc *desc)
  201. {
  202. irq_state_set_disabled(desc);
  203. if (desc->irq_data.chip->irq_disable) {
  204. desc->irq_data.chip->irq_disable(&desc->irq_data);
  205. irq_state_set_masked(desc);
  206. }
  207. }
  208. void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu)
  209. {
  210. if (desc->irq_data.chip->irq_enable)
  211. desc->irq_data.chip->irq_enable(&desc->irq_data);
  212. else
  213. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  214. cpumask_set_cpu(cpu, desc->percpu_enabled);
  215. }
  216. void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu)
  217. {
  218. if (desc->irq_data.chip->irq_disable)
  219. desc->irq_data.chip->irq_disable(&desc->irq_data);
  220. else
  221. desc->irq_data.chip->irq_mask(&desc->irq_data);
  222. cpumask_clear_cpu(cpu, desc->percpu_enabled);
  223. }
  224. static inline void mask_ack_irq(struct irq_desc *desc)
  225. {
  226. if (desc->irq_data.chip->irq_mask_ack)
  227. desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
  228. else {
  229. desc->irq_data.chip->irq_mask(&desc->irq_data);
  230. if (desc->irq_data.chip->irq_ack)
  231. desc->irq_data.chip->irq_ack(&desc->irq_data);
  232. }
  233. irq_state_set_masked(desc);
  234. }
  235. void mask_irq(struct irq_desc *desc)
  236. {
  237. if (desc->irq_data.chip->irq_mask) {
  238. desc->irq_data.chip->irq_mask(&desc->irq_data);
  239. irq_state_set_masked(desc);
  240. }
  241. }
  242. void unmask_irq(struct irq_desc *desc)
  243. {
  244. if (desc->irq_data.chip->irq_unmask) {
  245. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  246. irq_state_clr_masked(desc);
  247. }
  248. }
  249. /*
  250. * handle_nested_irq - Handle a nested irq from a irq thread
  251. * @irq: the interrupt number
  252. *
  253. * Handle interrupts which are nested into a threaded interrupt
  254. * handler. The handler function is called inside the calling
  255. * threads context.
  256. */
  257. void handle_nested_irq(unsigned int irq)
  258. {
  259. struct irq_desc *desc = irq_to_desc(irq);
  260. struct irqaction *action;
  261. irqreturn_t action_ret;
  262. might_sleep();
  263. raw_spin_lock_irq(&desc->lock);
  264. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  265. kstat_incr_irqs_this_cpu(irq, desc);
  266. action = desc->action;
  267. if (unlikely(!action || irqd_irq_disabled(&desc->irq_data))) {
  268. desc->istate |= IRQS_PENDING;
  269. goto out_unlock;
  270. }
  271. irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  272. raw_spin_unlock_irq(&desc->lock);
  273. action_ret = action->thread_fn(action->irq, action->dev_id);
  274. if (!noirqdebug)
  275. note_interrupt(irq, desc, action_ret);
  276. raw_spin_lock_irq(&desc->lock);
  277. irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  278. out_unlock:
  279. raw_spin_unlock_irq(&desc->lock);
  280. }
  281. EXPORT_SYMBOL_GPL(handle_nested_irq);
  282. static bool irq_check_poll(struct irq_desc *desc)
  283. {
  284. if (!(desc->istate & IRQS_POLL_INPROGRESS))
  285. return false;
  286. return irq_wait_for_poll(desc);
  287. }
  288. /**
  289. * handle_simple_irq - Simple and software-decoded IRQs.
  290. * @irq: the interrupt number
  291. * @desc: the interrupt description structure for this irq
  292. *
  293. * Simple interrupts are either sent from a demultiplexing interrupt
  294. * handler or come from hardware, where no interrupt hardware control
  295. * is necessary.
  296. *
  297. * Note: The caller is expected to handle the ack, clear, mask and
  298. * unmask issues if necessary.
  299. */
  300. void
  301. handle_simple_irq(unsigned int irq, struct irq_desc *desc)
  302. {
  303. raw_spin_lock(&desc->lock);
  304. if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
  305. if (!irq_check_poll(desc))
  306. goto out_unlock;
  307. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  308. kstat_incr_irqs_this_cpu(irq, desc);
  309. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  310. desc->istate |= IRQS_PENDING;
  311. goto out_unlock;
  312. }
  313. handle_irq_event(desc);
  314. out_unlock:
  315. raw_spin_unlock(&desc->lock);
  316. }
  317. EXPORT_SYMBOL_GPL(handle_simple_irq);
  318. /*
  319. * Called unconditionally from handle_level_irq() and only for oneshot
  320. * interrupts from handle_fasteoi_irq()
  321. */
  322. static void cond_unmask_irq(struct irq_desc *desc)
  323. {
  324. /*
  325. * We need to unmask in the following cases:
  326. * - Standard level irq (IRQF_ONESHOT is not set)
  327. * - Oneshot irq which did not wake the thread (caused by a
  328. * spurious interrupt or a primary handler handling it
  329. * completely).
  330. */
  331. if (!irqd_irq_disabled(&desc->irq_data) &&
  332. irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot)
  333. unmask_irq(desc);
  334. }
  335. /**
  336. * handle_level_irq - Level type irq handler
  337. * @irq: the interrupt number
  338. * @desc: the interrupt description structure for this irq
  339. *
  340. * Level type interrupts are active as long as the hardware line has
  341. * the active level. This may require to mask the interrupt and unmask
  342. * it after the associated handler has acknowledged the device, so the
  343. * interrupt line is back to inactive.
  344. */
  345. void
  346. handle_level_irq(unsigned int irq, struct irq_desc *desc)
  347. {
  348. raw_spin_lock(&desc->lock);
  349. mask_ack_irq(desc);
  350. if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
  351. if (!irq_check_poll(desc))
  352. goto out_unlock;
  353. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  354. kstat_incr_irqs_this_cpu(irq, desc);
  355. /*
  356. * If its disabled or no action available
  357. * keep it masked and get out of here
  358. */
  359. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  360. desc->istate |= IRQS_PENDING;
  361. goto out_unlock;
  362. }
  363. handle_irq_event(desc);
  364. cond_unmask_irq(desc);
  365. out_unlock:
  366. raw_spin_unlock(&desc->lock);
  367. }
  368. EXPORT_SYMBOL_GPL(handle_level_irq);
  369. #ifdef CONFIG_IRQ_PREFLOW_FASTEOI
  370. static inline void preflow_handler(struct irq_desc *desc)
  371. {
  372. if (desc->preflow_handler)
  373. desc->preflow_handler(&desc->irq_data);
  374. }
  375. #else
  376. static inline void preflow_handler(struct irq_desc *desc) { }
  377. #endif
  378. /**
  379. * handle_fasteoi_irq - irq handler for transparent controllers
  380. * @irq: the interrupt number
  381. * @desc: the interrupt description structure for this irq
  382. *
  383. * Only a single callback will be issued to the chip: an ->eoi()
  384. * call when the interrupt has been serviced. This enables support
  385. * for modern forms of interrupt handlers, which handle the flow
  386. * details in hardware, transparently.
  387. */
  388. void
  389. handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
  390. {
  391. raw_spin_lock(&desc->lock);
  392. if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
  393. if (!irq_check_poll(desc))
  394. goto out;
  395. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  396. kstat_incr_irqs_this_cpu(irq, desc);
  397. /*
  398. * If its disabled or no action available
  399. * then mask it and get out of here:
  400. */
  401. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  402. desc->istate |= IRQS_PENDING;
  403. mask_irq(desc);
  404. goto out;
  405. }
  406. if (desc->istate & IRQS_ONESHOT)
  407. mask_irq(desc);
  408. preflow_handler(desc);
  409. handle_irq_event(desc);
  410. if (desc->istate & IRQS_ONESHOT)
  411. cond_unmask_irq(desc);
  412. out_eoi:
  413. desc->irq_data.chip->irq_eoi(&desc->irq_data);
  414. out_unlock:
  415. raw_spin_unlock(&desc->lock);
  416. return;
  417. out:
  418. if (!(desc->irq_data.chip->flags & IRQCHIP_EOI_IF_HANDLED))
  419. goto out_eoi;
  420. goto out_unlock;
  421. }
  422. /**
  423. * handle_edge_irq - edge type IRQ handler
  424. * @irq: the interrupt number
  425. * @desc: the interrupt description structure for this irq
  426. *
  427. * Interrupt occures on the falling and/or rising edge of a hardware
  428. * signal. The occurrence is latched into the irq controller hardware
  429. * and must be acked in order to be reenabled. After the ack another
  430. * interrupt can happen on the same source even before the first one
  431. * is handled by the associated event handler. If this happens it
  432. * might be necessary to disable (mask) the interrupt depending on the
  433. * controller hardware. This requires to reenable the interrupt inside
  434. * of the loop which handles the interrupts which have arrived while
  435. * the handler was running. If all pending interrupts are handled, the
  436. * loop is left.
  437. */
  438. void
  439. handle_edge_irq(unsigned int irq, struct irq_desc *desc)
  440. {
  441. raw_spin_lock(&desc->lock);
  442. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  443. /*
  444. * If we're currently running this IRQ, or its disabled,
  445. * we shouldn't process the IRQ. Mark it pending, handle
  446. * the necessary masking and go out
  447. */
  448. if (unlikely(irqd_irq_disabled(&desc->irq_data) ||
  449. irqd_irq_inprogress(&desc->irq_data) || !desc->action)) {
  450. if (!irq_check_poll(desc)) {
  451. desc->istate |= IRQS_PENDING;
  452. mask_ack_irq(desc);
  453. goto out_unlock;
  454. }
  455. }
  456. kstat_incr_irqs_this_cpu(irq, desc);
  457. /* Start handling the irq */
  458. desc->irq_data.chip->irq_ack(&desc->irq_data);
  459. do {
  460. if (unlikely(!desc->action)) {
  461. mask_irq(desc);
  462. goto out_unlock;
  463. }
  464. /*
  465. * When another irq arrived while we were handling
  466. * one, we could have masked the irq.
  467. * Renable it, if it was not disabled in meantime.
  468. */
  469. if (unlikely(desc->istate & IRQS_PENDING)) {
  470. if (!irqd_irq_disabled(&desc->irq_data) &&
  471. irqd_irq_masked(&desc->irq_data))
  472. unmask_irq(desc);
  473. }
  474. handle_irq_event(desc);
  475. } while ((desc->istate & IRQS_PENDING) &&
  476. !irqd_irq_disabled(&desc->irq_data));
  477. out_unlock:
  478. raw_spin_unlock(&desc->lock);
  479. }
  480. EXPORT_SYMBOL(handle_edge_irq);
  481. #ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
  482. /**
  483. * handle_edge_eoi_irq - edge eoi type IRQ handler
  484. * @irq: the interrupt number
  485. * @desc: the interrupt description structure for this irq
  486. *
  487. * Similar as the above handle_edge_irq, but using eoi and w/o the
  488. * mask/unmask logic.
  489. */
  490. void handle_edge_eoi_irq(unsigned int irq, struct irq_desc *desc)
  491. {
  492. struct irq_chip *chip = irq_desc_get_chip(desc);
  493. raw_spin_lock(&desc->lock);
  494. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  495. /*
  496. * If we're currently running this IRQ, or its disabled,
  497. * we shouldn't process the IRQ. Mark it pending, handle
  498. * the necessary masking and go out
  499. */
  500. if (unlikely(irqd_irq_disabled(&desc->irq_data) ||
  501. irqd_irq_inprogress(&desc->irq_data) || !desc->action)) {
  502. if (!irq_check_poll(desc)) {
  503. desc->istate |= IRQS_PENDING;
  504. goto out_eoi;
  505. }
  506. }
  507. kstat_incr_irqs_this_cpu(irq, desc);
  508. do {
  509. if (unlikely(!desc->action))
  510. goto out_eoi;
  511. handle_irq_event(desc);
  512. } while ((desc->istate & IRQS_PENDING) &&
  513. !irqd_irq_disabled(&desc->irq_data));
  514. out_eoi:
  515. chip->irq_eoi(&desc->irq_data);
  516. raw_spin_unlock(&desc->lock);
  517. }
  518. #endif
  519. /**
  520. * handle_percpu_irq - Per CPU local irq handler
  521. * @irq: the interrupt number
  522. * @desc: the interrupt description structure for this irq
  523. *
  524. * Per CPU interrupts on SMP machines without locking requirements
  525. */
  526. void
  527. handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
  528. {
  529. struct irq_chip *chip = irq_desc_get_chip(desc);
  530. kstat_incr_irqs_this_cpu(irq, desc);
  531. if (chip->irq_ack)
  532. chip->irq_ack(&desc->irq_data);
  533. handle_irq_event_percpu(desc, desc->action);
  534. if (chip->irq_eoi)
  535. chip->irq_eoi(&desc->irq_data);
  536. }
  537. /**
  538. * handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids
  539. * @irq: the interrupt number
  540. * @desc: the interrupt description structure for this irq
  541. *
  542. * Per CPU interrupts on SMP machines without locking requirements. Same as
  543. * handle_percpu_irq() above but with the following extras:
  544. *
  545. * action->percpu_dev_id is a pointer to percpu variables which
  546. * contain the real device id for the cpu on which this handler is
  547. * called
  548. */
  549. void handle_percpu_devid_irq(unsigned int irq, struct irq_desc *desc)
  550. {
  551. struct irq_chip *chip = irq_desc_get_chip(desc);
  552. struct irqaction *action = desc->action;
  553. void *dev_id = __this_cpu_ptr(action->percpu_dev_id);
  554. irqreturn_t res;
  555. kstat_incr_irqs_this_cpu(irq, desc);
  556. if (chip->irq_ack)
  557. chip->irq_ack(&desc->irq_data);
  558. trace_irq_handler_entry(irq, action);
  559. res = action->handler(irq, dev_id);
  560. trace_irq_handler_exit(irq, action, res);
  561. if (chip->irq_eoi)
  562. chip->irq_eoi(&desc->irq_data);
  563. }
  564. void
  565. __irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
  566. const char *name)
  567. {
  568. unsigned long flags;
  569. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
  570. if (!desc)
  571. return;
  572. if (!handle) {
  573. handle = handle_bad_irq;
  574. } else {
  575. if (WARN_ON(desc->irq_data.chip == &no_irq_chip))
  576. goto out;
  577. }
  578. /* Uninstall? */
  579. if (handle == handle_bad_irq) {
  580. if (desc->irq_data.chip != &no_irq_chip)
  581. mask_ack_irq(desc);
  582. irq_state_set_disabled(desc);
  583. desc->depth = 1;
  584. }
  585. desc->handle_irq = handle;
  586. desc->name = name;
  587. if (handle != handle_bad_irq && is_chained) {
  588. irq_settings_set_noprobe(desc);
  589. irq_settings_set_norequest(desc);
  590. irq_settings_set_nothread(desc);
  591. irq_startup(desc, true);
  592. }
  593. out:
  594. irq_put_desc_busunlock(desc, flags);
  595. }
  596. EXPORT_SYMBOL_GPL(__irq_set_handler);
  597. void
  598. irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
  599. irq_flow_handler_t handle, const char *name)
  600. {
  601. irq_set_chip(irq, chip);
  602. __irq_set_handler(irq, handle, 0, name);
  603. }
  604. EXPORT_SYMBOL_GPL(irq_set_chip_and_handler_name);
  605. void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
  606. {
  607. unsigned long flags;
  608. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  609. if (!desc)
  610. return;
  611. irq_settings_clr_and_set(desc, clr, set);
  612. irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
  613. IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
  614. if (irq_settings_has_no_balance_set(desc))
  615. irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
  616. if (irq_settings_is_per_cpu(desc))
  617. irqd_set(&desc->irq_data, IRQD_PER_CPU);
  618. if (irq_settings_can_move_pcntxt(desc))
  619. irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
  620. if (irq_settings_is_level(desc))
  621. irqd_set(&desc->irq_data, IRQD_LEVEL);
  622. irqd_set(&desc->irq_data, irq_settings_get_trigger_mask(desc));
  623. irq_put_desc_unlock(desc, flags);
  624. }
  625. EXPORT_SYMBOL_GPL(irq_modify_status);
  626. /**
  627. * irq_cpu_online - Invoke all irq_cpu_online functions.
  628. *
  629. * Iterate through all irqs and invoke the chip.irq_cpu_online()
  630. * for each.
  631. */
  632. void irq_cpu_online(void)
  633. {
  634. struct irq_desc *desc;
  635. struct irq_chip *chip;
  636. unsigned long flags;
  637. unsigned int irq;
  638. for_each_active_irq(irq) {
  639. desc = irq_to_desc(irq);
  640. if (!desc)
  641. continue;
  642. raw_spin_lock_irqsave(&desc->lock, flags);
  643. chip = irq_data_get_irq_chip(&desc->irq_data);
  644. if (chip && chip->irq_cpu_online &&
  645. (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
  646. !irqd_irq_disabled(&desc->irq_data)))
  647. chip->irq_cpu_online(&desc->irq_data);
  648. raw_spin_unlock_irqrestore(&desc->lock, flags);
  649. }
  650. }
  651. /**
  652. * irq_cpu_offline - Invoke all irq_cpu_offline functions.
  653. *
  654. * Iterate through all irqs and invoke the chip.irq_cpu_offline()
  655. * for each.
  656. */
  657. void irq_cpu_offline(void)
  658. {
  659. struct irq_desc *desc;
  660. struct irq_chip *chip;
  661. unsigned long flags;
  662. unsigned int irq;
  663. for_each_active_irq(irq) {
  664. desc = irq_to_desc(irq);
  665. if (!desc)
  666. continue;
  667. raw_spin_lock_irqsave(&desc->lock, flags);
  668. chip = irq_data_get_irq_chip(&desc->irq_data);
  669. if (chip && chip->irq_cpu_offline &&
  670. (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
  671. !irqd_irq_disabled(&desc->irq_data)))
  672. chip->irq_cpu_offline(&desc->irq_data);
  673. raw_spin_unlock_irqrestore(&desc->lock, flags);
  674. }
  675. }