dm.h 4.0 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2012 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * wlanfae <wlanfae@realtek.com>
  23. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24. * Hsinchu 300, Taiwan.
  25. *
  26. * Larry Finger <Larry.Finger@lwfinger.net>
  27. *
  28. ****************************************************************************
  29. */
  30. #ifndef __RTL8723E_DM_H__
  31. #define __RTL8723E_DM_H__
  32. #define HAL_DM_HIPWR_DISABLE BIT(1)
  33. #define OFDM_TABLE_SIZE 37
  34. #define CCK_TABLE_SIZE 33
  35. #define DM_DIG_THRESH_HIGH 40
  36. #define DM_DIG_THRESH_LOW 35
  37. #define DM_FALSEALARM_THRESH_LOW 400
  38. #define DM_FALSEALARM_THRESH_HIGH 1000
  39. #define DM_DIG_MAX 0x3e
  40. #define DM_DIG_MIN 0x1e
  41. #define DM_DIG_FA_UPPER 0x32
  42. #define DM_DIG_FA_LOWER 0x20
  43. #define DM_DIG_FA_TH0 0x20
  44. #define DM_DIG_FA_TH1 0x100
  45. #define DM_DIG_FA_TH2 0x200
  46. #define DM_DIG_BACKOFF_MAX 12
  47. #define DM_DIG_BACKOFF_MIN -4
  48. #define DM_DIG_BACKOFF_DEFAULT 10
  49. #define RXPATHSELECTION_SS_TH_LOW 30
  50. #define RXPATHSELECTION_DIFF_TH 18
  51. #define DM_RATR_STA_INIT 0
  52. #define DM_RATR_STA_HIGH 1
  53. #define DM_RATR_STA_MIDDLE 2
  54. #define DM_RATR_STA_LOW 3
  55. #define TXHIGHPWRLEVEL_NORMAL 0
  56. #define TXHIGHPWRLEVEL_LEVEL1 1
  57. #define TXHIGHPWRLEVEL_LEVEL2 2
  58. #define TXHIGHPWRLEVEL_BT1 3
  59. #define TXHIGHPWRLEVEL_BT2 4
  60. #define DM_TYPE_BYDRIVER 1
  61. #define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
  62. #define TX_POWER_NEAR_FIELD_THRESH_LVL1 67
  63. struct swat_t {
  64. u8 failure_cnt;
  65. u8 try_flag;
  66. u8 stop_trying;
  67. long pre_rssi;
  68. long trying_threshold;
  69. u8 cur_antenna;
  70. u8 pre_antenna;
  71. };
  72. enum tag_dynamic_init_gain_operation_type_definition {
  73. DIG_TYPE_THRESH_HIGH = 0,
  74. DIG_TYPE_THRESH_LOW = 1,
  75. DIG_TYPE_BACKOFF = 2,
  76. DIG_TYPE_RX_GAIN_MIN = 3,
  77. DIG_TYPE_RX_GAIN_MAX = 4,
  78. DIG_TYPE_ENABLE = 5,
  79. DIG_TYPE_DISABLE = 6,
  80. DIG_OP_TYPE_MAX
  81. };
  82. enum tag_cck_packet_detection_threshold_type_definition {
  83. CCK_PD_STAGE_LowRssi = 0,
  84. CCK_PD_STAGE_HighRssi = 1,
  85. CCK_FA_STAGE_Low = 2,
  86. CCK_FA_STAGE_High = 3,
  87. CCK_PD_STAGE_MAX = 4,
  88. };
  89. enum dm_1r_cca_e {
  90. CCA_1R = 0,
  91. CCA_2R = 1,
  92. CCA_MAX = 2,
  93. };
  94. enum dm_rf_e {
  95. RF_SAVE = 0,
  96. RF_NORMAL = 1,
  97. RF_MAX = 2,
  98. };
  99. enum dm_sw_ant_switch_e {
  100. ANS_ANTENNA_B = 1,
  101. ANS_ANTENNA_A = 2,
  102. ANS_ANTENNA_MAX = 3,
  103. };
  104. enum dm_dig_ext_port_alg_e {
  105. DIG_EXT_PORT_STAGE_0 = 0,
  106. DIG_EXT_PORT_STAGE_1 = 1,
  107. DIG_EXT_PORT_STAGE_2 = 2,
  108. DIG_EXT_PORT_STAGE_3 = 3,
  109. DIG_EXT_PORT_STAGE_MAX = 4,
  110. };
  111. enum dm_dig_connect_e {
  112. DIG_STA_DISCONNECT = 0,
  113. DIG_STA_CONNECT = 1,
  114. DIG_STA_BEFORE_CONNECT = 2,
  115. DIG_MULTISTA_DISCONNECT = 3,
  116. DIG_MULTISTA_CONNECT = 4,
  117. DIG_CONNECT_MAX
  118. };
  119. #define GET_UNDECORATED_AVERAGE_RSSI(_priv) \
  120. ((((struct rtl_priv *)(_priv))->mac80211.opmode == \
  121. NL80211_IFTYPE_ADHOC) ? \
  122. (((struct rtl_priv *)(_priv))->dm.entry_min_undec_sm_pwdb) \
  123. : (((struct rtl_priv *)(_priv))->dm.undec_sm_pwdb))
  124. void rtl8723ae_dm_init(struct ieee80211_hw *hw);
  125. void rtl8723ae_dm_watchdog(struct ieee80211_hw *hw);
  126. void rtl8723ae_dm_write_dig(struct ieee80211_hw *hw);
  127. void rtl8723ae_dm_init_edca_turbo(struct ieee80211_hw *hw);
  128. void rtl8723ae_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw);
  129. void rtl8723ae_dm_rf_saving(struct ieee80211_hw *hw, u8 bforce_in_normal);
  130. void rtl8723ae_dm_bt_coexist(struct ieee80211_hw *hw);
  131. #endif