mac.c 32 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2012 Realtek Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * wlanfae <wlanfae@realtek.com>
  23. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24. * Hsinchu 300, Taiwan.
  25. *
  26. * Larry Finger <Larry.Finger@lwfinger.net>
  27. *
  28. ****************************************************************************/
  29. #include "../wifi.h"
  30. #include "../pci.h"
  31. #include "../usb.h"
  32. #include "../ps.h"
  33. #include "../cam.h"
  34. #include "reg.h"
  35. #include "def.h"
  36. #include "phy.h"
  37. #include "rf.h"
  38. #include "dm.h"
  39. #include "mac.h"
  40. #include "trx.h"
  41. #include <linux/module.h>
  42. /* macro to shorten lines */
  43. #define LINK_Q ui_link_quality
  44. #define RX_EVM rx_evm_percentage
  45. #define RX_SIGQ rx_mimo_sig_qual
  46. void rtl92c_read_chip_version(struct ieee80211_hw *hw)
  47. {
  48. struct rtl_priv *rtlpriv = rtl_priv(hw);
  49. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  50. struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
  51. enum version_8192c chip_version = VERSION_UNKNOWN;
  52. const char *versionid;
  53. u32 value32;
  54. value32 = rtl_read_dword(rtlpriv, REG_SYS_CFG);
  55. if (value32 & TRP_VAUX_EN) {
  56. chip_version = (value32 & TYPE_ID) ? VERSION_TEST_CHIP_92C :
  57. VERSION_TEST_CHIP_88C;
  58. } else {
  59. /* Normal mass production chip. */
  60. chip_version = NORMAL_CHIP;
  61. chip_version |= ((value32 & TYPE_ID) ? CHIP_92C : 0);
  62. chip_version |= ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0);
  63. /* RTL8723 with BT function. */
  64. chip_version |= ((value32 & BT_FUNC) ? CHIP_8723 : 0);
  65. if (IS_VENDOR_UMC(chip_version))
  66. chip_version |= ((value32 & CHIP_VER_RTL_MASK) ?
  67. CHIP_VENDOR_UMC_B_CUT : 0);
  68. if (IS_92C_SERIAL(chip_version)) {
  69. value32 = rtl_read_dword(rtlpriv, REG_HPON_FSM);
  70. chip_version |= ((CHIP_BONDING_IDENTIFIER(value32) ==
  71. CHIP_BONDING_92C_1T2R) ? CHIP_92C_1T2R : 0);
  72. } else if (IS_8723_SERIES(chip_version)) {
  73. value32 = rtl_read_dword(rtlpriv, REG_GPIO_OUTSTS);
  74. chip_version |= ((value32 & RF_RL_ID) ?
  75. CHIP_8723_DRV_REV : 0);
  76. }
  77. }
  78. rtlhal->version = (enum version_8192c)chip_version;
  79. pr_info("Chip version 0x%x\n", chip_version);
  80. switch (rtlhal->version) {
  81. case VERSION_NORMAL_TSMC_CHIP_92C_1T2R:
  82. versionid = "NORMAL_B_CHIP_92C";
  83. break;
  84. case VERSION_NORMAL_TSMC_CHIP_92C:
  85. versionid = "NORMAL_TSMC_CHIP_92C";
  86. break;
  87. case VERSION_NORMAL_TSMC_CHIP_88C:
  88. versionid = "NORMAL_TSMC_CHIP_88C";
  89. break;
  90. case VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT:
  91. versionid = "NORMAL_UMC_CHIP_i92C_1T2R_A_CUT";
  92. break;
  93. case VERSION_NORMAL_UMC_CHIP_92C_A_CUT:
  94. versionid = "NORMAL_UMC_CHIP_92C_A_CUT";
  95. break;
  96. case VERSION_NORMAL_UMC_CHIP_88C_A_CUT:
  97. versionid = "NORMAL_UMC_CHIP_88C_A_CUT";
  98. break;
  99. case VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT:
  100. versionid = "NORMAL_UMC_CHIP_92C_1T2R_B_CUT";
  101. break;
  102. case VERSION_NORMAL_UMC_CHIP_92C_B_CUT:
  103. versionid = "NORMAL_UMC_CHIP_92C_B_CUT";
  104. break;
  105. case VERSION_NORMAL_UMC_CHIP_88C_B_CUT:
  106. versionid = "NORMAL_UMC_CHIP_88C_B_CUT";
  107. break;
  108. case VERSION_NORMA_UMC_CHIP_8723_1T1R_A_CUT:
  109. versionid = "NORMAL_UMC_CHIP_8723_1T1R_A_CUT";
  110. break;
  111. case VERSION_NORMA_UMC_CHIP_8723_1T1R_B_CUT:
  112. versionid = "NORMAL_UMC_CHIP_8723_1T1R_B_CUT";
  113. break;
  114. case VERSION_TEST_CHIP_92C:
  115. versionid = "TEST_CHIP_92C";
  116. break;
  117. case VERSION_TEST_CHIP_88C:
  118. versionid = "TEST_CHIP_88C";
  119. break;
  120. default:
  121. versionid = "UNKNOWN";
  122. break;
  123. }
  124. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  125. "Chip Version ID: %s\n", versionid);
  126. if (IS_92C_SERIAL(rtlhal->version))
  127. rtlphy->rf_type =
  128. (IS_92C_1T2R(rtlhal->version)) ? RF_1T2R : RF_2T2R;
  129. else
  130. rtlphy->rf_type = RF_1T1R;
  131. RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
  132. "Chip RF Type: %s\n",
  133. rtlphy->rf_type == RF_2T2R ? "RF_2T2R" : "RF_1T1R");
  134. if (get_rf_type(rtlphy) == RF_1T1R)
  135. rtlpriv->dm.rfpath_rxenable[0] = true;
  136. else
  137. rtlpriv->dm.rfpath_rxenable[0] =
  138. rtlpriv->dm.rfpath_rxenable[1] = true;
  139. RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "VersionID = 0x%4x\n",
  140. rtlhal->version);
  141. }
  142. /**
  143. * writeLLT - LLT table write access
  144. * @io: io callback
  145. * @address: LLT logical address.
  146. * @data: LLT data content
  147. *
  148. * Realtek hardware access function.
  149. *
  150. */
  151. bool rtl92c_llt_write(struct ieee80211_hw *hw, u32 address, u32 data)
  152. {
  153. struct rtl_priv *rtlpriv = rtl_priv(hw);
  154. bool status = true;
  155. long count = 0;
  156. u32 value = _LLT_INIT_ADDR(address) |
  157. _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
  158. rtl_write_dword(rtlpriv, REG_LLT_INIT, value);
  159. do {
  160. value = rtl_read_dword(rtlpriv, REG_LLT_INIT);
  161. if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value))
  162. break;
  163. if (count > POLLING_LLT_THRESHOLD) {
  164. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  165. "Failed to polling write LLT done at address %d! _LLT_OP_VALUE(%x)\n",
  166. address, _LLT_OP_VALUE(value));
  167. status = false;
  168. break;
  169. }
  170. } while (++count);
  171. return status;
  172. }
  173. /**
  174. * rtl92c_init_LLT_table - Init LLT table
  175. * @io: io callback
  176. * @boundary:
  177. *
  178. * Realtek hardware access function.
  179. *
  180. */
  181. bool rtl92c_init_llt_table(struct ieee80211_hw *hw, u32 boundary)
  182. {
  183. bool rst = true;
  184. u32 i;
  185. for (i = 0; i < (boundary - 1); i++) {
  186. rst = rtl92c_llt_write(hw, i , i + 1);
  187. if (true != rst) {
  188. pr_err("===> %s #1 fail\n", __func__);
  189. return rst;
  190. }
  191. }
  192. /* end of list */
  193. rst = rtl92c_llt_write(hw, (boundary - 1), 0xFF);
  194. if (true != rst) {
  195. pr_err("===> %s #2 fail\n", __func__);
  196. return rst;
  197. }
  198. /* Make the other pages as ring buffer
  199. * This ring buffer is used as beacon buffer if we config this MAC
  200. * as two MAC transfer.
  201. * Otherwise used as local loopback buffer.
  202. */
  203. for (i = boundary; i < LLT_LAST_ENTRY_OF_TX_PKT_BUFFER; i++) {
  204. rst = rtl92c_llt_write(hw, i, (i + 1));
  205. if (true != rst) {
  206. pr_err("===> %s #3 fail\n", __func__);
  207. return rst;
  208. }
  209. }
  210. /* Let last entry point to the start entry of ring buffer */
  211. rst = rtl92c_llt_write(hw, LLT_LAST_ENTRY_OF_TX_PKT_BUFFER, boundary);
  212. if (true != rst) {
  213. pr_err("===> %s #4 fail\n", __func__);
  214. return rst;
  215. }
  216. return rst;
  217. }
  218. void rtl92c_set_key(struct ieee80211_hw *hw, u32 key_index,
  219. u8 *p_macaddr, bool is_group, u8 enc_algo,
  220. bool is_wepkey, bool clear_all)
  221. {
  222. struct rtl_priv *rtlpriv = rtl_priv(hw);
  223. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  224. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  225. u8 *macaddr = p_macaddr;
  226. u32 entry_id = 0;
  227. bool is_pairwise = false;
  228. static u8 cam_const_addr[4][6] = {
  229. {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
  230. {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
  231. {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
  232. {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}
  233. };
  234. static u8 cam_const_broad[] = {
  235. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
  236. };
  237. if (clear_all) {
  238. u8 idx = 0;
  239. u8 cam_offset = 0;
  240. u8 clear_number = 5;
  241. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, "clear_all\n");
  242. for (idx = 0; idx < clear_number; idx++) {
  243. rtl_cam_mark_invalid(hw, cam_offset + idx);
  244. rtl_cam_empty_entry(hw, cam_offset + idx);
  245. if (idx < 5) {
  246. memset(rtlpriv->sec.key_buf[idx], 0,
  247. MAX_KEY_LEN);
  248. rtlpriv->sec.key_len[idx] = 0;
  249. }
  250. }
  251. } else {
  252. switch (enc_algo) {
  253. case WEP40_ENCRYPTION:
  254. enc_algo = CAM_WEP40;
  255. break;
  256. case WEP104_ENCRYPTION:
  257. enc_algo = CAM_WEP104;
  258. break;
  259. case TKIP_ENCRYPTION:
  260. enc_algo = CAM_TKIP;
  261. break;
  262. case AESCCMP_ENCRYPTION:
  263. enc_algo = CAM_AES;
  264. break;
  265. default:
  266. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  267. "illegal switch case\n");
  268. enc_algo = CAM_TKIP;
  269. break;
  270. }
  271. if (is_wepkey || rtlpriv->sec.use_defaultkey) {
  272. macaddr = cam_const_addr[key_index];
  273. entry_id = key_index;
  274. } else {
  275. if (is_group) {
  276. macaddr = cam_const_broad;
  277. entry_id = key_index;
  278. } else {
  279. if (mac->opmode == NL80211_IFTYPE_AP ||
  280. mac->opmode == NL80211_IFTYPE_MESH_POINT) {
  281. entry_id = rtl_cam_get_free_entry(hw,
  282. p_macaddr);
  283. if (entry_id >= TOTAL_CAM_ENTRY) {
  284. RT_TRACE(rtlpriv, COMP_SEC,
  285. DBG_EMERG,
  286. "Can not find free hw security cam entry\n");
  287. return;
  288. }
  289. } else {
  290. entry_id = CAM_PAIRWISE_KEY_POSITION;
  291. }
  292. key_index = PAIRWISE_KEYIDX;
  293. is_pairwise = true;
  294. }
  295. }
  296. if (rtlpriv->sec.key_len[key_index] == 0) {
  297. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
  298. "delete one entry\n");
  299. if (mac->opmode == NL80211_IFTYPE_AP ||
  300. mac->opmode == NL80211_IFTYPE_MESH_POINT)
  301. rtl_cam_del_entry(hw, p_macaddr);
  302. rtl_cam_delete_one_entry(hw, p_macaddr, entry_id);
  303. } else {
  304. RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
  305. "The insert KEY length is %d\n",
  306. rtlpriv->sec.key_len[PAIRWISE_KEYIDX]);
  307. RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
  308. "The insert KEY is %x %x\n",
  309. rtlpriv->sec.key_buf[0][0],
  310. rtlpriv->sec.key_buf[0][1]);
  311. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
  312. "add one entry\n");
  313. if (is_pairwise) {
  314. RT_PRINT_DATA(rtlpriv, COMP_SEC, DBG_LOUD,
  315. "Pairwise Key content",
  316. rtlpriv->sec.pairwise_key,
  317. rtlpriv->sec.
  318. key_len[PAIRWISE_KEYIDX]);
  319. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
  320. "set Pairwise key\n");
  321. rtl_cam_add_one_entry(hw, macaddr, key_index,
  322. entry_id, enc_algo,
  323. CAM_CONFIG_NO_USEDK,
  324. rtlpriv->sec.
  325. key_buf[key_index]);
  326. } else {
  327. RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
  328. "set group key\n");
  329. if (mac->opmode == NL80211_IFTYPE_ADHOC) {
  330. rtl_cam_add_one_entry(hw,
  331. rtlefuse->dev_addr,
  332. PAIRWISE_KEYIDX,
  333. CAM_PAIRWISE_KEY_POSITION,
  334. enc_algo,
  335. CAM_CONFIG_NO_USEDK,
  336. rtlpriv->sec.key_buf
  337. [entry_id]);
  338. }
  339. rtl_cam_add_one_entry(hw, macaddr, key_index,
  340. entry_id, enc_algo,
  341. CAM_CONFIG_NO_USEDK,
  342. rtlpriv->sec.key_buf[entry_id]);
  343. }
  344. }
  345. }
  346. }
  347. u32 rtl92c_get_txdma_status(struct ieee80211_hw *hw)
  348. {
  349. struct rtl_priv *rtlpriv = rtl_priv(hw);
  350. return rtl_read_dword(rtlpriv, REG_TXDMA_STATUS);
  351. }
  352. void rtl92c_enable_interrupt(struct ieee80211_hw *hw)
  353. {
  354. struct rtl_priv *rtlpriv = rtl_priv(hw);
  355. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  356. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  357. struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
  358. if (IS_HARDWARE_TYPE_8192CE(rtlhal)) {
  359. rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] &
  360. 0xFFFFFFFF);
  361. rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] &
  362. 0xFFFFFFFF);
  363. } else {
  364. rtl_write_dword(rtlpriv, REG_HIMR, rtlusb->irq_mask[0] &
  365. 0xFFFFFFFF);
  366. rtl_write_dword(rtlpriv, REG_HIMRE, rtlusb->irq_mask[1] &
  367. 0xFFFFFFFF);
  368. }
  369. }
  370. void rtl92c_init_interrupt(struct ieee80211_hw *hw)
  371. {
  372. rtl92c_enable_interrupt(hw);
  373. }
  374. void rtl92c_disable_interrupt(struct ieee80211_hw *hw)
  375. {
  376. struct rtl_priv *rtlpriv = rtl_priv(hw);
  377. rtl_write_dword(rtlpriv, REG_HIMR, IMR8190_DISABLED);
  378. rtl_write_dword(rtlpriv, REG_HIMRE, IMR8190_DISABLED);
  379. }
  380. void rtl92c_set_qos(struct ieee80211_hw *hw, int aci)
  381. {
  382. struct rtl_priv *rtlpriv = rtl_priv(hw);
  383. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  384. u32 u4b_ac_param;
  385. rtl92c_dm_init_edca_turbo(hw);
  386. u4b_ac_param = (u32) mac->ac[aci].aifs;
  387. u4b_ac_param |=
  388. ((u32) le16_to_cpu(mac->ac[aci].cw_min) & 0xF) <<
  389. AC_PARAM_ECW_MIN_OFFSET;
  390. u4b_ac_param |=
  391. ((u32) le16_to_cpu(mac->ac[aci].cw_max) & 0xF) <<
  392. AC_PARAM_ECW_MAX_OFFSET;
  393. u4b_ac_param |= (u32) le16_to_cpu(mac->ac[aci].tx_op) <<
  394. AC_PARAM_TXOP_OFFSET;
  395. RT_TRACE(rtlpriv, COMP_QOS, DBG_LOUD, "queue:%x, ac_param:%x\n",
  396. aci, u4b_ac_param);
  397. switch (aci) {
  398. case AC1_BK:
  399. rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, u4b_ac_param);
  400. break;
  401. case AC0_BE:
  402. rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, u4b_ac_param);
  403. break;
  404. case AC2_VI:
  405. rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, u4b_ac_param);
  406. break;
  407. case AC3_VO:
  408. rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, u4b_ac_param);
  409. break;
  410. default:
  411. RT_ASSERT(false, "invalid aci: %d !\n", aci);
  412. break;
  413. }
  414. }
  415. /*-------------------------------------------------------------------------
  416. * HW MAC Address
  417. *-------------------------------------------------------------------------*/
  418. void rtl92c_set_mac_addr(struct ieee80211_hw *hw, const u8 *addr)
  419. {
  420. u32 i;
  421. struct rtl_priv *rtlpriv = rtl_priv(hw);
  422. for (i = 0 ; i < ETH_ALEN ; i++)
  423. rtl_write_byte(rtlpriv, (REG_MACID + i), *(addr+i));
  424. RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG,
  425. "MAC Address: %02X-%02X-%02X-%02X-%02X-%02X\n",
  426. rtl_read_byte(rtlpriv, REG_MACID),
  427. rtl_read_byte(rtlpriv, REG_MACID+1),
  428. rtl_read_byte(rtlpriv, REG_MACID+2),
  429. rtl_read_byte(rtlpriv, REG_MACID+3),
  430. rtl_read_byte(rtlpriv, REG_MACID+4),
  431. rtl_read_byte(rtlpriv, REG_MACID+5));
  432. }
  433. void rtl92c_init_driver_info_size(struct ieee80211_hw *hw, u8 size)
  434. {
  435. struct rtl_priv *rtlpriv = rtl_priv(hw);
  436. rtl_write_byte(rtlpriv, REG_RX_DRVINFO_SZ, size);
  437. }
  438. int rtl92c_set_network_type(struct ieee80211_hw *hw, enum nl80211_iftype type)
  439. {
  440. u8 value;
  441. struct rtl_priv *rtlpriv = rtl_priv(hw);
  442. switch (type) {
  443. case NL80211_IFTYPE_UNSPECIFIED:
  444. value = NT_NO_LINK;
  445. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  446. "Set Network type to NO LINK!\n");
  447. break;
  448. case NL80211_IFTYPE_ADHOC:
  449. value = NT_LINK_AD_HOC;
  450. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  451. "Set Network type to Ad Hoc!\n");
  452. break;
  453. case NL80211_IFTYPE_STATION:
  454. value = NT_LINK_AP;
  455. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  456. "Set Network type to STA!\n");
  457. break;
  458. case NL80211_IFTYPE_AP:
  459. value = NT_AS_AP;
  460. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  461. "Set Network type to AP!\n");
  462. break;
  463. default:
  464. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  465. "Network type %d not supported!\n", type);
  466. return -EOPNOTSUPP;
  467. }
  468. rtl_write_byte(rtlpriv, (REG_CR + 2), value);
  469. return 0;
  470. }
  471. void rtl92c_init_network_type(struct ieee80211_hw *hw)
  472. {
  473. rtl92c_set_network_type(hw, NL80211_IFTYPE_UNSPECIFIED);
  474. }
  475. void rtl92c_init_adaptive_ctrl(struct ieee80211_hw *hw)
  476. {
  477. u16 value16;
  478. u32 value32;
  479. struct rtl_priv *rtlpriv = rtl_priv(hw);
  480. /* Response Rate Set */
  481. value32 = rtl_read_dword(rtlpriv, REG_RRSR);
  482. value32 &= ~RATE_BITMAP_ALL;
  483. value32 |= RATE_RRSR_CCK_ONLY_1M;
  484. rtl_write_dword(rtlpriv, REG_RRSR, value32);
  485. /* SIFS (used in NAV) */
  486. value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
  487. rtl_write_word(rtlpriv, REG_SPEC_SIFS, value16);
  488. /* Retry Limit */
  489. value16 = _LRL(0x30) | _SRL(0x30);
  490. rtl_write_dword(rtlpriv, REG_RL, value16);
  491. }
  492. void rtl92c_init_rate_fallback(struct ieee80211_hw *hw)
  493. {
  494. struct rtl_priv *rtlpriv = rtl_priv(hw);
  495. /* Set Data Auto Rate Fallback Retry Count register. */
  496. rtl_write_dword(rtlpriv, REG_DARFRC, 0x00000000);
  497. rtl_write_dword(rtlpriv, REG_DARFRC+4, 0x10080404);
  498. rtl_write_dword(rtlpriv, REG_RARFRC, 0x04030201);
  499. rtl_write_dword(rtlpriv, REG_RARFRC+4, 0x08070605);
  500. }
  501. static void rtl92c_set_cck_sifs(struct ieee80211_hw *hw, u8 trx_sifs,
  502. u8 ctx_sifs)
  503. {
  504. struct rtl_priv *rtlpriv = rtl_priv(hw);
  505. rtl_write_byte(rtlpriv, REG_SIFS_CCK, trx_sifs);
  506. rtl_write_byte(rtlpriv, (REG_SIFS_CCK + 1), ctx_sifs);
  507. }
  508. static void rtl92c_set_ofdm_sifs(struct ieee80211_hw *hw, u8 trx_sifs,
  509. u8 ctx_sifs)
  510. {
  511. struct rtl_priv *rtlpriv = rtl_priv(hw);
  512. rtl_write_byte(rtlpriv, REG_SIFS_OFDM, trx_sifs);
  513. rtl_write_byte(rtlpriv, (REG_SIFS_OFDM + 1), ctx_sifs);
  514. }
  515. void rtl92c_init_edca_param(struct ieee80211_hw *hw,
  516. u16 queue, u16 txop, u8 cw_min, u8 cw_max, u8 aifs)
  517. {
  518. /* sequence: VO, VI, BE, BK ==> the same as 92C hardware design.
  519. * referenc : enum nl80211_txq_q or ieee80211_set_wmm_default function.
  520. */
  521. u32 value;
  522. struct rtl_priv *rtlpriv = rtl_priv(hw);
  523. value = (u32)aifs;
  524. value |= ((u32)cw_min & 0xF) << 8;
  525. value |= ((u32)cw_max & 0xF) << 12;
  526. value |= (u32)txop << 16;
  527. /* 92C hardware register sequence is the same as queue number. */
  528. rtl_write_dword(rtlpriv, (REG_EDCA_VO_PARAM + (queue * 4)), value);
  529. }
  530. void rtl92c_init_edca(struct ieee80211_hw *hw)
  531. {
  532. u16 value16;
  533. struct rtl_priv *rtlpriv = rtl_priv(hw);
  534. /* disable EDCCA count down, to reduce collison and retry */
  535. value16 = rtl_read_word(rtlpriv, REG_RD_CTRL);
  536. value16 |= DIS_EDCA_CNT_DWN;
  537. rtl_write_word(rtlpriv, REG_RD_CTRL, value16);
  538. /* Update SIFS timing. ??????????
  539. * pHalData->SifsTime = 0x0e0e0a0a; */
  540. rtl92c_set_cck_sifs(hw, 0xa, 0xa);
  541. rtl92c_set_ofdm_sifs(hw, 0xe, 0xe);
  542. /* Set CCK/OFDM SIFS to be 10us. */
  543. rtl_write_word(rtlpriv, REG_SIFS_CCK, 0x0a0a);
  544. rtl_write_word(rtlpriv, REG_SIFS_OFDM, 0x1010);
  545. rtl_write_word(rtlpriv, REG_PROT_MODE_CTRL, 0x0204);
  546. rtl_write_dword(rtlpriv, REG_BAR_MODE_CTRL, 0x014004);
  547. /* TXOP */
  548. rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, 0x005EA42B);
  549. rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, 0x0000A44F);
  550. rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, 0x005EA324);
  551. rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x002FA226);
  552. /* PIFS */
  553. rtl_write_byte(rtlpriv, REG_PIFS, 0x1C);
  554. /* AGGR BREAK TIME Register */
  555. rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16);
  556. rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0040);
  557. rtl_write_byte(rtlpriv, REG_BCNDMATIM, 0x02);
  558. rtl_write_byte(rtlpriv, REG_ATIMWND, 0x02);
  559. }
  560. void rtl92c_init_ampdu_aggregation(struct ieee80211_hw *hw)
  561. {
  562. struct rtl_priv *rtlpriv = rtl_priv(hw);
  563. rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0x99997631);
  564. rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16);
  565. /* init AMPDU aggregation number, tuning for Tx's TP, */
  566. rtl_write_word(rtlpriv, 0x4CA, 0x0708);
  567. }
  568. void rtl92c_init_beacon_max_error(struct ieee80211_hw *hw, bool infra_mode)
  569. {
  570. struct rtl_priv *rtlpriv = rtl_priv(hw);
  571. rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0xFF);
  572. }
  573. void rtl92c_init_rdg_setting(struct ieee80211_hw *hw)
  574. {
  575. struct rtl_priv *rtlpriv = rtl_priv(hw);
  576. rtl_write_byte(rtlpriv, REG_RD_CTRL, 0xFF);
  577. rtl_write_word(rtlpriv, REG_RD_NAV_NXT, 0x200);
  578. rtl_write_byte(rtlpriv, REG_RD_RESP_PKT_TH, 0x05);
  579. }
  580. void rtl92c_init_retry_function(struct ieee80211_hw *hw)
  581. {
  582. u8 value8;
  583. struct rtl_priv *rtlpriv = rtl_priv(hw);
  584. value8 = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL);
  585. value8 |= EN_AMPDU_RTY_NEW;
  586. rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL, value8);
  587. /* Set ACK timeout */
  588. rtl_write_byte(rtlpriv, REG_ACKTO, 0x40);
  589. }
  590. void rtl92c_init_beacon_parameters(struct ieee80211_hw *hw,
  591. enum version_8192c version)
  592. {
  593. struct rtl_priv *rtlpriv = rtl_priv(hw);
  594. struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
  595. rtl_write_word(rtlpriv, REG_TBTT_PROHIBIT, 0x6404);/* ms */
  596. rtl_write_byte(rtlpriv, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);/*ms*/
  597. rtl_write_byte(rtlpriv, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME);
  598. if (IS_NORMAL_CHIP(rtlhal->version))
  599. rtl_write_word(rtlpriv, REG_BCNTCFG, 0x660F);
  600. else
  601. rtl_write_word(rtlpriv, REG_BCNTCFG, 0x66FF);
  602. }
  603. void rtl92c_disable_fast_edca(struct ieee80211_hw *hw)
  604. {
  605. struct rtl_priv *rtlpriv = rtl_priv(hw);
  606. rtl_write_word(rtlpriv, REG_FAST_EDCA_CTRL, 0);
  607. }
  608. void rtl92c_set_min_space(struct ieee80211_hw *hw, bool is2T)
  609. {
  610. struct rtl_priv *rtlpriv = rtl_priv(hw);
  611. u8 value = is2T ? MAX_MSS_DENSITY_2T : MAX_MSS_DENSITY_1T;
  612. rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, value);
  613. }
  614. u16 rtl92c_get_mgt_filter(struct ieee80211_hw *hw)
  615. {
  616. struct rtl_priv *rtlpriv = rtl_priv(hw);
  617. return rtl_read_word(rtlpriv, REG_RXFLTMAP0);
  618. }
  619. void rtl92c_set_mgt_filter(struct ieee80211_hw *hw, u16 filter)
  620. {
  621. struct rtl_priv *rtlpriv = rtl_priv(hw);
  622. rtl_write_word(rtlpriv, REG_RXFLTMAP0, filter);
  623. }
  624. u16 rtl92c_get_ctrl_filter(struct ieee80211_hw *hw)
  625. {
  626. struct rtl_priv *rtlpriv = rtl_priv(hw);
  627. return rtl_read_word(rtlpriv, REG_RXFLTMAP1);
  628. }
  629. void rtl92c_set_ctrl_filter(struct ieee80211_hw *hw, u16 filter)
  630. {
  631. struct rtl_priv *rtlpriv = rtl_priv(hw);
  632. rtl_write_word(rtlpriv, REG_RXFLTMAP1, filter);
  633. }
  634. u16 rtl92c_get_data_filter(struct ieee80211_hw *hw)
  635. {
  636. struct rtl_priv *rtlpriv = rtl_priv(hw);
  637. return rtl_read_word(rtlpriv, REG_RXFLTMAP2);
  638. }
  639. void rtl92c_set_data_filter(struct ieee80211_hw *hw, u16 filter)
  640. {
  641. struct rtl_priv *rtlpriv = rtl_priv(hw);
  642. rtl_write_word(rtlpriv, REG_RXFLTMAP2, filter);
  643. }
  644. /*==============================================================*/
  645. static u8 _rtl92c_query_rxpwrpercentage(char antpower)
  646. {
  647. if ((antpower <= -100) || (antpower >= 20))
  648. return 0;
  649. else if (antpower >= 0)
  650. return 100;
  651. else
  652. return 100 + antpower;
  653. }
  654. static u8 _rtl92c_evm_db_to_percentage(char value)
  655. {
  656. char ret_val;
  657. ret_val = value;
  658. if (ret_val >= 0)
  659. ret_val = 0;
  660. if (ret_val <= -33)
  661. ret_val = -33;
  662. ret_val = 0 - ret_val;
  663. ret_val *= 3;
  664. if (ret_val == 99)
  665. ret_val = 100;
  666. return ret_val;
  667. }
  668. static long _rtl92c_translate_todbm(struct ieee80211_hw *hw,
  669. u8 signal_strength_index)
  670. {
  671. long signal_power;
  672. signal_power = (long)((signal_strength_index + 1) >> 1);
  673. signal_power -= 95;
  674. return signal_power;
  675. }
  676. static long _rtl92c_signal_scale_mapping(struct ieee80211_hw *hw,
  677. long currsig)
  678. {
  679. long retsig;
  680. if (currsig >= 61 && currsig <= 100)
  681. retsig = 90 + ((currsig - 60) / 4);
  682. else if (currsig >= 41 && currsig <= 60)
  683. retsig = 78 + ((currsig - 40) / 2);
  684. else if (currsig >= 31 && currsig <= 40)
  685. retsig = 66 + (currsig - 30);
  686. else if (currsig >= 21 && currsig <= 30)
  687. retsig = 54 + (currsig - 20);
  688. else if (currsig >= 5 && currsig <= 20)
  689. retsig = 42 + (((currsig - 5) * 2) / 3);
  690. else if (currsig == 4)
  691. retsig = 36;
  692. else if (currsig == 3)
  693. retsig = 27;
  694. else if (currsig == 2)
  695. retsig = 18;
  696. else if (currsig == 1)
  697. retsig = 9;
  698. else
  699. retsig = currsig;
  700. return retsig;
  701. }
  702. static void _rtl92c_query_rxphystatus(struct ieee80211_hw *hw,
  703. struct rtl_stats *pstats,
  704. struct rx_desc_92c *pdesc,
  705. struct rx_fwinfo_92c *p_drvinfo,
  706. bool packet_match_bssid,
  707. bool packet_toself,
  708. bool packet_beacon)
  709. {
  710. struct rtl_priv *rtlpriv = rtl_priv(hw);
  711. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  712. struct phy_sts_cck_8192s_t *cck_buf;
  713. s8 rx_pwr_all = 0, rx_pwr[4];
  714. u8 rf_rx_num = 0, evm, pwdb_all;
  715. u8 i, max_spatial_stream;
  716. u32 rssi, total_rssi = 0;
  717. bool in_powersavemode = false;
  718. bool is_cck_rate;
  719. is_cck_rate = RX_HAL_IS_CCK_RATE(pdesc);
  720. pstats->packet_matchbssid = packet_match_bssid;
  721. pstats->packet_toself = packet_toself;
  722. pstats->is_cck = is_cck_rate;
  723. pstats->packet_beacon = packet_beacon;
  724. pstats->is_cck = is_cck_rate;
  725. pstats->RX_SIGQ[0] = -1;
  726. pstats->RX_SIGQ[1] = -1;
  727. if (is_cck_rate) {
  728. u8 report, cck_highpwr;
  729. cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
  730. if (!in_powersavemode)
  731. cck_highpwr = rtlphy->cck_high_power;
  732. else
  733. cck_highpwr = false;
  734. if (!cck_highpwr) {
  735. u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
  736. report = cck_buf->cck_agc_rpt & 0xc0;
  737. report = report >> 6;
  738. switch (report) {
  739. case 0x3:
  740. rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
  741. break;
  742. case 0x2:
  743. rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
  744. break;
  745. case 0x1:
  746. rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
  747. break;
  748. case 0x0:
  749. rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
  750. break;
  751. }
  752. } else {
  753. u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
  754. report = p_drvinfo->cfosho[0] & 0x60;
  755. report = report >> 5;
  756. switch (report) {
  757. case 0x3:
  758. rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f) << 1);
  759. break;
  760. case 0x2:
  761. rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f) << 1);
  762. break;
  763. case 0x1:
  764. rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f) << 1);
  765. break;
  766. case 0x0:
  767. rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f) << 1);
  768. break;
  769. }
  770. }
  771. pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all);
  772. pstats->rx_pwdb_all = pwdb_all;
  773. pstats->recvsignalpower = rx_pwr_all;
  774. if (packet_match_bssid) {
  775. u8 sq;
  776. if (pstats->rx_pwdb_all > 40)
  777. sq = 100;
  778. else {
  779. sq = cck_buf->sq_rpt;
  780. if (sq > 64)
  781. sq = 0;
  782. else if (sq < 20)
  783. sq = 100;
  784. else
  785. sq = ((64 - sq) * 100) / 44;
  786. }
  787. pstats->signalquality = sq;
  788. pstats->RX_SIGQ[0] = sq;
  789. pstats->RX_SIGQ[1] = -1;
  790. }
  791. } else {
  792. rtlpriv->dm.rfpath_rxenable[0] =
  793. rtlpriv->dm.rfpath_rxenable[1] = true;
  794. for (i = RF90_PATH_A; i < RF90_PATH_MAX; i++) {
  795. if (rtlpriv->dm.rfpath_rxenable[i])
  796. rf_rx_num++;
  797. rx_pwr[i] =
  798. ((p_drvinfo->gain_trsw[i] & 0x3f) * 2) - 110;
  799. rssi = _rtl92c_query_rxpwrpercentage(rx_pwr[i]);
  800. total_rssi += rssi;
  801. rtlpriv->stats.rx_snr_db[i] =
  802. (long)(p_drvinfo->rxsnr[i] / 2);
  803. if (packet_match_bssid)
  804. pstats->rx_mimo_signalstrength[i] = (u8) rssi;
  805. }
  806. rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
  807. pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all);
  808. pstats->rx_pwdb_all = pwdb_all;
  809. pstats->rxpower = rx_pwr_all;
  810. pstats->recvsignalpower = rx_pwr_all;
  811. if (GET_RX_DESC_RX_MCS(pdesc) &&
  812. GET_RX_DESC_RX_MCS(pdesc) >= DESC92_RATEMCS8 &&
  813. GET_RX_DESC_RX_MCS(pdesc) <= DESC92_RATEMCS15)
  814. max_spatial_stream = 2;
  815. else
  816. max_spatial_stream = 1;
  817. for (i = 0; i < max_spatial_stream; i++) {
  818. evm = _rtl92c_evm_db_to_percentage(p_drvinfo->rxevm[i]);
  819. if (packet_match_bssid) {
  820. if (i == 0)
  821. pstats->signalquality =
  822. (u8) (evm & 0xff);
  823. pstats->RX_SIGQ[i] =
  824. (u8) (evm & 0xff);
  825. }
  826. }
  827. }
  828. if (is_cck_rate)
  829. pstats->signalstrength =
  830. (u8) (_rtl92c_signal_scale_mapping(hw, pwdb_all));
  831. else if (rf_rx_num != 0)
  832. pstats->signalstrength =
  833. (u8) (_rtl92c_signal_scale_mapping
  834. (hw, total_rssi /= rf_rx_num));
  835. }
  836. static void _rtl92c_process_ui_rssi(struct ieee80211_hw *hw,
  837. struct rtl_stats *pstats)
  838. {
  839. struct rtl_priv *rtlpriv = rtl_priv(hw);
  840. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  841. u8 rfpath;
  842. u32 last_rssi, tmpval;
  843. if (pstats->packet_toself || pstats->packet_beacon) {
  844. rtlpriv->stats.rssi_calculate_cnt++;
  845. if (rtlpriv->stats.ui_rssi.total_num++ >=
  846. PHY_RSSI_SLID_WIN_MAX) {
  847. rtlpriv->stats.ui_rssi.total_num =
  848. PHY_RSSI_SLID_WIN_MAX;
  849. last_rssi =
  850. rtlpriv->stats.ui_rssi.elements[rtlpriv->
  851. stats.ui_rssi.index];
  852. rtlpriv->stats.ui_rssi.total_val -= last_rssi;
  853. }
  854. rtlpriv->stats.ui_rssi.total_val += pstats->signalstrength;
  855. rtlpriv->stats.ui_rssi.elements[rtlpriv->stats.ui_rssi.
  856. index++] = pstats->signalstrength;
  857. if (rtlpriv->stats.ui_rssi.index >= PHY_RSSI_SLID_WIN_MAX)
  858. rtlpriv->stats.ui_rssi.index = 0;
  859. tmpval = rtlpriv->stats.ui_rssi.total_val /
  860. rtlpriv->stats.ui_rssi.total_num;
  861. rtlpriv->stats.signal_strength =
  862. _rtl92c_translate_todbm(hw, (u8) tmpval);
  863. pstats->rssi = rtlpriv->stats.signal_strength;
  864. }
  865. if (!pstats->is_cck && pstats->packet_toself) {
  866. for (rfpath = RF90_PATH_A; rfpath < rtlphy->num_total_rfpath;
  867. rfpath++) {
  868. if (!rtl8192_phy_check_is_legal_rfpath(hw, rfpath))
  869. continue;
  870. if (rtlpriv->stats.rx_rssi_percentage[rfpath] == 0) {
  871. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  872. pstats->rx_mimo_signalstrength[rfpath];
  873. }
  874. if (pstats->rx_mimo_signalstrength[rfpath] >
  875. rtlpriv->stats.rx_rssi_percentage[rfpath]) {
  876. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  877. ((rtlpriv->stats.
  878. rx_rssi_percentage[rfpath] *
  879. (RX_SMOOTH_FACTOR - 1)) +
  880. (pstats->rx_mimo_signalstrength[rfpath])) /
  881. (RX_SMOOTH_FACTOR);
  882. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  883. rtlpriv->stats.rx_rssi_percentage[rfpath] +
  884. 1;
  885. } else {
  886. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  887. ((rtlpriv->stats.
  888. rx_rssi_percentage[rfpath] *
  889. (RX_SMOOTH_FACTOR - 1)) +
  890. (pstats->rx_mimo_signalstrength[rfpath])) /
  891. (RX_SMOOTH_FACTOR);
  892. }
  893. }
  894. }
  895. }
  896. static void _rtl92c_update_rxsignalstatistics(struct ieee80211_hw *hw,
  897. struct rtl_stats *pstats)
  898. {
  899. struct rtl_priv *rtlpriv = rtl_priv(hw);
  900. int weighting = 0;
  901. if (rtlpriv->stats.recv_signal_power == 0)
  902. rtlpriv->stats.recv_signal_power = pstats->recvsignalpower;
  903. if (pstats->recvsignalpower > rtlpriv->stats.recv_signal_power)
  904. weighting = 5;
  905. else if (pstats->recvsignalpower < rtlpriv->stats.recv_signal_power)
  906. weighting = (-5);
  907. rtlpriv->stats.recv_signal_power =
  908. (rtlpriv->stats.recv_signal_power * 5 +
  909. pstats->recvsignalpower + weighting) / 6;
  910. }
  911. static void _rtl92c_process_pwdb(struct ieee80211_hw *hw,
  912. struct rtl_stats *pstats)
  913. {
  914. struct rtl_priv *rtlpriv = rtl_priv(hw);
  915. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  916. long undec_sm_pwdb = 0;
  917. if (mac->opmode == NL80211_IFTYPE_ADHOC) {
  918. return;
  919. } else {
  920. undec_sm_pwdb = rtlpriv->dm.undec_sm_pwdb;
  921. }
  922. if (pstats->packet_toself || pstats->packet_beacon) {
  923. if (undec_sm_pwdb < 0)
  924. undec_sm_pwdb = pstats->rx_pwdb_all;
  925. if (pstats->rx_pwdb_all > (u32) undec_sm_pwdb) {
  926. undec_sm_pwdb = (((undec_sm_pwdb) *
  927. (RX_SMOOTH_FACTOR - 1)) +
  928. (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
  929. undec_sm_pwdb += 1;
  930. } else {
  931. undec_sm_pwdb = (((undec_sm_pwdb) *
  932. (RX_SMOOTH_FACTOR - 1)) +
  933. (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
  934. }
  935. rtlpriv->dm.undec_sm_pwdb = undec_sm_pwdb;
  936. _rtl92c_update_rxsignalstatistics(hw, pstats);
  937. }
  938. }
  939. static void _rtl92c_process_LINK_Q(struct ieee80211_hw *hw,
  940. struct rtl_stats *pstats)
  941. {
  942. struct rtl_priv *rtlpriv = rtl_priv(hw);
  943. u32 last_evm = 0, n_stream, tmpval;
  944. if (pstats->signalquality != 0) {
  945. if (pstats->packet_toself || pstats->packet_beacon) {
  946. if (rtlpriv->stats.LINK_Q.total_num++ >=
  947. PHY_LINKQUALITY_SLID_WIN_MAX) {
  948. rtlpriv->stats.LINK_Q.total_num =
  949. PHY_LINKQUALITY_SLID_WIN_MAX;
  950. last_evm =
  951. rtlpriv->stats.LINK_Q.elements
  952. [rtlpriv->stats.LINK_Q.index];
  953. rtlpriv->stats.LINK_Q.total_val -=
  954. last_evm;
  955. }
  956. rtlpriv->stats.LINK_Q.total_val +=
  957. pstats->signalquality;
  958. rtlpriv->stats.LINK_Q.elements
  959. [rtlpriv->stats.LINK_Q.index++] =
  960. pstats->signalquality;
  961. if (rtlpriv->stats.LINK_Q.index >=
  962. PHY_LINKQUALITY_SLID_WIN_MAX)
  963. rtlpriv->stats.LINK_Q.index = 0;
  964. tmpval = rtlpriv->stats.LINK_Q.total_val /
  965. rtlpriv->stats.LINK_Q.total_num;
  966. rtlpriv->stats.signal_quality = tmpval;
  967. rtlpriv->stats.last_sigstrength_inpercent = tmpval;
  968. for (n_stream = 0; n_stream < 2;
  969. n_stream++) {
  970. if (pstats->RX_SIGQ[n_stream] != -1) {
  971. if (!rtlpriv->stats.RX_EVM[n_stream]) {
  972. rtlpriv->stats.RX_EVM[n_stream]
  973. = pstats->RX_SIGQ[n_stream];
  974. }
  975. rtlpriv->stats.RX_EVM[n_stream] =
  976. ((rtlpriv->stats.RX_EVM
  977. [n_stream] *
  978. (RX_SMOOTH_FACTOR - 1)) +
  979. (pstats->RX_SIGQ
  980. [n_stream] * 1)) /
  981. (RX_SMOOTH_FACTOR);
  982. }
  983. }
  984. }
  985. } else {
  986. ;
  987. }
  988. }
  989. static void _rtl92c_process_phyinfo(struct ieee80211_hw *hw,
  990. u8 *buffer,
  991. struct rtl_stats *pcurrent_stats)
  992. {
  993. if (!pcurrent_stats->packet_matchbssid &&
  994. !pcurrent_stats->packet_beacon)
  995. return;
  996. _rtl92c_process_ui_rssi(hw, pcurrent_stats);
  997. _rtl92c_process_pwdb(hw, pcurrent_stats);
  998. _rtl92c_process_LINK_Q(hw, pcurrent_stats);
  999. }
  1000. void rtl92c_translate_rx_signal_stuff(struct ieee80211_hw *hw,
  1001. struct sk_buff *skb,
  1002. struct rtl_stats *pstats,
  1003. struct rx_desc_92c *pdesc,
  1004. struct rx_fwinfo_92c *p_drvinfo)
  1005. {
  1006. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  1007. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  1008. struct ieee80211_hdr *hdr;
  1009. u8 *tmp_buf;
  1010. u8 *praddr;
  1011. __le16 fc;
  1012. u16 type, cpu_fc;
  1013. bool packet_matchbssid, packet_toself, packet_beacon = false;
  1014. tmp_buf = skb->data + pstats->rx_drvinfo_size + pstats->rx_bufshift;
  1015. hdr = (struct ieee80211_hdr *)tmp_buf;
  1016. fc = hdr->frame_control;
  1017. cpu_fc = le16_to_cpu(fc);
  1018. type = WLAN_FC_GET_TYPE(fc);
  1019. praddr = hdr->addr1;
  1020. packet_matchbssid =
  1021. ((IEEE80211_FTYPE_CTL != type) &&
  1022. ether_addr_equal(mac->bssid,
  1023. (cpu_fc & IEEE80211_FCTL_TODS) ? hdr->addr1 :
  1024. (cpu_fc & IEEE80211_FCTL_FROMDS) ? hdr->addr2 :
  1025. hdr->addr3) &&
  1026. (!pstats->hwerror) && (!pstats->crc) && (!pstats->icv));
  1027. packet_toself = packet_matchbssid &&
  1028. ether_addr_equal(praddr, rtlefuse->dev_addr);
  1029. if (ieee80211_is_beacon(fc))
  1030. packet_beacon = true;
  1031. _rtl92c_query_rxphystatus(hw, pstats, pdesc, p_drvinfo,
  1032. packet_matchbssid, packet_toself,
  1033. packet_beacon);
  1034. _rtl92c_process_phyinfo(hw, tmp_buf, pstats);
  1035. }