pwrseqcmd.c 4.1 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2013 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * wlanfae <wlanfae@realtek.com>
  23. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24. * Hsinchu 300, Taiwan.
  25. *
  26. * Larry Finger <Larry.Finger@lwfinger.net>
  27. *
  28. *****************************************************************************/
  29. #include "pwrseq.h"
  30. /* Description:
  31. * This routine deal with the Power Configuration CMDs
  32. * parsing for RTL8723/RTL8188E Series IC.
  33. * Assumption:
  34. * We should follow specific format which was released from HW SD.
  35. *
  36. * 2011.07.07, added by Roger.
  37. */
  38. bool rtl88_hal_pwrseqcmdparsing(struct rtl_priv *rtlpriv, u8 cut_version,
  39. u8 fab_version, u8 interface_type,
  40. struct wlan_pwr_cfg pwrcfgcmd[])
  41. {
  42. struct wlan_pwr_cfg cmd = {0};
  43. bool polling_bit = false;
  44. u32 ary_idx = 0;
  45. u8 val = 0;
  46. u32 offset = 0;
  47. u32 polling_count = 0;
  48. u32 max_polling_cnt = 5000;
  49. do {
  50. cmd = pwrcfgcmd[ary_idx];
  51. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  52. "rtl88_hal_pwrseqcmdparsing(): offset(%#x), cut_msk(%#x), fab_msk(%#x),"
  53. "interface_msk(%#x), base(%#x), cmd(%#x), msk(%#x), val(%#x)\n",
  54. GET_PWR_CFG_OFFSET(cmd),
  55. GET_PWR_CFG_CUT_MASK(cmd),
  56. GET_PWR_CFG_FAB_MASK(cmd),
  57. GET_PWR_CFG_INTF_MASK(cmd),
  58. GET_PWR_CFG_BASE(cmd),
  59. GET_PWR_CFG_CMD(cmd),
  60. GET_PWR_CFG_MASK(cmd),
  61. GET_PWR_CFG_VALUE(cmd));
  62. if ((GET_PWR_CFG_FAB_MASK(cmd) & fab_version) &&
  63. (GET_PWR_CFG_CUT_MASK(cmd) & cut_version) &&
  64. (GET_PWR_CFG_INTF_MASK(cmd) & interface_type)) {
  65. switch (GET_PWR_CFG_CMD(cmd)) {
  66. case PWR_CMD_READ:
  67. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  68. "rtl88_hal_pwrseqcmdparsing(): PWR_CMD_READ\n");
  69. break;
  70. case PWR_CMD_WRITE: {
  71. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  72. "rtl88_hal_pwrseqcmdparsing(): PWR_CMD_WRITE\n");
  73. offset = GET_PWR_CFG_OFFSET(cmd);
  74. /*Read the val from system register*/
  75. val = rtl_read_byte(rtlpriv, offset);
  76. val &= (~(GET_PWR_CFG_MASK(cmd)));
  77. val |= (GET_PWR_CFG_VALUE(cmd) &
  78. GET_PWR_CFG_MASK(cmd));
  79. /*Write the val back to sytem register*/
  80. rtl_write_byte(rtlpriv, offset, val);
  81. }
  82. break;
  83. case PWR_CMD_POLLING:
  84. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  85. "rtl88_hal_pwrseqcmdparsing(): PWR_CMD_POLLING\n");
  86. polling_bit = false;
  87. offset = GET_PWR_CFG_OFFSET(cmd);
  88. do {
  89. val = rtl_read_byte(rtlpriv, offset);
  90. val = val & GET_PWR_CFG_MASK(cmd);
  91. if (val == (GET_PWR_CFG_VALUE(cmd) &
  92. GET_PWR_CFG_MASK(cmd)))
  93. polling_bit = true;
  94. else
  95. udelay(10);
  96. if (polling_count++ > max_polling_cnt) {
  97. RT_TRACE(rtlpriv, COMP_INIT,
  98. DBG_LOUD,
  99. "polling fail in pwrseqcmd\n");
  100. return false;
  101. }
  102. } while (!polling_bit);
  103. break;
  104. case PWR_CMD_DELAY:
  105. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  106. "rtl88_hal_pwrseqcmdparsing(): PWR_CMD_DELAY\n");
  107. if (GET_PWR_CFG_VALUE(cmd) == PWRSEQ_DELAY_US)
  108. udelay(GET_PWR_CFG_OFFSET(cmd));
  109. else
  110. mdelay(GET_PWR_CFG_OFFSET(cmd));
  111. break;
  112. case PWR_CMD_END:
  113. RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  114. "rtl88_hal_pwrseqcmdparsing(): PWR_CMD_END\n");
  115. return true;
  116. break;
  117. default:
  118. RT_ASSERT(false,
  119. "rtl88_hal_pwrseqcmdparsing(): Unknown CMD!!\n");
  120. break;
  121. }
  122. }
  123. ary_idx++;
  124. } while (1);
  125. return true;
  126. }