gpio.c 15 KB

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  1. /*
  2. * Copyright (c) 2008-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include "ath9k.h"
  17. /********************************/
  18. /* LED functions */
  19. /********************************/
  20. #ifdef CONFIG_MAC80211_LEDS
  21. static void ath_led_brightness(struct led_classdev *led_cdev,
  22. enum led_brightness brightness)
  23. {
  24. struct ath_softc *sc = container_of(led_cdev, struct ath_softc, led_cdev);
  25. ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, (brightness == LED_OFF));
  26. }
  27. void ath_deinit_leds(struct ath_softc *sc)
  28. {
  29. if (!sc->led_registered)
  30. return;
  31. ath_led_brightness(&sc->led_cdev, LED_OFF);
  32. led_classdev_unregister(&sc->led_cdev);
  33. }
  34. void ath_init_leds(struct ath_softc *sc)
  35. {
  36. int ret;
  37. if (AR_SREV_9100(sc->sc_ah))
  38. return;
  39. if (!led_blink)
  40. sc->led_cdev.default_trigger =
  41. ieee80211_get_radio_led_name(sc->hw);
  42. snprintf(sc->led_name, sizeof(sc->led_name),
  43. "ath9k-%s", wiphy_name(sc->hw->wiphy));
  44. sc->led_cdev.name = sc->led_name;
  45. sc->led_cdev.brightness_set = ath_led_brightness;
  46. ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &sc->led_cdev);
  47. if (ret < 0)
  48. return;
  49. sc->led_registered = true;
  50. }
  51. void ath_fill_led_pin(struct ath_softc *sc)
  52. {
  53. struct ath_hw *ah = sc->sc_ah;
  54. if (AR_SREV_9100(ah) || (ah->led_pin >= 0))
  55. return;
  56. if (AR_SREV_9287(ah))
  57. ah->led_pin = ATH_LED_PIN_9287;
  58. else if (AR_SREV_9485(sc->sc_ah))
  59. ah->led_pin = ATH_LED_PIN_9485;
  60. else if (AR_SREV_9300(sc->sc_ah))
  61. ah->led_pin = ATH_LED_PIN_9300;
  62. else if (AR_SREV_9462(sc->sc_ah) || AR_SREV_9565(sc->sc_ah))
  63. ah->led_pin = ATH_LED_PIN_9462;
  64. else
  65. ah->led_pin = ATH_LED_PIN_DEF;
  66. /* Configure gpio 1 for output */
  67. ath9k_hw_cfg_output(ah, ah->led_pin, AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  68. /* LED off, active low */
  69. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  70. }
  71. #endif
  72. /*******************/
  73. /* Rfkill */
  74. /*******************/
  75. static bool ath_is_rfkill_set(struct ath_softc *sc)
  76. {
  77. struct ath_hw *ah = sc->sc_ah;
  78. bool is_blocked;
  79. ath9k_ps_wakeup(sc);
  80. is_blocked = ath9k_hw_gpio_get(ah, ah->rfkill_gpio) ==
  81. ah->rfkill_polarity;
  82. ath9k_ps_restore(sc);
  83. return is_blocked;
  84. }
  85. void ath9k_rfkill_poll_state(struct ieee80211_hw *hw)
  86. {
  87. struct ath_softc *sc = hw->priv;
  88. bool blocked = !!ath_is_rfkill_set(sc);
  89. wiphy_rfkill_set_hw_state(hw->wiphy, blocked);
  90. }
  91. void ath_start_rfkill_poll(struct ath_softc *sc)
  92. {
  93. struct ath_hw *ah = sc->sc_ah;
  94. if (ah->caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
  95. wiphy_rfkill_start_polling(sc->hw->wiphy);
  96. }
  97. #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
  98. /******************/
  99. /* BTCOEX */
  100. /******************/
  101. /*
  102. * Detects if there is any priority bt traffic
  103. */
  104. static void ath_detect_bt_priority(struct ath_softc *sc)
  105. {
  106. struct ath_btcoex *btcoex = &sc->btcoex;
  107. struct ath_hw *ah = sc->sc_ah;
  108. if (ath9k_hw_gpio_get(sc->sc_ah, ah->btcoex_hw.btpriority_gpio))
  109. btcoex->bt_priority_cnt++;
  110. if (time_after(jiffies, btcoex->bt_priority_time +
  111. msecs_to_jiffies(ATH_BT_PRIORITY_TIME_THRESHOLD))) {
  112. clear_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags);
  113. clear_bit(BT_OP_SCAN, &btcoex->op_flags);
  114. /* Detect if colocated bt started scanning */
  115. if (btcoex->bt_priority_cnt >= ATH_BT_CNT_SCAN_THRESHOLD) {
  116. ath_dbg(ath9k_hw_common(sc->sc_ah), BTCOEX,
  117. "BT scan detected\n");
  118. set_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags);
  119. set_bit(BT_OP_SCAN, &btcoex->op_flags);
  120. } else if (btcoex->bt_priority_cnt >= ATH_BT_CNT_THRESHOLD) {
  121. ath_dbg(ath9k_hw_common(sc->sc_ah), BTCOEX,
  122. "BT priority traffic detected\n");
  123. set_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags);
  124. }
  125. btcoex->bt_priority_cnt = 0;
  126. btcoex->bt_priority_time = jiffies;
  127. }
  128. }
  129. static void ath9k_gen_timer_start(struct ath_hw *ah,
  130. struct ath_gen_timer *timer,
  131. u32 trig_timeout,
  132. u32 timer_period)
  133. {
  134. ath9k_hw_gen_timer_start(ah, timer, trig_timeout, timer_period);
  135. if ((ah->imask & ATH9K_INT_GENTIMER) == 0) {
  136. ath9k_hw_disable_interrupts(ah);
  137. ah->imask |= ATH9K_INT_GENTIMER;
  138. ath9k_hw_set_interrupts(ah);
  139. ath9k_hw_enable_interrupts(ah);
  140. }
  141. }
  142. static void ath9k_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer)
  143. {
  144. struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers;
  145. ath9k_hw_gen_timer_stop(ah, timer);
  146. /* if no timer is enabled, turn off interrupt mask */
  147. if (timer_table->timer_mask.val == 0) {
  148. ath9k_hw_disable_interrupts(ah);
  149. ah->imask &= ~ATH9K_INT_GENTIMER;
  150. ath9k_hw_set_interrupts(ah);
  151. ath9k_hw_enable_interrupts(ah);
  152. }
  153. }
  154. static void ath_mci_ftp_adjust(struct ath_softc *sc)
  155. {
  156. struct ath_btcoex *btcoex = &sc->btcoex;
  157. struct ath_mci_profile *mci = &btcoex->mci;
  158. struct ath_hw *ah = sc->sc_ah;
  159. if (btcoex->bt_wait_time > ATH_BTCOEX_RX_WAIT_TIME) {
  160. if (ar9003_mci_state(ah, MCI_STATE_NEED_FTP_STOMP) &&
  161. (mci->num_pan || mci->num_other_acl))
  162. ah->btcoex_hw.mci.stomp_ftp =
  163. (sc->rx.num_pkts < ATH_BTCOEX_STOMP_FTP_THRESH);
  164. else
  165. ah->btcoex_hw.mci.stomp_ftp = false;
  166. btcoex->bt_wait_time = 0;
  167. sc->rx.num_pkts = 0;
  168. }
  169. }
  170. /*
  171. * This is the master bt coex timer which runs for every
  172. * 45ms, bt traffic will be given priority during 55% of this
  173. * period while wlan gets remaining 45%
  174. */
  175. static void ath_btcoex_period_timer(unsigned long data)
  176. {
  177. struct ath_softc *sc = (struct ath_softc *) data;
  178. struct ath_hw *ah = sc->sc_ah;
  179. struct ath_btcoex *btcoex = &sc->btcoex;
  180. enum ath_stomp_type stomp_type;
  181. u32 timer_period;
  182. unsigned long flags;
  183. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  184. if (sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP) {
  185. btcoex->bt_wait_time += btcoex->btcoex_period;
  186. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  187. goto skip_hw_wakeup;
  188. }
  189. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  190. ath9k_mci_update_rssi(sc);
  191. ath9k_ps_wakeup(sc);
  192. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI))
  193. ath_detect_bt_priority(sc);
  194. if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI)
  195. ath_mci_ftp_adjust(sc);
  196. spin_lock_bh(&btcoex->btcoex_lock);
  197. stomp_type = btcoex->bt_stomp_type;
  198. timer_period = btcoex->btcoex_no_stomp;
  199. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI)) {
  200. if (test_bit(BT_OP_SCAN, &btcoex->op_flags)) {
  201. stomp_type = ATH_BTCOEX_STOMP_ALL;
  202. timer_period = btcoex->btscan_no_stomp;
  203. }
  204. } else if (btcoex->stomp_audio >= 5) {
  205. stomp_type = ATH_BTCOEX_STOMP_AUDIO;
  206. btcoex->stomp_audio = 0;
  207. }
  208. ath9k_hw_btcoex_bt_stomp(ah, stomp_type);
  209. ath9k_hw_btcoex_enable(ah);
  210. spin_unlock_bh(&btcoex->btcoex_lock);
  211. /*
  212. * btcoex_period is in msec while (btocex/btscan_)no_stomp are in usec,
  213. * ensure that we properly convert btcoex_period to usec
  214. * for any comparision with (btcoex/btscan_)no_stomp.
  215. */
  216. if (btcoex->btcoex_period * 1000 != btcoex->btcoex_no_stomp) {
  217. if (btcoex->hw_timer_enabled)
  218. ath9k_gen_timer_stop(ah, btcoex->no_stomp_timer);
  219. ath9k_gen_timer_start(ah, btcoex->no_stomp_timer, timer_period,
  220. timer_period * 10);
  221. btcoex->hw_timer_enabled = true;
  222. }
  223. ath9k_ps_restore(sc);
  224. skip_hw_wakeup:
  225. mod_timer(&btcoex->period_timer,
  226. jiffies + msecs_to_jiffies(btcoex->btcoex_period));
  227. }
  228. /*
  229. * Generic tsf based hw timer which configures weight
  230. * registers to time slice between wlan and bt traffic
  231. */
  232. static void ath_btcoex_no_stomp_timer(void *arg)
  233. {
  234. struct ath_softc *sc = (struct ath_softc *)arg;
  235. struct ath_hw *ah = sc->sc_ah;
  236. struct ath_btcoex *btcoex = &sc->btcoex;
  237. struct ath_common *common = ath9k_hw_common(ah);
  238. ath_dbg(common, BTCOEX, "no stomp timer running\n");
  239. ath9k_ps_wakeup(sc);
  240. spin_lock_bh(&btcoex->btcoex_lock);
  241. if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_LOW ||
  242. (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI) &&
  243. test_bit(BT_OP_SCAN, &btcoex->op_flags)))
  244. ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE);
  245. else if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_ALL)
  246. ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_LOW);
  247. ath9k_hw_btcoex_enable(ah);
  248. spin_unlock_bh(&btcoex->btcoex_lock);
  249. ath9k_ps_restore(sc);
  250. }
  251. static int ath_init_btcoex_timer(struct ath_softc *sc)
  252. {
  253. struct ath_btcoex *btcoex = &sc->btcoex;
  254. btcoex->btcoex_period = ATH_BTCOEX_DEF_BT_PERIOD;
  255. btcoex->btcoex_no_stomp = (100 - ATH_BTCOEX_DEF_DUTY_CYCLE) * 1000 *
  256. btcoex->btcoex_period / 100;
  257. btcoex->btscan_no_stomp = (100 - ATH_BTCOEX_BTSCAN_DUTY_CYCLE) * 1000 *
  258. btcoex->btcoex_period / 100;
  259. setup_timer(&btcoex->period_timer, ath_btcoex_period_timer,
  260. (unsigned long) sc);
  261. spin_lock_init(&btcoex->btcoex_lock);
  262. btcoex->no_stomp_timer = ath_gen_timer_alloc(sc->sc_ah,
  263. ath_btcoex_no_stomp_timer,
  264. ath_btcoex_no_stomp_timer,
  265. (void *) sc, AR_FIRST_NDP_TIMER);
  266. if (!btcoex->no_stomp_timer)
  267. return -ENOMEM;
  268. return 0;
  269. }
  270. /*
  271. * (Re)start btcoex timers
  272. */
  273. void ath9k_btcoex_timer_resume(struct ath_softc *sc)
  274. {
  275. struct ath_btcoex *btcoex = &sc->btcoex;
  276. struct ath_hw *ah = sc->sc_ah;
  277. ath_dbg(ath9k_hw_common(ah), BTCOEX, "Starting btcoex timers\n");
  278. /* make sure duty cycle timer is also stopped when resuming */
  279. if (btcoex->hw_timer_enabled) {
  280. ath9k_gen_timer_stop(sc->sc_ah, btcoex->no_stomp_timer);
  281. btcoex->hw_timer_enabled = false;
  282. }
  283. btcoex->bt_priority_cnt = 0;
  284. btcoex->bt_priority_time = jiffies;
  285. clear_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags);
  286. clear_bit(BT_OP_SCAN, &btcoex->op_flags);
  287. mod_timer(&btcoex->period_timer, jiffies);
  288. }
  289. /*
  290. * Pause btcoex timer and bt duty cycle timer
  291. */
  292. void ath9k_btcoex_timer_pause(struct ath_softc *sc)
  293. {
  294. struct ath_btcoex *btcoex = &sc->btcoex;
  295. struct ath_hw *ah = sc->sc_ah;
  296. del_timer_sync(&btcoex->period_timer);
  297. if (btcoex->hw_timer_enabled) {
  298. ath9k_gen_timer_stop(ah, btcoex->no_stomp_timer);
  299. btcoex->hw_timer_enabled = false;
  300. }
  301. }
  302. void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc)
  303. {
  304. struct ath_btcoex *btcoex = &sc->btcoex;
  305. if (btcoex->hw_timer_enabled) {
  306. ath9k_gen_timer_stop(sc->sc_ah, btcoex->no_stomp_timer);
  307. btcoex->hw_timer_enabled = false;
  308. }
  309. }
  310. u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen)
  311. {
  312. struct ath_btcoex *btcoex = &sc->btcoex;
  313. struct ath_mci_profile *mci = &sc->btcoex.mci;
  314. u16 aggr_limit = 0;
  315. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI) && mci->aggr_limit)
  316. aggr_limit = (max_4ms_framelen * mci->aggr_limit) >> 4;
  317. else if (test_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags))
  318. aggr_limit = min((max_4ms_framelen * 3) / 8,
  319. (u32)ATH_AMPDU_LIMIT_MAX);
  320. return aggr_limit;
  321. }
  322. void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status)
  323. {
  324. struct ath_hw *ah = sc->sc_ah;
  325. if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
  326. if (status & ATH9K_INT_GENTIMER)
  327. ath_gen_timer_isr(sc->sc_ah);
  328. if (status & ATH9K_INT_MCI)
  329. ath_mci_intr(sc);
  330. }
  331. void ath9k_start_btcoex(struct ath_softc *sc)
  332. {
  333. struct ath_hw *ah = sc->sc_ah;
  334. if ((ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) &&
  335. !ah->btcoex_hw.enabled) {
  336. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI))
  337. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  338. AR_STOMP_LOW_WLAN_WGHT, 0);
  339. else
  340. ath9k_hw_btcoex_set_weight(ah, 0, 0,
  341. ATH_BTCOEX_STOMP_NONE);
  342. ath9k_hw_btcoex_enable(ah);
  343. if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
  344. ath9k_btcoex_timer_resume(sc);
  345. }
  346. }
  347. void ath9k_stop_btcoex(struct ath_softc *sc)
  348. {
  349. struct ath_hw *ah = sc->sc_ah;
  350. if (ah->btcoex_hw.enabled &&
  351. ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) {
  352. if (ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_3WIRE)
  353. ath9k_btcoex_timer_pause(sc);
  354. ath9k_hw_btcoex_disable(ah);
  355. if (AR_SREV_9462(ah) || AR_SREV_9565(ah))
  356. ath_mci_flush_profile(&sc->btcoex.mci);
  357. }
  358. }
  359. void ath9k_deinit_btcoex(struct ath_softc *sc)
  360. {
  361. struct ath_hw *ah = sc->sc_ah;
  362. if ((sc->btcoex.no_stomp_timer) &&
  363. ath9k_hw_get_btcoex_scheme(sc->sc_ah) == ATH_BTCOEX_CFG_3WIRE)
  364. ath_gen_timer_free(sc->sc_ah, sc->btcoex.no_stomp_timer);
  365. if (ath9k_hw_mci_is_enabled(ah))
  366. ath_mci_cleanup(sc);
  367. }
  368. int ath9k_init_btcoex(struct ath_softc *sc)
  369. {
  370. struct ath_txq *txq;
  371. struct ath_hw *ah = sc->sc_ah;
  372. int r;
  373. ath9k_hw_btcoex_init_scheme(ah);
  374. switch (ath9k_hw_get_btcoex_scheme(sc->sc_ah)) {
  375. case ATH_BTCOEX_CFG_NONE:
  376. break;
  377. case ATH_BTCOEX_CFG_2WIRE:
  378. ath9k_hw_btcoex_init_2wire(sc->sc_ah);
  379. break;
  380. case ATH_BTCOEX_CFG_3WIRE:
  381. ath9k_hw_btcoex_init_3wire(sc->sc_ah);
  382. r = ath_init_btcoex_timer(sc);
  383. if (r)
  384. return -1;
  385. txq = sc->tx.txq_map[IEEE80211_AC_BE];
  386. ath9k_hw_init_btcoex_hw(sc->sc_ah, txq->axq_qnum);
  387. sc->btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
  388. if (ath9k_hw_mci_is_enabled(ah)) {
  389. sc->btcoex.duty_cycle = ATH_BTCOEX_DEF_DUTY_CYCLE;
  390. INIT_LIST_HEAD(&sc->btcoex.mci.info);
  391. r = ath_mci_setup(sc);
  392. if (r)
  393. return r;
  394. ath9k_hw_btcoex_init_mci(ah);
  395. }
  396. break;
  397. default:
  398. WARN_ON(1);
  399. break;
  400. }
  401. return 0;
  402. }
  403. static int ath9k_dump_mci_btcoex(struct ath_softc *sc, u8 *buf, u32 size)
  404. {
  405. struct ath_btcoex *btcoex = &sc->btcoex;
  406. struct ath_mci_profile *mci = &btcoex->mci;
  407. struct ath_hw *ah = sc->sc_ah;
  408. struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
  409. u32 len = 0;
  410. int i;
  411. ATH_DUMP_BTCOEX("Total BT profiles", NUM_PROF(mci));
  412. ATH_DUMP_BTCOEX("MGMT", mci->num_mgmt);
  413. ATH_DUMP_BTCOEX("SCO", mci->num_sco);
  414. ATH_DUMP_BTCOEX("A2DP", mci->num_a2dp);
  415. ATH_DUMP_BTCOEX("HID", mci->num_hid);
  416. ATH_DUMP_BTCOEX("PAN", mci->num_pan);
  417. ATH_DUMP_BTCOEX("ACL", mci->num_other_acl);
  418. ATH_DUMP_BTCOEX("BDR", mci->num_bdr);
  419. ATH_DUMP_BTCOEX("Aggr. Limit", mci->aggr_limit);
  420. ATH_DUMP_BTCOEX("Stomp Type", btcoex->bt_stomp_type);
  421. ATH_DUMP_BTCOEX("BTCoex Period (msec)", btcoex->btcoex_period);
  422. ATH_DUMP_BTCOEX("Duty Cycle", btcoex->duty_cycle);
  423. ATH_DUMP_BTCOEX("BT Wait time", btcoex->bt_wait_time);
  424. ATH_DUMP_BTCOEX("Concurrent Tx", btcoex_hw->mci.concur_tx);
  425. ATH_DUMP_BTCOEX("Concurrent RSSI cnt", btcoex->rssi_count);
  426. len += snprintf(buf + len, size - len, "BT Weights: ");
  427. for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
  428. len += snprintf(buf + len, size - len, "%08x ",
  429. btcoex_hw->bt_weight[i]);
  430. len += snprintf(buf + len, size - len, "\n");
  431. len += snprintf(buf + len, size - len, "WLAN Weights: ");
  432. for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
  433. len += snprintf(buf + len, size - len, "%08x ",
  434. btcoex_hw->wlan_weight[i]);
  435. len += snprintf(buf + len, size - len, "\n");
  436. len += snprintf(buf + len, size - len, "Tx Priorities: ");
  437. for (i = 0; i < ATH_BTCOEX_STOMP_MAX; i++)
  438. len += snprintf(buf + len, size - len, "%08x ",
  439. btcoex_hw->tx_prio[i]);
  440. len += snprintf(buf + len, size - len, "\n");
  441. return len;
  442. }
  443. static int ath9k_dump_legacy_btcoex(struct ath_softc *sc, u8 *buf, u32 size)
  444. {
  445. struct ath_btcoex *btcoex = &sc->btcoex;
  446. u32 len = 0;
  447. ATH_DUMP_BTCOEX("Stomp Type", btcoex->bt_stomp_type);
  448. ATH_DUMP_BTCOEX("BTCoex Period (msec)", btcoex->btcoex_period);
  449. ATH_DUMP_BTCOEX("Duty Cycle", btcoex->duty_cycle);
  450. ATH_DUMP_BTCOEX("BT Wait time", btcoex->bt_wait_time);
  451. return len;
  452. }
  453. int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size)
  454. {
  455. if (ath9k_hw_mci_is_enabled(sc->sc_ah))
  456. return ath9k_dump_mci_btcoex(sc, buf, size);
  457. else
  458. return ath9k_dump_legacy_btcoex(sc, buf, size);
  459. }
  460. #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */