btcoex.c 12 KB

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  1. /*
  2. * Copyright (c) 2009-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/export.h>
  17. #include "hw.h"
  18. enum ath_bt_mode {
  19. ATH_BT_COEX_MODE_LEGACY, /* legacy rx_clear mode */
  20. ATH_BT_COEX_MODE_UNSLOTTED, /* untimed/unslotted mode */
  21. ATH_BT_COEX_MODE_SLOTTED, /* slotted mode */
  22. ATH_BT_COEX_MODE_DISABLED, /* coexistence disabled */
  23. };
  24. struct ath_btcoex_config {
  25. u8 bt_time_extend;
  26. bool bt_txstate_extend;
  27. bool bt_txframe_extend;
  28. enum ath_bt_mode bt_mode; /* coexistence mode */
  29. bool bt_quiet_collision;
  30. bool bt_rxclear_polarity; /* invert rx_clear as WLAN_ACTIVE*/
  31. u8 bt_priority_time;
  32. u8 bt_first_slot_time;
  33. bool bt_hold_rx_clear;
  34. };
  35. static const u32 ar9003_wlan_weights[ATH_BTCOEX_STOMP_MAX]
  36. [AR9300_NUM_WLAN_WEIGHTS] = {
  37. { 0xfffffff0, 0xfffffff0, 0xfffffff0, 0xfffffff0 }, /* STOMP_ALL */
  38. { 0x88888880, 0x88888880, 0x88888880, 0x88888880 }, /* STOMP_LOW */
  39. { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* STOMP_NONE */
  40. };
  41. static const u32 mci_wlan_weights[ATH_BTCOEX_STOMP_MAX]
  42. [AR9300_NUM_WLAN_WEIGHTS] = {
  43. { 0x01017d01, 0x41414101, 0x41414101, 0x41414141 }, /* STOMP_ALL */
  44. { 0x01017d01, 0x3b3b3b01, 0x3b3b3b01, 0x3b3b3b3b }, /* STOMP_LOW */
  45. { 0x01017d01, 0x01010101, 0x01010101, 0x01010101 }, /* STOMP_NONE */
  46. { 0x01017d01, 0x013b0101, 0x3b3b0101, 0x3b3b013b }, /* STOMP_LOW_FTP */
  47. { 0xffffff01, 0xffffffff, 0xffffff01, 0xffffffff }, /* STOMP_AUDIO */
  48. };
  49. void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum)
  50. {
  51. struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
  52. const struct ath_btcoex_config ath_bt_config = {
  53. .bt_time_extend = 0,
  54. .bt_txstate_extend = true,
  55. .bt_txframe_extend = true,
  56. .bt_mode = ATH_BT_COEX_MODE_SLOTTED,
  57. .bt_quiet_collision = true,
  58. .bt_rxclear_polarity = true,
  59. .bt_priority_time = 2,
  60. .bt_first_slot_time = 5,
  61. .bt_hold_rx_clear = true,
  62. };
  63. u32 i, idx;
  64. bool rxclear_polarity = ath_bt_config.bt_rxclear_polarity;
  65. if (AR_SREV_9300_20_OR_LATER(ah))
  66. rxclear_polarity = !ath_bt_config.bt_rxclear_polarity;
  67. btcoex_hw->bt_coex_mode =
  68. (btcoex_hw->bt_coex_mode & AR_BT_QCU_THRESH) |
  69. SM(ath_bt_config.bt_time_extend, AR_BT_TIME_EXTEND) |
  70. SM(ath_bt_config.bt_txstate_extend, AR_BT_TXSTATE_EXTEND) |
  71. SM(ath_bt_config.bt_txframe_extend, AR_BT_TX_FRAME_EXTEND) |
  72. SM(ath_bt_config.bt_mode, AR_BT_MODE) |
  73. SM(ath_bt_config.bt_quiet_collision, AR_BT_QUIET) |
  74. SM(rxclear_polarity, AR_BT_RX_CLEAR_POLARITY) |
  75. SM(ath_bt_config.bt_priority_time, AR_BT_PRIORITY_TIME) |
  76. SM(ath_bt_config.bt_first_slot_time, AR_BT_FIRST_SLOT_TIME) |
  77. SM(qnum, AR_BT_QCU_THRESH);
  78. btcoex_hw->bt_coex_mode2 =
  79. SM(ath_bt_config.bt_hold_rx_clear, AR_BT_HOLD_RX_CLEAR) |
  80. SM(ATH_BTCOEX_BMISS_THRESH, AR_BT_BCN_MISS_THRESH) |
  81. AR_BT_DISABLE_BT_ANT;
  82. for (i = 0; i < 32; i++) {
  83. idx = (debruijn32 << i) >> 27;
  84. ah->hw_gen_timers.gen_timer_index[idx] = i;
  85. }
  86. }
  87. EXPORT_SYMBOL(ath9k_hw_init_btcoex_hw);
  88. void ath9k_hw_btcoex_init_scheme(struct ath_hw *ah)
  89. {
  90. struct ath_common *common = ath9k_hw_common(ah);
  91. struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
  92. /*
  93. * Check if BTCOEX is globally disabled.
  94. */
  95. if (!common->btcoex_enabled) {
  96. btcoex_hw->scheme = ATH_BTCOEX_CFG_NONE;
  97. return;
  98. }
  99. if (AR_SREV_9300_20_OR_LATER(ah)) {
  100. btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
  101. btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO_9300;
  102. btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO_9300;
  103. btcoex_hw->btpriority_gpio = ATH_BTPRIORITY_GPIO_9300;
  104. } else if (AR_SREV_9280_20_OR_LATER(ah)) {
  105. btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO_9280;
  106. btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO_9280;
  107. if (AR_SREV_9285(ah)) {
  108. btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
  109. btcoex_hw->btpriority_gpio = ATH_BTPRIORITY_GPIO_9285;
  110. } else {
  111. btcoex_hw->scheme = ATH_BTCOEX_CFG_2WIRE;
  112. }
  113. }
  114. }
  115. EXPORT_SYMBOL(ath9k_hw_btcoex_init_scheme);
  116. void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah)
  117. {
  118. struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
  119. /* connect bt_active to baseband */
  120. REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL,
  121. (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_DEF |
  122. AR_GPIO_INPUT_EN_VAL_BT_FREQUENCY_DEF));
  123. REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
  124. AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB);
  125. /* Set input mux for bt_active to gpio pin */
  126. REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
  127. AR_GPIO_INPUT_MUX1_BT_ACTIVE,
  128. btcoex_hw->btactive_gpio);
  129. /* Configure the desired gpio port for input */
  130. ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
  131. }
  132. EXPORT_SYMBOL(ath9k_hw_btcoex_init_2wire);
  133. void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah)
  134. {
  135. struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
  136. /* btcoex 3-wire */
  137. REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
  138. (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB |
  139. AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB));
  140. /* Set input mux for bt_prority_async and
  141. * bt_active_async to GPIO pins */
  142. REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
  143. AR_GPIO_INPUT_MUX1_BT_ACTIVE,
  144. btcoex_hw->btactive_gpio);
  145. REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
  146. AR_GPIO_INPUT_MUX1_BT_PRIORITY,
  147. btcoex_hw->btpriority_gpio);
  148. /* Configure the desired GPIO ports for input */
  149. ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
  150. ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btpriority_gpio);
  151. }
  152. EXPORT_SYMBOL(ath9k_hw_btcoex_init_3wire);
  153. void ath9k_hw_btcoex_init_mci(struct ath_hw *ah)
  154. {
  155. ah->btcoex_hw.mci.ready = false;
  156. ah->btcoex_hw.mci.bt_state = 0;
  157. ah->btcoex_hw.mci.bt_ver_major = 3;
  158. ah->btcoex_hw.mci.bt_ver_minor = 0;
  159. ah->btcoex_hw.mci.bt_version_known = false;
  160. ah->btcoex_hw.mci.update_2g5g = true;
  161. ah->btcoex_hw.mci.is_2g = true;
  162. ah->btcoex_hw.mci.wlan_channels_update = false;
  163. ah->btcoex_hw.mci.wlan_channels[0] = 0x00000000;
  164. ah->btcoex_hw.mci.wlan_channels[1] = 0xffffffff;
  165. ah->btcoex_hw.mci.wlan_channels[2] = 0xffffffff;
  166. ah->btcoex_hw.mci.wlan_channels[3] = 0x7fffffff;
  167. ah->btcoex_hw.mci.query_bt = true;
  168. ah->btcoex_hw.mci.unhalt_bt_gpm = true;
  169. ah->btcoex_hw.mci.halted_bt_gpm = false;
  170. ah->btcoex_hw.mci.need_flush_btinfo = false;
  171. ah->btcoex_hw.mci.wlan_cal_seq = 0;
  172. ah->btcoex_hw.mci.wlan_cal_done = 0;
  173. ah->btcoex_hw.mci.config = (AR_SREV_9462(ah)) ? 0x2201 : 0xa4c1;
  174. }
  175. EXPORT_SYMBOL(ath9k_hw_btcoex_init_mci);
  176. static void ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah)
  177. {
  178. struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
  179. /* Configure the desired GPIO port for TX_FRAME output */
  180. ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
  181. AR_GPIO_OUTPUT_MUX_AS_TX_FRAME);
  182. }
  183. /*
  184. * For AR9002, bt_weight/wlan_weight are used.
  185. * For AR9003 and above, stomp_type is used.
  186. */
  187. void ath9k_hw_btcoex_set_weight(struct ath_hw *ah,
  188. u32 bt_weight,
  189. u32 wlan_weight,
  190. enum ath_stomp_type stomp_type)
  191. {
  192. struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
  193. struct ath9k_hw_mci *mci_hw = &ah->btcoex_hw.mci;
  194. u8 txprio_shift[] = { 24, 16, 16, 0 }; /* tx priority weight */
  195. bool concur_tx = (mci_hw->concur_tx && btcoex_hw->tx_prio[stomp_type]);
  196. const u32 *weight = ar9003_wlan_weights[stomp_type];
  197. int i;
  198. if (!AR_SREV_9300_20_OR_LATER(ah)) {
  199. btcoex_hw->bt_coex_weights =
  200. SM(bt_weight, AR_BTCOEX_BT_WGHT) |
  201. SM(wlan_weight, AR_BTCOEX_WL_WGHT);
  202. return;
  203. }
  204. if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
  205. enum ath_stomp_type stype =
  206. ((stomp_type == ATH_BTCOEX_STOMP_LOW) &&
  207. btcoex_hw->mci.stomp_ftp) ?
  208. ATH_BTCOEX_STOMP_LOW_FTP : stomp_type;
  209. weight = mci_wlan_weights[stype];
  210. }
  211. for (i = 0; i < AR9300_NUM_WLAN_WEIGHTS; i++) {
  212. btcoex_hw->bt_weight[i] = AR9300_BT_WGHT;
  213. btcoex_hw->wlan_weight[i] = weight[i];
  214. if (concur_tx && i) {
  215. btcoex_hw->wlan_weight[i] &=
  216. ~(0xff << txprio_shift[i-1]);
  217. btcoex_hw->wlan_weight[i] |=
  218. (btcoex_hw->tx_prio[stomp_type] <<
  219. txprio_shift[i-1]);
  220. }
  221. }
  222. /* Last WLAN weight has to be adjusted wrt tx priority */
  223. if (concur_tx) {
  224. btcoex_hw->wlan_weight[i-1] &= ~(0xff << txprio_shift[i-1]);
  225. btcoex_hw->wlan_weight[i-1] |= (btcoex_hw->tx_prio[stomp_type]
  226. << txprio_shift[i-1]);
  227. }
  228. }
  229. EXPORT_SYMBOL(ath9k_hw_btcoex_set_weight);
  230. static void ath9k_hw_btcoex_enable_3wire(struct ath_hw *ah)
  231. {
  232. struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
  233. u32 val;
  234. int i;
  235. /*
  236. * Program coex mode and weight registers to
  237. * enable coex 3-wire
  238. */
  239. REG_WRITE(ah, AR_BT_COEX_MODE, btcoex->bt_coex_mode);
  240. REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex->bt_coex_mode2);
  241. if (AR_SREV_9300_20_OR_LATER(ah)) {
  242. REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, btcoex->wlan_weight[0]);
  243. REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, btcoex->wlan_weight[1]);
  244. for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
  245. REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i),
  246. btcoex->bt_weight[i]);
  247. } else
  248. REG_WRITE(ah, AR_BT_COEX_WEIGHT, btcoex->bt_coex_weights);
  249. if (AR_SREV_9271(ah)) {
  250. val = REG_READ(ah, 0x50040);
  251. val &= 0xFFFFFEFF;
  252. REG_WRITE(ah, 0x50040, val);
  253. }
  254. REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
  255. REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0);
  256. ath9k_hw_cfg_output(ah, btcoex->wlanactive_gpio,
  257. AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL);
  258. }
  259. static void ath9k_hw_btcoex_enable_mci(struct ath_hw *ah)
  260. {
  261. struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
  262. int i;
  263. for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
  264. REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
  265. btcoex->wlan_weight[i]);
  266. REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
  267. btcoex->enabled = true;
  268. }
  269. void ath9k_hw_btcoex_enable(struct ath_hw *ah)
  270. {
  271. struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
  272. switch (ath9k_hw_get_btcoex_scheme(ah)) {
  273. case ATH_BTCOEX_CFG_NONE:
  274. return;
  275. case ATH_BTCOEX_CFG_2WIRE:
  276. ath9k_hw_btcoex_enable_2wire(ah);
  277. break;
  278. case ATH_BTCOEX_CFG_3WIRE:
  279. if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
  280. ath9k_hw_btcoex_enable_mci(ah);
  281. return;
  282. }
  283. ath9k_hw_btcoex_enable_3wire(ah);
  284. break;
  285. }
  286. REG_RMW(ah, AR_GPIO_PDPU,
  287. (0x2 << (btcoex_hw->btactive_gpio * 2)),
  288. (0x3 << (btcoex_hw->btactive_gpio * 2)));
  289. ah->btcoex_hw.enabled = true;
  290. }
  291. EXPORT_SYMBOL(ath9k_hw_btcoex_enable);
  292. void ath9k_hw_btcoex_disable(struct ath_hw *ah)
  293. {
  294. struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
  295. int i;
  296. btcoex_hw->enabled = false;
  297. if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
  298. ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE);
  299. for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
  300. REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
  301. btcoex_hw->wlan_weight[i]);
  302. return;
  303. }
  304. ath9k_hw_set_gpio(ah, btcoex_hw->wlanactive_gpio, 0);
  305. ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
  306. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  307. if (btcoex_hw->scheme == ATH_BTCOEX_CFG_3WIRE) {
  308. REG_WRITE(ah, AR_BT_COEX_MODE, AR_BT_QUIET | AR_BT_MODE);
  309. REG_WRITE(ah, AR_BT_COEX_MODE2, 0);
  310. if (AR_SREV_9300_20_OR_LATER(ah)) {
  311. REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, 0);
  312. REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, 0);
  313. for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
  314. REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i), 0);
  315. } else
  316. REG_WRITE(ah, AR_BT_COEX_WEIGHT, 0);
  317. }
  318. }
  319. EXPORT_SYMBOL(ath9k_hw_btcoex_disable);
  320. /*
  321. * Configures appropriate weight based on stomp type.
  322. */
  323. void ath9k_hw_btcoex_bt_stomp(struct ath_hw *ah,
  324. enum ath_stomp_type stomp_type)
  325. {
  326. if (AR_SREV_9300_20_OR_LATER(ah)) {
  327. ath9k_hw_btcoex_set_weight(ah, 0, 0, stomp_type);
  328. return;
  329. }
  330. switch (stomp_type) {
  331. case ATH_BTCOEX_STOMP_ALL:
  332. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  333. AR_STOMP_ALL_WLAN_WGHT, 0);
  334. break;
  335. case ATH_BTCOEX_STOMP_LOW:
  336. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  337. AR_STOMP_LOW_WLAN_WGHT, 0);
  338. break;
  339. case ATH_BTCOEX_STOMP_NONE:
  340. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  341. AR_STOMP_NONE_WLAN_WGHT, 0);
  342. break;
  343. default:
  344. ath_dbg(ath9k_hw_common(ah), BTCOEX, "Invalid Stomptype\n");
  345. break;
  346. }
  347. }
  348. EXPORT_SYMBOL(ath9k_hw_btcoex_bt_stomp);
  349. void ath9k_hw_btcoex_set_concur_txprio(struct ath_hw *ah, u8 *stomp_txprio)
  350. {
  351. struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
  352. int i;
  353. for (i = 0; i < ATH_BTCOEX_STOMP_MAX; i++)
  354. btcoex->tx_prio[i] = stomp_txprio[i];
  355. }
  356. EXPORT_SYMBOL(ath9k_hw_btcoex_set_concur_txprio);