htt_tx.c 13 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include <linux/etherdevice.h>
  18. #include "htt.h"
  19. #include "mac.h"
  20. #include "hif.h"
  21. #include "txrx.h"
  22. #include "debug.h"
  23. void __ath10k_htt_tx_dec_pending(struct ath10k_htt *htt)
  24. {
  25. htt->num_pending_tx--;
  26. if (htt->num_pending_tx == htt->max_num_pending_tx - 1)
  27. ieee80211_wake_queues(htt->ar->hw);
  28. }
  29. static void ath10k_htt_tx_dec_pending(struct ath10k_htt *htt)
  30. {
  31. spin_lock_bh(&htt->tx_lock);
  32. __ath10k_htt_tx_dec_pending(htt);
  33. spin_unlock_bh(&htt->tx_lock);
  34. }
  35. static int ath10k_htt_tx_inc_pending(struct ath10k_htt *htt)
  36. {
  37. int ret = 0;
  38. spin_lock_bh(&htt->tx_lock);
  39. if (htt->num_pending_tx >= htt->max_num_pending_tx) {
  40. ret = -EBUSY;
  41. goto exit;
  42. }
  43. htt->num_pending_tx++;
  44. if (htt->num_pending_tx == htt->max_num_pending_tx)
  45. ieee80211_stop_queues(htt->ar->hw);
  46. exit:
  47. spin_unlock_bh(&htt->tx_lock);
  48. return ret;
  49. }
  50. int ath10k_htt_tx_alloc_msdu_id(struct ath10k_htt *htt)
  51. {
  52. int msdu_id;
  53. lockdep_assert_held(&htt->tx_lock);
  54. msdu_id = find_first_zero_bit(htt->used_msdu_ids,
  55. htt->max_num_pending_tx);
  56. if (msdu_id == htt->max_num_pending_tx)
  57. return -ENOBUFS;
  58. ath10k_dbg(ATH10K_DBG_HTT, "htt tx alloc msdu_id %d\n", msdu_id);
  59. __set_bit(msdu_id, htt->used_msdu_ids);
  60. return msdu_id;
  61. }
  62. void ath10k_htt_tx_free_msdu_id(struct ath10k_htt *htt, u16 msdu_id)
  63. {
  64. lockdep_assert_held(&htt->tx_lock);
  65. if (!test_bit(msdu_id, htt->used_msdu_ids))
  66. ath10k_warn("trying to free unallocated msdu_id %d\n", msdu_id);
  67. ath10k_dbg(ATH10K_DBG_HTT, "htt tx free msdu_id %hu\n", msdu_id);
  68. __clear_bit(msdu_id, htt->used_msdu_ids);
  69. }
  70. int ath10k_htt_tx_attach(struct ath10k_htt *htt)
  71. {
  72. u8 pipe;
  73. spin_lock_init(&htt->tx_lock);
  74. init_waitqueue_head(&htt->empty_tx_wq);
  75. /* At the beginning free queue number should hint us the maximum
  76. * queue length */
  77. pipe = htt->ar->htc.endpoint[htt->eid].ul_pipe_id;
  78. htt->max_num_pending_tx = ath10k_hif_get_free_queue_number(htt->ar,
  79. pipe);
  80. ath10k_dbg(ATH10K_DBG_HTT, "htt tx max num pending tx %d\n",
  81. htt->max_num_pending_tx);
  82. htt->pending_tx = kzalloc(sizeof(*htt->pending_tx) *
  83. htt->max_num_pending_tx, GFP_KERNEL);
  84. if (!htt->pending_tx)
  85. return -ENOMEM;
  86. htt->used_msdu_ids = kzalloc(sizeof(unsigned long) *
  87. BITS_TO_LONGS(htt->max_num_pending_tx),
  88. GFP_KERNEL);
  89. if (!htt->used_msdu_ids) {
  90. kfree(htt->pending_tx);
  91. return -ENOMEM;
  92. }
  93. return 0;
  94. }
  95. static void ath10k_htt_tx_cleanup_pending(struct ath10k_htt *htt)
  96. {
  97. struct sk_buff *txdesc;
  98. int msdu_id;
  99. /* No locks needed. Called after communication with the device has
  100. * been stopped. */
  101. for (msdu_id = 0; msdu_id < htt->max_num_pending_tx; msdu_id++) {
  102. if (!test_bit(msdu_id, htt->used_msdu_ids))
  103. continue;
  104. txdesc = htt->pending_tx[msdu_id];
  105. if (!txdesc)
  106. continue;
  107. ath10k_dbg(ATH10K_DBG_HTT, "force cleanup msdu_id %hu\n",
  108. msdu_id);
  109. if (ATH10K_SKB_CB(txdesc)->htt.refcount > 0)
  110. ATH10K_SKB_CB(txdesc)->htt.refcount = 1;
  111. ATH10K_SKB_CB(txdesc)->htt.discard = true;
  112. ath10k_txrx_tx_unref(htt, txdesc);
  113. }
  114. }
  115. void ath10k_htt_tx_detach(struct ath10k_htt *htt)
  116. {
  117. ath10k_htt_tx_cleanup_pending(htt);
  118. kfree(htt->pending_tx);
  119. kfree(htt->used_msdu_ids);
  120. return;
  121. }
  122. void ath10k_htt_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
  123. {
  124. struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
  125. struct ath10k_htt *htt = &ar->htt;
  126. if (skb_cb->htt.is_conf) {
  127. dev_kfree_skb_any(skb);
  128. return;
  129. }
  130. if (skb_cb->is_aborted) {
  131. skb_cb->htt.discard = true;
  132. /* if the skbuff is aborted we need to make sure we'll free up
  133. * the tx resources, we can't simply run tx_unref() 2 times
  134. * because if htt tx completion came in earlier we'd access
  135. * unallocated memory */
  136. if (skb_cb->htt.refcount > 1)
  137. skb_cb->htt.refcount = 1;
  138. }
  139. ath10k_txrx_tx_unref(htt, skb);
  140. }
  141. int ath10k_htt_h2t_ver_req_msg(struct ath10k_htt *htt)
  142. {
  143. struct sk_buff *skb;
  144. struct htt_cmd *cmd;
  145. int len = 0;
  146. int ret;
  147. len += sizeof(cmd->hdr);
  148. len += sizeof(cmd->ver_req);
  149. skb = ath10k_htc_alloc_skb(len);
  150. if (!skb)
  151. return -ENOMEM;
  152. skb_put(skb, len);
  153. cmd = (struct htt_cmd *)skb->data;
  154. cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_VERSION_REQ;
  155. ATH10K_SKB_CB(skb)->htt.is_conf = true;
  156. ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb);
  157. if (ret) {
  158. dev_kfree_skb_any(skb);
  159. return ret;
  160. }
  161. return 0;
  162. }
  163. int ath10k_htt_send_rx_ring_cfg_ll(struct ath10k_htt *htt)
  164. {
  165. struct sk_buff *skb;
  166. struct htt_cmd *cmd;
  167. struct htt_rx_ring_setup_ring *ring;
  168. const int num_rx_ring = 1;
  169. u16 flags;
  170. u32 fw_idx;
  171. int len;
  172. int ret;
  173. /*
  174. * the HW expects the buffer to be an integral number of 4-byte
  175. * "words"
  176. */
  177. BUILD_BUG_ON(!IS_ALIGNED(HTT_RX_BUF_SIZE, 4));
  178. BUILD_BUG_ON((HTT_RX_BUF_SIZE & HTT_MAX_CACHE_LINE_SIZE_MASK) != 0);
  179. len = sizeof(cmd->hdr) + sizeof(cmd->rx_setup.hdr)
  180. + (sizeof(*ring) * num_rx_ring);
  181. skb = ath10k_htc_alloc_skb(len);
  182. if (!skb)
  183. return -ENOMEM;
  184. skb_put(skb, len);
  185. cmd = (struct htt_cmd *)skb->data;
  186. ring = &cmd->rx_setup.rings[0];
  187. cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_RX_RING_CFG;
  188. cmd->rx_setup.hdr.num_rings = 1;
  189. /* FIXME: do we need all of this? */
  190. flags = 0;
  191. flags |= HTT_RX_RING_FLAGS_MAC80211_HDR;
  192. flags |= HTT_RX_RING_FLAGS_MSDU_PAYLOAD;
  193. flags |= HTT_RX_RING_FLAGS_PPDU_START;
  194. flags |= HTT_RX_RING_FLAGS_PPDU_END;
  195. flags |= HTT_RX_RING_FLAGS_MPDU_START;
  196. flags |= HTT_RX_RING_FLAGS_MPDU_END;
  197. flags |= HTT_RX_RING_FLAGS_MSDU_START;
  198. flags |= HTT_RX_RING_FLAGS_MSDU_END;
  199. flags |= HTT_RX_RING_FLAGS_RX_ATTENTION;
  200. flags |= HTT_RX_RING_FLAGS_FRAG_INFO;
  201. flags |= HTT_RX_RING_FLAGS_UNICAST_RX;
  202. flags |= HTT_RX_RING_FLAGS_MULTICAST_RX;
  203. flags |= HTT_RX_RING_FLAGS_CTRL_RX;
  204. flags |= HTT_RX_RING_FLAGS_MGMT_RX;
  205. flags |= HTT_RX_RING_FLAGS_NULL_RX;
  206. flags |= HTT_RX_RING_FLAGS_PHY_DATA_RX;
  207. fw_idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
  208. ring->fw_idx_shadow_reg_paddr =
  209. __cpu_to_le32(htt->rx_ring.alloc_idx.paddr);
  210. ring->rx_ring_base_paddr = __cpu_to_le32(htt->rx_ring.base_paddr);
  211. ring->rx_ring_len = __cpu_to_le16(htt->rx_ring.size);
  212. ring->rx_ring_bufsize = __cpu_to_le16(HTT_RX_BUF_SIZE);
  213. ring->flags = __cpu_to_le16(flags);
  214. ring->fw_idx_init_val = __cpu_to_le16(fw_idx);
  215. #define desc_offset(x) (offsetof(struct htt_rx_desc, x) / 4)
  216. ring->mac80211_hdr_offset = __cpu_to_le16(desc_offset(rx_hdr_status));
  217. ring->msdu_payload_offset = __cpu_to_le16(desc_offset(msdu_payload));
  218. ring->ppdu_start_offset = __cpu_to_le16(desc_offset(ppdu_start));
  219. ring->ppdu_end_offset = __cpu_to_le16(desc_offset(ppdu_end));
  220. ring->mpdu_start_offset = __cpu_to_le16(desc_offset(mpdu_start));
  221. ring->mpdu_end_offset = __cpu_to_le16(desc_offset(mpdu_end));
  222. ring->msdu_start_offset = __cpu_to_le16(desc_offset(msdu_start));
  223. ring->msdu_end_offset = __cpu_to_le16(desc_offset(msdu_end));
  224. ring->rx_attention_offset = __cpu_to_le16(desc_offset(attention));
  225. ring->frag_info_offset = __cpu_to_le16(desc_offset(frag_info));
  226. #undef desc_offset
  227. ATH10K_SKB_CB(skb)->htt.is_conf = true;
  228. ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb);
  229. if (ret) {
  230. dev_kfree_skb_any(skb);
  231. return ret;
  232. }
  233. return 0;
  234. }
  235. int ath10k_htt_mgmt_tx(struct ath10k_htt *htt, struct sk_buff *msdu)
  236. {
  237. struct device *dev = htt->ar->dev;
  238. struct ath10k_skb_cb *skb_cb;
  239. struct sk_buff *txdesc = NULL;
  240. struct htt_cmd *cmd;
  241. u8 vdev_id = ATH10K_SKB_CB(msdu)->htt.vdev_id;
  242. int len = 0;
  243. int msdu_id = -1;
  244. int res;
  245. res = ath10k_htt_tx_inc_pending(htt);
  246. if (res)
  247. return res;
  248. len += sizeof(cmd->hdr);
  249. len += sizeof(cmd->mgmt_tx);
  250. txdesc = ath10k_htc_alloc_skb(len);
  251. if (!txdesc) {
  252. res = -ENOMEM;
  253. goto err;
  254. }
  255. spin_lock_bh(&htt->tx_lock);
  256. msdu_id = ath10k_htt_tx_alloc_msdu_id(htt);
  257. if (msdu_id < 0) {
  258. spin_unlock_bh(&htt->tx_lock);
  259. res = msdu_id;
  260. goto err;
  261. }
  262. htt->pending_tx[msdu_id] = txdesc;
  263. spin_unlock_bh(&htt->tx_lock);
  264. res = ath10k_skb_map(dev, msdu);
  265. if (res)
  266. goto err;
  267. skb_put(txdesc, len);
  268. cmd = (struct htt_cmd *)txdesc->data;
  269. cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_MGMT_TX;
  270. cmd->mgmt_tx.msdu_paddr = __cpu_to_le32(ATH10K_SKB_CB(msdu)->paddr);
  271. cmd->mgmt_tx.len = __cpu_to_le32(msdu->len);
  272. cmd->mgmt_tx.desc_id = __cpu_to_le32(msdu_id);
  273. cmd->mgmt_tx.vdev_id = __cpu_to_le32(vdev_id);
  274. memcpy(cmd->mgmt_tx.hdr, msdu->data,
  275. min_t(int, msdu->len, HTT_MGMT_FRM_HDR_DOWNLOAD_LEN));
  276. /* refcount is decremented by HTC and HTT completions until it reaches
  277. * zero and is freed */
  278. skb_cb = ATH10K_SKB_CB(txdesc);
  279. skb_cb->htt.msdu_id = msdu_id;
  280. skb_cb->htt.refcount = 2;
  281. skb_cb->htt.msdu = msdu;
  282. res = ath10k_htc_send(&htt->ar->htc, htt->eid, txdesc);
  283. if (res)
  284. goto err;
  285. return 0;
  286. err:
  287. ath10k_skb_unmap(dev, msdu);
  288. if (txdesc)
  289. dev_kfree_skb_any(txdesc);
  290. if (msdu_id >= 0) {
  291. spin_lock_bh(&htt->tx_lock);
  292. htt->pending_tx[msdu_id] = NULL;
  293. ath10k_htt_tx_free_msdu_id(htt, msdu_id);
  294. spin_unlock_bh(&htt->tx_lock);
  295. }
  296. ath10k_htt_tx_dec_pending(htt);
  297. return res;
  298. }
  299. int ath10k_htt_tx(struct ath10k_htt *htt, struct sk_buff *msdu)
  300. {
  301. struct device *dev = htt->ar->dev;
  302. struct htt_cmd *cmd;
  303. struct htt_data_tx_desc_frag *tx_frags;
  304. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)msdu->data;
  305. struct ath10k_skb_cb *skb_cb;
  306. struct sk_buff *txdesc = NULL;
  307. struct sk_buff *txfrag = NULL;
  308. u8 vdev_id = ATH10K_SKB_CB(msdu)->htt.vdev_id;
  309. u8 tid;
  310. int prefetch_len, desc_len, frag_len;
  311. dma_addr_t frags_paddr;
  312. int msdu_id = -1;
  313. int res;
  314. u8 flags0;
  315. u16 flags1;
  316. res = ath10k_htt_tx_inc_pending(htt);
  317. if (res)
  318. return res;
  319. prefetch_len = min(htt->prefetch_len, msdu->len);
  320. prefetch_len = roundup(prefetch_len, 4);
  321. desc_len = sizeof(cmd->hdr) + sizeof(cmd->data_tx) + prefetch_len;
  322. frag_len = sizeof(*tx_frags) * 2;
  323. txdesc = ath10k_htc_alloc_skb(desc_len);
  324. if (!txdesc) {
  325. res = -ENOMEM;
  326. goto err;
  327. }
  328. txfrag = dev_alloc_skb(frag_len);
  329. if (!txfrag) {
  330. res = -ENOMEM;
  331. goto err;
  332. }
  333. if (!IS_ALIGNED((unsigned long)txdesc->data, 4)) {
  334. ath10k_warn("htt alignment check failed. dropping packet.\n");
  335. res = -EIO;
  336. goto err;
  337. }
  338. spin_lock_bh(&htt->tx_lock);
  339. msdu_id = ath10k_htt_tx_alloc_msdu_id(htt);
  340. if (msdu_id < 0) {
  341. spin_unlock_bh(&htt->tx_lock);
  342. res = msdu_id;
  343. goto err;
  344. }
  345. htt->pending_tx[msdu_id] = txdesc;
  346. spin_unlock_bh(&htt->tx_lock);
  347. res = ath10k_skb_map(dev, msdu);
  348. if (res)
  349. goto err;
  350. /* tx fragment list must be terminated with zero-entry */
  351. skb_put(txfrag, frag_len);
  352. tx_frags = (struct htt_data_tx_desc_frag *)txfrag->data;
  353. tx_frags[0].paddr = __cpu_to_le32(ATH10K_SKB_CB(msdu)->paddr);
  354. tx_frags[0].len = __cpu_to_le32(msdu->len);
  355. tx_frags[1].paddr = __cpu_to_le32(0);
  356. tx_frags[1].len = __cpu_to_le32(0);
  357. res = ath10k_skb_map(dev, txfrag);
  358. if (res)
  359. goto err;
  360. ath10k_dbg(ATH10K_DBG_HTT, "txfrag 0x%llx msdu 0x%llx\n",
  361. (unsigned long long) ATH10K_SKB_CB(txfrag)->paddr,
  362. (unsigned long long) ATH10K_SKB_CB(msdu)->paddr);
  363. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "txfrag: ",
  364. txfrag->data, frag_len);
  365. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "msdu: ",
  366. msdu->data, msdu->len);
  367. skb_put(txdesc, desc_len);
  368. cmd = (struct htt_cmd *)txdesc->data;
  369. memset(cmd, 0, desc_len);
  370. tid = ATH10K_SKB_CB(msdu)->htt.tid;
  371. ath10k_dbg(ATH10K_DBG_HTT, "htt data tx using tid %hhu\n", tid);
  372. flags0 = 0;
  373. if (!ieee80211_has_protected(hdr->frame_control))
  374. flags0 |= HTT_DATA_TX_DESC_FLAGS0_NO_ENCRYPT;
  375. flags0 |= HTT_DATA_TX_DESC_FLAGS0_MAC_HDR_PRESENT;
  376. flags0 |= SM(ATH10K_HW_TXRX_NATIVE_WIFI,
  377. HTT_DATA_TX_DESC_FLAGS0_PKT_TYPE);
  378. flags1 = 0;
  379. flags1 |= SM((u16)vdev_id, HTT_DATA_TX_DESC_FLAGS1_VDEV_ID);
  380. flags1 |= SM((u16)tid, HTT_DATA_TX_DESC_FLAGS1_EXT_TID);
  381. flags1 |= HTT_DATA_TX_DESC_FLAGS1_CKSUM_L3_OFFLOAD;
  382. flags1 |= HTT_DATA_TX_DESC_FLAGS1_CKSUM_L4_OFFLOAD;
  383. frags_paddr = ATH10K_SKB_CB(txfrag)->paddr;
  384. cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_TX_FRM;
  385. cmd->data_tx.flags0 = flags0;
  386. cmd->data_tx.flags1 = __cpu_to_le16(flags1);
  387. cmd->data_tx.len = __cpu_to_le16(msdu->len);
  388. cmd->data_tx.id = __cpu_to_le16(msdu_id);
  389. cmd->data_tx.frags_paddr = __cpu_to_le32(frags_paddr);
  390. cmd->data_tx.peerid = __cpu_to_le32(HTT_INVALID_PEERID);
  391. memcpy(cmd->data_tx.prefetch, msdu->data, prefetch_len);
  392. /* refcount is decremented by HTC and HTT completions until it reaches
  393. * zero and is freed */
  394. skb_cb = ATH10K_SKB_CB(txdesc);
  395. skb_cb->htt.msdu_id = msdu_id;
  396. skb_cb->htt.refcount = 2;
  397. skb_cb->htt.txfrag = txfrag;
  398. skb_cb->htt.msdu = msdu;
  399. res = ath10k_htc_send(&htt->ar->htc, htt->eid, txdesc);
  400. if (res)
  401. goto err;
  402. return 0;
  403. err:
  404. if (txfrag)
  405. ath10k_skb_unmap(dev, txfrag);
  406. if (txdesc)
  407. dev_kfree_skb_any(txdesc);
  408. if (txfrag)
  409. dev_kfree_skb_any(txfrag);
  410. if (msdu_id >= 0) {
  411. spin_lock_bh(&htt->tx_lock);
  412. htt->pending_tx[msdu_id] = NULL;
  413. ath10k_htt_tx_free_msdu_id(htt, msdu_id);
  414. spin_unlock_bh(&htt->tx_lock);
  415. }
  416. ath10k_htt_tx_dec_pending(htt);
  417. ath10k_skb_unmap(dev, msdu);
  418. return res;
  419. }