htt_rx.c 33 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include "core.h"
  18. #include "htc.h"
  19. #include "htt.h"
  20. #include "txrx.h"
  21. #include "debug.h"
  22. #include <linux/log2.h>
  23. /* slightly larger than one large A-MPDU */
  24. #define HTT_RX_RING_SIZE_MIN 128
  25. /* roughly 20 ms @ 1 Gbps of 1500B MSDUs */
  26. #define HTT_RX_RING_SIZE_MAX 2048
  27. #define HTT_RX_AVG_FRM_BYTES 1000
  28. /* ms, very conservative */
  29. #define HTT_RX_HOST_LATENCY_MAX_MS 20
  30. /* ms, conservative */
  31. #define HTT_RX_HOST_LATENCY_WORST_LIKELY_MS 10
  32. /* when under memory pressure rx ring refill may fail and needs a retry */
  33. #define HTT_RX_RING_REFILL_RETRY_MS 50
  34. static int ath10k_htt_rx_ring_size(struct ath10k_htt *htt)
  35. {
  36. int size;
  37. /*
  38. * It is expected that the host CPU will typically be able to
  39. * service the rx indication from one A-MPDU before the rx
  40. * indication from the subsequent A-MPDU happens, roughly 1-2 ms
  41. * later. However, the rx ring should be sized very conservatively,
  42. * to accomodate the worst reasonable delay before the host CPU
  43. * services a rx indication interrupt.
  44. *
  45. * The rx ring need not be kept full of empty buffers. In theory,
  46. * the htt host SW can dynamically track the low-water mark in the
  47. * rx ring, and dynamically adjust the level to which the rx ring
  48. * is filled with empty buffers, to dynamically meet the desired
  49. * low-water mark.
  50. *
  51. * In contrast, it's difficult to resize the rx ring itself, once
  52. * it's in use. Thus, the ring itself should be sized very
  53. * conservatively, while the degree to which the ring is filled
  54. * with empty buffers should be sized moderately conservatively.
  55. */
  56. /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
  57. size =
  58. htt->max_throughput_mbps +
  59. 1000 /
  60. (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_MAX_MS;
  61. if (size < HTT_RX_RING_SIZE_MIN)
  62. size = HTT_RX_RING_SIZE_MIN;
  63. if (size > HTT_RX_RING_SIZE_MAX)
  64. size = HTT_RX_RING_SIZE_MAX;
  65. size = roundup_pow_of_two(size);
  66. return size;
  67. }
  68. static int ath10k_htt_rx_ring_fill_level(struct ath10k_htt *htt)
  69. {
  70. int size;
  71. /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
  72. size =
  73. htt->max_throughput_mbps *
  74. 1000 /
  75. (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_WORST_LIKELY_MS;
  76. /*
  77. * Make sure the fill level is at least 1 less than the ring size.
  78. * Leaving 1 element empty allows the SW to easily distinguish
  79. * between a full ring vs. an empty ring.
  80. */
  81. if (size >= htt->rx_ring.size)
  82. size = htt->rx_ring.size - 1;
  83. return size;
  84. }
  85. static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
  86. {
  87. struct sk_buff *skb;
  88. struct ath10k_skb_cb *cb;
  89. int i;
  90. for (i = 0; i < htt->rx_ring.fill_cnt; i++) {
  91. skb = htt->rx_ring.netbufs_ring[i];
  92. cb = ATH10K_SKB_CB(skb);
  93. dma_unmap_single(htt->ar->dev, cb->paddr,
  94. skb->len + skb_tailroom(skb),
  95. DMA_FROM_DEVICE);
  96. dev_kfree_skb_any(skb);
  97. }
  98. htt->rx_ring.fill_cnt = 0;
  99. }
  100. static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  101. {
  102. struct htt_rx_desc *rx_desc;
  103. struct sk_buff *skb;
  104. dma_addr_t paddr;
  105. int ret = 0, idx;
  106. idx = __le32_to_cpu(*(htt->rx_ring.alloc_idx.vaddr));
  107. while (num > 0) {
  108. skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
  109. if (!skb) {
  110. ret = -ENOMEM;
  111. goto fail;
  112. }
  113. if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
  114. skb_pull(skb,
  115. PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
  116. skb->data);
  117. /* Clear rx_desc attention word before posting to Rx ring */
  118. rx_desc = (struct htt_rx_desc *)skb->data;
  119. rx_desc->attention.flags = __cpu_to_le32(0);
  120. paddr = dma_map_single(htt->ar->dev, skb->data,
  121. skb->len + skb_tailroom(skb),
  122. DMA_FROM_DEVICE);
  123. if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
  124. dev_kfree_skb_any(skb);
  125. ret = -ENOMEM;
  126. goto fail;
  127. }
  128. ATH10K_SKB_CB(skb)->paddr = paddr;
  129. htt->rx_ring.netbufs_ring[idx] = skb;
  130. htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
  131. htt->rx_ring.fill_cnt++;
  132. num--;
  133. idx++;
  134. idx &= htt->rx_ring.size_mask;
  135. }
  136. fail:
  137. *(htt->rx_ring.alloc_idx.vaddr) = __cpu_to_le32(idx);
  138. return ret;
  139. }
  140. static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  141. {
  142. lockdep_assert_held(&htt->rx_ring.lock);
  143. return __ath10k_htt_rx_ring_fill_n(htt, num);
  144. }
  145. static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
  146. {
  147. int ret, num_to_fill;
  148. spin_lock_bh(&htt->rx_ring.lock);
  149. num_to_fill = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
  150. ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
  151. if (ret == -ENOMEM) {
  152. /*
  153. * Failed to fill it to the desired level -
  154. * we'll start a timer and try again next time.
  155. * As long as enough buffers are left in the ring for
  156. * another A-MPDU rx, no special recovery is needed.
  157. */
  158. mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
  159. msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
  160. }
  161. spin_unlock_bh(&htt->rx_ring.lock);
  162. }
  163. static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
  164. {
  165. struct ath10k_htt *htt = (struct ath10k_htt *)arg;
  166. ath10k_htt_rx_msdu_buff_replenish(htt);
  167. }
  168. static unsigned ath10k_htt_rx_ring_elems(struct ath10k_htt *htt)
  169. {
  170. return (__le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr) -
  171. htt->rx_ring.sw_rd_idx.msdu_payld) & htt->rx_ring.size_mask;
  172. }
  173. void ath10k_htt_rx_detach(struct ath10k_htt *htt)
  174. {
  175. int sw_rd_idx = htt->rx_ring.sw_rd_idx.msdu_payld;
  176. del_timer_sync(&htt->rx_ring.refill_retry_timer);
  177. while (sw_rd_idx != __le32_to_cpu(*(htt->rx_ring.alloc_idx.vaddr))) {
  178. struct sk_buff *skb =
  179. htt->rx_ring.netbufs_ring[sw_rd_idx];
  180. struct ath10k_skb_cb *cb = ATH10K_SKB_CB(skb);
  181. dma_unmap_single(htt->ar->dev, cb->paddr,
  182. skb->len + skb_tailroom(skb),
  183. DMA_FROM_DEVICE);
  184. dev_kfree_skb_any(htt->rx_ring.netbufs_ring[sw_rd_idx]);
  185. sw_rd_idx++;
  186. sw_rd_idx &= htt->rx_ring.size_mask;
  187. }
  188. dma_free_coherent(htt->ar->dev,
  189. (htt->rx_ring.size *
  190. sizeof(htt->rx_ring.paddrs_ring)),
  191. htt->rx_ring.paddrs_ring,
  192. htt->rx_ring.base_paddr);
  193. dma_free_coherent(htt->ar->dev,
  194. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  195. htt->rx_ring.alloc_idx.vaddr,
  196. htt->rx_ring.alloc_idx.paddr);
  197. kfree(htt->rx_ring.netbufs_ring);
  198. }
  199. static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
  200. {
  201. int idx;
  202. struct sk_buff *msdu;
  203. spin_lock_bh(&htt->rx_ring.lock);
  204. if (ath10k_htt_rx_ring_elems(htt) == 0)
  205. ath10k_warn("htt rx ring is empty!\n");
  206. idx = htt->rx_ring.sw_rd_idx.msdu_payld;
  207. msdu = htt->rx_ring.netbufs_ring[idx];
  208. idx++;
  209. idx &= htt->rx_ring.size_mask;
  210. htt->rx_ring.sw_rd_idx.msdu_payld = idx;
  211. htt->rx_ring.fill_cnt--;
  212. spin_unlock_bh(&htt->rx_ring.lock);
  213. return msdu;
  214. }
  215. static void ath10k_htt_rx_free_msdu_chain(struct sk_buff *skb)
  216. {
  217. struct sk_buff *next;
  218. while (skb) {
  219. next = skb->next;
  220. dev_kfree_skb_any(skb);
  221. skb = next;
  222. }
  223. }
  224. static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
  225. u8 **fw_desc, int *fw_desc_len,
  226. struct sk_buff **head_msdu,
  227. struct sk_buff **tail_msdu)
  228. {
  229. int msdu_len, msdu_chaining = 0;
  230. struct sk_buff *msdu;
  231. struct htt_rx_desc *rx_desc;
  232. if (ath10k_htt_rx_ring_elems(htt) == 0)
  233. ath10k_warn("htt rx ring is empty!\n");
  234. if (htt->rx_confused) {
  235. ath10k_warn("htt is confused. refusing rx\n");
  236. return 0;
  237. }
  238. msdu = *head_msdu = ath10k_htt_rx_netbuf_pop(htt);
  239. while (msdu) {
  240. int last_msdu, msdu_len_invalid, msdu_chained;
  241. dma_unmap_single(htt->ar->dev,
  242. ATH10K_SKB_CB(msdu)->paddr,
  243. msdu->len + skb_tailroom(msdu),
  244. DMA_FROM_DEVICE);
  245. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx: ",
  246. msdu->data, msdu->len + skb_tailroom(msdu));
  247. rx_desc = (struct htt_rx_desc *)msdu->data;
  248. /* FIXME: we must report msdu payload since this is what caller
  249. * expects now */
  250. skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
  251. skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
  252. /*
  253. * Sanity check - confirm the HW is finished filling in the
  254. * rx data.
  255. * If the HW and SW are working correctly, then it's guaranteed
  256. * that the HW's MAC DMA is done before this point in the SW.
  257. * To prevent the case that we handle a stale Rx descriptor,
  258. * just assert for now until we have a way to recover.
  259. */
  260. if (!(__le32_to_cpu(rx_desc->attention.flags)
  261. & RX_ATTENTION_FLAGS_MSDU_DONE)) {
  262. ath10k_htt_rx_free_msdu_chain(*head_msdu);
  263. *head_msdu = NULL;
  264. msdu = NULL;
  265. ath10k_err("htt rx stopped. cannot recover\n");
  266. htt->rx_confused = true;
  267. break;
  268. }
  269. /*
  270. * Copy the FW rx descriptor for this MSDU from the rx
  271. * indication message into the MSDU's netbuf. HL uses the
  272. * same rx indication message definition as LL, and simply
  273. * appends new info (fields from the HW rx desc, and the
  274. * MSDU payload itself). So, the offset into the rx
  275. * indication message only has to account for the standard
  276. * offset of the per-MSDU FW rx desc info within the
  277. * message, and how many bytes of the per-MSDU FW rx desc
  278. * info have already been consumed. (And the endianness of
  279. * the host, since for a big-endian host, the rx ind
  280. * message contents, including the per-MSDU rx desc bytes,
  281. * were byteswapped during upload.)
  282. */
  283. if (*fw_desc_len > 0) {
  284. rx_desc->fw_desc.info0 = **fw_desc;
  285. /*
  286. * The target is expected to only provide the basic
  287. * per-MSDU rx descriptors. Just to be sure, verify
  288. * that the target has not attached extension data
  289. * (e.g. LRO flow ID).
  290. */
  291. /* or more, if there's extension data */
  292. (*fw_desc)++;
  293. (*fw_desc_len)--;
  294. } else {
  295. /*
  296. * When an oversized AMSDU happened, FW will lost
  297. * some of MSDU status - in this case, the FW
  298. * descriptors provided will be less than the
  299. * actual MSDUs inside this MPDU. Mark the FW
  300. * descriptors so that it will still deliver to
  301. * upper stack, if no CRC error for this MPDU.
  302. *
  303. * FIX THIS - the FW descriptors are actually for
  304. * MSDUs in the end of this A-MSDU instead of the
  305. * beginning.
  306. */
  307. rx_desc->fw_desc.info0 = 0;
  308. }
  309. msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
  310. & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
  311. RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
  312. msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.info0),
  313. RX_MSDU_START_INFO0_MSDU_LENGTH);
  314. msdu_chained = rx_desc->frag_info.ring2_more_count;
  315. if (msdu_len_invalid)
  316. msdu_len = 0;
  317. skb_trim(msdu, 0);
  318. skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
  319. msdu_len -= msdu->len;
  320. /* FIXME: Do chained buffers include htt_rx_desc or not? */
  321. while (msdu_chained--) {
  322. struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
  323. dma_unmap_single(htt->ar->dev,
  324. ATH10K_SKB_CB(next)->paddr,
  325. next->len + skb_tailroom(next),
  326. DMA_FROM_DEVICE);
  327. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx: ",
  328. next->data,
  329. next->len + skb_tailroom(next));
  330. skb_trim(next, 0);
  331. skb_put(next, min(msdu_len, HTT_RX_BUF_SIZE));
  332. msdu_len -= next->len;
  333. msdu->next = next;
  334. msdu = next;
  335. msdu_chaining = 1;
  336. }
  337. if (msdu_len > 0) {
  338. /* This may suggest FW bug? */
  339. ath10k_warn("htt rx msdu len not consumed (%d)\n",
  340. msdu_len);
  341. }
  342. last_msdu = __le32_to_cpu(rx_desc->msdu_end.info0) &
  343. RX_MSDU_END_INFO0_LAST_MSDU;
  344. if (last_msdu) {
  345. msdu->next = NULL;
  346. break;
  347. } else {
  348. struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
  349. msdu->next = next;
  350. msdu = next;
  351. }
  352. }
  353. *tail_msdu = msdu;
  354. /*
  355. * Don't refill the ring yet.
  356. *
  357. * First, the elements popped here are still in use - it is not
  358. * safe to overwrite them until the matching call to
  359. * mpdu_desc_list_next. Second, for efficiency it is preferable to
  360. * refill the rx ring with 1 PPDU's worth of rx buffers (something
  361. * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
  362. * (something like 3 buffers). Consequently, we'll rely on the txrx
  363. * SW to tell us when it is done pulling all the PPDU's rx buffers
  364. * out of the rx ring, and then refill it just once.
  365. */
  366. return msdu_chaining;
  367. }
  368. int ath10k_htt_rx_attach(struct ath10k_htt *htt)
  369. {
  370. dma_addr_t paddr;
  371. void *vaddr;
  372. struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
  373. htt->rx_ring.size = ath10k_htt_rx_ring_size(htt);
  374. if (!is_power_of_2(htt->rx_ring.size)) {
  375. ath10k_warn("htt rx ring size is not power of 2\n");
  376. return -EINVAL;
  377. }
  378. htt->rx_ring.size_mask = htt->rx_ring.size - 1;
  379. /*
  380. * Set the initial value for the level to which the rx ring
  381. * should be filled, based on the max throughput and the
  382. * worst likely latency for the host to fill the rx ring
  383. * with new buffers. In theory, this fill level can be
  384. * dynamically adjusted from the initial value set here, to
  385. * reflect the actual host latency rather than a
  386. * conservative assumption about the host latency.
  387. */
  388. htt->rx_ring.fill_level = ath10k_htt_rx_ring_fill_level(htt);
  389. htt->rx_ring.netbufs_ring =
  390. kmalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
  391. GFP_KERNEL);
  392. if (!htt->rx_ring.netbufs_ring)
  393. goto err_netbuf;
  394. vaddr = dma_alloc_coherent(htt->ar->dev,
  395. (htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring)),
  396. &paddr, GFP_DMA);
  397. if (!vaddr)
  398. goto err_dma_ring;
  399. htt->rx_ring.paddrs_ring = vaddr;
  400. htt->rx_ring.base_paddr = paddr;
  401. vaddr = dma_alloc_coherent(htt->ar->dev,
  402. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  403. &paddr, GFP_DMA);
  404. if (!vaddr)
  405. goto err_dma_idx;
  406. htt->rx_ring.alloc_idx.vaddr = vaddr;
  407. htt->rx_ring.alloc_idx.paddr = paddr;
  408. htt->rx_ring.sw_rd_idx.msdu_payld = 0;
  409. *htt->rx_ring.alloc_idx.vaddr = 0;
  410. /* Initialize the Rx refill retry timer */
  411. setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
  412. spin_lock_init(&htt->rx_ring.lock);
  413. htt->rx_ring.fill_cnt = 0;
  414. if (__ath10k_htt_rx_ring_fill_n(htt, htt->rx_ring.fill_level))
  415. goto err_fill_ring;
  416. ath10k_dbg(ATH10K_DBG_HTT, "HTT RX ring size: %d, fill_level: %d\n",
  417. htt->rx_ring.size, htt->rx_ring.fill_level);
  418. return 0;
  419. err_fill_ring:
  420. ath10k_htt_rx_ring_free(htt);
  421. dma_free_coherent(htt->ar->dev,
  422. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  423. htt->rx_ring.alloc_idx.vaddr,
  424. htt->rx_ring.alloc_idx.paddr);
  425. err_dma_idx:
  426. dma_free_coherent(htt->ar->dev,
  427. (htt->rx_ring.size *
  428. sizeof(htt->rx_ring.paddrs_ring)),
  429. htt->rx_ring.paddrs_ring,
  430. htt->rx_ring.base_paddr);
  431. err_dma_ring:
  432. kfree(htt->rx_ring.netbufs_ring);
  433. err_netbuf:
  434. return -ENOMEM;
  435. }
  436. static int ath10k_htt_rx_crypto_param_len(enum htt_rx_mpdu_encrypt_type type)
  437. {
  438. switch (type) {
  439. case HTT_RX_MPDU_ENCRYPT_WEP40:
  440. case HTT_RX_MPDU_ENCRYPT_WEP104:
  441. return 4;
  442. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  443. case HTT_RX_MPDU_ENCRYPT_WEP128: /* not tested */
  444. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  445. case HTT_RX_MPDU_ENCRYPT_WAPI: /* not tested */
  446. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  447. return 8;
  448. case HTT_RX_MPDU_ENCRYPT_NONE:
  449. return 0;
  450. }
  451. ath10k_warn("unknown encryption type %d\n", type);
  452. return 0;
  453. }
  454. static int ath10k_htt_rx_crypto_tail_len(enum htt_rx_mpdu_encrypt_type type)
  455. {
  456. switch (type) {
  457. case HTT_RX_MPDU_ENCRYPT_NONE:
  458. case HTT_RX_MPDU_ENCRYPT_WEP40:
  459. case HTT_RX_MPDU_ENCRYPT_WEP104:
  460. case HTT_RX_MPDU_ENCRYPT_WEP128:
  461. case HTT_RX_MPDU_ENCRYPT_WAPI:
  462. return 0;
  463. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  464. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  465. return 4;
  466. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  467. return 8;
  468. }
  469. ath10k_warn("unknown encryption type %d\n", type);
  470. return 0;
  471. }
  472. /* Applies for first msdu in chain, before altering it. */
  473. static struct ieee80211_hdr *ath10k_htt_rx_skb_get_hdr(struct sk_buff *skb)
  474. {
  475. struct htt_rx_desc *rxd;
  476. enum rx_msdu_decap_format fmt;
  477. rxd = (void *)skb->data - sizeof(*rxd);
  478. fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
  479. RX_MSDU_START_INFO1_DECAP_FORMAT);
  480. if (fmt == RX_MSDU_DECAP_RAW)
  481. return (void *)skb->data;
  482. else
  483. return (void *)skb->data - RX_HTT_HDR_STATUS_LEN;
  484. }
  485. /* This function only applies for first msdu in an msdu chain */
  486. static bool ath10k_htt_rx_hdr_is_amsdu(struct ieee80211_hdr *hdr)
  487. {
  488. if (ieee80211_is_data_qos(hdr->frame_control)) {
  489. u8 *qc = ieee80211_get_qos_ctl(hdr);
  490. if (qc[0] & 0x80)
  491. return true;
  492. }
  493. return false;
  494. }
  495. static int ath10k_htt_rx_amsdu(struct ath10k_htt *htt,
  496. struct htt_rx_info *info)
  497. {
  498. struct htt_rx_desc *rxd;
  499. struct sk_buff *amsdu;
  500. struct sk_buff *first;
  501. struct ieee80211_hdr *hdr;
  502. struct sk_buff *skb = info->skb;
  503. enum rx_msdu_decap_format fmt;
  504. enum htt_rx_mpdu_encrypt_type enctype;
  505. unsigned int hdr_len;
  506. int crypto_len;
  507. rxd = (void *)skb->data - sizeof(*rxd);
  508. fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
  509. RX_MSDU_START_INFO1_DECAP_FORMAT);
  510. enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  511. RX_MPDU_START_INFO0_ENCRYPT_TYPE);
  512. /* FIXME: No idea what assumptions are safe here. Need logs */
  513. if ((fmt == RX_MSDU_DECAP_RAW && skb->next) ||
  514. (fmt == RX_MSDU_DECAP_8023_SNAP_LLC)) {
  515. ath10k_htt_rx_free_msdu_chain(skb->next);
  516. skb->next = NULL;
  517. return -ENOTSUPP;
  518. }
  519. /* A-MSDU max is a little less than 8K */
  520. amsdu = dev_alloc_skb(8*1024);
  521. if (!amsdu) {
  522. ath10k_warn("A-MSDU allocation failed\n");
  523. ath10k_htt_rx_free_msdu_chain(skb->next);
  524. skb->next = NULL;
  525. return -ENOMEM;
  526. }
  527. if (fmt >= RX_MSDU_DECAP_NATIVE_WIFI) {
  528. int hdrlen;
  529. hdr = (void *)rxd->rx_hdr_status;
  530. hdrlen = ieee80211_hdrlen(hdr->frame_control);
  531. memcpy(skb_put(amsdu, hdrlen), hdr, hdrlen);
  532. }
  533. first = skb;
  534. while (skb) {
  535. void *decap_hdr;
  536. int decap_len = 0;
  537. rxd = (void *)skb->data - sizeof(*rxd);
  538. fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
  539. RX_MSDU_START_INFO1_DECAP_FORMAT);
  540. decap_hdr = (void *)rxd->rx_hdr_status;
  541. if (skb == first) {
  542. /* We receive linked A-MSDU subframe skbuffs. The
  543. * first one contains the original 802.11 header (and
  544. * possible crypto param) in the RX descriptor. The
  545. * A-MSDU subframe header follows that. Each part is
  546. * aligned to 4 byte boundary. */
  547. hdr = (void *)amsdu->data;
  548. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  549. crypto_len = ath10k_htt_rx_crypto_param_len(enctype);
  550. decap_hdr += roundup(hdr_len, 4);
  551. decap_hdr += roundup(crypto_len, 4);
  552. }
  553. if (fmt == RX_MSDU_DECAP_ETHERNET2_DIX) {
  554. /* Ethernet2 decap inserts ethernet header in place of
  555. * A-MSDU subframe header. */
  556. skb_pull(skb, 6 + 6 + 2);
  557. /* A-MSDU subframe header length */
  558. decap_len += 6 + 6 + 2;
  559. /* Ethernet2 decap also strips the LLC/SNAP so we need
  560. * to re-insert it. The LLC/SNAP follows A-MSDU
  561. * subframe header. */
  562. /* FIXME: Not all LLCs are 8 bytes long */
  563. decap_len += 8;
  564. memcpy(skb_put(amsdu, decap_len), decap_hdr, decap_len);
  565. }
  566. if (fmt == RX_MSDU_DECAP_NATIVE_WIFI) {
  567. /* Native Wifi decap inserts regular 802.11 header
  568. * in place of A-MSDU subframe header. */
  569. hdr = (struct ieee80211_hdr *)skb->data;
  570. skb_pull(skb, ieee80211_hdrlen(hdr->frame_control));
  571. /* A-MSDU subframe header length */
  572. decap_len += 6 + 6 + 2;
  573. memcpy(skb_put(amsdu, decap_len), decap_hdr, decap_len);
  574. }
  575. if (fmt == RX_MSDU_DECAP_RAW)
  576. skb_trim(skb, skb->len - 4); /* remove FCS */
  577. memcpy(skb_put(amsdu, skb->len), skb->data, skb->len);
  578. /* A-MSDU subframes are padded to 4bytes
  579. * but relative to first subframe, not the whole MPDU */
  580. if (skb->next && ((decap_len + skb->len) & 3)) {
  581. int padlen = 4 - ((decap_len + skb->len) & 3);
  582. memset(skb_put(amsdu, padlen), 0, padlen);
  583. }
  584. skb = skb->next;
  585. }
  586. info->skb = amsdu;
  587. info->encrypt_type = enctype;
  588. ath10k_htt_rx_free_msdu_chain(first);
  589. return 0;
  590. }
  591. static int ath10k_htt_rx_msdu(struct ath10k_htt *htt, struct htt_rx_info *info)
  592. {
  593. struct sk_buff *skb = info->skb;
  594. struct htt_rx_desc *rxd;
  595. struct ieee80211_hdr *hdr;
  596. enum rx_msdu_decap_format fmt;
  597. enum htt_rx_mpdu_encrypt_type enctype;
  598. /* This shouldn't happen. If it does than it may be a FW bug. */
  599. if (skb->next) {
  600. ath10k_warn("received chained non A-MSDU frame\n");
  601. ath10k_htt_rx_free_msdu_chain(skb->next);
  602. skb->next = NULL;
  603. }
  604. rxd = (void *)skb->data - sizeof(*rxd);
  605. fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
  606. RX_MSDU_START_INFO1_DECAP_FORMAT);
  607. enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  608. RX_MPDU_START_INFO0_ENCRYPT_TYPE);
  609. hdr = (void *)skb->data - RX_HTT_HDR_STATUS_LEN;
  610. switch (fmt) {
  611. case RX_MSDU_DECAP_RAW:
  612. /* remove trailing FCS */
  613. skb_trim(skb, skb->len - 4);
  614. break;
  615. case RX_MSDU_DECAP_NATIVE_WIFI:
  616. /* nothing to do here */
  617. break;
  618. case RX_MSDU_DECAP_ETHERNET2_DIX:
  619. /* macaddr[6] + macaddr[6] + ethertype[2] */
  620. skb_pull(skb, 6 + 6 + 2);
  621. break;
  622. case RX_MSDU_DECAP_8023_SNAP_LLC:
  623. /* macaddr[6] + macaddr[6] + len[2] */
  624. /* we don't need this for non-A-MSDU */
  625. skb_pull(skb, 6 + 6 + 2);
  626. break;
  627. }
  628. if (fmt == RX_MSDU_DECAP_ETHERNET2_DIX) {
  629. void *llc;
  630. int llclen;
  631. llclen = 8;
  632. llc = hdr;
  633. llc += roundup(ieee80211_hdrlen(hdr->frame_control), 4);
  634. llc += roundup(ath10k_htt_rx_crypto_param_len(enctype), 4);
  635. skb_push(skb, llclen);
  636. memcpy(skb->data, llc, llclen);
  637. }
  638. if (fmt >= RX_MSDU_DECAP_ETHERNET2_DIX) {
  639. int len = ieee80211_hdrlen(hdr->frame_control);
  640. skb_push(skb, len);
  641. memcpy(skb->data, hdr, len);
  642. }
  643. info->skb = skb;
  644. info->encrypt_type = enctype;
  645. return 0;
  646. }
  647. static bool ath10k_htt_rx_has_decrypt_err(struct sk_buff *skb)
  648. {
  649. struct htt_rx_desc *rxd;
  650. u32 flags;
  651. rxd = (void *)skb->data - sizeof(*rxd);
  652. flags = __le32_to_cpu(rxd->attention.flags);
  653. if (flags & RX_ATTENTION_FLAGS_DECRYPT_ERR)
  654. return true;
  655. return false;
  656. }
  657. static bool ath10k_htt_rx_has_fcs_err(struct sk_buff *skb)
  658. {
  659. struct htt_rx_desc *rxd;
  660. u32 flags;
  661. rxd = (void *)skb->data - sizeof(*rxd);
  662. flags = __le32_to_cpu(rxd->attention.flags);
  663. if (flags & RX_ATTENTION_FLAGS_FCS_ERR)
  664. return true;
  665. return false;
  666. }
  667. static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
  668. {
  669. struct htt_rx_desc *rxd;
  670. u32 flags, info;
  671. bool is_ip4, is_ip6;
  672. bool is_tcp, is_udp;
  673. bool ip_csum_ok, tcpudp_csum_ok;
  674. rxd = (void *)skb->data - sizeof(*rxd);
  675. flags = __le32_to_cpu(rxd->attention.flags);
  676. info = __le32_to_cpu(rxd->msdu_start.info1);
  677. is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
  678. is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
  679. is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
  680. is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
  681. ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
  682. tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
  683. if (!is_ip4 && !is_ip6)
  684. return CHECKSUM_NONE;
  685. if (!is_tcp && !is_udp)
  686. return CHECKSUM_NONE;
  687. if (!ip_csum_ok)
  688. return CHECKSUM_NONE;
  689. if (!tcpudp_csum_ok)
  690. return CHECKSUM_NONE;
  691. return CHECKSUM_UNNECESSARY;
  692. }
  693. static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
  694. struct htt_rx_indication *rx)
  695. {
  696. struct htt_rx_info info;
  697. struct htt_rx_indication_mpdu_range *mpdu_ranges;
  698. struct ieee80211_hdr *hdr;
  699. int num_mpdu_ranges;
  700. int fw_desc_len;
  701. u8 *fw_desc;
  702. int i, j;
  703. int ret;
  704. int ip_summed;
  705. memset(&info, 0, sizeof(info));
  706. fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes);
  707. fw_desc = (u8 *)&rx->fw_desc;
  708. num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
  709. HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
  710. mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
  711. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
  712. rx, sizeof(*rx) +
  713. (sizeof(struct htt_rx_indication_mpdu_range) *
  714. num_mpdu_ranges));
  715. for (i = 0; i < num_mpdu_ranges; i++) {
  716. info.status = mpdu_ranges[i].mpdu_range_status;
  717. for (j = 0; j < mpdu_ranges[i].mpdu_count; j++) {
  718. struct sk_buff *msdu_head, *msdu_tail;
  719. enum htt_rx_mpdu_status status;
  720. int msdu_chaining;
  721. msdu_head = NULL;
  722. msdu_tail = NULL;
  723. msdu_chaining = ath10k_htt_rx_amsdu_pop(htt,
  724. &fw_desc,
  725. &fw_desc_len,
  726. &msdu_head,
  727. &msdu_tail);
  728. if (!msdu_head) {
  729. ath10k_warn("htt rx no data!\n");
  730. continue;
  731. }
  732. if (msdu_head->len == 0) {
  733. ath10k_dbg(ATH10K_DBG_HTT,
  734. "htt rx dropping due to zero-len\n");
  735. ath10k_htt_rx_free_msdu_chain(msdu_head);
  736. continue;
  737. }
  738. if (ath10k_htt_rx_has_decrypt_err(msdu_head)) {
  739. ath10k_htt_rx_free_msdu_chain(msdu_head);
  740. continue;
  741. }
  742. status = info.status;
  743. /* Skip mgmt frames while we handle this in WMI */
  744. if (status == HTT_RX_IND_MPDU_STATUS_MGMT_CTRL) {
  745. ath10k_htt_rx_free_msdu_chain(msdu_head);
  746. continue;
  747. }
  748. if (status != HTT_RX_IND_MPDU_STATUS_OK &&
  749. status != HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR &&
  750. !htt->ar->monitor_enabled) {
  751. ath10k_dbg(ATH10K_DBG_HTT,
  752. "htt rx ignoring frame w/ status %d\n",
  753. status);
  754. ath10k_htt_rx_free_msdu_chain(msdu_head);
  755. continue;
  756. }
  757. /* FIXME: we do not support chaining yet.
  758. * this needs investigation */
  759. if (msdu_chaining) {
  760. ath10k_warn("msdu_chaining is true\n");
  761. ath10k_htt_rx_free_msdu_chain(msdu_head);
  762. continue;
  763. }
  764. /* The skb is not yet processed and it may be
  765. * reallocated. Since the offload is in the original
  766. * skb extract the checksum now and assign it later */
  767. ip_summed = ath10k_htt_rx_get_csum_state(msdu_head);
  768. info.skb = msdu_head;
  769. info.fcs_err = ath10k_htt_rx_has_fcs_err(msdu_head);
  770. info.signal = ATH10K_DEFAULT_NOISE_FLOOR;
  771. info.signal += rx->ppdu.combined_rssi;
  772. info.rate.info0 = rx->ppdu.info0;
  773. info.rate.info1 = __le32_to_cpu(rx->ppdu.info1);
  774. info.rate.info2 = __le32_to_cpu(rx->ppdu.info2);
  775. hdr = ath10k_htt_rx_skb_get_hdr(msdu_head);
  776. if (ath10k_htt_rx_hdr_is_amsdu(hdr))
  777. ret = ath10k_htt_rx_amsdu(htt, &info);
  778. else
  779. ret = ath10k_htt_rx_msdu(htt, &info);
  780. if (ret && !info.fcs_err) {
  781. ath10k_warn("error processing msdus %d\n", ret);
  782. dev_kfree_skb_any(info.skb);
  783. continue;
  784. }
  785. if (ath10k_htt_rx_hdr_is_amsdu((void *)info.skb->data))
  786. ath10k_dbg(ATH10K_DBG_HTT, "htt mpdu is amsdu\n");
  787. info.skb->ip_summed = ip_summed;
  788. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt mpdu: ",
  789. info.skb->data, info.skb->len);
  790. ath10k_process_rx(htt->ar, &info);
  791. }
  792. }
  793. ath10k_htt_rx_msdu_buff_replenish(htt);
  794. }
  795. static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
  796. struct htt_rx_fragment_indication *frag)
  797. {
  798. struct sk_buff *msdu_head, *msdu_tail;
  799. struct htt_rx_desc *rxd;
  800. enum rx_msdu_decap_format fmt;
  801. struct htt_rx_info info = {};
  802. struct ieee80211_hdr *hdr;
  803. int msdu_chaining;
  804. bool tkip_mic_err;
  805. bool decrypt_err;
  806. u8 *fw_desc;
  807. int fw_desc_len, hdrlen, paramlen;
  808. int trim;
  809. fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes);
  810. fw_desc = (u8 *)frag->fw_msdu_rx_desc;
  811. msdu_head = NULL;
  812. msdu_tail = NULL;
  813. msdu_chaining = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len,
  814. &msdu_head, &msdu_tail);
  815. ath10k_dbg(ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
  816. if (!msdu_head) {
  817. ath10k_warn("htt rx frag no data\n");
  818. return;
  819. }
  820. if (msdu_chaining || msdu_head != msdu_tail) {
  821. ath10k_warn("aggregation with fragmentation?!\n");
  822. ath10k_htt_rx_free_msdu_chain(msdu_head);
  823. return;
  824. }
  825. /* FIXME: implement signal strength */
  826. hdr = (struct ieee80211_hdr *)msdu_head->data;
  827. rxd = (void *)msdu_head->data - sizeof(*rxd);
  828. tkip_mic_err = !!(__le32_to_cpu(rxd->attention.flags) &
  829. RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
  830. decrypt_err = !!(__le32_to_cpu(rxd->attention.flags) &
  831. RX_ATTENTION_FLAGS_DECRYPT_ERR);
  832. fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
  833. RX_MSDU_START_INFO1_DECAP_FORMAT);
  834. if (fmt != RX_MSDU_DECAP_RAW) {
  835. ath10k_warn("we dont support non-raw fragmented rx yet\n");
  836. dev_kfree_skb_any(msdu_head);
  837. goto end;
  838. }
  839. info.skb = msdu_head;
  840. info.status = HTT_RX_IND_MPDU_STATUS_OK;
  841. info.encrypt_type = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  842. RX_MPDU_START_INFO0_ENCRYPT_TYPE);
  843. info.skb->ip_summed = ath10k_htt_rx_get_csum_state(info.skb);
  844. if (tkip_mic_err) {
  845. ath10k_warn("tkip mic error\n");
  846. info.status = HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR;
  847. }
  848. if (decrypt_err) {
  849. ath10k_warn("decryption err in fragmented rx\n");
  850. dev_kfree_skb_any(info.skb);
  851. goto end;
  852. }
  853. if (info.encrypt_type != HTT_RX_MPDU_ENCRYPT_NONE) {
  854. hdrlen = ieee80211_hdrlen(hdr->frame_control);
  855. paramlen = ath10k_htt_rx_crypto_param_len(info.encrypt_type);
  856. /* It is more efficient to move the header than the payload */
  857. memmove((void *)info.skb->data + paramlen,
  858. (void *)info.skb->data,
  859. hdrlen);
  860. skb_pull(info.skb, paramlen);
  861. hdr = (struct ieee80211_hdr *)info.skb->data;
  862. }
  863. /* remove trailing FCS */
  864. trim = 4;
  865. /* remove crypto trailer */
  866. trim += ath10k_htt_rx_crypto_tail_len(info.encrypt_type);
  867. /* last fragment of TKIP frags has MIC */
  868. if (!ieee80211_has_morefrags(hdr->frame_control) &&
  869. info.encrypt_type == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
  870. trim += 8;
  871. if (trim > info.skb->len) {
  872. ath10k_warn("htt rx fragment: trailer longer than the frame itself? drop\n");
  873. dev_kfree_skb_any(info.skb);
  874. goto end;
  875. }
  876. skb_trim(info.skb, info.skb->len - trim);
  877. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt frag mpdu: ",
  878. info.skb->data, info.skb->len);
  879. ath10k_process_rx(htt->ar, &info);
  880. end:
  881. if (fw_desc_len > 0) {
  882. ath10k_dbg(ATH10K_DBG_HTT,
  883. "expecting more fragmented rx in one indication %d\n",
  884. fw_desc_len);
  885. }
  886. }
  887. void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
  888. {
  889. struct ath10k_htt *htt = &ar->htt;
  890. struct htt_resp *resp = (struct htt_resp *)skb->data;
  891. /* confirm alignment */
  892. if (!IS_ALIGNED((unsigned long)skb->data, 4))
  893. ath10k_warn("unaligned htt message, expect trouble\n");
  894. ath10k_dbg(ATH10K_DBG_HTT, "HTT RX, msg_type: 0x%0X\n",
  895. resp->hdr.msg_type);
  896. switch (resp->hdr.msg_type) {
  897. case HTT_T2H_MSG_TYPE_VERSION_CONF: {
  898. htt->target_version_major = resp->ver_resp.major;
  899. htt->target_version_minor = resp->ver_resp.minor;
  900. complete(&htt->target_version_received);
  901. break;
  902. }
  903. case HTT_T2H_MSG_TYPE_RX_IND: {
  904. ath10k_htt_rx_handler(htt, &resp->rx_ind);
  905. break;
  906. }
  907. case HTT_T2H_MSG_TYPE_PEER_MAP: {
  908. struct htt_peer_map_event ev = {
  909. .vdev_id = resp->peer_map.vdev_id,
  910. .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
  911. };
  912. memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
  913. ath10k_peer_map_event(htt, &ev);
  914. break;
  915. }
  916. case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
  917. struct htt_peer_unmap_event ev = {
  918. .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
  919. };
  920. ath10k_peer_unmap_event(htt, &ev);
  921. break;
  922. }
  923. case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
  924. struct htt_tx_done tx_done = {};
  925. int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
  926. tx_done.msdu_id =
  927. __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
  928. switch (status) {
  929. case HTT_MGMT_TX_STATUS_OK:
  930. break;
  931. case HTT_MGMT_TX_STATUS_RETRY:
  932. tx_done.no_ack = true;
  933. break;
  934. case HTT_MGMT_TX_STATUS_DROP:
  935. tx_done.discard = true;
  936. break;
  937. }
  938. ath10k_txrx_tx_completed(htt, &tx_done);
  939. break;
  940. }
  941. case HTT_T2H_MSG_TYPE_TX_COMPL_IND: {
  942. struct htt_tx_done tx_done = {};
  943. int status = MS(resp->data_tx_completion.flags,
  944. HTT_DATA_TX_STATUS);
  945. __le16 msdu_id;
  946. int i;
  947. switch (status) {
  948. case HTT_DATA_TX_STATUS_NO_ACK:
  949. tx_done.no_ack = true;
  950. break;
  951. case HTT_DATA_TX_STATUS_OK:
  952. break;
  953. case HTT_DATA_TX_STATUS_DISCARD:
  954. case HTT_DATA_TX_STATUS_POSTPONE:
  955. case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
  956. tx_done.discard = true;
  957. break;
  958. default:
  959. ath10k_warn("unhandled tx completion status %d\n",
  960. status);
  961. tx_done.discard = true;
  962. break;
  963. }
  964. ath10k_dbg(ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
  965. resp->data_tx_completion.num_msdus);
  966. for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
  967. msdu_id = resp->data_tx_completion.msdus[i];
  968. tx_done.msdu_id = __le16_to_cpu(msdu_id);
  969. ath10k_txrx_tx_completed(htt, &tx_done);
  970. }
  971. break;
  972. }
  973. case HTT_T2H_MSG_TYPE_SEC_IND: {
  974. struct ath10k *ar = htt->ar;
  975. struct htt_security_indication *ev = &resp->security_indication;
  976. ath10k_dbg(ATH10K_DBG_HTT,
  977. "sec ind peer_id %d unicast %d type %d\n",
  978. __le16_to_cpu(ev->peer_id),
  979. !!(ev->flags & HTT_SECURITY_IS_UNICAST),
  980. MS(ev->flags, HTT_SECURITY_TYPE));
  981. complete(&ar->install_key_done);
  982. break;
  983. }
  984. case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
  985. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  986. skb->data, skb->len);
  987. ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind);
  988. break;
  989. }
  990. case HTT_T2H_MSG_TYPE_TEST:
  991. /* FIX THIS */
  992. break;
  993. case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
  994. case HTT_T2H_MSG_TYPE_STATS_CONF:
  995. case HTT_T2H_MSG_TYPE_RX_ADDBA:
  996. case HTT_T2H_MSG_TYPE_RX_DELBA:
  997. case HTT_T2H_MSG_TYPE_RX_FLUSH:
  998. default:
  999. ath10k_dbg(ATH10K_DBG_HTT, "htt event (%d) not handled\n",
  1000. resp->hdr.msg_type);
  1001. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  1002. skb->data, skb->len);
  1003. break;
  1004. };
  1005. /* Free the indication buffer */
  1006. dev_kfree_skb_any(skb);
  1007. }