at803x.c 5.5 KB

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  1. /*
  2. * drivers/net/phy/at803x.c
  3. *
  4. * Driver for Atheros 803x PHY
  5. *
  6. * Author: Matus Ujhelyi <ujhelyi.m@gmail.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. #include <linux/phy.h>
  14. #include <linux/module.h>
  15. #include <linux/string.h>
  16. #include <linux/netdevice.h>
  17. #include <linux/etherdevice.h>
  18. #define AT803X_INTR_ENABLE 0x12
  19. #define AT803X_INTR_STATUS 0x13
  20. #define AT803X_WOL_ENABLE 0x01
  21. #define AT803X_DEVICE_ADDR 0x03
  22. #define AT803X_LOC_MAC_ADDR_0_15_OFFSET 0x804C
  23. #define AT803X_LOC_MAC_ADDR_16_31_OFFSET 0x804B
  24. #define AT803X_LOC_MAC_ADDR_32_47_OFFSET 0x804A
  25. #define AT803X_MMD_ACCESS_CONTROL 0x0D
  26. #define AT803X_MMD_ACCESS_CONTROL_DATA 0x0E
  27. #define AT803X_FUNC_DATA 0x4003
  28. #define AT803X_DEBUG_ADDR 0x1D
  29. #define AT803X_DEBUG_DATA 0x1E
  30. #define AT803X_DEBUG_SYSTEM_MODE_CTRL 0x05
  31. #define AT803X_DEBUG_RGMII_TX_CLK_DLY BIT(8)
  32. MODULE_DESCRIPTION("Atheros 803x PHY driver");
  33. MODULE_AUTHOR("Matus Ujhelyi");
  34. MODULE_LICENSE("GPL");
  35. static int at803x_set_wol(struct phy_device *phydev,
  36. struct ethtool_wolinfo *wol)
  37. {
  38. struct net_device *ndev = phydev->attached_dev;
  39. const u8 *mac;
  40. int ret;
  41. u32 value;
  42. unsigned int i, offsets[] = {
  43. AT803X_LOC_MAC_ADDR_32_47_OFFSET,
  44. AT803X_LOC_MAC_ADDR_16_31_OFFSET,
  45. AT803X_LOC_MAC_ADDR_0_15_OFFSET,
  46. };
  47. if (!ndev)
  48. return -ENODEV;
  49. if (wol->wolopts & WAKE_MAGIC) {
  50. mac = (const u8 *) ndev->dev_addr;
  51. if (!is_valid_ether_addr(mac))
  52. return -EFAULT;
  53. for (i = 0; i < 3; i++) {
  54. phy_write(phydev, AT803X_MMD_ACCESS_CONTROL,
  55. AT803X_DEVICE_ADDR);
  56. phy_write(phydev, AT803X_MMD_ACCESS_CONTROL_DATA,
  57. offsets[i]);
  58. phy_write(phydev, AT803X_MMD_ACCESS_CONTROL,
  59. AT803X_FUNC_DATA);
  60. phy_write(phydev, AT803X_MMD_ACCESS_CONTROL_DATA,
  61. mac[(i * 2) + 1] | (mac[(i * 2)] << 8));
  62. }
  63. value = phy_read(phydev, AT803X_INTR_ENABLE);
  64. value |= AT803X_WOL_ENABLE;
  65. ret = phy_write(phydev, AT803X_INTR_ENABLE, value);
  66. if (ret)
  67. return ret;
  68. value = phy_read(phydev, AT803X_INTR_STATUS);
  69. } else {
  70. value = phy_read(phydev, AT803X_INTR_ENABLE);
  71. value &= (~AT803X_WOL_ENABLE);
  72. ret = phy_write(phydev, AT803X_INTR_ENABLE, value);
  73. if (ret)
  74. return ret;
  75. value = phy_read(phydev, AT803X_INTR_STATUS);
  76. }
  77. return ret;
  78. }
  79. static void at803x_get_wol(struct phy_device *phydev,
  80. struct ethtool_wolinfo *wol)
  81. {
  82. u32 value;
  83. wol->supported = WAKE_MAGIC;
  84. wol->wolopts = 0;
  85. value = phy_read(phydev, AT803X_INTR_ENABLE);
  86. if (value & AT803X_WOL_ENABLE)
  87. wol->wolopts |= WAKE_MAGIC;
  88. }
  89. static int at803x_config_init(struct phy_device *phydev)
  90. {
  91. int val;
  92. int ret;
  93. u32 features;
  94. features = SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_AUI |
  95. SUPPORTED_FIBRE | SUPPORTED_BNC;
  96. val = phy_read(phydev, MII_BMSR);
  97. if (val < 0)
  98. return val;
  99. if (val & BMSR_ANEGCAPABLE)
  100. features |= SUPPORTED_Autoneg;
  101. if (val & BMSR_100FULL)
  102. features |= SUPPORTED_100baseT_Full;
  103. if (val & BMSR_100HALF)
  104. features |= SUPPORTED_100baseT_Half;
  105. if (val & BMSR_10FULL)
  106. features |= SUPPORTED_10baseT_Full;
  107. if (val & BMSR_10HALF)
  108. features |= SUPPORTED_10baseT_Half;
  109. if (val & BMSR_ESTATEN) {
  110. val = phy_read(phydev, MII_ESTATUS);
  111. if (val < 0)
  112. return val;
  113. if (val & ESTATUS_1000_TFULL)
  114. features |= SUPPORTED_1000baseT_Full;
  115. if (val & ESTATUS_1000_THALF)
  116. features |= SUPPORTED_1000baseT_Half;
  117. }
  118. phydev->supported = features;
  119. phydev->advertising = features;
  120. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
  121. ret = phy_write(phydev, AT803X_DEBUG_ADDR,
  122. AT803X_DEBUG_SYSTEM_MODE_CTRL);
  123. if (ret)
  124. return ret;
  125. ret = phy_write(phydev, AT803X_DEBUG_DATA,
  126. AT803X_DEBUG_RGMII_TX_CLK_DLY);
  127. if (ret)
  128. return ret;
  129. }
  130. return 0;
  131. }
  132. static struct phy_driver at803x_driver[] = {
  133. {
  134. /* ATHEROS 8035 */
  135. .phy_id = 0x004dd072,
  136. .name = "Atheros 8035 ethernet",
  137. .phy_id_mask = 0xffffffef,
  138. .config_init = at803x_config_init,
  139. .set_wol = at803x_set_wol,
  140. .get_wol = at803x_get_wol,
  141. .features = PHY_GBIT_FEATURES,
  142. .flags = PHY_HAS_INTERRUPT,
  143. .config_aneg = &genphy_config_aneg,
  144. .read_status = &genphy_read_status,
  145. .driver = {
  146. .owner = THIS_MODULE,
  147. },
  148. }, {
  149. /* ATHEROS 8030 */
  150. .phy_id = 0x004dd076,
  151. .name = "Atheros 8030 ethernet",
  152. .phy_id_mask = 0xffffffef,
  153. .config_init = at803x_config_init,
  154. .set_wol = at803x_set_wol,
  155. .get_wol = at803x_get_wol,
  156. .features = PHY_GBIT_FEATURES,
  157. .flags = PHY_HAS_INTERRUPT,
  158. .config_aneg = &genphy_config_aneg,
  159. .read_status = &genphy_read_status,
  160. .driver = {
  161. .owner = THIS_MODULE,
  162. },
  163. }, {
  164. /* ATHEROS 8031 */
  165. .phy_id = 0x004dd074,
  166. .name = "Atheros 8031 ethernet",
  167. .phy_id_mask = 0xffffffef,
  168. .config_init = at803x_config_init,
  169. .set_wol = at803x_set_wol,
  170. .get_wol = at803x_get_wol,
  171. .features = PHY_GBIT_FEATURES,
  172. .flags = PHY_HAS_INTERRUPT,
  173. .config_aneg = &genphy_config_aneg,
  174. .read_status = &genphy_read_status,
  175. .driver = {
  176. .owner = THIS_MODULE,
  177. },
  178. } };
  179. static int __init atheros_init(void)
  180. {
  181. return phy_drivers_register(at803x_driver,
  182. ARRAY_SIZE(at803x_driver));
  183. }
  184. static void __exit atheros_exit(void)
  185. {
  186. return phy_drivers_unregister(at803x_driver,
  187. ARRAY_SIZE(at803x_driver));
  188. }
  189. module_init(atheros_init);
  190. module_exit(atheros_exit);
  191. static struct mdio_device_id __maybe_unused atheros_tbl[] = {
  192. { 0x004dd076, 0xffffffef },
  193. { 0x004dd074, 0xffffffef },
  194. { 0x004dd072, 0xffffffef },
  195. { }
  196. };
  197. MODULE_DEVICE_TABLE(mdio, atheros_tbl);