ptp.c 43 KB

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  1. /****************************************************************************
  2. * Driver for Solarflare network controllers and boards
  3. * Copyright 2011-2013 Solarflare Communications Inc.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published
  7. * by the Free Software Foundation, incorporated herein by reference.
  8. */
  9. /* Theory of operation:
  10. *
  11. * PTP support is assisted by firmware running on the MC, which provides
  12. * the hardware timestamping capabilities. Both transmitted and received
  13. * PTP event packets are queued onto internal queues for subsequent processing;
  14. * this is because the MC operations are relatively long and would block
  15. * block NAPI/interrupt operation.
  16. *
  17. * Receive event processing:
  18. * The event contains the packet's UUID and sequence number, together
  19. * with the hardware timestamp. The PTP receive packet queue is searched
  20. * for this UUID/sequence number and, if found, put on a pending queue.
  21. * Packets not matching are delivered without timestamps (MCDI events will
  22. * always arrive after the actual packet).
  23. * It is important for the operation of the PTP protocol that the ordering
  24. * of packets between the event and general port is maintained.
  25. *
  26. * Work queue processing:
  27. * If work waiting, synchronise host/hardware time
  28. *
  29. * Transmit: send packet through MC, which returns the transmission time
  30. * that is converted to an appropriate timestamp.
  31. *
  32. * Receive: the packet's reception time is converted to an appropriate
  33. * timestamp.
  34. */
  35. #include <linux/ip.h>
  36. #include <linux/udp.h>
  37. #include <linux/time.h>
  38. #include <linux/ktime.h>
  39. #include <linux/module.h>
  40. #include <linux/net_tstamp.h>
  41. #include <linux/pps_kernel.h>
  42. #include <linux/ptp_clock_kernel.h>
  43. #include "net_driver.h"
  44. #include "efx.h"
  45. #include "mcdi.h"
  46. #include "mcdi_pcol.h"
  47. #include "io.h"
  48. #include "farch_regs.h"
  49. #include "nic.h"
  50. /* Maximum number of events expected to make up a PTP event */
  51. #define MAX_EVENT_FRAGS 3
  52. /* Maximum delay, ms, to begin synchronisation */
  53. #define MAX_SYNCHRONISE_WAIT_MS 2
  54. /* How long, at most, to spend synchronising */
  55. #define SYNCHRONISE_PERIOD_NS 250000
  56. /* How often to update the shared memory time */
  57. #define SYNCHRONISATION_GRANULARITY_NS 200
  58. /* Minimum permitted length of a (corrected) synchronisation time */
  59. #define MIN_SYNCHRONISATION_NS 120
  60. /* Maximum permitted length of a (corrected) synchronisation time */
  61. #define MAX_SYNCHRONISATION_NS 1000
  62. /* How many (MC) receive events that can be queued */
  63. #define MAX_RECEIVE_EVENTS 8
  64. /* Length of (modified) moving average. */
  65. #define AVERAGE_LENGTH 16
  66. /* How long an unmatched event or packet can be held */
  67. #define PKT_EVENT_LIFETIME_MS 10
  68. /* Offsets into PTP packet for identification. These offsets are from the
  69. * start of the IP header, not the MAC header. Note that neither PTP V1 nor
  70. * PTP V2 permit the use of IPV4 options.
  71. */
  72. #define PTP_DPORT_OFFSET 22
  73. #define PTP_V1_VERSION_LENGTH 2
  74. #define PTP_V1_VERSION_OFFSET 28
  75. #define PTP_V1_UUID_LENGTH 6
  76. #define PTP_V1_UUID_OFFSET 50
  77. #define PTP_V1_SEQUENCE_LENGTH 2
  78. #define PTP_V1_SEQUENCE_OFFSET 58
  79. /* The minimum length of a PTP V1 packet for offsets, etc. to be valid:
  80. * includes IP header.
  81. */
  82. #define PTP_V1_MIN_LENGTH 64
  83. #define PTP_V2_VERSION_LENGTH 1
  84. #define PTP_V2_VERSION_OFFSET 29
  85. #define PTP_V2_UUID_LENGTH 8
  86. #define PTP_V2_UUID_OFFSET 48
  87. /* Although PTP V2 UUIDs are comprised a ClockIdentity (8) and PortNumber (2),
  88. * the MC only captures the last six bytes of the clock identity. These values
  89. * reflect those, not the ones used in the standard. The standard permits
  90. * mapping of V1 UUIDs to V2 UUIDs with these same values.
  91. */
  92. #define PTP_V2_MC_UUID_LENGTH 6
  93. #define PTP_V2_MC_UUID_OFFSET 50
  94. #define PTP_V2_SEQUENCE_LENGTH 2
  95. #define PTP_V2_SEQUENCE_OFFSET 58
  96. /* The minimum length of a PTP V2 packet for offsets, etc. to be valid:
  97. * includes IP header.
  98. */
  99. #define PTP_V2_MIN_LENGTH 63
  100. #define PTP_MIN_LENGTH 63
  101. #define PTP_ADDRESS 0xe0000181 /* 224.0.1.129 */
  102. #define PTP_EVENT_PORT 319
  103. #define PTP_GENERAL_PORT 320
  104. /* Annoyingly the format of the version numbers are different between
  105. * versions 1 and 2 so it isn't possible to simply look for 1 or 2.
  106. */
  107. #define PTP_VERSION_V1 1
  108. #define PTP_VERSION_V2 2
  109. #define PTP_VERSION_V2_MASK 0x0f
  110. enum ptp_packet_state {
  111. PTP_PACKET_STATE_UNMATCHED = 0,
  112. PTP_PACKET_STATE_MATCHED,
  113. PTP_PACKET_STATE_TIMED_OUT,
  114. PTP_PACKET_STATE_MATCH_UNWANTED
  115. };
  116. /* NIC synchronised with single word of time only comprising
  117. * partial seconds and full nanoseconds: 10^9 ~ 2^30 so 2 bits for seconds.
  118. */
  119. #define MC_NANOSECOND_BITS 30
  120. #define MC_NANOSECOND_MASK ((1 << MC_NANOSECOND_BITS) - 1)
  121. #define MC_SECOND_MASK ((1 << (32 - MC_NANOSECOND_BITS)) - 1)
  122. /* Maximum parts-per-billion adjustment that is acceptable */
  123. #define MAX_PPB 1000000
  124. /* Number of bits required to hold the above */
  125. #define MAX_PPB_BITS 20
  126. /* Number of extra bits allowed when calculating fractional ns.
  127. * EXTRA_BITS + MC_CMD_PTP_IN_ADJUST_BITS + MAX_PPB_BITS should
  128. * be less than 63.
  129. */
  130. #define PPB_EXTRA_BITS 2
  131. /* Precalculate scale word to avoid long long division at runtime */
  132. #define PPB_SCALE_WORD ((1LL << (PPB_EXTRA_BITS + MC_CMD_PTP_IN_ADJUST_BITS +\
  133. MAX_PPB_BITS)) / 1000000000LL)
  134. #define PTP_SYNC_ATTEMPTS 4
  135. /**
  136. * struct efx_ptp_match - Matching structure, stored in sk_buff's cb area.
  137. * @words: UUID and (partial) sequence number
  138. * @expiry: Time after which the packet should be delivered irrespective of
  139. * event arrival.
  140. * @state: The state of the packet - whether it is ready for processing or
  141. * whether that is of no interest.
  142. */
  143. struct efx_ptp_match {
  144. u32 words[DIV_ROUND_UP(PTP_V1_UUID_LENGTH, 4)];
  145. unsigned long expiry;
  146. enum ptp_packet_state state;
  147. };
  148. /**
  149. * struct efx_ptp_event_rx - A PTP receive event (from MC)
  150. * @seq0: First part of (PTP) UUID
  151. * @seq1: Second part of (PTP) UUID and sequence number
  152. * @hwtimestamp: Event timestamp
  153. */
  154. struct efx_ptp_event_rx {
  155. struct list_head link;
  156. u32 seq0;
  157. u32 seq1;
  158. ktime_t hwtimestamp;
  159. unsigned long expiry;
  160. };
  161. /**
  162. * struct efx_ptp_timeset - Synchronisation between host and MC
  163. * @host_start: Host time immediately before hardware timestamp taken
  164. * @seconds: Hardware timestamp, seconds
  165. * @nanoseconds: Hardware timestamp, nanoseconds
  166. * @host_end: Host time immediately after hardware timestamp taken
  167. * @waitns: Number of nanoseconds between hardware timestamp being read and
  168. * host end time being seen
  169. * @window: Difference of host_end and host_start
  170. * @valid: Whether this timeset is valid
  171. */
  172. struct efx_ptp_timeset {
  173. u32 host_start;
  174. u32 seconds;
  175. u32 nanoseconds;
  176. u32 host_end;
  177. u32 waitns;
  178. u32 window; /* Derived: end - start, allowing for wrap */
  179. };
  180. /**
  181. * struct efx_ptp_data - Precision Time Protocol (PTP) state
  182. * @channel: The PTP channel
  183. * @rxq: Receive queue (awaiting timestamps)
  184. * @txq: Transmit queue
  185. * @evt_list: List of MC receive events awaiting packets
  186. * @evt_free_list: List of free events
  187. * @evt_lock: Lock for manipulating evt_list and evt_free_list
  188. * @rx_evts: Instantiated events (on evt_list and evt_free_list)
  189. * @workwq: Work queue for processing pending PTP operations
  190. * @work: Work task
  191. * @reset_required: A serious error has occurred and the PTP task needs to be
  192. * reset (disable, enable).
  193. * @rxfilter_event: Receive filter when operating
  194. * @rxfilter_general: Receive filter when operating
  195. * @config: Current timestamp configuration
  196. * @enabled: PTP operation enabled
  197. * @mode: Mode in which PTP operating (PTP version)
  198. * @evt_frags: Partly assembled PTP events
  199. * @evt_frag_idx: Current fragment number
  200. * @evt_code: Last event code
  201. * @start: Address at which MC indicates ready for synchronisation
  202. * @host_time_pps: Host time at last PPS
  203. * @last_sync_ns: Last number of nanoseconds between readings when synchronising
  204. * @base_sync_ns: Number of nanoseconds for last synchronisation.
  205. * @base_sync_valid: Whether base_sync_time is valid.
  206. * @current_adjfreq: Current ppb adjustment.
  207. * @phc_clock: Pointer to registered phc device
  208. * @phc_clock_info: Registration structure for phc device
  209. * @pps_work: pps work task for handling pps events
  210. * @pps_workwq: pps work queue
  211. * @nic_ts_enabled: Flag indicating if NIC generated TS events are handled
  212. * @txbuf: Buffer for use when transmitting (PTP) packets to MC (avoids
  213. * allocations in main data path).
  214. * @debug_ptp_dir: PTP debugfs directory
  215. * @missed_rx_sync: Number of packets received without syncrhonisation.
  216. * @good_syncs: Number of successful synchronisations.
  217. * @no_time_syncs: Number of synchronisations with no good times.
  218. * @bad_sync_durations: Number of synchronisations with bad durations.
  219. * @bad_syncs: Number of failed synchronisations.
  220. * @last_sync_time: Number of nanoseconds for last synchronisation.
  221. * @sync_timeouts: Number of synchronisation timeouts
  222. * @fast_syncs: Number of synchronisations requiring short delay
  223. * @min_sync_delta: Minimum time between event and synchronisation
  224. * @max_sync_delta: Maximum time between event and synchronisation
  225. * @average_sync_delta: Average time between event and synchronisation.
  226. * Modified moving average.
  227. * @last_sync_delta: Last time between event and synchronisation
  228. * @mc_stats: Context value for MC statistics
  229. * @timeset: Last set of synchronisation statistics.
  230. */
  231. struct efx_ptp_data {
  232. struct efx_channel *channel;
  233. struct sk_buff_head rxq;
  234. struct sk_buff_head txq;
  235. struct list_head evt_list;
  236. struct list_head evt_free_list;
  237. spinlock_t evt_lock;
  238. struct efx_ptp_event_rx rx_evts[MAX_RECEIVE_EVENTS];
  239. struct workqueue_struct *workwq;
  240. struct work_struct work;
  241. bool reset_required;
  242. u32 rxfilter_event;
  243. u32 rxfilter_general;
  244. bool rxfilter_installed;
  245. struct hwtstamp_config config;
  246. bool enabled;
  247. unsigned int mode;
  248. efx_qword_t evt_frags[MAX_EVENT_FRAGS];
  249. int evt_frag_idx;
  250. int evt_code;
  251. struct efx_buffer start;
  252. struct pps_event_time host_time_pps;
  253. unsigned last_sync_ns;
  254. unsigned base_sync_ns;
  255. bool base_sync_valid;
  256. s64 current_adjfreq;
  257. struct ptp_clock *phc_clock;
  258. struct ptp_clock_info phc_clock_info;
  259. struct work_struct pps_work;
  260. struct workqueue_struct *pps_workwq;
  261. bool nic_ts_enabled;
  262. MCDI_DECLARE_BUF(txbuf, MC_CMD_PTP_IN_TRANSMIT_LENMAX);
  263. struct efx_ptp_timeset
  264. timeset[MC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_MAXNUM];
  265. };
  266. static int efx_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta);
  267. static int efx_phc_adjtime(struct ptp_clock_info *ptp, s64 delta);
  268. static int efx_phc_gettime(struct ptp_clock_info *ptp, struct timespec *ts);
  269. static int efx_phc_settime(struct ptp_clock_info *ptp,
  270. const struct timespec *e_ts);
  271. static int efx_phc_enable(struct ptp_clock_info *ptp,
  272. struct ptp_clock_request *request, int on);
  273. /* Enable MCDI PTP support. */
  274. static int efx_ptp_enable(struct efx_nic *efx)
  275. {
  276. MCDI_DECLARE_BUF(inbuf, MC_CMD_PTP_IN_ENABLE_LEN);
  277. MCDI_SET_DWORD(inbuf, PTP_IN_OP, MC_CMD_PTP_OP_ENABLE);
  278. MCDI_SET_DWORD(inbuf, PTP_IN_PERIPH_ID, 0);
  279. MCDI_SET_DWORD(inbuf, PTP_IN_ENABLE_QUEUE,
  280. efx->ptp_data->channel->channel);
  281. MCDI_SET_DWORD(inbuf, PTP_IN_ENABLE_MODE, efx->ptp_data->mode);
  282. return efx_mcdi_rpc(efx, MC_CMD_PTP, inbuf, sizeof(inbuf),
  283. NULL, 0, NULL);
  284. }
  285. /* Disable MCDI PTP support.
  286. *
  287. * Note that this function should never rely on the presence of ptp_data -
  288. * may be called before that exists.
  289. */
  290. static int efx_ptp_disable(struct efx_nic *efx)
  291. {
  292. MCDI_DECLARE_BUF(inbuf, MC_CMD_PTP_IN_DISABLE_LEN);
  293. MCDI_SET_DWORD(inbuf, PTP_IN_OP, MC_CMD_PTP_OP_DISABLE);
  294. MCDI_SET_DWORD(inbuf, PTP_IN_PERIPH_ID, 0);
  295. return efx_mcdi_rpc(efx, MC_CMD_PTP, inbuf, sizeof(inbuf),
  296. NULL, 0, NULL);
  297. }
  298. static void efx_ptp_deliver_rx_queue(struct sk_buff_head *q)
  299. {
  300. struct sk_buff *skb;
  301. while ((skb = skb_dequeue(q))) {
  302. local_bh_disable();
  303. netif_receive_skb(skb);
  304. local_bh_enable();
  305. }
  306. }
  307. static void efx_ptp_handle_no_channel(struct efx_nic *efx)
  308. {
  309. netif_err(efx, drv, efx->net_dev,
  310. "ERROR: PTP requires MSI-X and 1 additional interrupt"
  311. "vector. PTP disabled\n");
  312. }
  313. /* Repeatedly send the host time to the MC which will capture the hardware
  314. * time.
  315. */
  316. static void efx_ptp_send_times(struct efx_nic *efx,
  317. struct pps_event_time *last_time)
  318. {
  319. struct pps_event_time now;
  320. struct timespec limit;
  321. struct efx_ptp_data *ptp = efx->ptp_data;
  322. struct timespec start;
  323. int *mc_running = ptp->start.addr;
  324. pps_get_ts(&now);
  325. start = now.ts_real;
  326. limit = now.ts_real;
  327. timespec_add_ns(&limit, SYNCHRONISE_PERIOD_NS);
  328. /* Write host time for specified period or until MC is done */
  329. while ((timespec_compare(&now.ts_real, &limit) < 0) &&
  330. ACCESS_ONCE(*mc_running)) {
  331. struct timespec update_time;
  332. unsigned int host_time;
  333. /* Don't update continuously to avoid saturating the PCIe bus */
  334. update_time = now.ts_real;
  335. timespec_add_ns(&update_time, SYNCHRONISATION_GRANULARITY_NS);
  336. do {
  337. pps_get_ts(&now);
  338. } while ((timespec_compare(&now.ts_real, &update_time) < 0) &&
  339. ACCESS_ONCE(*mc_running));
  340. /* Synchronise NIC with single word of time only */
  341. host_time = (now.ts_real.tv_sec << MC_NANOSECOND_BITS |
  342. now.ts_real.tv_nsec);
  343. /* Update host time in NIC memory */
  344. efx->type->ptp_write_host_time(efx, host_time);
  345. }
  346. *last_time = now;
  347. }
  348. /* Read a timeset from the MC's results and partial process. */
  349. static void efx_ptp_read_timeset(MCDI_DECLARE_STRUCT_PTR(data),
  350. struct efx_ptp_timeset *timeset)
  351. {
  352. unsigned start_ns, end_ns;
  353. timeset->host_start = MCDI_DWORD(data, PTP_OUT_SYNCHRONIZE_HOSTSTART);
  354. timeset->seconds = MCDI_DWORD(data, PTP_OUT_SYNCHRONIZE_SECONDS);
  355. timeset->nanoseconds = MCDI_DWORD(data,
  356. PTP_OUT_SYNCHRONIZE_NANOSECONDS);
  357. timeset->host_end = MCDI_DWORD(data, PTP_OUT_SYNCHRONIZE_HOSTEND),
  358. timeset->waitns = MCDI_DWORD(data, PTP_OUT_SYNCHRONIZE_WAITNS);
  359. /* Ignore seconds */
  360. start_ns = timeset->host_start & MC_NANOSECOND_MASK;
  361. end_ns = timeset->host_end & MC_NANOSECOND_MASK;
  362. /* Allow for rollover */
  363. if (end_ns < start_ns)
  364. end_ns += NSEC_PER_SEC;
  365. /* Determine duration of operation */
  366. timeset->window = end_ns - start_ns;
  367. }
  368. /* Process times received from MC.
  369. *
  370. * Extract times from returned results, and establish the minimum value
  371. * seen. The minimum value represents the "best" possible time and events
  372. * too much greater than this are rejected - the machine is, perhaps, too
  373. * busy. A number of readings are taken so that, hopefully, at least one good
  374. * synchronisation will be seen in the results.
  375. */
  376. static int
  377. efx_ptp_process_times(struct efx_nic *efx, MCDI_DECLARE_STRUCT_PTR(synch_buf),
  378. size_t response_length,
  379. const struct pps_event_time *last_time)
  380. {
  381. unsigned number_readings =
  382. MCDI_VAR_ARRAY_LEN(response_length,
  383. PTP_OUT_SYNCHRONIZE_TIMESET);
  384. unsigned i;
  385. unsigned total;
  386. unsigned ngood = 0;
  387. unsigned last_good = 0;
  388. struct efx_ptp_data *ptp = efx->ptp_data;
  389. u32 last_sec;
  390. u32 start_sec;
  391. struct timespec delta;
  392. if (number_readings == 0)
  393. return -EAGAIN;
  394. /* Read the set of results and increment stats for any results that
  395. * appera to be erroneous.
  396. */
  397. for (i = 0; i < number_readings; i++) {
  398. efx_ptp_read_timeset(
  399. MCDI_ARRAY_STRUCT_PTR(synch_buf,
  400. PTP_OUT_SYNCHRONIZE_TIMESET, i),
  401. &ptp->timeset[i]);
  402. }
  403. /* Find the last good host-MC synchronization result. The MC times
  404. * when it finishes reading the host time so the corrected window time
  405. * should be fairly constant for a given platform.
  406. */
  407. total = 0;
  408. for (i = 0; i < number_readings; i++)
  409. if (ptp->timeset[i].window > ptp->timeset[i].waitns) {
  410. unsigned win;
  411. win = ptp->timeset[i].window - ptp->timeset[i].waitns;
  412. if (win >= MIN_SYNCHRONISATION_NS &&
  413. win < MAX_SYNCHRONISATION_NS) {
  414. total += ptp->timeset[i].window;
  415. ngood++;
  416. last_good = i;
  417. }
  418. }
  419. if (ngood == 0) {
  420. netif_warn(efx, drv, efx->net_dev,
  421. "PTP no suitable synchronisations %dns\n",
  422. ptp->base_sync_ns);
  423. return -EAGAIN;
  424. }
  425. /* Average minimum this synchronisation */
  426. ptp->last_sync_ns = DIV_ROUND_UP(total, ngood);
  427. if (!ptp->base_sync_valid || (ptp->last_sync_ns < ptp->base_sync_ns)) {
  428. ptp->base_sync_valid = true;
  429. ptp->base_sync_ns = ptp->last_sync_ns;
  430. }
  431. /* Calculate delay from actual PPS to last_time */
  432. delta.tv_nsec =
  433. ptp->timeset[last_good].nanoseconds +
  434. last_time->ts_real.tv_nsec -
  435. (ptp->timeset[last_good].host_start & MC_NANOSECOND_MASK);
  436. /* It is possible that the seconds rolled over between taking
  437. * the start reading and the last value written by the host. The
  438. * timescales are such that a gap of more than one second is never
  439. * expected.
  440. */
  441. start_sec = ptp->timeset[last_good].host_start >> MC_NANOSECOND_BITS;
  442. last_sec = last_time->ts_real.tv_sec & MC_SECOND_MASK;
  443. if (start_sec != last_sec) {
  444. if (((start_sec + 1) & MC_SECOND_MASK) != last_sec) {
  445. netif_warn(efx, hw, efx->net_dev,
  446. "PTP bad synchronisation seconds\n");
  447. return -EAGAIN;
  448. } else {
  449. delta.tv_sec = 1;
  450. }
  451. } else {
  452. delta.tv_sec = 0;
  453. }
  454. ptp->host_time_pps = *last_time;
  455. pps_sub_ts(&ptp->host_time_pps, delta);
  456. return 0;
  457. }
  458. /* Synchronize times between the host and the MC */
  459. static int efx_ptp_synchronize(struct efx_nic *efx, unsigned int num_readings)
  460. {
  461. struct efx_ptp_data *ptp = efx->ptp_data;
  462. MCDI_DECLARE_BUF(synch_buf, MC_CMD_PTP_OUT_SYNCHRONIZE_LENMAX);
  463. size_t response_length;
  464. int rc;
  465. unsigned long timeout;
  466. struct pps_event_time last_time = {};
  467. unsigned int loops = 0;
  468. int *start = ptp->start.addr;
  469. MCDI_SET_DWORD(synch_buf, PTP_IN_OP, MC_CMD_PTP_OP_SYNCHRONIZE);
  470. MCDI_SET_DWORD(synch_buf, PTP_IN_PERIPH_ID, 0);
  471. MCDI_SET_DWORD(synch_buf, PTP_IN_SYNCHRONIZE_NUMTIMESETS,
  472. num_readings);
  473. MCDI_SET_QWORD(synch_buf, PTP_IN_SYNCHRONIZE_START_ADDR,
  474. ptp->start.dma_addr);
  475. /* Clear flag that signals MC ready */
  476. ACCESS_ONCE(*start) = 0;
  477. rc = efx_mcdi_rpc_start(efx, MC_CMD_PTP, synch_buf,
  478. MC_CMD_PTP_IN_SYNCHRONIZE_LEN);
  479. EFX_BUG_ON_PARANOID(rc);
  480. /* Wait for start from MCDI (or timeout) */
  481. timeout = jiffies + msecs_to_jiffies(MAX_SYNCHRONISE_WAIT_MS);
  482. while (!ACCESS_ONCE(*start) && (time_before(jiffies, timeout))) {
  483. udelay(20); /* Usually start MCDI execution quickly */
  484. loops++;
  485. }
  486. if (ACCESS_ONCE(*start))
  487. efx_ptp_send_times(efx, &last_time);
  488. /* Collect results */
  489. rc = efx_mcdi_rpc_finish(efx, MC_CMD_PTP,
  490. MC_CMD_PTP_IN_SYNCHRONIZE_LEN,
  491. synch_buf, sizeof(synch_buf),
  492. &response_length);
  493. if (rc == 0)
  494. rc = efx_ptp_process_times(efx, synch_buf, response_length,
  495. &last_time);
  496. return rc;
  497. }
  498. /* Transmit a PTP packet, via the MCDI interface, to the wire. */
  499. static int efx_ptp_xmit_skb(struct efx_nic *efx, struct sk_buff *skb)
  500. {
  501. struct efx_ptp_data *ptp_data = efx->ptp_data;
  502. struct skb_shared_hwtstamps timestamps;
  503. int rc = -EIO;
  504. MCDI_DECLARE_BUF(txtime, MC_CMD_PTP_OUT_TRANSMIT_LEN);
  505. size_t len;
  506. MCDI_SET_DWORD(ptp_data->txbuf, PTP_IN_OP, MC_CMD_PTP_OP_TRANSMIT);
  507. MCDI_SET_DWORD(ptp_data->txbuf, PTP_IN_PERIPH_ID, 0);
  508. MCDI_SET_DWORD(ptp_data->txbuf, PTP_IN_TRANSMIT_LENGTH, skb->len);
  509. if (skb_shinfo(skb)->nr_frags != 0) {
  510. rc = skb_linearize(skb);
  511. if (rc != 0)
  512. goto fail;
  513. }
  514. if (skb->ip_summed == CHECKSUM_PARTIAL) {
  515. rc = skb_checksum_help(skb);
  516. if (rc != 0)
  517. goto fail;
  518. }
  519. skb_copy_from_linear_data(skb,
  520. MCDI_PTR(ptp_data->txbuf,
  521. PTP_IN_TRANSMIT_PACKET),
  522. skb->len);
  523. rc = efx_mcdi_rpc(efx, MC_CMD_PTP,
  524. ptp_data->txbuf, MC_CMD_PTP_IN_TRANSMIT_LEN(skb->len),
  525. txtime, sizeof(txtime), &len);
  526. if (rc != 0)
  527. goto fail;
  528. memset(&timestamps, 0, sizeof(timestamps));
  529. timestamps.hwtstamp = ktime_set(
  530. MCDI_DWORD(txtime, PTP_OUT_TRANSMIT_SECONDS),
  531. MCDI_DWORD(txtime, PTP_OUT_TRANSMIT_NANOSECONDS));
  532. skb_tstamp_tx(skb, &timestamps);
  533. rc = 0;
  534. fail:
  535. dev_kfree_skb(skb);
  536. return rc;
  537. }
  538. static void efx_ptp_drop_time_expired_events(struct efx_nic *efx)
  539. {
  540. struct efx_ptp_data *ptp = efx->ptp_data;
  541. struct list_head *cursor;
  542. struct list_head *next;
  543. /* Drop time-expired events */
  544. spin_lock_bh(&ptp->evt_lock);
  545. if (!list_empty(&ptp->evt_list)) {
  546. list_for_each_safe(cursor, next, &ptp->evt_list) {
  547. struct efx_ptp_event_rx *evt;
  548. evt = list_entry(cursor, struct efx_ptp_event_rx,
  549. link);
  550. if (time_after(jiffies, evt->expiry)) {
  551. list_move(&evt->link, &ptp->evt_free_list);
  552. netif_warn(efx, hw, efx->net_dev,
  553. "PTP rx event dropped\n");
  554. }
  555. }
  556. }
  557. spin_unlock_bh(&ptp->evt_lock);
  558. }
  559. static enum ptp_packet_state efx_ptp_match_rx(struct efx_nic *efx,
  560. struct sk_buff *skb)
  561. {
  562. struct efx_ptp_data *ptp = efx->ptp_data;
  563. bool evts_waiting;
  564. struct list_head *cursor;
  565. struct list_head *next;
  566. struct efx_ptp_match *match;
  567. enum ptp_packet_state rc = PTP_PACKET_STATE_UNMATCHED;
  568. spin_lock_bh(&ptp->evt_lock);
  569. evts_waiting = !list_empty(&ptp->evt_list);
  570. spin_unlock_bh(&ptp->evt_lock);
  571. if (!evts_waiting)
  572. return PTP_PACKET_STATE_UNMATCHED;
  573. match = (struct efx_ptp_match *)skb->cb;
  574. /* Look for a matching timestamp in the event queue */
  575. spin_lock_bh(&ptp->evt_lock);
  576. list_for_each_safe(cursor, next, &ptp->evt_list) {
  577. struct efx_ptp_event_rx *evt;
  578. evt = list_entry(cursor, struct efx_ptp_event_rx, link);
  579. if ((evt->seq0 == match->words[0]) &&
  580. (evt->seq1 == match->words[1])) {
  581. struct skb_shared_hwtstamps *timestamps;
  582. /* Match - add in hardware timestamp */
  583. timestamps = skb_hwtstamps(skb);
  584. timestamps->hwtstamp = evt->hwtimestamp;
  585. match->state = PTP_PACKET_STATE_MATCHED;
  586. rc = PTP_PACKET_STATE_MATCHED;
  587. list_move(&evt->link, &ptp->evt_free_list);
  588. break;
  589. }
  590. }
  591. spin_unlock_bh(&ptp->evt_lock);
  592. return rc;
  593. }
  594. /* Process any queued receive events and corresponding packets
  595. *
  596. * q is returned with all the packets that are ready for delivery.
  597. * true is returned if at least one of those packets requires
  598. * synchronisation.
  599. */
  600. static bool efx_ptp_process_events(struct efx_nic *efx, struct sk_buff_head *q)
  601. {
  602. struct efx_ptp_data *ptp = efx->ptp_data;
  603. bool rc = false;
  604. struct sk_buff *skb;
  605. while ((skb = skb_dequeue(&ptp->rxq))) {
  606. struct efx_ptp_match *match;
  607. match = (struct efx_ptp_match *)skb->cb;
  608. if (match->state == PTP_PACKET_STATE_MATCH_UNWANTED) {
  609. __skb_queue_tail(q, skb);
  610. } else if (efx_ptp_match_rx(efx, skb) ==
  611. PTP_PACKET_STATE_MATCHED) {
  612. rc = true;
  613. __skb_queue_tail(q, skb);
  614. } else if (time_after(jiffies, match->expiry)) {
  615. match->state = PTP_PACKET_STATE_TIMED_OUT;
  616. netif_warn(efx, rx_err, efx->net_dev,
  617. "PTP packet - no timestamp seen\n");
  618. __skb_queue_tail(q, skb);
  619. } else {
  620. /* Replace unprocessed entry and stop */
  621. skb_queue_head(&ptp->rxq, skb);
  622. break;
  623. }
  624. }
  625. return rc;
  626. }
  627. /* Complete processing of a received packet */
  628. static inline void efx_ptp_process_rx(struct efx_nic *efx, struct sk_buff *skb)
  629. {
  630. local_bh_disable();
  631. netif_receive_skb(skb);
  632. local_bh_enable();
  633. }
  634. static int efx_ptp_start(struct efx_nic *efx)
  635. {
  636. struct efx_ptp_data *ptp = efx->ptp_data;
  637. struct efx_filter_spec rxfilter;
  638. int rc;
  639. ptp->reset_required = false;
  640. /* Must filter on both event and general ports to ensure
  641. * that there is no packet re-ordering.
  642. */
  643. efx_filter_init_rx(&rxfilter, EFX_FILTER_PRI_REQUIRED, 0,
  644. efx_rx_queue_index(
  645. efx_channel_get_rx_queue(ptp->channel)));
  646. rc = efx_filter_set_ipv4_local(&rxfilter, IPPROTO_UDP,
  647. htonl(PTP_ADDRESS),
  648. htons(PTP_EVENT_PORT));
  649. if (rc != 0)
  650. return rc;
  651. rc = efx_filter_insert_filter(efx, &rxfilter, true);
  652. if (rc < 0)
  653. return rc;
  654. ptp->rxfilter_event = rc;
  655. efx_filter_init_rx(&rxfilter, EFX_FILTER_PRI_REQUIRED, 0,
  656. efx_rx_queue_index(
  657. efx_channel_get_rx_queue(ptp->channel)));
  658. rc = efx_filter_set_ipv4_local(&rxfilter, IPPROTO_UDP,
  659. htonl(PTP_ADDRESS),
  660. htons(PTP_GENERAL_PORT));
  661. if (rc != 0)
  662. goto fail;
  663. rc = efx_filter_insert_filter(efx, &rxfilter, true);
  664. if (rc < 0)
  665. goto fail;
  666. ptp->rxfilter_general = rc;
  667. rc = efx_ptp_enable(efx);
  668. if (rc != 0)
  669. goto fail2;
  670. ptp->evt_frag_idx = 0;
  671. ptp->current_adjfreq = 0;
  672. ptp->rxfilter_installed = true;
  673. return 0;
  674. fail2:
  675. efx_filter_remove_id_safe(efx, EFX_FILTER_PRI_REQUIRED,
  676. ptp->rxfilter_general);
  677. fail:
  678. efx_filter_remove_id_safe(efx, EFX_FILTER_PRI_REQUIRED,
  679. ptp->rxfilter_event);
  680. return rc;
  681. }
  682. static int efx_ptp_stop(struct efx_nic *efx)
  683. {
  684. struct efx_ptp_data *ptp = efx->ptp_data;
  685. int rc = efx_ptp_disable(efx);
  686. struct list_head *cursor;
  687. struct list_head *next;
  688. if (ptp->rxfilter_installed) {
  689. efx_filter_remove_id_safe(efx, EFX_FILTER_PRI_REQUIRED,
  690. ptp->rxfilter_general);
  691. efx_filter_remove_id_safe(efx, EFX_FILTER_PRI_REQUIRED,
  692. ptp->rxfilter_event);
  693. ptp->rxfilter_installed = false;
  694. }
  695. /* Make sure RX packets are really delivered */
  696. efx_ptp_deliver_rx_queue(&efx->ptp_data->rxq);
  697. skb_queue_purge(&efx->ptp_data->txq);
  698. /* Drop any pending receive events */
  699. spin_lock_bh(&efx->ptp_data->evt_lock);
  700. list_for_each_safe(cursor, next, &efx->ptp_data->evt_list) {
  701. list_move(cursor, &efx->ptp_data->evt_free_list);
  702. }
  703. spin_unlock_bh(&efx->ptp_data->evt_lock);
  704. return rc;
  705. }
  706. static void efx_ptp_pps_worker(struct work_struct *work)
  707. {
  708. struct efx_ptp_data *ptp =
  709. container_of(work, struct efx_ptp_data, pps_work);
  710. struct efx_nic *efx = ptp->channel->efx;
  711. struct ptp_clock_event ptp_evt;
  712. if (efx_ptp_synchronize(efx, PTP_SYNC_ATTEMPTS))
  713. return;
  714. ptp_evt.type = PTP_CLOCK_PPSUSR;
  715. ptp_evt.pps_times = ptp->host_time_pps;
  716. ptp_clock_event(ptp->phc_clock, &ptp_evt);
  717. }
  718. /* Process any pending transmissions and timestamp any received packets.
  719. */
  720. static void efx_ptp_worker(struct work_struct *work)
  721. {
  722. struct efx_ptp_data *ptp_data =
  723. container_of(work, struct efx_ptp_data, work);
  724. struct efx_nic *efx = ptp_data->channel->efx;
  725. struct sk_buff *skb;
  726. struct sk_buff_head tempq;
  727. if (ptp_data->reset_required) {
  728. efx_ptp_stop(efx);
  729. efx_ptp_start(efx);
  730. return;
  731. }
  732. efx_ptp_drop_time_expired_events(efx);
  733. __skb_queue_head_init(&tempq);
  734. if (efx_ptp_process_events(efx, &tempq) ||
  735. !skb_queue_empty(&ptp_data->txq)) {
  736. while ((skb = skb_dequeue(&ptp_data->txq)))
  737. efx_ptp_xmit_skb(efx, skb);
  738. }
  739. while ((skb = __skb_dequeue(&tempq)))
  740. efx_ptp_process_rx(efx, skb);
  741. }
  742. /* Initialise PTP channel and state.
  743. *
  744. * Setting core_index to zero causes the queue to be initialised and doesn't
  745. * overlap with 'rxq0' because ptp.c doesn't use skb_record_rx_queue.
  746. */
  747. static int efx_ptp_probe_channel(struct efx_channel *channel)
  748. {
  749. struct efx_nic *efx = channel->efx;
  750. struct efx_ptp_data *ptp;
  751. int rc = 0;
  752. unsigned int pos;
  753. channel->irq_moderation = 0;
  754. channel->rx_queue.core_index = 0;
  755. ptp = kzalloc(sizeof(struct efx_ptp_data), GFP_KERNEL);
  756. efx->ptp_data = ptp;
  757. if (!efx->ptp_data)
  758. return -ENOMEM;
  759. rc = efx_nic_alloc_buffer(efx, &ptp->start, sizeof(int), GFP_KERNEL);
  760. if (rc != 0)
  761. goto fail1;
  762. ptp->channel = channel;
  763. skb_queue_head_init(&ptp->rxq);
  764. skb_queue_head_init(&ptp->txq);
  765. ptp->workwq = create_singlethread_workqueue("sfc_ptp");
  766. if (!ptp->workwq) {
  767. rc = -ENOMEM;
  768. goto fail2;
  769. }
  770. INIT_WORK(&ptp->work, efx_ptp_worker);
  771. ptp->config.flags = 0;
  772. ptp->config.tx_type = HWTSTAMP_TX_OFF;
  773. ptp->config.rx_filter = HWTSTAMP_FILTER_NONE;
  774. INIT_LIST_HEAD(&ptp->evt_list);
  775. INIT_LIST_HEAD(&ptp->evt_free_list);
  776. spin_lock_init(&ptp->evt_lock);
  777. for (pos = 0; pos < MAX_RECEIVE_EVENTS; pos++)
  778. list_add(&ptp->rx_evts[pos].link, &ptp->evt_free_list);
  779. ptp->phc_clock_info.owner = THIS_MODULE;
  780. snprintf(ptp->phc_clock_info.name,
  781. sizeof(ptp->phc_clock_info.name),
  782. "%pm", efx->net_dev->perm_addr);
  783. ptp->phc_clock_info.max_adj = MAX_PPB;
  784. ptp->phc_clock_info.n_alarm = 0;
  785. ptp->phc_clock_info.n_ext_ts = 0;
  786. ptp->phc_clock_info.n_per_out = 0;
  787. ptp->phc_clock_info.pps = 1;
  788. ptp->phc_clock_info.adjfreq = efx_phc_adjfreq;
  789. ptp->phc_clock_info.adjtime = efx_phc_adjtime;
  790. ptp->phc_clock_info.gettime = efx_phc_gettime;
  791. ptp->phc_clock_info.settime = efx_phc_settime;
  792. ptp->phc_clock_info.enable = efx_phc_enable;
  793. ptp->phc_clock = ptp_clock_register(&ptp->phc_clock_info,
  794. &efx->pci_dev->dev);
  795. if (IS_ERR(ptp->phc_clock)) {
  796. rc = PTR_ERR(ptp->phc_clock);
  797. goto fail3;
  798. }
  799. INIT_WORK(&ptp->pps_work, efx_ptp_pps_worker);
  800. ptp->pps_workwq = create_singlethread_workqueue("sfc_pps");
  801. if (!ptp->pps_workwq) {
  802. rc = -ENOMEM;
  803. goto fail4;
  804. }
  805. ptp->nic_ts_enabled = false;
  806. return 0;
  807. fail4:
  808. ptp_clock_unregister(efx->ptp_data->phc_clock);
  809. fail3:
  810. destroy_workqueue(efx->ptp_data->workwq);
  811. fail2:
  812. efx_nic_free_buffer(efx, &ptp->start);
  813. fail1:
  814. kfree(efx->ptp_data);
  815. efx->ptp_data = NULL;
  816. return rc;
  817. }
  818. static void efx_ptp_remove_channel(struct efx_channel *channel)
  819. {
  820. struct efx_nic *efx = channel->efx;
  821. if (!efx->ptp_data)
  822. return;
  823. (void)efx_ptp_disable(channel->efx);
  824. cancel_work_sync(&efx->ptp_data->work);
  825. cancel_work_sync(&efx->ptp_data->pps_work);
  826. skb_queue_purge(&efx->ptp_data->rxq);
  827. skb_queue_purge(&efx->ptp_data->txq);
  828. ptp_clock_unregister(efx->ptp_data->phc_clock);
  829. destroy_workqueue(efx->ptp_data->workwq);
  830. destroy_workqueue(efx->ptp_data->pps_workwq);
  831. efx_nic_free_buffer(efx, &efx->ptp_data->start);
  832. kfree(efx->ptp_data);
  833. }
  834. static void efx_ptp_get_channel_name(struct efx_channel *channel,
  835. char *buf, size_t len)
  836. {
  837. snprintf(buf, len, "%s-ptp", channel->efx->name);
  838. }
  839. /* Determine whether this packet should be processed by the PTP module
  840. * or transmitted conventionally.
  841. */
  842. bool efx_ptp_is_ptp_tx(struct efx_nic *efx, struct sk_buff *skb)
  843. {
  844. return efx->ptp_data &&
  845. efx->ptp_data->enabled &&
  846. skb->len >= PTP_MIN_LENGTH &&
  847. skb->len <= MC_CMD_PTP_IN_TRANSMIT_PACKET_MAXNUM &&
  848. likely(skb->protocol == htons(ETH_P_IP)) &&
  849. ip_hdr(skb)->protocol == IPPROTO_UDP &&
  850. udp_hdr(skb)->dest == htons(PTP_EVENT_PORT);
  851. }
  852. /* Receive a PTP packet. Packets are queued until the arrival of
  853. * the receive timestamp from the MC - this will probably occur after the
  854. * packet arrival because of the processing in the MC.
  855. */
  856. static bool efx_ptp_rx(struct efx_channel *channel, struct sk_buff *skb)
  857. {
  858. struct efx_nic *efx = channel->efx;
  859. struct efx_ptp_data *ptp = efx->ptp_data;
  860. struct efx_ptp_match *match = (struct efx_ptp_match *)skb->cb;
  861. u8 *match_data_012, *match_data_345;
  862. unsigned int version;
  863. match->expiry = jiffies + msecs_to_jiffies(PKT_EVENT_LIFETIME_MS);
  864. /* Correct version? */
  865. if (ptp->mode == MC_CMD_PTP_MODE_V1) {
  866. if (!pskb_may_pull(skb, PTP_V1_MIN_LENGTH)) {
  867. return false;
  868. }
  869. version = ntohs(*(__be16 *)&skb->data[PTP_V1_VERSION_OFFSET]);
  870. if (version != PTP_VERSION_V1) {
  871. return false;
  872. }
  873. /* PTP V1 uses all six bytes of the UUID to match the packet
  874. * to the timestamp
  875. */
  876. match_data_012 = skb->data + PTP_V1_UUID_OFFSET;
  877. match_data_345 = skb->data + PTP_V1_UUID_OFFSET + 3;
  878. } else {
  879. if (!pskb_may_pull(skb, PTP_V2_MIN_LENGTH)) {
  880. return false;
  881. }
  882. version = skb->data[PTP_V2_VERSION_OFFSET];
  883. if ((version & PTP_VERSION_V2_MASK) != PTP_VERSION_V2) {
  884. return false;
  885. }
  886. /* The original V2 implementation uses bytes 2-7 of
  887. * the UUID to match the packet to the timestamp. This
  888. * discards two of the bytes of the MAC address used
  889. * to create the UUID (SF bug 33070). The PTP V2
  890. * enhanced mode fixes this issue and uses bytes 0-2
  891. * and byte 5-7 of the UUID.
  892. */
  893. match_data_345 = skb->data + PTP_V2_UUID_OFFSET + 5;
  894. if (ptp->mode == MC_CMD_PTP_MODE_V2) {
  895. match_data_012 = skb->data + PTP_V2_UUID_OFFSET + 2;
  896. } else {
  897. match_data_012 = skb->data + PTP_V2_UUID_OFFSET + 0;
  898. BUG_ON(ptp->mode != MC_CMD_PTP_MODE_V2_ENHANCED);
  899. }
  900. }
  901. /* Does this packet require timestamping? */
  902. if (ntohs(*(__be16 *)&skb->data[PTP_DPORT_OFFSET]) == PTP_EVENT_PORT) {
  903. struct skb_shared_hwtstamps *timestamps;
  904. match->state = PTP_PACKET_STATE_UNMATCHED;
  905. /* Clear all timestamps held: filled in later */
  906. timestamps = skb_hwtstamps(skb);
  907. memset(timestamps, 0, sizeof(*timestamps));
  908. /* We expect the sequence number to be in the same position in
  909. * the packet for PTP V1 and V2
  910. */
  911. BUILD_BUG_ON(PTP_V1_SEQUENCE_OFFSET != PTP_V2_SEQUENCE_OFFSET);
  912. BUILD_BUG_ON(PTP_V1_SEQUENCE_LENGTH != PTP_V2_SEQUENCE_LENGTH);
  913. /* Extract UUID/Sequence information */
  914. match->words[0] = (match_data_012[0] |
  915. (match_data_012[1] << 8) |
  916. (match_data_012[2] << 16) |
  917. (match_data_345[0] << 24));
  918. match->words[1] = (match_data_345[1] |
  919. (match_data_345[2] << 8) |
  920. (skb->data[PTP_V1_SEQUENCE_OFFSET +
  921. PTP_V1_SEQUENCE_LENGTH - 1] <<
  922. 16));
  923. } else {
  924. match->state = PTP_PACKET_STATE_MATCH_UNWANTED;
  925. }
  926. skb_queue_tail(&ptp->rxq, skb);
  927. queue_work(ptp->workwq, &ptp->work);
  928. return true;
  929. }
  930. /* Transmit a PTP packet. This has to be transmitted by the MC
  931. * itself, through an MCDI call. MCDI calls aren't permitted
  932. * in the transmit path so defer the actual transmission to a suitable worker.
  933. */
  934. int efx_ptp_tx(struct efx_nic *efx, struct sk_buff *skb)
  935. {
  936. struct efx_ptp_data *ptp = efx->ptp_data;
  937. skb_queue_tail(&ptp->txq, skb);
  938. if ((udp_hdr(skb)->dest == htons(PTP_EVENT_PORT)) &&
  939. (skb->len <= MC_CMD_PTP_IN_TRANSMIT_PACKET_MAXNUM))
  940. efx_xmit_hwtstamp_pending(skb);
  941. queue_work(ptp->workwq, &ptp->work);
  942. return NETDEV_TX_OK;
  943. }
  944. static int efx_ptp_change_mode(struct efx_nic *efx, bool enable_wanted,
  945. unsigned int new_mode)
  946. {
  947. if ((enable_wanted != efx->ptp_data->enabled) ||
  948. (enable_wanted && (efx->ptp_data->mode != new_mode))) {
  949. int rc;
  950. if (enable_wanted) {
  951. /* Change of mode requires disable */
  952. if (efx->ptp_data->enabled &&
  953. (efx->ptp_data->mode != new_mode)) {
  954. efx->ptp_data->enabled = false;
  955. rc = efx_ptp_stop(efx);
  956. if (rc != 0)
  957. return rc;
  958. }
  959. /* Set new operating mode and establish
  960. * baseline synchronisation, which must
  961. * succeed.
  962. */
  963. efx->ptp_data->mode = new_mode;
  964. rc = efx_ptp_start(efx);
  965. if (rc == 0) {
  966. rc = efx_ptp_synchronize(efx,
  967. PTP_SYNC_ATTEMPTS * 2);
  968. if (rc != 0)
  969. efx_ptp_stop(efx);
  970. }
  971. } else {
  972. rc = efx_ptp_stop(efx);
  973. }
  974. if (rc != 0)
  975. return rc;
  976. efx->ptp_data->enabled = enable_wanted;
  977. }
  978. return 0;
  979. }
  980. static int efx_ptp_ts_init(struct efx_nic *efx, struct hwtstamp_config *init)
  981. {
  982. bool enable_wanted = false;
  983. unsigned int new_mode;
  984. int rc;
  985. if (init->flags)
  986. return -EINVAL;
  987. if ((init->tx_type != HWTSTAMP_TX_OFF) &&
  988. (init->tx_type != HWTSTAMP_TX_ON))
  989. return -ERANGE;
  990. new_mode = efx->ptp_data->mode;
  991. /* Determine whether any PTP HW operations are required */
  992. switch (init->rx_filter) {
  993. case HWTSTAMP_FILTER_NONE:
  994. break;
  995. case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
  996. case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
  997. case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
  998. init->rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;
  999. new_mode = MC_CMD_PTP_MODE_V1;
  1000. enable_wanted = true;
  1001. break;
  1002. case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
  1003. case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
  1004. case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
  1005. /* Although these three are accepted only IPV4 packets will be
  1006. * timestamped
  1007. */
  1008. init->rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT;
  1009. new_mode = MC_CMD_PTP_MODE_V2_ENHANCED;
  1010. enable_wanted = true;
  1011. break;
  1012. case HWTSTAMP_FILTER_PTP_V2_EVENT:
  1013. case HWTSTAMP_FILTER_PTP_V2_SYNC:
  1014. case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
  1015. case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
  1016. case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
  1017. case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
  1018. /* Non-IP + IPv6 timestamping not supported */
  1019. return -ERANGE;
  1020. break;
  1021. default:
  1022. return -ERANGE;
  1023. }
  1024. if (init->tx_type != HWTSTAMP_TX_OFF)
  1025. enable_wanted = true;
  1026. /* Old versions of the firmware do not support the improved
  1027. * UUID filtering option (SF bug 33070). If the firmware does
  1028. * not accept the enhanced mode, fall back to the standard PTP
  1029. * v2 UUID filtering.
  1030. */
  1031. rc = efx_ptp_change_mode(efx, enable_wanted, new_mode);
  1032. if ((rc != 0) && (new_mode == MC_CMD_PTP_MODE_V2_ENHANCED))
  1033. rc = efx_ptp_change_mode(efx, enable_wanted, MC_CMD_PTP_MODE_V2);
  1034. if (rc != 0)
  1035. return rc;
  1036. efx->ptp_data->config = *init;
  1037. return 0;
  1038. }
  1039. void efx_ptp_get_ts_info(struct efx_nic *efx, struct ethtool_ts_info *ts_info)
  1040. {
  1041. struct efx_ptp_data *ptp = efx->ptp_data;
  1042. if (!ptp)
  1043. return;
  1044. ts_info->so_timestamping |= (SOF_TIMESTAMPING_TX_HARDWARE |
  1045. SOF_TIMESTAMPING_RX_HARDWARE |
  1046. SOF_TIMESTAMPING_RAW_HARDWARE);
  1047. ts_info->phc_index = ptp_clock_index(ptp->phc_clock);
  1048. ts_info->tx_types = 1 << HWTSTAMP_TX_OFF | 1 << HWTSTAMP_TX_ON;
  1049. ts_info->rx_filters = (1 << HWTSTAMP_FILTER_NONE |
  1050. 1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT |
  1051. 1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC |
  1052. 1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ |
  1053. 1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT |
  1054. 1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC |
  1055. 1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
  1056. }
  1057. int efx_ptp_ioctl(struct efx_nic *efx, struct ifreq *ifr, int cmd)
  1058. {
  1059. struct hwtstamp_config config;
  1060. int rc;
  1061. /* Not a PTP enabled port */
  1062. if (!efx->ptp_data)
  1063. return -EOPNOTSUPP;
  1064. if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
  1065. return -EFAULT;
  1066. rc = efx_ptp_ts_init(efx, &config);
  1067. if (rc != 0)
  1068. return rc;
  1069. return copy_to_user(ifr->ifr_data, &config, sizeof(config))
  1070. ? -EFAULT : 0;
  1071. }
  1072. static void ptp_event_failure(struct efx_nic *efx, int expected_frag_len)
  1073. {
  1074. struct efx_ptp_data *ptp = efx->ptp_data;
  1075. netif_err(efx, hw, efx->net_dev,
  1076. "PTP unexpected event length: got %d expected %d\n",
  1077. ptp->evt_frag_idx, expected_frag_len);
  1078. ptp->reset_required = true;
  1079. queue_work(ptp->workwq, &ptp->work);
  1080. }
  1081. /* Process a completed receive event. Put it on the event queue and
  1082. * start worker thread. This is required because event and their
  1083. * correspoding packets may come in either order.
  1084. */
  1085. static void ptp_event_rx(struct efx_nic *efx, struct efx_ptp_data *ptp)
  1086. {
  1087. struct efx_ptp_event_rx *evt = NULL;
  1088. if (ptp->evt_frag_idx != 3) {
  1089. ptp_event_failure(efx, 3);
  1090. return;
  1091. }
  1092. spin_lock_bh(&ptp->evt_lock);
  1093. if (!list_empty(&ptp->evt_free_list)) {
  1094. evt = list_first_entry(&ptp->evt_free_list,
  1095. struct efx_ptp_event_rx, link);
  1096. list_del(&evt->link);
  1097. evt->seq0 = EFX_QWORD_FIELD(ptp->evt_frags[2], MCDI_EVENT_DATA);
  1098. evt->seq1 = (EFX_QWORD_FIELD(ptp->evt_frags[2],
  1099. MCDI_EVENT_SRC) |
  1100. (EFX_QWORD_FIELD(ptp->evt_frags[1],
  1101. MCDI_EVENT_SRC) << 8) |
  1102. (EFX_QWORD_FIELD(ptp->evt_frags[0],
  1103. MCDI_EVENT_SRC) << 16));
  1104. evt->hwtimestamp = ktime_set(
  1105. EFX_QWORD_FIELD(ptp->evt_frags[0], MCDI_EVENT_DATA),
  1106. EFX_QWORD_FIELD(ptp->evt_frags[1], MCDI_EVENT_DATA));
  1107. evt->expiry = jiffies + msecs_to_jiffies(PKT_EVENT_LIFETIME_MS);
  1108. list_add_tail(&evt->link, &ptp->evt_list);
  1109. queue_work(ptp->workwq, &ptp->work);
  1110. } else {
  1111. netif_err(efx, rx_err, efx->net_dev, "No free PTP event");
  1112. }
  1113. spin_unlock_bh(&ptp->evt_lock);
  1114. }
  1115. static void ptp_event_fault(struct efx_nic *efx, struct efx_ptp_data *ptp)
  1116. {
  1117. int code = EFX_QWORD_FIELD(ptp->evt_frags[0], MCDI_EVENT_DATA);
  1118. if (ptp->evt_frag_idx != 1) {
  1119. ptp_event_failure(efx, 1);
  1120. return;
  1121. }
  1122. netif_err(efx, hw, efx->net_dev, "PTP error %d\n", code);
  1123. }
  1124. static void ptp_event_pps(struct efx_nic *efx, struct efx_ptp_data *ptp)
  1125. {
  1126. if (ptp->nic_ts_enabled)
  1127. queue_work(ptp->pps_workwq, &ptp->pps_work);
  1128. }
  1129. void efx_ptp_event(struct efx_nic *efx, efx_qword_t *ev)
  1130. {
  1131. struct efx_ptp_data *ptp = efx->ptp_data;
  1132. int code = EFX_QWORD_FIELD(*ev, MCDI_EVENT_CODE);
  1133. if (!ptp->enabled)
  1134. return;
  1135. if (ptp->evt_frag_idx == 0) {
  1136. ptp->evt_code = code;
  1137. } else if (ptp->evt_code != code) {
  1138. netif_err(efx, hw, efx->net_dev,
  1139. "PTP out of sequence event %d\n", code);
  1140. ptp->evt_frag_idx = 0;
  1141. }
  1142. ptp->evt_frags[ptp->evt_frag_idx++] = *ev;
  1143. if (!MCDI_EVENT_FIELD(*ev, CONT)) {
  1144. /* Process resulting event */
  1145. switch (code) {
  1146. case MCDI_EVENT_CODE_PTP_RX:
  1147. ptp_event_rx(efx, ptp);
  1148. break;
  1149. case MCDI_EVENT_CODE_PTP_FAULT:
  1150. ptp_event_fault(efx, ptp);
  1151. break;
  1152. case MCDI_EVENT_CODE_PTP_PPS:
  1153. ptp_event_pps(efx, ptp);
  1154. break;
  1155. default:
  1156. netif_err(efx, hw, efx->net_dev,
  1157. "PTP unknown event %d\n", code);
  1158. break;
  1159. }
  1160. ptp->evt_frag_idx = 0;
  1161. } else if (MAX_EVENT_FRAGS == ptp->evt_frag_idx) {
  1162. netif_err(efx, hw, efx->net_dev,
  1163. "PTP too many event fragments\n");
  1164. ptp->evt_frag_idx = 0;
  1165. }
  1166. }
  1167. static int efx_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta)
  1168. {
  1169. struct efx_ptp_data *ptp_data = container_of(ptp,
  1170. struct efx_ptp_data,
  1171. phc_clock_info);
  1172. struct efx_nic *efx = ptp_data->channel->efx;
  1173. MCDI_DECLARE_BUF(inadj, MC_CMD_PTP_IN_ADJUST_LEN);
  1174. s64 adjustment_ns;
  1175. int rc;
  1176. if (delta > MAX_PPB)
  1177. delta = MAX_PPB;
  1178. else if (delta < -MAX_PPB)
  1179. delta = -MAX_PPB;
  1180. /* Convert ppb to fixed point ns. */
  1181. adjustment_ns = (((s64)delta * PPB_SCALE_WORD) >>
  1182. (PPB_EXTRA_BITS + MAX_PPB_BITS));
  1183. MCDI_SET_DWORD(inadj, PTP_IN_OP, MC_CMD_PTP_OP_ADJUST);
  1184. MCDI_SET_DWORD(inadj, PTP_IN_PERIPH_ID, 0);
  1185. MCDI_SET_QWORD(inadj, PTP_IN_ADJUST_FREQ, adjustment_ns);
  1186. MCDI_SET_DWORD(inadj, PTP_IN_ADJUST_SECONDS, 0);
  1187. MCDI_SET_DWORD(inadj, PTP_IN_ADJUST_NANOSECONDS, 0);
  1188. rc = efx_mcdi_rpc(efx, MC_CMD_PTP, inadj, sizeof(inadj),
  1189. NULL, 0, NULL);
  1190. if (rc != 0)
  1191. return rc;
  1192. ptp_data->current_adjfreq = delta;
  1193. return 0;
  1194. }
  1195. static int efx_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
  1196. {
  1197. struct efx_ptp_data *ptp_data = container_of(ptp,
  1198. struct efx_ptp_data,
  1199. phc_clock_info);
  1200. struct efx_nic *efx = ptp_data->channel->efx;
  1201. struct timespec delta_ts = ns_to_timespec(delta);
  1202. MCDI_DECLARE_BUF(inbuf, MC_CMD_PTP_IN_ADJUST_LEN);
  1203. MCDI_SET_DWORD(inbuf, PTP_IN_OP, MC_CMD_PTP_OP_ADJUST);
  1204. MCDI_SET_DWORD(inbuf, PTP_IN_PERIPH_ID, 0);
  1205. MCDI_SET_QWORD(inbuf, PTP_IN_ADJUST_FREQ, 0);
  1206. MCDI_SET_DWORD(inbuf, PTP_IN_ADJUST_SECONDS, (u32)delta_ts.tv_sec);
  1207. MCDI_SET_DWORD(inbuf, PTP_IN_ADJUST_NANOSECONDS, (u32)delta_ts.tv_nsec);
  1208. return efx_mcdi_rpc(efx, MC_CMD_PTP, inbuf, sizeof(inbuf),
  1209. NULL, 0, NULL);
  1210. }
  1211. static int efx_phc_gettime(struct ptp_clock_info *ptp, struct timespec *ts)
  1212. {
  1213. struct efx_ptp_data *ptp_data = container_of(ptp,
  1214. struct efx_ptp_data,
  1215. phc_clock_info);
  1216. struct efx_nic *efx = ptp_data->channel->efx;
  1217. MCDI_DECLARE_BUF(inbuf, MC_CMD_PTP_IN_READ_NIC_TIME_LEN);
  1218. MCDI_DECLARE_BUF(outbuf, MC_CMD_PTP_OUT_READ_NIC_TIME_LEN);
  1219. int rc;
  1220. MCDI_SET_DWORD(inbuf, PTP_IN_OP, MC_CMD_PTP_OP_READ_NIC_TIME);
  1221. MCDI_SET_DWORD(inbuf, PTP_IN_PERIPH_ID, 0);
  1222. rc = efx_mcdi_rpc(efx, MC_CMD_PTP, inbuf, sizeof(inbuf),
  1223. outbuf, sizeof(outbuf), NULL);
  1224. if (rc != 0)
  1225. return rc;
  1226. ts->tv_sec = MCDI_DWORD(outbuf, PTP_OUT_READ_NIC_TIME_SECONDS);
  1227. ts->tv_nsec = MCDI_DWORD(outbuf, PTP_OUT_READ_NIC_TIME_NANOSECONDS);
  1228. return 0;
  1229. }
  1230. static int efx_phc_settime(struct ptp_clock_info *ptp,
  1231. const struct timespec *e_ts)
  1232. {
  1233. /* Get the current NIC time, efx_phc_gettime.
  1234. * Subtract from the desired time to get the offset
  1235. * call efx_phc_adjtime with the offset
  1236. */
  1237. int rc;
  1238. struct timespec time_now;
  1239. struct timespec delta;
  1240. rc = efx_phc_gettime(ptp, &time_now);
  1241. if (rc != 0)
  1242. return rc;
  1243. delta = timespec_sub(*e_ts, time_now);
  1244. rc = efx_phc_adjtime(ptp, timespec_to_ns(&delta));
  1245. if (rc != 0)
  1246. return rc;
  1247. return 0;
  1248. }
  1249. static int efx_phc_enable(struct ptp_clock_info *ptp,
  1250. struct ptp_clock_request *request,
  1251. int enable)
  1252. {
  1253. struct efx_ptp_data *ptp_data = container_of(ptp,
  1254. struct efx_ptp_data,
  1255. phc_clock_info);
  1256. if (request->type != PTP_CLK_REQ_PPS)
  1257. return -EOPNOTSUPP;
  1258. ptp_data->nic_ts_enabled = !!enable;
  1259. return 0;
  1260. }
  1261. static const struct efx_channel_type efx_ptp_channel_type = {
  1262. .handle_no_channel = efx_ptp_handle_no_channel,
  1263. .pre_probe = efx_ptp_probe_channel,
  1264. .post_remove = efx_ptp_remove_channel,
  1265. .get_name = efx_ptp_get_channel_name,
  1266. /* no copy operation; there is no need to reallocate this channel */
  1267. .receive_skb = efx_ptp_rx,
  1268. .keep_eventq = false,
  1269. };
  1270. void efx_ptp_probe(struct efx_nic *efx)
  1271. {
  1272. /* Check whether PTP is implemented on this NIC. The DISABLE
  1273. * operation will succeed if and only if it is implemented.
  1274. */
  1275. if (efx_ptp_disable(efx) == 0)
  1276. efx->extra_channel_type[EFX_EXTRA_CHANNEL_PTP] =
  1277. &efx_ptp_channel_type;
  1278. }