i40e_lan_hmc.c 30 KB

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  1. /*******************************************************************************
  2. *
  3. * Intel Ethernet Controller XL710 Family Linux Driver
  4. * Copyright(c) 2013 Intel Corporation.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along with
  16. * this program; if not, write to the Free Software Foundation, Inc.,
  17. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18. *
  19. * The full GNU General Public License is included in this distribution in
  20. * the file called "COPYING".
  21. *
  22. * Contact Information:
  23. * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25. *
  26. ******************************************************************************/
  27. #include "i40e_osdep.h"
  28. #include "i40e_register.h"
  29. #include "i40e_type.h"
  30. #include "i40e_hmc.h"
  31. #include "i40e_lan_hmc.h"
  32. #include "i40e_prototype.h"
  33. /* lan specific interface functions */
  34. /**
  35. * i40e_align_l2obj_base - aligns base object pointer to 512 bytes
  36. * @offset: base address offset needing alignment
  37. *
  38. * Aligns the layer 2 function private memory so it's 512-byte aligned.
  39. **/
  40. static u64 i40e_align_l2obj_base(u64 offset)
  41. {
  42. u64 aligned_offset = offset;
  43. if ((offset % I40E_HMC_L2OBJ_BASE_ALIGNMENT) > 0)
  44. aligned_offset += (I40E_HMC_L2OBJ_BASE_ALIGNMENT -
  45. (offset % I40E_HMC_L2OBJ_BASE_ALIGNMENT));
  46. return aligned_offset;
  47. }
  48. /**
  49. * i40e_calculate_l2fpm_size - calculates layer 2 FPM memory size
  50. * @txq_num: number of Tx queues needing backing context
  51. * @rxq_num: number of Rx queues needing backing context
  52. * @fcoe_cntx_num: amount of FCoE statefull contexts needing backing context
  53. * @fcoe_filt_num: number of FCoE filters needing backing context
  54. *
  55. * Calculates the maximum amount of memory for the function required, based
  56. * on the number of resources it must provide context for.
  57. **/
  58. static u64 i40e_calculate_l2fpm_size(u32 txq_num, u32 rxq_num,
  59. u32 fcoe_cntx_num, u32 fcoe_filt_num)
  60. {
  61. u64 fpm_size = 0;
  62. fpm_size = txq_num * I40E_HMC_OBJ_SIZE_TXQ;
  63. fpm_size = i40e_align_l2obj_base(fpm_size);
  64. fpm_size += (rxq_num * I40E_HMC_OBJ_SIZE_RXQ);
  65. fpm_size = i40e_align_l2obj_base(fpm_size);
  66. fpm_size += (fcoe_cntx_num * I40E_HMC_OBJ_SIZE_FCOE_CNTX);
  67. fpm_size = i40e_align_l2obj_base(fpm_size);
  68. fpm_size += (fcoe_filt_num * I40E_HMC_OBJ_SIZE_FCOE_FILT);
  69. fpm_size = i40e_align_l2obj_base(fpm_size);
  70. return fpm_size;
  71. }
  72. /**
  73. * i40e_init_lan_hmc - initialize i40e_hmc_info struct
  74. * @hw: pointer to the HW structure
  75. * @txq_num: number of Tx queues needing backing context
  76. * @rxq_num: number of Rx queues needing backing context
  77. * @fcoe_cntx_num: amount of FCoE statefull contexts needing backing context
  78. * @fcoe_filt_num: number of FCoE filters needing backing context
  79. *
  80. * This function will be called once per physical function initialization.
  81. * It will fill out the i40e_hmc_obj_info structure for LAN objects based on
  82. * the driver's provided input, as well as information from the HMC itself
  83. * loaded from NVRAM.
  84. *
  85. * Assumptions:
  86. * - HMC Resource Profile has been selected before calling this function.
  87. **/
  88. i40e_status i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num,
  89. u32 rxq_num, u32 fcoe_cntx_num,
  90. u32 fcoe_filt_num)
  91. {
  92. struct i40e_hmc_obj_info *obj, *full_obj;
  93. i40e_status ret_code = 0;
  94. u64 l2fpm_size;
  95. u32 size_exp;
  96. hw->hmc.signature = I40E_HMC_INFO_SIGNATURE;
  97. hw->hmc.hmc_fn_id = hw->pf_id;
  98. /* allocate memory for hmc_obj */
  99. ret_code = i40e_allocate_virt_mem(hw, &hw->hmc.hmc_obj_virt_mem,
  100. sizeof(struct i40e_hmc_obj_info) * I40E_HMC_LAN_MAX);
  101. if (ret_code)
  102. goto init_lan_hmc_out;
  103. hw->hmc.hmc_obj = (struct i40e_hmc_obj_info *)
  104. hw->hmc.hmc_obj_virt_mem.va;
  105. /* The full object will be used to create the LAN HMC SD */
  106. full_obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_FULL];
  107. full_obj->max_cnt = 0;
  108. full_obj->cnt = 0;
  109. full_obj->base = 0;
  110. full_obj->size = 0;
  111. /* Tx queue context information */
  112. obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_TX];
  113. obj->max_cnt = rd32(hw, I40E_GLHMC_LANQMAX);
  114. obj->cnt = txq_num;
  115. obj->base = 0;
  116. size_exp = rd32(hw, I40E_GLHMC_LANTXOBJSZ);
  117. obj->size = (u64)1 << size_exp;
  118. /* validate values requested by driver don't exceed HMC capacity */
  119. if (txq_num > obj->max_cnt) {
  120. ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT;
  121. hw_dbg(hw, "i40e_init_lan_hmc: Tx context: asks for 0x%x but max allowed is 0x%x, returns error %d\n",
  122. txq_num, obj->max_cnt, ret_code);
  123. goto init_lan_hmc_out;
  124. }
  125. /* aggregate values into the full LAN object for later */
  126. full_obj->max_cnt += obj->max_cnt;
  127. full_obj->cnt += obj->cnt;
  128. /* Rx queue context information */
  129. obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_RX];
  130. obj->max_cnt = rd32(hw, I40E_GLHMC_LANQMAX);
  131. obj->cnt = rxq_num;
  132. obj->base = hw->hmc.hmc_obj[I40E_HMC_LAN_TX].base +
  133. (hw->hmc.hmc_obj[I40E_HMC_LAN_TX].cnt *
  134. hw->hmc.hmc_obj[I40E_HMC_LAN_TX].size);
  135. obj->base = i40e_align_l2obj_base(obj->base);
  136. size_exp = rd32(hw, I40E_GLHMC_LANRXOBJSZ);
  137. obj->size = (u64)1 << size_exp;
  138. /* validate values requested by driver don't exceed HMC capacity */
  139. if (rxq_num > obj->max_cnt) {
  140. ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT;
  141. hw_dbg(hw, "i40e_init_lan_hmc: Rx context: asks for 0x%x but max allowed is 0x%x, returns error %d\n",
  142. rxq_num, obj->max_cnt, ret_code);
  143. goto init_lan_hmc_out;
  144. }
  145. /* aggregate values into the full LAN object for later */
  146. full_obj->max_cnt += obj->max_cnt;
  147. full_obj->cnt += obj->cnt;
  148. /* FCoE context information */
  149. obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX];
  150. obj->max_cnt = rd32(hw, I40E_GLHMC_FCOEMAX);
  151. obj->cnt = fcoe_cntx_num;
  152. obj->base = hw->hmc.hmc_obj[I40E_HMC_LAN_RX].base +
  153. (hw->hmc.hmc_obj[I40E_HMC_LAN_RX].cnt *
  154. hw->hmc.hmc_obj[I40E_HMC_LAN_RX].size);
  155. obj->base = i40e_align_l2obj_base(obj->base);
  156. size_exp = rd32(hw, I40E_GLHMC_FCOEDDPOBJSZ);
  157. obj->size = (u64)1 << size_exp;
  158. /* validate values requested by driver don't exceed HMC capacity */
  159. if (fcoe_cntx_num > obj->max_cnt) {
  160. ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT;
  161. hw_dbg(hw, "i40e_init_lan_hmc: FCoE context: asks for 0x%x but max allowed is 0x%x, returns error %d\n",
  162. fcoe_cntx_num, obj->max_cnt, ret_code);
  163. goto init_lan_hmc_out;
  164. }
  165. /* aggregate values into the full LAN object for later */
  166. full_obj->max_cnt += obj->max_cnt;
  167. full_obj->cnt += obj->cnt;
  168. /* FCoE filter information */
  169. obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_FILT];
  170. obj->max_cnt = rd32(hw, I40E_GLHMC_FCOEFMAX);
  171. obj->cnt = fcoe_filt_num;
  172. obj->base = hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX].base +
  173. (hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX].cnt *
  174. hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX].size);
  175. obj->base = i40e_align_l2obj_base(obj->base);
  176. size_exp = rd32(hw, I40E_GLHMC_FCOEFOBJSZ);
  177. obj->size = (u64)1 << size_exp;
  178. /* validate values requested by driver don't exceed HMC capacity */
  179. if (fcoe_filt_num > obj->max_cnt) {
  180. ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT;
  181. hw_dbg(hw, "i40e_init_lan_hmc: FCoE filter: asks for 0x%x but max allowed is 0x%x, returns error %d\n",
  182. fcoe_filt_num, obj->max_cnt, ret_code);
  183. goto init_lan_hmc_out;
  184. }
  185. /* aggregate values into the full LAN object for later */
  186. full_obj->max_cnt += obj->max_cnt;
  187. full_obj->cnt += obj->cnt;
  188. hw->hmc.first_sd_index = 0;
  189. hw->hmc.sd_table.ref_cnt = 0;
  190. l2fpm_size = i40e_calculate_l2fpm_size(txq_num, rxq_num, fcoe_cntx_num,
  191. fcoe_filt_num);
  192. if (NULL == hw->hmc.sd_table.sd_entry) {
  193. hw->hmc.sd_table.sd_cnt = (u32)
  194. (l2fpm_size + I40E_HMC_DIRECT_BP_SIZE - 1) /
  195. I40E_HMC_DIRECT_BP_SIZE;
  196. /* allocate the sd_entry members in the sd_table */
  197. ret_code = i40e_allocate_virt_mem(hw, &hw->hmc.sd_table.addr,
  198. (sizeof(struct i40e_hmc_sd_entry) *
  199. hw->hmc.sd_table.sd_cnt));
  200. if (ret_code)
  201. goto init_lan_hmc_out;
  202. hw->hmc.sd_table.sd_entry =
  203. (struct i40e_hmc_sd_entry *)hw->hmc.sd_table.addr.va;
  204. }
  205. /* store in the LAN full object for later */
  206. full_obj->size = l2fpm_size;
  207. init_lan_hmc_out:
  208. return ret_code;
  209. }
  210. /**
  211. * i40e_remove_pd_page - Remove a page from the page descriptor table
  212. * @hw: pointer to the HW structure
  213. * @hmc_info: pointer to the HMC configuration information structure
  214. * @idx: segment descriptor index to find the relevant page descriptor
  215. *
  216. * This function:
  217. * 1. Marks the entry in pd table (for paged address mode) invalid
  218. * 2. write to register PMPDINV to invalidate the backing page in FV cache
  219. * 3. Decrement the ref count for pd_entry
  220. * assumptions:
  221. * 1. caller can deallocate the memory used by pd after this function
  222. * returns.
  223. **/
  224. static i40e_status i40e_remove_pd_page(struct i40e_hw *hw,
  225. struct i40e_hmc_info *hmc_info,
  226. u32 idx)
  227. {
  228. i40e_status ret_code = 0;
  229. if (!i40e_prep_remove_pd_page(hmc_info, idx))
  230. ret_code = i40e_remove_pd_page_new(hw, hmc_info, idx, true);
  231. return ret_code;
  232. }
  233. /**
  234. * i40e_remove_sd_bp - remove a backing page from a segment descriptor
  235. * @hw: pointer to our HW structure
  236. * @hmc_info: pointer to the HMC configuration information structure
  237. * @idx: the page index
  238. *
  239. * This function:
  240. * 1. Marks the entry in sd table (for direct address mode) invalid
  241. * 2. write to register PMSDCMD, PMSDDATALOW(PMSDDATALOW.PMSDVALID set
  242. * to 0) and PMSDDATAHIGH to invalidate the sd page
  243. * 3. Decrement the ref count for the sd_entry
  244. * assumptions:
  245. * 1. caller can deallocate the memory used by backing storage after this
  246. * function returns.
  247. **/
  248. static i40e_status i40e_remove_sd_bp(struct i40e_hw *hw,
  249. struct i40e_hmc_info *hmc_info,
  250. u32 idx)
  251. {
  252. i40e_status ret_code = 0;
  253. if (!i40e_prep_remove_sd_bp(hmc_info, idx))
  254. ret_code = i40e_remove_sd_bp_new(hw, hmc_info, idx, true);
  255. return ret_code;
  256. }
  257. /**
  258. * i40e_create_lan_hmc_object - allocate backing store for hmc objects
  259. * @hw: pointer to the HW structure
  260. * @info: pointer to i40e_hmc_create_obj_info struct
  261. *
  262. * This will allocate memory for PDs and backing pages and populate
  263. * the sd and pd entries.
  264. **/
  265. static i40e_status i40e_create_lan_hmc_object(struct i40e_hw *hw,
  266. struct i40e_hmc_lan_create_obj_info *info)
  267. {
  268. i40e_status ret_code = 0;
  269. struct i40e_hmc_sd_entry *sd_entry;
  270. u32 pd_idx1 = 0, pd_lmt1 = 0;
  271. u32 pd_idx = 0, pd_lmt = 0;
  272. bool pd_error = false;
  273. u32 sd_idx, sd_lmt;
  274. u64 sd_size;
  275. u32 i, j;
  276. if (NULL == info) {
  277. ret_code = I40E_ERR_BAD_PTR;
  278. hw_dbg(hw, "i40e_create_lan_hmc_object: bad info ptr\n");
  279. goto exit;
  280. }
  281. if (NULL == info->hmc_info) {
  282. ret_code = I40E_ERR_BAD_PTR;
  283. hw_dbg(hw, "i40e_create_lan_hmc_object: bad hmc_info ptr\n");
  284. goto exit;
  285. }
  286. if (I40E_HMC_INFO_SIGNATURE != info->hmc_info->signature) {
  287. ret_code = I40E_ERR_BAD_PTR;
  288. hw_dbg(hw, "i40e_create_lan_hmc_object: bad signature\n");
  289. goto exit;
  290. }
  291. if (info->start_idx >= info->hmc_info->hmc_obj[info->rsrc_type].cnt) {
  292. ret_code = I40E_ERR_INVALID_HMC_OBJ_INDEX;
  293. hw_dbg(hw, "i40e_create_lan_hmc_object: returns error %d\n",
  294. ret_code);
  295. goto exit;
  296. }
  297. if ((info->start_idx + info->count) >
  298. info->hmc_info->hmc_obj[info->rsrc_type].cnt) {
  299. ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT;
  300. hw_dbg(hw, "i40e_create_lan_hmc_object: returns error %d\n",
  301. ret_code);
  302. goto exit;
  303. }
  304. /* find sd index and limit */
  305. I40E_FIND_SD_INDEX_LIMIT(info->hmc_info, info->rsrc_type,
  306. info->start_idx, info->count,
  307. &sd_idx, &sd_lmt);
  308. if (sd_idx >= info->hmc_info->sd_table.sd_cnt ||
  309. sd_lmt > info->hmc_info->sd_table.sd_cnt) {
  310. ret_code = I40E_ERR_INVALID_SD_INDEX;
  311. goto exit;
  312. }
  313. /* find pd index */
  314. I40E_FIND_PD_INDEX_LIMIT(info->hmc_info, info->rsrc_type,
  315. info->start_idx, info->count, &pd_idx,
  316. &pd_lmt);
  317. /* This is to cover for cases where you may not want to have an SD with
  318. * the full 2M memory but something smaller. By not filling out any
  319. * size, the function will default the SD size to be 2M.
  320. */
  321. if (info->direct_mode_sz == 0)
  322. sd_size = I40E_HMC_DIRECT_BP_SIZE;
  323. else
  324. sd_size = info->direct_mode_sz;
  325. /* check if all the sds are valid. If not, allocate a page and
  326. * initialize it.
  327. */
  328. for (j = sd_idx; j < sd_lmt; j++) {
  329. /* update the sd table entry */
  330. ret_code = i40e_add_sd_table_entry(hw, info->hmc_info, j,
  331. info->entry_type,
  332. sd_size);
  333. if (ret_code)
  334. goto exit_sd_error;
  335. sd_entry = &info->hmc_info->sd_table.sd_entry[j];
  336. if (I40E_SD_TYPE_PAGED == sd_entry->entry_type) {
  337. /* check if all the pds in this sd are valid. If not,
  338. * allocate a page and initialize it.
  339. */
  340. /* find pd_idx and pd_lmt in this sd */
  341. pd_idx1 = max(pd_idx, (j * I40E_HMC_MAX_BP_COUNT));
  342. pd_lmt1 = min(pd_lmt,
  343. ((j + 1) * I40E_HMC_MAX_BP_COUNT));
  344. for (i = pd_idx1; i < pd_lmt1; i++) {
  345. /* update the pd table entry */
  346. ret_code = i40e_add_pd_table_entry(hw,
  347. info->hmc_info,
  348. i);
  349. if (ret_code) {
  350. pd_error = true;
  351. break;
  352. }
  353. }
  354. if (pd_error) {
  355. /* remove the backing pages from pd_idx1 to i */
  356. while (i && (i > pd_idx1)) {
  357. i40e_remove_pd_bp(hw, info->hmc_info,
  358. (i - 1), true);
  359. i--;
  360. }
  361. }
  362. }
  363. if (!sd_entry->valid) {
  364. sd_entry->valid = true;
  365. switch (sd_entry->entry_type) {
  366. case I40E_SD_TYPE_PAGED:
  367. I40E_SET_PF_SD_ENTRY(hw,
  368. sd_entry->u.pd_table.pd_page_addr.pa,
  369. j, sd_entry->entry_type);
  370. break;
  371. case I40E_SD_TYPE_DIRECT:
  372. I40E_SET_PF_SD_ENTRY(hw, sd_entry->u.bp.addr.pa,
  373. j, sd_entry->entry_type);
  374. break;
  375. default:
  376. ret_code = I40E_ERR_INVALID_SD_TYPE;
  377. goto exit;
  378. break;
  379. }
  380. }
  381. }
  382. goto exit;
  383. exit_sd_error:
  384. /* cleanup for sd entries from j to sd_idx */
  385. while (j && (j > sd_idx)) {
  386. sd_entry = &info->hmc_info->sd_table.sd_entry[j - 1];
  387. switch (sd_entry->entry_type) {
  388. case I40E_SD_TYPE_PAGED:
  389. pd_idx1 = max(pd_idx,
  390. ((j - 1) * I40E_HMC_MAX_BP_COUNT));
  391. pd_lmt1 = min(pd_lmt, (j * I40E_HMC_MAX_BP_COUNT));
  392. for (i = pd_idx1; i < pd_lmt1; i++) {
  393. i40e_remove_pd_bp(
  394. hw,
  395. info->hmc_info,
  396. i,
  397. true);
  398. }
  399. i40e_remove_pd_page(hw, info->hmc_info, (j - 1));
  400. break;
  401. case I40E_SD_TYPE_DIRECT:
  402. i40e_remove_sd_bp(hw, info->hmc_info, (j - 1));
  403. break;
  404. default:
  405. ret_code = I40E_ERR_INVALID_SD_TYPE;
  406. break;
  407. }
  408. j--;
  409. }
  410. exit:
  411. return ret_code;
  412. }
  413. /**
  414. * i40e_configure_lan_hmc - prepare the HMC backing store
  415. * @hw: pointer to the hw structure
  416. * @model: the model for the layout of the SD/PD tables
  417. *
  418. * - This function will be called once per physical function initialization.
  419. * - This function will be called after i40e_init_lan_hmc() and before
  420. * any LAN/FCoE HMC objects can be created.
  421. **/
  422. i40e_status i40e_configure_lan_hmc(struct i40e_hw *hw,
  423. enum i40e_hmc_model model)
  424. {
  425. struct i40e_hmc_lan_create_obj_info info;
  426. i40e_status ret_code = 0;
  427. u8 hmc_fn_id = hw->hmc.hmc_fn_id;
  428. struct i40e_hmc_obj_info *obj;
  429. /* Initialize part of the create object info struct */
  430. info.hmc_info = &hw->hmc;
  431. info.rsrc_type = I40E_HMC_LAN_FULL;
  432. info.start_idx = 0;
  433. info.direct_mode_sz = hw->hmc.hmc_obj[I40E_HMC_LAN_FULL].size;
  434. /* Build the SD entry for the LAN objects */
  435. switch (model) {
  436. case I40E_HMC_MODEL_DIRECT_PREFERRED:
  437. case I40E_HMC_MODEL_DIRECT_ONLY:
  438. info.entry_type = I40E_SD_TYPE_DIRECT;
  439. /* Make one big object, a single SD */
  440. info.count = 1;
  441. ret_code = i40e_create_lan_hmc_object(hw, &info);
  442. if ((ret_code) &&
  443. (model == I40E_HMC_MODEL_DIRECT_PREFERRED))
  444. goto try_type_paged;
  445. else if (ret_code)
  446. goto configure_lan_hmc_out;
  447. /* else clause falls through the break */
  448. break;
  449. case I40E_HMC_MODEL_PAGED_ONLY:
  450. try_type_paged:
  451. info.entry_type = I40E_SD_TYPE_PAGED;
  452. /* Make one big object in the PD table */
  453. info.count = 1;
  454. ret_code = i40e_create_lan_hmc_object(hw, &info);
  455. if (ret_code)
  456. goto configure_lan_hmc_out;
  457. break;
  458. default:
  459. /* unsupported type */
  460. ret_code = I40E_ERR_INVALID_SD_TYPE;
  461. hw_dbg(hw, "i40e_configure_lan_hmc: Unknown SD type: %d\n",
  462. ret_code);
  463. goto configure_lan_hmc_out;
  464. break;
  465. }
  466. /* Configure and program the FPM registers so objects can be created */
  467. /* Tx contexts */
  468. obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_TX];
  469. wr32(hw, I40E_GLHMC_LANTXBASE(hmc_fn_id),
  470. (u32)((obj->base & I40E_GLHMC_LANTXBASE_FPMLANTXBASE_MASK) / 512));
  471. wr32(hw, I40E_GLHMC_LANTXCNT(hmc_fn_id), obj->cnt);
  472. /* Rx contexts */
  473. obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_RX];
  474. wr32(hw, I40E_GLHMC_LANRXBASE(hmc_fn_id),
  475. (u32)((obj->base & I40E_GLHMC_LANRXBASE_FPMLANRXBASE_MASK) / 512));
  476. wr32(hw, I40E_GLHMC_LANRXCNT(hmc_fn_id), obj->cnt);
  477. /* FCoE contexts */
  478. obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX];
  479. wr32(hw, I40E_GLHMC_FCOEDDPBASE(hmc_fn_id),
  480. (u32)((obj->base & I40E_GLHMC_FCOEDDPBASE_FPMFCOEDDPBASE_MASK) / 512));
  481. wr32(hw, I40E_GLHMC_FCOEDDPCNT(hmc_fn_id), obj->cnt);
  482. /* FCoE filters */
  483. obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_FILT];
  484. wr32(hw, I40E_GLHMC_FCOEFBASE(hmc_fn_id),
  485. (u32)((obj->base & I40E_GLHMC_FCOEFBASE_FPMFCOEFBASE_MASK) / 512));
  486. wr32(hw, I40E_GLHMC_FCOEFCNT(hmc_fn_id), obj->cnt);
  487. configure_lan_hmc_out:
  488. return ret_code;
  489. }
  490. /**
  491. * i40e_delete_hmc_object - remove hmc objects
  492. * @hw: pointer to the HW structure
  493. * @info: pointer to i40e_hmc_delete_obj_info struct
  494. *
  495. * This will de-populate the SDs and PDs. It frees
  496. * the memory for PDS and backing storage. After this function is returned,
  497. * caller should deallocate memory allocated previously for
  498. * book-keeping information about PDs and backing storage.
  499. **/
  500. static i40e_status i40e_delete_lan_hmc_object(struct i40e_hw *hw,
  501. struct i40e_hmc_lan_delete_obj_info *info)
  502. {
  503. i40e_status ret_code = 0;
  504. struct i40e_hmc_pd_table *pd_table;
  505. u32 pd_idx, pd_lmt, rel_pd_idx;
  506. u32 sd_idx, sd_lmt;
  507. u32 i, j;
  508. if (NULL == info) {
  509. ret_code = I40E_ERR_BAD_PTR;
  510. hw_dbg(hw, "i40e_delete_hmc_object: bad info ptr\n");
  511. goto exit;
  512. }
  513. if (NULL == info->hmc_info) {
  514. ret_code = I40E_ERR_BAD_PTR;
  515. hw_dbg(hw, "i40e_delete_hmc_object: bad info->hmc_info ptr\n");
  516. goto exit;
  517. }
  518. if (I40E_HMC_INFO_SIGNATURE != info->hmc_info->signature) {
  519. ret_code = I40E_ERR_BAD_PTR;
  520. hw_dbg(hw, "i40e_delete_hmc_object: bad hmc_info->signature\n");
  521. goto exit;
  522. }
  523. if (NULL == info->hmc_info->sd_table.sd_entry) {
  524. ret_code = I40E_ERR_BAD_PTR;
  525. hw_dbg(hw, "i40e_delete_hmc_object: bad sd_entry\n");
  526. goto exit;
  527. }
  528. if (NULL == info->hmc_info->hmc_obj) {
  529. ret_code = I40E_ERR_BAD_PTR;
  530. hw_dbg(hw, "i40e_delete_hmc_object: bad hmc_info->hmc_obj\n");
  531. goto exit;
  532. }
  533. if (info->start_idx >= info->hmc_info->hmc_obj[info->rsrc_type].cnt) {
  534. ret_code = I40E_ERR_INVALID_HMC_OBJ_INDEX;
  535. hw_dbg(hw, "i40e_delete_hmc_object: returns error %d\n",
  536. ret_code);
  537. goto exit;
  538. }
  539. if ((info->start_idx + info->count) >
  540. info->hmc_info->hmc_obj[info->rsrc_type].cnt) {
  541. ret_code = I40E_ERR_INVALID_HMC_OBJ_COUNT;
  542. hw_dbg(hw, "i40e_delete_hmc_object: returns error %d\n",
  543. ret_code);
  544. goto exit;
  545. }
  546. I40E_FIND_PD_INDEX_LIMIT(info->hmc_info, info->rsrc_type,
  547. info->start_idx, info->count, &pd_idx,
  548. &pd_lmt);
  549. for (j = pd_idx; j < pd_lmt; j++) {
  550. sd_idx = j / I40E_HMC_PD_CNT_IN_SD;
  551. if (I40E_SD_TYPE_PAGED !=
  552. info->hmc_info->sd_table.sd_entry[sd_idx].entry_type)
  553. continue;
  554. rel_pd_idx = j % I40E_HMC_PD_CNT_IN_SD;
  555. pd_table =
  556. &info->hmc_info->sd_table.sd_entry[sd_idx].u.pd_table;
  557. if (pd_table->pd_entry[rel_pd_idx].valid) {
  558. ret_code = i40e_remove_pd_bp(hw, info->hmc_info,
  559. j, true);
  560. if (ret_code)
  561. goto exit;
  562. }
  563. }
  564. /* find sd index and limit */
  565. I40E_FIND_SD_INDEX_LIMIT(info->hmc_info, info->rsrc_type,
  566. info->start_idx, info->count,
  567. &sd_idx, &sd_lmt);
  568. if (sd_idx >= info->hmc_info->sd_table.sd_cnt ||
  569. sd_lmt > info->hmc_info->sd_table.sd_cnt) {
  570. ret_code = I40E_ERR_INVALID_SD_INDEX;
  571. goto exit;
  572. }
  573. for (i = sd_idx; i < sd_lmt; i++) {
  574. if (!info->hmc_info->sd_table.sd_entry[i].valid)
  575. continue;
  576. switch (info->hmc_info->sd_table.sd_entry[i].entry_type) {
  577. case I40E_SD_TYPE_DIRECT:
  578. ret_code = i40e_remove_sd_bp(hw, info->hmc_info, i);
  579. if (ret_code)
  580. goto exit;
  581. break;
  582. case I40E_SD_TYPE_PAGED:
  583. ret_code = i40e_remove_pd_page(hw, info->hmc_info, i);
  584. if (ret_code)
  585. goto exit;
  586. break;
  587. default:
  588. break;
  589. }
  590. }
  591. exit:
  592. return ret_code;
  593. }
  594. /**
  595. * i40e_shutdown_lan_hmc - Remove HMC backing store, free allocated memory
  596. * @hw: pointer to the hw structure
  597. *
  598. * This must be called by drivers as they are shutting down and being
  599. * removed from the OS.
  600. **/
  601. i40e_status i40e_shutdown_lan_hmc(struct i40e_hw *hw)
  602. {
  603. struct i40e_hmc_lan_delete_obj_info info;
  604. i40e_status ret_code;
  605. info.hmc_info = &hw->hmc;
  606. info.rsrc_type = I40E_HMC_LAN_FULL;
  607. info.start_idx = 0;
  608. info.count = 1;
  609. /* delete the object */
  610. ret_code = i40e_delete_lan_hmc_object(hw, &info);
  611. /* free the SD table entry for LAN */
  612. i40e_free_virt_mem(hw, &hw->hmc.sd_table.addr);
  613. hw->hmc.sd_table.sd_cnt = 0;
  614. hw->hmc.sd_table.sd_entry = NULL;
  615. /* free memory used for hmc_obj */
  616. i40e_free_virt_mem(hw, &hw->hmc.hmc_obj_virt_mem);
  617. hw->hmc.hmc_obj = NULL;
  618. return ret_code;
  619. }
  620. #define I40E_HMC_STORE(_struct, _ele) \
  621. offsetof(struct _struct, _ele), \
  622. FIELD_SIZEOF(struct _struct, _ele)
  623. struct i40e_context_ele {
  624. u16 offset;
  625. u16 size_of;
  626. u16 width;
  627. u16 lsb;
  628. };
  629. /* LAN Tx Queue Context */
  630. static struct i40e_context_ele i40e_hmc_txq_ce_info[] = {
  631. /* Field Width LSB */
  632. {I40E_HMC_STORE(i40e_hmc_obj_txq, head), 13, 0 },
  633. {I40E_HMC_STORE(i40e_hmc_obj_txq, new_context), 1, 30 },
  634. {I40E_HMC_STORE(i40e_hmc_obj_txq, base), 57, 32 },
  635. {I40E_HMC_STORE(i40e_hmc_obj_txq, fc_ena), 1, 89 },
  636. {I40E_HMC_STORE(i40e_hmc_obj_txq, timesync_ena), 1, 90 },
  637. {I40E_HMC_STORE(i40e_hmc_obj_txq, fd_ena), 1, 91 },
  638. {I40E_HMC_STORE(i40e_hmc_obj_txq, alt_vlan_ena), 1, 92 },
  639. {I40E_HMC_STORE(i40e_hmc_obj_txq, cpuid), 8, 96 },
  640. /* line 1 */
  641. {I40E_HMC_STORE(i40e_hmc_obj_txq, thead_wb), 13, 0 + 128 },
  642. {I40E_HMC_STORE(i40e_hmc_obj_txq, head_wb_ena), 1, 32 + 128 },
  643. {I40E_HMC_STORE(i40e_hmc_obj_txq, qlen), 13, 33 + 128 },
  644. {I40E_HMC_STORE(i40e_hmc_obj_txq, tphrdesc_ena), 1, 46 + 128 },
  645. {I40E_HMC_STORE(i40e_hmc_obj_txq, tphrpacket_ena), 1, 47 + 128 },
  646. {I40E_HMC_STORE(i40e_hmc_obj_txq, tphwdesc_ena), 1, 48 + 128 },
  647. {I40E_HMC_STORE(i40e_hmc_obj_txq, head_wb_addr), 64, 64 + 128 },
  648. /* line 7 */
  649. {I40E_HMC_STORE(i40e_hmc_obj_txq, crc), 32, 0 + (7 * 128) },
  650. {I40E_HMC_STORE(i40e_hmc_obj_txq, rdylist), 10, 84 + (7 * 128) },
  651. {I40E_HMC_STORE(i40e_hmc_obj_txq, rdylist_act), 1, 94 + (7 * 128) },
  652. { 0 }
  653. };
  654. /* LAN Rx Queue Context */
  655. static struct i40e_context_ele i40e_hmc_rxq_ce_info[] = {
  656. /* Field Width LSB */
  657. { I40E_HMC_STORE(i40e_hmc_obj_rxq, head), 13, 0 },
  658. { I40E_HMC_STORE(i40e_hmc_obj_rxq, cpuid), 8, 13 },
  659. { I40E_HMC_STORE(i40e_hmc_obj_rxq, base), 57, 32 },
  660. { I40E_HMC_STORE(i40e_hmc_obj_rxq, qlen), 13, 89 },
  661. { I40E_HMC_STORE(i40e_hmc_obj_rxq, dbuff), 7, 102 },
  662. { I40E_HMC_STORE(i40e_hmc_obj_rxq, hbuff), 5, 109 },
  663. { I40E_HMC_STORE(i40e_hmc_obj_rxq, dtype), 2, 114 },
  664. { I40E_HMC_STORE(i40e_hmc_obj_rxq, dsize), 1, 116 },
  665. { I40E_HMC_STORE(i40e_hmc_obj_rxq, crcstrip), 1, 117 },
  666. { I40E_HMC_STORE(i40e_hmc_obj_rxq, fc_ena), 1, 118 },
  667. { I40E_HMC_STORE(i40e_hmc_obj_rxq, l2tsel), 1, 119 },
  668. { I40E_HMC_STORE(i40e_hmc_obj_rxq, hsplit_0), 4, 120 },
  669. { I40E_HMC_STORE(i40e_hmc_obj_rxq, hsplit_1), 2, 124 },
  670. { I40E_HMC_STORE(i40e_hmc_obj_rxq, showiv), 1, 127 },
  671. { I40E_HMC_STORE(i40e_hmc_obj_rxq, rxmax), 14, 174 },
  672. { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphrdesc_ena), 1, 193 },
  673. { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphwdesc_ena), 1, 194 },
  674. { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphdata_ena), 1, 195 },
  675. { I40E_HMC_STORE(i40e_hmc_obj_rxq, tphhead_ena), 1, 196 },
  676. { I40E_HMC_STORE(i40e_hmc_obj_rxq, lrxqthresh), 3, 198 },
  677. { 0 }
  678. };
  679. /**
  680. * i40e_clear_hmc_context - zero out the HMC context bits
  681. * @hw: the hardware struct
  682. * @context_bytes: pointer to the context bit array (DMA memory)
  683. * @hmc_type: the type of HMC resource
  684. **/
  685. static i40e_status i40e_clear_hmc_context(struct i40e_hw *hw,
  686. u8 *context_bytes,
  687. enum i40e_hmc_lan_rsrc_type hmc_type)
  688. {
  689. /* clean the bit array */
  690. memset(context_bytes, 0, (u32)hw->hmc.hmc_obj[hmc_type].size);
  691. return 0;
  692. }
  693. /**
  694. * i40e_set_hmc_context - replace HMC context bits
  695. * @context_bytes: pointer to the context bit array
  696. * @ce_info: a description of the struct to be filled
  697. * @dest: the struct to be filled
  698. **/
  699. static i40e_status i40e_set_hmc_context(u8 *context_bytes,
  700. struct i40e_context_ele *ce_info,
  701. u8 *dest)
  702. {
  703. u16 shift_width;
  704. u64 bitfield;
  705. u8 hi_byte;
  706. u8 hi_mask;
  707. u64 t_bits;
  708. u64 mask;
  709. u8 *p;
  710. int f;
  711. for (f = 0; ce_info[f].width != 0; f++) {
  712. /* clear out the field */
  713. bitfield = 0;
  714. /* copy from the next struct field */
  715. p = dest + ce_info[f].offset;
  716. switch (ce_info[f].size_of) {
  717. case 1:
  718. bitfield = *p;
  719. break;
  720. case 2:
  721. bitfield = cpu_to_le16(*(u16 *)p);
  722. break;
  723. case 4:
  724. bitfield = cpu_to_le32(*(u32 *)p);
  725. break;
  726. case 8:
  727. bitfield = cpu_to_le64(*(u64 *)p);
  728. break;
  729. }
  730. /* prepare the bits and mask */
  731. shift_width = ce_info[f].lsb % 8;
  732. mask = ((u64)1 << ce_info[f].width) - 1;
  733. /* save upper bytes for special case */
  734. hi_mask = (u8)((mask >> 56) & 0xff);
  735. hi_byte = (u8)((bitfield >> 56) & 0xff);
  736. /* shift to correct alignment */
  737. mask <<= shift_width;
  738. bitfield <<= shift_width;
  739. /* get the current bits from the target bit string */
  740. p = context_bytes + (ce_info[f].lsb / 8);
  741. memcpy(&t_bits, p, sizeof(u64));
  742. t_bits &= ~mask; /* get the bits not changing */
  743. t_bits |= bitfield; /* add in the new bits */
  744. /* put it all back */
  745. memcpy(p, &t_bits, sizeof(u64));
  746. /* deal with the special case if needed
  747. * example: 62 bit field that starts in bit 5 of first byte
  748. * will overlap 3 bits into byte 9
  749. */
  750. if ((shift_width + ce_info[f].width) > 64) {
  751. u8 byte;
  752. hi_mask >>= (8 - shift_width);
  753. hi_byte >>= (8 - shift_width);
  754. byte = p[8] & ~hi_mask; /* get the bits not changing */
  755. byte |= hi_byte; /* add in the new bits */
  756. p[8] = byte; /* put it back */
  757. }
  758. }
  759. return 0;
  760. }
  761. /**
  762. * i40e_hmc_get_object_va - retrieves an object's virtual address
  763. * @hmc_info: pointer to i40e_hmc_info struct
  764. * @object_base: pointer to u64 to get the va
  765. * @rsrc_type: the hmc resource type
  766. * @obj_idx: hmc object index
  767. *
  768. * This function retrieves the object's virtual address from the object
  769. * base pointer. This function is used for LAN Queue contexts.
  770. **/
  771. static
  772. i40e_status i40e_hmc_get_object_va(struct i40e_hmc_info *hmc_info,
  773. u8 **object_base,
  774. enum i40e_hmc_lan_rsrc_type rsrc_type,
  775. u32 obj_idx)
  776. {
  777. u32 obj_offset_in_sd, obj_offset_in_pd;
  778. i40e_status ret_code = 0;
  779. struct i40e_hmc_sd_entry *sd_entry;
  780. struct i40e_hmc_pd_entry *pd_entry;
  781. u32 pd_idx, pd_lmt, rel_pd_idx;
  782. u64 obj_offset_in_fpm;
  783. u32 sd_idx, sd_lmt;
  784. if (NULL == hmc_info) {
  785. ret_code = I40E_ERR_BAD_PTR;
  786. hw_dbg(hw, "i40e_hmc_get_object_va: bad hmc_info ptr\n");
  787. goto exit;
  788. }
  789. if (NULL == hmc_info->hmc_obj) {
  790. ret_code = I40E_ERR_BAD_PTR;
  791. hw_dbg(hw, "i40e_hmc_get_object_va: bad hmc_info->hmc_obj ptr\n");
  792. goto exit;
  793. }
  794. if (NULL == object_base) {
  795. ret_code = I40E_ERR_BAD_PTR;
  796. hw_dbg(hw, "i40e_hmc_get_object_va: bad object_base ptr\n");
  797. goto exit;
  798. }
  799. if (I40E_HMC_INFO_SIGNATURE != hmc_info->signature) {
  800. ret_code = I40E_ERR_BAD_PTR;
  801. hw_dbg(hw, "i40e_hmc_get_object_va: bad hmc_info->signature\n");
  802. goto exit;
  803. }
  804. if (obj_idx >= hmc_info->hmc_obj[rsrc_type].cnt) {
  805. hw_dbg(hw, "i40e_hmc_get_object_va: returns error %d\n",
  806. ret_code);
  807. ret_code = I40E_ERR_INVALID_HMC_OBJ_INDEX;
  808. goto exit;
  809. }
  810. /* find sd index and limit */
  811. I40E_FIND_SD_INDEX_LIMIT(hmc_info, rsrc_type, obj_idx, 1,
  812. &sd_idx, &sd_lmt);
  813. sd_entry = &hmc_info->sd_table.sd_entry[sd_idx];
  814. obj_offset_in_fpm = hmc_info->hmc_obj[rsrc_type].base +
  815. hmc_info->hmc_obj[rsrc_type].size * obj_idx;
  816. if (I40E_SD_TYPE_PAGED == sd_entry->entry_type) {
  817. I40E_FIND_PD_INDEX_LIMIT(hmc_info, rsrc_type, obj_idx, 1,
  818. &pd_idx, &pd_lmt);
  819. rel_pd_idx = pd_idx % I40E_HMC_PD_CNT_IN_SD;
  820. pd_entry = &sd_entry->u.pd_table.pd_entry[rel_pd_idx];
  821. obj_offset_in_pd = (u32)(obj_offset_in_fpm %
  822. I40E_HMC_PAGED_BP_SIZE);
  823. *object_base = (u8 *)pd_entry->bp.addr.va + obj_offset_in_pd;
  824. } else {
  825. obj_offset_in_sd = (u32)(obj_offset_in_fpm %
  826. I40E_HMC_DIRECT_BP_SIZE);
  827. *object_base = (u8 *)sd_entry->u.bp.addr.va + obj_offset_in_sd;
  828. }
  829. exit:
  830. return ret_code;
  831. }
  832. /**
  833. * i40e_clear_lan_tx_queue_context - clear the HMC context for the queue
  834. * @hw: the hardware struct
  835. * @queue: the queue we care about
  836. **/
  837. i40e_status i40e_clear_lan_tx_queue_context(struct i40e_hw *hw,
  838. u16 queue)
  839. {
  840. i40e_status err;
  841. u8 *context_bytes;
  842. err = i40e_hmc_get_object_va(&hw->hmc, &context_bytes,
  843. I40E_HMC_LAN_TX, queue);
  844. if (err < 0)
  845. return err;
  846. return i40e_clear_hmc_context(hw, context_bytes, I40E_HMC_LAN_TX);
  847. }
  848. /**
  849. * i40e_set_lan_tx_queue_context - set the HMC context for the queue
  850. * @hw: the hardware struct
  851. * @queue: the queue we care about
  852. * @s: the struct to be filled
  853. **/
  854. i40e_status i40e_set_lan_tx_queue_context(struct i40e_hw *hw,
  855. u16 queue,
  856. struct i40e_hmc_obj_txq *s)
  857. {
  858. i40e_status err;
  859. u8 *context_bytes;
  860. err = i40e_hmc_get_object_va(&hw->hmc, &context_bytes,
  861. I40E_HMC_LAN_TX, queue);
  862. if (err < 0)
  863. return err;
  864. return i40e_set_hmc_context(context_bytes,
  865. i40e_hmc_txq_ce_info, (u8 *)s);
  866. }
  867. /**
  868. * i40e_clear_lan_rx_queue_context - clear the HMC context for the queue
  869. * @hw: the hardware struct
  870. * @queue: the queue we care about
  871. **/
  872. i40e_status i40e_clear_lan_rx_queue_context(struct i40e_hw *hw,
  873. u16 queue)
  874. {
  875. i40e_status err;
  876. u8 *context_bytes;
  877. err = i40e_hmc_get_object_va(&hw->hmc, &context_bytes,
  878. I40E_HMC_LAN_RX, queue);
  879. if (err < 0)
  880. return err;
  881. return i40e_clear_hmc_context(hw, context_bytes, I40E_HMC_LAN_RX);
  882. }
  883. /**
  884. * i40e_set_lan_rx_queue_context - set the HMC context for the queue
  885. * @hw: the hardware struct
  886. * @queue: the queue we care about
  887. * @s: the struct to be filled
  888. **/
  889. i40e_status i40e_set_lan_rx_queue_context(struct i40e_hw *hw,
  890. u16 queue,
  891. struct i40e_hmc_obj_rxq *s)
  892. {
  893. i40e_status err;
  894. u8 *context_bytes;
  895. err = i40e_hmc_get_object_va(&hw->hmc, &context_bytes,
  896. I40E_HMC_LAN_RX, queue);
  897. if (err < 0)
  898. return err;
  899. return i40e_set_hmc_context(context_bytes,
  900. i40e_hmc_rxq_ce_info, (u8 *)s);
  901. }