e1000_main.c 143 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009401040114012401340144015401640174018401940204021402240234024402540264027402840294030403140324033403440354036403740384039404040414042404340444045404640474048404940504051405240534054405540564057405840594060406140624063406440654066406740684069407040714072407340744075407640774078407940804081408240834084408540864087408840894090409140924093409440954096409740984099410041014102410341044105410641074108410941104111411241134114411541164117411841194120412141224123412441254126412741284129413041314132413341344135413641374138413941404141414241434144414541464147414841494150415141524153415441554156415741584159416041614162416341644165416641674168416941704171417241734174417541764177417841794180418141824183418441854186418741884189419041914192419341944195419641974198419942004201420242034204420542064207420842094210421142124213421442154216421742184219422042214222422342244225422642274228422942304231423242334234423542364237423842394240424142424243424442454246424742484249425042514252425342544255425642574258425942604261426242634264426542664267426842694270427142724273427442754276427742784279428042814282428342844285428642874288428942904291429242934294429542964297429842994300430143024303430443054306430743084309431043114312431343144315431643174318431943204321432243234324432543264327432843294330433143324333433443354336433743384339434043414342434343444345434643474348434943504351435243534354435543564357435843594360436143624363436443654366436743684369437043714372437343744375437643774378437943804381438243834384438543864387438843894390439143924393439443954396439743984399440044014402440344044405440644074408440944104411441244134414441544164417441844194420442144224423442444254426442744284429443044314432443344344435443644374438443944404441444244434444444544464447444844494450445144524453445444554456445744584459446044614462446344644465446644674468446944704471447244734474447544764477447844794480448144824483448444854486448744884489449044914492449344944495449644974498449945004501450245034504450545064507450845094510451145124513451445154516451745184519452045214522452345244525452645274528452945304531453245334534453545364537453845394540454145424543454445454546454745484549455045514552455345544555455645574558455945604561456245634564456545664567456845694570457145724573457445754576457745784579458045814582458345844585458645874588458945904591459245934594459545964597459845994600460146024603460446054606460746084609461046114612461346144615461646174618461946204621462246234624462546264627462846294630463146324633463446354636463746384639464046414642464346444645464646474648464946504651465246534654465546564657465846594660466146624663466446654666466746684669467046714672467346744675467646774678467946804681468246834684468546864687468846894690469146924693469446954696469746984699470047014702470347044705470647074708470947104711471247134714471547164717471847194720472147224723472447254726472747284729473047314732473347344735473647374738473947404741474247434744474547464747474847494750475147524753475447554756475747584759476047614762476347644765476647674768476947704771477247734774477547764777477847794780478147824783478447854786478747884789479047914792479347944795479647974798479948004801480248034804480548064807480848094810481148124813481448154816481748184819482048214822482348244825482648274828482948304831483248334834483548364837483848394840484148424843484448454846484748484849485048514852485348544855485648574858485948604861486248634864486548664867486848694870487148724873487448754876487748784879488048814882488348844885488648874888488948904891489248934894489548964897489848994900490149024903490449054906490749084909491049114912491349144915491649174918491949204921492249234924492549264927492849294930493149324933493449354936493749384939494049414942494349444945494649474948494949504951495249534954495549564957495849594960496149624963496449654966496749684969497049714972497349744975497649774978497949804981498249834984498549864987498849894990499149924993499449954996499749984999500050015002500350045005500650075008500950105011501250135014501550165017501850195020502150225023502450255026502750285029503050315032503350345035503650375038503950405041504250435044504550465047504850495050505150525053505450555056505750585059506050615062506350645065506650675068506950705071507250735074507550765077507850795080508150825083508450855086508750885089509050915092509350945095509650975098509951005101510251035104510551065107510851095110511151125113511451155116511751185119512051215122512351245125512651275128512951305131513251335134513551365137513851395140514151425143514451455146514751485149515051515152515351545155515651575158515951605161516251635164516551665167516851695170517151725173517451755176517751785179518051815182518351845185518651875188518951905191519251935194519551965197519851995200520152025203520452055206520752085209521052115212521352145215521652175218
  1. /*******************************************************************************
  2. Intel PRO/1000 Linux driver
  3. Copyright(c) 1999 - 2006 Intel Corporation.
  4. This program is free software; you can redistribute it and/or modify it
  5. under the terms and conditions of the GNU General Public License,
  6. version 2, as published by the Free Software Foundation.
  7. This program is distributed in the hope it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc.,
  13. 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  14. The full GNU General Public License is included in this distribution in
  15. the file called "COPYING".
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20. *******************************************************************************/
  21. #include "e1000.h"
  22. #include <net/ip6_checksum.h>
  23. #include <linux/io.h>
  24. #include <linux/prefetch.h>
  25. #include <linux/bitops.h>
  26. #include <linux/if_vlan.h>
  27. char e1000_driver_name[] = "e1000";
  28. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  29. #define DRV_VERSION "7.3.21-k8-NAPI"
  30. const char e1000_driver_version[] = DRV_VERSION;
  31. static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
  32. /* e1000_pci_tbl - PCI Device ID Table
  33. *
  34. * Last entry must be all 0s
  35. *
  36. * Macro expands to...
  37. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  38. */
  39. static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
  40. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  41. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  42. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  43. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  44. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  45. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  46. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  47. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  48. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  49. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  50. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  51. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  52. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  53. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  54. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  55. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  56. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  57. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  58. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  59. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  60. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  61. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  62. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  63. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  64. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  65. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  66. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  67. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  68. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  69. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  70. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  71. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  72. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  73. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  74. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  75. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  76. INTEL_E1000_ETHERNET_DEVICE(0x2E6E),
  77. /* required last entry */
  78. {0,}
  79. };
  80. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  81. int e1000_up(struct e1000_adapter *adapter);
  82. void e1000_down(struct e1000_adapter *adapter);
  83. void e1000_reinit_locked(struct e1000_adapter *adapter);
  84. void e1000_reset(struct e1000_adapter *adapter);
  85. int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
  86. int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
  87. void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
  88. void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
  89. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  90. struct e1000_tx_ring *txdr);
  91. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  92. struct e1000_rx_ring *rxdr);
  93. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  94. struct e1000_tx_ring *tx_ring);
  95. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  96. struct e1000_rx_ring *rx_ring);
  97. void e1000_update_stats(struct e1000_adapter *adapter);
  98. static int e1000_init_module(void);
  99. static void e1000_exit_module(void);
  100. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  101. static void e1000_remove(struct pci_dev *pdev);
  102. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  103. static int e1000_sw_init(struct e1000_adapter *adapter);
  104. static int e1000_open(struct net_device *netdev);
  105. static int e1000_close(struct net_device *netdev);
  106. static void e1000_configure_tx(struct e1000_adapter *adapter);
  107. static void e1000_configure_rx(struct e1000_adapter *adapter);
  108. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  109. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  110. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  111. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  112. struct e1000_tx_ring *tx_ring);
  113. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  114. struct e1000_rx_ring *rx_ring);
  115. static void e1000_set_rx_mode(struct net_device *netdev);
  116. static void e1000_update_phy_info_task(struct work_struct *work);
  117. static void e1000_watchdog(struct work_struct *work);
  118. static void e1000_82547_tx_fifo_stall_task(struct work_struct *work);
  119. static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
  120. struct net_device *netdev);
  121. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  122. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  123. static int e1000_set_mac(struct net_device *netdev, void *p);
  124. static irqreturn_t e1000_intr(int irq, void *data);
  125. static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
  126. struct e1000_tx_ring *tx_ring);
  127. static int e1000_clean(struct napi_struct *napi, int budget);
  128. static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
  129. struct e1000_rx_ring *rx_ring,
  130. int *work_done, int work_to_do);
  131. static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
  132. struct e1000_rx_ring *rx_ring,
  133. int *work_done, int work_to_do);
  134. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  135. struct e1000_rx_ring *rx_ring,
  136. int cleaned_count);
  137. static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
  138. struct e1000_rx_ring *rx_ring,
  139. int cleaned_count);
  140. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  141. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  142. int cmd);
  143. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  144. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  145. static void e1000_tx_timeout(struct net_device *dev);
  146. static void e1000_reset_task(struct work_struct *work);
  147. static void e1000_smartspeed(struct e1000_adapter *adapter);
  148. static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  149. struct sk_buff *skb);
  150. static bool e1000_vlan_used(struct e1000_adapter *adapter);
  151. static void e1000_vlan_mode(struct net_device *netdev,
  152. netdev_features_t features);
  153. static void e1000_vlan_filter_on_off(struct e1000_adapter *adapter,
  154. bool filter_on);
  155. static int e1000_vlan_rx_add_vid(struct net_device *netdev,
  156. __be16 proto, u16 vid);
  157. static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
  158. __be16 proto, u16 vid);
  159. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  160. #ifdef CONFIG_PM
  161. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  162. static int e1000_resume(struct pci_dev *pdev);
  163. #endif
  164. static void e1000_shutdown(struct pci_dev *pdev);
  165. #ifdef CONFIG_NET_POLL_CONTROLLER
  166. /* for netdump / net console */
  167. static void e1000_netpoll (struct net_device *netdev);
  168. #endif
  169. #define COPYBREAK_DEFAULT 256
  170. static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
  171. module_param(copybreak, uint, 0644);
  172. MODULE_PARM_DESC(copybreak,
  173. "Maximum size of packet that is copied to a new buffer on receive");
  174. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
  175. pci_channel_state_t state);
  176. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
  177. static void e1000_io_resume(struct pci_dev *pdev);
  178. static const struct pci_error_handlers e1000_err_handler = {
  179. .error_detected = e1000_io_error_detected,
  180. .slot_reset = e1000_io_slot_reset,
  181. .resume = e1000_io_resume,
  182. };
  183. static struct pci_driver e1000_driver = {
  184. .name = e1000_driver_name,
  185. .id_table = e1000_pci_tbl,
  186. .probe = e1000_probe,
  187. .remove = e1000_remove,
  188. #ifdef CONFIG_PM
  189. /* Power Management Hooks */
  190. .suspend = e1000_suspend,
  191. .resume = e1000_resume,
  192. #endif
  193. .shutdown = e1000_shutdown,
  194. .err_handler = &e1000_err_handler
  195. };
  196. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  197. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  198. MODULE_LICENSE("GPL");
  199. MODULE_VERSION(DRV_VERSION);
  200. #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
  201. static int debug = -1;
  202. module_param(debug, int, 0);
  203. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  204. /**
  205. * e1000_get_hw_dev - return device
  206. * used by hardware layer to print debugging information
  207. *
  208. **/
  209. struct net_device *e1000_get_hw_dev(struct e1000_hw *hw)
  210. {
  211. struct e1000_adapter *adapter = hw->back;
  212. return adapter->netdev;
  213. }
  214. /**
  215. * e1000_init_module - Driver Registration Routine
  216. *
  217. * e1000_init_module is the first routine called when the driver is
  218. * loaded. All it does is register with the PCI subsystem.
  219. **/
  220. static int __init e1000_init_module(void)
  221. {
  222. int ret;
  223. pr_info("%s - version %s\n", e1000_driver_string, e1000_driver_version);
  224. pr_info("%s\n", e1000_copyright);
  225. ret = pci_register_driver(&e1000_driver);
  226. if (copybreak != COPYBREAK_DEFAULT) {
  227. if (copybreak == 0)
  228. pr_info("copybreak disabled\n");
  229. else
  230. pr_info("copybreak enabled for "
  231. "packets <= %u bytes\n", copybreak);
  232. }
  233. return ret;
  234. }
  235. module_init(e1000_init_module);
  236. /**
  237. * e1000_exit_module - Driver Exit Cleanup Routine
  238. *
  239. * e1000_exit_module is called just before the driver is removed
  240. * from memory.
  241. **/
  242. static void __exit e1000_exit_module(void)
  243. {
  244. pci_unregister_driver(&e1000_driver);
  245. }
  246. module_exit(e1000_exit_module);
  247. static int e1000_request_irq(struct e1000_adapter *adapter)
  248. {
  249. struct net_device *netdev = adapter->netdev;
  250. irq_handler_t handler = e1000_intr;
  251. int irq_flags = IRQF_SHARED;
  252. int err;
  253. err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
  254. netdev);
  255. if (err) {
  256. e_err(probe, "Unable to allocate interrupt Error: %d\n", err);
  257. }
  258. return err;
  259. }
  260. static void e1000_free_irq(struct e1000_adapter *adapter)
  261. {
  262. struct net_device *netdev = adapter->netdev;
  263. free_irq(adapter->pdev->irq, netdev);
  264. }
  265. /**
  266. * e1000_irq_disable - Mask off interrupt generation on the NIC
  267. * @adapter: board private structure
  268. **/
  269. static void e1000_irq_disable(struct e1000_adapter *adapter)
  270. {
  271. struct e1000_hw *hw = &adapter->hw;
  272. ew32(IMC, ~0);
  273. E1000_WRITE_FLUSH();
  274. synchronize_irq(adapter->pdev->irq);
  275. }
  276. /**
  277. * e1000_irq_enable - Enable default interrupt generation settings
  278. * @adapter: board private structure
  279. **/
  280. static void e1000_irq_enable(struct e1000_adapter *adapter)
  281. {
  282. struct e1000_hw *hw = &adapter->hw;
  283. ew32(IMS, IMS_ENABLE_MASK);
  284. E1000_WRITE_FLUSH();
  285. }
  286. static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
  287. {
  288. struct e1000_hw *hw = &adapter->hw;
  289. struct net_device *netdev = adapter->netdev;
  290. u16 vid = hw->mng_cookie.vlan_id;
  291. u16 old_vid = adapter->mng_vlan_id;
  292. if (!e1000_vlan_used(adapter))
  293. return;
  294. if (!test_bit(vid, adapter->active_vlans)) {
  295. if (hw->mng_cookie.status &
  296. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  297. e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
  298. adapter->mng_vlan_id = vid;
  299. } else {
  300. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  301. }
  302. if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
  303. (vid != old_vid) &&
  304. !test_bit(old_vid, adapter->active_vlans))
  305. e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
  306. old_vid);
  307. } else {
  308. adapter->mng_vlan_id = vid;
  309. }
  310. }
  311. static void e1000_init_manageability(struct e1000_adapter *adapter)
  312. {
  313. struct e1000_hw *hw = &adapter->hw;
  314. if (adapter->en_mng_pt) {
  315. u32 manc = er32(MANC);
  316. /* disable hardware interception of ARP */
  317. manc &= ~(E1000_MANC_ARP_EN);
  318. ew32(MANC, manc);
  319. }
  320. }
  321. static void e1000_release_manageability(struct e1000_adapter *adapter)
  322. {
  323. struct e1000_hw *hw = &adapter->hw;
  324. if (adapter->en_mng_pt) {
  325. u32 manc = er32(MANC);
  326. /* re-enable hardware interception of ARP */
  327. manc |= E1000_MANC_ARP_EN;
  328. ew32(MANC, manc);
  329. }
  330. }
  331. /**
  332. * e1000_configure - configure the hardware for RX and TX
  333. * @adapter = private board structure
  334. **/
  335. static void e1000_configure(struct e1000_adapter *adapter)
  336. {
  337. struct net_device *netdev = adapter->netdev;
  338. int i;
  339. e1000_set_rx_mode(netdev);
  340. e1000_restore_vlan(adapter);
  341. e1000_init_manageability(adapter);
  342. e1000_configure_tx(adapter);
  343. e1000_setup_rctl(adapter);
  344. e1000_configure_rx(adapter);
  345. /* call E1000_DESC_UNUSED which always leaves
  346. * at least 1 descriptor unused to make sure
  347. * next_to_use != next_to_clean
  348. */
  349. for (i = 0; i < adapter->num_rx_queues; i++) {
  350. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  351. adapter->alloc_rx_buf(adapter, ring,
  352. E1000_DESC_UNUSED(ring));
  353. }
  354. }
  355. int e1000_up(struct e1000_adapter *adapter)
  356. {
  357. struct e1000_hw *hw = &adapter->hw;
  358. /* hardware has been reset, we need to reload some things */
  359. e1000_configure(adapter);
  360. clear_bit(__E1000_DOWN, &adapter->flags);
  361. napi_enable(&adapter->napi);
  362. e1000_irq_enable(adapter);
  363. netif_wake_queue(adapter->netdev);
  364. /* fire a link change interrupt to start the watchdog */
  365. ew32(ICS, E1000_ICS_LSC);
  366. return 0;
  367. }
  368. /**
  369. * e1000_power_up_phy - restore link in case the phy was powered down
  370. * @adapter: address of board private structure
  371. *
  372. * The phy may be powered down to save power and turn off link when the
  373. * driver is unloaded and wake on lan is not enabled (among others)
  374. * *** this routine MUST be followed by a call to e1000_reset ***
  375. **/
  376. void e1000_power_up_phy(struct e1000_adapter *adapter)
  377. {
  378. struct e1000_hw *hw = &adapter->hw;
  379. u16 mii_reg = 0;
  380. /* Just clear the power down bit to wake the phy back up */
  381. if (hw->media_type == e1000_media_type_copper) {
  382. /* according to the manual, the phy will retain its
  383. * settings across a power-down/up cycle
  384. */
  385. e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
  386. mii_reg &= ~MII_CR_POWER_DOWN;
  387. e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
  388. }
  389. }
  390. static void e1000_power_down_phy(struct e1000_adapter *adapter)
  391. {
  392. struct e1000_hw *hw = &adapter->hw;
  393. /* Power down the PHY so no link is implied when interface is down *
  394. * The PHY cannot be powered down if any of the following is true *
  395. * (a) WoL is enabled
  396. * (b) AMT is active
  397. * (c) SoL/IDER session is active
  398. */
  399. if (!adapter->wol && hw->mac_type >= e1000_82540 &&
  400. hw->media_type == e1000_media_type_copper) {
  401. u16 mii_reg = 0;
  402. switch (hw->mac_type) {
  403. case e1000_82540:
  404. case e1000_82545:
  405. case e1000_82545_rev_3:
  406. case e1000_82546:
  407. case e1000_ce4100:
  408. case e1000_82546_rev_3:
  409. case e1000_82541:
  410. case e1000_82541_rev_2:
  411. case e1000_82547:
  412. case e1000_82547_rev_2:
  413. if (er32(MANC) & E1000_MANC_SMBUS_EN)
  414. goto out;
  415. break;
  416. default:
  417. goto out;
  418. }
  419. e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
  420. mii_reg |= MII_CR_POWER_DOWN;
  421. e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
  422. msleep(1);
  423. }
  424. out:
  425. return;
  426. }
  427. static void e1000_down_and_stop(struct e1000_adapter *adapter)
  428. {
  429. set_bit(__E1000_DOWN, &adapter->flags);
  430. /* Only kill reset task if adapter is not resetting */
  431. if (!test_bit(__E1000_RESETTING, &adapter->flags))
  432. cancel_work_sync(&adapter->reset_task);
  433. cancel_delayed_work_sync(&adapter->watchdog_task);
  434. cancel_delayed_work_sync(&adapter->phy_info_task);
  435. cancel_delayed_work_sync(&adapter->fifo_stall_task);
  436. }
  437. void e1000_down(struct e1000_adapter *adapter)
  438. {
  439. struct e1000_hw *hw = &adapter->hw;
  440. struct net_device *netdev = adapter->netdev;
  441. u32 rctl, tctl;
  442. /* disable receives in the hardware */
  443. rctl = er32(RCTL);
  444. ew32(RCTL, rctl & ~E1000_RCTL_EN);
  445. /* flush and sleep below */
  446. netif_tx_disable(netdev);
  447. /* disable transmits in the hardware */
  448. tctl = er32(TCTL);
  449. tctl &= ~E1000_TCTL_EN;
  450. ew32(TCTL, tctl);
  451. /* flush both disables and wait for them to finish */
  452. E1000_WRITE_FLUSH();
  453. msleep(10);
  454. napi_disable(&adapter->napi);
  455. e1000_irq_disable(adapter);
  456. /* Setting DOWN must be after irq_disable to prevent
  457. * a screaming interrupt. Setting DOWN also prevents
  458. * tasks from rescheduling.
  459. */
  460. e1000_down_and_stop(adapter);
  461. adapter->link_speed = 0;
  462. adapter->link_duplex = 0;
  463. netif_carrier_off(netdev);
  464. e1000_reset(adapter);
  465. e1000_clean_all_tx_rings(adapter);
  466. e1000_clean_all_rx_rings(adapter);
  467. }
  468. static void e1000_reinit_safe(struct e1000_adapter *adapter)
  469. {
  470. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  471. msleep(1);
  472. mutex_lock(&adapter->mutex);
  473. e1000_down(adapter);
  474. e1000_up(adapter);
  475. mutex_unlock(&adapter->mutex);
  476. clear_bit(__E1000_RESETTING, &adapter->flags);
  477. }
  478. void e1000_reinit_locked(struct e1000_adapter *adapter)
  479. {
  480. /* if rtnl_lock is not held the call path is bogus */
  481. ASSERT_RTNL();
  482. WARN_ON(in_interrupt());
  483. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  484. msleep(1);
  485. e1000_down(adapter);
  486. e1000_up(adapter);
  487. clear_bit(__E1000_RESETTING, &adapter->flags);
  488. }
  489. void e1000_reset(struct e1000_adapter *adapter)
  490. {
  491. struct e1000_hw *hw = &adapter->hw;
  492. u32 pba = 0, tx_space, min_tx_space, min_rx_space;
  493. bool legacy_pba_adjust = false;
  494. u16 hwm;
  495. /* Repartition Pba for greater than 9k mtu
  496. * To take effect CTRL.RST is required.
  497. */
  498. switch (hw->mac_type) {
  499. case e1000_82542_rev2_0:
  500. case e1000_82542_rev2_1:
  501. case e1000_82543:
  502. case e1000_82544:
  503. case e1000_82540:
  504. case e1000_82541:
  505. case e1000_82541_rev_2:
  506. legacy_pba_adjust = true;
  507. pba = E1000_PBA_48K;
  508. break;
  509. case e1000_82545:
  510. case e1000_82545_rev_3:
  511. case e1000_82546:
  512. case e1000_ce4100:
  513. case e1000_82546_rev_3:
  514. pba = E1000_PBA_48K;
  515. break;
  516. case e1000_82547:
  517. case e1000_82547_rev_2:
  518. legacy_pba_adjust = true;
  519. pba = E1000_PBA_30K;
  520. break;
  521. case e1000_undefined:
  522. case e1000_num_macs:
  523. break;
  524. }
  525. if (legacy_pba_adjust) {
  526. if (hw->max_frame_size > E1000_RXBUFFER_8192)
  527. pba -= 8; /* allocate more FIFO for Tx */
  528. if (hw->mac_type == e1000_82547) {
  529. adapter->tx_fifo_head = 0;
  530. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  531. adapter->tx_fifo_size =
  532. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  533. atomic_set(&adapter->tx_fifo_stall, 0);
  534. }
  535. } else if (hw->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
  536. /* adjust PBA for jumbo frames */
  537. ew32(PBA, pba);
  538. /* To maintain wire speed transmits, the Tx FIFO should be
  539. * large enough to accommodate two full transmit packets,
  540. * rounded up to the next 1KB and expressed in KB. Likewise,
  541. * the Rx FIFO should be large enough to accommodate at least
  542. * one full receive packet and is similarly rounded up and
  543. * expressed in KB.
  544. */
  545. pba = er32(PBA);
  546. /* upper 16 bits has Tx packet buffer allocation size in KB */
  547. tx_space = pba >> 16;
  548. /* lower 16 bits has Rx packet buffer allocation size in KB */
  549. pba &= 0xffff;
  550. /* the Tx fifo also stores 16 bytes of information about the Tx
  551. * but don't include ethernet FCS because hardware appends it
  552. */
  553. min_tx_space = (hw->max_frame_size +
  554. sizeof(struct e1000_tx_desc) -
  555. ETH_FCS_LEN) * 2;
  556. min_tx_space = ALIGN(min_tx_space, 1024);
  557. min_tx_space >>= 10;
  558. /* software strips receive CRC, so leave room for it */
  559. min_rx_space = hw->max_frame_size;
  560. min_rx_space = ALIGN(min_rx_space, 1024);
  561. min_rx_space >>= 10;
  562. /* If current Tx allocation is less than the min Tx FIFO size,
  563. * and the min Tx FIFO size is less than the current Rx FIFO
  564. * allocation, take space away from current Rx allocation
  565. */
  566. if (tx_space < min_tx_space &&
  567. ((min_tx_space - tx_space) < pba)) {
  568. pba = pba - (min_tx_space - tx_space);
  569. /* PCI/PCIx hardware has PBA alignment constraints */
  570. switch (hw->mac_type) {
  571. case e1000_82545 ... e1000_82546_rev_3:
  572. pba &= ~(E1000_PBA_8K - 1);
  573. break;
  574. default:
  575. break;
  576. }
  577. /* if short on Rx space, Rx wins and must trump Tx
  578. * adjustment or use Early Receive if available
  579. */
  580. if (pba < min_rx_space)
  581. pba = min_rx_space;
  582. }
  583. }
  584. ew32(PBA, pba);
  585. /* flow control settings:
  586. * The high water mark must be low enough to fit one full frame
  587. * (or the size used for early receive) above it in the Rx FIFO.
  588. * Set it to the lower of:
  589. * - 90% of the Rx FIFO size, and
  590. * - the full Rx FIFO size minus the early receive size (for parts
  591. * with ERT support assuming ERT set to E1000_ERT_2048), or
  592. * - the full Rx FIFO size minus one full frame
  593. */
  594. hwm = min(((pba << 10) * 9 / 10),
  595. ((pba << 10) - hw->max_frame_size));
  596. hw->fc_high_water = hwm & 0xFFF8; /* 8-byte granularity */
  597. hw->fc_low_water = hw->fc_high_water - 8;
  598. hw->fc_pause_time = E1000_FC_PAUSE_TIME;
  599. hw->fc_send_xon = 1;
  600. hw->fc = hw->original_fc;
  601. /* Allow time for pending master requests to run */
  602. e1000_reset_hw(hw);
  603. if (hw->mac_type >= e1000_82544)
  604. ew32(WUC, 0);
  605. if (e1000_init_hw(hw))
  606. e_dev_err("Hardware Error\n");
  607. e1000_update_mng_vlan(adapter);
  608. /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
  609. if (hw->mac_type >= e1000_82544 &&
  610. hw->autoneg == 1 &&
  611. hw->autoneg_advertised == ADVERTISE_1000_FULL) {
  612. u32 ctrl = er32(CTRL);
  613. /* clear phy power management bit if we are in gig only mode,
  614. * which if enabled will attempt negotiation to 100Mb, which
  615. * can cause a loss of link at power off or driver unload
  616. */
  617. ctrl &= ~E1000_CTRL_SWDPIN3;
  618. ew32(CTRL, ctrl);
  619. }
  620. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  621. ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
  622. e1000_reset_adaptive(hw);
  623. e1000_phy_get_info(hw, &adapter->phy_info);
  624. e1000_release_manageability(adapter);
  625. }
  626. /* Dump the eeprom for users having checksum issues */
  627. static void e1000_dump_eeprom(struct e1000_adapter *adapter)
  628. {
  629. struct net_device *netdev = adapter->netdev;
  630. struct ethtool_eeprom eeprom;
  631. const struct ethtool_ops *ops = netdev->ethtool_ops;
  632. u8 *data;
  633. int i;
  634. u16 csum_old, csum_new = 0;
  635. eeprom.len = ops->get_eeprom_len(netdev);
  636. eeprom.offset = 0;
  637. data = kmalloc(eeprom.len, GFP_KERNEL);
  638. if (!data)
  639. return;
  640. ops->get_eeprom(netdev, &eeprom, data);
  641. csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
  642. (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
  643. for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
  644. csum_new += data[i] + (data[i + 1] << 8);
  645. csum_new = EEPROM_SUM - csum_new;
  646. pr_err("/*********************/\n");
  647. pr_err("Current EEPROM Checksum : 0x%04x\n", csum_old);
  648. pr_err("Calculated : 0x%04x\n", csum_new);
  649. pr_err("Offset Values\n");
  650. pr_err("======== ======\n");
  651. print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
  652. pr_err("Include this output when contacting your support provider.\n");
  653. pr_err("This is not a software error! Something bad happened to\n");
  654. pr_err("your hardware or EEPROM image. Ignoring this problem could\n");
  655. pr_err("result in further problems, possibly loss of data,\n");
  656. pr_err("corruption or system hangs!\n");
  657. pr_err("The MAC Address will be reset to 00:00:00:00:00:00,\n");
  658. pr_err("which is invalid and requires you to set the proper MAC\n");
  659. pr_err("address manually before continuing to enable this network\n");
  660. pr_err("device. Please inspect the EEPROM dump and report the\n");
  661. pr_err("issue to your hardware vendor or Intel Customer Support.\n");
  662. pr_err("/*********************/\n");
  663. kfree(data);
  664. }
  665. /**
  666. * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
  667. * @pdev: PCI device information struct
  668. *
  669. * Return true if an adapter needs ioport resources
  670. **/
  671. static int e1000_is_need_ioport(struct pci_dev *pdev)
  672. {
  673. switch (pdev->device) {
  674. case E1000_DEV_ID_82540EM:
  675. case E1000_DEV_ID_82540EM_LOM:
  676. case E1000_DEV_ID_82540EP:
  677. case E1000_DEV_ID_82540EP_LOM:
  678. case E1000_DEV_ID_82540EP_LP:
  679. case E1000_DEV_ID_82541EI:
  680. case E1000_DEV_ID_82541EI_MOBILE:
  681. case E1000_DEV_ID_82541ER:
  682. case E1000_DEV_ID_82541ER_LOM:
  683. case E1000_DEV_ID_82541GI:
  684. case E1000_DEV_ID_82541GI_LF:
  685. case E1000_DEV_ID_82541GI_MOBILE:
  686. case E1000_DEV_ID_82544EI_COPPER:
  687. case E1000_DEV_ID_82544EI_FIBER:
  688. case E1000_DEV_ID_82544GC_COPPER:
  689. case E1000_DEV_ID_82544GC_LOM:
  690. case E1000_DEV_ID_82545EM_COPPER:
  691. case E1000_DEV_ID_82545EM_FIBER:
  692. case E1000_DEV_ID_82546EB_COPPER:
  693. case E1000_DEV_ID_82546EB_FIBER:
  694. case E1000_DEV_ID_82546EB_QUAD_COPPER:
  695. return true;
  696. default:
  697. return false;
  698. }
  699. }
  700. static netdev_features_t e1000_fix_features(struct net_device *netdev,
  701. netdev_features_t features)
  702. {
  703. /* Since there is no support for separate Rx/Tx vlan accel
  704. * enable/disable make sure Tx flag is always in same state as Rx.
  705. */
  706. if (features & NETIF_F_HW_VLAN_CTAG_RX)
  707. features |= NETIF_F_HW_VLAN_CTAG_TX;
  708. else
  709. features &= ~NETIF_F_HW_VLAN_CTAG_TX;
  710. return features;
  711. }
  712. static int e1000_set_features(struct net_device *netdev,
  713. netdev_features_t features)
  714. {
  715. struct e1000_adapter *adapter = netdev_priv(netdev);
  716. netdev_features_t changed = features ^ netdev->features;
  717. if (changed & NETIF_F_HW_VLAN_CTAG_RX)
  718. e1000_vlan_mode(netdev, features);
  719. if (!(changed & (NETIF_F_RXCSUM | NETIF_F_RXALL)))
  720. return 0;
  721. netdev->features = features;
  722. adapter->rx_csum = !!(features & NETIF_F_RXCSUM);
  723. if (netif_running(netdev))
  724. e1000_reinit_locked(adapter);
  725. else
  726. e1000_reset(adapter);
  727. return 0;
  728. }
  729. static const struct net_device_ops e1000_netdev_ops = {
  730. .ndo_open = e1000_open,
  731. .ndo_stop = e1000_close,
  732. .ndo_start_xmit = e1000_xmit_frame,
  733. .ndo_get_stats = e1000_get_stats,
  734. .ndo_set_rx_mode = e1000_set_rx_mode,
  735. .ndo_set_mac_address = e1000_set_mac,
  736. .ndo_tx_timeout = e1000_tx_timeout,
  737. .ndo_change_mtu = e1000_change_mtu,
  738. .ndo_do_ioctl = e1000_ioctl,
  739. .ndo_validate_addr = eth_validate_addr,
  740. .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
  741. .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
  742. #ifdef CONFIG_NET_POLL_CONTROLLER
  743. .ndo_poll_controller = e1000_netpoll,
  744. #endif
  745. .ndo_fix_features = e1000_fix_features,
  746. .ndo_set_features = e1000_set_features,
  747. };
  748. /**
  749. * e1000_init_hw_struct - initialize members of hw struct
  750. * @adapter: board private struct
  751. * @hw: structure used by e1000_hw.c
  752. *
  753. * Factors out initialization of the e1000_hw struct to its own function
  754. * that can be called very early at init (just after struct allocation).
  755. * Fields are initialized based on PCI device information and
  756. * OS network device settings (MTU size).
  757. * Returns negative error codes if MAC type setup fails.
  758. */
  759. static int e1000_init_hw_struct(struct e1000_adapter *adapter,
  760. struct e1000_hw *hw)
  761. {
  762. struct pci_dev *pdev = adapter->pdev;
  763. /* PCI config space info */
  764. hw->vendor_id = pdev->vendor;
  765. hw->device_id = pdev->device;
  766. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  767. hw->subsystem_id = pdev->subsystem_device;
  768. hw->revision_id = pdev->revision;
  769. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  770. hw->max_frame_size = adapter->netdev->mtu +
  771. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  772. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  773. /* identify the MAC */
  774. if (e1000_set_mac_type(hw)) {
  775. e_err(probe, "Unknown MAC Type\n");
  776. return -EIO;
  777. }
  778. switch (hw->mac_type) {
  779. default:
  780. break;
  781. case e1000_82541:
  782. case e1000_82547:
  783. case e1000_82541_rev_2:
  784. case e1000_82547_rev_2:
  785. hw->phy_init_script = 1;
  786. break;
  787. }
  788. e1000_set_media_type(hw);
  789. e1000_get_bus_info(hw);
  790. hw->wait_autoneg_complete = false;
  791. hw->tbi_compatibility_en = true;
  792. hw->adaptive_ifs = true;
  793. /* Copper options */
  794. if (hw->media_type == e1000_media_type_copper) {
  795. hw->mdix = AUTO_ALL_MODES;
  796. hw->disable_polarity_correction = false;
  797. hw->master_slave = E1000_MASTER_SLAVE;
  798. }
  799. return 0;
  800. }
  801. /**
  802. * e1000_probe - Device Initialization Routine
  803. * @pdev: PCI device information struct
  804. * @ent: entry in e1000_pci_tbl
  805. *
  806. * Returns 0 on success, negative on failure
  807. *
  808. * e1000_probe initializes an adapter identified by a pci_dev structure.
  809. * The OS initialization, configuring of the adapter private structure,
  810. * and a hardware reset occur.
  811. **/
  812. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  813. {
  814. struct net_device *netdev;
  815. struct e1000_adapter *adapter;
  816. struct e1000_hw *hw;
  817. static int cards_found = 0;
  818. static int global_quad_port_a = 0; /* global ksp3 port a indication */
  819. int i, err, pci_using_dac;
  820. u16 eeprom_data = 0;
  821. u16 tmp = 0;
  822. u16 eeprom_apme_mask = E1000_EEPROM_APME;
  823. int bars, need_ioport;
  824. /* do not allocate ioport bars when not needed */
  825. need_ioport = e1000_is_need_ioport(pdev);
  826. if (need_ioport) {
  827. bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
  828. err = pci_enable_device(pdev);
  829. } else {
  830. bars = pci_select_bars(pdev, IORESOURCE_MEM);
  831. err = pci_enable_device_mem(pdev);
  832. }
  833. if (err)
  834. return err;
  835. err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
  836. if (err)
  837. goto err_pci_reg;
  838. pci_set_master(pdev);
  839. err = pci_save_state(pdev);
  840. if (err)
  841. goto err_alloc_etherdev;
  842. err = -ENOMEM;
  843. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  844. if (!netdev)
  845. goto err_alloc_etherdev;
  846. SET_NETDEV_DEV(netdev, &pdev->dev);
  847. pci_set_drvdata(pdev, netdev);
  848. adapter = netdev_priv(netdev);
  849. adapter->netdev = netdev;
  850. adapter->pdev = pdev;
  851. adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
  852. adapter->bars = bars;
  853. adapter->need_ioport = need_ioport;
  854. hw = &adapter->hw;
  855. hw->back = adapter;
  856. err = -EIO;
  857. hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
  858. if (!hw->hw_addr)
  859. goto err_ioremap;
  860. if (adapter->need_ioport) {
  861. for (i = BAR_1; i <= BAR_5; i++) {
  862. if (pci_resource_len(pdev, i) == 0)
  863. continue;
  864. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  865. hw->io_base = pci_resource_start(pdev, i);
  866. break;
  867. }
  868. }
  869. }
  870. /* make ready for any if (hw->...) below */
  871. err = e1000_init_hw_struct(adapter, hw);
  872. if (err)
  873. goto err_sw_init;
  874. /* there is a workaround being applied below that limits
  875. * 64-bit DMA addresses to 64-bit hardware. There are some
  876. * 32-bit adapters that Tx hang when given 64-bit DMA addresses
  877. */
  878. pci_using_dac = 0;
  879. if ((hw->bus_type == e1000_bus_type_pcix) &&
  880. !dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
  881. /* according to DMA-API-HOWTO, coherent calls will always
  882. * succeed if the set call did
  883. */
  884. dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
  885. pci_using_dac = 1;
  886. } else {
  887. err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
  888. if (err) {
  889. pr_err("No usable DMA config, aborting\n");
  890. goto err_dma;
  891. }
  892. dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
  893. }
  894. netdev->netdev_ops = &e1000_netdev_ops;
  895. e1000_set_ethtool_ops(netdev);
  896. netdev->watchdog_timeo = 5 * HZ;
  897. netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
  898. strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
  899. adapter->bd_number = cards_found;
  900. /* setup the private structure */
  901. err = e1000_sw_init(adapter);
  902. if (err)
  903. goto err_sw_init;
  904. err = -EIO;
  905. if (hw->mac_type == e1000_ce4100) {
  906. hw->ce4100_gbe_mdio_base_virt =
  907. ioremap(pci_resource_start(pdev, BAR_1),
  908. pci_resource_len(pdev, BAR_1));
  909. if (!hw->ce4100_gbe_mdio_base_virt)
  910. goto err_mdio_ioremap;
  911. }
  912. if (hw->mac_type >= e1000_82543) {
  913. netdev->hw_features = NETIF_F_SG |
  914. NETIF_F_HW_CSUM |
  915. NETIF_F_HW_VLAN_CTAG_RX;
  916. netdev->features = NETIF_F_HW_VLAN_CTAG_TX |
  917. NETIF_F_HW_VLAN_CTAG_FILTER;
  918. }
  919. if ((hw->mac_type >= e1000_82544) &&
  920. (hw->mac_type != e1000_82547))
  921. netdev->hw_features |= NETIF_F_TSO;
  922. netdev->priv_flags |= IFF_SUPP_NOFCS;
  923. netdev->features |= netdev->hw_features;
  924. netdev->hw_features |= (NETIF_F_RXCSUM |
  925. NETIF_F_RXALL |
  926. NETIF_F_RXFCS);
  927. if (pci_using_dac) {
  928. netdev->features |= NETIF_F_HIGHDMA;
  929. netdev->vlan_features |= NETIF_F_HIGHDMA;
  930. }
  931. netdev->vlan_features |= (NETIF_F_TSO |
  932. NETIF_F_HW_CSUM |
  933. NETIF_F_SG);
  934. netdev->priv_flags |= IFF_UNICAST_FLT;
  935. adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
  936. /* initialize eeprom parameters */
  937. if (e1000_init_eeprom_params(hw)) {
  938. e_err(probe, "EEPROM initialization failed\n");
  939. goto err_eeprom;
  940. }
  941. /* before reading the EEPROM, reset the controller to
  942. * put the device in a known good starting state
  943. */
  944. e1000_reset_hw(hw);
  945. /* make sure the EEPROM is good */
  946. if (e1000_validate_eeprom_checksum(hw) < 0) {
  947. e_err(probe, "The EEPROM Checksum Is Not Valid\n");
  948. e1000_dump_eeprom(adapter);
  949. /* set MAC address to all zeroes to invalidate and temporary
  950. * disable this device for the user. This blocks regular
  951. * traffic while still permitting ethtool ioctls from reaching
  952. * the hardware as well as allowing the user to run the
  953. * interface after manually setting a hw addr using
  954. * `ip set address`
  955. */
  956. memset(hw->mac_addr, 0, netdev->addr_len);
  957. } else {
  958. /* copy the MAC address out of the EEPROM */
  959. if (e1000_read_mac_addr(hw))
  960. e_err(probe, "EEPROM Read Error\n");
  961. }
  962. /* don't block initalization here due to bad MAC address */
  963. memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
  964. if (!is_valid_ether_addr(netdev->dev_addr))
  965. e_err(probe, "Invalid MAC Address\n");
  966. INIT_DELAYED_WORK(&adapter->watchdog_task, e1000_watchdog);
  967. INIT_DELAYED_WORK(&adapter->fifo_stall_task,
  968. e1000_82547_tx_fifo_stall_task);
  969. INIT_DELAYED_WORK(&adapter->phy_info_task, e1000_update_phy_info_task);
  970. INIT_WORK(&adapter->reset_task, e1000_reset_task);
  971. e1000_check_options(adapter);
  972. /* Initial Wake on LAN setting
  973. * If APM wake is enabled in the EEPROM,
  974. * enable the ACPI Magic Packet filter
  975. */
  976. switch (hw->mac_type) {
  977. case e1000_82542_rev2_0:
  978. case e1000_82542_rev2_1:
  979. case e1000_82543:
  980. break;
  981. case e1000_82544:
  982. e1000_read_eeprom(hw,
  983. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  984. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  985. break;
  986. case e1000_82546:
  987. case e1000_82546_rev_3:
  988. if (er32(STATUS) & E1000_STATUS_FUNC_1){
  989. e1000_read_eeprom(hw,
  990. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  991. break;
  992. }
  993. /* Fall Through */
  994. default:
  995. e1000_read_eeprom(hw,
  996. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  997. break;
  998. }
  999. if (eeprom_data & eeprom_apme_mask)
  1000. adapter->eeprom_wol |= E1000_WUFC_MAG;
  1001. /* now that we have the eeprom settings, apply the special cases
  1002. * where the eeprom may be wrong or the board simply won't support
  1003. * wake on lan on a particular port
  1004. */
  1005. switch (pdev->device) {
  1006. case E1000_DEV_ID_82546GB_PCIE:
  1007. adapter->eeprom_wol = 0;
  1008. break;
  1009. case E1000_DEV_ID_82546EB_FIBER:
  1010. case E1000_DEV_ID_82546GB_FIBER:
  1011. /* Wake events only supported on port A for dual fiber
  1012. * regardless of eeprom setting
  1013. */
  1014. if (er32(STATUS) & E1000_STATUS_FUNC_1)
  1015. adapter->eeprom_wol = 0;
  1016. break;
  1017. case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
  1018. /* if quad port adapter, disable WoL on all but port A */
  1019. if (global_quad_port_a != 0)
  1020. adapter->eeprom_wol = 0;
  1021. else
  1022. adapter->quad_port_a = true;
  1023. /* Reset for multiple quad port adapters */
  1024. if (++global_quad_port_a == 4)
  1025. global_quad_port_a = 0;
  1026. break;
  1027. }
  1028. /* initialize the wol settings based on the eeprom settings */
  1029. adapter->wol = adapter->eeprom_wol;
  1030. device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
  1031. /* Auto detect PHY address */
  1032. if (hw->mac_type == e1000_ce4100) {
  1033. for (i = 0; i < 32; i++) {
  1034. hw->phy_addr = i;
  1035. e1000_read_phy_reg(hw, PHY_ID2, &tmp);
  1036. if (tmp == 0 || tmp == 0xFF) {
  1037. if (i == 31)
  1038. goto err_eeprom;
  1039. continue;
  1040. } else
  1041. break;
  1042. }
  1043. }
  1044. /* reset the hardware with the new settings */
  1045. e1000_reset(adapter);
  1046. strcpy(netdev->name, "eth%d");
  1047. err = register_netdev(netdev);
  1048. if (err)
  1049. goto err_register;
  1050. e1000_vlan_filter_on_off(adapter, false);
  1051. /* print bus type/speed/width info */
  1052. e_info(probe, "(PCI%s:%dMHz:%d-bit) %pM\n",
  1053. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : ""),
  1054. ((hw->bus_speed == e1000_bus_speed_133) ? 133 :
  1055. (hw->bus_speed == e1000_bus_speed_120) ? 120 :
  1056. (hw->bus_speed == e1000_bus_speed_100) ? 100 :
  1057. (hw->bus_speed == e1000_bus_speed_66) ? 66 : 33),
  1058. ((hw->bus_width == e1000_bus_width_64) ? 64 : 32),
  1059. netdev->dev_addr);
  1060. /* carrier off reporting is important to ethtool even BEFORE open */
  1061. netif_carrier_off(netdev);
  1062. e_info(probe, "Intel(R) PRO/1000 Network Connection\n");
  1063. cards_found++;
  1064. return 0;
  1065. err_register:
  1066. err_eeprom:
  1067. e1000_phy_hw_reset(hw);
  1068. if (hw->flash_address)
  1069. iounmap(hw->flash_address);
  1070. kfree(adapter->tx_ring);
  1071. kfree(adapter->rx_ring);
  1072. err_dma:
  1073. err_sw_init:
  1074. err_mdio_ioremap:
  1075. iounmap(hw->ce4100_gbe_mdio_base_virt);
  1076. iounmap(hw->hw_addr);
  1077. err_ioremap:
  1078. free_netdev(netdev);
  1079. err_alloc_etherdev:
  1080. pci_release_selected_regions(pdev, bars);
  1081. err_pci_reg:
  1082. pci_disable_device(pdev);
  1083. return err;
  1084. }
  1085. /**
  1086. * e1000_remove - Device Removal Routine
  1087. * @pdev: PCI device information struct
  1088. *
  1089. * e1000_remove is called by the PCI subsystem to alert the driver
  1090. * that it should release a PCI device. The could be caused by a
  1091. * Hot-Plug event, or because the driver is going to be removed from
  1092. * memory.
  1093. **/
  1094. static void e1000_remove(struct pci_dev *pdev)
  1095. {
  1096. struct net_device *netdev = pci_get_drvdata(pdev);
  1097. struct e1000_adapter *adapter = netdev_priv(netdev);
  1098. struct e1000_hw *hw = &adapter->hw;
  1099. e1000_down_and_stop(adapter);
  1100. e1000_release_manageability(adapter);
  1101. unregister_netdev(netdev);
  1102. e1000_phy_hw_reset(hw);
  1103. kfree(adapter->tx_ring);
  1104. kfree(adapter->rx_ring);
  1105. if (hw->mac_type == e1000_ce4100)
  1106. iounmap(hw->ce4100_gbe_mdio_base_virt);
  1107. iounmap(hw->hw_addr);
  1108. if (hw->flash_address)
  1109. iounmap(hw->flash_address);
  1110. pci_release_selected_regions(pdev, adapter->bars);
  1111. free_netdev(netdev);
  1112. pci_disable_device(pdev);
  1113. }
  1114. /**
  1115. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  1116. * @adapter: board private structure to initialize
  1117. *
  1118. * e1000_sw_init initializes the Adapter private data structure.
  1119. * e1000_init_hw_struct MUST be called before this function
  1120. **/
  1121. static int e1000_sw_init(struct e1000_adapter *adapter)
  1122. {
  1123. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  1124. adapter->num_tx_queues = 1;
  1125. adapter->num_rx_queues = 1;
  1126. if (e1000_alloc_queues(adapter)) {
  1127. e_err(probe, "Unable to allocate memory for queues\n");
  1128. return -ENOMEM;
  1129. }
  1130. /* Explicitly disable IRQ since the NIC can be in any state. */
  1131. e1000_irq_disable(adapter);
  1132. spin_lock_init(&adapter->stats_lock);
  1133. mutex_init(&adapter->mutex);
  1134. set_bit(__E1000_DOWN, &adapter->flags);
  1135. return 0;
  1136. }
  1137. /**
  1138. * e1000_alloc_queues - Allocate memory for all rings
  1139. * @adapter: board private structure to initialize
  1140. *
  1141. * We allocate one ring per queue at run-time since we don't know the
  1142. * number of queues at compile-time.
  1143. **/
  1144. static int e1000_alloc_queues(struct e1000_adapter *adapter)
  1145. {
  1146. adapter->tx_ring = kcalloc(adapter->num_tx_queues,
  1147. sizeof(struct e1000_tx_ring), GFP_KERNEL);
  1148. if (!adapter->tx_ring)
  1149. return -ENOMEM;
  1150. adapter->rx_ring = kcalloc(adapter->num_rx_queues,
  1151. sizeof(struct e1000_rx_ring), GFP_KERNEL);
  1152. if (!adapter->rx_ring) {
  1153. kfree(adapter->tx_ring);
  1154. return -ENOMEM;
  1155. }
  1156. return E1000_SUCCESS;
  1157. }
  1158. /**
  1159. * e1000_open - Called when a network interface is made active
  1160. * @netdev: network interface device structure
  1161. *
  1162. * Returns 0 on success, negative value on failure
  1163. *
  1164. * The open entry point is called when a network interface is made
  1165. * active by the system (IFF_UP). At this point all resources needed
  1166. * for transmit and receive operations are allocated, the interrupt
  1167. * handler is registered with the OS, the watchdog task is started,
  1168. * and the stack is notified that the interface is ready.
  1169. **/
  1170. static int e1000_open(struct net_device *netdev)
  1171. {
  1172. struct e1000_adapter *adapter = netdev_priv(netdev);
  1173. struct e1000_hw *hw = &adapter->hw;
  1174. int err;
  1175. /* disallow open during test */
  1176. if (test_bit(__E1000_TESTING, &adapter->flags))
  1177. return -EBUSY;
  1178. netif_carrier_off(netdev);
  1179. /* allocate transmit descriptors */
  1180. err = e1000_setup_all_tx_resources(adapter);
  1181. if (err)
  1182. goto err_setup_tx;
  1183. /* allocate receive descriptors */
  1184. err = e1000_setup_all_rx_resources(adapter);
  1185. if (err)
  1186. goto err_setup_rx;
  1187. e1000_power_up_phy(adapter);
  1188. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  1189. if ((hw->mng_cookie.status &
  1190. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1191. e1000_update_mng_vlan(adapter);
  1192. }
  1193. /* before we allocate an interrupt, we must be ready to handle it.
  1194. * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
  1195. * as soon as we call pci_request_irq, so we have to setup our
  1196. * clean_rx handler before we do so.
  1197. */
  1198. e1000_configure(adapter);
  1199. err = e1000_request_irq(adapter);
  1200. if (err)
  1201. goto err_req_irq;
  1202. /* From here on the code is the same as e1000_up() */
  1203. clear_bit(__E1000_DOWN, &adapter->flags);
  1204. napi_enable(&adapter->napi);
  1205. e1000_irq_enable(adapter);
  1206. netif_start_queue(netdev);
  1207. /* fire a link status change interrupt to start the watchdog */
  1208. ew32(ICS, E1000_ICS_LSC);
  1209. return E1000_SUCCESS;
  1210. err_req_irq:
  1211. e1000_power_down_phy(adapter);
  1212. e1000_free_all_rx_resources(adapter);
  1213. err_setup_rx:
  1214. e1000_free_all_tx_resources(adapter);
  1215. err_setup_tx:
  1216. e1000_reset(adapter);
  1217. return err;
  1218. }
  1219. /**
  1220. * e1000_close - Disables a network interface
  1221. * @netdev: network interface device structure
  1222. *
  1223. * Returns 0, this is not allowed to fail
  1224. *
  1225. * The close entry point is called when an interface is de-activated
  1226. * by the OS. The hardware is still under the drivers control, but
  1227. * needs to be disabled. A global MAC reset is issued to stop the
  1228. * hardware, and all transmit and receive resources are freed.
  1229. **/
  1230. static int e1000_close(struct net_device *netdev)
  1231. {
  1232. struct e1000_adapter *adapter = netdev_priv(netdev);
  1233. struct e1000_hw *hw = &adapter->hw;
  1234. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  1235. e1000_down(adapter);
  1236. e1000_power_down_phy(adapter);
  1237. e1000_free_irq(adapter);
  1238. e1000_free_all_tx_resources(adapter);
  1239. e1000_free_all_rx_resources(adapter);
  1240. /* kill manageability vlan ID if supported, but not if a vlan with
  1241. * the same ID is registered on the host OS (let 8021q kill it)
  1242. */
  1243. if ((hw->mng_cookie.status &
  1244. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  1245. !test_bit(adapter->mng_vlan_id, adapter->active_vlans)) {
  1246. e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
  1247. adapter->mng_vlan_id);
  1248. }
  1249. return 0;
  1250. }
  1251. /**
  1252. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1253. * @adapter: address of board private structure
  1254. * @start: address of beginning of memory
  1255. * @len: length of memory
  1256. **/
  1257. static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
  1258. unsigned long len)
  1259. {
  1260. struct e1000_hw *hw = &adapter->hw;
  1261. unsigned long begin = (unsigned long)start;
  1262. unsigned long end = begin + len;
  1263. /* First rev 82545 and 82546 need to not allow any memory
  1264. * write location to cross 64k boundary due to errata 23
  1265. */
  1266. if (hw->mac_type == e1000_82545 ||
  1267. hw->mac_type == e1000_ce4100 ||
  1268. hw->mac_type == e1000_82546) {
  1269. return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
  1270. }
  1271. return true;
  1272. }
  1273. /**
  1274. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1275. * @adapter: board private structure
  1276. * @txdr: tx descriptor ring (for a specific queue) to setup
  1277. *
  1278. * Return 0 on success, negative on failure
  1279. **/
  1280. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1281. struct e1000_tx_ring *txdr)
  1282. {
  1283. struct pci_dev *pdev = adapter->pdev;
  1284. int size;
  1285. size = sizeof(struct e1000_buffer) * txdr->count;
  1286. txdr->buffer_info = vzalloc(size);
  1287. if (!txdr->buffer_info)
  1288. return -ENOMEM;
  1289. /* round up to nearest 4K */
  1290. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1291. txdr->size = ALIGN(txdr->size, 4096);
  1292. txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size, &txdr->dma,
  1293. GFP_KERNEL);
  1294. if (!txdr->desc) {
  1295. setup_tx_desc_die:
  1296. vfree(txdr->buffer_info);
  1297. return -ENOMEM;
  1298. }
  1299. /* Fix for errata 23, can't cross 64kB boundary */
  1300. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1301. void *olddesc = txdr->desc;
  1302. dma_addr_t olddma = txdr->dma;
  1303. e_err(tx_err, "txdr align check failed: %u bytes at %p\n",
  1304. txdr->size, txdr->desc);
  1305. /* Try again, without freeing the previous */
  1306. txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size,
  1307. &txdr->dma, GFP_KERNEL);
  1308. /* Failed allocation, critical failure */
  1309. if (!txdr->desc) {
  1310. dma_free_coherent(&pdev->dev, txdr->size, olddesc,
  1311. olddma);
  1312. goto setup_tx_desc_die;
  1313. }
  1314. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1315. /* give up */
  1316. dma_free_coherent(&pdev->dev, txdr->size, txdr->desc,
  1317. txdr->dma);
  1318. dma_free_coherent(&pdev->dev, txdr->size, olddesc,
  1319. olddma);
  1320. e_err(probe, "Unable to allocate aligned memory "
  1321. "for the transmit descriptor ring\n");
  1322. vfree(txdr->buffer_info);
  1323. return -ENOMEM;
  1324. } else {
  1325. /* Free old allocation, new allocation was successful */
  1326. dma_free_coherent(&pdev->dev, txdr->size, olddesc,
  1327. olddma);
  1328. }
  1329. }
  1330. memset(txdr->desc, 0, txdr->size);
  1331. txdr->next_to_use = 0;
  1332. txdr->next_to_clean = 0;
  1333. return 0;
  1334. }
  1335. /**
  1336. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1337. * (Descriptors) for all queues
  1338. * @adapter: board private structure
  1339. *
  1340. * Return 0 on success, negative on failure
  1341. **/
  1342. int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1343. {
  1344. int i, err = 0;
  1345. for (i = 0; i < adapter->num_tx_queues; i++) {
  1346. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1347. if (err) {
  1348. e_err(probe, "Allocation for Tx Queue %u failed\n", i);
  1349. for (i-- ; i >= 0; i--)
  1350. e1000_free_tx_resources(adapter,
  1351. &adapter->tx_ring[i]);
  1352. break;
  1353. }
  1354. }
  1355. return err;
  1356. }
  1357. /**
  1358. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1359. * @adapter: board private structure
  1360. *
  1361. * Configure the Tx unit of the MAC after a reset.
  1362. **/
  1363. static void e1000_configure_tx(struct e1000_adapter *adapter)
  1364. {
  1365. u64 tdba;
  1366. struct e1000_hw *hw = &adapter->hw;
  1367. u32 tdlen, tctl, tipg;
  1368. u32 ipgr1, ipgr2;
  1369. /* Setup the HW Tx Head and Tail descriptor pointers */
  1370. switch (adapter->num_tx_queues) {
  1371. case 1:
  1372. default:
  1373. tdba = adapter->tx_ring[0].dma;
  1374. tdlen = adapter->tx_ring[0].count *
  1375. sizeof(struct e1000_tx_desc);
  1376. ew32(TDLEN, tdlen);
  1377. ew32(TDBAH, (tdba >> 32));
  1378. ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
  1379. ew32(TDT, 0);
  1380. ew32(TDH, 0);
  1381. adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ?
  1382. E1000_TDH : E1000_82542_TDH);
  1383. adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ?
  1384. E1000_TDT : E1000_82542_TDT);
  1385. break;
  1386. }
  1387. /* Set the default values for the Tx Inter Packet Gap timer */
  1388. if ((hw->media_type == e1000_media_type_fiber ||
  1389. hw->media_type == e1000_media_type_internal_serdes))
  1390. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1391. else
  1392. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1393. switch (hw->mac_type) {
  1394. case e1000_82542_rev2_0:
  1395. case e1000_82542_rev2_1:
  1396. tipg = DEFAULT_82542_TIPG_IPGT;
  1397. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1398. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1399. break;
  1400. default:
  1401. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1402. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1403. break;
  1404. }
  1405. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1406. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1407. ew32(TIPG, tipg);
  1408. /* Set the Tx Interrupt Delay register */
  1409. ew32(TIDV, adapter->tx_int_delay);
  1410. if (hw->mac_type >= e1000_82540)
  1411. ew32(TADV, adapter->tx_abs_int_delay);
  1412. /* Program the Transmit Control Register */
  1413. tctl = er32(TCTL);
  1414. tctl &= ~E1000_TCTL_CT;
  1415. tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1416. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1417. e1000_config_collision_dist(hw);
  1418. /* Setup Transmit Descriptor Settings for eop descriptor */
  1419. adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
  1420. /* only set IDE if we are delaying interrupts using the timers */
  1421. if (adapter->tx_int_delay)
  1422. adapter->txd_cmd |= E1000_TXD_CMD_IDE;
  1423. if (hw->mac_type < e1000_82543)
  1424. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1425. else
  1426. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1427. /* Cache if we're 82544 running in PCI-X because we'll
  1428. * need this to apply a workaround later in the send path.
  1429. */
  1430. if (hw->mac_type == e1000_82544 &&
  1431. hw->bus_type == e1000_bus_type_pcix)
  1432. adapter->pcix_82544 = true;
  1433. ew32(TCTL, tctl);
  1434. }
  1435. /**
  1436. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1437. * @adapter: board private structure
  1438. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1439. *
  1440. * Returns 0 on success, negative on failure
  1441. **/
  1442. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1443. struct e1000_rx_ring *rxdr)
  1444. {
  1445. struct pci_dev *pdev = adapter->pdev;
  1446. int size, desc_len;
  1447. size = sizeof(struct e1000_buffer) * rxdr->count;
  1448. rxdr->buffer_info = vzalloc(size);
  1449. if (!rxdr->buffer_info)
  1450. return -ENOMEM;
  1451. desc_len = sizeof(struct e1000_rx_desc);
  1452. /* Round up to nearest 4K */
  1453. rxdr->size = rxdr->count * desc_len;
  1454. rxdr->size = ALIGN(rxdr->size, 4096);
  1455. rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma,
  1456. GFP_KERNEL);
  1457. if (!rxdr->desc) {
  1458. setup_rx_desc_die:
  1459. vfree(rxdr->buffer_info);
  1460. return -ENOMEM;
  1461. }
  1462. /* Fix for errata 23, can't cross 64kB boundary */
  1463. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1464. void *olddesc = rxdr->desc;
  1465. dma_addr_t olddma = rxdr->dma;
  1466. e_err(rx_err, "rxdr align check failed: %u bytes at %p\n",
  1467. rxdr->size, rxdr->desc);
  1468. /* Try again, without freeing the previous */
  1469. rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size,
  1470. &rxdr->dma, GFP_KERNEL);
  1471. /* Failed allocation, critical failure */
  1472. if (!rxdr->desc) {
  1473. dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
  1474. olddma);
  1475. goto setup_rx_desc_die;
  1476. }
  1477. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1478. /* give up */
  1479. dma_free_coherent(&pdev->dev, rxdr->size, rxdr->desc,
  1480. rxdr->dma);
  1481. dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
  1482. olddma);
  1483. e_err(probe, "Unable to allocate aligned memory for "
  1484. "the Rx descriptor ring\n");
  1485. goto setup_rx_desc_die;
  1486. } else {
  1487. /* Free old allocation, new allocation was successful */
  1488. dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
  1489. olddma);
  1490. }
  1491. }
  1492. memset(rxdr->desc, 0, rxdr->size);
  1493. rxdr->next_to_clean = 0;
  1494. rxdr->next_to_use = 0;
  1495. rxdr->rx_skb_top = NULL;
  1496. return 0;
  1497. }
  1498. /**
  1499. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1500. * (Descriptors) for all queues
  1501. * @adapter: board private structure
  1502. *
  1503. * Return 0 on success, negative on failure
  1504. **/
  1505. int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1506. {
  1507. int i, err = 0;
  1508. for (i = 0; i < adapter->num_rx_queues; i++) {
  1509. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1510. if (err) {
  1511. e_err(probe, "Allocation for Rx Queue %u failed\n", i);
  1512. for (i-- ; i >= 0; i--)
  1513. e1000_free_rx_resources(adapter,
  1514. &adapter->rx_ring[i]);
  1515. break;
  1516. }
  1517. }
  1518. return err;
  1519. }
  1520. /**
  1521. * e1000_setup_rctl - configure the receive control registers
  1522. * @adapter: Board private structure
  1523. **/
  1524. static void e1000_setup_rctl(struct e1000_adapter *adapter)
  1525. {
  1526. struct e1000_hw *hw = &adapter->hw;
  1527. u32 rctl;
  1528. rctl = er32(RCTL);
  1529. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1530. rctl |= E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
  1531. E1000_RCTL_RDMTS_HALF |
  1532. (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
  1533. if (hw->tbi_compatibility_on == 1)
  1534. rctl |= E1000_RCTL_SBP;
  1535. else
  1536. rctl &= ~E1000_RCTL_SBP;
  1537. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1538. rctl &= ~E1000_RCTL_LPE;
  1539. else
  1540. rctl |= E1000_RCTL_LPE;
  1541. /* Setup buffer sizes */
  1542. rctl &= ~E1000_RCTL_SZ_4096;
  1543. rctl |= E1000_RCTL_BSEX;
  1544. switch (adapter->rx_buffer_len) {
  1545. case E1000_RXBUFFER_2048:
  1546. default:
  1547. rctl |= E1000_RCTL_SZ_2048;
  1548. rctl &= ~E1000_RCTL_BSEX;
  1549. break;
  1550. case E1000_RXBUFFER_4096:
  1551. rctl |= E1000_RCTL_SZ_4096;
  1552. break;
  1553. case E1000_RXBUFFER_8192:
  1554. rctl |= E1000_RCTL_SZ_8192;
  1555. break;
  1556. case E1000_RXBUFFER_16384:
  1557. rctl |= E1000_RCTL_SZ_16384;
  1558. break;
  1559. }
  1560. /* This is useful for sniffing bad packets. */
  1561. if (adapter->netdev->features & NETIF_F_RXALL) {
  1562. /* UPE and MPE will be handled by normal PROMISC logic
  1563. * in e1000e_set_rx_mode
  1564. */
  1565. rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
  1566. E1000_RCTL_BAM | /* RX All Bcast Pkts */
  1567. E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
  1568. rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
  1569. E1000_RCTL_DPF | /* Allow filtered pause */
  1570. E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
  1571. /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
  1572. * and that breaks VLANs.
  1573. */
  1574. }
  1575. ew32(RCTL, rctl);
  1576. }
  1577. /**
  1578. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1579. * @adapter: board private structure
  1580. *
  1581. * Configure the Rx unit of the MAC after a reset.
  1582. **/
  1583. static void e1000_configure_rx(struct e1000_adapter *adapter)
  1584. {
  1585. u64 rdba;
  1586. struct e1000_hw *hw = &adapter->hw;
  1587. u32 rdlen, rctl, rxcsum;
  1588. if (adapter->netdev->mtu > ETH_DATA_LEN) {
  1589. rdlen = adapter->rx_ring[0].count *
  1590. sizeof(struct e1000_rx_desc);
  1591. adapter->clean_rx = e1000_clean_jumbo_rx_irq;
  1592. adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
  1593. } else {
  1594. rdlen = adapter->rx_ring[0].count *
  1595. sizeof(struct e1000_rx_desc);
  1596. adapter->clean_rx = e1000_clean_rx_irq;
  1597. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1598. }
  1599. /* disable receives while setting up the descriptors */
  1600. rctl = er32(RCTL);
  1601. ew32(RCTL, rctl & ~E1000_RCTL_EN);
  1602. /* set the Receive Delay Timer Register */
  1603. ew32(RDTR, adapter->rx_int_delay);
  1604. if (hw->mac_type >= e1000_82540) {
  1605. ew32(RADV, adapter->rx_abs_int_delay);
  1606. if (adapter->itr_setting != 0)
  1607. ew32(ITR, 1000000000 / (adapter->itr * 256));
  1608. }
  1609. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1610. * the Base and Length of the Rx Descriptor Ring
  1611. */
  1612. switch (adapter->num_rx_queues) {
  1613. case 1:
  1614. default:
  1615. rdba = adapter->rx_ring[0].dma;
  1616. ew32(RDLEN, rdlen);
  1617. ew32(RDBAH, (rdba >> 32));
  1618. ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
  1619. ew32(RDT, 0);
  1620. ew32(RDH, 0);
  1621. adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ?
  1622. E1000_RDH : E1000_82542_RDH);
  1623. adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ?
  1624. E1000_RDT : E1000_82542_RDT);
  1625. break;
  1626. }
  1627. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1628. if (hw->mac_type >= e1000_82543) {
  1629. rxcsum = er32(RXCSUM);
  1630. if (adapter->rx_csum)
  1631. rxcsum |= E1000_RXCSUM_TUOFL;
  1632. else
  1633. /* don't need to clear IPPCSE as it defaults to 0 */
  1634. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1635. ew32(RXCSUM, rxcsum);
  1636. }
  1637. /* Enable Receives */
  1638. ew32(RCTL, rctl | E1000_RCTL_EN);
  1639. }
  1640. /**
  1641. * e1000_free_tx_resources - Free Tx Resources per Queue
  1642. * @adapter: board private structure
  1643. * @tx_ring: Tx descriptor ring for a specific queue
  1644. *
  1645. * Free all transmit software resources
  1646. **/
  1647. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  1648. struct e1000_tx_ring *tx_ring)
  1649. {
  1650. struct pci_dev *pdev = adapter->pdev;
  1651. e1000_clean_tx_ring(adapter, tx_ring);
  1652. vfree(tx_ring->buffer_info);
  1653. tx_ring->buffer_info = NULL;
  1654. dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
  1655. tx_ring->dma);
  1656. tx_ring->desc = NULL;
  1657. }
  1658. /**
  1659. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1660. * @adapter: board private structure
  1661. *
  1662. * Free all transmit software resources
  1663. **/
  1664. void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1665. {
  1666. int i;
  1667. for (i = 0; i < adapter->num_tx_queues; i++)
  1668. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1669. }
  1670. static void e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1671. struct e1000_buffer *buffer_info)
  1672. {
  1673. if (buffer_info->dma) {
  1674. if (buffer_info->mapped_as_page)
  1675. dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
  1676. buffer_info->length, DMA_TO_DEVICE);
  1677. else
  1678. dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
  1679. buffer_info->length,
  1680. DMA_TO_DEVICE);
  1681. buffer_info->dma = 0;
  1682. }
  1683. if (buffer_info->skb) {
  1684. dev_kfree_skb_any(buffer_info->skb);
  1685. buffer_info->skb = NULL;
  1686. }
  1687. buffer_info->time_stamp = 0;
  1688. /* buffer_info must be completely set up in the transmit path */
  1689. }
  1690. /**
  1691. * e1000_clean_tx_ring - Free Tx Buffers
  1692. * @adapter: board private structure
  1693. * @tx_ring: ring to be cleaned
  1694. **/
  1695. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1696. struct e1000_tx_ring *tx_ring)
  1697. {
  1698. struct e1000_hw *hw = &adapter->hw;
  1699. struct e1000_buffer *buffer_info;
  1700. unsigned long size;
  1701. unsigned int i;
  1702. /* Free all the Tx ring sk_buffs */
  1703. for (i = 0; i < tx_ring->count; i++) {
  1704. buffer_info = &tx_ring->buffer_info[i];
  1705. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1706. }
  1707. netdev_reset_queue(adapter->netdev);
  1708. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1709. memset(tx_ring->buffer_info, 0, size);
  1710. /* Zero out the descriptor ring */
  1711. memset(tx_ring->desc, 0, tx_ring->size);
  1712. tx_ring->next_to_use = 0;
  1713. tx_ring->next_to_clean = 0;
  1714. tx_ring->last_tx_tso = false;
  1715. writel(0, hw->hw_addr + tx_ring->tdh);
  1716. writel(0, hw->hw_addr + tx_ring->tdt);
  1717. }
  1718. /**
  1719. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1720. * @adapter: board private structure
  1721. **/
  1722. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1723. {
  1724. int i;
  1725. for (i = 0; i < adapter->num_tx_queues; i++)
  1726. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1727. }
  1728. /**
  1729. * e1000_free_rx_resources - Free Rx Resources
  1730. * @adapter: board private structure
  1731. * @rx_ring: ring to clean the resources from
  1732. *
  1733. * Free all receive software resources
  1734. **/
  1735. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  1736. struct e1000_rx_ring *rx_ring)
  1737. {
  1738. struct pci_dev *pdev = adapter->pdev;
  1739. e1000_clean_rx_ring(adapter, rx_ring);
  1740. vfree(rx_ring->buffer_info);
  1741. rx_ring->buffer_info = NULL;
  1742. dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
  1743. rx_ring->dma);
  1744. rx_ring->desc = NULL;
  1745. }
  1746. /**
  1747. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1748. * @adapter: board private structure
  1749. *
  1750. * Free all receive software resources
  1751. **/
  1752. void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1753. {
  1754. int i;
  1755. for (i = 0; i < adapter->num_rx_queues; i++)
  1756. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1757. }
  1758. /**
  1759. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1760. * @adapter: board private structure
  1761. * @rx_ring: ring to free buffers from
  1762. **/
  1763. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1764. struct e1000_rx_ring *rx_ring)
  1765. {
  1766. struct e1000_hw *hw = &adapter->hw;
  1767. struct e1000_buffer *buffer_info;
  1768. struct pci_dev *pdev = adapter->pdev;
  1769. unsigned long size;
  1770. unsigned int i;
  1771. /* Free all the Rx ring sk_buffs */
  1772. for (i = 0; i < rx_ring->count; i++) {
  1773. buffer_info = &rx_ring->buffer_info[i];
  1774. if (buffer_info->dma &&
  1775. adapter->clean_rx == e1000_clean_rx_irq) {
  1776. dma_unmap_single(&pdev->dev, buffer_info->dma,
  1777. buffer_info->length,
  1778. DMA_FROM_DEVICE);
  1779. } else if (buffer_info->dma &&
  1780. adapter->clean_rx == e1000_clean_jumbo_rx_irq) {
  1781. dma_unmap_page(&pdev->dev, buffer_info->dma,
  1782. buffer_info->length,
  1783. DMA_FROM_DEVICE);
  1784. }
  1785. buffer_info->dma = 0;
  1786. if (buffer_info->page) {
  1787. put_page(buffer_info->page);
  1788. buffer_info->page = NULL;
  1789. }
  1790. if (buffer_info->skb) {
  1791. dev_kfree_skb(buffer_info->skb);
  1792. buffer_info->skb = NULL;
  1793. }
  1794. }
  1795. /* there also may be some cached data from a chained receive */
  1796. if (rx_ring->rx_skb_top) {
  1797. dev_kfree_skb(rx_ring->rx_skb_top);
  1798. rx_ring->rx_skb_top = NULL;
  1799. }
  1800. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1801. memset(rx_ring->buffer_info, 0, size);
  1802. /* Zero out the descriptor ring */
  1803. memset(rx_ring->desc, 0, rx_ring->size);
  1804. rx_ring->next_to_clean = 0;
  1805. rx_ring->next_to_use = 0;
  1806. writel(0, hw->hw_addr + rx_ring->rdh);
  1807. writel(0, hw->hw_addr + rx_ring->rdt);
  1808. }
  1809. /**
  1810. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1811. * @adapter: board private structure
  1812. **/
  1813. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1814. {
  1815. int i;
  1816. for (i = 0; i < adapter->num_rx_queues; i++)
  1817. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1818. }
  1819. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1820. * and memory write and invalidate disabled for certain operations
  1821. */
  1822. static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1823. {
  1824. struct e1000_hw *hw = &adapter->hw;
  1825. struct net_device *netdev = adapter->netdev;
  1826. u32 rctl;
  1827. e1000_pci_clear_mwi(hw);
  1828. rctl = er32(RCTL);
  1829. rctl |= E1000_RCTL_RST;
  1830. ew32(RCTL, rctl);
  1831. E1000_WRITE_FLUSH();
  1832. mdelay(5);
  1833. if (netif_running(netdev))
  1834. e1000_clean_all_rx_rings(adapter);
  1835. }
  1836. static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1837. {
  1838. struct e1000_hw *hw = &adapter->hw;
  1839. struct net_device *netdev = adapter->netdev;
  1840. u32 rctl;
  1841. rctl = er32(RCTL);
  1842. rctl &= ~E1000_RCTL_RST;
  1843. ew32(RCTL, rctl);
  1844. E1000_WRITE_FLUSH();
  1845. mdelay(5);
  1846. if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1847. e1000_pci_set_mwi(hw);
  1848. if (netif_running(netdev)) {
  1849. /* No need to loop, because 82542 supports only 1 queue */
  1850. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1851. e1000_configure_rx(adapter);
  1852. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1853. }
  1854. }
  1855. /**
  1856. * e1000_set_mac - Change the Ethernet Address of the NIC
  1857. * @netdev: network interface device structure
  1858. * @p: pointer to an address structure
  1859. *
  1860. * Returns 0 on success, negative on failure
  1861. **/
  1862. static int e1000_set_mac(struct net_device *netdev, void *p)
  1863. {
  1864. struct e1000_adapter *adapter = netdev_priv(netdev);
  1865. struct e1000_hw *hw = &adapter->hw;
  1866. struct sockaddr *addr = p;
  1867. if (!is_valid_ether_addr(addr->sa_data))
  1868. return -EADDRNOTAVAIL;
  1869. /* 82542 2.0 needs to be in reset to write receive address registers */
  1870. if (hw->mac_type == e1000_82542_rev2_0)
  1871. e1000_enter_82542_rst(adapter);
  1872. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1873. memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
  1874. e1000_rar_set(hw, hw->mac_addr, 0);
  1875. if (hw->mac_type == e1000_82542_rev2_0)
  1876. e1000_leave_82542_rst(adapter);
  1877. return 0;
  1878. }
  1879. /**
  1880. * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
  1881. * @netdev: network interface device structure
  1882. *
  1883. * The set_rx_mode entry point is called whenever the unicast or multicast
  1884. * address lists or the network interface flags are updated. This routine is
  1885. * responsible for configuring the hardware for proper unicast, multicast,
  1886. * promiscuous mode, and all-multi behavior.
  1887. **/
  1888. static void e1000_set_rx_mode(struct net_device *netdev)
  1889. {
  1890. struct e1000_adapter *adapter = netdev_priv(netdev);
  1891. struct e1000_hw *hw = &adapter->hw;
  1892. struct netdev_hw_addr *ha;
  1893. bool use_uc = false;
  1894. u32 rctl;
  1895. u32 hash_value;
  1896. int i, rar_entries = E1000_RAR_ENTRIES;
  1897. int mta_reg_count = E1000_NUM_MTA_REGISTERS;
  1898. u32 *mcarray = kcalloc(mta_reg_count, sizeof(u32), GFP_ATOMIC);
  1899. if (!mcarray)
  1900. return;
  1901. /* Check for Promiscuous and All Multicast modes */
  1902. rctl = er32(RCTL);
  1903. if (netdev->flags & IFF_PROMISC) {
  1904. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1905. rctl &= ~E1000_RCTL_VFE;
  1906. } else {
  1907. if (netdev->flags & IFF_ALLMULTI)
  1908. rctl |= E1000_RCTL_MPE;
  1909. else
  1910. rctl &= ~E1000_RCTL_MPE;
  1911. /* Enable VLAN filter if there is a VLAN */
  1912. if (e1000_vlan_used(adapter))
  1913. rctl |= E1000_RCTL_VFE;
  1914. }
  1915. if (netdev_uc_count(netdev) > rar_entries - 1) {
  1916. rctl |= E1000_RCTL_UPE;
  1917. } else if (!(netdev->flags & IFF_PROMISC)) {
  1918. rctl &= ~E1000_RCTL_UPE;
  1919. use_uc = true;
  1920. }
  1921. ew32(RCTL, rctl);
  1922. /* 82542 2.0 needs to be in reset to write receive address registers */
  1923. if (hw->mac_type == e1000_82542_rev2_0)
  1924. e1000_enter_82542_rst(adapter);
  1925. /* load the first 14 addresses into the exact filters 1-14. Unicast
  1926. * addresses take precedence to avoid disabling unicast filtering
  1927. * when possible.
  1928. *
  1929. * RAR 0 is used for the station MAC address
  1930. * if there are not 14 addresses, go ahead and clear the filters
  1931. */
  1932. i = 1;
  1933. if (use_uc)
  1934. netdev_for_each_uc_addr(ha, netdev) {
  1935. if (i == rar_entries)
  1936. break;
  1937. e1000_rar_set(hw, ha->addr, i++);
  1938. }
  1939. netdev_for_each_mc_addr(ha, netdev) {
  1940. if (i == rar_entries) {
  1941. /* load any remaining addresses into the hash table */
  1942. u32 hash_reg, hash_bit, mta;
  1943. hash_value = e1000_hash_mc_addr(hw, ha->addr);
  1944. hash_reg = (hash_value >> 5) & 0x7F;
  1945. hash_bit = hash_value & 0x1F;
  1946. mta = (1 << hash_bit);
  1947. mcarray[hash_reg] |= mta;
  1948. } else {
  1949. e1000_rar_set(hw, ha->addr, i++);
  1950. }
  1951. }
  1952. for (; i < rar_entries; i++) {
  1953. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1954. E1000_WRITE_FLUSH();
  1955. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1956. E1000_WRITE_FLUSH();
  1957. }
  1958. /* write the hash table completely, write from bottom to avoid
  1959. * both stupid write combining chipsets, and flushing each write
  1960. */
  1961. for (i = mta_reg_count - 1; i >= 0 ; i--) {
  1962. /* If we are on an 82544 has an errata where writing odd
  1963. * offsets overwrites the previous even offset, but writing
  1964. * backwards over the range solves the issue by always
  1965. * writing the odd offset first
  1966. */
  1967. E1000_WRITE_REG_ARRAY(hw, MTA, i, mcarray[i]);
  1968. }
  1969. E1000_WRITE_FLUSH();
  1970. if (hw->mac_type == e1000_82542_rev2_0)
  1971. e1000_leave_82542_rst(adapter);
  1972. kfree(mcarray);
  1973. }
  1974. /**
  1975. * e1000_update_phy_info_task - get phy info
  1976. * @work: work struct contained inside adapter struct
  1977. *
  1978. * Need to wait a few seconds after link up to get diagnostic information from
  1979. * the phy
  1980. */
  1981. static void e1000_update_phy_info_task(struct work_struct *work)
  1982. {
  1983. struct e1000_adapter *adapter = container_of(work,
  1984. struct e1000_adapter,
  1985. phy_info_task.work);
  1986. if (test_bit(__E1000_DOWN, &adapter->flags))
  1987. return;
  1988. mutex_lock(&adapter->mutex);
  1989. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1990. mutex_unlock(&adapter->mutex);
  1991. }
  1992. /**
  1993. * e1000_82547_tx_fifo_stall_task - task to complete work
  1994. * @work: work struct contained inside adapter struct
  1995. **/
  1996. static void e1000_82547_tx_fifo_stall_task(struct work_struct *work)
  1997. {
  1998. struct e1000_adapter *adapter = container_of(work,
  1999. struct e1000_adapter,
  2000. fifo_stall_task.work);
  2001. struct e1000_hw *hw = &adapter->hw;
  2002. struct net_device *netdev = adapter->netdev;
  2003. u32 tctl;
  2004. if (test_bit(__E1000_DOWN, &adapter->flags))
  2005. return;
  2006. mutex_lock(&adapter->mutex);
  2007. if (atomic_read(&adapter->tx_fifo_stall)) {
  2008. if ((er32(TDT) == er32(TDH)) &&
  2009. (er32(TDFT) == er32(TDFH)) &&
  2010. (er32(TDFTS) == er32(TDFHS))) {
  2011. tctl = er32(TCTL);
  2012. ew32(TCTL, tctl & ~E1000_TCTL_EN);
  2013. ew32(TDFT, adapter->tx_head_addr);
  2014. ew32(TDFH, adapter->tx_head_addr);
  2015. ew32(TDFTS, adapter->tx_head_addr);
  2016. ew32(TDFHS, adapter->tx_head_addr);
  2017. ew32(TCTL, tctl);
  2018. E1000_WRITE_FLUSH();
  2019. adapter->tx_fifo_head = 0;
  2020. atomic_set(&adapter->tx_fifo_stall, 0);
  2021. netif_wake_queue(netdev);
  2022. } else if (!test_bit(__E1000_DOWN, &adapter->flags)) {
  2023. schedule_delayed_work(&adapter->fifo_stall_task, 1);
  2024. }
  2025. }
  2026. mutex_unlock(&adapter->mutex);
  2027. }
  2028. bool e1000_has_link(struct e1000_adapter *adapter)
  2029. {
  2030. struct e1000_hw *hw = &adapter->hw;
  2031. bool link_active = false;
  2032. /* get_link_status is set on LSC (link status) interrupt or rx
  2033. * sequence error interrupt (except on intel ce4100).
  2034. * get_link_status will stay false until the
  2035. * e1000_check_for_link establishes link for copper adapters
  2036. * ONLY
  2037. */
  2038. switch (hw->media_type) {
  2039. case e1000_media_type_copper:
  2040. if (hw->mac_type == e1000_ce4100)
  2041. hw->get_link_status = 1;
  2042. if (hw->get_link_status) {
  2043. e1000_check_for_link(hw);
  2044. link_active = !hw->get_link_status;
  2045. } else {
  2046. link_active = true;
  2047. }
  2048. break;
  2049. case e1000_media_type_fiber:
  2050. e1000_check_for_link(hw);
  2051. link_active = !!(er32(STATUS) & E1000_STATUS_LU);
  2052. break;
  2053. case e1000_media_type_internal_serdes:
  2054. e1000_check_for_link(hw);
  2055. link_active = hw->serdes_has_link;
  2056. break;
  2057. default:
  2058. break;
  2059. }
  2060. return link_active;
  2061. }
  2062. /**
  2063. * e1000_watchdog - work function
  2064. * @work: work struct contained inside adapter struct
  2065. **/
  2066. static void e1000_watchdog(struct work_struct *work)
  2067. {
  2068. struct e1000_adapter *adapter = container_of(work,
  2069. struct e1000_adapter,
  2070. watchdog_task.work);
  2071. struct e1000_hw *hw = &adapter->hw;
  2072. struct net_device *netdev = adapter->netdev;
  2073. struct e1000_tx_ring *txdr = adapter->tx_ring;
  2074. u32 link, tctl;
  2075. if (test_bit(__E1000_DOWN, &adapter->flags))
  2076. return;
  2077. mutex_lock(&adapter->mutex);
  2078. link = e1000_has_link(adapter);
  2079. if ((netif_carrier_ok(netdev)) && link)
  2080. goto link_up;
  2081. if (link) {
  2082. if (!netif_carrier_ok(netdev)) {
  2083. u32 ctrl;
  2084. bool txb2b = true;
  2085. /* update snapshot of PHY registers on LSC */
  2086. e1000_get_speed_and_duplex(hw,
  2087. &adapter->link_speed,
  2088. &adapter->link_duplex);
  2089. ctrl = er32(CTRL);
  2090. pr_info("%s NIC Link is Up %d Mbps %s, "
  2091. "Flow Control: %s\n",
  2092. netdev->name,
  2093. adapter->link_speed,
  2094. adapter->link_duplex == FULL_DUPLEX ?
  2095. "Full Duplex" : "Half Duplex",
  2096. ((ctrl & E1000_CTRL_TFCE) && (ctrl &
  2097. E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
  2098. E1000_CTRL_RFCE) ? "RX" : ((ctrl &
  2099. E1000_CTRL_TFCE) ? "TX" : "None")));
  2100. /* adjust timeout factor according to speed/duplex */
  2101. adapter->tx_timeout_factor = 1;
  2102. switch (adapter->link_speed) {
  2103. case SPEED_10:
  2104. txb2b = false;
  2105. adapter->tx_timeout_factor = 16;
  2106. break;
  2107. case SPEED_100:
  2108. txb2b = false;
  2109. /* maybe add some timeout factor ? */
  2110. break;
  2111. }
  2112. /* enable transmits in the hardware */
  2113. tctl = er32(TCTL);
  2114. tctl |= E1000_TCTL_EN;
  2115. ew32(TCTL, tctl);
  2116. netif_carrier_on(netdev);
  2117. if (!test_bit(__E1000_DOWN, &adapter->flags))
  2118. schedule_delayed_work(&adapter->phy_info_task,
  2119. 2 * HZ);
  2120. adapter->smartspeed = 0;
  2121. }
  2122. } else {
  2123. if (netif_carrier_ok(netdev)) {
  2124. adapter->link_speed = 0;
  2125. adapter->link_duplex = 0;
  2126. pr_info("%s NIC Link is Down\n",
  2127. netdev->name);
  2128. netif_carrier_off(netdev);
  2129. if (!test_bit(__E1000_DOWN, &adapter->flags))
  2130. schedule_delayed_work(&adapter->phy_info_task,
  2131. 2 * HZ);
  2132. }
  2133. e1000_smartspeed(adapter);
  2134. }
  2135. link_up:
  2136. e1000_update_stats(adapter);
  2137. hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  2138. adapter->tpt_old = adapter->stats.tpt;
  2139. hw->collision_delta = adapter->stats.colc - adapter->colc_old;
  2140. adapter->colc_old = adapter->stats.colc;
  2141. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  2142. adapter->gorcl_old = adapter->stats.gorcl;
  2143. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  2144. adapter->gotcl_old = adapter->stats.gotcl;
  2145. e1000_update_adaptive(hw);
  2146. if (!netif_carrier_ok(netdev)) {
  2147. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  2148. /* We've lost link, so the controller stops DMA,
  2149. * but we've got queued Tx work that's never going
  2150. * to get done, so reset controller to flush Tx.
  2151. * (Do the reset outside of interrupt context).
  2152. */
  2153. adapter->tx_timeout_count++;
  2154. schedule_work(&adapter->reset_task);
  2155. /* exit immediately since reset is imminent */
  2156. goto unlock;
  2157. }
  2158. }
  2159. /* Simple mode for Interrupt Throttle Rate (ITR) */
  2160. if (hw->mac_type >= e1000_82540 && adapter->itr_setting == 4) {
  2161. /* Symmetric Tx/Rx gets a reduced ITR=2000;
  2162. * Total asymmetrical Tx or Rx gets ITR=8000;
  2163. * everyone else is between 2000-8000.
  2164. */
  2165. u32 goc = (adapter->gotcl + adapter->gorcl) / 10000;
  2166. u32 dif = (adapter->gotcl > adapter->gorcl ?
  2167. adapter->gotcl - adapter->gorcl :
  2168. adapter->gorcl - adapter->gotcl) / 10000;
  2169. u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  2170. ew32(ITR, 1000000000 / (itr * 256));
  2171. }
  2172. /* Cause software interrupt to ensure rx ring is cleaned */
  2173. ew32(ICS, E1000_ICS_RXDMT0);
  2174. /* Force detection of hung controller every watchdog period */
  2175. adapter->detect_tx_hung = true;
  2176. /* Reschedule the task */
  2177. if (!test_bit(__E1000_DOWN, &adapter->flags))
  2178. schedule_delayed_work(&adapter->watchdog_task, 2 * HZ);
  2179. unlock:
  2180. mutex_unlock(&adapter->mutex);
  2181. }
  2182. enum latency_range {
  2183. lowest_latency = 0,
  2184. low_latency = 1,
  2185. bulk_latency = 2,
  2186. latency_invalid = 255
  2187. };
  2188. /**
  2189. * e1000_update_itr - update the dynamic ITR value based on statistics
  2190. * @adapter: pointer to adapter
  2191. * @itr_setting: current adapter->itr
  2192. * @packets: the number of packets during this measurement interval
  2193. * @bytes: the number of bytes during this measurement interval
  2194. *
  2195. * Stores a new ITR value based on packets and byte
  2196. * counts during the last interrupt. The advantage of per interrupt
  2197. * computation is faster updates and more accurate ITR for the current
  2198. * traffic pattern. Constants in this function were computed
  2199. * based on theoretical maximum wire speed and thresholds were set based
  2200. * on testing data as well as attempting to minimize response time
  2201. * while increasing bulk throughput.
  2202. * this functionality is controlled by the InterruptThrottleRate module
  2203. * parameter (see e1000_param.c)
  2204. **/
  2205. static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
  2206. u16 itr_setting, int packets, int bytes)
  2207. {
  2208. unsigned int retval = itr_setting;
  2209. struct e1000_hw *hw = &adapter->hw;
  2210. if (unlikely(hw->mac_type < e1000_82540))
  2211. goto update_itr_done;
  2212. if (packets == 0)
  2213. goto update_itr_done;
  2214. switch (itr_setting) {
  2215. case lowest_latency:
  2216. /* jumbo frames get bulk treatment*/
  2217. if (bytes/packets > 8000)
  2218. retval = bulk_latency;
  2219. else if ((packets < 5) && (bytes > 512))
  2220. retval = low_latency;
  2221. break;
  2222. case low_latency: /* 50 usec aka 20000 ints/s */
  2223. if (bytes > 10000) {
  2224. /* jumbo frames need bulk latency setting */
  2225. if (bytes/packets > 8000)
  2226. retval = bulk_latency;
  2227. else if ((packets < 10) || ((bytes/packets) > 1200))
  2228. retval = bulk_latency;
  2229. else if ((packets > 35))
  2230. retval = lowest_latency;
  2231. } else if (bytes/packets > 2000)
  2232. retval = bulk_latency;
  2233. else if (packets <= 2 && bytes < 512)
  2234. retval = lowest_latency;
  2235. break;
  2236. case bulk_latency: /* 250 usec aka 4000 ints/s */
  2237. if (bytes > 25000) {
  2238. if (packets > 35)
  2239. retval = low_latency;
  2240. } else if (bytes < 6000) {
  2241. retval = low_latency;
  2242. }
  2243. break;
  2244. }
  2245. update_itr_done:
  2246. return retval;
  2247. }
  2248. static void e1000_set_itr(struct e1000_adapter *adapter)
  2249. {
  2250. struct e1000_hw *hw = &adapter->hw;
  2251. u16 current_itr;
  2252. u32 new_itr = adapter->itr;
  2253. if (unlikely(hw->mac_type < e1000_82540))
  2254. return;
  2255. /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
  2256. if (unlikely(adapter->link_speed != SPEED_1000)) {
  2257. current_itr = 0;
  2258. new_itr = 4000;
  2259. goto set_itr_now;
  2260. }
  2261. adapter->tx_itr = e1000_update_itr(adapter, adapter->tx_itr,
  2262. adapter->total_tx_packets,
  2263. adapter->total_tx_bytes);
  2264. /* conservative mode (itr 3) eliminates the lowest_latency setting */
  2265. if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
  2266. adapter->tx_itr = low_latency;
  2267. adapter->rx_itr = e1000_update_itr(adapter, adapter->rx_itr,
  2268. adapter->total_rx_packets,
  2269. adapter->total_rx_bytes);
  2270. /* conservative mode (itr 3) eliminates the lowest_latency setting */
  2271. if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
  2272. adapter->rx_itr = low_latency;
  2273. current_itr = max(adapter->rx_itr, adapter->tx_itr);
  2274. switch (current_itr) {
  2275. /* counts and packets in update_itr are dependent on these numbers */
  2276. case lowest_latency:
  2277. new_itr = 70000;
  2278. break;
  2279. case low_latency:
  2280. new_itr = 20000; /* aka hwitr = ~200 */
  2281. break;
  2282. case bulk_latency:
  2283. new_itr = 4000;
  2284. break;
  2285. default:
  2286. break;
  2287. }
  2288. set_itr_now:
  2289. if (new_itr != adapter->itr) {
  2290. /* this attempts to bias the interrupt rate towards Bulk
  2291. * by adding intermediate steps when interrupt rate is
  2292. * increasing
  2293. */
  2294. new_itr = new_itr > adapter->itr ?
  2295. min(adapter->itr + (new_itr >> 2), new_itr) :
  2296. new_itr;
  2297. adapter->itr = new_itr;
  2298. ew32(ITR, 1000000000 / (new_itr * 256));
  2299. }
  2300. }
  2301. #define E1000_TX_FLAGS_CSUM 0x00000001
  2302. #define E1000_TX_FLAGS_VLAN 0x00000002
  2303. #define E1000_TX_FLAGS_TSO 0x00000004
  2304. #define E1000_TX_FLAGS_IPV4 0x00000008
  2305. #define E1000_TX_FLAGS_NO_FCS 0x00000010
  2306. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2307. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2308. static int e1000_tso(struct e1000_adapter *adapter,
  2309. struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
  2310. {
  2311. struct e1000_context_desc *context_desc;
  2312. struct e1000_buffer *buffer_info;
  2313. unsigned int i;
  2314. u32 cmd_length = 0;
  2315. u16 ipcse = 0, tucse, mss;
  2316. u8 ipcss, ipcso, tucss, tucso, hdr_len;
  2317. int err;
  2318. if (skb_is_gso(skb)) {
  2319. if (skb_header_cloned(skb)) {
  2320. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2321. if (err)
  2322. return err;
  2323. }
  2324. hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  2325. mss = skb_shinfo(skb)->gso_size;
  2326. if (skb->protocol == htons(ETH_P_IP)) {
  2327. struct iphdr *iph = ip_hdr(skb);
  2328. iph->tot_len = 0;
  2329. iph->check = 0;
  2330. tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
  2331. iph->daddr, 0,
  2332. IPPROTO_TCP,
  2333. 0);
  2334. cmd_length = E1000_TXD_CMD_IP;
  2335. ipcse = skb_transport_offset(skb) - 1;
  2336. } else if (skb->protocol == htons(ETH_P_IPV6)) {
  2337. ipv6_hdr(skb)->payload_len = 0;
  2338. tcp_hdr(skb)->check =
  2339. ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
  2340. &ipv6_hdr(skb)->daddr,
  2341. 0, IPPROTO_TCP, 0);
  2342. ipcse = 0;
  2343. }
  2344. ipcss = skb_network_offset(skb);
  2345. ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
  2346. tucss = skb_transport_offset(skb);
  2347. tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
  2348. tucse = 0;
  2349. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2350. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2351. i = tx_ring->next_to_use;
  2352. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2353. buffer_info = &tx_ring->buffer_info[i];
  2354. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2355. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2356. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2357. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2358. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2359. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2360. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2361. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2362. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2363. buffer_info->time_stamp = jiffies;
  2364. buffer_info->next_to_watch = i;
  2365. if (++i == tx_ring->count) i = 0;
  2366. tx_ring->next_to_use = i;
  2367. return true;
  2368. }
  2369. return false;
  2370. }
  2371. static bool e1000_tx_csum(struct e1000_adapter *adapter,
  2372. struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
  2373. {
  2374. struct e1000_context_desc *context_desc;
  2375. struct e1000_buffer *buffer_info;
  2376. unsigned int i;
  2377. u8 css;
  2378. u32 cmd_len = E1000_TXD_CMD_DEXT;
  2379. if (skb->ip_summed != CHECKSUM_PARTIAL)
  2380. return false;
  2381. switch (skb->protocol) {
  2382. case cpu_to_be16(ETH_P_IP):
  2383. if (ip_hdr(skb)->protocol == IPPROTO_TCP)
  2384. cmd_len |= E1000_TXD_CMD_TCP;
  2385. break;
  2386. case cpu_to_be16(ETH_P_IPV6):
  2387. /* XXX not handling all IPV6 headers */
  2388. if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
  2389. cmd_len |= E1000_TXD_CMD_TCP;
  2390. break;
  2391. default:
  2392. if (unlikely(net_ratelimit()))
  2393. e_warn(drv, "checksum_partial proto=%x!\n",
  2394. skb->protocol);
  2395. break;
  2396. }
  2397. css = skb_checksum_start_offset(skb);
  2398. i = tx_ring->next_to_use;
  2399. buffer_info = &tx_ring->buffer_info[i];
  2400. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2401. context_desc->lower_setup.ip_config = 0;
  2402. context_desc->upper_setup.tcp_fields.tucss = css;
  2403. context_desc->upper_setup.tcp_fields.tucso =
  2404. css + skb->csum_offset;
  2405. context_desc->upper_setup.tcp_fields.tucse = 0;
  2406. context_desc->tcp_seg_setup.data = 0;
  2407. context_desc->cmd_and_length = cpu_to_le32(cmd_len);
  2408. buffer_info->time_stamp = jiffies;
  2409. buffer_info->next_to_watch = i;
  2410. if (unlikely(++i == tx_ring->count)) i = 0;
  2411. tx_ring->next_to_use = i;
  2412. return true;
  2413. }
  2414. #define E1000_MAX_TXD_PWR 12
  2415. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2416. static int e1000_tx_map(struct e1000_adapter *adapter,
  2417. struct e1000_tx_ring *tx_ring,
  2418. struct sk_buff *skb, unsigned int first,
  2419. unsigned int max_per_txd, unsigned int nr_frags,
  2420. unsigned int mss)
  2421. {
  2422. struct e1000_hw *hw = &adapter->hw;
  2423. struct pci_dev *pdev = adapter->pdev;
  2424. struct e1000_buffer *buffer_info;
  2425. unsigned int len = skb_headlen(skb);
  2426. unsigned int offset = 0, size, count = 0, i;
  2427. unsigned int f, bytecount, segs;
  2428. i = tx_ring->next_to_use;
  2429. while (len) {
  2430. buffer_info = &tx_ring->buffer_info[i];
  2431. size = min(len, max_per_txd);
  2432. /* Workaround for Controller erratum --
  2433. * descriptor for non-tso packet in a linear SKB that follows a
  2434. * tso gets written back prematurely before the data is fully
  2435. * DMA'd to the controller
  2436. */
  2437. if (!skb->data_len && tx_ring->last_tx_tso &&
  2438. !skb_is_gso(skb)) {
  2439. tx_ring->last_tx_tso = false;
  2440. size -= 4;
  2441. }
  2442. /* Workaround for premature desc write-backs
  2443. * in TSO mode. Append 4-byte sentinel desc
  2444. */
  2445. if (unlikely(mss && !nr_frags && size == len && size > 8))
  2446. size -= 4;
  2447. /* work-around for errata 10 and it applies
  2448. * to all controllers in PCI-X mode
  2449. * The fix is to make sure that the first descriptor of a
  2450. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2451. */
  2452. if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
  2453. (size > 2015) && count == 0))
  2454. size = 2015;
  2455. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2456. * terminating buffers within evenly-aligned dwords.
  2457. */
  2458. if (unlikely(adapter->pcix_82544 &&
  2459. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2460. size > 4))
  2461. size -= 4;
  2462. buffer_info->length = size;
  2463. /* set time_stamp *before* dma to help avoid a possible race */
  2464. buffer_info->time_stamp = jiffies;
  2465. buffer_info->mapped_as_page = false;
  2466. buffer_info->dma = dma_map_single(&pdev->dev,
  2467. skb->data + offset,
  2468. size, DMA_TO_DEVICE);
  2469. if (dma_mapping_error(&pdev->dev, buffer_info->dma))
  2470. goto dma_error;
  2471. buffer_info->next_to_watch = i;
  2472. len -= size;
  2473. offset += size;
  2474. count++;
  2475. if (len) {
  2476. i++;
  2477. if (unlikely(i == tx_ring->count))
  2478. i = 0;
  2479. }
  2480. }
  2481. for (f = 0; f < nr_frags; f++) {
  2482. const struct skb_frag_struct *frag;
  2483. frag = &skb_shinfo(skb)->frags[f];
  2484. len = skb_frag_size(frag);
  2485. offset = 0;
  2486. while (len) {
  2487. unsigned long bufend;
  2488. i++;
  2489. if (unlikely(i == tx_ring->count))
  2490. i = 0;
  2491. buffer_info = &tx_ring->buffer_info[i];
  2492. size = min(len, max_per_txd);
  2493. /* Workaround for premature desc write-backs
  2494. * in TSO mode. Append 4-byte sentinel desc
  2495. */
  2496. if (unlikely(mss && f == (nr_frags-1) &&
  2497. size == len && size > 8))
  2498. size -= 4;
  2499. /* Workaround for potential 82544 hang in PCI-X.
  2500. * Avoid terminating buffers within evenly-aligned
  2501. * dwords.
  2502. */
  2503. bufend = (unsigned long)
  2504. page_to_phys(skb_frag_page(frag));
  2505. bufend += offset + size - 1;
  2506. if (unlikely(adapter->pcix_82544 &&
  2507. !(bufend & 4) &&
  2508. size > 4))
  2509. size -= 4;
  2510. buffer_info->length = size;
  2511. buffer_info->time_stamp = jiffies;
  2512. buffer_info->mapped_as_page = true;
  2513. buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
  2514. offset, size, DMA_TO_DEVICE);
  2515. if (dma_mapping_error(&pdev->dev, buffer_info->dma))
  2516. goto dma_error;
  2517. buffer_info->next_to_watch = i;
  2518. len -= size;
  2519. offset += size;
  2520. count++;
  2521. }
  2522. }
  2523. segs = skb_shinfo(skb)->gso_segs ?: 1;
  2524. /* multiply data chunks by size of headers */
  2525. bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
  2526. tx_ring->buffer_info[i].skb = skb;
  2527. tx_ring->buffer_info[i].segs = segs;
  2528. tx_ring->buffer_info[i].bytecount = bytecount;
  2529. tx_ring->buffer_info[first].next_to_watch = i;
  2530. return count;
  2531. dma_error:
  2532. dev_err(&pdev->dev, "TX DMA map failed\n");
  2533. buffer_info->dma = 0;
  2534. if (count)
  2535. count--;
  2536. while (count--) {
  2537. if (i==0)
  2538. i += tx_ring->count;
  2539. i--;
  2540. buffer_info = &tx_ring->buffer_info[i];
  2541. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  2542. }
  2543. return 0;
  2544. }
  2545. static void e1000_tx_queue(struct e1000_adapter *adapter,
  2546. struct e1000_tx_ring *tx_ring, int tx_flags,
  2547. int count)
  2548. {
  2549. struct e1000_hw *hw = &adapter->hw;
  2550. struct e1000_tx_desc *tx_desc = NULL;
  2551. struct e1000_buffer *buffer_info;
  2552. u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2553. unsigned int i;
  2554. if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2555. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2556. E1000_TXD_CMD_TSE;
  2557. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2558. if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2559. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2560. }
  2561. if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2562. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2563. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2564. }
  2565. if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2566. txd_lower |= E1000_TXD_CMD_VLE;
  2567. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2568. }
  2569. if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
  2570. txd_lower &= ~(E1000_TXD_CMD_IFCS);
  2571. i = tx_ring->next_to_use;
  2572. while (count--) {
  2573. buffer_info = &tx_ring->buffer_info[i];
  2574. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2575. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2576. tx_desc->lower.data =
  2577. cpu_to_le32(txd_lower | buffer_info->length);
  2578. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2579. if (unlikely(++i == tx_ring->count)) i = 0;
  2580. }
  2581. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2582. /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
  2583. if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
  2584. tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
  2585. /* Force memory writes to complete before letting h/w
  2586. * know there are new descriptors to fetch. (Only
  2587. * applicable for weak-ordered memory model archs,
  2588. * such as IA-64).
  2589. */
  2590. wmb();
  2591. tx_ring->next_to_use = i;
  2592. writel(i, hw->hw_addr + tx_ring->tdt);
  2593. /* we need this if more than one processor can write to our tail
  2594. * at a time, it synchronizes IO on IA64/Altix systems
  2595. */
  2596. mmiowb();
  2597. }
  2598. /* 82547 workaround to avoid controller hang in half-duplex environment.
  2599. * The workaround is to avoid queuing a large packet that would span
  2600. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2601. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2602. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2603. * to the beginning of the Tx FIFO.
  2604. */
  2605. #define E1000_FIFO_HDR 0x10
  2606. #define E1000_82547_PAD_LEN 0x3E0
  2607. static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  2608. struct sk_buff *skb)
  2609. {
  2610. u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2611. u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2612. skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
  2613. if (adapter->link_duplex != HALF_DUPLEX)
  2614. goto no_fifo_stall_required;
  2615. if (atomic_read(&adapter->tx_fifo_stall))
  2616. return 1;
  2617. if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2618. atomic_set(&adapter->tx_fifo_stall, 1);
  2619. return 1;
  2620. }
  2621. no_fifo_stall_required:
  2622. adapter->tx_fifo_head += skb_fifo_len;
  2623. if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2624. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2625. return 0;
  2626. }
  2627. static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
  2628. {
  2629. struct e1000_adapter *adapter = netdev_priv(netdev);
  2630. struct e1000_tx_ring *tx_ring = adapter->tx_ring;
  2631. netif_stop_queue(netdev);
  2632. /* Herbert's original patch had:
  2633. * smp_mb__after_netif_stop_queue();
  2634. * but since that doesn't exist yet, just open code it.
  2635. */
  2636. smp_mb();
  2637. /* We need to check again in a case another CPU has just
  2638. * made room available.
  2639. */
  2640. if (likely(E1000_DESC_UNUSED(tx_ring) < size))
  2641. return -EBUSY;
  2642. /* A reprieve! */
  2643. netif_start_queue(netdev);
  2644. ++adapter->restart_queue;
  2645. return 0;
  2646. }
  2647. static int e1000_maybe_stop_tx(struct net_device *netdev,
  2648. struct e1000_tx_ring *tx_ring, int size)
  2649. {
  2650. if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
  2651. return 0;
  2652. return __e1000_maybe_stop_tx(netdev, size);
  2653. }
  2654. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2655. static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
  2656. struct net_device *netdev)
  2657. {
  2658. struct e1000_adapter *adapter = netdev_priv(netdev);
  2659. struct e1000_hw *hw = &adapter->hw;
  2660. struct e1000_tx_ring *tx_ring;
  2661. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2662. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2663. unsigned int tx_flags = 0;
  2664. unsigned int len = skb_headlen(skb);
  2665. unsigned int nr_frags;
  2666. unsigned int mss;
  2667. int count = 0;
  2668. int tso;
  2669. unsigned int f;
  2670. /* This goes back to the question of how to logically map a Tx queue
  2671. * to a flow. Right now, performance is impacted slightly negatively
  2672. * if using multiple Tx queues. If the stack breaks away from a
  2673. * single qdisc implementation, we can look at this again.
  2674. */
  2675. tx_ring = adapter->tx_ring;
  2676. if (unlikely(skb->len <= 0)) {
  2677. dev_kfree_skb_any(skb);
  2678. return NETDEV_TX_OK;
  2679. }
  2680. /* On PCI/PCI-X HW, if packet size is less than ETH_ZLEN,
  2681. * packets may get corrupted during padding by HW.
  2682. * To WA this issue, pad all small packets manually.
  2683. */
  2684. if (skb->len < ETH_ZLEN) {
  2685. if (skb_pad(skb, ETH_ZLEN - skb->len))
  2686. return NETDEV_TX_OK;
  2687. skb->len = ETH_ZLEN;
  2688. skb_set_tail_pointer(skb, ETH_ZLEN);
  2689. }
  2690. mss = skb_shinfo(skb)->gso_size;
  2691. /* The controller does a simple calculation to
  2692. * make sure there is enough room in the FIFO before
  2693. * initiating the DMA for each buffer. The calc is:
  2694. * 4 = ceil(buffer len/mss). To make sure we don't
  2695. * overrun the FIFO, adjust the max buffer len if mss
  2696. * drops.
  2697. */
  2698. if (mss) {
  2699. u8 hdr_len;
  2700. max_per_txd = min(mss << 2, max_per_txd);
  2701. max_txd_pwr = fls(max_per_txd) - 1;
  2702. hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  2703. if (skb->data_len && hdr_len == len) {
  2704. switch (hw->mac_type) {
  2705. unsigned int pull_size;
  2706. case e1000_82544:
  2707. /* Make sure we have room to chop off 4 bytes,
  2708. * and that the end alignment will work out to
  2709. * this hardware's requirements
  2710. * NOTE: this is a TSO only workaround
  2711. * if end byte alignment not correct move us
  2712. * into the next dword
  2713. */
  2714. if ((unsigned long)(skb_tail_pointer(skb) - 1)
  2715. & 4)
  2716. break;
  2717. /* fall through */
  2718. pull_size = min((unsigned int)4, skb->data_len);
  2719. if (!__pskb_pull_tail(skb, pull_size)) {
  2720. e_err(drv, "__pskb_pull_tail "
  2721. "failed.\n");
  2722. dev_kfree_skb_any(skb);
  2723. return NETDEV_TX_OK;
  2724. }
  2725. len = skb_headlen(skb);
  2726. break;
  2727. default:
  2728. /* do nothing */
  2729. break;
  2730. }
  2731. }
  2732. }
  2733. /* reserve a descriptor for the offload context */
  2734. if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
  2735. count++;
  2736. count++;
  2737. /* Controller Erratum workaround */
  2738. if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
  2739. count++;
  2740. count += TXD_USE_COUNT(len, max_txd_pwr);
  2741. if (adapter->pcix_82544)
  2742. count++;
  2743. /* work-around for errata 10 and it applies to all controllers
  2744. * in PCI-X mode, so add one more descriptor to the count
  2745. */
  2746. if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
  2747. (len > 2015)))
  2748. count++;
  2749. nr_frags = skb_shinfo(skb)->nr_frags;
  2750. for (f = 0; f < nr_frags; f++)
  2751. count += TXD_USE_COUNT(skb_frag_size(&skb_shinfo(skb)->frags[f]),
  2752. max_txd_pwr);
  2753. if (adapter->pcix_82544)
  2754. count += nr_frags;
  2755. /* need: count + 2 desc gap to keep tail from touching
  2756. * head, otherwise try next time
  2757. */
  2758. if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2)))
  2759. return NETDEV_TX_BUSY;
  2760. if (unlikely((hw->mac_type == e1000_82547) &&
  2761. (e1000_82547_fifo_workaround(adapter, skb)))) {
  2762. netif_stop_queue(netdev);
  2763. if (!test_bit(__E1000_DOWN, &adapter->flags))
  2764. schedule_delayed_work(&adapter->fifo_stall_task, 1);
  2765. return NETDEV_TX_BUSY;
  2766. }
  2767. if (vlan_tx_tag_present(skb)) {
  2768. tx_flags |= E1000_TX_FLAGS_VLAN;
  2769. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2770. }
  2771. first = tx_ring->next_to_use;
  2772. tso = e1000_tso(adapter, tx_ring, skb);
  2773. if (tso < 0) {
  2774. dev_kfree_skb_any(skb);
  2775. return NETDEV_TX_OK;
  2776. }
  2777. if (likely(tso)) {
  2778. if (likely(hw->mac_type != e1000_82544))
  2779. tx_ring->last_tx_tso = true;
  2780. tx_flags |= E1000_TX_FLAGS_TSO;
  2781. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2782. tx_flags |= E1000_TX_FLAGS_CSUM;
  2783. if (likely(skb->protocol == htons(ETH_P_IP)))
  2784. tx_flags |= E1000_TX_FLAGS_IPV4;
  2785. if (unlikely(skb->no_fcs))
  2786. tx_flags |= E1000_TX_FLAGS_NO_FCS;
  2787. count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd,
  2788. nr_frags, mss);
  2789. if (count) {
  2790. netdev_sent_queue(netdev, skb->len);
  2791. skb_tx_timestamp(skb);
  2792. e1000_tx_queue(adapter, tx_ring, tx_flags, count);
  2793. /* Make sure there is space in the ring for the next send. */
  2794. e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
  2795. } else {
  2796. dev_kfree_skb_any(skb);
  2797. tx_ring->buffer_info[first].time_stamp = 0;
  2798. tx_ring->next_to_use = first;
  2799. }
  2800. return NETDEV_TX_OK;
  2801. }
  2802. #define NUM_REGS 38 /* 1 based count */
  2803. static void e1000_regdump(struct e1000_adapter *adapter)
  2804. {
  2805. struct e1000_hw *hw = &adapter->hw;
  2806. u32 regs[NUM_REGS];
  2807. u32 *regs_buff = regs;
  2808. int i = 0;
  2809. static const char * const reg_name[] = {
  2810. "CTRL", "STATUS",
  2811. "RCTL", "RDLEN", "RDH", "RDT", "RDTR",
  2812. "TCTL", "TDBAL", "TDBAH", "TDLEN", "TDH", "TDT",
  2813. "TIDV", "TXDCTL", "TADV", "TARC0",
  2814. "TDBAL1", "TDBAH1", "TDLEN1", "TDH1", "TDT1",
  2815. "TXDCTL1", "TARC1",
  2816. "CTRL_EXT", "ERT", "RDBAL", "RDBAH",
  2817. "TDFH", "TDFT", "TDFHS", "TDFTS", "TDFPC",
  2818. "RDFH", "RDFT", "RDFHS", "RDFTS", "RDFPC"
  2819. };
  2820. regs_buff[0] = er32(CTRL);
  2821. regs_buff[1] = er32(STATUS);
  2822. regs_buff[2] = er32(RCTL);
  2823. regs_buff[3] = er32(RDLEN);
  2824. regs_buff[4] = er32(RDH);
  2825. regs_buff[5] = er32(RDT);
  2826. regs_buff[6] = er32(RDTR);
  2827. regs_buff[7] = er32(TCTL);
  2828. regs_buff[8] = er32(TDBAL);
  2829. regs_buff[9] = er32(TDBAH);
  2830. regs_buff[10] = er32(TDLEN);
  2831. regs_buff[11] = er32(TDH);
  2832. regs_buff[12] = er32(TDT);
  2833. regs_buff[13] = er32(TIDV);
  2834. regs_buff[14] = er32(TXDCTL);
  2835. regs_buff[15] = er32(TADV);
  2836. regs_buff[16] = er32(TARC0);
  2837. regs_buff[17] = er32(TDBAL1);
  2838. regs_buff[18] = er32(TDBAH1);
  2839. regs_buff[19] = er32(TDLEN1);
  2840. regs_buff[20] = er32(TDH1);
  2841. regs_buff[21] = er32(TDT1);
  2842. regs_buff[22] = er32(TXDCTL1);
  2843. regs_buff[23] = er32(TARC1);
  2844. regs_buff[24] = er32(CTRL_EXT);
  2845. regs_buff[25] = er32(ERT);
  2846. regs_buff[26] = er32(RDBAL0);
  2847. regs_buff[27] = er32(RDBAH0);
  2848. regs_buff[28] = er32(TDFH);
  2849. regs_buff[29] = er32(TDFT);
  2850. regs_buff[30] = er32(TDFHS);
  2851. regs_buff[31] = er32(TDFTS);
  2852. regs_buff[32] = er32(TDFPC);
  2853. regs_buff[33] = er32(RDFH);
  2854. regs_buff[34] = er32(RDFT);
  2855. regs_buff[35] = er32(RDFHS);
  2856. regs_buff[36] = er32(RDFTS);
  2857. regs_buff[37] = er32(RDFPC);
  2858. pr_info("Register dump\n");
  2859. for (i = 0; i < NUM_REGS; i++)
  2860. pr_info("%-15s %08x\n", reg_name[i], regs_buff[i]);
  2861. }
  2862. /*
  2863. * e1000_dump: Print registers, tx ring and rx ring
  2864. */
  2865. static void e1000_dump(struct e1000_adapter *adapter)
  2866. {
  2867. /* this code doesn't handle multiple rings */
  2868. struct e1000_tx_ring *tx_ring = adapter->tx_ring;
  2869. struct e1000_rx_ring *rx_ring = adapter->rx_ring;
  2870. int i;
  2871. if (!netif_msg_hw(adapter))
  2872. return;
  2873. /* Print Registers */
  2874. e1000_regdump(adapter);
  2875. /* transmit dump */
  2876. pr_info("TX Desc ring0 dump\n");
  2877. /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
  2878. *
  2879. * Legacy Transmit Descriptor
  2880. * +--------------------------------------------------------------+
  2881. * 0 | Buffer Address [63:0] (Reserved on Write Back) |
  2882. * +--------------------------------------------------------------+
  2883. * 8 | Special | CSS | Status | CMD | CSO | Length |
  2884. * +--------------------------------------------------------------+
  2885. * 63 48 47 36 35 32 31 24 23 16 15 0
  2886. *
  2887. * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
  2888. * 63 48 47 40 39 32 31 16 15 8 7 0
  2889. * +----------------------------------------------------------------+
  2890. * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
  2891. * +----------------------------------------------------------------+
  2892. * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
  2893. * +----------------------------------------------------------------+
  2894. * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
  2895. *
  2896. * Extended Data Descriptor (DTYP=0x1)
  2897. * +----------------------------------------------------------------+
  2898. * 0 | Buffer Address [63:0] |
  2899. * +----------------------------------------------------------------+
  2900. * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
  2901. * +----------------------------------------------------------------+
  2902. * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
  2903. */
  2904. pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestmp bi->skb\n");
  2905. pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestmp bi->skb\n");
  2906. if (!netif_msg_tx_done(adapter))
  2907. goto rx_ring_summary;
  2908. for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
  2909. struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*tx_ring, i);
  2910. struct e1000_buffer *buffer_info = &tx_ring->buffer_info[i];
  2911. struct my_u { __le64 a; __le64 b; };
  2912. struct my_u *u = (struct my_u *)tx_desc;
  2913. const char *type;
  2914. if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
  2915. type = "NTC/U";
  2916. else if (i == tx_ring->next_to_use)
  2917. type = "NTU";
  2918. else if (i == tx_ring->next_to_clean)
  2919. type = "NTC";
  2920. else
  2921. type = "";
  2922. pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p %s\n",
  2923. ((le64_to_cpu(u->b) & (1<<20)) ? 'd' : 'c'), i,
  2924. le64_to_cpu(u->a), le64_to_cpu(u->b),
  2925. (u64)buffer_info->dma, buffer_info->length,
  2926. buffer_info->next_to_watch,
  2927. (u64)buffer_info->time_stamp, buffer_info->skb, type);
  2928. }
  2929. rx_ring_summary:
  2930. /* receive dump */
  2931. pr_info("\nRX Desc ring dump\n");
  2932. /* Legacy Receive Descriptor Format
  2933. *
  2934. * +-----------------------------------------------------+
  2935. * | Buffer Address [63:0] |
  2936. * +-----------------------------------------------------+
  2937. * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
  2938. * +-----------------------------------------------------+
  2939. * 63 48 47 40 39 32 31 16 15 0
  2940. */
  2941. pr_info("R[desc] [address 63:0 ] [vl er S cks ln] [bi->dma ] [bi->skb]\n");
  2942. if (!netif_msg_rx_status(adapter))
  2943. goto exit;
  2944. for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
  2945. struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rx_ring, i);
  2946. struct e1000_buffer *buffer_info = &rx_ring->buffer_info[i];
  2947. struct my_u { __le64 a; __le64 b; };
  2948. struct my_u *u = (struct my_u *)rx_desc;
  2949. const char *type;
  2950. if (i == rx_ring->next_to_use)
  2951. type = "NTU";
  2952. else if (i == rx_ring->next_to_clean)
  2953. type = "NTC";
  2954. else
  2955. type = "";
  2956. pr_info("R[0x%03X] %016llX %016llX %016llX %p %s\n",
  2957. i, le64_to_cpu(u->a), le64_to_cpu(u->b),
  2958. (u64)buffer_info->dma, buffer_info->skb, type);
  2959. } /* for */
  2960. /* dump the descriptor caches */
  2961. /* rx */
  2962. pr_info("Rx descriptor cache in 64bit format\n");
  2963. for (i = 0x6000; i <= 0x63FF ; i += 0x10) {
  2964. pr_info("R%04X: %08X|%08X %08X|%08X\n",
  2965. i,
  2966. readl(adapter->hw.hw_addr + i+4),
  2967. readl(adapter->hw.hw_addr + i),
  2968. readl(adapter->hw.hw_addr + i+12),
  2969. readl(adapter->hw.hw_addr + i+8));
  2970. }
  2971. /* tx */
  2972. pr_info("Tx descriptor cache in 64bit format\n");
  2973. for (i = 0x7000; i <= 0x73FF ; i += 0x10) {
  2974. pr_info("T%04X: %08X|%08X %08X|%08X\n",
  2975. i,
  2976. readl(adapter->hw.hw_addr + i+4),
  2977. readl(adapter->hw.hw_addr + i),
  2978. readl(adapter->hw.hw_addr + i+12),
  2979. readl(adapter->hw.hw_addr + i+8));
  2980. }
  2981. exit:
  2982. return;
  2983. }
  2984. /**
  2985. * e1000_tx_timeout - Respond to a Tx Hang
  2986. * @netdev: network interface device structure
  2987. **/
  2988. static void e1000_tx_timeout(struct net_device *netdev)
  2989. {
  2990. struct e1000_adapter *adapter = netdev_priv(netdev);
  2991. /* Do the reset outside of interrupt context */
  2992. adapter->tx_timeout_count++;
  2993. schedule_work(&adapter->reset_task);
  2994. }
  2995. static void e1000_reset_task(struct work_struct *work)
  2996. {
  2997. struct e1000_adapter *adapter =
  2998. container_of(work, struct e1000_adapter, reset_task);
  2999. if (test_bit(__E1000_DOWN, &adapter->flags))
  3000. return;
  3001. e_err(drv, "Reset adapter\n");
  3002. e1000_reinit_safe(adapter);
  3003. }
  3004. /**
  3005. * e1000_get_stats - Get System Network Statistics
  3006. * @netdev: network interface device structure
  3007. *
  3008. * Returns the address of the device statistics structure.
  3009. * The statistics are actually updated from the watchdog.
  3010. **/
  3011. static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
  3012. {
  3013. /* only return the current stats */
  3014. return &netdev->stats;
  3015. }
  3016. /**
  3017. * e1000_change_mtu - Change the Maximum Transfer Unit
  3018. * @netdev: network interface device structure
  3019. * @new_mtu: new value for maximum frame size
  3020. *
  3021. * Returns 0 on success, negative on failure
  3022. **/
  3023. static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
  3024. {
  3025. struct e1000_adapter *adapter = netdev_priv(netdev);
  3026. struct e1000_hw *hw = &adapter->hw;
  3027. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  3028. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  3029. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  3030. e_err(probe, "Invalid MTU setting\n");
  3031. return -EINVAL;
  3032. }
  3033. /* Adapter-specific max frame size limits. */
  3034. switch (hw->mac_type) {
  3035. case e1000_undefined ... e1000_82542_rev2_1:
  3036. if (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
  3037. e_err(probe, "Jumbo Frames not supported.\n");
  3038. return -EINVAL;
  3039. }
  3040. break;
  3041. default:
  3042. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  3043. break;
  3044. }
  3045. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  3046. msleep(1);
  3047. /* e1000_down has a dependency on max_frame_size */
  3048. hw->max_frame_size = max_frame;
  3049. if (netif_running(netdev))
  3050. e1000_down(adapter);
  3051. /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
  3052. * means we reserve 2 more, this pushes us to allocate from the next
  3053. * larger slab size.
  3054. * i.e. RXBUFFER_2048 --> size-4096 slab
  3055. * however with the new *_jumbo_rx* routines, jumbo receives will use
  3056. * fragmented skbs
  3057. */
  3058. if (max_frame <= E1000_RXBUFFER_2048)
  3059. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  3060. else
  3061. #if (PAGE_SIZE >= E1000_RXBUFFER_16384)
  3062. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  3063. #elif (PAGE_SIZE >= E1000_RXBUFFER_4096)
  3064. adapter->rx_buffer_len = PAGE_SIZE;
  3065. #endif
  3066. /* adjust allocation if LPE protects us, and we aren't using SBP */
  3067. if (!hw->tbi_compatibility_on &&
  3068. ((max_frame == (ETH_FRAME_LEN + ETH_FCS_LEN)) ||
  3069. (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
  3070. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  3071. pr_info("%s changing MTU from %d to %d\n",
  3072. netdev->name, netdev->mtu, new_mtu);
  3073. netdev->mtu = new_mtu;
  3074. if (netif_running(netdev))
  3075. e1000_up(adapter);
  3076. else
  3077. e1000_reset(adapter);
  3078. clear_bit(__E1000_RESETTING, &adapter->flags);
  3079. return 0;
  3080. }
  3081. /**
  3082. * e1000_update_stats - Update the board statistics counters
  3083. * @adapter: board private structure
  3084. **/
  3085. void e1000_update_stats(struct e1000_adapter *adapter)
  3086. {
  3087. struct net_device *netdev = adapter->netdev;
  3088. struct e1000_hw *hw = &adapter->hw;
  3089. struct pci_dev *pdev = adapter->pdev;
  3090. unsigned long flags;
  3091. u16 phy_tmp;
  3092. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  3093. /* Prevent stats update while adapter is being reset, or if the pci
  3094. * connection is down.
  3095. */
  3096. if (adapter->link_speed == 0)
  3097. return;
  3098. if (pci_channel_offline(pdev))
  3099. return;
  3100. spin_lock_irqsave(&adapter->stats_lock, flags);
  3101. /* these counters are modified from e1000_tbi_adjust_stats,
  3102. * called from the interrupt context, so they must only
  3103. * be written while holding adapter->stats_lock
  3104. */
  3105. adapter->stats.crcerrs += er32(CRCERRS);
  3106. adapter->stats.gprc += er32(GPRC);
  3107. adapter->stats.gorcl += er32(GORCL);
  3108. adapter->stats.gorch += er32(GORCH);
  3109. adapter->stats.bprc += er32(BPRC);
  3110. adapter->stats.mprc += er32(MPRC);
  3111. adapter->stats.roc += er32(ROC);
  3112. adapter->stats.prc64 += er32(PRC64);
  3113. adapter->stats.prc127 += er32(PRC127);
  3114. adapter->stats.prc255 += er32(PRC255);
  3115. adapter->stats.prc511 += er32(PRC511);
  3116. adapter->stats.prc1023 += er32(PRC1023);
  3117. adapter->stats.prc1522 += er32(PRC1522);
  3118. adapter->stats.symerrs += er32(SYMERRS);
  3119. adapter->stats.mpc += er32(MPC);
  3120. adapter->stats.scc += er32(SCC);
  3121. adapter->stats.ecol += er32(ECOL);
  3122. adapter->stats.mcc += er32(MCC);
  3123. adapter->stats.latecol += er32(LATECOL);
  3124. adapter->stats.dc += er32(DC);
  3125. adapter->stats.sec += er32(SEC);
  3126. adapter->stats.rlec += er32(RLEC);
  3127. adapter->stats.xonrxc += er32(XONRXC);
  3128. adapter->stats.xontxc += er32(XONTXC);
  3129. adapter->stats.xoffrxc += er32(XOFFRXC);
  3130. adapter->stats.xofftxc += er32(XOFFTXC);
  3131. adapter->stats.fcruc += er32(FCRUC);
  3132. adapter->stats.gptc += er32(GPTC);
  3133. adapter->stats.gotcl += er32(GOTCL);
  3134. adapter->stats.gotch += er32(GOTCH);
  3135. adapter->stats.rnbc += er32(RNBC);
  3136. adapter->stats.ruc += er32(RUC);
  3137. adapter->stats.rfc += er32(RFC);
  3138. adapter->stats.rjc += er32(RJC);
  3139. adapter->stats.torl += er32(TORL);
  3140. adapter->stats.torh += er32(TORH);
  3141. adapter->stats.totl += er32(TOTL);
  3142. adapter->stats.toth += er32(TOTH);
  3143. adapter->stats.tpr += er32(TPR);
  3144. adapter->stats.ptc64 += er32(PTC64);
  3145. adapter->stats.ptc127 += er32(PTC127);
  3146. adapter->stats.ptc255 += er32(PTC255);
  3147. adapter->stats.ptc511 += er32(PTC511);
  3148. adapter->stats.ptc1023 += er32(PTC1023);
  3149. adapter->stats.ptc1522 += er32(PTC1522);
  3150. adapter->stats.mptc += er32(MPTC);
  3151. adapter->stats.bptc += er32(BPTC);
  3152. /* used for adaptive IFS */
  3153. hw->tx_packet_delta = er32(TPT);
  3154. adapter->stats.tpt += hw->tx_packet_delta;
  3155. hw->collision_delta = er32(COLC);
  3156. adapter->stats.colc += hw->collision_delta;
  3157. if (hw->mac_type >= e1000_82543) {
  3158. adapter->stats.algnerrc += er32(ALGNERRC);
  3159. adapter->stats.rxerrc += er32(RXERRC);
  3160. adapter->stats.tncrs += er32(TNCRS);
  3161. adapter->stats.cexterr += er32(CEXTERR);
  3162. adapter->stats.tsctc += er32(TSCTC);
  3163. adapter->stats.tsctfc += er32(TSCTFC);
  3164. }
  3165. /* Fill out the OS statistics structure */
  3166. netdev->stats.multicast = adapter->stats.mprc;
  3167. netdev->stats.collisions = adapter->stats.colc;
  3168. /* Rx Errors */
  3169. /* RLEC on some newer hardware can be incorrect so build
  3170. * our own version based on RUC and ROC
  3171. */
  3172. netdev->stats.rx_errors = adapter->stats.rxerrc +
  3173. adapter->stats.crcerrs + adapter->stats.algnerrc +
  3174. adapter->stats.ruc + adapter->stats.roc +
  3175. adapter->stats.cexterr;
  3176. adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
  3177. netdev->stats.rx_length_errors = adapter->stats.rlerrc;
  3178. netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
  3179. netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
  3180. netdev->stats.rx_missed_errors = adapter->stats.mpc;
  3181. /* Tx Errors */
  3182. adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
  3183. netdev->stats.tx_errors = adapter->stats.txerrc;
  3184. netdev->stats.tx_aborted_errors = adapter->stats.ecol;
  3185. netdev->stats.tx_window_errors = adapter->stats.latecol;
  3186. netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
  3187. if (hw->bad_tx_carr_stats_fd &&
  3188. adapter->link_duplex == FULL_DUPLEX) {
  3189. netdev->stats.tx_carrier_errors = 0;
  3190. adapter->stats.tncrs = 0;
  3191. }
  3192. /* Tx Dropped needs to be maintained elsewhere */
  3193. /* Phy Stats */
  3194. if (hw->media_type == e1000_media_type_copper) {
  3195. if ((adapter->link_speed == SPEED_1000) &&
  3196. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  3197. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  3198. adapter->phy_stats.idle_errors += phy_tmp;
  3199. }
  3200. if ((hw->mac_type <= e1000_82546) &&
  3201. (hw->phy_type == e1000_phy_m88) &&
  3202. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  3203. adapter->phy_stats.receive_errors += phy_tmp;
  3204. }
  3205. /* Management Stats */
  3206. if (hw->has_smbus) {
  3207. adapter->stats.mgptc += er32(MGTPTC);
  3208. adapter->stats.mgprc += er32(MGTPRC);
  3209. adapter->stats.mgpdc += er32(MGTPDC);
  3210. }
  3211. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3212. }
  3213. /**
  3214. * e1000_intr - Interrupt Handler
  3215. * @irq: interrupt number
  3216. * @data: pointer to a network interface device structure
  3217. **/
  3218. static irqreturn_t e1000_intr(int irq, void *data)
  3219. {
  3220. struct net_device *netdev = data;
  3221. struct e1000_adapter *adapter = netdev_priv(netdev);
  3222. struct e1000_hw *hw = &adapter->hw;
  3223. u32 icr = er32(ICR);
  3224. if (unlikely((!icr)))
  3225. return IRQ_NONE; /* Not our interrupt */
  3226. /* we might have caused the interrupt, but the above
  3227. * read cleared it, and just in case the driver is
  3228. * down there is nothing to do so return handled
  3229. */
  3230. if (unlikely(test_bit(__E1000_DOWN, &adapter->flags)))
  3231. return IRQ_HANDLED;
  3232. if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  3233. hw->get_link_status = 1;
  3234. /* guard against interrupt when we're going down */
  3235. if (!test_bit(__E1000_DOWN, &adapter->flags))
  3236. schedule_delayed_work(&adapter->watchdog_task, 1);
  3237. }
  3238. /* disable interrupts, without the synchronize_irq bit */
  3239. ew32(IMC, ~0);
  3240. E1000_WRITE_FLUSH();
  3241. if (likely(napi_schedule_prep(&adapter->napi))) {
  3242. adapter->total_tx_bytes = 0;
  3243. adapter->total_tx_packets = 0;
  3244. adapter->total_rx_bytes = 0;
  3245. adapter->total_rx_packets = 0;
  3246. __napi_schedule(&adapter->napi);
  3247. } else {
  3248. /* this really should not happen! if it does it is basically a
  3249. * bug, but not a hard error, so enable ints and continue
  3250. */
  3251. if (!test_bit(__E1000_DOWN, &adapter->flags))
  3252. e1000_irq_enable(adapter);
  3253. }
  3254. return IRQ_HANDLED;
  3255. }
  3256. /**
  3257. * e1000_clean - NAPI Rx polling callback
  3258. * @adapter: board private structure
  3259. **/
  3260. static int e1000_clean(struct napi_struct *napi, int budget)
  3261. {
  3262. struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
  3263. napi);
  3264. int tx_clean_complete = 0, work_done = 0;
  3265. tx_clean_complete = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]);
  3266. adapter->clean_rx(adapter, &adapter->rx_ring[0], &work_done, budget);
  3267. if (!tx_clean_complete)
  3268. work_done = budget;
  3269. /* If budget not fully consumed, exit the polling mode */
  3270. if (work_done < budget) {
  3271. if (likely(adapter->itr_setting & 3))
  3272. e1000_set_itr(adapter);
  3273. napi_complete(napi);
  3274. if (!test_bit(__E1000_DOWN, &adapter->flags))
  3275. e1000_irq_enable(adapter);
  3276. }
  3277. return work_done;
  3278. }
  3279. /**
  3280. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  3281. * @adapter: board private structure
  3282. **/
  3283. static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
  3284. struct e1000_tx_ring *tx_ring)
  3285. {
  3286. struct e1000_hw *hw = &adapter->hw;
  3287. struct net_device *netdev = adapter->netdev;
  3288. struct e1000_tx_desc *tx_desc, *eop_desc;
  3289. struct e1000_buffer *buffer_info;
  3290. unsigned int i, eop;
  3291. unsigned int count = 0;
  3292. unsigned int total_tx_bytes=0, total_tx_packets=0;
  3293. unsigned int bytes_compl = 0, pkts_compl = 0;
  3294. i = tx_ring->next_to_clean;
  3295. eop = tx_ring->buffer_info[i].next_to_watch;
  3296. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  3297. while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
  3298. (count < tx_ring->count)) {
  3299. bool cleaned = false;
  3300. rmb(); /* read buffer_info after eop_desc */
  3301. for ( ; !cleaned; count++) {
  3302. tx_desc = E1000_TX_DESC(*tx_ring, i);
  3303. buffer_info = &tx_ring->buffer_info[i];
  3304. cleaned = (i == eop);
  3305. if (cleaned) {
  3306. total_tx_packets += buffer_info->segs;
  3307. total_tx_bytes += buffer_info->bytecount;
  3308. if (buffer_info->skb) {
  3309. bytes_compl += buffer_info->skb->len;
  3310. pkts_compl++;
  3311. }
  3312. }
  3313. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  3314. tx_desc->upper.data = 0;
  3315. if (unlikely(++i == tx_ring->count)) i = 0;
  3316. }
  3317. eop = tx_ring->buffer_info[i].next_to_watch;
  3318. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  3319. }
  3320. tx_ring->next_to_clean = i;
  3321. netdev_completed_queue(netdev, pkts_compl, bytes_compl);
  3322. #define TX_WAKE_THRESHOLD 32
  3323. if (unlikely(count && netif_carrier_ok(netdev) &&
  3324. E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
  3325. /* Make sure that anybody stopping the queue after this
  3326. * sees the new next_to_clean.
  3327. */
  3328. smp_mb();
  3329. if (netif_queue_stopped(netdev) &&
  3330. !(test_bit(__E1000_DOWN, &adapter->flags))) {
  3331. netif_wake_queue(netdev);
  3332. ++adapter->restart_queue;
  3333. }
  3334. }
  3335. if (adapter->detect_tx_hung) {
  3336. /* Detect a transmit hang in hardware, this serializes the
  3337. * check with the clearing of time_stamp and movement of i
  3338. */
  3339. adapter->detect_tx_hung = false;
  3340. if (tx_ring->buffer_info[eop].time_stamp &&
  3341. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  3342. (adapter->tx_timeout_factor * HZ)) &&
  3343. !(er32(STATUS) & E1000_STATUS_TXOFF)) {
  3344. /* detected Tx unit hang */
  3345. e_err(drv, "Detected Tx Unit Hang\n"
  3346. " Tx Queue <%lu>\n"
  3347. " TDH <%x>\n"
  3348. " TDT <%x>\n"
  3349. " next_to_use <%x>\n"
  3350. " next_to_clean <%x>\n"
  3351. "buffer_info[next_to_clean]\n"
  3352. " time_stamp <%lx>\n"
  3353. " next_to_watch <%x>\n"
  3354. " jiffies <%lx>\n"
  3355. " next_to_watch.status <%x>\n",
  3356. (unsigned long)((tx_ring - adapter->tx_ring) /
  3357. sizeof(struct e1000_tx_ring)),
  3358. readl(hw->hw_addr + tx_ring->tdh),
  3359. readl(hw->hw_addr + tx_ring->tdt),
  3360. tx_ring->next_to_use,
  3361. tx_ring->next_to_clean,
  3362. tx_ring->buffer_info[eop].time_stamp,
  3363. eop,
  3364. jiffies,
  3365. eop_desc->upper.fields.status);
  3366. e1000_dump(adapter);
  3367. netif_stop_queue(netdev);
  3368. }
  3369. }
  3370. adapter->total_tx_bytes += total_tx_bytes;
  3371. adapter->total_tx_packets += total_tx_packets;
  3372. netdev->stats.tx_bytes += total_tx_bytes;
  3373. netdev->stats.tx_packets += total_tx_packets;
  3374. return count < tx_ring->count;
  3375. }
  3376. /**
  3377. * e1000_rx_checksum - Receive Checksum Offload for 82543
  3378. * @adapter: board private structure
  3379. * @status_err: receive descriptor status and error fields
  3380. * @csum: receive descriptor csum field
  3381. * @sk_buff: socket buffer with received data
  3382. **/
  3383. static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
  3384. u32 csum, struct sk_buff *skb)
  3385. {
  3386. struct e1000_hw *hw = &adapter->hw;
  3387. u16 status = (u16)status_err;
  3388. u8 errors = (u8)(status_err >> 24);
  3389. skb_checksum_none_assert(skb);
  3390. /* 82543 or newer only */
  3391. if (unlikely(hw->mac_type < e1000_82543)) return;
  3392. /* Ignore Checksum bit is set */
  3393. if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
  3394. /* TCP/UDP checksum error bit is set */
  3395. if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
  3396. /* let the stack verify checksum errors */
  3397. adapter->hw_csum_err++;
  3398. return;
  3399. }
  3400. /* TCP/UDP Checksum has not been calculated */
  3401. if (!(status & E1000_RXD_STAT_TCPCS))
  3402. return;
  3403. /* It must be a TCP or UDP packet with a valid checksum */
  3404. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  3405. /* TCP checksum is good */
  3406. skb->ip_summed = CHECKSUM_UNNECESSARY;
  3407. }
  3408. adapter->hw_csum_good++;
  3409. }
  3410. /**
  3411. * e1000_consume_page - helper function
  3412. **/
  3413. static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
  3414. u16 length)
  3415. {
  3416. bi->page = NULL;
  3417. skb->len += length;
  3418. skb->data_len += length;
  3419. skb->truesize += PAGE_SIZE;
  3420. }
  3421. /**
  3422. * e1000_receive_skb - helper function to handle rx indications
  3423. * @adapter: board private structure
  3424. * @status: descriptor status field as written by hardware
  3425. * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
  3426. * @skb: pointer to sk_buff to be indicated to stack
  3427. */
  3428. static void e1000_receive_skb(struct e1000_adapter *adapter, u8 status,
  3429. __le16 vlan, struct sk_buff *skb)
  3430. {
  3431. skb->protocol = eth_type_trans(skb, adapter->netdev);
  3432. if (status & E1000_RXD_STAT_VP) {
  3433. u16 vid = le16_to_cpu(vlan) & E1000_RXD_SPC_VLAN_MASK;
  3434. __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
  3435. }
  3436. napi_gro_receive(&adapter->napi, skb);
  3437. }
  3438. /**
  3439. * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
  3440. * @adapter: board private structure
  3441. * @rx_ring: ring to clean
  3442. * @work_done: amount of napi work completed this call
  3443. * @work_to_do: max amount of work allowed for this call to do
  3444. *
  3445. * the return value indicates whether actual cleaning was done, there
  3446. * is no guarantee that everything was cleaned
  3447. */
  3448. static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
  3449. struct e1000_rx_ring *rx_ring,
  3450. int *work_done, int work_to_do)
  3451. {
  3452. struct e1000_hw *hw = &adapter->hw;
  3453. struct net_device *netdev = adapter->netdev;
  3454. struct pci_dev *pdev = adapter->pdev;
  3455. struct e1000_rx_desc *rx_desc, *next_rxd;
  3456. struct e1000_buffer *buffer_info, *next_buffer;
  3457. unsigned long irq_flags;
  3458. u32 length;
  3459. unsigned int i;
  3460. int cleaned_count = 0;
  3461. bool cleaned = false;
  3462. unsigned int total_rx_bytes=0, total_rx_packets=0;
  3463. i = rx_ring->next_to_clean;
  3464. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3465. buffer_info = &rx_ring->buffer_info[i];
  3466. while (rx_desc->status & E1000_RXD_STAT_DD) {
  3467. struct sk_buff *skb;
  3468. u8 status;
  3469. if (*work_done >= work_to_do)
  3470. break;
  3471. (*work_done)++;
  3472. rmb(); /* read descriptor and rx_buffer_info after status DD */
  3473. status = rx_desc->status;
  3474. skb = buffer_info->skb;
  3475. buffer_info->skb = NULL;
  3476. if (++i == rx_ring->count) i = 0;
  3477. next_rxd = E1000_RX_DESC(*rx_ring, i);
  3478. prefetch(next_rxd);
  3479. next_buffer = &rx_ring->buffer_info[i];
  3480. cleaned = true;
  3481. cleaned_count++;
  3482. dma_unmap_page(&pdev->dev, buffer_info->dma,
  3483. buffer_info->length, DMA_FROM_DEVICE);
  3484. buffer_info->dma = 0;
  3485. length = le16_to_cpu(rx_desc->length);
  3486. /* errors is only valid for DD + EOP descriptors */
  3487. if (unlikely((status & E1000_RXD_STAT_EOP) &&
  3488. (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
  3489. u8 *mapped;
  3490. u8 last_byte;
  3491. mapped = page_address(buffer_info->page);
  3492. last_byte = *(mapped + length - 1);
  3493. if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
  3494. last_byte)) {
  3495. spin_lock_irqsave(&adapter->stats_lock,
  3496. irq_flags);
  3497. e1000_tbi_adjust_stats(hw, &adapter->stats,
  3498. length, mapped);
  3499. spin_unlock_irqrestore(&adapter->stats_lock,
  3500. irq_flags);
  3501. length--;
  3502. } else {
  3503. if (netdev->features & NETIF_F_RXALL)
  3504. goto process_skb;
  3505. /* recycle both page and skb */
  3506. buffer_info->skb = skb;
  3507. /* an error means any chain goes out the window
  3508. * too
  3509. */
  3510. if (rx_ring->rx_skb_top)
  3511. dev_kfree_skb(rx_ring->rx_skb_top);
  3512. rx_ring->rx_skb_top = NULL;
  3513. goto next_desc;
  3514. }
  3515. }
  3516. #define rxtop rx_ring->rx_skb_top
  3517. process_skb:
  3518. if (!(status & E1000_RXD_STAT_EOP)) {
  3519. /* this descriptor is only the beginning (or middle) */
  3520. if (!rxtop) {
  3521. /* this is the beginning of a chain */
  3522. rxtop = skb;
  3523. skb_fill_page_desc(rxtop, 0, buffer_info->page,
  3524. 0, length);
  3525. } else {
  3526. /* this is the middle of a chain */
  3527. skb_fill_page_desc(rxtop,
  3528. skb_shinfo(rxtop)->nr_frags,
  3529. buffer_info->page, 0, length);
  3530. /* re-use the skb, only consumed the page */
  3531. buffer_info->skb = skb;
  3532. }
  3533. e1000_consume_page(buffer_info, rxtop, length);
  3534. goto next_desc;
  3535. } else {
  3536. if (rxtop) {
  3537. /* end of the chain */
  3538. skb_fill_page_desc(rxtop,
  3539. skb_shinfo(rxtop)->nr_frags,
  3540. buffer_info->page, 0, length);
  3541. /* re-use the current skb, we only consumed the
  3542. * page
  3543. */
  3544. buffer_info->skb = skb;
  3545. skb = rxtop;
  3546. rxtop = NULL;
  3547. e1000_consume_page(buffer_info, skb, length);
  3548. } else {
  3549. /* no chain, got EOP, this buf is the packet
  3550. * copybreak to save the put_page/alloc_page
  3551. */
  3552. if (length <= copybreak &&
  3553. skb_tailroom(skb) >= length) {
  3554. u8 *vaddr;
  3555. vaddr = kmap_atomic(buffer_info->page);
  3556. memcpy(skb_tail_pointer(skb), vaddr,
  3557. length);
  3558. kunmap_atomic(vaddr);
  3559. /* re-use the page, so don't erase
  3560. * buffer_info->page
  3561. */
  3562. skb_put(skb, length);
  3563. } else {
  3564. skb_fill_page_desc(skb, 0,
  3565. buffer_info->page, 0,
  3566. length);
  3567. e1000_consume_page(buffer_info, skb,
  3568. length);
  3569. }
  3570. }
  3571. }
  3572. /* Receive Checksum Offload XXX recompute due to CRC strip? */
  3573. e1000_rx_checksum(adapter,
  3574. (u32)(status) |
  3575. ((u32)(rx_desc->errors) << 24),
  3576. le16_to_cpu(rx_desc->csum), skb);
  3577. total_rx_bytes += (skb->len - 4); /* don't count FCS */
  3578. if (likely(!(netdev->features & NETIF_F_RXFCS)))
  3579. pskb_trim(skb, skb->len - 4);
  3580. total_rx_packets++;
  3581. /* eth type trans needs skb->data to point to something */
  3582. if (!pskb_may_pull(skb, ETH_HLEN)) {
  3583. e_err(drv, "pskb_may_pull failed.\n");
  3584. dev_kfree_skb(skb);
  3585. goto next_desc;
  3586. }
  3587. e1000_receive_skb(adapter, status, rx_desc->special, skb);
  3588. next_desc:
  3589. rx_desc->status = 0;
  3590. /* return some buffers to hardware, one at a time is too slow */
  3591. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3592. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3593. cleaned_count = 0;
  3594. }
  3595. /* use prefetched values */
  3596. rx_desc = next_rxd;
  3597. buffer_info = next_buffer;
  3598. }
  3599. rx_ring->next_to_clean = i;
  3600. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3601. if (cleaned_count)
  3602. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3603. adapter->total_rx_packets += total_rx_packets;
  3604. adapter->total_rx_bytes += total_rx_bytes;
  3605. netdev->stats.rx_bytes += total_rx_bytes;
  3606. netdev->stats.rx_packets += total_rx_packets;
  3607. return cleaned;
  3608. }
  3609. /* this should improve performance for small packets with large amounts
  3610. * of reassembly being done in the stack
  3611. */
  3612. static void e1000_check_copybreak(struct net_device *netdev,
  3613. struct e1000_buffer *buffer_info,
  3614. u32 length, struct sk_buff **skb)
  3615. {
  3616. struct sk_buff *new_skb;
  3617. if (length > copybreak)
  3618. return;
  3619. new_skb = netdev_alloc_skb_ip_align(netdev, length);
  3620. if (!new_skb)
  3621. return;
  3622. skb_copy_to_linear_data_offset(new_skb, -NET_IP_ALIGN,
  3623. (*skb)->data - NET_IP_ALIGN,
  3624. length + NET_IP_ALIGN);
  3625. /* save the skb in buffer_info as good */
  3626. buffer_info->skb = *skb;
  3627. *skb = new_skb;
  3628. }
  3629. /**
  3630. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  3631. * @adapter: board private structure
  3632. * @rx_ring: ring to clean
  3633. * @work_done: amount of napi work completed this call
  3634. * @work_to_do: max amount of work allowed for this call to do
  3635. */
  3636. static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3637. struct e1000_rx_ring *rx_ring,
  3638. int *work_done, int work_to_do)
  3639. {
  3640. struct e1000_hw *hw = &adapter->hw;
  3641. struct net_device *netdev = adapter->netdev;
  3642. struct pci_dev *pdev = adapter->pdev;
  3643. struct e1000_rx_desc *rx_desc, *next_rxd;
  3644. struct e1000_buffer *buffer_info, *next_buffer;
  3645. unsigned long flags;
  3646. u32 length;
  3647. unsigned int i;
  3648. int cleaned_count = 0;
  3649. bool cleaned = false;
  3650. unsigned int total_rx_bytes=0, total_rx_packets=0;
  3651. i = rx_ring->next_to_clean;
  3652. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3653. buffer_info = &rx_ring->buffer_info[i];
  3654. while (rx_desc->status & E1000_RXD_STAT_DD) {
  3655. struct sk_buff *skb;
  3656. u8 status;
  3657. if (*work_done >= work_to_do)
  3658. break;
  3659. (*work_done)++;
  3660. rmb(); /* read descriptor and rx_buffer_info after status DD */
  3661. status = rx_desc->status;
  3662. skb = buffer_info->skb;
  3663. buffer_info->skb = NULL;
  3664. prefetch(skb->data - NET_IP_ALIGN);
  3665. if (++i == rx_ring->count) i = 0;
  3666. next_rxd = E1000_RX_DESC(*rx_ring, i);
  3667. prefetch(next_rxd);
  3668. next_buffer = &rx_ring->buffer_info[i];
  3669. cleaned = true;
  3670. cleaned_count++;
  3671. dma_unmap_single(&pdev->dev, buffer_info->dma,
  3672. buffer_info->length, DMA_FROM_DEVICE);
  3673. buffer_info->dma = 0;
  3674. length = le16_to_cpu(rx_desc->length);
  3675. /* !EOP means multiple descriptors were used to store a single
  3676. * packet, if thats the case we need to toss it. In fact, we
  3677. * to toss every packet with the EOP bit clear and the next
  3678. * frame that _does_ have the EOP bit set, as it is by
  3679. * definition only a frame fragment
  3680. */
  3681. if (unlikely(!(status & E1000_RXD_STAT_EOP)))
  3682. adapter->discarding = true;
  3683. if (adapter->discarding) {
  3684. /* All receives must fit into a single buffer */
  3685. e_dbg("Receive packet consumed multiple buffers\n");
  3686. /* recycle */
  3687. buffer_info->skb = skb;
  3688. if (status & E1000_RXD_STAT_EOP)
  3689. adapter->discarding = false;
  3690. goto next_desc;
  3691. }
  3692. if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3693. u8 last_byte = *(skb->data + length - 1);
  3694. if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
  3695. last_byte)) {
  3696. spin_lock_irqsave(&adapter->stats_lock, flags);
  3697. e1000_tbi_adjust_stats(hw, &adapter->stats,
  3698. length, skb->data);
  3699. spin_unlock_irqrestore(&adapter->stats_lock,
  3700. flags);
  3701. length--;
  3702. } else {
  3703. if (netdev->features & NETIF_F_RXALL)
  3704. goto process_skb;
  3705. /* recycle */
  3706. buffer_info->skb = skb;
  3707. goto next_desc;
  3708. }
  3709. }
  3710. process_skb:
  3711. total_rx_bytes += (length - 4); /* don't count FCS */
  3712. total_rx_packets++;
  3713. if (likely(!(netdev->features & NETIF_F_RXFCS)))
  3714. /* adjust length to remove Ethernet CRC, this must be
  3715. * done after the TBI_ACCEPT workaround above
  3716. */
  3717. length -= 4;
  3718. e1000_check_copybreak(netdev, buffer_info, length, &skb);
  3719. skb_put(skb, length);
  3720. /* Receive Checksum Offload */
  3721. e1000_rx_checksum(adapter,
  3722. (u32)(status) |
  3723. ((u32)(rx_desc->errors) << 24),
  3724. le16_to_cpu(rx_desc->csum), skb);
  3725. e1000_receive_skb(adapter, status, rx_desc->special, skb);
  3726. next_desc:
  3727. rx_desc->status = 0;
  3728. /* return some buffers to hardware, one at a time is too slow */
  3729. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3730. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3731. cleaned_count = 0;
  3732. }
  3733. /* use prefetched values */
  3734. rx_desc = next_rxd;
  3735. buffer_info = next_buffer;
  3736. }
  3737. rx_ring->next_to_clean = i;
  3738. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3739. if (cleaned_count)
  3740. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3741. adapter->total_rx_packets += total_rx_packets;
  3742. adapter->total_rx_bytes += total_rx_bytes;
  3743. netdev->stats.rx_bytes += total_rx_bytes;
  3744. netdev->stats.rx_packets += total_rx_packets;
  3745. return cleaned;
  3746. }
  3747. /**
  3748. * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
  3749. * @adapter: address of board private structure
  3750. * @rx_ring: pointer to receive ring structure
  3751. * @cleaned_count: number of buffers to allocate this pass
  3752. **/
  3753. static void
  3754. e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
  3755. struct e1000_rx_ring *rx_ring, int cleaned_count)
  3756. {
  3757. struct net_device *netdev = adapter->netdev;
  3758. struct pci_dev *pdev = adapter->pdev;
  3759. struct e1000_rx_desc *rx_desc;
  3760. struct e1000_buffer *buffer_info;
  3761. struct sk_buff *skb;
  3762. unsigned int i;
  3763. unsigned int bufsz = 256 - 16 /*for skb_reserve */ ;
  3764. i = rx_ring->next_to_use;
  3765. buffer_info = &rx_ring->buffer_info[i];
  3766. while (cleaned_count--) {
  3767. skb = buffer_info->skb;
  3768. if (skb) {
  3769. skb_trim(skb, 0);
  3770. goto check_page;
  3771. }
  3772. skb = netdev_alloc_skb_ip_align(netdev, bufsz);
  3773. if (unlikely(!skb)) {
  3774. /* Better luck next round */
  3775. adapter->alloc_rx_buff_failed++;
  3776. break;
  3777. }
  3778. buffer_info->skb = skb;
  3779. buffer_info->length = adapter->rx_buffer_len;
  3780. check_page:
  3781. /* allocate a new page if necessary */
  3782. if (!buffer_info->page) {
  3783. buffer_info->page = alloc_page(GFP_ATOMIC);
  3784. if (unlikely(!buffer_info->page)) {
  3785. adapter->alloc_rx_buff_failed++;
  3786. break;
  3787. }
  3788. }
  3789. if (!buffer_info->dma) {
  3790. buffer_info->dma = dma_map_page(&pdev->dev,
  3791. buffer_info->page, 0,
  3792. buffer_info->length,
  3793. DMA_FROM_DEVICE);
  3794. if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
  3795. put_page(buffer_info->page);
  3796. dev_kfree_skb(skb);
  3797. buffer_info->page = NULL;
  3798. buffer_info->skb = NULL;
  3799. buffer_info->dma = 0;
  3800. adapter->alloc_rx_buff_failed++;
  3801. break; /* while !buffer_info->skb */
  3802. }
  3803. }
  3804. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3805. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3806. if (unlikely(++i == rx_ring->count))
  3807. i = 0;
  3808. buffer_info = &rx_ring->buffer_info[i];
  3809. }
  3810. if (likely(rx_ring->next_to_use != i)) {
  3811. rx_ring->next_to_use = i;
  3812. if (unlikely(i-- == 0))
  3813. i = (rx_ring->count - 1);
  3814. /* Force memory writes to complete before letting h/w
  3815. * know there are new descriptors to fetch. (Only
  3816. * applicable for weak-ordered memory model archs,
  3817. * such as IA-64).
  3818. */
  3819. wmb();
  3820. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3821. }
  3822. }
  3823. /**
  3824. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3825. * @adapter: address of board private structure
  3826. **/
  3827. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3828. struct e1000_rx_ring *rx_ring,
  3829. int cleaned_count)
  3830. {
  3831. struct e1000_hw *hw = &adapter->hw;
  3832. struct net_device *netdev = adapter->netdev;
  3833. struct pci_dev *pdev = adapter->pdev;
  3834. struct e1000_rx_desc *rx_desc;
  3835. struct e1000_buffer *buffer_info;
  3836. struct sk_buff *skb;
  3837. unsigned int i;
  3838. unsigned int bufsz = adapter->rx_buffer_len;
  3839. i = rx_ring->next_to_use;
  3840. buffer_info = &rx_ring->buffer_info[i];
  3841. while (cleaned_count--) {
  3842. skb = buffer_info->skb;
  3843. if (skb) {
  3844. skb_trim(skb, 0);
  3845. goto map_skb;
  3846. }
  3847. skb = netdev_alloc_skb_ip_align(netdev, bufsz);
  3848. if (unlikely(!skb)) {
  3849. /* Better luck next round */
  3850. adapter->alloc_rx_buff_failed++;
  3851. break;
  3852. }
  3853. /* Fix for errata 23, can't cross 64kB boundary */
  3854. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3855. struct sk_buff *oldskb = skb;
  3856. e_err(rx_err, "skb align check failed: %u bytes at "
  3857. "%p\n", bufsz, skb->data);
  3858. /* Try again, without freeing the previous */
  3859. skb = netdev_alloc_skb_ip_align(netdev, bufsz);
  3860. /* Failed allocation, critical failure */
  3861. if (!skb) {
  3862. dev_kfree_skb(oldskb);
  3863. adapter->alloc_rx_buff_failed++;
  3864. break;
  3865. }
  3866. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3867. /* give up */
  3868. dev_kfree_skb(skb);
  3869. dev_kfree_skb(oldskb);
  3870. adapter->alloc_rx_buff_failed++;
  3871. break; /* while !buffer_info->skb */
  3872. }
  3873. /* Use new allocation */
  3874. dev_kfree_skb(oldskb);
  3875. }
  3876. buffer_info->skb = skb;
  3877. buffer_info->length = adapter->rx_buffer_len;
  3878. map_skb:
  3879. buffer_info->dma = dma_map_single(&pdev->dev,
  3880. skb->data,
  3881. buffer_info->length,
  3882. DMA_FROM_DEVICE);
  3883. if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
  3884. dev_kfree_skb(skb);
  3885. buffer_info->skb = NULL;
  3886. buffer_info->dma = 0;
  3887. adapter->alloc_rx_buff_failed++;
  3888. break; /* while !buffer_info->skb */
  3889. }
  3890. /* XXX if it was allocated cleanly it will never map to a
  3891. * boundary crossing
  3892. */
  3893. /* Fix for errata 23, can't cross 64kB boundary */
  3894. if (!e1000_check_64k_bound(adapter,
  3895. (void *)(unsigned long)buffer_info->dma,
  3896. adapter->rx_buffer_len)) {
  3897. e_err(rx_err, "dma align check failed: %u bytes at "
  3898. "%p\n", adapter->rx_buffer_len,
  3899. (void *)(unsigned long)buffer_info->dma);
  3900. dev_kfree_skb(skb);
  3901. buffer_info->skb = NULL;
  3902. dma_unmap_single(&pdev->dev, buffer_info->dma,
  3903. adapter->rx_buffer_len,
  3904. DMA_FROM_DEVICE);
  3905. buffer_info->dma = 0;
  3906. adapter->alloc_rx_buff_failed++;
  3907. break; /* while !buffer_info->skb */
  3908. }
  3909. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3910. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3911. if (unlikely(++i == rx_ring->count))
  3912. i = 0;
  3913. buffer_info = &rx_ring->buffer_info[i];
  3914. }
  3915. if (likely(rx_ring->next_to_use != i)) {
  3916. rx_ring->next_to_use = i;
  3917. if (unlikely(i-- == 0))
  3918. i = (rx_ring->count - 1);
  3919. /* Force memory writes to complete before letting h/w
  3920. * know there are new descriptors to fetch. (Only
  3921. * applicable for weak-ordered memory model archs,
  3922. * such as IA-64).
  3923. */
  3924. wmb();
  3925. writel(i, hw->hw_addr + rx_ring->rdt);
  3926. }
  3927. }
  3928. /**
  3929. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3930. * @adapter:
  3931. **/
  3932. static void e1000_smartspeed(struct e1000_adapter *adapter)
  3933. {
  3934. struct e1000_hw *hw = &adapter->hw;
  3935. u16 phy_status;
  3936. u16 phy_ctrl;
  3937. if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
  3938. !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
  3939. return;
  3940. if (adapter->smartspeed == 0) {
  3941. /* If Master/Slave config fault is asserted twice,
  3942. * we assume back-to-back
  3943. */
  3944. e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
  3945. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3946. e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
  3947. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3948. e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
  3949. if (phy_ctrl & CR_1000T_MS_ENABLE) {
  3950. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3951. e1000_write_phy_reg(hw, PHY_1000T_CTRL,
  3952. phy_ctrl);
  3953. adapter->smartspeed++;
  3954. if (!e1000_phy_setup_autoneg(hw) &&
  3955. !e1000_read_phy_reg(hw, PHY_CTRL,
  3956. &phy_ctrl)) {
  3957. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3958. MII_CR_RESTART_AUTO_NEG);
  3959. e1000_write_phy_reg(hw, PHY_CTRL,
  3960. phy_ctrl);
  3961. }
  3962. }
  3963. return;
  3964. } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3965. /* If still no link, perhaps using 2/3 pair cable */
  3966. e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
  3967. phy_ctrl |= CR_1000T_MS_ENABLE;
  3968. e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
  3969. if (!e1000_phy_setup_autoneg(hw) &&
  3970. !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
  3971. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3972. MII_CR_RESTART_AUTO_NEG);
  3973. e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
  3974. }
  3975. }
  3976. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3977. if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3978. adapter->smartspeed = 0;
  3979. }
  3980. /**
  3981. * e1000_ioctl -
  3982. * @netdev:
  3983. * @ifreq:
  3984. * @cmd:
  3985. **/
  3986. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3987. {
  3988. switch (cmd) {
  3989. case SIOCGMIIPHY:
  3990. case SIOCGMIIREG:
  3991. case SIOCSMIIREG:
  3992. return e1000_mii_ioctl(netdev, ifr, cmd);
  3993. default:
  3994. return -EOPNOTSUPP;
  3995. }
  3996. }
  3997. /**
  3998. * e1000_mii_ioctl -
  3999. * @netdev:
  4000. * @ifreq:
  4001. * @cmd:
  4002. **/
  4003. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  4004. int cmd)
  4005. {
  4006. struct e1000_adapter *adapter = netdev_priv(netdev);
  4007. struct e1000_hw *hw = &adapter->hw;
  4008. struct mii_ioctl_data *data = if_mii(ifr);
  4009. int retval;
  4010. u16 mii_reg;
  4011. unsigned long flags;
  4012. if (hw->media_type != e1000_media_type_copper)
  4013. return -EOPNOTSUPP;
  4014. switch (cmd) {
  4015. case SIOCGMIIPHY:
  4016. data->phy_id = hw->phy_addr;
  4017. break;
  4018. case SIOCGMIIREG:
  4019. spin_lock_irqsave(&adapter->stats_lock, flags);
  4020. if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
  4021. &data->val_out)) {
  4022. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  4023. return -EIO;
  4024. }
  4025. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  4026. break;
  4027. case SIOCSMIIREG:
  4028. if (data->reg_num & ~(0x1F))
  4029. return -EFAULT;
  4030. mii_reg = data->val_in;
  4031. spin_lock_irqsave(&adapter->stats_lock, flags);
  4032. if (e1000_write_phy_reg(hw, data->reg_num,
  4033. mii_reg)) {
  4034. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  4035. return -EIO;
  4036. }
  4037. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  4038. if (hw->media_type == e1000_media_type_copper) {
  4039. switch (data->reg_num) {
  4040. case PHY_CTRL:
  4041. if (mii_reg & MII_CR_POWER_DOWN)
  4042. break;
  4043. if (mii_reg & MII_CR_AUTO_NEG_EN) {
  4044. hw->autoneg = 1;
  4045. hw->autoneg_advertised = 0x2F;
  4046. } else {
  4047. u32 speed;
  4048. if (mii_reg & 0x40)
  4049. speed = SPEED_1000;
  4050. else if (mii_reg & 0x2000)
  4051. speed = SPEED_100;
  4052. else
  4053. speed = SPEED_10;
  4054. retval = e1000_set_spd_dplx(
  4055. adapter, speed,
  4056. ((mii_reg & 0x100)
  4057. ? DUPLEX_FULL :
  4058. DUPLEX_HALF));
  4059. if (retval)
  4060. return retval;
  4061. }
  4062. if (netif_running(adapter->netdev))
  4063. e1000_reinit_locked(adapter);
  4064. else
  4065. e1000_reset(adapter);
  4066. break;
  4067. case M88E1000_PHY_SPEC_CTRL:
  4068. case M88E1000_EXT_PHY_SPEC_CTRL:
  4069. if (e1000_phy_reset(hw))
  4070. return -EIO;
  4071. break;
  4072. }
  4073. } else {
  4074. switch (data->reg_num) {
  4075. case PHY_CTRL:
  4076. if (mii_reg & MII_CR_POWER_DOWN)
  4077. break;
  4078. if (netif_running(adapter->netdev))
  4079. e1000_reinit_locked(adapter);
  4080. else
  4081. e1000_reset(adapter);
  4082. break;
  4083. }
  4084. }
  4085. break;
  4086. default:
  4087. return -EOPNOTSUPP;
  4088. }
  4089. return E1000_SUCCESS;
  4090. }
  4091. void e1000_pci_set_mwi(struct e1000_hw *hw)
  4092. {
  4093. struct e1000_adapter *adapter = hw->back;
  4094. int ret_val = pci_set_mwi(adapter->pdev);
  4095. if (ret_val)
  4096. e_err(probe, "Error in setting MWI\n");
  4097. }
  4098. void e1000_pci_clear_mwi(struct e1000_hw *hw)
  4099. {
  4100. struct e1000_adapter *adapter = hw->back;
  4101. pci_clear_mwi(adapter->pdev);
  4102. }
  4103. int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
  4104. {
  4105. struct e1000_adapter *adapter = hw->back;
  4106. return pcix_get_mmrbc(adapter->pdev);
  4107. }
  4108. void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
  4109. {
  4110. struct e1000_adapter *adapter = hw->back;
  4111. pcix_set_mmrbc(adapter->pdev, mmrbc);
  4112. }
  4113. void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
  4114. {
  4115. outl(value, port);
  4116. }
  4117. static bool e1000_vlan_used(struct e1000_adapter *adapter)
  4118. {
  4119. u16 vid;
  4120. for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
  4121. return true;
  4122. return false;
  4123. }
  4124. static void __e1000_vlan_mode(struct e1000_adapter *adapter,
  4125. netdev_features_t features)
  4126. {
  4127. struct e1000_hw *hw = &adapter->hw;
  4128. u32 ctrl;
  4129. ctrl = er32(CTRL);
  4130. if (features & NETIF_F_HW_VLAN_CTAG_RX) {
  4131. /* enable VLAN tag insert/strip */
  4132. ctrl |= E1000_CTRL_VME;
  4133. } else {
  4134. /* disable VLAN tag insert/strip */
  4135. ctrl &= ~E1000_CTRL_VME;
  4136. }
  4137. ew32(CTRL, ctrl);
  4138. }
  4139. static void e1000_vlan_filter_on_off(struct e1000_adapter *adapter,
  4140. bool filter_on)
  4141. {
  4142. struct e1000_hw *hw = &adapter->hw;
  4143. u32 rctl;
  4144. if (!test_bit(__E1000_DOWN, &adapter->flags))
  4145. e1000_irq_disable(adapter);
  4146. __e1000_vlan_mode(adapter, adapter->netdev->features);
  4147. if (filter_on) {
  4148. /* enable VLAN receive filtering */
  4149. rctl = er32(RCTL);
  4150. rctl &= ~E1000_RCTL_CFIEN;
  4151. if (!(adapter->netdev->flags & IFF_PROMISC))
  4152. rctl |= E1000_RCTL_VFE;
  4153. ew32(RCTL, rctl);
  4154. e1000_update_mng_vlan(adapter);
  4155. } else {
  4156. /* disable VLAN receive filtering */
  4157. rctl = er32(RCTL);
  4158. rctl &= ~E1000_RCTL_VFE;
  4159. ew32(RCTL, rctl);
  4160. }
  4161. if (!test_bit(__E1000_DOWN, &adapter->flags))
  4162. e1000_irq_enable(adapter);
  4163. }
  4164. static void e1000_vlan_mode(struct net_device *netdev,
  4165. netdev_features_t features)
  4166. {
  4167. struct e1000_adapter *adapter = netdev_priv(netdev);
  4168. if (!test_bit(__E1000_DOWN, &adapter->flags))
  4169. e1000_irq_disable(adapter);
  4170. __e1000_vlan_mode(adapter, features);
  4171. if (!test_bit(__E1000_DOWN, &adapter->flags))
  4172. e1000_irq_enable(adapter);
  4173. }
  4174. static int e1000_vlan_rx_add_vid(struct net_device *netdev,
  4175. __be16 proto, u16 vid)
  4176. {
  4177. struct e1000_adapter *adapter = netdev_priv(netdev);
  4178. struct e1000_hw *hw = &adapter->hw;
  4179. u32 vfta, index;
  4180. if ((hw->mng_cookie.status &
  4181. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  4182. (vid == adapter->mng_vlan_id))
  4183. return 0;
  4184. if (!e1000_vlan_used(adapter))
  4185. e1000_vlan_filter_on_off(adapter, true);
  4186. /* add VID to filter table */
  4187. index = (vid >> 5) & 0x7F;
  4188. vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
  4189. vfta |= (1 << (vid & 0x1F));
  4190. e1000_write_vfta(hw, index, vfta);
  4191. set_bit(vid, adapter->active_vlans);
  4192. return 0;
  4193. }
  4194. static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
  4195. __be16 proto, u16 vid)
  4196. {
  4197. struct e1000_adapter *adapter = netdev_priv(netdev);
  4198. struct e1000_hw *hw = &adapter->hw;
  4199. u32 vfta, index;
  4200. if (!test_bit(__E1000_DOWN, &adapter->flags))
  4201. e1000_irq_disable(adapter);
  4202. if (!test_bit(__E1000_DOWN, &adapter->flags))
  4203. e1000_irq_enable(adapter);
  4204. /* remove VID from filter table */
  4205. index = (vid >> 5) & 0x7F;
  4206. vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
  4207. vfta &= ~(1 << (vid & 0x1F));
  4208. e1000_write_vfta(hw, index, vfta);
  4209. clear_bit(vid, adapter->active_vlans);
  4210. if (!e1000_vlan_used(adapter))
  4211. e1000_vlan_filter_on_off(adapter, false);
  4212. return 0;
  4213. }
  4214. static void e1000_restore_vlan(struct e1000_adapter *adapter)
  4215. {
  4216. u16 vid;
  4217. if (!e1000_vlan_used(adapter))
  4218. return;
  4219. e1000_vlan_filter_on_off(adapter, true);
  4220. for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
  4221. e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
  4222. }
  4223. int e1000_set_spd_dplx(struct e1000_adapter *adapter, u32 spd, u8 dplx)
  4224. {
  4225. struct e1000_hw *hw = &adapter->hw;
  4226. hw->autoneg = 0;
  4227. /* Make sure dplx is at most 1 bit and lsb of speed is not set
  4228. * for the switch() below to work
  4229. */
  4230. if ((spd & 1) || (dplx & ~1))
  4231. goto err_inval;
  4232. /* Fiber NICs only allow 1000 gbps Full duplex */
  4233. if ((hw->media_type == e1000_media_type_fiber) &&
  4234. spd != SPEED_1000 &&
  4235. dplx != DUPLEX_FULL)
  4236. goto err_inval;
  4237. switch (spd + dplx) {
  4238. case SPEED_10 + DUPLEX_HALF:
  4239. hw->forced_speed_duplex = e1000_10_half;
  4240. break;
  4241. case SPEED_10 + DUPLEX_FULL:
  4242. hw->forced_speed_duplex = e1000_10_full;
  4243. break;
  4244. case SPEED_100 + DUPLEX_HALF:
  4245. hw->forced_speed_duplex = e1000_100_half;
  4246. break;
  4247. case SPEED_100 + DUPLEX_FULL:
  4248. hw->forced_speed_duplex = e1000_100_full;
  4249. break;
  4250. case SPEED_1000 + DUPLEX_FULL:
  4251. hw->autoneg = 1;
  4252. hw->autoneg_advertised = ADVERTISE_1000_FULL;
  4253. break;
  4254. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  4255. default:
  4256. goto err_inval;
  4257. }
  4258. /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
  4259. hw->mdix = AUTO_ALL_MODES;
  4260. return 0;
  4261. err_inval:
  4262. e_err(probe, "Unsupported Speed/Duplex configuration\n");
  4263. return -EINVAL;
  4264. }
  4265. static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
  4266. {
  4267. struct net_device *netdev = pci_get_drvdata(pdev);
  4268. struct e1000_adapter *adapter = netdev_priv(netdev);
  4269. struct e1000_hw *hw = &adapter->hw;
  4270. u32 ctrl, ctrl_ext, rctl, status;
  4271. u32 wufc = adapter->wol;
  4272. #ifdef CONFIG_PM
  4273. int retval = 0;
  4274. #endif
  4275. netif_device_detach(netdev);
  4276. if (netif_running(netdev)) {
  4277. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  4278. e1000_down(adapter);
  4279. }
  4280. #ifdef CONFIG_PM
  4281. retval = pci_save_state(pdev);
  4282. if (retval)
  4283. return retval;
  4284. #endif
  4285. status = er32(STATUS);
  4286. if (status & E1000_STATUS_LU)
  4287. wufc &= ~E1000_WUFC_LNKC;
  4288. if (wufc) {
  4289. e1000_setup_rctl(adapter);
  4290. e1000_set_rx_mode(netdev);
  4291. rctl = er32(RCTL);
  4292. /* turn on all-multi mode if wake on multicast is enabled */
  4293. if (wufc & E1000_WUFC_MC)
  4294. rctl |= E1000_RCTL_MPE;
  4295. /* enable receives in the hardware */
  4296. ew32(RCTL, rctl | E1000_RCTL_EN);
  4297. if (hw->mac_type >= e1000_82540) {
  4298. ctrl = er32(CTRL);
  4299. /* advertise wake from D3Cold */
  4300. #define E1000_CTRL_ADVD3WUC 0x00100000
  4301. /* phy power management enable */
  4302. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  4303. ctrl |= E1000_CTRL_ADVD3WUC |
  4304. E1000_CTRL_EN_PHY_PWR_MGMT;
  4305. ew32(CTRL, ctrl);
  4306. }
  4307. if (hw->media_type == e1000_media_type_fiber ||
  4308. hw->media_type == e1000_media_type_internal_serdes) {
  4309. /* keep the laser running in D3 */
  4310. ctrl_ext = er32(CTRL_EXT);
  4311. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  4312. ew32(CTRL_EXT, ctrl_ext);
  4313. }
  4314. ew32(WUC, E1000_WUC_PME_EN);
  4315. ew32(WUFC, wufc);
  4316. } else {
  4317. ew32(WUC, 0);
  4318. ew32(WUFC, 0);
  4319. }
  4320. e1000_release_manageability(adapter);
  4321. *enable_wake = !!wufc;
  4322. /* make sure adapter isn't asleep if manageability is enabled */
  4323. if (adapter->en_mng_pt)
  4324. *enable_wake = true;
  4325. if (netif_running(netdev))
  4326. e1000_free_irq(adapter);
  4327. pci_disable_device(pdev);
  4328. return 0;
  4329. }
  4330. #ifdef CONFIG_PM
  4331. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  4332. {
  4333. int retval;
  4334. bool wake;
  4335. retval = __e1000_shutdown(pdev, &wake);
  4336. if (retval)
  4337. return retval;
  4338. if (wake) {
  4339. pci_prepare_to_sleep(pdev);
  4340. } else {
  4341. pci_wake_from_d3(pdev, false);
  4342. pci_set_power_state(pdev, PCI_D3hot);
  4343. }
  4344. return 0;
  4345. }
  4346. static int e1000_resume(struct pci_dev *pdev)
  4347. {
  4348. struct net_device *netdev = pci_get_drvdata(pdev);
  4349. struct e1000_adapter *adapter = netdev_priv(netdev);
  4350. struct e1000_hw *hw = &adapter->hw;
  4351. u32 err;
  4352. pci_set_power_state(pdev, PCI_D0);
  4353. pci_restore_state(pdev);
  4354. pci_save_state(pdev);
  4355. if (adapter->need_ioport)
  4356. err = pci_enable_device(pdev);
  4357. else
  4358. err = pci_enable_device_mem(pdev);
  4359. if (err) {
  4360. pr_err("Cannot enable PCI device from suspend\n");
  4361. return err;
  4362. }
  4363. pci_set_master(pdev);
  4364. pci_enable_wake(pdev, PCI_D3hot, 0);
  4365. pci_enable_wake(pdev, PCI_D3cold, 0);
  4366. if (netif_running(netdev)) {
  4367. err = e1000_request_irq(adapter);
  4368. if (err)
  4369. return err;
  4370. }
  4371. e1000_power_up_phy(adapter);
  4372. e1000_reset(adapter);
  4373. ew32(WUS, ~0);
  4374. e1000_init_manageability(adapter);
  4375. if (netif_running(netdev))
  4376. e1000_up(adapter);
  4377. netif_device_attach(netdev);
  4378. return 0;
  4379. }
  4380. #endif
  4381. static void e1000_shutdown(struct pci_dev *pdev)
  4382. {
  4383. bool wake;
  4384. __e1000_shutdown(pdev, &wake);
  4385. if (system_state == SYSTEM_POWER_OFF) {
  4386. pci_wake_from_d3(pdev, wake);
  4387. pci_set_power_state(pdev, PCI_D3hot);
  4388. }
  4389. }
  4390. #ifdef CONFIG_NET_POLL_CONTROLLER
  4391. /* Polling 'interrupt' - used by things like netconsole to send skbs
  4392. * without having to re-enable interrupts. It's not called while
  4393. * the interrupt routine is executing.
  4394. */
  4395. static void e1000_netpoll(struct net_device *netdev)
  4396. {
  4397. struct e1000_adapter *adapter = netdev_priv(netdev);
  4398. disable_irq(adapter->pdev->irq);
  4399. e1000_intr(adapter->pdev->irq, netdev);
  4400. enable_irq(adapter->pdev->irq);
  4401. }
  4402. #endif
  4403. /**
  4404. * e1000_io_error_detected - called when PCI error is detected
  4405. * @pdev: Pointer to PCI device
  4406. * @state: The current pci connection state
  4407. *
  4408. * This function is called after a PCI bus error affecting
  4409. * this device has been detected.
  4410. */
  4411. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
  4412. pci_channel_state_t state)
  4413. {
  4414. struct net_device *netdev = pci_get_drvdata(pdev);
  4415. struct e1000_adapter *adapter = netdev_priv(netdev);
  4416. netif_device_detach(netdev);
  4417. if (state == pci_channel_io_perm_failure)
  4418. return PCI_ERS_RESULT_DISCONNECT;
  4419. if (netif_running(netdev))
  4420. e1000_down(adapter);
  4421. pci_disable_device(pdev);
  4422. /* Request a slot slot reset. */
  4423. return PCI_ERS_RESULT_NEED_RESET;
  4424. }
  4425. /**
  4426. * e1000_io_slot_reset - called after the pci bus has been reset.
  4427. * @pdev: Pointer to PCI device
  4428. *
  4429. * Restart the card from scratch, as if from a cold-boot. Implementation
  4430. * resembles the first-half of the e1000_resume routine.
  4431. */
  4432. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
  4433. {
  4434. struct net_device *netdev = pci_get_drvdata(pdev);
  4435. struct e1000_adapter *adapter = netdev_priv(netdev);
  4436. struct e1000_hw *hw = &adapter->hw;
  4437. int err;
  4438. if (adapter->need_ioport)
  4439. err = pci_enable_device(pdev);
  4440. else
  4441. err = pci_enable_device_mem(pdev);
  4442. if (err) {
  4443. pr_err("Cannot re-enable PCI device after reset.\n");
  4444. return PCI_ERS_RESULT_DISCONNECT;
  4445. }
  4446. pci_set_master(pdev);
  4447. pci_enable_wake(pdev, PCI_D3hot, 0);
  4448. pci_enable_wake(pdev, PCI_D3cold, 0);
  4449. e1000_reset(adapter);
  4450. ew32(WUS, ~0);
  4451. return PCI_ERS_RESULT_RECOVERED;
  4452. }
  4453. /**
  4454. * e1000_io_resume - called when traffic can start flowing again.
  4455. * @pdev: Pointer to PCI device
  4456. *
  4457. * This callback is called when the error recovery driver tells us that
  4458. * its OK to resume normal operation. Implementation resembles the
  4459. * second-half of the e1000_resume routine.
  4460. */
  4461. static void e1000_io_resume(struct pci_dev *pdev)
  4462. {
  4463. struct net_device *netdev = pci_get_drvdata(pdev);
  4464. struct e1000_adapter *adapter = netdev_priv(netdev);
  4465. e1000_init_manageability(adapter);
  4466. if (netif_running(netdev)) {
  4467. if (e1000_up(adapter)) {
  4468. pr_info("can't bring device back up after reset\n");
  4469. return;
  4470. }
  4471. }
  4472. netif_device_attach(netdev);
  4473. }
  4474. /* e1000_main.c */