vnic_dev.c 22 KB

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  1. /*
  2. * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
  3. * Copyright 2007 Nuova Systems, Inc. All rights reserved.
  4. *
  5. * This program is free software; you may redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  10. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  11. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  12. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  13. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  14. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  15. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  16. * SOFTWARE.
  17. *
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/errno.h>
  21. #include <linux/types.h>
  22. #include <linux/pci.h>
  23. #include <linux/delay.h>
  24. #include <linux/if_ether.h>
  25. #include "vnic_resource.h"
  26. #include "vnic_devcmd.h"
  27. #include "vnic_dev.h"
  28. #include "vnic_stats.h"
  29. enum vnic_proxy_type {
  30. PROXY_NONE,
  31. PROXY_BY_BDF,
  32. PROXY_BY_INDEX,
  33. };
  34. struct vnic_res {
  35. void __iomem *vaddr;
  36. dma_addr_t bus_addr;
  37. unsigned int count;
  38. };
  39. struct vnic_intr_coal_timer_info {
  40. u32 mul;
  41. u32 div;
  42. u32 max_usec;
  43. };
  44. struct vnic_dev {
  45. void *priv;
  46. struct pci_dev *pdev;
  47. struct vnic_res res[RES_TYPE_MAX];
  48. enum vnic_dev_intr_mode intr_mode;
  49. struct vnic_devcmd __iomem *devcmd;
  50. struct vnic_devcmd_notify *notify;
  51. struct vnic_devcmd_notify notify_copy;
  52. dma_addr_t notify_pa;
  53. u32 notify_sz;
  54. dma_addr_t linkstatus_pa;
  55. struct vnic_stats *stats;
  56. dma_addr_t stats_pa;
  57. struct vnic_devcmd_fw_info *fw_info;
  58. dma_addr_t fw_info_pa;
  59. enum vnic_proxy_type proxy;
  60. u32 proxy_index;
  61. u64 args[VNIC_DEVCMD_NARGS];
  62. struct vnic_intr_coal_timer_info intr_coal_timer_info;
  63. };
  64. #define VNIC_MAX_RES_HDR_SIZE \
  65. (sizeof(struct vnic_resource_header) + \
  66. sizeof(struct vnic_resource) * RES_TYPE_MAX)
  67. #define VNIC_RES_STRIDE 128
  68. void *vnic_dev_priv(struct vnic_dev *vdev)
  69. {
  70. return vdev->priv;
  71. }
  72. static int vnic_dev_discover_res(struct vnic_dev *vdev,
  73. struct vnic_dev_bar *bar, unsigned int num_bars)
  74. {
  75. struct vnic_resource_header __iomem *rh;
  76. struct mgmt_barmap_hdr __iomem *mrh;
  77. struct vnic_resource __iomem *r;
  78. u8 type;
  79. if (num_bars == 0)
  80. return -EINVAL;
  81. if (bar->len < VNIC_MAX_RES_HDR_SIZE) {
  82. pr_err("vNIC BAR0 res hdr length error\n");
  83. return -EINVAL;
  84. }
  85. rh = bar->vaddr;
  86. mrh = bar->vaddr;
  87. if (!rh) {
  88. pr_err("vNIC BAR0 res hdr not mem-mapped\n");
  89. return -EINVAL;
  90. }
  91. /* Check for mgmt vnic in addition to normal vnic */
  92. if ((ioread32(&rh->magic) != VNIC_RES_MAGIC) ||
  93. (ioread32(&rh->version) != VNIC_RES_VERSION)) {
  94. if ((ioread32(&mrh->magic) != MGMTVNIC_MAGIC) ||
  95. (ioread32(&mrh->version) != MGMTVNIC_VERSION)) {
  96. pr_err("vNIC BAR0 res magic/version error "
  97. "exp (%lx/%lx) or (%lx/%lx), curr (%x/%x)\n",
  98. VNIC_RES_MAGIC, VNIC_RES_VERSION,
  99. MGMTVNIC_MAGIC, MGMTVNIC_VERSION,
  100. ioread32(&rh->magic), ioread32(&rh->version));
  101. return -EINVAL;
  102. }
  103. }
  104. if (ioread32(&mrh->magic) == MGMTVNIC_MAGIC)
  105. r = (struct vnic_resource __iomem *)(mrh + 1);
  106. else
  107. r = (struct vnic_resource __iomem *)(rh + 1);
  108. while ((type = ioread8(&r->type)) != RES_TYPE_EOL) {
  109. u8 bar_num = ioread8(&r->bar);
  110. u32 bar_offset = ioread32(&r->bar_offset);
  111. u32 count = ioread32(&r->count);
  112. u32 len;
  113. r++;
  114. if (bar_num >= num_bars)
  115. continue;
  116. if (!bar[bar_num].len || !bar[bar_num].vaddr)
  117. continue;
  118. switch (type) {
  119. case RES_TYPE_WQ:
  120. case RES_TYPE_RQ:
  121. case RES_TYPE_CQ:
  122. case RES_TYPE_INTR_CTRL:
  123. /* each count is stride bytes long */
  124. len = count * VNIC_RES_STRIDE;
  125. if (len + bar_offset > bar[bar_num].len) {
  126. pr_err("vNIC BAR0 resource %d "
  127. "out-of-bounds, offset 0x%x + "
  128. "size 0x%x > bar len 0x%lx\n",
  129. type, bar_offset,
  130. len,
  131. bar[bar_num].len);
  132. return -EINVAL;
  133. }
  134. break;
  135. case RES_TYPE_INTR_PBA_LEGACY:
  136. case RES_TYPE_DEVCMD:
  137. len = count;
  138. break;
  139. default:
  140. continue;
  141. }
  142. vdev->res[type].count = count;
  143. vdev->res[type].vaddr = (char __iomem *)bar[bar_num].vaddr +
  144. bar_offset;
  145. vdev->res[type].bus_addr = bar[bar_num].bus_addr + bar_offset;
  146. }
  147. return 0;
  148. }
  149. unsigned int vnic_dev_get_res_count(struct vnic_dev *vdev,
  150. enum vnic_res_type type)
  151. {
  152. return vdev->res[type].count;
  153. }
  154. EXPORT_SYMBOL(vnic_dev_get_res_count);
  155. void __iomem *vnic_dev_get_res(struct vnic_dev *vdev, enum vnic_res_type type,
  156. unsigned int index)
  157. {
  158. if (!vdev->res[type].vaddr)
  159. return NULL;
  160. switch (type) {
  161. case RES_TYPE_WQ:
  162. case RES_TYPE_RQ:
  163. case RES_TYPE_CQ:
  164. case RES_TYPE_INTR_CTRL:
  165. return (char __iomem *)vdev->res[type].vaddr +
  166. index * VNIC_RES_STRIDE;
  167. default:
  168. return (char __iomem *)vdev->res[type].vaddr;
  169. }
  170. }
  171. EXPORT_SYMBOL(vnic_dev_get_res);
  172. static unsigned int vnic_dev_desc_ring_size(struct vnic_dev_ring *ring,
  173. unsigned int desc_count, unsigned int desc_size)
  174. {
  175. /* The base address of the desc rings must be 512 byte aligned.
  176. * Descriptor count is aligned to groups of 32 descriptors. A
  177. * count of 0 means the maximum 4096 descriptors. Descriptor
  178. * size is aligned to 16 bytes.
  179. */
  180. unsigned int count_align = 32;
  181. unsigned int desc_align = 16;
  182. ring->base_align = 512;
  183. if (desc_count == 0)
  184. desc_count = 4096;
  185. ring->desc_count = ALIGN(desc_count, count_align);
  186. ring->desc_size = ALIGN(desc_size, desc_align);
  187. ring->size = ring->desc_count * ring->desc_size;
  188. ring->size_unaligned = ring->size + ring->base_align;
  189. return ring->size_unaligned;
  190. }
  191. void vnic_dev_clear_desc_ring(struct vnic_dev_ring *ring)
  192. {
  193. memset(ring->descs, 0, ring->size);
  194. }
  195. int vnic_dev_alloc_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring,
  196. unsigned int desc_count, unsigned int desc_size)
  197. {
  198. vnic_dev_desc_ring_size(ring, desc_count, desc_size);
  199. ring->descs_unaligned = pci_alloc_consistent(vdev->pdev,
  200. ring->size_unaligned,
  201. &ring->base_addr_unaligned);
  202. if (!ring->descs_unaligned) {
  203. pr_err("Failed to allocate ring (size=%d), aborting\n",
  204. (int)ring->size);
  205. return -ENOMEM;
  206. }
  207. ring->base_addr = ALIGN(ring->base_addr_unaligned,
  208. ring->base_align);
  209. ring->descs = (u8 *)ring->descs_unaligned +
  210. (ring->base_addr - ring->base_addr_unaligned);
  211. vnic_dev_clear_desc_ring(ring);
  212. ring->desc_avail = ring->desc_count - 1;
  213. return 0;
  214. }
  215. void vnic_dev_free_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring)
  216. {
  217. if (ring->descs) {
  218. pci_free_consistent(vdev->pdev,
  219. ring->size_unaligned,
  220. ring->descs_unaligned,
  221. ring->base_addr_unaligned);
  222. ring->descs = NULL;
  223. }
  224. }
  225. static int _vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
  226. int wait)
  227. {
  228. struct vnic_devcmd __iomem *devcmd = vdev->devcmd;
  229. unsigned int i;
  230. int delay;
  231. u32 status;
  232. int err;
  233. status = ioread32(&devcmd->status);
  234. if (status == 0xFFFFFFFF) {
  235. /* PCI-e target device is gone */
  236. return -ENODEV;
  237. }
  238. if (status & STAT_BUSY) {
  239. pr_err("Busy devcmd %d\n", _CMD_N(cmd));
  240. return -EBUSY;
  241. }
  242. if (_CMD_DIR(cmd) & _CMD_DIR_WRITE) {
  243. for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
  244. writeq(vdev->args[i], &devcmd->args[i]);
  245. wmb();
  246. }
  247. iowrite32(cmd, &devcmd->cmd);
  248. if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
  249. return 0;
  250. for (delay = 0; delay < wait; delay++) {
  251. udelay(100);
  252. status = ioread32(&devcmd->status);
  253. if (status == 0xFFFFFFFF) {
  254. /* PCI-e target device is gone */
  255. return -ENODEV;
  256. }
  257. if (!(status & STAT_BUSY)) {
  258. if (status & STAT_ERROR) {
  259. err = (int)readq(&devcmd->args[0]);
  260. if (err == ERR_EINVAL &&
  261. cmd == CMD_CAPABILITY)
  262. return err;
  263. if (err != ERR_ECMDUNKNOWN ||
  264. cmd != CMD_CAPABILITY)
  265. pr_err("Error %d devcmd %d\n",
  266. err, _CMD_N(cmd));
  267. return err;
  268. }
  269. if (_CMD_DIR(cmd) & _CMD_DIR_READ) {
  270. rmb();
  271. for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
  272. vdev->args[i] = readq(&devcmd->args[i]);
  273. }
  274. return 0;
  275. }
  276. }
  277. pr_err("Timedout devcmd %d\n", _CMD_N(cmd));
  278. return -ETIMEDOUT;
  279. }
  280. static int vnic_dev_cmd_proxy(struct vnic_dev *vdev,
  281. enum vnic_devcmd_cmd proxy_cmd, enum vnic_devcmd_cmd cmd,
  282. u64 *a0, u64 *a1, int wait)
  283. {
  284. u32 status;
  285. int err;
  286. memset(vdev->args, 0, sizeof(vdev->args));
  287. vdev->args[0] = vdev->proxy_index;
  288. vdev->args[1] = cmd;
  289. vdev->args[2] = *a0;
  290. vdev->args[3] = *a1;
  291. err = _vnic_dev_cmd(vdev, proxy_cmd, wait);
  292. if (err)
  293. return err;
  294. status = (u32)vdev->args[0];
  295. if (status & STAT_ERROR) {
  296. err = (int)vdev->args[1];
  297. if (err != ERR_ECMDUNKNOWN ||
  298. cmd != CMD_CAPABILITY)
  299. pr_err("Error %d proxy devcmd %d\n", err, _CMD_N(cmd));
  300. return err;
  301. }
  302. *a0 = vdev->args[1];
  303. *a1 = vdev->args[2];
  304. return 0;
  305. }
  306. static int vnic_dev_cmd_no_proxy(struct vnic_dev *vdev,
  307. enum vnic_devcmd_cmd cmd, u64 *a0, u64 *a1, int wait)
  308. {
  309. int err;
  310. vdev->args[0] = *a0;
  311. vdev->args[1] = *a1;
  312. err = _vnic_dev_cmd(vdev, cmd, wait);
  313. *a0 = vdev->args[0];
  314. *a1 = vdev->args[1];
  315. return err;
  316. }
  317. void vnic_dev_cmd_proxy_by_index_start(struct vnic_dev *vdev, u16 index)
  318. {
  319. vdev->proxy = PROXY_BY_INDEX;
  320. vdev->proxy_index = index;
  321. }
  322. void vnic_dev_cmd_proxy_end(struct vnic_dev *vdev)
  323. {
  324. vdev->proxy = PROXY_NONE;
  325. vdev->proxy_index = 0;
  326. }
  327. int vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
  328. u64 *a0, u64 *a1, int wait)
  329. {
  330. memset(vdev->args, 0, sizeof(vdev->args));
  331. switch (vdev->proxy) {
  332. case PROXY_BY_INDEX:
  333. return vnic_dev_cmd_proxy(vdev, CMD_PROXY_BY_INDEX, cmd,
  334. a0, a1, wait);
  335. case PROXY_BY_BDF:
  336. return vnic_dev_cmd_proxy(vdev, CMD_PROXY_BY_BDF, cmd,
  337. a0, a1, wait);
  338. case PROXY_NONE:
  339. default:
  340. return vnic_dev_cmd_no_proxy(vdev, cmd, a0, a1, wait);
  341. }
  342. }
  343. static int vnic_dev_capable(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd)
  344. {
  345. u64 a0 = (u32)cmd, a1 = 0;
  346. int wait = 1000;
  347. int err;
  348. err = vnic_dev_cmd(vdev, CMD_CAPABILITY, &a0, &a1, wait);
  349. return !(err || a0);
  350. }
  351. int vnic_dev_fw_info(struct vnic_dev *vdev,
  352. struct vnic_devcmd_fw_info **fw_info)
  353. {
  354. u64 a0, a1 = 0;
  355. int wait = 1000;
  356. int err = 0;
  357. if (!vdev->fw_info) {
  358. vdev->fw_info = pci_alloc_consistent(vdev->pdev,
  359. sizeof(struct vnic_devcmd_fw_info),
  360. &vdev->fw_info_pa);
  361. if (!vdev->fw_info)
  362. return -ENOMEM;
  363. memset(vdev->fw_info, 0, sizeof(struct vnic_devcmd_fw_info));
  364. a0 = vdev->fw_info_pa;
  365. a1 = sizeof(struct vnic_devcmd_fw_info);
  366. /* only get fw_info once and cache it */
  367. if (vnic_dev_capable(vdev, CMD_MCPU_FW_INFO))
  368. err = vnic_dev_cmd(vdev, CMD_MCPU_FW_INFO,
  369. &a0, &a1, wait);
  370. else
  371. err = vnic_dev_cmd(vdev, CMD_MCPU_FW_INFO_OLD,
  372. &a0, &a1, wait);
  373. }
  374. *fw_info = vdev->fw_info;
  375. return err;
  376. }
  377. int vnic_dev_spec(struct vnic_dev *vdev, unsigned int offset, unsigned int size,
  378. void *value)
  379. {
  380. u64 a0, a1;
  381. int wait = 1000;
  382. int err;
  383. a0 = offset;
  384. a1 = size;
  385. err = vnic_dev_cmd(vdev, CMD_DEV_SPEC, &a0, &a1, wait);
  386. switch (size) {
  387. case 1: *(u8 *)value = (u8)a0; break;
  388. case 2: *(u16 *)value = (u16)a0; break;
  389. case 4: *(u32 *)value = (u32)a0; break;
  390. case 8: *(u64 *)value = a0; break;
  391. default: BUG(); break;
  392. }
  393. return err;
  394. }
  395. int vnic_dev_stats_dump(struct vnic_dev *vdev, struct vnic_stats **stats)
  396. {
  397. u64 a0, a1;
  398. int wait = 1000;
  399. if (!vdev->stats) {
  400. vdev->stats = pci_alloc_consistent(vdev->pdev,
  401. sizeof(struct vnic_stats), &vdev->stats_pa);
  402. if (!vdev->stats)
  403. return -ENOMEM;
  404. }
  405. *stats = vdev->stats;
  406. a0 = vdev->stats_pa;
  407. a1 = sizeof(struct vnic_stats);
  408. return vnic_dev_cmd(vdev, CMD_STATS_DUMP, &a0, &a1, wait);
  409. }
  410. int vnic_dev_close(struct vnic_dev *vdev)
  411. {
  412. u64 a0 = 0, a1 = 0;
  413. int wait = 1000;
  414. return vnic_dev_cmd(vdev, CMD_CLOSE, &a0, &a1, wait);
  415. }
  416. int vnic_dev_enable_wait(struct vnic_dev *vdev)
  417. {
  418. u64 a0 = 0, a1 = 0;
  419. int wait = 1000;
  420. if (vnic_dev_capable(vdev, CMD_ENABLE_WAIT))
  421. return vnic_dev_cmd(vdev, CMD_ENABLE_WAIT, &a0, &a1, wait);
  422. else
  423. return vnic_dev_cmd(vdev, CMD_ENABLE, &a0, &a1, wait);
  424. }
  425. int vnic_dev_disable(struct vnic_dev *vdev)
  426. {
  427. u64 a0 = 0, a1 = 0;
  428. int wait = 1000;
  429. return vnic_dev_cmd(vdev, CMD_DISABLE, &a0, &a1, wait);
  430. }
  431. int vnic_dev_open(struct vnic_dev *vdev, int arg)
  432. {
  433. u64 a0 = (u32)arg, a1 = 0;
  434. int wait = 1000;
  435. return vnic_dev_cmd(vdev, CMD_OPEN, &a0, &a1, wait);
  436. }
  437. int vnic_dev_open_done(struct vnic_dev *vdev, int *done)
  438. {
  439. u64 a0 = 0, a1 = 0;
  440. int wait = 1000;
  441. int err;
  442. *done = 0;
  443. err = vnic_dev_cmd(vdev, CMD_OPEN_STATUS, &a0, &a1, wait);
  444. if (err)
  445. return err;
  446. *done = (a0 == 0);
  447. return 0;
  448. }
  449. static int vnic_dev_soft_reset(struct vnic_dev *vdev, int arg)
  450. {
  451. u64 a0 = (u32)arg, a1 = 0;
  452. int wait = 1000;
  453. return vnic_dev_cmd(vdev, CMD_SOFT_RESET, &a0, &a1, wait);
  454. }
  455. static int vnic_dev_soft_reset_done(struct vnic_dev *vdev, int *done)
  456. {
  457. u64 a0 = 0, a1 = 0;
  458. int wait = 1000;
  459. int err;
  460. *done = 0;
  461. err = vnic_dev_cmd(vdev, CMD_SOFT_RESET_STATUS, &a0, &a1, wait);
  462. if (err)
  463. return err;
  464. *done = (a0 == 0);
  465. return 0;
  466. }
  467. int vnic_dev_hang_reset(struct vnic_dev *vdev, int arg)
  468. {
  469. u64 a0 = (u32)arg, a1 = 0;
  470. int wait = 1000;
  471. int err;
  472. if (vnic_dev_capable(vdev, CMD_HANG_RESET)) {
  473. return vnic_dev_cmd(vdev, CMD_HANG_RESET,
  474. &a0, &a1, wait);
  475. } else {
  476. err = vnic_dev_soft_reset(vdev, arg);
  477. if (err)
  478. return err;
  479. return vnic_dev_init(vdev, 0);
  480. }
  481. }
  482. int vnic_dev_hang_reset_done(struct vnic_dev *vdev, int *done)
  483. {
  484. u64 a0 = 0, a1 = 0;
  485. int wait = 1000;
  486. int err;
  487. *done = 0;
  488. if (vnic_dev_capable(vdev, CMD_HANG_RESET_STATUS)) {
  489. err = vnic_dev_cmd(vdev, CMD_HANG_RESET_STATUS,
  490. &a0, &a1, wait);
  491. if (err)
  492. return err;
  493. } else {
  494. return vnic_dev_soft_reset_done(vdev, done);
  495. }
  496. *done = (a0 == 0);
  497. return 0;
  498. }
  499. int vnic_dev_hang_notify(struct vnic_dev *vdev)
  500. {
  501. u64 a0, a1;
  502. int wait = 1000;
  503. return vnic_dev_cmd(vdev, CMD_HANG_NOTIFY, &a0, &a1, wait);
  504. }
  505. int vnic_dev_get_mac_addr(struct vnic_dev *vdev, u8 *mac_addr)
  506. {
  507. u64 a0, a1;
  508. int wait = 1000;
  509. int err, i;
  510. for (i = 0; i < ETH_ALEN; i++)
  511. mac_addr[i] = 0;
  512. err = vnic_dev_cmd(vdev, CMD_GET_MAC_ADDR, &a0, &a1, wait);
  513. if (err)
  514. return err;
  515. for (i = 0; i < ETH_ALEN; i++)
  516. mac_addr[i] = ((u8 *)&a0)[i];
  517. return 0;
  518. }
  519. int vnic_dev_packet_filter(struct vnic_dev *vdev, int directed, int multicast,
  520. int broadcast, int promisc, int allmulti)
  521. {
  522. u64 a0, a1 = 0;
  523. int wait = 1000;
  524. int err;
  525. a0 = (directed ? CMD_PFILTER_DIRECTED : 0) |
  526. (multicast ? CMD_PFILTER_MULTICAST : 0) |
  527. (broadcast ? CMD_PFILTER_BROADCAST : 0) |
  528. (promisc ? CMD_PFILTER_PROMISCUOUS : 0) |
  529. (allmulti ? CMD_PFILTER_ALL_MULTICAST : 0);
  530. err = vnic_dev_cmd(vdev, CMD_PACKET_FILTER, &a0, &a1, wait);
  531. if (err)
  532. pr_err("Can't set packet filter\n");
  533. return err;
  534. }
  535. int vnic_dev_add_addr(struct vnic_dev *vdev, u8 *addr)
  536. {
  537. u64 a0 = 0, a1 = 0;
  538. int wait = 1000;
  539. int err;
  540. int i;
  541. for (i = 0; i < ETH_ALEN; i++)
  542. ((u8 *)&a0)[i] = addr[i];
  543. err = vnic_dev_cmd(vdev, CMD_ADDR_ADD, &a0, &a1, wait);
  544. if (err)
  545. pr_err("Can't add addr [%pM], %d\n", addr, err);
  546. return err;
  547. }
  548. int vnic_dev_del_addr(struct vnic_dev *vdev, u8 *addr)
  549. {
  550. u64 a0 = 0, a1 = 0;
  551. int wait = 1000;
  552. int err;
  553. int i;
  554. for (i = 0; i < ETH_ALEN; i++)
  555. ((u8 *)&a0)[i] = addr[i];
  556. err = vnic_dev_cmd(vdev, CMD_ADDR_DEL, &a0, &a1, wait);
  557. if (err)
  558. pr_err("Can't del addr [%pM], %d\n", addr, err);
  559. return err;
  560. }
  561. int vnic_dev_set_ig_vlan_rewrite_mode(struct vnic_dev *vdev,
  562. u8 ig_vlan_rewrite_mode)
  563. {
  564. u64 a0 = ig_vlan_rewrite_mode, a1 = 0;
  565. int wait = 1000;
  566. if (vnic_dev_capable(vdev, CMD_IG_VLAN_REWRITE_MODE))
  567. return vnic_dev_cmd(vdev, CMD_IG_VLAN_REWRITE_MODE,
  568. &a0, &a1, wait);
  569. else
  570. return 0;
  571. }
  572. static int vnic_dev_notify_setcmd(struct vnic_dev *vdev,
  573. void *notify_addr, dma_addr_t notify_pa, u16 intr)
  574. {
  575. u64 a0, a1;
  576. int wait = 1000;
  577. int r;
  578. memset(notify_addr, 0, sizeof(struct vnic_devcmd_notify));
  579. vdev->notify = notify_addr;
  580. vdev->notify_pa = notify_pa;
  581. a0 = (u64)notify_pa;
  582. a1 = ((u64)intr << 32) & 0x0000ffff00000000ULL;
  583. a1 += sizeof(struct vnic_devcmd_notify);
  584. r = vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
  585. vdev->notify_sz = (r == 0) ? (u32)a1 : 0;
  586. return r;
  587. }
  588. int vnic_dev_notify_set(struct vnic_dev *vdev, u16 intr)
  589. {
  590. void *notify_addr;
  591. dma_addr_t notify_pa;
  592. if (vdev->notify || vdev->notify_pa) {
  593. pr_err("notify block %p still allocated", vdev->notify);
  594. return -EINVAL;
  595. }
  596. notify_addr = pci_alloc_consistent(vdev->pdev,
  597. sizeof(struct vnic_devcmd_notify),
  598. &notify_pa);
  599. if (!notify_addr)
  600. return -ENOMEM;
  601. return vnic_dev_notify_setcmd(vdev, notify_addr, notify_pa, intr);
  602. }
  603. static int vnic_dev_notify_unsetcmd(struct vnic_dev *vdev)
  604. {
  605. u64 a0, a1;
  606. int wait = 1000;
  607. int err;
  608. a0 = 0; /* paddr = 0 to unset notify buffer */
  609. a1 = 0x0000ffff00000000ULL; /* intr num = -1 to unreg for intr */
  610. a1 += sizeof(struct vnic_devcmd_notify);
  611. err = vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
  612. vdev->notify = NULL;
  613. vdev->notify_pa = 0;
  614. vdev->notify_sz = 0;
  615. return err;
  616. }
  617. int vnic_dev_notify_unset(struct vnic_dev *vdev)
  618. {
  619. if (vdev->notify) {
  620. pci_free_consistent(vdev->pdev,
  621. sizeof(struct vnic_devcmd_notify),
  622. vdev->notify,
  623. vdev->notify_pa);
  624. }
  625. return vnic_dev_notify_unsetcmd(vdev);
  626. }
  627. static int vnic_dev_notify_ready(struct vnic_dev *vdev)
  628. {
  629. u32 *words;
  630. unsigned int nwords = vdev->notify_sz / 4;
  631. unsigned int i;
  632. u32 csum;
  633. if (!vdev->notify || !vdev->notify_sz)
  634. return 0;
  635. do {
  636. csum = 0;
  637. memcpy(&vdev->notify_copy, vdev->notify, vdev->notify_sz);
  638. words = (u32 *)&vdev->notify_copy;
  639. for (i = 1; i < nwords; i++)
  640. csum += words[i];
  641. } while (csum != words[0]);
  642. return 1;
  643. }
  644. int vnic_dev_init(struct vnic_dev *vdev, int arg)
  645. {
  646. u64 a0 = (u32)arg, a1 = 0;
  647. int wait = 1000;
  648. int r = 0;
  649. if (vnic_dev_capable(vdev, CMD_INIT))
  650. r = vnic_dev_cmd(vdev, CMD_INIT, &a0, &a1, wait);
  651. else {
  652. vnic_dev_cmd(vdev, CMD_INIT_v1, &a0, &a1, wait);
  653. if (a0 & CMD_INITF_DEFAULT_MAC) {
  654. /* Emulate these for old CMD_INIT_v1 which
  655. * didn't pass a0 so no CMD_INITF_*.
  656. */
  657. vnic_dev_cmd(vdev, CMD_GET_MAC_ADDR, &a0, &a1, wait);
  658. vnic_dev_cmd(vdev, CMD_ADDR_ADD, &a0, &a1, wait);
  659. }
  660. }
  661. return r;
  662. }
  663. int vnic_dev_deinit(struct vnic_dev *vdev)
  664. {
  665. u64 a0 = 0, a1 = 0;
  666. int wait = 1000;
  667. return vnic_dev_cmd(vdev, CMD_DEINIT, &a0, &a1, wait);
  668. }
  669. void vnic_dev_intr_coal_timer_info_default(struct vnic_dev *vdev)
  670. {
  671. /* Default: hardware intr coal timer is in units of 1.5 usecs */
  672. vdev->intr_coal_timer_info.mul = 2;
  673. vdev->intr_coal_timer_info.div = 3;
  674. vdev->intr_coal_timer_info.max_usec =
  675. vnic_dev_intr_coal_timer_hw_to_usec(vdev, 0xffff);
  676. }
  677. int vnic_dev_intr_coal_timer_info(struct vnic_dev *vdev)
  678. {
  679. int wait = 1000;
  680. int err;
  681. memset(vdev->args, 0, sizeof(vdev->args));
  682. if (vnic_dev_capable(vdev, CMD_INTR_COAL_CONVERT))
  683. err = _vnic_dev_cmd(vdev, CMD_INTR_COAL_CONVERT, wait);
  684. else
  685. err = ERR_ECMDUNKNOWN;
  686. /* Use defaults when firmware doesn't support the devcmd at all or
  687. * supports it for only specific hardware
  688. */
  689. if ((err == ERR_ECMDUNKNOWN) ||
  690. (!err && !(vdev->args[0] && vdev->args[1] && vdev->args[2]))) {
  691. pr_warning("Using default conversion factor for "
  692. "interrupt coalesce timer\n");
  693. vnic_dev_intr_coal_timer_info_default(vdev);
  694. return 0;
  695. }
  696. if (!err) {
  697. vdev->intr_coal_timer_info.mul = (u32) vdev->args[0];
  698. vdev->intr_coal_timer_info.div = (u32) vdev->args[1];
  699. vdev->intr_coal_timer_info.max_usec = (u32) vdev->args[2];
  700. }
  701. return err;
  702. }
  703. int vnic_dev_link_status(struct vnic_dev *vdev)
  704. {
  705. if (!vnic_dev_notify_ready(vdev))
  706. return 0;
  707. return vdev->notify_copy.link_state;
  708. }
  709. u32 vnic_dev_port_speed(struct vnic_dev *vdev)
  710. {
  711. if (!vnic_dev_notify_ready(vdev))
  712. return 0;
  713. return vdev->notify_copy.port_speed;
  714. }
  715. u32 vnic_dev_msg_lvl(struct vnic_dev *vdev)
  716. {
  717. if (!vnic_dev_notify_ready(vdev))
  718. return 0;
  719. return vdev->notify_copy.msglvl;
  720. }
  721. u32 vnic_dev_mtu(struct vnic_dev *vdev)
  722. {
  723. if (!vnic_dev_notify_ready(vdev))
  724. return 0;
  725. return vdev->notify_copy.mtu;
  726. }
  727. void vnic_dev_set_intr_mode(struct vnic_dev *vdev,
  728. enum vnic_dev_intr_mode intr_mode)
  729. {
  730. vdev->intr_mode = intr_mode;
  731. }
  732. enum vnic_dev_intr_mode vnic_dev_get_intr_mode(
  733. struct vnic_dev *vdev)
  734. {
  735. return vdev->intr_mode;
  736. }
  737. u32 vnic_dev_intr_coal_timer_usec_to_hw(struct vnic_dev *vdev, u32 usec)
  738. {
  739. return (usec * vdev->intr_coal_timer_info.mul) /
  740. vdev->intr_coal_timer_info.div;
  741. }
  742. u32 vnic_dev_intr_coal_timer_hw_to_usec(struct vnic_dev *vdev, u32 hw_cycles)
  743. {
  744. return (hw_cycles * vdev->intr_coal_timer_info.div) /
  745. vdev->intr_coal_timer_info.mul;
  746. }
  747. u32 vnic_dev_get_intr_coal_timer_max(struct vnic_dev *vdev)
  748. {
  749. return vdev->intr_coal_timer_info.max_usec;
  750. }
  751. void vnic_dev_unregister(struct vnic_dev *vdev)
  752. {
  753. if (vdev) {
  754. if (vdev->notify)
  755. pci_free_consistent(vdev->pdev,
  756. sizeof(struct vnic_devcmd_notify),
  757. vdev->notify,
  758. vdev->notify_pa);
  759. if (vdev->stats)
  760. pci_free_consistent(vdev->pdev,
  761. sizeof(struct vnic_stats),
  762. vdev->stats, vdev->stats_pa);
  763. if (vdev->fw_info)
  764. pci_free_consistent(vdev->pdev,
  765. sizeof(struct vnic_devcmd_fw_info),
  766. vdev->fw_info, vdev->fw_info_pa);
  767. kfree(vdev);
  768. }
  769. }
  770. EXPORT_SYMBOL(vnic_dev_unregister);
  771. struct vnic_dev *vnic_dev_register(struct vnic_dev *vdev,
  772. void *priv, struct pci_dev *pdev, struct vnic_dev_bar *bar,
  773. unsigned int num_bars)
  774. {
  775. if (!vdev) {
  776. vdev = kzalloc(sizeof(struct vnic_dev), GFP_ATOMIC);
  777. if (!vdev)
  778. return NULL;
  779. }
  780. vdev->priv = priv;
  781. vdev->pdev = pdev;
  782. if (vnic_dev_discover_res(vdev, bar, num_bars))
  783. goto err_out;
  784. vdev->devcmd = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD, 0);
  785. if (!vdev->devcmd)
  786. goto err_out;
  787. return vdev;
  788. err_out:
  789. vnic_dev_unregister(vdev);
  790. return NULL;
  791. }
  792. EXPORT_SYMBOL(vnic_dev_register);
  793. struct pci_dev *vnic_dev_get_pdev(struct vnic_dev *vdev)
  794. {
  795. return vdev->pdev;
  796. }
  797. EXPORT_SYMBOL(vnic_dev_get_pdev);
  798. int vnic_dev_init_prov2(struct vnic_dev *vdev, u8 *buf, u32 len)
  799. {
  800. u64 a0, a1 = len;
  801. int wait = 1000;
  802. dma_addr_t prov_pa;
  803. void *prov_buf;
  804. int ret;
  805. prov_buf = pci_alloc_consistent(vdev->pdev, len, &prov_pa);
  806. if (!prov_buf)
  807. return -ENOMEM;
  808. memcpy(prov_buf, buf, len);
  809. a0 = prov_pa;
  810. ret = vnic_dev_cmd(vdev, CMD_INIT_PROV_INFO2, &a0, &a1, wait);
  811. pci_free_consistent(vdev->pdev, len, prov_buf, prov_pa);
  812. return ret;
  813. }
  814. int vnic_dev_enable2(struct vnic_dev *vdev, int active)
  815. {
  816. u64 a0, a1 = 0;
  817. int wait = 1000;
  818. a0 = (active ? CMD_ENABLE2_ACTIVE : 0);
  819. return vnic_dev_cmd(vdev, CMD_ENABLE2, &a0, &a1, wait);
  820. }
  821. static int vnic_dev_cmd_status(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
  822. int *status)
  823. {
  824. u64 a0 = cmd, a1 = 0;
  825. int wait = 1000;
  826. int ret;
  827. ret = vnic_dev_cmd(vdev, CMD_STATUS, &a0, &a1, wait);
  828. if (!ret)
  829. *status = (int)a0;
  830. return ret;
  831. }
  832. int vnic_dev_enable2_done(struct vnic_dev *vdev, int *status)
  833. {
  834. return vnic_dev_cmd_status(vdev, CMD_ENABLE2, status);
  835. }
  836. int vnic_dev_deinit_done(struct vnic_dev *vdev, int *status)
  837. {
  838. return vnic_dev_cmd_status(vdev, CMD_DEINIT, status);
  839. }
  840. int vnic_dev_set_mac_addr(struct vnic_dev *vdev, u8 *mac_addr)
  841. {
  842. u64 a0, a1;
  843. int wait = 1000;
  844. int i;
  845. for (i = 0; i < ETH_ALEN; i++)
  846. ((u8 *)&a0)[i] = mac_addr[i];
  847. return vnic_dev_cmd(vdev, CMD_SET_MAC_ADDR, &a0, &a1, wait);
  848. }