sunlance.c 40 KB

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  1. /* $Id: sunlance.c,v 1.112 2002/01/15 06:48:55 davem Exp $
  2. * lance.c: Linux/Sparc/Lance driver
  3. *
  4. * Written 1995, 1996 by Miguel de Icaza
  5. * Sources:
  6. * The Linux depca driver
  7. * The Linux lance driver.
  8. * The Linux skeleton driver.
  9. * The NetBSD Sparc/Lance driver.
  10. * Theo de Raadt (deraadt@openbsd.org)
  11. * NCR92C990 Lan Controller manual
  12. *
  13. * 1.4:
  14. * Added support to run with a ledma on the Sun4m
  15. *
  16. * 1.5:
  17. * Added multiple card detection.
  18. *
  19. * 4/17/96: Burst sizes and tpe selection on sun4m by Eddie C. Dost
  20. * (ecd@skynet.be)
  21. *
  22. * 5/15/96: auto carrier detection on sun4m by Eddie C. Dost
  23. * (ecd@skynet.be)
  24. *
  25. * 5/17/96: lebuffer on scsi/ether cards now work David S. Miller
  26. * (davem@caip.rutgers.edu)
  27. *
  28. * 5/29/96: override option 'tpe-link-test?', if it is 'false', as
  29. * this disables auto carrier detection on sun4m. Eddie C. Dost
  30. * (ecd@skynet.be)
  31. *
  32. * 1.7:
  33. * 6/26/96: Bug fix for multiple ledmas, miguel.
  34. *
  35. * 1.8:
  36. * Stole multicast code from depca.c, fixed lance_tx.
  37. *
  38. * 1.9:
  39. * 8/21/96: Fixed the multicast code (Pedro Roque)
  40. *
  41. * 8/28/96: Send fake packet in lance_open() if auto_select is true,
  42. * so we can detect the carrier loss condition in time.
  43. * Eddie C. Dost (ecd@skynet.be)
  44. *
  45. * 9/15/96: Align rx_buf so that eth_copy_and_sum() won't cause an
  46. * MNA trap during chksum_partial_copy(). (ecd@skynet.be)
  47. *
  48. * 11/17/96: Handle LE_C0_MERR in lance_interrupt(). (ecd@skynet.be)
  49. *
  50. * 12/22/96: Don't loop forever in lance_rx() on incomplete packets.
  51. * This was the sun4c killer. Shit, stupid bug.
  52. * (ecd@skynet.be)
  53. *
  54. * 1.10:
  55. * 1/26/97: Modularize driver. (ecd@skynet.be)
  56. *
  57. * 1.11:
  58. * 12/27/97: Added sun4d support. (jj@sunsite.mff.cuni.cz)
  59. *
  60. * 1.12:
  61. * 11/3/99: Fixed SMP race in lance_start_xmit found by davem.
  62. * Anton Blanchard (anton@progsoc.uts.edu.au)
  63. * 2.00: 11/9/99: Massive overhaul and port to new SBUS driver interfaces.
  64. * David S. Miller (davem@redhat.com)
  65. * 2.01:
  66. * 11/08/01: Use library crc32 functions (Matt_Domsch@dell.com)
  67. *
  68. */
  69. #undef DEBUG_DRIVER
  70. static char lancestr[] = "LANCE";
  71. #include <linux/module.h>
  72. #include <linux/kernel.h>
  73. #include <linux/types.h>
  74. #include <linux/fcntl.h>
  75. #include <linux/interrupt.h>
  76. #include <linux/ioport.h>
  77. #include <linux/in.h>
  78. #include <linux/string.h>
  79. #include <linux/delay.h>
  80. #include <linux/init.h>
  81. #include <linux/crc32.h>
  82. #include <linux/errno.h>
  83. #include <linux/socket.h> /* Used for the temporal inet entries and routing */
  84. #include <linux/route.h>
  85. #include <linux/netdevice.h>
  86. #include <linux/etherdevice.h>
  87. #include <linux/skbuff.h>
  88. #include <linux/ethtool.h>
  89. #include <linux/bitops.h>
  90. #include <linux/dma-mapping.h>
  91. #include <linux/of.h>
  92. #include <linux/of_device.h>
  93. #include <linux/gfp.h>
  94. #include <asm/io.h>
  95. #include <asm/dma.h>
  96. #include <asm/pgtable.h>
  97. #include <asm/byteorder.h> /* Used by the checksum routines */
  98. #include <asm/idprom.h>
  99. #include <asm/prom.h>
  100. #include <asm/auxio.h> /* For tpe-link-test? setting */
  101. #include <asm/irq.h>
  102. #define DRV_NAME "sunlance"
  103. #define DRV_VERSION "2.02"
  104. #define DRV_RELDATE "8/24/03"
  105. #define DRV_AUTHOR "Miguel de Icaza (miguel@nuclecu.unam.mx)"
  106. static char version[] =
  107. DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n";
  108. MODULE_VERSION(DRV_VERSION);
  109. MODULE_AUTHOR(DRV_AUTHOR);
  110. MODULE_DESCRIPTION("Sun Lance ethernet driver");
  111. MODULE_LICENSE("GPL");
  112. /* Define: 2^4 Tx buffers and 2^4 Rx buffers */
  113. #ifndef LANCE_LOG_TX_BUFFERS
  114. #define LANCE_LOG_TX_BUFFERS 4
  115. #define LANCE_LOG_RX_BUFFERS 4
  116. #endif
  117. #define LE_CSR0 0
  118. #define LE_CSR1 1
  119. #define LE_CSR2 2
  120. #define LE_CSR3 3
  121. #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */
  122. #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */
  123. #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */
  124. #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */
  125. #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */
  126. #define LE_C0_MERR 0x0800 /* ME: Memory error */
  127. #define LE_C0_RINT 0x0400 /* Received interrupt */
  128. #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */
  129. #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */
  130. #define LE_C0_INTR 0x0080 /* Interrupt or error */
  131. #define LE_C0_INEA 0x0040 /* Interrupt enable */
  132. #define LE_C0_RXON 0x0020 /* Receiver on */
  133. #define LE_C0_TXON 0x0010 /* Transmitter on */
  134. #define LE_C0_TDMD 0x0008 /* Transmitter demand */
  135. #define LE_C0_STOP 0x0004 /* Stop the card */
  136. #define LE_C0_STRT 0x0002 /* Start the card */
  137. #define LE_C0_INIT 0x0001 /* Init the card */
  138. #define LE_C3_BSWP 0x4 /* SWAP */
  139. #define LE_C3_ACON 0x2 /* ALE Control */
  140. #define LE_C3_BCON 0x1 /* Byte control */
  141. /* Receive message descriptor 1 */
  142. #define LE_R1_OWN 0x80 /* Who owns the entry */
  143. #define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */
  144. #define LE_R1_FRA 0x20 /* FRA: Frame error */
  145. #define LE_R1_OFL 0x10 /* OFL: Frame overflow */
  146. #define LE_R1_CRC 0x08 /* CRC error */
  147. #define LE_R1_BUF 0x04 /* BUF: Buffer error */
  148. #define LE_R1_SOP 0x02 /* Start of packet */
  149. #define LE_R1_EOP 0x01 /* End of packet */
  150. #define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */
  151. #define LE_T1_OWN 0x80 /* Lance owns the packet */
  152. #define LE_T1_ERR 0x40 /* Error summary */
  153. #define LE_T1_EMORE 0x10 /* Error: more than one retry needed */
  154. #define LE_T1_EONE 0x08 /* Error: one retry needed */
  155. #define LE_T1_EDEF 0x04 /* Error: deferred */
  156. #define LE_T1_SOP 0x02 /* Start of packet */
  157. #define LE_T1_EOP 0x01 /* End of packet */
  158. #define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */
  159. #define LE_T3_BUF 0x8000 /* Buffer error */
  160. #define LE_T3_UFL 0x4000 /* Error underflow */
  161. #define LE_T3_LCOL 0x1000 /* Error late collision */
  162. #define LE_T3_CLOS 0x0800 /* Error carrier loss */
  163. #define LE_T3_RTY 0x0400 /* Error retry */
  164. #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */
  165. #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
  166. #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
  167. #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
  168. #define TX_NEXT(__x) (((__x)+1) & TX_RING_MOD_MASK)
  169. #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
  170. #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
  171. #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
  172. #define RX_NEXT(__x) (((__x)+1) & RX_RING_MOD_MASK)
  173. #define PKT_BUF_SZ 1544
  174. #define RX_BUFF_SIZE PKT_BUF_SZ
  175. #define TX_BUFF_SIZE PKT_BUF_SZ
  176. struct lance_rx_desc {
  177. u16 rmd0; /* low address of packet */
  178. u8 rmd1_bits; /* descriptor bits */
  179. u8 rmd1_hadr; /* high address of packet */
  180. s16 length; /* This length is 2s complement (negative)!
  181. * Buffer length
  182. */
  183. u16 mblength; /* This is the actual number of bytes received */
  184. };
  185. struct lance_tx_desc {
  186. u16 tmd0; /* low address of packet */
  187. u8 tmd1_bits; /* descriptor bits */
  188. u8 tmd1_hadr; /* high address of packet */
  189. s16 length; /* Length is 2s complement (negative)! */
  190. u16 misc;
  191. };
  192. /* The LANCE initialization block, described in databook. */
  193. /* On the Sparc, this block should be on a DMA region */
  194. struct lance_init_block {
  195. u16 mode; /* Pre-set mode (reg. 15) */
  196. u8 phys_addr[6]; /* Physical ethernet address */
  197. u32 filter[2]; /* Multicast filter. */
  198. /* Receive and transmit ring base, along with extra bits. */
  199. u16 rx_ptr; /* receive descriptor addr */
  200. u16 rx_len; /* receive len and high addr */
  201. u16 tx_ptr; /* transmit descriptor addr */
  202. u16 tx_len; /* transmit len and high addr */
  203. /* The Tx and Rx ring entries must aligned on 8-byte boundaries. */
  204. struct lance_rx_desc brx_ring[RX_RING_SIZE];
  205. struct lance_tx_desc btx_ring[TX_RING_SIZE];
  206. u8 tx_buf [TX_RING_SIZE][TX_BUFF_SIZE];
  207. u8 pad[2]; /* align rx_buf for copy_and_sum(). */
  208. u8 rx_buf [RX_RING_SIZE][RX_BUFF_SIZE];
  209. };
  210. #define libdesc_offset(rt, elem) \
  211. ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem])))))
  212. #define libbuff_offset(rt, elem) \
  213. ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem][0])))))
  214. struct lance_private {
  215. void __iomem *lregs; /* Lance RAP/RDP regs. */
  216. void __iomem *dregs; /* DMA controller regs. */
  217. struct lance_init_block __iomem *init_block_iomem;
  218. struct lance_init_block *init_block_mem;
  219. spinlock_t lock;
  220. int rx_new, tx_new;
  221. int rx_old, tx_old;
  222. struct platform_device *ledma; /* If set this points to ledma */
  223. char tpe; /* cable-selection is TPE */
  224. char auto_select; /* cable-selection by carrier */
  225. char burst_sizes; /* ledma SBus burst sizes */
  226. char pio_buffer; /* init block in PIO space? */
  227. unsigned short busmaster_regval;
  228. void (*init_ring)(struct net_device *);
  229. void (*rx)(struct net_device *);
  230. void (*tx)(struct net_device *);
  231. char *name;
  232. dma_addr_t init_block_dvma;
  233. struct net_device *dev; /* Backpointer */
  234. struct platform_device *op;
  235. struct platform_device *lebuffer;
  236. struct timer_list multicast_timer;
  237. };
  238. #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
  239. lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
  240. lp->tx_old - lp->tx_new-1)
  241. /* Lance registers. */
  242. #define RDP 0x00UL /* register data port */
  243. #define RAP 0x02UL /* register address port */
  244. #define LANCE_REG_SIZE 0x04UL
  245. #define STOP_LANCE(__lp) \
  246. do { void __iomem *__base = (__lp)->lregs; \
  247. sbus_writew(LE_CSR0, __base + RAP); \
  248. sbus_writew(LE_C0_STOP, __base + RDP); \
  249. } while (0)
  250. int sparc_lance_debug = 2;
  251. /* The Lance uses 24 bit addresses */
  252. /* On the Sun4c the DVMA will provide the remaining bytes for us */
  253. /* On the Sun4m we have to instruct the ledma to provide them */
  254. /* Even worse, on scsi/ether SBUS cards, the init block and the
  255. * transmit/receive buffers are addresses as offsets from absolute
  256. * zero on the lebuffer PIO area. -DaveM
  257. */
  258. #define LANCE_ADDR(x) ((long)(x) & ~0xff000000)
  259. /* Load the CSR registers */
  260. static void load_csrs(struct lance_private *lp)
  261. {
  262. u32 leptr;
  263. if (lp->pio_buffer)
  264. leptr = 0;
  265. else
  266. leptr = LANCE_ADDR(lp->init_block_dvma);
  267. sbus_writew(LE_CSR1, lp->lregs + RAP);
  268. sbus_writew(leptr & 0xffff, lp->lregs + RDP);
  269. sbus_writew(LE_CSR2, lp->lregs + RAP);
  270. sbus_writew(leptr >> 16, lp->lregs + RDP);
  271. sbus_writew(LE_CSR3, lp->lregs + RAP);
  272. sbus_writew(lp->busmaster_regval, lp->lregs + RDP);
  273. /* Point back to csr0 */
  274. sbus_writew(LE_CSR0, lp->lregs + RAP);
  275. }
  276. /* Setup the Lance Rx and Tx rings */
  277. static void lance_init_ring_dvma(struct net_device *dev)
  278. {
  279. struct lance_private *lp = netdev_priv(dev);
  280. struct lance_init_block *ib = lp->init_block_mem;
  281. dma_addr_t aib = lp->init_block_dvma;
  282. __u32 leptr;
  283. int i;
  284. /* Lock out other processes while setting up hardware */
  285. netif_stop_queue(dev);
  286. lp->rx_new = lp->tx_new = 0;
  287. lp->rx_old = lp->tx_old = 0;
  288. /* Copy the ethernet address to the lance init block
  289. * Note that on the sparc you need to swap the ethernet address.
  290. */
  291. ib->phys_addr [0] = dev->dev_addr [1];
  292. ib->phys_addr [1] = dev->dev_addr [0];
  293. ib->phys_addr [2] = dev->dev_addr [3];
  294. ib->phys_addr [3] = dev->dev_addr [2];
  295. ib->phys_addr [4] = dev->dev_addr [5];
  296. ib->phys_addr [5] = dev->dev_addr [4];
  297. /* Setup the Tx ring entries */
  298. for (i = 0; i < TX_RING_SIZE; i++) {
  299. leptr = LANCE_ADDR(aib + libbuff_offset(tx_buf, i));
  300. ib->btx_ring [i].tmd0 = leptr;
  301. ib->btx_ring [i].tmd1_hadr = leptr >> 16;
  302. ib->btx_ring [i].tmd1_bits = 0;
  303. ib->btx_ring [i].length = 0xf000; /* The ones required by tmd2 */
  304. ib->btx_ring [i].misc = 0;
  305. }
  306. /* Setup the Rx ring entries */
  307. for (i = 0; i < RX_RING_SIZE; i++) {
  308. leptr = LANCE_ADDR(aib + libbuff_offset(rx_buf, i));
  309. ib->brx_ring [i].rmd0 = leptr;
  310. ib->brx_ring [i].rmd1_hadr = leptr >> 16;
  311. ib->brx_ring [i].rmd1_bits = LE_R1_OWN;
  312. ib->brx_ring [i].length = -RX_BUFF_SIZE | 0xf000;
  313. ib->brx_ring [i].mblength = 0;
  314. }
  315. /* Setup the initialization block */
  316. /* Setup rx descriptor pointer */
  317. leptr = LANCE_ADDR(aib + libdesc_offset(brx_ring, 0));
  318. ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16);
  319. ib->rx_ptr = leptr;
  320. /* Setup tx descriptor pointer */
  321. leptr = LANCE_ADDR(aib + libdesc_offset(btx_ring, 0));
  322. ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16);
  323. ib->tx_ptr = leptr;
  324. }
  325. static void lance_init_ring_pio(struct net_device *dev)
  326. {
  327. struct lance_private *lp = netdev_priv(dev);
  328. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  329. u32 leptr;
  330. int i;
  331. /* Lock out other processes while setting up hardware */
  332. netif_stop_queue(dev);
  333. lp->rx_new = lp->tx_new = 0;
  334. lp->rx_old = lp->tx_old = 0;
  335. /* Copy the ethernet address to the lance init block
  336. * Note that on the sparc you need to swap the ethernet address.
  337. */
  338. sbus_writeb(dev->dev_addr[1], &ib->phys_addr[0]);
  339. sbus_writeb(dev->dev_addr[0], &ib->phys_addr[1]);
  340. sbus_writeb(dev->dev_addr[3], &ib->phys_addr[2]);
  341. sbus_writeb(dev->dev_addr[2], &ib->phys_addr[3]);
  342. sbus_writeb(dev->dev_addr[5], &ib->phys_addr[4]);
  343. sbus_writeb(dev->dev_addr[4], &ib->phys_addr[5]);
  344. /* Setup the Tx ring entries */
  345. for (i = 0; i < TX_RING_SIZE; i++) {
  346. leptr = libbuff_offset(tx_buf, i);
  347. sbus_writew(leptr, &ib->btx_ring [i].tmd0);
  348. sbus_writeb(leptr >> 16,&ib->btx_ring [i].tmd1_hadr);
  349. sbus_writeb(0, &ib->btx_ring [i].tmd1_bits);
  350. /* The ones required by tmd2 */
  351. sbus_writew(0xf000, &ib->btx_ring [i].length);
  352. sbus_writew(0, &ib->btx_ring [i].misc);
  353. }
  354. /* Setup the Rx ring entries */
  355. for (i = 0; i < RX_RING_SIZE; i++) {
  356. leptr = libbuff_offset(rx_buf, i);
  357. sbus_writew(leptr, &ib->brx_ring [i].rmd0);
  358. sbus_writeb(leptr >> 16,&ib->brx_ring [i].rmd1_hadr);
  359. sbus_writeb(LE_R1_OWN, &ib->brx_ring [i].rmd1_bits);
  360. sbus_writew(-RX_BUFF_SIZE|0xf000,
  361. &ib->brx_ring [i].length);
  362. sbus_writew(0, &ib->brx_ring [i].mblength);
  363. }
  364. /* Setup the initialization block */
  365. /* Setup rx descriptor pointer */
  366. leptr = libdesc_offset(brx_ring, 0);
  367. sbus_writew((LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16),
  368. &ib->rx_len);
  369. sbus_writew(leptr, &ib->rx_ptr);
  370. /* Setup tx descriptor pointer */
  371. leptr = libdesc_offset(btx_ring, 0);
  372. sbus_writew((LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16),
  373. &ib->tx_len);
  374. sbus_writew(leptr, &ib->tx_ptr);
  375. }
  376. static void init_restart_ledma(struct lance_private *lp)
  377. {
  378. u32 csr = sbus_readl(lp->dregs + DMA_CSR);
  379. if (!(csr & DMA_HNDL_ERROR)) {
  380. /* E-Cache draining */
  381. while (sbus_readl(lp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN)
  382. barrier();
  383. }
  384. csr = sbus_readl(lp->dregs + DMA_CSR);
  385. csr &= ~DMA_E_BURSTS;
  386. if (lp->burst_sizes & DMA_BURST32)
  387. csr |= DMA_E_BURST32;
  388. else
  389. csr |= DMA_E_BURST16;
  390. csr |= (DMA_DSBL_RD_DRN | DMA_DSBL_WR_INV | DMA_FIFO_INV);
  391. if (lp->tpe)
  392. csr |= DMA_EN_ENETAUI;
  393. else
  394. csr &= ~DMA_EN_ENETAUI;
  395. udelay(20);
  396. sbus_writel(csr, lp->dregs + DMA_CSR);
  397. udelay(200);
  398. }
  399. static int init_restart_lance(struct lance_private *lp)
  400. {
  401. u16 regval = 0;
  402. int i;
  403. if (lp->dregs)
  404. init_restart_ledma(lp);
  405. sbus_writew(LE_CSR0, lp->lregs + RAP);
  406. sbus_writew(LE_C0_INIT, lp->lregs + RDP);
  407. /* Wait for the lance to complete initialization */
  408. for (i = 0; i < 100; i++) {
  409. regval = sbus_readw(lp->lregs + RDP);
  410. if (regval & (LE_C0_ERR | LE_C0_IDON))
  411. break;
  412. barrier();
  413. }
  414. if (i == 100 || (regval & LE_C0_ERR)) {
  415. printk(KERN_ERR "LANCE unopened after %d ticks, csr0=%4.4x.\n",
  416. i, regval);
  417. if (lp->dregs)
  418. printk("dcsr=%8.8x\n", sbus_readl(lp->dregs + DMA_CSR));
  419. return -1;
  420. }
  421. /* Clear IDON by writing a "1", enable interrupts and start lance */
  422. sbus_writew(LE_C0_IDON, lp->lregs + RDP);
  423. sbus_writew(LE_C0_INEA | LE_C0_STRT, lp->lregs + RDP);
  424. if (lp->dregs) {
  425. u32 csr = sbus_readl(lp->dregs + DMA_CSR);
  426. csr |= DMA_INT_ENAB;
  427. sbus_writel(csr, lp->dregs + DMA_CSR);
  428. }
  429. return 0;
  430. }
  431. static void lance_rx_dvma(struct net_device *dev)
  432. {
  433. struct lance_private *lp = netdev_priv(dev);
  434. struct lance_init_block *ib = lp->init_block_mem;
  435. struct lance_rx_desc *rd;
  436. u8 bits;
  437. int len, entry = lp->rx_new;
  438. struct sk_buff *skb;
  439. for (rd = &ib->brx_ring [entry];
  440. !((bits = rd->rmd1_bits) & LE_R1_OWN);
  441. rd = &ib->brx_ring [entry]) {
  442. /* We got an incomplete frame? */
  443. if ((bits & LE_R1_POK) != LE_R1_POK) {
  444. dev->stats.rx_over_errors++;
  445. dev->stats.rx_errors++;
  446. } else if (bits & LE_R1_ERR) {
  447. /* Count only the end frame as a rx error,
  448. * not the beginning
  449. */
  450. if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++;
  451. if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++;
  452. if (bits & LE_R1_OFL) dev->stats.rx_over_errors++;
  453. if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++;
  454. if (bits & LE_R1_EOP) dev->stats.rx_errors++;
  455. } else {
  456. len = (rd->mblength & 0xfff) - 4;
  457. skb = netdev_alloc_skb(dev, len + 2);
  458. if (skb == NULL) {
  459. dev->stats.rx_dropped++;
  460. rd->mblength = 0;
  461. rd->rmd1_bits = LE_R1_OWN;
  462. lp->rx_new = RX_NEXT(entry);
  463. return;
  464. }
  465. dev->stats.rx_bytes += len;
  466. skb_reserve(skb, 2); /* 16 byte align */
  467. skb_put(skb, len); /* make room */
  468. skb_copy_to_linear_data(skb,
  469. (unsigned char *)&(ib->rx_buf [entry][0]),
  470. len);
  471. skb->protocol = eth_type_trans(skb, dev);
  472. netif_rx(skb);
  473. dev->stats.rx_packets++;
  474. }
  475. /* Return the packet to the pool */
  476. rd->mblength = 0;
  477. rd->rmd1_bits = LE_R1_OWN;
  478. entry = RX_NEXT(entry);
  479. }
  480. lp->rx_new = entry;
  481. }
  482. static void lance_tx_dvma(struct net_device *dev)
  483. {
  484. struct lance_private *lp = netdev_priv(dev);
  485. struct lance_init_block *ib = lp->init_block_mem;
  486. int i, j;
  487. spin_lock(&lp->lock);
  488. j = lp->tx_old;
  489. for (i = j; i != lp->tx_new; i = j) {
  490. struct lance_tx_desc *td = &ib->btx_ring [i];
  491. u8 bits = td->tmd1_bits;
  492. /* If we hit a packet not owned by us, stop */
  493. if (bits & LE_T1_OWN)
  494. break;
  495. if (bits & LE_T1_ERR) {
  496. u16 status = td->misc;
  497. dev->stats.tx_errors++;
  498. if (status & LE_T3_RTY) dev->stats.tx_aborted_errors++;
  499. if (status & LE_T3_LCOL) dev->stats.tx_window_errors++;
  500. if (status & LE_T3_CLOS) {
  501. dev->stats.tx_carrier_errors++;
  502. if (lp->auto_select) {
  503. lp->tpe = 1 - lp->tpe;
  504. printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
  505. dev->name, lp->tpe?"TPE":"AUI");
  506. STOP_LANCE(lp);
  507. lp->init_ring(dev);
  508. load_csrs(lp);
  509. init_restart_lance(lp);
  510. goto out;
  511. }
  512. }
  513. /* Buffer errors and underflows turn off the
  514. * transmitter, restart the adapter.
  515. */
  516. if (status & (LE_T3_BUF|LE_T3_UFL)) {
  517. dev->stats.tx_fifo_errors++;
  518. printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
  519. dev->name);
  520. STOP_LANCE(lp);
  521. lp->init_ring(dev);
  522. load_csrs(lp);
  523. init_restart_lance(lp);
  524. goto out;
  525. }
  526. } else if ((bits & LE_T1_POK) == LE_T1_POK) {
  527. /*
  528. * So we don't count the packet more than once.
  529. */
  530. td->tmd1_bits = bits & ~(LE_T1_POK);
  531. /* One collision before packet was sent. */
  532. if (bits & LE_T1_EONE)
  533. dev->stats.collisions++;
  534. /* More than one collision, be optimistic. */
  535. if (bits & LE_T1_EMORE)
  536. dev->stats.collisions += 2;
  537. dev->stats.tx_packets++;
  538. }
  539. j = TX_NEXT(j);
  540. }
  541. lp->tx_old = j;
  542. out:
  543. if (netif_queue_stopped(dev) &&
  544. TX_BUFFS_AVAIL > 0)
  545. netif_wake_queue(dev);
  546. spin_unlock(&lp->lock);
  547. }
  548. static void lance_piocopy_to_skb(struct sk_buff *skb, void __iomem *piobuf, int len)
  549. {
  550. u16 *p16 = (u16 *) skb->data;
  551. u32 *p32;
  552. u8 *p8;
  553. void __iomem *pbuf = piobuf;
  554. /* We know here that both src and dest are on a 16bit boundary. */
  555. *p16++ = sbus_readw(pbuf);
  556. p32 = (u32 *) p16;
  557. pbuf += 2;
  558. len -= 2;
  559. while (len >= 4) {
  560. *p32++ = sbus_readl(pbuf);
  561. pbuf += 4;
  562. len -= 4;
  563. }
  564. p8 = (u8 *) p32;
  565. if (len >= 2) {
  566. p16 = (u16 *) p32;
  567. *p16++ = sbus_readw(pbuf);
  568. pbuf += 2;
  569. len -= 2;
  570. p8 = (u8 *) p16;
  571. }
  572. if (len >= 1)
  573. *p8 = sbus_readb(pbuf);
  574. }
  575. static void lance_rx_pio(struct net_device *dev)
  576. {
  577. struct lance_private *lp = netdev_priv(dev);
  578. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  579. struct lance_rx_desc __iomem *rd;
  580. unsigned char bits;
  581. int len, entry;
  582. struct sk_buff *skb;
  583. entry = lp->rx_new;
  584. for (rd = &ib->brx_ring [entry];
  585. !((bits = sbus_readb(&rd->rmd1_bits)) & LE_R1_OWN);
  586. rd = &ib->brx_ring [entry]) {
  587. /* We got an incomplete frame? */
  588. if ((bits & LE_R1_POK) != LE_R1_POK) {
  589. dev->stats.rx_over_errors++;
  590. dev->stats.rx_errors++;
  591. } else if (bits & LE_R1_ERR) {
  592. /* Count only the end frame as a rx error,
  593. * not the beginning
  594. */
  595. if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++;
  596. if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++;
  597. if (bits & LE_R1_OFL) dev->stats.rx_over_errors++;
  598. if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++;
  599. if (bits & LE_R1_EOP) dev->stats.rx_errors++;
  600. } else {
  601. len = (sbus_readw(&rd->mblength) & 0xfff) - 4;
  602. skb = netdev_alloc_skb(dev, len + 2);
  603. if (skb == NULL) {
  604. dev->stats.rx_dropped++;
  605. sbus_writew(0, &rd->mblength);
  606. sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
  607. lp->rx_new = RX_NEXT(entry);
  608. return;
  609. }
  610. dev->stats.rx_bytes += len;
  611. skb_reserve (skb, 2); /* 16 byte align */
  612. skb_put(skb, len); /* make room */
  613. lance_piocopy_to_skb(skb, &(ib->rx_buf[entry][0]), len);
  614. skb->protocol = eth_type_trans(skb, dev);
  615. netif_rx(skb);
  616. dev->stats.rx_packets++;
  617. }
  618. /* Return the packet to the pool */
  619. sbus_writew(0, &rd->mblength);
  620. sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
  621. entry = RX_NEXT(entry);
  622. }
  623. lp->rx_new = entry;
  624. }
  625. static void lance_tx_pio(struct net_device *dev)
  626. {
  627. struct lance_private *lp = netdev_priv(dev);
  628. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  629. int i, j;
  630. spin_lock(&lp->lock);
  631. j = lp->tx_old;
  632. for (i = j; i != lp->tx_new; i = j) {
  633. struct lance_tx_desc __iomem *td = &ib->btx_ring [i];
  634. u8 bits = sbus_readb(&td->tmd1_bits);
  635. /* If we hit a packet not owned by us, stop */
  636. if (bits & LE_T1_OWN)
  637. break;
  638. if (bits & LE_T1_ERR) {
  639. u16 status = sbus_readw(&td->misc);
  640. dev->stats.tx_errors++;
  641. if (status & LE_T3_RTY) dev->stats.tx_aborted_errors++;
  642. if (status & LE_T3_LCOL) dev->stats.tx_window_errors++;
  643. if (status & LE_T3_CLOS) {
  644. dev->stats.tx_carrier_errors++;
  645. if (lp->auto_select) {
  646. lp->tpe = 1 - lp->tpe;
  647. printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
  648. dev->name, lp->tpe?"TPE":"AUI");
  649. STOP_LANCE(lp);
  650. lp->init_ring(dev);
  651. load_csrs(lp);
  652. init_restart_lance(lp);
  653. goto out;
  654. }
  655. }
  656. /* Buffer errors and underflows turn off the
  657. * transmitter, restart the adapter.
  658. */
  659. if (status & (LE_T3_BUF|LE_T3_UFL)) {
  660. dev->stats.tx_fifo_errors++;
  661. printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
  662. dev->name);
  663. STOP_LANCE(lp);
  664. lp->init_ring(dev);
  665. load_csrs(lp);
  666. init_restart_lance(lp);
  667. goto out;
  668. }
  669. } else if ((bits & LE_T1_POK) == LE_T1_POK) {
  670. /*
  671. * So we don't count the packet more than once.
  672. */
  673. sbus_writeb(bits & ~(LE_T1_POK), &td->tmd1_bits);
  674. /* One collision before packet was sent. */
  675. if (bits & LE_T1_EONE)
  676. dev->stats.collisions++;
  677. /* More than one collision, be optimistic. */
  678. if (bits & LE_T1_EMORE)
  679. dev->stats.collisions += 2;
  680. dev->stats.tx_packets++;
  681. }
  682. j = TX_NEXT(j);
  683. }
  684. lp->tx_old = j;
  685. if (netif_queue_stopped(dev) &&
  686. TX_BUFFS_AVAIL > 0)
  687. netif_wake_queue(dev);
  688. out:
  689. spin_unlock(&lp->lock);
  690. }
  691. static irqreturn_t lance_interrupt(int irq, void *dev_id)
  692. {
  693. struct net_device *dev = dev_id;
  694. struct lance_private *lp = netdev_priv(dev);
  695. int csr0;
  696. sbus_writew(LE_CSR0, lp->lregs + RAP);
  697. csr0 = sbus_readw(lp->lregs + RDP);
  698. /* Acknowledge all the interrupt sources ASAP */
  699. sbus_writew(csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT),
  700. lp->lregs + RDP);
  701. if ((csr0 & LE_C0_ERR) != 0) {
  702. /* Clear the error condition */
  703. sbus_writew((LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
  704. LE_C0_CERR | LE_C0_MERR),
  705. lp->lregs + RDP);
  706. }
  707. if (csr0 & LE_C0_RINT)
  708. lp->rx(dev);
  709. if (csr0 & LE_C0_TINT)
  710. lp->tx(dev);
  711. if (csr0 & LE_C0_BABL)
  712. dev->stats.tx_errors++;
  713. if (csr0 & LE_C0_MISS)
  714. dev->stats.rx_errors++;
  715. if (csr0 & LE_C0_MERR) {
  716. if (lp->dregs) {
  717. u32 addr = sbus_readl(lp->dregs + DMA_ADDR);
  718. printk(KERN_ERR "%s: Memory error, status %04x, addr %06x\n",
  719. dev->name, csr0, addr & 0xffffff);
  720. } else {
  721. printk(KERN_ERR "%s: Memory error, status %04x\n",
  722. dev->name, csr0);
  723. }
  724. sbus_writew(LE_C0_STOP, lp->lregs + RDP);
  725. if (lp->dregs) {
  726. u32 dma_csr = sbus_readl(lp->dregs + DMA_CSR);
  727. dma_csr |= DMA_FIFO_INV;
  728. sbus_writel(dma_csr, lp->dregs + DMA_CSR);
  729. }
  730. lp->init_ring(dev);
  731. load_csrs(lp);
  732. init_restart_lance(lp);
  733. netif_wake_queue(dev);
  734. }
  735. sbus_writew(LE_C0_INEA, lp->lregs + RDP);
  736. return IRQ_HANDLED;
  737. }
  738. /* Build a fake network packet and send it to ourselves. */
  739. static void build_fake_packet(struct lance_private *lp)
  740. {
  741. struct net_device *dev = lp->dev;
  742. int i, entry;
  743. entry = lp->tx_new & TX_RING_MOD_MASK;
  744. if (lp->pio_buffer) {
  745. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  746. u16 __iomem *packet = (u16 __iomem *) &(ib->tx_buf[entry][0]);
  747. struct ethhdr __iomem *eth = (struct ethhdr __iomem *) packet;
  748. for (i = 0; i < (ETH_ZLEN / sizeof(u16)); i++)
  749. sbus_writew(0, &packet[i]);
  750. for (i = 0; i < 6; i++) {
  751. sbus_writeb(dev->dev_addr[i], &eth->h_dest[i]);
  752. sbus_writeb(dev->dev_addr[i], &eth->h_source[i]);
  753. }
  754. sbus_writew((-ETH_ZLEN) | 0xf000, &ib->btx_ring[entry].length);
  755. sbus_writew(0, &ib->btx_ring[entry].misc);
  756. sbus_writeb(LE_T1_POK|LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
  757. } else {
  758. struct lance_init_block *ib = lp->init_block_mem;
  759. u16 *packet = (u16 *) &(ib->tx_buf[entry][0]);
  760. struct ethhdr *eth = (struct ethhdr *) packet;
  761. memset(packet, 0, ETH_ZLEN);
  762. for (i = 0; i < 6; i++) {
  763. eth->h_dest[i] = dev->dev_addr[i];
  764. eth->h_source[i] = dev->dev_addr[i];
  765. }
  766. ib->btx_ring[entry].length = (-ETH_ZLEN) | 0xf000;
  767. ib->btx_ring[entry].misc = 0;
  768. ib->btx_ring[entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN);
  769. }
  770. lp->tx_new = TX_NEXT(entry);
  771. }
  772. static int lance_open(struct net_device *dev)
  773. {
  774. struct lance_private *lp = netdev_priv(dev);
  775. int status = 0;
  776. STOP_LANCE(lp);
  777. if (request_irq(dev->irq, lance_interrupt, IRQF_SHARED,
  778. lancestr, (void *) dev)) {
  779. printk(KERN_ERR "Lance: Can't get irq %d\n", dev->irq);
  780. return -EAGAIN;
  781. }
  782. /* On the 4m, setup the ledma to provide the upper bits for buffers */
  783. if (lp->dregs) {
  784. u32 regval = lp->init_block_dvma & 0xff000000;
  785. sbus_writel(regval, lp->dregs + DMA_TEST);
  786. }
  787. /* Set mode and clear multicast filter only at device open,
  788. * so that lance_init_ring() called at any error will not
  789. * forget multicast filters.
  790. *
  791. * BTW it is common bug in all lance drivers! --ANK
  792. */
  793. if (lp->pio_buffer) {
  794. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  795. sbus_writew(0, &ib->mode);
  796. sbus_writel(0, &ib->filter[0]);
  797. sbus_writel(0, &ib->filter[1]);
  798. } else {
  799. struct lance_init_block *ib = lp->init_block_mem;
  800. ib->mode = 0;
  801. ib->filter [0] = 0;
  802. ib->filter [1] = 0;
  803. }
  804. lp->init_ring(dev);
  805. load_csrs(lp);
  806. netif_start_queue(dev);
  807. status = init_restart_lance(lp);
  808. if (!status && lp->auto_select) {
  809. build_fake_packet(lp);
  810. sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
  811. }
  812. return status;
  813. }
  814. static int lance_close(struct net_device *dev)
  815. {
  816. struct lance_private *lp = netdev_priv(dev);
  817. netif_stop_queue(dev);
  818. del_timer_sync(&lp->multicast_timer);
  819. STOP_LANCE(lp);
  820. free_irq(dev->irq, (void *) dev);
  821. return 0;
  822. }
  823. static int lance_reset(struct net_device *dev)
  824. {
  825. struct lance_private *lp = netdev_priv(dev);
  826. int status;
  827. STOP_LANCE(lp);
  828. /* On the 4m, reset the dma too */
  829. if (lp->dregs) {
  830. u32 csr, addr;
  831. printk(KERN_ERR "resetting ledma\n");
  832. csr = sbus_readl(lp->dregs + DMA_CSR);
  833. sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
  834. udelay(200);
  835. sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
  836. addr = lp->init_block_dvma & 0xff000000;
  837. sbus_writel(addr, lp->dregs + DMA_TEST);
  838. }
  839. lp->init_ring(dev);
  840. load_csrs(lp);
  841. dev->trans_start = jiffies; /* prevent tx timeout */
  842. status = init_restart_lance(lp);
  843. return status;
  844. }
  845. static void lance_piocopy_from_skb(void __iomem *dest, unsigned char *src, int len)
  846. {
  847. void __iomem *piobuf = dest;
  848. u32 *p32;
  849. u16 *p16;
  850. u8 *p8;
  851. switch ((unsigned long)src & 0x3) {
  852. case 0:
  853. p32 = (u32 *) src;
  854. while (len >= 4) {
  855. sbus_writel(*p32, piobuf);
  856. p32++;
  857. piobuf += 4;
  858. len -= 4;
  859. }
  860. src = (char *) p32;
  861. break;
  862. case 1:
  863. case 3:
  864. p8 = (u8 *) src;
  865. while (len >= 4) {
  866. u32 val;
  867. val = p8[0] << 24;
  868. val |= p8[1] << 16;
  869. val |= p8[2] << 8;
  870. val |= p8[3];
  871. sbus_writel(val, piobuf);
  872. p8 += 4;
  873. piobuf += 4;
  874. len -= 4;
  875. }
  876. src = (char *) p8;
  877. break;
  878. case 2:
  879. p16 = (u16 *) src;
  880. while (len >= 4) {
  881. u32 val = p16[0]<<16 | p16[1];
  882. sbus_writel(val, piobuf);
  883. p16 += 2;
  884. piobuf += 4;
  885. len -= 4;
  886. }
  887. src = (char *) p16;
  888. break;
  889. }
  890. if (len >= 2) {
  891. u16 val = src[0] << 8 | src[1];
  892. sbus_writew(val, piobuf);
  893. src += 2;
  894. piobuf += 2;
  895. len -= 2;
  896. }
  897. if (len >= 1)
  898. sbus_writeb(src[0], piobuf);
  899. }
  900. static void lance_piozero(void __iomem *dest, int len)
  901. {
  902. void __iomem *piobuf = dest;
  903. if ((unsigned long)piobuf & 1) {
  904. sbus_writeb(0, piobuf);
  905. piobuf += 1;
  906. len -= 1;
  907. if (len == 0)
  908. return;
  909. }
  910. if (len == 1) {
  911. sbus_writeb(0, piobuf);
  912. return;
  913. }
  914. if ((unsigned long)piobuf & 2) {
  915. sbus_writew(0, piobuf);
  916. piobuf += 2;
  917. len -= 2;
  918. if (len == 0)
  919. return;
  920. }
  921. while (len >= 4) {
  922. sbus_writel(0, piobuf);
  923. piobuf += 4;
  924. len -= 4;
  925. }
  926. if (len >= 2) {
  927. sbus_writew(0, piobuf);
  928. piobuf += 2;
  929. len -= 2;
  930. }
  931. if (len >= 1)
  932. sbus_writeb(0, piobuf);
  933. }
  934. static void lance_tx_timeout(struct net_device *dev)
  935. {
  936. struct lance_private *lp = netdev_priv(dev);
  937. printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n",
  938. dev->name, sbus_readw(lp->lregs + RDP));
  939. lance_reset(dev);
  940. netif_wake_queue(dev);
  941. }
  942. static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
  943. {
  944. struct lance_private *lp = netdev_priv(dev);
  945. int entry, skblen, len;
  946. skblen = skb->len;
  947. len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
  948. spin_lock_irq(&lp->lock);
  949. dev->stats.tx_bytes += len;
  950. entry = lp->tx_new & TX_RING_MOD_MASK;
  951. if (lp->pio_buffer) {
  952. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  953. sbus_writew((-len) | 0xf000, &ib->btx_ring[entry].length);
  954. sbus_writew(0, &ib->btx_ring[entry].misc);
  955. lance_piocopy_from_skb(&ib->tx_buf[entry][0], skb->data, skblen);
  956. if (len != skblen)
  957. lance_piozero(&ib->tx_buf[entry][skblen], len - skblen);
  958. sbus_writeb(LE_T1_POK | LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
  959. } else {
  960. struct lance_init_block *ib = lp->init_block_mem;
  961. ib->btx_ring [entry].length = (-len) | 0xf000;
  962. ib->btx_ring [entry].misc = 0;
  963. skb_copy_from_linear_data(skb, &ib->tx_buf [entry][0], skblen);
  964. if (len != skblen)
  965. memset((char *) &ib->tx_buf [entry][skblen], 0, len - skblen);
  966. ib->btx_ring [entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN);
  967. }
  968. lp->tx_new = TX_NEXT(entry);
  969. if (TX_BUFFS_AVAIL <= 0)
  970. netif_stop_queue(dev);
  971. /* Kick the lance: transmit now */
  972. sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
  973. /* Read back CSR to invalidate the E-Cache.
  974. * This is needed, because DMA_DSBL_WR_INV is set.
  975. */
  976. if (lp->dregs)
  977. sbus_readw(lp->lregs + RDP);
  978. spin_unlock_irq(&lp->lock);
  979. dev_kfree_skb(skb);
  980. return NETDEV_TX_OK;
  981. }
  982. /* taken from the depca driver */
  983. static void lance_load_multicast(struct net_device *dev)
  984. {
  985. struct lance_private *lp = netdev_priv(dev);
  986. struct netdev_hw_addr *ha;
  987. u32 crc;
  988. u32 val;
  989. /* set all multicast bits */
  990. if (dev->flags & IFF_ALLMULTI)
  991. val = ~0;
  992. else
  993. val = 0;
  994. if (lp->pio_buffer) {
  995. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  996. sbus_writel(val, &ib->filter[0]);
  997. sbus_writel(val, &ib->filter[1]);
  998. } else {
  999. struct lance_init_block *ib = lp->init_block_mem;
  1000. ib->filter [0] = val;
  1001. ib->filter [1] = val;
  1002. }
  1003. if (dev->flags & IFF_ALLMULTI)
  1004. return;
  1005. /* Add addresses */
  1006. netdev_for_each_mc_addr(ha, dev) {
  1007. crc = ether_crc_le(6, ha->addr);
  1008. crc = crc >> 26;
  1009. if (lp->pio_buffer) {
  1010. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  1011. u16 __iomem *mcast_table = (u16 __iomem *) &ib->filter;
  1012. u16 tmp = sbus_readw(&mcast_table[crc>>4]);
  1013. tmp |= 1 << (crc & 0xf);
  1014. sbus_writew(tmp, &mcast_table[crc>>4]);
  1015. } else {
  1016. struct lance_init_block *ib = lp->init_block_mem;
  1017. u16 *mcast_table = (u16 *) &ib->filter;
  1018. mcast_table [crc >> 4] |= 1 << (crc & 0xf);
  1019. }
  1020. }
  1021. }
  1022. static void lance_set_multicast(struct net_device *dev)
  1023. {
  1024. struct lance_private *lp = netdev_priv(dev);
  1025. struct lance_init_block *ib_mem = lp->init_block_mem;
  1026. struct lance_init_block __iomem *ib_iomem = lp->init_block_iomem;
  1027. u16 mode;
  1028. if (!netif_running(dev))
  1029. return;
  1030. if (lp->tx_old != lp->tx_new) {
  1031. mod_timer(&lp->multicast_timer, jiffies + 4);
  1032. netif_wake_queue(dev);
  1033. return;
  1034. }
  1035. netif_stop_queue(dev);
  1036. STOP_LANCE(lp);
  1037. lp->init_ring(dev);
  1038. if (lp->pio_buffer)
  1039. mode = sbus_readw(&ib_iomem->mode);
  1040. else
  1041. mode = ib_mem->mode;
  1042. if (dev->flags & IFF_PROMISC) {
  1043. mode |= LE_MO_PROM;
  1044. if (lp->pio_buffer)
  1045. sbus_writew(mode, &ib_iomem->mode);
  1046. else
  1047. ib_mem->mode = mode;
  1048. } else {
  1049. mode &= ~LE_MO_PROM;
  1050. if (lp->pio_buffer)
  1051. sbus_writew(mode, &ib_iomem->mode);
  1052. else
  1053. ib_mem->mode = mode;
  1054. lance_load_multicast(dev);
  1055. }
  1056. load_csrs(lp);
  1057. init_restart_lance(lp);
  1058. netif_wake_queue(dev);
  1059. }
  1060. static void lance_set_multicast_retry(unsigned long _opaque)
  1061. {
  1062. struct net_device *dev = (struct net_device *) _opaque;
  1063. lance_set_multicast(dev);
  1064. }
  1065. static void lance_free_hwresources(struct lance_private *lp)
  1066. {
  1067. if (lp->lregs)
  1068. of_iounmap(&lp->op->resource[0], lp->lregs, LANCE_REG_SIZE);
  1069. if (lp->dregs) {
  1070. struct platform_device *ledma = lp->ledma;
  1071. of_iounmap(&ledma->resource[0], lp->dregs,
  1072. resource_size(&ledma->resource[0]));
  1073. }
  1074. if (lp->init_block_iomem) {
  1075. of_iounmap(&lp->lebuffer->resource[0], lp->init_block_iomem,
  1076. sizeof(struct lance_init_block));
  1077. } else if (lp->init_block_mem) {
  1078. dma_free_coherent(&lp->op->dev,
  1079. sizeof(struct lance_init_block),
  1080. lp->init_block_mem,
  1081. lp->init_block_dvma);
  1082. }
  1083. }
  1084. /* Ethtool support... */
  1085. static void sparc_lance_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  1086. {
  1087. strlcpy(info->driver, "sunlance", sizeof(info->driver));
  1088. strlcpy(info->version, "2.02", sizeof(info->version));
  1089. }
  1090. static const struct ethtool_ops sparc_lance_ethtool_ops = {
  1091. .get_drvinfo = sparc_lance_get_drvinfo,
  1092. .get_link = ethtool_op_get_link,
  1093. };
  1094. static const struct net_device_ops sparc_lance_ops = {
  1095. .ndo_open = lance_open,
  1096. .ndo_stop = lance_close,
  1097. .ndo_start_xmit = lance_start_xmit,
  1098. .ndo_set_rx_mode = lance_set_multicast,
  1099. .ndo_tx_timeout = lance_tx_timeout,
  1100. .ndo_change_mtu = eth_change_mtu,
  1101. .ndo_set_mac_address = eth_mac_addr,
  1102. .ndo_validate_addr = eth_validate_addr,
  1103. };
  1104. static int sparc_lance_probe_one(struct platform_device *op,
  1105. struct platform_device *ledma,
  1106. struct platform_device *lebuffer)
  1107. {
  1108. struct device_node *dp = op->dev.of_node;
  1109. static unsigned version_printed;
  1110. struct lance_private *lp;
  1111. struct net_device *dev;
  1112. int i;
  1113. dev = alloc_etherdev(sizeof(struct lance_private) + 8);
  1114. if (!dev)
  1115. return -ENOMEM;
  1116. lp = netdev_priv(dev);
  1117. if (sparc_lance_debug && version_printed++ == 0)
  1118. printk (KERN_INFO "%s", version);
  1119. spin_lock_init(&lp->lock);
  1120. /* Copy the IDPROM ethernet address to the device structure, later we
  1121. * will copy the address in the device structure to the lance
  1122. * initialization block.
  1123. */
  1124. for (i = 0; i < 6; i++)
  1125. dev->dev_addr[i] = idprom->id_ethaddr[i];
  1126. /* Get the IO region */
  1127. lp->lregs = of_ioremap(&op->resource[0], 0,
  1128. LANCE_REG_SIZE, lancestr);
  1129. if (!lp->lregs) {
  1130. printk(KERN_ERR "SunLance: Cannot map registers.\n");
  1131. goto fail;
  1132. }
  1133. lp->ledma = ledma;
  1134. if (lp->ledma) {
  1135. lp->dregs = of_ioremap(&ledma->resource[0], 0,
  1136. resource_size(&ledma->resource[0]),
  1137. "ledma");
  1138. if (!lp->dregs) {
  1139. printk(KERN_ERR "SunLance: Cannot map "
  1140. "ledma registers.\n");
  1141. goto fail;
  1142. }
  1143. }
  1144. lp->op = op;
  1145. lp->lebuffer = lebuffer;
  1146. if (lebuffer) {
  1147. /* sanity check */
  1148. if (lebuffer->resource[0].start & 7) {
  1149. printk(KERN_ERR "SunLance: ERROR: Rx and Tx rings not on even boundary.\n");
  1150. goto fail;
  1151. }
  1152. lp->init_block_iomem =
  1153. of_ioremap(&lebuffer->resource[0], 0,
  1154. sizeof(struct lance_init_block), "lebuffer");
  1155. if (!lp->init_block_iomem) {
  1156. printk(KERN_ERR "SunLance: Cannot map PIO buffer.\n");
  1157. goto fail;
  1158. }
  1159. lp->init_block_dvma = 0;
  1160. lp->pio_buffer = 1;
  1161. lp->init_ring = lance_init_ring_pio;
  1162. lp->rx = lance_rx_pio;
  1163. lp->tx = lance_tx_pio;
  1164. } else {
  1165. lp->init_block_mem =
  1166. dma_alloc_coherent(&op->dev,
  1167. sizeof(struct lance_init_block),
  1168. &lp->init_block_dvma, GFP_ATOMIC);
  1169. if (!lp->init_block_mem)
  1170. goto fail;
  1171. lp->pio_buffer = 0;
  1172. lp->init_ring = lance_init_ring_dvma;
  1173. lp->rx = lance_rx_dvma;
  1174. lp->tx = lance_tx_dvma;
  1175. }
  1176. lp->busmaster_regval = of_getintprop_default(dp, "busmaster-regval",
  1177. (LE_C3_BSWP |
  1178. LE_C3_ACON |
  1179. LE_C3_BCON));
  1180. lp->name = lancestr;
  1181. lp->burst_sizes = 0;
  1182. if (lp->ledma) {
  1183. struct device_node *ledma_dp = ledma->dev.of_node;
  1184. struct device_node *sbus_dp;
  1185. unsigned int sbmask;
  1186. const char *prop;
  1187. u32 csr;
  1188. /* Find burst-size property for ledma */
  1189. lp->burst_sizes = of_getintprop_default(ledma_dp,
  1190. "burst-sizes", 0);
  1191. /* ledma may be capable of fast bursts, but sbus may not. */
  1192. sbus_dp = ledma_dp->parent;
  1193. sbmask = of_getintprop_default(sbus_dp, "burst-sizes",
  1194. DMA_BURSTBITS);
  1195. lp->burst_sizes &= sbmask;
  1196. /* Get the cable-selection property */
  1197. prop = of_get_property(ledma_dp, "cable-selection", NULL);
  1198. if (!prop || prop[0] == '\0') {
  1199. struct device_node *nd;
  1200. printk(KERN_INFO "SunLance: using "
  1201. "auto-carrier-detection.\n");
  1202. nd = of_find_node_by_path("/options");
  1203. if (!nd)
  1204. goto no_link_test;
  1205. prop = of_get_property(nd, "tpe-link-test?", NULL);
  1206. if (!prop)
  1207. goto no_link_test;
  1208. if (strcmp(prop, "true")) {
  1209. printk(KERN_NOTICE "SunLance: warning: overriding option "
  1210. "'tpe-link-test?'\n");
  1211. printk(KERN_NOTICE "SunLance: warning: mail any problems "
  1212. "to ecd@skynet.be\n");
  1213. auxio_set_lte(AUXIO_LTE_ON);
  1214. }
  1215. no_link_test:
  1216. lp->auto_select = 1;
  1217. lp->tpe = 0;
  1218. } else if (!strcmp(prop, "aui")) {
  1219. lp->auto_select = 0;
  1220. lp->tpe = 0;
  1221. } else {
  1222. lp->auto_select = 0;
  1223. lp->tpe = 1;
  1224. }
  1225. /* Reset ledma */
  1226. csr = sbus_readl(lp->dregs + DMA_CSR);
  1227. sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
  1228. udelay(200);
  1229. sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
  1230. } else
  1231. lp->dregs = NULL;
  1232. lp->dev = dev;
  1233. SET_NETDEV_DEV(dev, &op->dev);
  1234. dev->watchdog_timeo = 5*HZ;
  1235. dev->ethtool_ops = &sparc_lance_ethtool_ops;
  1236. dev->netdev_ops = &sparc_lance_ops;
  1237. dev->irq = op->archdata.irqs[0];
  1238. /* We cannot sleep if the chip is busy during a
  1239. * multicast list update event, because such events
  1240. * can occur from interrupts (ex. IPv6). So we
  1241. * use a timer to try again later when necessary. -DaveM
  1242. */
  1243. init_timer(&lp->multicast_timer);
  1244. lp->multicast_timer.data = (unsigned long) dev;
  1245. lp->multicast_timer.function = lance_set_multicast_retry;
  1246. if (register_netdev(dev)) {
  1247. printk(KERN_ERR "SunLance: Cannot register device.\n");
  1248. goto fail;
  1249. }
  1250. platform_set_drvdata(op, lp);
  1251. printk(KERN_INFO "%s: LANCE %pM\n",
  1252. dev->name, dev->dev_addr);
  1253. return 0;
  1254. fail:
  1255. lance_free_hwresources(lp);
  1256. free_netdev(dev);
  1257. return -ENODEV;
  1258. }
  1259. static int sunlance_sbus_probe(struct platform_device *op)
  1260. {
  1261. struct platform_device *parent = to_platform_device(op->dev.parent);
  1262. struct device_node *parent_dp = parent->dev.of_node;
  1263. int err;
  1264. if (!strcmp(parent_dp->name, "ledma")) {
  1265. err = sparc_lance_probe_one(op, parent, NULL);
  1266. } else if (!strcmp(parent_dp->name, "lebuffer")) {
  1267. err = sparc_lance_probe_one(op, NULL, parent);
  1268. } else
  1269. err = sparc_lance_probe_one(op, NULL, NULL);
  1270. return err;
  1271. }
  1272. static int sunlance_sbus_remove(struct platform_device *op)
  1273. {
  1274. struct lance_private *lp = platform_get_drvdata(op);
  1275. struct net_device *net_dev = lp->dev;
  1276. unregister_netdev(net_dev);
  1277. lance_free_hwresources(lp);
  1278. free_netdev(net_dev);
  1279. return 0;
  1280. }
  1281. static const struct of_device_id sunlance_sbus_match[] = {
  1282. {
  1283. .name = "le",
  1284. },
  1285. {},
  1286. };
  1287. MODULE_DEVICE_TABLE(of, sunlance_sbus_match);
  1288. static struct platform_driver sunlance_sbus_driver = {
  1289. .driver = {
  1290. .name = "sunlance",
  1291. .owner = THIS_MODULE,
  1292. .of_match_table = sunlance_sbus_match,
  1293. },
  1294. .probe = sunlance_sbus_probe,
  1295. .remove = sunlance_sbus_remove,
  1296. };
  1297. module_platform_driver(sunlance_sbus_driver);