c_can.h 5.0 KB

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  1. /*
  2. * CAN bus driver for Bosch C_CAN controller
  3. *
  4. * Copyright (C) 2010 ST Microelectronics
  5. * Bhupesh Sharma <bhupesh.sharma@st.com>
  6. *
  7. * Borrowed heavily from the C_CAN driver originally written by:
  8. * Copyright (C) 2007
  9. * - Sascha Hauer, Marc Kleine-Budde, Pengutronix <s.hauer@pengutronix.de>
  10. * - Simon Kallweit, intefo AG <simon.kallweit@intefo.ch>
  11. *
  12. * Bosch C_CAN controller is compliant to CAN protocol version 2.0 part A and B.
  13. * Bosch C_CAN user manual can be obtained from:
  14. * http://www.semiconductors.bosch.de/media/en/pdf/ipmodules_1/c_can/
  15. * users_manual_c_can.pdf
  16. *
  17. * This file is licensed under the terms of the GNU General Public
  18. * License version 2. This program is licensed "as is" without any
  19. * warranty of any kind, whether express or implied.
  20. */
  21. #ifndef C_CAN_H
  22. #define C_CAN_H
  23. enum reg {
  24. C_CAN_CTRL_REG = 0,
  25. C_CAN_CTRL_EX_REG,
  26. C_CAN_STS_REG,
  27. C_CAN_ERR_CNT_REG,
  28. C_CAN_BTR_REG,
  29. C_CAN_INT_REG,
  30. C_CAN_TEST_REG,
  31. C_CAN_BRPEXT_REG,
  32. C_CAN_IF1_COMREQ_REG,
  33. C_CAN_IF1_COMMSK_REG,
  34. C_CAN_IF1_MASK1_REG,
  35. C_CAN_IF1_MASK2_REG,
  36. C_CAN_IF1_ARB1_REG,
  37. C_CAN_IF1_ARB2_REG,
  38. C_CAN_IF1_MSGCTRL_REG,
  39. C_CAN_IF1_DATA1_REG,
  40. C_CAN_IF1_DATA2_REG,
  41. C_CAN_IF1_DATA3_REG,
  42. C_CAN_IF1_DATA4_REG,
  43. C_CAN_IF2_COMREQ_REG,
  44. C_CAN_IF2_COMMSK_REG,
  45. C_CAN_IF2_MASK1_REG,
  46. C_CAN_IF2_MASK2_REG,
  47. C_CAN_IF2_ARB1_REG,
  48. C_CAN_IF2_ARB2_REG,
  49. C_CAN_IF2_MSGCTRL_REG,
  50. C_CAN_IF2_DATA1_REG,
  51. C_CAN_IF2_DATA2_REG,
  52. C_CAN_IF2_DATA3_REG,
  53. C_CAN_IF2_DATA4_REG,
  54. C_CAN_TXRQST1_REG,
  55. C_CAN_TXRQST2_REG,
  56. C_CAN_NEWDAT1_REG,
  57. C_CAN_NEWDAT2_REG,
  58. C_CAN_INTPND1_REG,
  59. C_CAN_INTPND2_REG,
  60. C_CAN_MSGVAL1_REG,
  61. C_CAN_MSGVAL2_REG,
  62. };
  63. static const u16 reg_map_c_can[] = {
  64. [C_CAN_CTRL_REG] = 0x00,
  65. [C_CAN_STS_REG] = 0x02,
  66. [C_CAN_ERR_CNT_REG] = 0x04,
  67. [C_CAN_BTR_REG] = 0x06,
  68. [C_CAN_INT_REG] = 0x08,
  69. [C_CAN_TEST_REG] = 0x0A,
  70. [C_CAN_BRPEXT_REG] = 0x0C,
  71. [C_CAN_IF1_COMREQ_REG] = 0x10,
  72. [C_CAN_IF1_COMMSK_REG] = 0x12,
  73. [C_CAN_IF1_MASK1_REG] = 0x14,
  74. [C_CAN_IF1_MASK2_REG] = 0x16,
  75. [C_CAN_IF1_ARB1_REG] = 0x18,
  76. [C_CAN_IF1_ARB2_REG] = 0x1A,
  77. [C_CAN_IF1_MSGCTRL_REG] = 0x1C,
  78. [C_CAN_IF1_DATA1_REG] = 0x1E,
  79. [C_CAN_IF1_DATA2_REG] = 0x20,
  80. [C_CAN_IF1_DATA3_REG] = 0x22,
  81. [C_CAN_IF1_DATA4_REG] = 0x24,
  82. [C_CAN_IF2_COMREQ_REG] = 0x40,
  83. [C_CAN_IF2_COMMSK_REG] = 0x42,
  84. [C_CAN_IF2_MASK1_REG] = 0x44,
  85. [C_CAN_IF2_MASK2_REG] = 0x46,
  86. [C_CAN_IF2_ARB1_REG] = 0x48,
  87. [C_CAN_IF2_ARB2_REG] = 0x4A,
  88. [C_CAN_IF2_MSGCTRL_REG] = 0x4C,
  89. [C_CAN_IF2_DATA1_REG] = 0x4E,
  90. [C_CAN_IF2_DATA2_REG] = 0x50,
  91. [C_CAN_IF2_DATA3_REG] = 0x52,
  92. [C_CAN_IF2_DATA4_REG] = 0x54,
  93. [C_CAN_TXRQST1_REG] = 0x80,
  94. [C_CAN_TXRQST2_REG] = 0x82,
  95. [C_CAN_NEWDAT1_REG] = 0x90,
  96. [C_CAN_NEWDAT2_REG] = 0x92,
  97. [C_CAN_INTPND1_REG] = 0xA0,
  98. [C_CAN_INTPND2_REG] = 0xA2,
  99. [C_CAN_MSGVAL1_REG] = 0xB0,
  100. [C_CAN_MSGVAL2_REG] = 0xB2,
  101. };
  102. static const u16 reg_map_d_can[] = {
  103. [C_CAN_CTRL_REG] = 0x00,
  104. [C_CAN_CTRL_EX_REG] = 0x02,
  105. [C_CAN_STS_REG] = 0x04,
  106. [C_CAN_ERR_CNT_REG] = 0x08,
  107. [C_CAN_BTR_REG] = 0x0C,
  108. [C_CAN_BRPEXT_REG] = 0x0E,
  109. [C_CAN_INT_REG] = 0x10,
  110. [C_CAN_TEST_REG] = 0x14,
  111. [C_CAN_TXRQST1_REG] = 0x88,
  112. [C_CAN_TXRQST2_REG] = 0x8A,
  113. [C_CAN_NEWDAT1_REG] = 0x9C,
  114. [C_CAN_NEWDAT2_REG] = 0x9E,
  115. [C_CAN_INTPND1_REG] = 0xB0,
  116. [C_CAN_INTPND2_REG] = 0xB2,
  117. [C_CAN_MSGVAL1_REG] = 0xC4,
  118. [C_CAN_MSGVAL2_REG] = 0xC6,
  119. [C_CAN_IF1_COMREQ_REG] = 0x100,
  120. [C_CAN_IF1_COMMSK_REG] = 0x102,
  121. [C_CAN_IF1_MASK1_REG] = 0x104,
  122. [C_CAN_IF1_MASK2_REG] = 0x106,
  123. [C_CAN_IF1_ARB1_REG] = 0x108,
  124. [C_CAN_IF1_ARB2_REG] = 0x10A,
  125. [C_CAN_IF1_MSGCTRL_REG] = 0x10C,
  126. [C_CAN_IF1_DATA1_REG] = 0x110,
  127. [C_CAN_IF1_DATA2_REG] = 0x112,
  128. [C_CAN_IF1_DATA3_REG] = 0x114,
  129. [C_CAN_IF1_DATA4_REG] = 0x116,
  130. [C_CAN_IF2_COMREQ_REG] = 0x120,
  131. [C_CAN_IF2_COMMSK_REG] = 0x122,
  132. [C_CAN_IF2_MASK1_REG] = 0x124,
  133. [C_CAN_IF2_MASK2_REG] = 0x126,
  134. [C_CAN_IF2_ARB1_REG] = 0x128,
  135. [C_CAN_IF2_ARB2_REG] = 0x12A,
  136. [C_CAN_IF2_MSGCTRL_REG] = 0x12C,
  137. [C_CAN_IF2_DATA1_REG] = 0x130,
  138. [C_CAN_IF2_DATA2_REG] = 0x132,
  139. [C_CAN_IF2_DATA3_REG] = 0x134,
  140. [C_CAN_IF2_DATA4_REG] = 0x136,
  141. };
  142. enum c_can_dev_id {
  143. BOSCH_C_CAN_PLATFORM,
  144. BOSCH_C_CAN,
  145. BOSCH_D_CAN,
  146. };
  147. /* c_can private data structure */
  148. struct c_can_priv {
  149. struct can_priv can; /* must be the first member */
  150. struct napi_struct napi;
  151. struct net_device *dev;
  152. struct device *device;
  153. int tx_object;
  154. int current_status;
  155. int last_status;
  156. u16 (*read_reg) (struct c_can_priv *priv, enum reg index);
  157. void (*write_reg) (struct c_can_priv *priv, enum reg index, u16 val);
  158. void __iomem *base;
  159. const u16 *regs;
  160. unsigned long irq_flags; /* for request_irq() */
  161. unsigned int tx_next;
  162. unsigned int tx_echo;
  163. void *priv; /* for board-specific data */
  164. u16 irqstatus;
  165. enum c_can_dev_id type;
  166. u32 __iomem *raminit_ctrlreg;
  167. unsigned int instance;
  168. void (*raminit) (const struct c_can_priv *priv, bool enable);
  169. };
  170. struct net_device *alloc_c_can_dev(void);
  171. void free_c_can_dev(struct net_device *dev);
  172. int register_c_can_dev(struct net_device *dev);
  173. void unregister_c_can_dev(struct net_device *dev);
  174. #ifdef CONFIG_PM
  175. int c_can_power_up(struct net_device *dev);
  176. int c_can_power_down(struct net_device *dev);
  177. #endif
  178. #endif /* C_CAN_H */