lpfc_mbox.c 18 KB

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  1. /*******************************************************************
  2. * This file is part of the Emulex Linux Device Driver for *
  3. * Fibre Channel Host Bus Adapters. *
  4. * Copyright (C) 2004-2005 Emulex. All rights reserved. *
  5. * EMULEX and SLI are trademarks of Emulex. *
  6. * www.emulex.com *
  7. * Portions Copyright (C) 2004-2005 Christoph Hellwig *
  8. * *
  9. * This program is free software; you can redistribute it and/or *
  10. * modify it under the terms of version 2 of the GNU General *
  11. * Public License as published by the Free Software Foundation. *
  12. * This program is distributed in the hope that it will be useful. *
  13. * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
  14. * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
  15. * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
  16. * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  17. * TO BE LEGALLY INVALID. See the GNU General Public License for *
  18. * more details, a copy of which can be found in the file COPYING *
  19. * included with this package. *
  20. *******************************************************************/
  21. #include <linux/blkdev.h>
  22. #include <linux/pci.h>
  23. #include <linux/interrupt.h>
  24. #include "lpfc_hw.h"
  25. #include "lpfc_sli.h"
  26. #include "lpfc_disc.h"
  27. #include "lpfc_scsi.h"
  28. #include "lpfc.h"
  29. #include "lpfc_logmsg.h"
  30. #include "lpfc_crtn.h"
  31. #include "lpfc_compat.h"
  32. /**********************************************/
  33. /* mailbox command */
  34. /**********************************************/
  35. void
  36. lpfc_dump_mem(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, uint16_t offset)
  37. {
  38. MAILBOX_t *mb;
  39. void *ctx;
  40. mb = &pmb->mb;
  41. ctx = pmb->context2;
  42. /* Setup to dump VPD region */
  43. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  44. mb->mbxCommand = MBX_DUMP_MEMORY;
  45. mb->un.varDmp.cv = 1;
  46. mb->un.varDmp.type = DMP_NV_PARAMS;
  47. mb->un.varDmp.entry_index = offset;
  48. mb->un.varDmp.region_id = DMP_REGION_VPD;
  49. mb->un.varDmp.word_cnt = (DMP_RSP_SIZE / sizeof (uint32_t));
  50. mb->un.varDmp.co = 0;
  51. mb->un.varDmp.resp_offset = 0;
  52. pmb->context2 = ctx;
  53. mb->mbxOwner = OWN_HOST;
  54. return;
  55. }
  56. /**********************************************/
  57. /* lpfc_read_nv Issue a READ NVPARAM */
  58. /* mailbox command */
  59. /**********************************************/
  60. void
  61. lpfc_read_nv(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  62. {
  63. MAILBOX_t *mb;
  64. mb = &pmb->mb;
  65. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  66. mb->mbxCommand = MBX_READ_NV;
  67. mb->mbxOwner = OWN_HOST;
  68. return;
  69. }
  70. /**********************************************/
  71. /* lpfc_read_la Issue a READ LA */
  72. /* mailbox command */
  73. /**********************************************/
  74. int
  75. lpfc_read_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, struct lpfc_dmabuf *mp)
  76. {
  77. MAILBOX_t *mb;
  78. struct lpfc_sli *psli;
  79. psli = &phba->sli;
  80. mb = &pmb->mb;
  81. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  82. INIT_LIST_HEAD(&mp->list);
  83. mb->mbxCommand = MBX_READ_LA64;
  84. mb->un.varReadLA.un.lilpBde64.tus.f.bdeSize = 128;
  85. mb->un.varReadLA.un.lilpBde64.addrHigh = putPaddrHigh(mp->phys);
  86. mb->un.varReadLA.un.lilpBde64.addrLow = putPaddrLow(mp->phys);
  87. /* Save address for later completion and set the owner to host so that
  88. * the FW knows this mailbox is available for processing.
  89. */
  90. pmb->context1 = (uint8_t *) mp;
  91. mb->mbxOwner = OWN_HOST;
  92. return (0);
  93. }
  94. /**********************************************/
  95. /* lpfc_clear_la Issue a CLEAR LA */
  96. /* mailbox command */
  97. /**********************************************/
  98. void
  99. lpfc_clear_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  100. {
  101. MAILBOX_t *mb;
  102. mb = &pmb->mb;
  103. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  104. mb->un.varClearLA.eventTag = phba->fc_eventTag;
  105. mb->mbxCommand = MBX_CLEAR_LA;
  106. mb->mbxOwner = OWN_HOST;
  107. return;
  108. }
  109. /**************************************************/
  110. /* lpfc_config_link Issue a CONFIG LINK */
  111. /* mailbox command */
  112. /**************************************************/
  113. void
  114. lpfc_config_link(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  115. {
  116. MAILBOX_t *mb = &pmb->mb;
  117. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  118. /* NEW_FEATURE
  119. * SLI-2, Coalescing Response Feature.
  120. */
  121. if (phba->cfg_cr_delay) {
  122. mb->un.varCfgLnk.cr = 1;
  123. mb->un.varCfgLnk.ci = 1;
  124. mb->un.varCfgLnk.cr_delay = phba->cfg_cr_delay;
  125. mb->un.varCfgLnk.cr_count = phba->cfg_cr_count;
  126. }
  127. mb->un.varCfgLnk.myId = phba->fc_myDID;
  128. mb->un.varCfgLnk.edtov = phba->fc_edtov;
  129. mb->un.varCfgLnk.arbtov = phba->fc_arbtov;
  130. mb->un.varCfgLnk.ratov = phba->fc_ratov;
  131. mb->un.varCfgLnk.rttov = phba->fc_rttov;
  132. mb->un.varCfgLnk.altov = phba->fc_altov;
  133. mb->un.varCfgLnk.crtov = phba->fc_crtov;
  134. mb->un.varCfgLnk.citov = phba->fc_citov;
  135. if (phba->cfg_ack0)
  136. mb->un.varCfgLnk.ack0_enable = 1;
  137. mb->mbxCommand = MBX_CONFIG_LINK;
  138. mb->mbxOwner = OWN_HOST;
  139. return;
  140. }
  141. /**********************************************/
  142. /* lpfc_init_link Issue an INIT LINK */
  143. /* mailbox command */
  144. /**********************************************/
  145. void
  146. lpfc_init_link(struct lpfc_hba * phba,
  147. LPFC_MBOXQ_t * pmb, uint32_t topology, uint32_t linkspeed)
  148. {
  149. lpfc_vpd_t *vpd;
  150. struct lpfc_sli *psli;
  151. MAILBOX_t *mb;
  152. mb = &pmb->mb;
  153. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  154. psli = &phba->sli;
  155. switch (topology) {
  156. case FLAGS_TOPOLOGY_MODE_LOOP_PT:
  157. mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP;
  158. mb->un.varInitLnk.link_flags |= FLAGS_TOPOLOGY_FAILOVER;
  159. break;
  160. case FLAGS_TOPOLOGY_MODE_PT_PT:
  161. mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT;
  162. break;
  163. case FLAGS_TOPOLOGY_MODE_LOOP:
  164. mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP;
  165. break;
  166. case FLAGS_TOPOLOGY_MODE_PT_LOOP:
  167. mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT;
  168. mb->un.varInitLnk.link_flags |= FLAGS_TOPOLOGY_FAILOVER;
  169. break;
  170. }
  171. /* NEW_FEATURE
  172. * Setting up the link speed
  173. */
  174. vpd = &phba->vpd;
  175. if (vpd->rev.feaLevelHigh >= 0x02){
  176. switch(linkspeed){
  177. case LINK_SPEED_1G:
  178. case LINK_SPEED_2G:
  179. case LINK_SPEED_4G:
  180. mb->un.varInitLnk.link_flags |=
  181. FLAGS_LINK_SPEED;
  182. mb->un.varInitLnk.link_speed = linkspeed;
  183. break;
  184. case LINK_SPEED_AUTO:
  185. default:
  186. mb->un.varInitLnk.link_speed =
  187. LINK_SPEED_AUTO;
  188. break;
  189. }
  190. }
  191. else
  192. mb->un.varInitLnk.link_speed = LINK_SPEED_AUTO;
  193. mb->mbxCommand = (volatile uint8_t)MBX_INIT_LINK;
  194. mb->mbxOwner = OWN_HOST;
  195. mb->un.varInitLnk.fabric_AL_PA = phba->fc_pref_ALPA;
  196. return;
  197. }
  198. /**********************************************/
  199. /* lpfc_read_sparam Issue a READ SPARAM */
  200. /* mailbox command */
  201. /**********************************************/
  202. int
  203. lpfc_read_sparam(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  204. {
  205. struct lpfc_dmabuf *mp;
  206. MAILBOX_t *mb;
  207. struct lpfc_sli *psli;
  208. psli = &phba->sli;
  209. mb = &pmb->mb;
  210. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  211. mb->mbxOwner = OWN_HOST;
  212. /* Get a buffer to hold the HBAs Service Parameters */
  213. if (((mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL)) == 0) ||
  214. ((mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys))) == 0)) {
  215. if (mp)
  216. kfree(mp);
  217. mb->mbxCommand = MBX_READ_SPARM64;
  218. /* READ_SPARAM: no buffers */
  219. lpfc_printf_log(phba,
  220. KERN_WARNING,
  221. LOG_MBOX,
  222. "%d:0301 READ_SPARAM: no buffers\n",
  223. phba->brd_no);
  224. return (1);
  225. }
  226. INIT_LIST_HEAD(&mp->list);
  227. mb->mbxCommand = MBX_READ_SPARM64;
  228. mb->un.varRdSparm.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm);
  229. mb->un.varRdSparm.un.sp64.addrHigh = putPaddrHigh(mp->phys);
  230. mb->un.varRdSparm.un.sp64.addrLow = putPaddrLow(mp->phys);
  231. /* save address for completion */
  232. pmb->context1 = mp;
  233. return (0);
  234. }
  235. /********************************************/
  236. /* lpfc_unreg_did Issue a UNREG_DID */
  237. /* mailbox command */
  238. /********************************************/
  239. void
  240. lpfc_unreg_did(struct lpfc_hba * phba, uint32_t did, LPFC_MBOXQ_t * pmb)
  241. {
  242. MAILBOX_t *mb;
  243. mb = &pmb->mb;
  244. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  245. mb->un.varUnregDID.did = did;
  246. mb->mbxCommand = MBX_UNREG_D_ID;
  247. mb->mbxOwner = OWN_HOST;
  248. return;
  249. }
  250. /***********************************************/
  251. /* command to write slim */
  252. /***********************************************/
  253. void
  254. lpfc_set_slim(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, uint32_t addr,
  255. uint32_t value)
  256. {
  257. MAILBOX_t *mb;
  258. mb = &pmb->mb;
  259. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  260. /* addr = 0x090597 is AUTO ABTS disable for ELS commands */
  261. /* addr = 0x052198 is DELAYED ABTS enable for ELS commands */
  262. /*
  263. * Always turn on DELAYED ABTS for ELS timeouts
  264. */
  265. if ((addr == 0x052198) && (value == 0))
  266. value = 1;
  267. mb->un.varWords[0] = addr;
  268. mb->un.varWords[1] = value;
  269. mb->mbxCommand = MBX_SET_SLIM;
  270. mb->mbxOwner = OWN_HOST;
  271. return;
  272. }
  273. /**********************************************/
  274. /* lpfc_read_nv Issue a READ CONFIG */
  275. /* mailbox command */
  276. /**********************************************/
  277. void
  278. lpfc_read_config(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  279. {
  280. MAILBOX_t *mb;
  281. mb = &pmb->mb;
  282. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  283. mb->mbxCommand = MBX_READ_CONFIG;
  284. mb->mbxOwner = OWN_HOST;
  285. return;
  286. }
  287. /********************************************/
  288. /* lpfc_reg_login Issue a REG_LOGIN */
  289. /* mailbox command */
  290. /********************************************/
  291. int
  292. lpfc_reg_login(struct lpfc_hba * phba,
  293. uint32_t did, uint8_t * param, LPFC_MBOXQ_t * pmb, uint32_t flag)
  294. {
  295. uint8_t *sparam;
  296. struct lpfc_dmabuf *mp;
  297. MAILBOX_t *mb;
  298. struct lpfc_sli *psli;
  299. psli = &phba->sli;
  300. mb = &pmb->mb;
  301. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  302. mb->un.varRegLogin.rpi = 0;
  303. mb->un.varRegLogin.did = did;
  304. mb->un.varWords[30] = flag; /* Set flag to issue action on cmpl */
  305. mb->mbxOwner = OWN_HOST;
  306. /* Get a buffer to hold NPorts Service Parameters */
  307. if (((mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL)) == NULL) ||
  308. ((mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys))) == 0)) {
  309. if (mp)
  310. kfree(mp);
  311. mb->mbxCommand = MBX_REG_LOGIN64;
  312. /* REG_LOGIN: no buffers */
  313. lpfc_printf_log(phba,
  314. KERN_WARNING,
  315. LOG_MBOX,
  316. "%d:0302 REG_LOGIN: no buffers Data x%x x%x\n",
  317. phba->brd_no,
  318. (uint32_t) did, (uint32_t) flag);
  319. return (1);
  320. }
  321. INIT_LIST_HEAD(&mp->list);
  322. sparam = mp->virt;
  323. /* Copy param's into a new buffer */
  324. memcpy(sparam, param, sizeof (struct serv_parm));
  325. /* save address for completion */
  326. pmb->context1 = (uint8_t *) mp;
  327. mb->mbxCommand = MBX_REG_LOGIN64;
  328. mb->un.varRegLogin.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm);
  329. mb->un.varRegLogin.un.sp64.addrHigh = putPaddrHigh(mp->phys);
  330. mb->un.varRegLogin.un.sp64.addrLow = putPaddrLow(mp->phys);
  331. return (0);
  332. }
  333. /**********************************************/
  334. /* lpfc_unreg_login Issue a UNREG_LOGIN */
  335. /* mailbox command */
  336. /**********************************************/
  337. void
  338. lpfc_unreg_login(struct lpfc_hba * phba, uint32_t rpi, LPFC_MBOXQ_t * pmb)
  339. {
  340. MAILBOX_t *mb;
  341. mb = &pmb->mb;
  342. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  343. mb->un.varUnregLogin.rpi = (uint16_t) rpi;
  344. mb->un.varUnregLogin.rsvd1 = 0;
  345. mb->mbxCommand = MBX_UNREG_LOGIN;
  346. mb->mbxOwner = OWN_HOST;
  347. return;
  348. }
  349. static void
  350. lpfc_config_pcb_setup(struct lpfc_hba * phba)
  351. {
  352. struct lpfc_sli *psli = &phba->sli;
  353. struct lpfc_sli_ring *pring;
  354. PCB_t *pcbp = &phba->slim2p->pcb;
  355. dma_addr_t pdma_addr;
  356. uint32_t offset;
  357. uint32_t iocbCnt;
  358. int i;
  359. pcbp->maxRing = (psli->num_rings - 1);
  360. iocbCnt = 0;
  361. for (i = 0; i < psli->num_rings; i++) {
  362. pring = &psli->ring[i];
  363. /* A ring MUST have both cmd and rsp entries defined to be
  364. valid */
  365. if ((pring->numCiocb == 0) || (pring->numRiocb == 0)) {
  366. pcbp->rdsc[i].cmdEntries = 0;
  367. pcbp->rdsc[i].rspEntries = 0;
  368. pcbp->rdsc[i].cmdAddrHigh = 0;
  369. pcbp->rdsc[i].rspAddrHigh = 0;
  370. pcbp->rdsc[i].cmdAddrLow = 0;
  371. pcbp->rdsc[i].rspAddrLow = 0;
  372. pring->cmdringaddr = NULL;
  373. pring->rspringaddr = NULL;
  374. continue;
  375. }
  376. /* Command ring setup for ring */
  377. pring->cmdringaddr =
  378. (void *)&phba->slim2p->IOCBs[iocbCnt];
  379. pcbp->rdsc[i].cmdEntries = pring->numCiocb;
  380. offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] -
  381. (uint8_t *)phba->slim2p;
  382. pdma_addr = phba->slim2p_mapping + offset;
  383. pcbp->rdsc[i].cmdAddrHigh = putPaddrHigh(pdma_addr);
  384. pcbp->rdsc[i].cmdAddrLow = putPaddrLow(pdma_addr);
  385. iocbCnt += pring->numCiocb;
  386. /* Response ring setup for ring */
  387. pring->rspringaddr =
  388. (void *)&phba->slim2p->IOCBs[iocbCnt];
  389. pcbp->rdsc[i].rspEntries = pring->numRiocb;
  390. offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] -
  391. (uint8_t *)phba->slim2p;
  392. pdma_addr = phba->slim2p_mapping + offset;
  393. pcbp->rdsc[i].rspAddrHigh = putPaddrHigh(pdma_addr);
  394. pcbp->rdsc[i].rspAddrLow = putPaddrLow(pdma_addr);
  395. iocbCnt += pring->numRiocb;
  396. }
  397. }
  398. void
  399. lpfc_read_rev(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  400. {
  401. MAILBOX_t *mb;
  402. mb = &pmb->mb;
  403. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  404. mb->un.varRdRev.cv = 1;
  405. mb->mbxCommand = MBX_READ_REV;
  406. mb->mbxOwner = OWN_HOST;
  407. return;
  408. }
  409. void
  410. lpfc_config_ring(struct lpfc_hba * phba, int ring, LPFC_MBOXQ_t * pmb)
  411. {
  412. int i;
  413. MAILBOX_t *mb = &pmb->mb;
  414. struct lpfc_sli *psli;
  415. struct lpfc_sli_ring *pring;
  416. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  417. mb->un.varCfgRing.ring = ring;
  418. mb->un.varCfgRing.maxOrigXchg = 0;
  419. mb->un.varCfgRing.maxRespXchg = 0;
  420. mb->un.varCfgRing.recvNotify = 1;
  421. psli = &phba->sli;
  422. pring = &psli->ring[ring];
  423. mb->un.varCfgRing.numMask = pring->num_mask;
  424. mb->mbxCommand = MBX_CONFIG_RING;
  425. mb->mbxOwner = OWN_HOST;
  426. /* Is this ring configured for a specific profile */
  427. if (pring->prt[0].profile) {
  428. mb->un.varCfgRing.profile = pring->prt[0].profile;
  429. return;
  430. }
  431. /* Otherwise we setup specific rctl / type masks for this ring */
  432. for (i = 0; i < pring->num_mask; i++) {
  433. mb->un.varCfgRing.rrRegs[i].rval = pring->prt[i].rctl;
  434. if (mb->un.varCfgRing.rrRegs[i].rval != FC_ELS_REQ)
  435. mb->un.varCfgRing.rrRegs[i].rmask = 0xff;
  436. else
  437. mb->un.varCfgRing.rrRegs[i].rmask = 0xfe;
  438. mb->un.varCfgRing.rrRegs[i].tval = pring->prt[i].type;
  439. mb->un.varCfgRing.rrRegs[i].tmask = 0xff;
  440. }
  441. return;
  442. }
  443. void
  444. lpfc_config_port(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  445. {
  446. MAILBOX_t *mb = &pmb->mb;
  447. dma_addr_t pdma_addr;
  448. uint32_t bar_low, bar_high;
  449. size_t offset;
  450. struct lpfc_hgp hgp;
  451. void __iomem *to_slim;
  452. memset(pmb, 0, sizeof(LPFC_MBOXQ_t));
  453. mb->mbxCommand = MBX_CONFIG_PORT;
  454. mb->mbxOwner = OWN_HOST;
  455. mb->un.varCfgPort.pcbLen = sizeof(PCB_t);
  456. offset = (uint8_t *)&phba->slim2p->pcb - (uint8_t *)phba->slim2p;
  457. pdma_addr = phba->slim2p_mapping + offset;
  458. mb->un.varCfgPort.pcbLow = putPaddrLow(pdma_addr);
  459. mb->un.varCfgPort.pcbHigh = putPaddrHigh(pdma_addr);
  460. /* Now setup pcb */
  461. phba->slim2p->pcb.type = TYPE_NATIVE_SLI2;
  462. phba->slim2p->pcb.feature = FEATURE_INITIAL_SLI2;
  463. /* Setup Mailbox pointers */
  464. phba->slim2p->pcb.mailBoxSize = sizeof(MAILBOX_t);
  465. offset = (uint8_t *)&phba->slim2p->mbx - (uint8_t *)phba->slim2p;
  466. pdma_addr = phba->slim2p_mapping + offset;
  467. phba->slim2p->pcb.mbAddrHigh = putPaddrHigh(pdma_addr);
  468. phba->slim2p->pcb.mbAddrLow = putPaddrLow(pdma_addr);
  469. /*
  470. * Setup Host Group ring pointer.
  471. *
  472. * For efficiency reasons, the ring get/put pointers can be
  473. * placed in adapter memory (SLIM) rather than in host memory.
  474. * This allows firmware to avoid PCI reads/writes when updating
  475. * and checking pointers.
  476. *
  477. * The firmware recognizes the use of SLIM memory by comparing
  478. * the address of the get/put pointers structure with that of
  479. * the SLIM BAR (BAR0).
  480. *
  481. * Caution: be sure to use the PCI config space value of BAR0/BAR1
  482. * (the hardware's view of the base address), not the OS's
  483. * value of pci_resource_start() as the OS value may be a cookie
  484. * for ioremap/iomap.
  485. */
  486. pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_0, &bar_low);
  487. pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_1, &bar_high);
  488. /* mask off BAR0's flag bits 0 - 3 */
  489. phba->slim2p->pcb.hgpAddrLow = (bar_low & PCI_BASE_ADDRESS_MEM_MASK) +
  490. (SLIMOFF*sizeof(uint32_t));
  491. if (bar_low & PCI_BASE_ADDRESS_MEM_TYPE_64)
  492. phba->slim2p->pcb.hgpAddrHigh = bar_high;
  493. else
  494. phba->slim2p->pcb.hgpAddrHigh = 0;
  495. /* write HGP data to SLIM at the required longword offset */
  496. memset(&hgp, 0, sizeof(struct lpfc_hgp));
  497. to_slim = phba->MBslimaddr + (SLIMOFF*sizeof (uint32_t));
  498. lpfc_memcpy_to_slim(to_slim, &hgp, sizeof(struct lpfc_hgp));
  499. /* Setup Port Group ring pointer */
  500. offset = (uint8_t *)&phba->slim2p->mbx.us.s2.port -
  501. (uint8_t *)phba->slim2p;
  502. pdma_addr = phba->slim2p_mapping + offset;
  503. phba->slim2p->pcb.pgpAddrHigh = putPaddrHigh(pdma_addr);
  504. phba->slim2p->pcb.pgpAddrLow = putPaddrLow(pdma_addr);
  505. /* Use callback routine to setp rings in the pcb */
  506. lpfc_config_pcb_setup(phba);
  507. /* special handling for LC HBAs */
  508. if (lpfc_is_LC_HBA(phba->pcidev->device)) {
  509. uint32_t hbainit[5];
  510. lpfc_hba_init(phba, hbainit);
  511. memcpy(&mb->un.varCfgPort.hbainit, hbainit, 20);
  512. }
  513. /* Swap PCB if needed */
  514. lpfc_sli_pcimem_bcopy(&phba->slim2p->pcb, &phba->slim2p->pcb,
  515. sizeof (PCB_t));
  516. lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
  517. "%d:0405 Service Level Interface (SLI) 2 selected\n",
  518. phba->brd_no);
  519. }
  520. void
  521. lpfc_mbox_put(struct lpfc_hba * phba, LPFC_MBOXQ_t * mbq)
  522. {
  523. struct lpfc_sli *psli;
  524. psli = &phba->sli;
  525. list_add_tail(&mbq->list, &psli->mboxq);
  526. psli->mboxq_cnt++;
  527. return;
  528. }
  529. LPFC_MBOXQ_t *
  530. lpfc_mbox_get(struct lpfc_hba * phba)
  531. {
  532. LPFC_MBOXQ_t *mbq = NULL;
  533. struct lpfc_sli *psli = &phba->sli;
  534. list_remove_head((&psli->mboxq), mbq, LPFC_MBOXQ_t,
  535. list);
  536. if (mbq) {
  537. psli->mboxq_cnt--;
  538. }
  539. return mbq;
  540. }