mthca_provider.c 27 KB

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  1. /*
  2. * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
  4. * Copyright (c) 2005 Cisco Systems. All rights reserved.
  5. *
  6. * This software is available to you under a choice of one of two
  7. * licenses. You may choose to be licensed under the terms of the GNU
  8. * General Public License (GPL) Version 2, available from the file
  9. * COPYING in the main directory of this source tree, or the
  10. * OpenIB.org BSD license below:
  11. *
  12. * Redistribution and use in source and binary forms, with or
  13. * without modification, are permitted provided that the following
  14. * conditions are met:
  15. *
  16. * - Redistributions of source code must retain the above
  17. * copyright notice, this list of conditions and the following
  18. * disclaimer.
  19. *
  20. * - Redistributions in binary form must reproduce the above
  21. * copyright notice, this list of conditions and the following
  22. * disclaimer in the documentation and/or other materials
  23. * provided with the distribution.
  24. *
  25. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32. * SOFTWARE.
  33. *
  34. * $Id: mthca_provider.c 1397 2004-12-28 05:09:00Z roland $
  35. */
  36. #include <ib_smi.h>
  37. #include <linux/mm.h>
  38. #include "mthca_dev.h"
  39. #include "mthca_cmd.h"
  40. #include "mthca_user.h"
  41. #include "mthca_memfree.h"
  42. static int mthca_query_device(struct ib_device *ibdev,
  43. struct ib_device_attr *props)
  44. {
  45. struct ib_smp *in_mad = NULL;
  46. struct ib_smp *out_mad = NULL;
  47. int err = -ENOMEM;
  48. struct mthca_dev* mdev = to_mdev(ibdev);
  49. u8 status;
  50. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  51. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  52. if (!in_mad || !out_mad)
  53. goto out;
  54. memset(props, 0, sizeof *props);
  55. props->fw_ver = mdev->fw_ver;
  56. memset(in_mad, 0, sizeof *in_mad);
  57. in_mad->base_version = 1;
  58. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  59. in_mad->class_version = 1;
  60. in_mad->method = IB_MGMT_METHOD_GET;
  61. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  62. err = mthca_MAD_IFC(mdev, 1, 1,
  63. 1, NULL, NULL, in_mad, out_mad,
  64. &status);
  65. if (err)
  66. goto out;
  67. if (status) {
  68. err = -EINVAL;
  69. goto out;
  70. }
  71. props->device_cap_flags = mdev->device_cap_flags;
  72. props->vendor_id = be32_to_cpup((u32 *) (out_mad->data + 36)) &
  73. 0xffffff;
  74. props->vendor_part_id = be16_to_cpup((u16 *) (out_mad->data + 30));
  75. props->hw_ver = be16_to_cpup((u16 *) (out_mad->data + 32));
  76. memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
  77. memcpy(&props->node_guid, out_mad->data + 12, 8);
  78. props->max_mr_size = ~0ull;
  79. props->max_qp = mdev->limits.num_qps - mdev->limits.reserved_qps;
  80. props->max_qp_wr = 0xffff;
  81. props->max_sge = mdev->limits.max_sg;
  82. props->max_cq = mdev->limits.num_cqs - mdev->limits.reserved_cqs;
  83. props->max_cqe = 0xffff;
  84. props->max_mr = mdev->limits.num_mpts - mdev->limits.reserved_mrws;
  85. props->max_pd = mdev->limits.num_pds - mdev->limits.reserved_pds;
  86. props->max_qp_rd_atom = 1 << mdev->qp_table.rdb_shift;
  87. props->max_qp_init_rd_atom = 1 << mdev->qp_table.rdb_shift;
  88. props->local_ca_ack_delay = mdev->limits.local_ca_ack_delay;
  89. err = 0;
  90. out:
  91. kfree(in_mad);
  92. kfree(out_mad);
  93. return err;
  94. }
  95. static int mthca_query_port(struct ib_device *ibdev,
  96. u8 port, struct ib_port_attr *props)
  97. {
  98. struct ib_smp *in_mad = NULL;
  99. struct ib_smp *out_mad = NULL;
  100. int err = -ENOMEM;
  101. u8 status;
  102. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  103. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  104. if (!in_mad || !out_mad)
  105. goto out;
  106. memset(in_mad, 0, sizeof *in_mad);
  107. in_mad->base_version = 1;
  108. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  109. in_mad->class_version = 1;
  110. in_mad->method = IB_MGMT_METHOD_GET;
  111. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  112. in_mad->attr_mod = cpu_to_be32(port);
  113. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  114. port, NULL, NULL, in_mad, out_mad,
  115. &status);
  116. if (err)
  117. goto out;
  118. if (status) {
  119. err = -EINVAL;
  120. goto out;
  121. }
  122. props->lid = be16_to_cpup((u16 *) (out_mad->data + 16));
  123. props->lmc = out_mad->data[34] & 0x7;
  124. props->sm_lid = be16_to_cpup((u16 *) (out_mad->data + 18));
  125. props->sm_sl = out_mad->data[36] & 0xf;
  126. props->state = out_mad->data[32] & 0xf;
  127. props->phys_state = out_mad->data[33] >> 4;
  128. props->port_cap_flags = be32_to_cpup((u32 *) (out_mad->data + 20));
  129. props->gid_tbl_len = to_mdev(ibdev)->limits.gid_table_len;
  130. props->pkey_tbl_len = to_mdev(ibdev)->limits.pkey_table_len;
  131. props->qkey_viol_cntr = be16_to_cpup((u16 *) (out_mad->data + 48));
  132. props->active_width = out_mad->data[31] & 0xf;
  133. props->active_speed = out_mad->data[35] >> 4;
  134. out:
  135. kfree(in_mad);
  136. kfree(out_mad);
  137. return err;
  138. }
  139. static int mthca_modify_port(struct ib_device *ibdev,
  140. u8 port, int port_modify_mask,
  141. struct ib_port_modify *props)
  142. {
  143. struct mthca_set_ib_param set_ib;
  144. struct ib_port_attr attr;
  145. int err;
  146. u8 status;
  147. if (down_interruptible(&to_mdev(ibdev)->cap_mask_mutex))
  148. return -ERESTARTSYS;
  149. err = mthca_query_port(ibdev, port, &attr);
  150. if (err)
  151. goto out;
  152. set_ib.set_si_guid = 0;
  153. set_ib.reset_qkey_viol = !!(port_modify_mask & IB_PORT_RESET_QKEY_CNTR);
  154. set_ib.cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
  155. ~props->clr_port_cap_mask;
  156. err = mthca_SET_IB(to_mdev(ibdev), &set_ib, port, &status);
  157. if (err)
  158. goto out;
  159. if (status) {
  160. err = -EINVAL;
  161. goto out;
  162. }
  163. out:
  164. up(&to_mdev(ibdev)->cap_mask_mutex);
  165. return err;
  166. }
  167. static int mthca_query_pkey(struct ib_device *ibdev,
  168. u8 port, u16 index, u16 *pkey)
  169. {
  170. struct ib_smp *in_mad = NULL;
  171. struct ib_smp *out_mad = NULL;
  172. int err = -ENOMEM;
  173. u8 status;
  174. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  175. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  176. if (!in_mad || !out_mad)
  177. goto out;
  178. memset(in_mad, 0, sizeof *in_mad);
  179. in_mad->base_version = 1;
  180. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  181. in_mad->class_version = 1;
  182. in_mad->method = IB_MGMT_METHOD_GET;
  183. in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
  184. in_mad->attr_mod = cpu_to_be32(index / 32);
  185. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  186. port, NULL, NULL, in_mad, out_mad,
  187. &status);
  188. if (err)
  189. goto out;
  190. if (status) {
  191. err = -EINVAL;
  192. goto out;
  193. }
  194. *pkey = be16_to_cpu(((u16 *) out_mad->data)[index % 32]);
  195. out:
  196. kfree(in_mad);
  197. kfree(out_mad);
  198. return err;
  199. }
  200. static int mthca_query_gid(struct ib_device *ibdev, u8 port,
  201. int index, union ib_gid *gid)
  202. {
  203. struct ib_smp *in_mad = NULL;
  204. struct ib_smp *out_mad = NULL;
  205. int err = -ENOMEM;
  206. u8 status;
  207. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  208. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  209. if (!in_mad || !out_mad)
  210. goto out;
  211. memset(in_mad, 0, sizeof *in_mad);
  212. in_mad->base_version = 1;
  213. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  214. in_mad->class_version = 1;
  215. in_mad->method = IB_MGMT_METHOD_GET;
  216. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  217. in_mad->attr_mod = cpu_to_be32(port);
  218. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  219. port, NULL, NULL, in_mad, out_mad,
  220. &status);
  221. if (err)
  222. goto out;
  223. if (status) {
  224. err = -EINVAL;
  225. goto out;
  226. }
  227. memcpy(gid->raw, out_mad->data + 8, 8);
  228. memset(in_mad, 0, sizeof *in_mad);
  229. in_mad->base_version = 1;
  230. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  231. in_mad->class_version = 1;
  232. in_mad->method = IB_MGMT_METHOD_GET;
  233. in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
  234. in_mad->attr_mod = cpu_to_be32(index / 8);
  235. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  236. port, NULL, NULL, in_mad, out_mad,
  237. &status);
  238. if (err)
  239. goto out;
  240. if (status) {
  241. err = -EINVAL;
  242. goto out;
  243. }
  244. memcpy(gid->raw + 8, out_mad->data + (index % 8) * 16, 8);
  245. out:
  246. kfree(in_mad);
  247. kfree(out_mad);
  248. return err;
  249. }
  250. static struct ib_ucontext *mthca_alloc_ucontext(struct ib_device *ibdev,
  251. struct ib_udata *udata)
  252. {
  253. struct mthca_alloc_ucontext_resp uresp;
  254. struct mthca_ucontext *context;
  255. int err;
  256. memset(&uresp, 0, sizeof uresp);
  257. uresp.qp_tab_size = to_mdev(ibdev)->limits.num_qps;
  258. if (mthca_is_memfree(to_mdev(ibdev)))
  259. uresp.uarc_size = to_mdev(ibdev)->uar_table.uarc_size;
  260. else
  261. uresp.uarc_size = 0;
  262. context = kmalloc(sizeof *context, GFP_KERNEL);
  263. if (!context)
  264. return ERR_PTR(-ENOMEM);
  265. err = mthca_uar_alloc(to_mdev(ibdev), &context->uar);
  266. if (err) {
  267. kfree(context);
  268. return ERR_PTR(err);
  269. }
  270. context->db_tab = mthca_init_user_db_tab(to_mdev(ibdev));
  271. if (IS_ERR(context->db_tab)) {
  272. err = PTR_ERR(context->db_tab);
  273. mthca_uar_free(to_mdev(ibdev), &context->uar);
  274. kfree(context);
  275. return ERR_PTR(err);
  276. }
  277. if (ib_copy_to_udata(udata, &uresp, sizeof uresp)) {
  278. mthca_cleanup_user_db_tab(to_mdev(ibdev), &context->uar, context->db_tab);
  279. mthca_uar_free(to_mdev(ibdev), &context->uar);
  280. kfree(context);
  281. return ERR_PTR(-EFAULT);
  282. }
  283. return &context->ibucontext;
  284. }
  285. static int mthca_dealloc_ucontext(struct ib_ucontext *context)
  286. {
  287. mthca_cleanup_user_db_tab(to_mdev(context->device), &to_mucontext(context)->uar,
  288. to_mucontext(context)->db_tab);
  289. mthca_uar_free(to_mdev(context->device), &to_mucontext(context)->uar);
  290. kfree(to_mucontext(context));
  291. return 0;
  292. }
  293. static int mthca_mmap_uar(struct ib_ucontext *context,
  294. struct vm_area_struct *vma)
  295. {
  296. if (vma->vm_end - vma->vm_start != PAGE_SIZE)
  297. return -EINVAL;
  298. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  299. if (io_remap_pfn_range(vma, vma->vm_start,
  300. to_mucontext(context)->uar.pfn,
  301. PAGE_SIZE, vma->vm_page_prot))
  302. return -EAGAIN;
  303. return 0;
  304. }
  305. static struct ib_pd *mthca_alloc_pd(struct ib_device *ibdev,
  306. struct ib_ucontext *context,
  307. struct ib_udata *udata)
  308. {
  309. struct mthca_pd *pd;
  310. int err;
  311. pd = kmalloc(sizeof *pd, GFP_KERNEL);
  312. if (!pd)
  313. return ERR_PTR(-ENOMEM);
  314. err = mthca_pd_alloc(to_mdev(ibdev), !context, pd);
  315. if (err) {
  316. kfree(pd);
  317. return ERR_PTR(err);
  318. }
  319. if (context) {
  320. if (ib_copy_to_udata(udata, &pd->pd_num, sizeof (__u32))) {
  321. mthca_pd_free(to_mdev(ibdev), pd);
  322. kfree(pd);
  323. return ERR_PTR(-EFAULT);
  324. }
  325. }
  326. return &pd->ibpd;
  327. }
  328. static int mthca_dealloc_pd(struct ib_pd *pd)
  329. {
  330. mthca_pd_free(to_mdev(pd->device), to_mpd(pd));
  331. kfree(pd);
  332. return 0;
  333. }
  334. static struct ib_ah *mthca_ah_create(struct ib_pd *pd,
  335. struct ib_ah_attr *ah_attr)
  336. {
  337. int err;
  338. struct mthca_ah *ah;
  339. ah = kmalloc(sizeof *ah, GFP_ATOMIC);
  340. if (!ah)
  341. return ERR_PTR(-ENOMEM);
  342. err = mthca_create_ah(to_mdev(pd->device), to_mpd(pd), ah_attr, ah);
  343. if (err) {
  344. kfree(ah);
  345. return ERR_PTR(err);
  346. }
  347. return &ah->ibah;
  348. }
  349. static int mthca_ah_destroy(struct ib_ah *ah)
  350. {
  351. mthca_destroy_ah(to_mdev(ah->device), to_mah(ah));
  352. kfree(ah);
  353. return 0;
  354. }
  355. static struct ib_qp *mthca_create_qp(struct ib_pd *pd,
  356. struct ib_qp_init_attr *init_attr,
  357. struct ib_udata *udata)
  358. {
  359. struct mthca_create_qp ucmd;
  360. struct mthca_qp *qp;
  361. int err;
  362. switch (init_attr->qp_type) {
  363. case IB_QPT_RC:
  364. case IB_QPT_UC:
  365. case IB_QPT_UD:
  366. {
  367. struct mthca_ucontext *context;
  368. qp = kmalloc(sizeof *qp, GFP_KERNEL);
  369. if (!qp)
  370. return ERR_PTR(-ENOMEM);
  371. if (pd->uobject) {
  372. context = to_mucontext(pd->uobject->context);
  373. if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd))
  374. return ERR_PTR(-EFAULT);
  375. err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
  376. context->db_tab,
  377. ucmd.sq_db_index, ucmd.sq_db_page);
  378. if (err) {
  379. kfree(qp);
  380. return ERR_PTR(err);
  381. }
  382. err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
  383. context->db_tab,
  384. ucmd.rq_db_index, ucmd.rq_db_page);
  385. if (err) {
  386. mthca_unmap_user_db(to_mdev(pd->device),
  387. &context->uar,
  388. context->db_tab,
  389. ucmd.sq_db_index);
  390. kfree(qp);
  391. return ERR_PTR(err);
  392. }
  393. qp->mr.ibmr.lkey = ucmd.lkey;
  394. qp->sq.db_index = ucmd.sq_db_index;
  395. qp->rq.db_index = ucmd.rq_db_index;
  396. }
  397. err = mthca_alloc_qp(to_mdev(pd->device), to_mpd(pd),
  398. to_mcq(init_attr->send_cq),
  399. to_mcq(init_attr->recv_cq),
  400. init_attr->qp_type, init_attr->sq_sig_type,
  401. &init_attr->cap, qp);
  402. if (err && pd->uobject) {
  403. context = to_mucontext(pd->uobject->context);
  404. mthca_unmap_user_db(to_mdev(pd->device),
  405. &context->uar,
  406. context->db_tab,
  407. ucmd.sq_db_index);
  408. mthca_unmap_user_db(to_mdev(pd->device),
  409. &context->uar,
  410. context->db_tab,
  411. ucmd.rq_db_index);
  412. }
  413. qp->ibqp.qp_num = qp->qpn;
  414. break;
  415. }
  416. case IB_QPT_SMI:
  417. case IB_QPT_GSI:
  418. {
  419. /* Don't allow userspace to create special QPs */
  420. if (pd->uobject)
  421. return ERR_PTR(-EINVAL);
  422. qp = kmalloc(sizeof (struct mthca_sqp), GFP_KERNEL);
  423. if (!qp)
  424. return ERR_PTR(-ENOMEM);
  425. qp->ibqp.qp_num = init_attr->qp_type == IB_QPT_SMI ? 0 : 1;
  426. err = mthca_alloc_sqp(to_mdev(pd->device), to_mpd(pd),
  427. to_mcq(init_attr->send_cq),
  428. to_mcq(init_attr->recv_cq),
  429. init_attr->sq_sig_type, &init_attr->cap,
  430. qp->ibqp.qp_num, init_attr->port_num,
  431. to_msqp(qp));
  432. break;
  433. }
  434. default:
  435. /* Don't support raw QPs */
  436. return ERR_PTR(-ENOSYS);
  437. }
  438. if (err) {
  439. kfree(qp);
  440. return ERR_PTR(err);
  441. }
  442. init_attr->cap.max_inline_data = 0;
  443. init_attr->cap.max_send_wr = qp->sq.max;
  444. init_attr->cap.max_recv_wr = qp->rq.max;
  445. init_attr->cap.max_send_sge = qp->sq.max_gs;
  446. init_attr->cap.max_recv_sge = qp->rq.max_gs;
  447. return &qp->ibqp;
  448. }
  449. static int mthca_destroy_qp(struct ib_qp *qp)
  450. {
  451. if (qp->uobject) {
  452. mthca_unmap_user_db(to_mdev(qp->device),
  453. &to_mucontext(qp->uobject->context)->uar,
  454. to_mucontext(qp->uobject->context)->db_tab,
  455. to_mqp(qp)->sq.db_index);
  456. mthca_unmap_user_db(to_mdev(qp->device),
  457. &to_mucontext(qp->uobject->context)->uar,
  458. to_mucontext(qp->uobject->context)->db_tab,
  459. to_mqp(qp)->rq.db_index);
  460. }
  461. mthca_free_qp(to_mdev(qp->device), to_mqp(qp));
  462. kfree(qp);
  463. return 0;
  464. }
  465. static struct ib_cq *mthca_create_cq(struct ib_device *ibdev, int entries,
  466. struct ib_ucontext *context,
  467. struct ib_udata *udata)
  468. {
  469. struct mthca_create_cq ucmd;
  470. struct mthca_cq *cq;
  471. int nent;
  472. int err;
  473. if (context) {
  474. if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd))
  475. return ERR_PTR(-EFAULT);
  476. err = mthca_map_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  477. to_mucontext(context)->db_tab,
  478. ucmd.set_db_index, ucmd.set_db_page);
  479. if (err)
  480. return ERR_PTR(err);
  481. err = mthca_map_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  482. to_mucontext(context)->db_tab,
  483. ucmd.arm_db_index, ucmd.arm_db_page);
  484. if (err)
  485. goto err_unmap_set;
  486. }
  487. cq = kmalloc(sizeof *cq, GFP_KERNEL);
  488. if (!cq) {
  489. err = -ENOMEM;
  490. goto err_unmap_arm;
  491. }
  492. if (context) {
  493. cq->mr.ibmr.lkey = ucmd.lkey;
  494. cq->set_ci_db_index = ucmd.set_db_index;
  495. cq->arm_db_index = ucmd.arm_db_index;
  496. }
  497. for (nent = 1; nent <= entries; nent <<= 1)
  498. ; /* nothing */
  499. err = mthca_init_cq(to_mdev(ibdev), nent,
  500. context ? to_mucontext(context) : NULL,
  501. context ? ucmd.pdn : to_mdev(ibdev)->driver_pd.pd_num,
  502. cq);
  503. if (err)
  504. goto err_free;
  505. if (context && ib_copy_to_udata(udata, &cq->cqn, sizeof (__u32))) {
  506. mthca_free_cq(to_mdev(ibdev), cq);
  507. goto err_free;
  508. }
  509. return &cq->ibcq;
  510. err_free:
  511. kfree(cq);
  512. err_unmap_arm:
  513. if (context)
  514. mthca_unmap_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  515. to_mucontext(context)->db_tab, ucmd.arm_db_index);
  516. err_unmap_set:
  517. if (context)
  518. mthca_unmap_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  519. to_mucontext(context)->db_tab, ucmd.set_db_index);
  520. return ERR_PTR(err);
  521. }
  522. static int mthca_destroy_cq(struct ib_cq *cq)
  523. {
  524. if (cq->uobject) {
  525. mthca_unmap_user_db(to_mdev(cq->device),
  526. &to_mucontext(cq->uobject->context)->uar,
  527. to_mucontext(cq->uobject->context)->db_tab,
  528. to_mcq(cq)->arm_db_index);
  529. mthca_unmap_user_db(to_mdev(cq->device),
  530. &to_mucontext(cq->uobject->context)->uar,
  531. to_mucontext(cq->uobject->context)->db_tab,
  532. to_mcq(cq)->set_ci_db_index);
  533. }
  534. mthca_free_cq(to_mdev(cq->device), to_mcq(cq));
  535. kfree(cq);
  536. return 0;
  537. }
  538. static inline u32 convert_access(int acc)
  539. {
  540. return (acc & IB_ACCESS_REMOTE_ATOMIC ? MTHCA_MPT_FLAG_ATOMIC : 0) |
  541. (acc & IB_ACCESS_REMOTE_WRITE ? MTHCA_MPT_FLAG_REMOTE_WRITE : 0) |
  542. (acc & IB_ACCESS_REMOTE_READ ? MTHCA_MPT_FLAG_REMOTE_READ : 0) |
  543. (acc & IB_ACCESS_LOCAL_WRITE ? MTHCA_MPT_FLAG_LOCAL_WRITE : 0) |
  544. MTHCA_MPT_FLAG_LOCAL_READ;
  545. }
  546. static struct ib_mr *mthca_get_dma_mr(struct ib_pd *pd, int acc)
  547. {
  548. struct mthca_mr *mr;
  549. int err;
  550. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  551. if (!mr)
  552. return ERR_PTR(-ENOMEM);
  553. err = mthca_mr_alloc_notrans(to_mdev(pd->device),
  554. to_mpd(pd)->pd_num,
  555. convert_access(acc), mr);
  556. if (err) {
  557. kfree(mr);
  558. return ERR_PTR(err);
  559. }
  560. return &mr->ibmr;
  561. }
  562. static struct ib_mr *mthca_reg_phys_mr(struct ib_pd *pd,
  563. struct ib_phys_buf *buffer_list,
  564. int num_phys_buf,
  565. int acc,
  566. u64 *iova_start)
  567. {
  568. struct mthca_mr *mr;
  569. u64 *page_list;
  570. u64 total_size;
  571. u64 mask;
  572. int shift;
  573. int npages;
  574. int err;
  575. int i, j, n;
  576. /* First check that we have enough alignment */
  577. if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK))
  578. return ERR_PTR(-EINVAL);
  579. if (num_phys_buf > 1 &&
  580. ((buffer_list[0].addr + buffer_list[0].size) & ~PAGE_MASK))
  581. return ERR_PTR(-EINVAL);
  582. mask = 0;
  583. total_size = 0;
  584. for (i = 0; i < num_phys_buf; ++i) {
  585. if (i != 0 && buffer_list[i].addr & ~PAGE_MASK)
  586. return ERR_PTR(-EINVAL);
  587. if (i != 0 && i != num_phys_buf - 1 &&
  588. (buffer_list[i].size & ~PAGE_MASK))
  589. return ERR_PTR(-EINVAL);
  590. total_size += buffer_list[i].size;
  591. if (i > 0)
  592. mask |= buffer_list[i].addr;
  593. }
  594. /* Find largest page shift we can use to cover buffers */
  595. for (shift = PAGE_SHIFT; shift < 31; ++shift)
  596. if (num_phys_buf > 1) {
  597. if ((1ULL << shift) & mask)
  598. break;
  599. } else {
  600. if (1ULL << shift >=
  601. buffer_list[0].size +
  602. (buffer_list[0].addr & ((1ULL << shift) - 1)))
  603. break;
  604. }
  605. buffer_list[0].size += buffer_list[0].addr & ((1ULL << shift) - 1);
  606. buffer_list[0].addr &= ~0ull << shift;
  607. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  608. if (!mr)
  609. return ERR_PTR(-ENOMEM);
  610. npages = 0;
  611. for (i = 0; i < num_phys_buf; ++i)
  612. npages += (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
  613. if (!npages)
  614. return &mr->ibmr;
  615. page_list = kmalloc(npages * sizeof *page_list, GFP_KERNEL);
  616. if (!page_list) {
  617. kfree(mr);
  618. return ERR_PTR(-ENOMEM);
  619. }
  620. n = 0;
  621. for (i = 0; i < num_phys_buf; ++i)
  622. for (j = 0;
  623. j < (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
  624. ++j)
  625. page_list[n++] = buffer_list[i].addr + ((u64) j << shift);
  626. mthca_dbg(to_mdev(pd->device), "Registering memory at %llx (iova %llx) "
  627. "in PD %x; shift %d, npages %d.\n",
  628. (unsigned long long) buffer_list[0].addr,
  629. (unsigned long long) *iova_start,
  630. to_mpd(pd)->pd_num,
  631. shift, npages);
  632. err = mthca_mr_alloc_phys(to_mdev(pd->device),
  633. to_mpd(pd)->pd_num,
  634. page_list, shift, npages,
  635. *iova_start, total_size,
  636. convert_access(acc), mr);
  637. if (err) {
  638. kfree(page_list);
  639. kfree(mr);
  640. return ERR_PTR(err);
  641. }
  642. kfree(page_list);
  643. return &mr->ibmr;
  644. }
  645. static struct ib_mr *mthca_reg_user_mr(struct ib_pd *pd, struct ib_umem *region,
  646. int acc, struct ib_udata *udata)
  647. {
  648. struct mthca_dev *dev = to_mdev(pd->device);
  649. struct ib_umem_chunk *chunk;
  650. struct mthca_mr *mr;
  651. u64 *pages;
  652. int shift, n, len;
  653. int i, j, k;
  654. int err = 0;
  655. shift = ffs(region->page_size) - 1;
  656. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  657. if (!mr)
  658. return ERR_PTR(-ENOMEM);
  659. n = 0;
  660. list_for_each_entry(chunk, &region->chunk_list, list)
  661. n += chunk->nents;
  662. mr->mtt = mthca_alloc_mtt(dev, n);
  663. if (IS_ERR(mr->mtt)) {
  664. err = PTR_ERR(mr->mtt);
  665. goto err;
  666. }
  667. pages = (u64 *) __get_free_page(GFP_KERNEL);
  668. if (!pages) {
  669. err = -ENOMEM;
  670. goto err_mtt;
  671. }
  672. i = n = 0;
  673. list_for_each_entry(chunk, &region->chunk_list, list)
  674. for (j = 0; j < chunk->nmap; ++j) {
  675. len = sg_dma_len(&chunk->page_list[j]) >> shift;
  676. for (k = 0; k < len; ++k) {
  677. pages[i++] = sg_dma_address(&chunk->page_list[j]) +
  678. region->page_size * k;
  679. /*
  680. * Be friendly to WRITE_MTT command
  681. * and leave two empty slots for the
  682. * index and reserved fields of the
  683. * mailbox.
  684. */
  685. if (i == PAGE_SIZE / sizeof (u64) - 2) {
  686. err = mthca_write_mtt(dev, mr->mtt,
  687. n, pages, i);
  688. if (err)
  689. goto mtt_done;
  690. n += i;
  691. i = 0;
  692. }
  693. }
  694. }
  695. if (i)
  696. err = mthca_write_mtt(dev, mr->mtt, n, pages, i);
  697. mtt_done:
  698. free_page((unsigned long) pages);
  699. if (err)
  700. goto err_mtt;
  701. err = mthca_mr_alloc(dev, to_mpd(pd)->pd_num, shift, region->virt_base,
  702. region->length, convert_access(acc), mr);
  703. if (err)
  704. goto err_mtt;
  705. return &mr->ibmr;
  706. err_mtt:
  707. mthca_free_mtt(dev, mr->mtt);
  708. err:
  709. kfree(mr);
  710. return ERR_PTR(err);
  711. }
  712. static int mthca_dereg_mr(struct ib_mr *mr)
  713. {
  714. struct mthca_mr *mmr = to_mmr(mr);
  715. mthca_free_mr(to_mdev(mr->device), mmr);
  716. kfree(mmr);
  717. return 0;
  718. }
  719. static struct ib_fmr *mthca_alloc_fmr(struct ib_pd *pd, int mr_access_flags,
  720. struct ib_fmr_attr *fmr_attr)
  721. {
  722. struct mthca_fmr *fmr;
  723. int err;
  724. fmr = kmalloc(sizeof *fmr, GFP_KERNEL);
  725. if (!fmr)
  726. return ERR_PTR(-ENOMEM);
  727. memcpy(&fmr->attr, fmr_attr, sizeof *fmr_attr);
  728. err = mthca_fmr_alloc(to_mdev(pd->device), to_mpd(pd)->pd_num,
  729. convert_access(mr_access_flags), fmr);
  730. if (err) {
  731. kfree(fmr);
  732. return ERR_PTR(err);
  733. }
  734. return &fmr->ibmr;
  735. }
  736. static int mthca_dealloc_fmr(struct ib_fmr *fmr)
  737. {
  738. struct mthca_fmr *mfmr = to_mfmr(fmr);
  739. int err;
  740. err = mthca_free_fmr(to_mdev(fmr->device), mfmr);
  741. if (err)
  742. return err;
  743. kfree(mfmr);
  744. return 0;
  745. }
  746. static int mthca_unmap_fmr(struct list_head *fmr_list)
  747. {
  748. struct ib_fmr *fmr;
  749. int err;
  750. u8 status;
  751. struct mthca_dev *mdev = NULL;
  752. list_for_each_entry(fmr, fmr_list, list) {
  753. if (mdev && to_mdev(fmr->device) != mdev)
  754. return -EINVAL;
  755. mdev = to_mdev(fmr->device);
  756. }
  757. if (!mdev)
  758. return 0;
  759. if (mthca_is_memfree(mdev)) {
  760. list_for_each_entry(fmr, fmr_list, list)
  761. mthca_arbel_fmr_unmap(mdev, to_mfmr(fmr));
  762. wmb();
  763. } else
  764. list_for_each_entry(fmr, fmr_list, list)
  765. mthca_tavor_fmr_unmap(mdev, to_mfmr(fmr));
  766. err = mthca_SYNC_TPT(mdev, &status);
  767. if (err)
  768. return err;
  769. if (status)
  770. return -EINVAL;
  771. return 0;
  772. }
  773. static ssize_t show_rev(struct class_device *cdev, char *buf)
  774. {
  775. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  776. return sprintf(buf, "%x\n", dev->rev_id);
  777. }
  778. static ssize_t show_fw_ver(struct class_device *cdev, char *buf)
  779. {
  780. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  781. return sprintf(buf, "%x.%x.%x\n", (int) (dev->fw_ver >> 32),
  782. (int) (dev->fw_ver >> 16) & 0xffff,
  783. (int) dev->fw_ver & 0xffff);
  784. }
  785. static ssize_t show_hca(struct class_device *cdev, char *buf)
  786. {
  787. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  788. switch (dev->pdev->device) {
  789. case PCI_DEVICE_ID_MELLANOX_TAVOR:
  790. return sprintf(buf, "MT23108\n");
  791. case PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT:
  792. return sprintf(buf, "MT25208 (MT23108 compat mode)\n");
  793. case PCI_DEVICE_ID_MELLANOX_ARBEL:
  794. return sprintf(buf, "MT25208\n");
  795. case PCI_DEVICE_ID_MELLANOX_SINAI:
  796. case PCI_DEVICE_ID_MELLANOX_SINAI_OLD:
  797. return sprintf(buf, "MT25204\n");
  798. default:
  799. return sprintf(buf, "unknown\n");
  800. }
  801. }
  802. static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  803. static CLASS_DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
  804. static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  805. static struct class_device_attribute *mthca_class_attributes[] = {
  806. &class_device_attr_hw_rev,
  807. &class_device_attr_fw_ver,
  808. &class_device_attr_hca_type
  809. };
  810. int mthca_register_device(struct mthca_dev *dev)
  811. {
  812. int ret;
  813. int i;
  814. strlcpy(dev->ib_dev.name, "mthca%d", IB_DEVICE_NAME_MAX);
  815. dev->ib_dev.owner = THIS_MODULE;
  816. dev->ib_dev.node_type = IB_NODE_CA;
  817. dev->ib_dev.phys_port_cnt = dev->limits.num_ports;
  818. dev->ib_dev.dma_device = &dev->pdev->dev;
  819. dev->ib_dev.class_dev.dev = &dev->pdev->dev;
  820. dev->ib_dev.query_device = mthca_query_device;
  821. dev->ib_dev.query_port = mthca_query_port;
  822. dev->ib_dev.modify_port = mthca_modify_port;
  823. dev->ib_dev.query_pkey = mthca_query_pkey;
  824. dev->ib_dev.query_gid = mthca_query_gid;
  825. dev->ib_dev.alloc_ucontext = mthca_alloc_ucontext;
  826. dev->ib_dev.dealloc_ucontext = mthca_dealloc_ucontext;
  827. dev->ib_dev.mmap = mthca_mmap_uar;
  828. dev->ib_dev.alloc_pd = mthca_alloc_pd;
  829. dev->ib_dev.dealloc_pd = mthca_dealloc_pd;
  830. dev->ib_dev.create_ah = mthca_ah_create;
  831. dev->ib_dev.destroy_ah = mthca_ah_destroy;
  832. dev->ib_dev.create_qp = mthca_create_qp;
  833. dev->ib_dev.modify_qp = mthca_modify_qp;
  834. dev->ib_dev.destroy_qp = mthca_destroy_qp;
  835. dev->ib_dev.create_cq = mthca_create_cq;
  836. dev->ib_dev.destroy_cq = mthca_destroy_cq;
  837. dev->ib_dev.poll_cq = mthca_poll_cq;
  838. dev->ib_dev.get_dma_mr = mthca_get_dma_mr;
  839. dev->ib_dev.reg_phys_mr = mthca_reg_phys_mr;
  840. dev->ib_dev.reg_user_mr = mthca_reg_user_mr;
  841. dev->ib_dev.dereg_mr = mthca_dereg_mr;
  842. if (dev->mthca_flags & MTHCA_FLAG_FMR) {
  843. dev->ib_dev.alloc_fmr = mthca_alloc_fmr;
  844. dev->ib_dev.unmap_fmr = mthca_unmap_fmr;
  845. dev->ib_dev.dealloc_fmr = mthca_dealloc_fmr;
  846. if (mthca_is_memfree(dev))
  847. dev->ib_dev.map_phys_fmr = mthca_arbel_map_phys_fmr;
  848. else
  849. dev->ib_dev.map_phys_fmr = mthca_tavor_map_phys_fmr;
  850. }
  851. dev->ib_dev.attach_mcast = mthca_multicast_attach;
  852. dev->ib_dev.detach_mcast = mthca_multicast_detach;
  853. dev->ib_dev.process_mad = mthca_process_mad;
  854. if (mthca_is_memfree(dev)) {
  855. dev->ib_dev.req_notify_cq = mthca_arbel_arm_cq;
  856. dev->ib_dev.post_send = mthca_arbel_post_send;
  857. dev->ib_dev.post_recv = mthca_arbel_post_receive;
  858. } else {
  859. dev->ib_dev.req_notify_cq = mthca_tavor_arm_cq;
  860. dev->ib_dev.post_send = mthca_tavor_post_send;
  861. dev->ib_dev.post_recv = mthca_tavor_post_receive;
  862. }
  863. init_MUTEX(&dev->cap_mask_mutex);
  864. ret = ib_register_device(&dev->ib_dev);
  865. if (ret)
  866. return ret;
  867. for (i = 0; i < ARRAY_SIZE(mthca_class_attributes); ++i) {
  868. ret = class_device_create_file(&dev->ib_dev.class_dev,
  869. mthca_class_attributes[i]);
  870. if (ret) {
  871. ib_unregister_device(&dev->ib_dev);
  872. return ret;
  873. }
  874. }
  875. return 0;
  876. }
  877. void mthca_unregister_device(struct mthca_dev *dev)
  878. {
  879. ib_unregister_device(&dev->ib_dev);
  880. }