mthca_memfree.c 15 KB

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  1. /*
  2. * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Cisco Systems. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. *
  33. * $Id$
  34. */
  35. #include <linux/mm.h>
  36. #include "mthca_memfree.h"
  37. #include "mthca_dev.h"
  38. #include "mthca_cmd.h"
  39. /*
  40. * We allocate in as big chunks as we can, up to a maximum of 256 KB
  41. * per chunk.
  42. */
  43. enum {
  44. MTHCA_ICM_ALLOC_SIZE = 1 << 18,
  45. MTHCA_TABLE_CHUNK_SIZE = 1 << 18
  46. };
  47. struct mthca_user_db_table {
  48. struct semaphore mutex;
  49. struct {
  50. u64 uvirt;
  51. struct scatterlist mem;
  52. int refcount;
  53. } page[0];
  54. };
  55. void mthca_free_icm(struct mthca_dev *dev, struct mthca_icm *icm)
  56. {
  57. struct mthca_icm_chunk *chunk, *tmp;
  58. int i;
  59. if (!icm)
  60. return;
  61. list_for_each_entry_safe(chunk, tmp, &icm->chunk_list, list) {
  62. if (chunk->nsg > 0)
  63. pci_unmap_sg(dev->pdev, chunk->mem, chunk->npages,
  64. PCI_DMA_BIDIRECTIONAL);
  65. for (i = 0; i < chunk->npages; ++i)
  66. __free_pages(chunk->mem[i].page,
  67. get_order(chunk->mem[i].length));
  68. kfree(chunk);
  69. }
  70. kfree(icm);
  71. }
  72. struct mthca_icm *mthca_alloc_icm(struct mthca_dev *dev, int npages,
  73. unsigned int gfp_mask)
  74. {
  75. struct mthca_icm *icm;
  76. struct mthca_icm_chunk *chunk = NULL;
  77. int cur_order;
  78. icm = kmalloc(sizeof *icm, gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN));
  79. if (!icm)
  80. return icm;
  81. icm->refcount = 0;
  82. INIT_LIST_HEAD(&icm->chunk_list);
  83. cur_order = get_order(MTHCA_ICM_ALLOC_SIZE);
  84. while (npages > 0) {
  85. if (!chunk) {
  86. chunk = kmalloc(sizeof *chunk,
  87. gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN));
  88. if (!chunk)
  89. goto fail;
  90. chunk->npages = 0;
  91. chunk->nsg = 0;
  92. list_add_tail(&chunk->list, &icm->chunk_list);
  93. }
  94. while (1 << cur_order > npages)
  95. --cur_order;
  96. chunk->mem[chunk->npages].page = alloc_pages(gfp_mask, cur_order);
  97. if (chunk->mem[chunk->npages].page) {
  98. chunk->mem[chunk->npages].length = PAGE_SIZE << cur_order;
  99. chunk->mem[chunk->npages].offset = 0;
  100. if (++chunk->npages == MTHCA_ICM_CHUNK_LEN) {
  101. chunk->nsg = pci_map_sg(dev->pdev, chunk->mem,
  102. chunk->npages,
  103. PCI_DMA_BIDIRECTIONAL);
  104. if (chunk->nsg <= 0)
  105. goto fail;
  106. chunk = NULL;
  107. }
  108. npages -= 1 << cur_order;
  109. } else {
  110. --cur_order;
  111. if (cur_order < 0)
  112. goto fail;
  113. }
  114. }
  115. if (chunk) {
  116. chunk->nsg = pci_map_sg(dev->pdev, chunk->mem,
  117. chunk->npages,
  118. PCI_DMA_BIDIRECTIONAL);
  119. if (chunk->nsg <= 0)
  120. goto fail;
  121. }
  122. return icm;
  123. fail:
  124. mthca_free_icm(dev, icm);
  125. return NULL;
  126. }
  127. int mthca_table_get(struct mthca_dev *dev, struct mthca_icm_table *table, int obj)
  128. {
  129. int i = (obj & (table->num_obj - 1)) * table->obj_size / MTHCA_TABLE_CHUNK_SIZE;
  130. int ret = 0;
  131. u8 status;
  132. down(&table->mutex);
  133. if (table->icm[i]) {
  134. ++table->icm[i]->refcount;
  135. goto out;
  136. }
  137. table->icm[i] = mthca_alloc_icm(dev, MTHCA_TABLE_CHUNK_SIZE >> PAGE_SHIFT,
  138. (table->lowmem ? GFP_KERNEL : GFP_HIGHUSER) |
  139. __GFP_NOWARN);
  140. if (!table->icm[i]) {
  141. ret = -ENOMEM;
  142. goto out;
  143. }
  144. if (mthca_MAP_ICM(dev, table->icm[i], table->virt + i * MTHCA_TABLE_CHUNK_SIZE,
  145. &status) || status) {
  146. mthca_free_icm(dev, table->icm[i]);
  147. table->icm[i] = NULL;
  148. ret = -ENOMEM;
  149. goto out;
  150. }
  151. ++table->icm[i]->refcount;
  152. out:
  153. up(&table->mutex);
  154. return ret;
  155. }
  156. void mthca_table_put(struct mthca_dev *dev, struct mthca_icm_table *table, int obj)
  157. {
  158. int i;
  159. u8 status;
  160. if (!mthca_is_memfree(dev))
  161. return;
  162. i = (obj & (table->num_obj - 1)) * table->obj_size / MTHCA_TABLE_CHUNK_SIZE;
  163. down(&table->mutex);
  164. if (--table->icm[i]->refcount == 0) {
  165. mthca_UNMAP_ICM(dev, table->virt + i * MTHCA_TABLE_CHUNK_SIZE,
  166. MTHCA_TABLE_CHUNK_SIZE >> 12, &status);
  167. mthca_free_icm(dev, table->icm[i]);
  168. table->icm[i] = NULL;
  169. }
  170. up(&table->mutex);
  171. }
  172. void *mthca_table_find(struct mthca_icm_table *table, int obj)
  173. {
  174. int idx, offset, i;
  175. struct mthca_icm_chunk *chunk;
  176. struct mthca_icm *icm;
  177. struct page *page = NULL;
  178. if (!table->lowmem)
  179. return NULL;
  180. down(&table->mutex);
  181. idx = (obj & (table->num_obj - 1)) * table->obj_size;
  182. icm = table->icm[idx / MTHCA_TABLE_CHUNK_SIZE];
  183. offset = idx % MTHCA_TABLE_CHUNK_SIZE;
  184. if (!icm)
  185. goto out;
  186. list_for_each_entry(chunk, &icm->chunk_list, list) {
  187. for (i = 0; i < chunk->npages; ++i) {
  188. if (chunk->mem[i].length >= offset) {
  189. page = chunk->mem[i].page;
  190. break;
  191. }
  192. offset -= chunk->mem[i].length;
  193. }
  194. }
  195. out:
  196. up(&table->mutex);
  197. return page ? lowmem_page_address(page) + offset : NULL;
  198. }
  199. int mthca_table_get_range(struct mthca_dev *dev, struct mthca_icm_table *table,
  200. int start, int end)
  201. {
  202. int inc = MTHCA_TABLE_CHUNK_SIZE / table->obj_size;
  203. int i, err;
  204. for (i = start; i <= end; i += inc) {
  205. err = mthca_table_get(dev, table, i);
  206. if (err)
  207. goto fail;
  208. }
  209. return 0;
  210. fail:
  211. while (i > start) {
  212. i -= inc;
  213. mthca_table_put(dev, table, i);
  214. }
  215. return err;
  216. }
  217. void mthca_table_put_range(struct mthca_dev *dev, struct mthca_icm_table *table,
  218. int start, int end)
  219. {
  220. int i;
  221. if (!mthca_is_memfree(dev))
  222. return;
  223. for (i = start; i <= end; i += MTHCA_TABLE_CHUNK_SIZE / table->obj_size)
  224. mthca_table_put(dev, table, i);
  225. }
  226. struct mthca_icm_table *mthca_alloc_icm_table(struct mthca_dev *dev,
  227. u64 virt, int obj_size,
  228. int nobj, int reserved,
  229. int use_lowmem)
  230. {
  231. struct mthca_icm_table *table;
  232. int num_icm;
  233. int i;
  234. u8 status;
  235. num_icm = obj_size * nobj / MTHCA_TABLE_CHUNK_SIZE;
  236. table = kmalloc(sizeof *table + num_icm * sizeof *table->icm, GFP_KERNEL);
  237. if (!table)
  238. return NULL;
  239. table->virt = virt;
  240. table->num_icm = num_icm;
  241. table->num_obj = nobj;
  242. table->obj_size = obj_size;
  243. table->lowmem = use_lowmem;
  244. init_MUTEX(&table->mutex);
  245. for (i = 0; i < num_icm; ++i)
  246. table->icm[i] = NULL;
  247. for (i = 0; i * MTHCA_TABLE_CHUNK_SIZE < reserved * obj_size; ++i) {
  248. table->icm[i] = mthca_alloc_icm(dev, MTHCA_TABLE_CHUNK_SIZE >> PAGE_SHIFT,
  249. (use_lowmem ? GFP_KERNEL : GFP_HIGHUSER) |
  250. __GFP_NOWARN);
  251. if (!table->icm[i])
  252. goto err;
  253. if (mthca_MAP_ICM(dev, table->icm[i], virt + i * MTHCA_TABLE_CHUNK_SIZE,
  254. &status) || status) {
  255. mthca_free_icm(dev, table->icm[i]);
  256. table->icm[i] = NULL;
  257. goto err;
  258. }
  259. /*
  260. * Add a reference to this ICM chunk so that it never
  261. * gets freed (since it contains reserved firmware objects).
  262. */
  263. ++table->icm[i]->refcount;
  264. }
  265. return table;
  266. err:
  267. for (i = 0; i < num_icm; ++i)
  268. if (table->icm[i]) {
  269. mthca_UNMAP_ICM(dev, virt + i * MTHCA_TABLE_CHUNK_SIZE,
  270. MTHCA_TABLE_CHUNK_SIZE >> 12, &status);
  271. mthca_free_icm(dev, table->icm[i]);
  272. }
  273. kfree(table);
  274. return NULL;
  275. }
  276. void mthca_free_icm_table(struct mthca_dev *dev, struct mthca_icm_table *table)
  277. {
  278. int i;
  279. u8 status;
  280. for (i = 0; i < table->num_icm; ++i)
  281. if (table->icm[i]) {
  282. mthca_UNMAP_ICM(dev, table->virt + i * MTHCA_TABLE_CHUNK_SIZE,
  283. MTHCA_TABLE_CHUNK_SIZE >> 12, &status);
  284. mthca_free_icm(dev, table->icm[i]);
  285. }
  286. kfree(table);
  287. }
  288. static u64 mthca_uarc_virt(struct mthca_dev *dev, struct mthca_uar *uar, int page)
  289. {
  290. return dev->uar_table.uarc_base +
  291. uar->index * dev->uar_table.uarc_size +
  292. page * 4096;
  293. }
  294. int mthca_map_user_db(struct mthca_dev *dev, struct mthca_uar *uar,
  295. struct mthca_user_db_table *db_tab, int index, u64 uaddr)
  296. {
  297. int ret = 0;
  298. u8 status;
  299. int i;
  300. if (!mthca_is_memfree(dev))
  301. return 0;
  302. if (index < 0 || index > dev->uar_table.uarc_size / 8)
  303. return -EINVAL;
  304. down(&db_tab->mutex);
  305. i = index / MTHCA_DB_REC_PER_PAGE;
  306. if ((db_tab->page[i].refcount >= MTHCA_DB_REC_PER_PAGE) ||
  307. (db_tab->page[i].uvirt && db_tab->page[i].uvirt != uaddr) ||
  308. (uaddr & 4095)) {
  309. ret = -EINVAL;
  310. goto out;
  311. }
  312. if (db_tab->page[i].refcount) {
  313. ++db_tab->page[i].refcount;
  314. goto out;
  315. }
  316. ret = get_user_pages(current, current->mm, uaddr & PAGE_MASK, 1, 1, 0,
  317. &db_tab->page[i].mem.page, NULL);
  318. if (ret < 0)
  319. goto out;
  320. db_tab->page[i].mem.length = 4096;
  321. db_tab->page[i].mem.offset = uaddr & ~PAGE_MASK;
  322. ret = pci_map_sg(dev->pdev, &db_tab->page[i].mem, 1, PCI_DMA_TODEVICE);
  323. if (ret < 0) {
  324. put_page(db_tab->page[i].mem.page);
  325. goto out;
  326. }
  327. ret = mthca_MAP_ICM_page(dev, sg_dma_address(&db_tab->page[i].mem),
  328. mthca_uarc_virt(dev, uar, i), &status);
  329. if (!ret && status)
  330. ret = -EINVAL;
  331. if (ret) {
  332. pci_unmap_sg(dev->pdev, &db_tab->page[i].mem, 1, PCI_DMA_TODEVICE);
  333. put_page(db_tab->page[i].mem.page);
  334. goto out;
  335. }
  336. db_tab->page[i].uvirt = uaddr;
  337. db_tab->page[i].refcount = 1;
  338. out:
  339. up(&db_tab->mutex);
  340. return ret;
  341. }
  342. void mthca_unmap_user_db(struct mthca_dev *dev, struct mthca_uar *uar,
  343. struct mthca_user_db_table *db_tab, int index)
  344. {
  345. if (!mthca_is_memfree(dev))
  346. return;
  347. /*
  348. * To make our bookkeeping simpler, we don't unmap DB
  349. * pages until we clean up the whole db table.
  350. */
  351. down(&db_tab->mutex);
  352. --db_tab->page[index / MTHCA_DB_REC_PER_PAGE].refcount;
  353. up(&db_tab->mutex);
  354. }
  355. struct mthca_user_db_table *mthca_init_user_db_tab(struct mthca_dev *dev)
  356. {
  357. struct mthca_user_db_table *db_tab;
  358. int npages;
  359. int i;
  360. if (!mthca_is_memfree(dev))
  361. return NULL;
  362. npages = dev->uar_table.uarc_size / 4096;
  363. db_tab = kmalloc(sizeof *db_tab + npages * sizeof *db_tab->page, GFP_KERNEL);
  364. if (!db_tab)
  365. return ERR_PTR(-ENOMEM);
  366. init_MUTEX(&db_tab->mutex);
  367. for (i = 0; i < npages; ++i) {
  368. db_tab->page[i].refcount = 0;
  369. db_tab->page[i].uvirt = 0;
  370. }
  371. return db_tab;
  372. }
  373. void mthca_cleanup_user_db_tab(struct mthca_dev *dev, struct mthca_uar *uar,
  374. struct mthca_user_db_table *db_tab)
  375. {
  376. int i;
  377. u8 status;
  378. if (!mthca_is_memfree(dev))
  379. return;
  380. for (i = 0; i < dev->uar_table.uarc_size / 4096; ++i) {
  381. if (db_tab->page[i].uvirt) {
  382. mthca_UNMAP_ICM(dev, mthca_uarc_virt(dev, uar, i), 1, &status);
  383. pci_unmap_sg(dev->pdev, &db_tab->page[i].mem, 1, PCI_DMA_TODEVICE);
  384. put_page(db_tab->page[i].mem.page);
  385. }
  386. }
  387. }
  388. int mthca_alloc_db(struct mthca_dev *dev, int type, u32 qn, u32 **db)
  389. {
  390. int group;
  391. int start, end, dir;
  392. int i, j;
  393. struct mthca_db_page *page;
  394. int ret = 0;
  395. u8 status;
  396. down(&dev->db_tab->mutex);
  397. switch (type) {
  398. case MTHCA_DB_TYPE_CQ_ARM:
  399. case MTHCA_DB_TYPE_SQ:
  400. group = 0;
  401. start = 0;
  402. end = dev->db_tab->max_group1;
  403. dir = 1;
  404. break;
  405. case MTHCA_DB_TYPE_CQ_SET_CI:
  406. case MTHCA_DB_TYPE_RQ:
  407. case MTHCA_DB_TYPE_SRQ:
  408. group = 1;
  409. start = dev->db_tab->npages - 1;
  410. end = dev->db_tab->min_group2;
  411. dir = -1;
  412. break;
  413. default:
  414. ret = -EINVAL;
  415. goto out;
  416. }
  417. for (i = start; i != end; i += dir)
  418. if (dev->db_tab->page[i].db_rec &&
  419. !bitmap_full(dev->db_tab->page[i].used,
  420. MTHCA_DB_REC_PER_PAGE)) {
  421. page = dev->db_tab->page + i;
  422. goto found;
  423. }
  424. if (dev->db_tab->max_group1 >= dev->db_tab->min_group2 - 1) {
  425. ret = -ENOMEM;
  426. goto out;
  427. }
  428. page = dev->db_tab->page + end;
  429. page->db_rec = dma_alloc_coherent(&dev->pdev->dev, 4096,
  430. &page->mapping, GFP_KERNEL);
  431. if (!page->db_rec) {
  432. ret = -ENOMEM;
  433. goto out;
  434. }
  435. memset(page->db_rec, 0, 4096);
  436. ret = mthca_MAP_ICM_page(dev, page->mapping,
  437. mthca_uarc_virt(dev, &dev->driver_uar, i), &status);
  438. if (!ret && status)
  439. ret = -EINVAL;
  440. if (ret) {
  441. dma_free_coherent(&dev->pdev->dev, 4096,
  442. page->db_rec, page->mapping);
  443. goto out;
  444. }
  445. bitmap_zero(page->used, MTHCA_DB_REC_PER_PAGE);
  446. if (group == 0)
  447. ++dev->db_tab->max_group1;
  448. else
  449. --dev->db_tab->min_group2;
  450. found:
  451. j = find_first_zero_bit(page->used, MTHCA_DB_REC_PER_PAGE);
  452. set_bit(j, page->used);
  453. if (group == 1)
  454. j = MTHCA_DB_REC_PER_PAGE - 1 - j;
  455. ret = i * MTHCA_DB_REC_PER_PAGE + j;
  456. page->db_rec[j] = cpu_to_be64((qn << 8) | (type << 5));
  457. *db = (u32 *) &page->db_rec[j];
  458. out:
  459. up(&dev->db_tab->mutex);
  460. return ret;
  461. }
  462. void mthca_free_db(struct mthca_dev *dev, int type, int db_index)
  463. {
  464. int i, j;
  465. struct mthca_db_page *page;
  466. u8 status;
  467. i = db_index / MTHCA_DB_REC_PER_PAGE;
  468. j = db_index % MTHCA_DB_REC_PER_PAGE;
  469. page = dev->db_tab->page + i;
  470. down(&dev->db_tab->mutex);
  471. page->db_rec[j] = 0;
  472. if (i >= dev->db_tab->min_group2)
  473. j = MTHCA_DB_REC_PER_PAGE - 1 - j;
  474. clear_bit(j, page->used);
  475. if (bitmap_empty(page->used, MTHCA_DB_REC_PER_PAGE) &&
  476. i >= dev->db_tab->max_group1 - 1) {
  477. mthca_UNMAP_ICM(dev, mthca_uarc_virt(dev, &dev->driver_uar, i), 1, &status);
  478. dma_free_coherent(&dev->pdev->dev, 4096,
  479. page->db_rec, page->mapping);
  480. page->db_rec = NULL;
  481. if (i == dev->db_tab->max_group1) {
  482. --dev->db_tab->max_group1;
  483. /* XXX may be able to unmap more pages now */
  484. }
  485. if (i == dev->db_tab->min_group2)
  486. ++dev->db_tab->min_group2;
  487. }
  488. up(&dev->db_tab->mutex);
  489. }
  490. int mthca_init_db_tab(struct mthca_dev *dev)
  491. {
  492. int i;
  493. if (!mthca_is_memfree(dev))
  494. return 0;
  495. dev->db_tab = kmalloc(sizeof *dev->db_tab, GFP_KERNEL);
  496. if (!dev->db_tab)
  497. return -ENOMEM;
  498. init_MUTEX(&dev->db_tab->mutex);
  499. dev->db_tab->npages = dev->uar_table.uarc_size / 4096;
  500. dev->db_tab->max_group1 = 0;
  501. dev->db_tab->min_group2 = dev->db_tab->npages - 1;
  502. dev->db_tab->page = kmalloc(dev->db_tab->npages *
  503. sizeof *dev->db_tab->page,
  504. GFP_KERNEL);
  505. if (!dev->db_tab->page) {
  506. kfree(dev->db_tab);
  507. return -ENOMEM;
  508. }
  509. for (i = 0; i < dev->db_tab->npages; ++i)
  510. dev->db_tab->page[i].db_rec = NULL;
  511. return 0;
  512. }
  513. void mthca_cleanup_db_tab(struct mthca_dev *dev)
  514. {
  515. int i;
  516. u8 status;
  517. if (!mthca_is_memfree(dev))
  518. return;
  519. /*
  520. * Because we don't always free our UARC pages when they
  521. * become empty to make mthca_free_db() simpler we need to
  522. * make a sweep through the doorbell pages and free any
  523. * leftover pages now.
  524. */
  525. for (i = 0; i < dev->db_tab->npages; ++i) {
  526. if (!dev->db_tab->page[i].db_rec)
  527. continue;
  528. if (!bitmap_empty(dev->db_tab->page[i].used, MTHCA_DB_REC_PER_PAGE))
  529. mthca_warn(dev, "Kernel UARC page %d not empty\n", i);
  530. mthca_UNMAP_ICM(dev, mthca_uarc_virt(dev, &dev->driver_uar, i), 1, &status);
  531. dma_free_coherent(&dev->pdev->dev, 4096,
  532. dev->db_tab->page[i].db_rec,
  533. dev->db_tab->page[i].mapping);
  534. }
  535. kfree(dev->db_tab->page);
  536. kfree(dev->db_tab);
  537. }