radeon_gem.c 14 KB

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  1. /*
  2. * Copyright 2008 Advanced Micro Devices, Inc.
  3. * Copyright 2008 Red Hat Inc.
  4. * Copyright 2009 Jerome Glisse.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors: Dave Airlie
  25. * Alex Deucher
  26. * Jerome Glisse
  27. */
  28. #include "drmP.h"
  29. #include "drm.h"
  30. #include "radeon_drm.h"
  31. #include "radeon.h"
  32. int radeon_gem_object_init(struct drm_gem_object *obj)
  33. {
  34. BUG();
  35. return 0;
  36. }
  37. void radeon_gem_object_free(struct drm_gem_object *gobj)
  38. {
  39. struct radeon_bo *robj = gem_to_radeon_bo(gobj);
  40. if (robj) {
  41. if (robj->gem_base.import_attach)
  42. drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg);
  43. radeon_bo_unref(&robj);
  44. }
  45. }
  46. int radeon_gem_object_create(struct radeon_device *rdev, int size,
  47. int alignment, int initial_domain,
  48. bool discardable, bool kernel,
  49. struct drm_gem_object **obj)
  50. {
  51. struct radeon_bo *robj;
  52. int r;
  53. *obj = NULL;
  54. /* At least align on page size */
  55. if (alignment < PAGE_SIZE) {
  56. alignment = PAGE_SIZE;
  57. }
  58. r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, NULL, &robj);
  59. if (r) {
  60. if (r != -ERESTARTSYS)
  61. DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",
  62. size, initial_domain, alignment, r);
  63. return r;
  64. }
  65. *obj = &robj->gem_base;
  66. mutex_lock(&rdev->gem.mutex);
  67. list_add_tail(&robj->list, &rdev->gem.objects);
  68. mutex_unlock(&rdev->gem.mutex);
  69. return 0;
  70. }
  71. int radeon_gem_set_domain(struct drm_gem_object *gobj,
  72. uint32_t rdomain, uint32_t wdomain)
  73. {
  74. struct radeon_bo *robj;
  75. uint32_t domain;
  76. int r;
  77. /* FIXME: reeimplement */
  78. robj = gem_to_radeon_bo(gobj);
  79. /* work out where to validate the buffer to */
  80. domain = wdomain;
  81. if (!domain) {
  82. domain = rdomain;
  83. }
  84. if (!domain) {
  85. /* Do nothings */
  86. printk(KERN_WARNING "Set domain without domain !\n");
  87. return 0;
  88. }
  89. if (domain == RADEON_GEM_DOMAIN_CPU) {
  90. /* Asking for cpu access wait for object idle */
  91. r = radeon_bo_wait(robj, NULL, false);
  92. if (r) {
  93. printk(KERN_ERR "Failed to wait for object !\n");
  94. return r;
  95. }
  96. }
  97. return 0;
  98. }
  99. int radeon_gem_init(struct radeon_device *rdev)
  100. {
  101. INIT_LIST_HEAD(&rdev->gem.objects);
  102. return 0;
  103. }
  104. void radeon_gem_fini(struct radeon_device *rdev)
  105. {
  106. radeon_bo_force_delete(rdev);
  107. }
  108. /*
  109. * Call from drm_gem_handle_create which appear in both new and open ioctl
  110. * case.
  111. */
  112. int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
  113. {
  114. struct radeon_bo *rbo = gem_to_radeon_bo(obj);
  115. struct radeon_device *rdev = rbo->rdev;
  116. struct radeon_fpriv *fpriv = file_priv->driver_priv;
  117. struct radeon_vm *vm = &fpriv->vm;
  118. struct radeon_bo_va *bo_va;
  119. int r;
  120. if (rdev->family < CHIP_CAYMAN) {
  121. return 0;
  122. }
  123. r = radeon_bo_reserve(rbo, false);
  124. if (r) {
  125. return r;
  126. }
  127. bo_va = radeon_vm_bo_find(vm, rbo);
  128. if (!bo_va) {
  129. bo_va = radeon_vm_bo_add(rdev, vm, rbo);
  130. } else {
  131. ++bo_va->ref_count;
  132. }
  133. radeon_bo_unreserve(rbo);
  134. return 0;
  135. }
  136. void radeon_gem_object_close(struct drm_gem_object *obj,
  137. struct drm_file *file_priv)
  138. {
  139. struct radeon_bo *rbo = gem_to_radeon_bo(obj);
  140. struct radeon_device *rdev = rbo->rdev;
  141. struct radeon_fpriv *fpriv = file_priv->driver_priv;
  142. struct radeon_vm *vm = &fpriv->vm;
  143. struct radeon_bo_va *bo_va;
  144. int r;
  145. if (rdev->family < CHIP_CAYMAN) {
  146. return;
  147. }
  148. r = radeon_bo_reserve(rbo, true);
  149. if (r) {
  150. dev_err(rdev->dev, "leaking bo va because "
  151. "we fail to reserve bo (%d)\n", r);
  152. return;
  153. }
  154. bo_va = radeon_vm_bo_find(vm, rbo);
  155. if (bo_va) {
  156. if (--bo_va->ref_count == 0) {
  157. radeon_vm_bo_rmv(rdev, bo_va);
  158. }
  159. }
  160. radeon_bo_unreserve(rbo);
  161. }
  162. static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r)
  163. {
  164. if (r == -EDEADLK) {
  165. r = radeon_gpu_reset(rdev);
  166. if (!r)
  167. r = -EAGAIN;
  168. }
  169. return r;
  170. }
  171. /*
  172. * GEM ioctls.
  173. */
  174. int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
  175. struct drm_file *filp)
  176. {
  177. struct radeon_device *rdev = dev->dev_private;
  178. struct drm_radeon_gem_info *args = data;
  179. struct ttm_mem_type_manager *man;
  180. unsigned i;
  181. man = &rdev->mman.bdev.man[TTM_PL_VRAM];
  182. args->vram_size = rdev->mc.real_vram_size;
  183. args->vram_visible = (u64)man->size << PAGE_SHIFT;
  184. if (rdev->stollen_vga_memory)
  185. args->vram_visible -= radeon_bo_size(rdev->stollen_vga_memory);
  186. args->vram_visible -= radeon_fbdev_total_size(rdev);
  187. args->gart_size = rdev->mc.gtt_size - 4096 - RADEON_IB_POOL_SIZE*64*1024;
  188. for(i = 0; i < RADEON_NUM_RINGS; ++i)
  189. args->gart_size -= rdev->ring[i].ring_size;
  190. return 0;
  191. }
  192. int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
  193. struct drm_file *filp)
  194. {
  195. /* TODO: implement */
  196. DRM_ERROR("unimplemented %s\n", __func__);
  197. return -ENOSYS;
  198. }
  199. int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
  200. struct drm_file *filp)
  201. {
  202. /* TODO: implement */
  203. DRM_ERROR("unimplemented %s\n", __func__);
  204. return -ENOSYS;
  205. }
  206. int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
  207. struct drm_file *filp)
  208. {
  209. struct radeon_device *rdev = dev->dev_private;
  210. struct drm_radeon_gem_create *args = data;
  211. struct drm_gem_object *gobj;
  212. uint32_t handle;
  213. int r;
  214. down_read(&rdev->exclusive_lock);
  215. /* create a gem object to contain this object in */
  216. args->size = roundup(args->size, PAGE_SIZE);
  217. r = radeon_gem_object_create(rdev, args->size, args->alignment,
  218. args->initial_domain, false,
  219. false, &gobj);
  220. if (r) {
  221. up_read(&rdev->exclusive_lock);
  222. r = radeon_gem_handle_lockup(rdev, r);
  223. return r;
  224. }
  225. r = drm_gem_handle_create(filp, gobj, &handle);
  226. /* drop reference from allocate - handle holds it now */
  227. drm_gem_object_unreference_unlocked(gobj);
  228. if (r) {
  229. up_read(&rdev->exclusive_lock);
  230. r = radeon_gem_handle_lockup(rdev, r);
  231. return r;
  232. }
  233. args->handle = handle;
  234. up_read(&rdev->exclusive_lock);
  235. return 0;
  236. }
  237. int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
  238. struct drm_file *filp)
  239. {
  240. /* transition the BO to a domain -
  241. * just validate the BO into a certain domain */
  242. struct radeon_device *rdev = dev->dev_private;
  243. struct drm_radeon_gem_set_domain *args = data;
  244. struct drm_gem_object *gobj;
  245. struct radeon_bo *robj;
  246. int r;
  247. /* for now if someone requests domain CPU -
  248. * just make sure the buffer is finished with */
  249. down_read(&rdev->exclusive_lock);
  250. /* just do a BO wait for now */
  251. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  252. if (gobj == NULL) {
  253. up_read(&rdev->exclusive_lock);
  254. return -ENOENT;
  255. }
  256. robj = gem_to_radeon_bo(gobj);
  257. r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
  258. drm_gem_object_unreference_unlocked(gobj);
  259. up_read(&rdev->exclusive_lock);
  260. r = radeon_gem_handle_lockup(robj->rdev, r);
  261. return r;
  262. }
  263. int radeon_mode_dumb_mmap(struct drm_file *filp,
  264. struct drm_device *dev,
  265. uint32_t handle, uint64_t *offset_p)
  266. {
  267. struct drm_gem_object *gobj;
  268. struct radeon_bo *robj;
  269. gobj = drm_gem_object_lookup(dev, filp, handle);
  270. if (gobj == NULL) {
  271. return -ENOENT;
  272. }
  273. robj = gem_to_radeon_bo(gobj);
  274. *offset_p = radeon_bo_mmap_offset(robj);
  275. drm_gem_object_unreference_unlocked(gobj);
  276. return 0;
  277. }
  278. int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
  279. struct drm_file *filp)
  280. {
  281. struct drm_radeon_gem_mmap *args = data;
  282. return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
  283. }
  284. int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
  285. struct drm_file *filp)
  286. {
  287. struct radeon_device *rdev = dev->dev_private;
  288. struct drm_radeon_gem_busy *args = data;
  289. struct drm_gem_object *gobj;
  290. struct radeon_bo *robj;
  291. int r;
  292. uint32_t cur_placement = 0;
  293. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  294. if (gobj == NULL) {
  295. return -ENOENT;
  296. }
  297. robj = gem_to_radeon_bo(gobj);
  298. r = radeon_bo_wait(robj, &cur_placement, true);
  299. switch (cur_placement) {
  300. case TTM_PL_VRAM:
  301. args->domain = RADEON_GEM_DOMAIN_VRAM;
  302. break;
  303. case TTM_PL_TT:
  304. args->domain = RADEON_GEM_DOMAIN_GTT;
  305. break;
  306. case TTM_PL_SYSTEM:
  307. args->domain = RADEON_GEM_DOMAIN_CPU;
  308. default:
  309. break;
  310. }
  311. drm_gem_object_unreference_unlocked(gobj);
  312. r = radeon_gem_handle_lockup(rdev, r);
  313. return r;
  314. }
  315. int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
  316. struct drm_file *filp)
  317. {
  318. struct radeon_device *rdev = dev->dev_private;
  319. struct drm_radeon_gem_wait_idle *args = data;
  320. struct drm_gem_object *gobj;
  321. struct radeon_bo *robj;
  322. int r;
  323. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  324. if (gobj == NULL) {
  325. return -ENOENT;
  326. }
  327. robj = gem_to_radeon_bo(gobj);
  328. r = radeon_bo_wait(robj, NULL, false);
  329. /* callback hw specific functions if any */
  330. if (rdev->asic->ioctl_wait_idle)
  331. robj->rdev->asic->ioctl_wait_idle(rdev, robj);
  332. drm_gem_object_unreference_unlocked(gobj);
  333. r = radeon_gem_handle_lockup(rdev, r);
  334. return r;
  335. }
  336. int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
  337. struct drm_file *filp)
  338. {
  339. struct drm_radeon_gem_set_tiling *args = data;
  340. struct drm_gem_object *gobj;
  341. struct radeon_bo *robj;
  342. int r = 0;
  343. DRM_DEBUG("%d \n", args->handle);
  344. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  345. if (gobj == NULL)
  346. return -ENOENT;
  347. robj = gem_to_radeon_bo(gobj);
  348. r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
  349. drm_gem_object_unreference_unlocked(gobj);
  350. return r;
  351. }
  352. int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
  353. struct drm_file *filp)
  354. {
  355. struct drm_radeon_gem_get_tiling *args = data;
  356. struct drm_gem_object *gobj;
  357. struct radeon_bo *rbo;
  358. int r = 0;
  359. DRM_DEBUG("\n");
  360. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  361. if (gobj == NULL)
  362. return -ENOENT;
  363. rbo = gem_to_radeon_bo(gobj);
  364. r = radeon_bo_reserve(rbo, false);
  365. if (unlikely(r != 0))
  366. goto out;
  367. radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
  368. radeon_bo_unreserve(rbo);
  369. out:
  370. drm_gem_object_unreference_unlocked(gobj);
  371. return r;
  372. }
  373. int radeon_gem_va_ioctl(struct drm_device *dev, void *data,
  374. struct drm_file *filp)
  375. {
  376. struct drm_radeon_gem_va *args = data;
  377. struct drm_gem_object *gobj;
  378. struct radeon_device *rdev = dev->dev_private;
  379. struct radeon_fpriv *fpriv = filp->driver_priv;
  380. struct radeon_bo *rbo;
  381. struct radeon_bo_va *bo_va;
  382. u32 invalid_flags;
  383. int r = 0;
  384. if (!rdev->vm_manager.enabled) {
  385. args->operation = RADEON_VA_RESULT_ERROR;
  386. return -ENOTTY;
  387. }
  388. /* !! DONT REMOVE !!
  389. * We don't support vm_id yet, to be sure we don't have have broken
  390. * userspace, reject anyone trying to use non 0 value thus moving
  391. * forward we can use those fields without breaking existant userspace
  392. */
  393. if (args->vm_id) {
  394. args->operation = RADEON_VA_RESULT_ERROR;
  395. return -EINVAL;
  396. }
  397. if (args->offset < RADEON_VA_RESERVED_SIZE) {
  398. dev_err(&dev->pdev->dev,
  399. "offset 0x%lX is in reserved area 0x%X\n",
  400. (unsigned long)args->offset,
  401. RADEON_VA_RESERVED_SIZE);
  402. args->operation = RADEON_VA_RESULT_ERROR;
  403. return -EINVAL;
  404. }
  405. /* don't remove, we need to enforce userspace to set the snooped flag
  406. * otherwise we will endup with broken userspace and we won't be able
  407. * to enable this feature without adding new interface
  408. */
  409. invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM;
  410. if ((args->flags & invalid_flags)) {
  411. dev_err(&dev->pdev->dev, "invalid flags 0x%08X vs 0x%08X\n",
  412. args->flags, invalid_flags);
  413. args->operation = RADEON_VA_RESULT_ERROR;
  414. return -EINVAL;
  415. }
  416. if (!(args->flags & RADEON_VM_PAGE_SNOOPED)) {
  417. dev_err(&dev->pdev->dev, "only supported snooped mapping for now\n");
  418. args->operation = RADEON_VA_RESULT_ERROR;
  419. return -EINVAL;
  420. }
  421. switch (args->operation) {
  422. case RADEON_VA_MAP:
  423. case RADEON_VA_UNMAP:
  424. break;
  425. default:
  426. dev_err(&dev->pdev->dev, "unsupported operation %d\n",
  427. args->operation);
  428. args->operation = RADEON_VA_RESULT_ERROR;
  429. return -EINVAL;
  430. }
  431. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  432. if (gobj == NULL) {
  433. args->operation = RADEON_VA_RESULT_ERROR;
  434. return -ENOENT;
  435. }
  436. rbo = gem_to_radeon_bo(gobj);
  437. r = radeon_bo_reserve(rbo, false);
  438. if (r) {
  439. args->operation = RADEON_VA_RESULT_ERROR;
  440. drm_gem_object_unreference_unlocked(gobj);
  441. return r;
  442. }
  443. bo_va = radeon_vm_bo_find(&fpriv->vm, rbo);
  444. if (!bo_va) {
  445. args->operation = RADEON_VA_RESULT_ERROR;
  446. drm_gem_object_unreference_unlocked(gobj);
  447. return -ENOENT;
  448. }
  449. switch (args->operation) {
  450. case RADEON_VA_MAP:
  451. if (bo_va->soffset) {
  452. args->operation = RADEON_VA_RESULT_VA_EXIST;
  453. args->offset = bo_va->soffset;
  454. goto out;
  455. }
  456. r = radeon_vm_bo_set_addr(rdev, bo_va, args->offset, args->flags);
  457. break;
  458. case RADEON_VA_UNMAP:
  459. r = radeon_vm_bo_set_addr(rdev, bo_va, 0, 0);
  460. break;
  461. default:
  462. break;
  463. }
  464. args->operation = RADEON_VA_RESULT_OK;
  465. if (r) {
  466. args->operation = RADEON_VA_RESULT_ERROR;
  467. }
  468. out:
  469. radeon_bo_unreserve(rbo);
  470. drm_gem_object_unreference_unlocked(gobj);
  471. return r;
  472. }
  473. int radeon_mode_dumb_create(struct drm_file *file_priv,
  474. struct drm_device *dev,
  475. struct drm_mode_create_dumb *args)
  476. {
  477. struct radeon_device *rdev = dev->dev_private;
  478. struct drm_gem_object *gobj;
  479. uint32_t handle;
  480. int r;
  481. args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
  482. args->size = args->pitch * args->height;
  483. args->size = ALIGN(args->size, PAGE_SIZE);
  484. r = radeon_gem_object_create(rdev, args->size, 0,
  485. RADEON_GEM_DOMAIN_VRAM,
  486. false, ttm_bo_type_device,
  487. &gobj);
  488. if (r)
  489. return -ENOMEM;
  490. r = drm_gem_handle_create(file_priv, gobj, &handle);
  491. /* drop reference from allocate - handle holds it now */
  492. drm_gem_object_unreference_unlocked(gobj);
  493. if (r) {
  494. return r;
  495. }
  496. args->handle = handle;
  497. return 0;
  498. }
  499. int radeon_mode_dumb_destroy(struct drm_file *file_priv,
  500. struct drm_device *dev,
  501. uint32_t handle)
  502. {
  503. return drm_gem_handle_delete(file_priv, handle);
  504. }