ice1712.c 81 KB

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  1. /*
  2. * ALSA driver for ICEnsemble ICE1712 (Envy24)
  3. *
  4. * Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. *
  20. */
  21. /*
  22. NOTES:
  23. - spdif nonaudio consumer mode does not work (at least with my
  24. Sony STR-DB830)
  25. */
  26. /*
  27. * Changes:
  28. *
  29. * 2002.09.09 Takashi Iwai <tiwai@suse.de>
  30. * split the code to several files. each low-level routine
  31. * is stored in the local file and called from registration
  32. * function from card_info struct.
  33. *
  34. * 2002.11.26 James Stafford <jstafford@ampltd.com>
  35. * Added support for VT1724 (Envy24HT)
  36. * I have left out support for 176.4 and 192 KHz for the moment.
  37. * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401
  38. *
  39. * 2003.02.20 Taksahi Iwai <tiwai@suse.de>
  40. * Split vt1724 part to an independent driver.
  41. * The GPIO is accessed through the callback functions now.
  42. *
  43. * 2004.03.31 Doug McLain <nostar@comcast.net>
  44. * Added support for Event Electronics EZ8 card to hoontech.c.
  45. */
  46. #include <sound/driver.h>
  47. #include <asm/io.h>
  48. #include <linux/delay.h>
  49. #include <linux/interrupt.h>
  50. #include <linux/init.h>
  51. #include <linux/pci.h>
  52. #include <linux/slab.h>
  53. #include <linux/moduleparam.h>
  54. #include <linux/mutex.h>
  55. #include <sound/core.h>
  56. #include <sound/cs8427.h>
  57. #include <sound/info.h>
  58. #include <sound/mpu401.h>
  59. #include <sound/initval.h>
  60. #include <sound/asoundef.h>
  61. #include "ice1712.h"
  62. /* lowlevel routines */
  63. #include "delta.h"
  64. #include "ews.h"
  65. #include "hoontech.h"
  66. MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
  67. MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)");
  68. MODULE_LICENSE("GPL");
  69. MODULE_SUPPORTED_DEVICE("{"
  70. HOONTECH_DEVICE_DESC
  71. DELTA_DEVICE_DESC
  72. EWS_DEVICE_DESC
  73. "{ICEnsemble,Generic ICE1712},"
  74. "{ICEnsemble,Generic Envy24}}");
  75. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  76. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  77. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  78. static char *model[SNDRV_CARDS];
  79. static int omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */
  80. static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transciever reset timeout value in msec */
  81. module_param_array(index, int, NULL, 0444);
  82. MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard.");
  83. module_param_array(id, charp, NULL, 0444);
  84. MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard.");
  85. module_param_array(enable, bool, NULL, 0444);
  86. MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard.");
  87. module_param_array(omni, bool, NULL, 0444);
  88. MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support.");
  89. module_param_array(cs8427_timeout, int, NULL, 0444);
  90. MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution.");
  91. module_param_array(model, charp, NULL, 0444);
  92. MODULE_PARM_DESC(model, "Use the given board model.");
  93. static struct pci_device_id snd_ice1712_ids[] = {
  94. { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_ICE_1712, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ICE1712 */
  95. { 0, }
  96. };
  97. MODULE_DEVICE_TABLE(pci, snd_ice1712_ids);
  98. static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice);
  99. static int snd_ice1712_build_controls(struct snd_ice1712 *ice);
  100. static int PRO_RATE_LOCKED;
  101. static int PRO_RATE_RESET = 1;
  102. static unsigned int PRO_RATE_DEFAULT = 44100;
  103. /*
  104. * Basic I/O
  105. */
  106. /* check whether the clock mode is spdif-in */
  107. static inline int is_spdif_master(struct snd_ice1712 *ice)
  108. {
  109. return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0;
  110. }
  111. static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
  112. {
  113. return is_spdif_master(ice) || PRO_RATE_LOCKED;
  114. }
  115. static inline void snd_ice1712_ds_write(struct snd_ice1712 * ice, u8 channel, u8 addr, u32 data)
  116. {
  117. outb((channel << 4) | addr, ICEDS(ice, INDEX));
  118. outl(data, ICEDS(ice, DATA));
  119. }
  120. static inline u32 snd_ice1712_ds_read(struct snd_ice1712 * ice, u8 channel, u8 addr)
  121. {
  122. outb((channel << 4) | addr, ICEDS(ice, INDEX));
  123. return inl(ICEDS(ice, DATA));
  124. }
  125. static void snd_ice1712_ac97_write(struct snd_ac97 *ac97,
  126. unsigned short reg,
  127. unsigned short val)
  128. {
  129. struct snd_ice1712 *ice = ac97->private_data;
  130. int tm;
  131. unsigned char old_cmd = 0;
  132. for (tm = 0; tm < 0x10000; tm++) {
  133. old_cmd = inb(ICEREG(ice, AC97_CMD));
  134. if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
  135. continue;
  136. if (!(old_cmd & ICE1712_AC97_READY))
  137. continue;
  138. break;
  139. }
  140. outb(reg, ICEREG(ice, AC97_INDEX));
  141. outw(val, ICEREG(ice, AC97_DATA));
  142. old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
  143. outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD));
  144. for (tm = 0; tm < 0x10000; tm++)
  145. if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
  146. break;
  147. }
  148. static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97,
  149. unsigned short reg)
  150. {
  151. struct snd_ice1712 *ice = ac97->private_data;
  152. int tm;
  153. unsigned char old_cmd = 0;
  154. for (tm = 0; tm < 0x10000; tm++) {
  155. old_cmd = inb(ICEREG(ice, AC97_CMD));
  156. if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
  157. continue;
  158. if (!(old_cmd & ICE1712_AC97_READY))
  159. continue;
  160. break;
  161. }
  162. outb(reg, ICEREG(ice, AC97_INDEX));
  163. outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD));
  164. for (tm = 0; tm < 0x10000; tm++)
  165. if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
  166. break;
  167. if (tm >= 0x10000) /* timeout */
  168. return ~0;
  169. return inw(ICEREG(ice, AC97_DATA));
  170. }
  171. /*
  172. * pro ac97 section
  173. */
  174. static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97,
  175. unsigned short reg,
  176. unsigned short val)
  177. {
  178. struct snd_ice1712 *ice = ac97->private_data;
  179. int tm;
  180. unsigned char old_cmd = 0;
  181. for (tm = 0; tm < 0x10000; tm++) {
  182. old_cmd = inb(ICEMT(ice, AC97_CMD));
  183. if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
  184. continue;
  185. if (!(old_cmd & ICE1712_AC97_READY))
  186. continue;
  187. break;
  188. }
  189. outb(reg, ICEMT(ice, AC97_INDEX));
  190. outw(val, ICEMT(ice, AC97_DATA));
  191. old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
  192. outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD));
  193. for (tm = 0; tm < 0x10000; tm++)
  194. if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
  195. break;
  196. }
  197. static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97,
  198. unsigned short reg)
  199. {
  200. struct snd_ice1712 *ice = ac97->private_data;
  201. int tm;
  202. unsigned char old_cmd = 0;
  203. for (tm = 0; tm < 0x10000; tm++) {
  204. old_cmd = inb(ICEMT(ice, AC97_CMD));
  205. if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
  206. continue;
  207. if (!(old_cmd & ICE1712_AC97_READY))
  208. continue;
  209. break;
  210. }
  211. outb(reg, ICEMT(ice, AC97_INDEX));
  212. outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD));
  213. for (tm = 0; tm < 0x10000; tm++)
  214. if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
  215. break;
  216. if (tm >= 0x10000) /* timeout */
  217. return ~0;
  218. return inw(ICEMT(ice, AC97_DATA));
  219. }
  220. /*
  221. * consumer ac97 digital mix
  222. */
  223. static int snd_ice1712_digmix_route_ac97_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  224. {
  225. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  226. uinfo->count = 1;
  227. uinfo->value.integer.min = 0;
  228. uinfo->value.integer.max = 1;
  229. return 0;
  230. }
  231. static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  232. {
  233. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  234. ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0;
  235. return 0;
  236. }
  237. static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  238. {
  239. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  240. unsigned char val, nval;
  241. spin_lock_irq(&ice->reg_lock);
  242. val = inb(ICEMT(ice, MONITOR_ROUTECTRL));
  243. nval = val & ~ICE1712_ROUTE_AC97;
  244. if (ucontrol->value.integer.value[0]) nval |= ICE1712_ROUTE_AC97;
  245. outb(nval, ICEMT(ice, MONITOR_ROUTECTRL));
  246. spin_unlock_irq(&ice->reg_lock);
  247. return val != nval;
  248. }
  249. static struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 __devinitdata = {
  250. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  251. .name = "Digital Mixer To AC97",
  252. .info = snd_ice1712_digmix_route_ac97_info,
  253. .get = snd_ice1712_digmix_route_ac97_get,
  254. .put = snd_ice1712_digmix_route_ac97_put,
  255. };
  256. /*
  257. * gpio operations
  258. */
  259. static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
  260. {
  261. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data);
  262. inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
  263. }
  264. static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
  265. {
  266. snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data);
  267. inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
  268. }
  269. static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice)
  270. {
  271. return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  272. }
  273. static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val)
  274. {
  275. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val);
  276. inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
  277. }
  278. /*
  279. *
  280. * CS8427 interface
  281. *
  282. */
  283. /*
  284. * change the input clock selection
  285. * spdif_clock = 1 - IEC958 input, 0 - Envy24
  286. */
  287. static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock)
  288. {
  289. unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */
  290. unsigned char val, nval;
  291. int res = 0;
  292. snd_i2c_lock(ice->i2c);
  293. if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) {
  294. snd_i2c_unlock(ice->i2c);
  295. return -EIO;
  296. }
  297. if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) {
  298. snd_i2c_unlock(ice->i2c);
  299. return -EIO;
  300. }
  301. nval = val & 0xf0;
  302. if (spdif_clock)
  303. nval |= 0x01;
  304. else
  305. nval |= 0x04;
  306. if (val != nval) {
  307. reg[1] = nval;
  308. if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) {
  309. res = -EIO;
  310. } else {
  311. res++;
  312. }
  313. }
  314. snd_i2c_unlock(ice->i2c);
  315. return res;
  316. }
  317. /*
  318. * spdif callbacks
  319. */
  320. static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
  321. {
  322. snd_cs8427_iec958_active(ice->cs8427, 1);
  323. }
  324. static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
  325. {
  326. snd_cs8427_iec958_active(ice->cs8427, 0);
  327. }
  328. static void setup_cs8427(struct snd_ice1712 *ice, int rate)
  329. {
  330. snd_cs8427_iec958_pcm(ice->cs8427, rate);
  331. }
  332. /*
  333. * create and initialize callbacks for cs8427 interface
  334. */
  335. int __devinit snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr)
  336. {
  337. int err;
  338. if ((err = snd_cs8427_create(ice->i2c, addr,
  339. (ice->cs8427_timeout * HZ) / 1000,
  340. &ice->cs8427)) < 0) {
  341. snd_printk(KERN_ERR "CS8427 initialization failed\n");
  342. return err;
  343. }
  344. ice->spdif.ops.open = open_cs8427;
  345. ice->spdif.ops.close = close_cs8427;
  346. ice->spdif.ops.setup_rate = setup_cs8427;
  347. return 0;
  348. }
  349. static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master)
  350. {
  351. /* change CS8427 clock source too */
  352. if (ice->cs8427)
  353. snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master);
  354. /* notify ak4524 chip as well */
  355. if (spdif_is_master) {
  356. unsigned int i;
  357. for (i = 0; i < ice->akm_codecs; i++) {
  358. if (ice->akm[i].ops.set_rate_val)
  359. ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
  360. }
  361. }
  362. }
  363. /*
  364. * Interrupt handler
  365. */
  366. static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  367. {
  368. struct snd_ice1712 *ice = dev_id;
  369. unsigned char status;
  370. int handled = 0;
  371. while (1) {
  372. status = inb(ICEREG(ice, IRQSTAT));
  373. if (status == 0)
  374. break;
  375. handled = 1;
  376. if (status & ICE1712_IRQ_MPU1) {
  377. if (ice->rmidi[0])
  378. snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data, regs);
  379. outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT));
  380. status &= ~ICE1712_IRQ_MPU1;
  381. }
  382. if (status & ICE1712_IRQ_TIMER)
  383. outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT));
  384. if (status & ICE1712_IRQ_MPU2) {
  385. if (ice->rmidi[1])
  386. snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data, regs);
  387. outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT));
  388. status &= ~ICE1712_IRQ_MPU2;
  389. }
  390. if (status & ICE1712_IRQ_PROPCM) {
  391. unsigned char mtstat = inb(ICEMT(ice, IRQ));
  392. if (mtstat & ICE1712_MULTI_PBKSTATUS) {
  393. if (ice->playback_pro_substream)
  394. snd_pcm_period_elapsed(ice->playback_pro_substream);
  395. outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ));
  396. }
  397. if (mtstat & ICE1712_MULTI_CAPSTATUS) {
  398. if (ice->capture_pro_substream)
  399. snd_pcm_period_elapsed(ice->capture_pro_substream);
  400. outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ));
  401. }
  402. }
  403. if (status & ICE1712_IRQ_FM)
  404. outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT));
  405. if (status & ICE1712_IRQ_PBKDS) {
  406. u32 idx;
  407. u16 pbkstatus;
  408. struct snd_pcm_substream *substream;
  409. pbkstatus = inw(ICEDS(ice, INTSTAT));
  410. //printk("pbkstatus = 0x%x\n", pbkstatus);
  411. for (idx = 0; idx < 6; idx++) {
  412. if ((pbkstatus & (3 << (idx * 2))) == 0)
  413. continue;
  414. if ((substream = ice->playback_con_substream_ds[idx]) != NULL)
  415. snd_pcm_period_elapsed(substream);
  416. outw(3 << (idx * 2), ICEDS(ice, INTSTAT));
  417. }
  418. outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT));
  419. }
  420. if (status & ICE1712_IRQ_CONCAP) {
  421. if (ice->capture_con_substream)
  422. snd_pcm_period_elapsed(ice->capture_con_substream);
  423. outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT));
  424. }
  425. if (status & ICE1712_IRQ_CONPBK) {
  426. if (ice->playback_con_substream)
  427. snd_pcm_period_elapsed(ice->playback_con_substream);
  428. outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT));
  429. }
  430. }
  431. return IRQ_RETVAL(handled);
  432. }
  433. /*
  434. * PCM part - misc
  435. */
  436. static int snd_ice1712_hw_params(struct snd_pcm_substream *substream,
  437. struct snd_pcm_hw_params *hw_params)
  438. {
  439. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  440. }
  441. static int snd_ice1712_hw_free(struct snd_pcm_substream *substream)
  442. {
  443. return snd_pcm_lib_free_pages(substream);
  444. }
  445. /*
  446. * PCM part - consumer I/O
  447. */
  448. static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream,
  449. int cmd)
  450. {
  451. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  452. int result = 0;
  453. u32 tmp;
  454. spin_lock(&ice->reg_lock);
  455. tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL);
  456. if (cmd == SNDRV_PCM_TRIGGER_START) {
  457. tmp |= 1;
  458. } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
  459. tmp &= ~1;
  460. } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
  461. tmp |= 2;
  462. } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
  463. tmp &= ~2;
  464. } else {
  465. result = -EINVAL;
  466. }
  467. snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
  468. spin_unlock(&ice->reg_lock);
  469. return result;
  470. }
  471. static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream,
  472. int cmd)
  473. {
  474. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  475. int result = 0;
  476. u32 tmp;
  477. spin_lock(&ice->reg_lock);
  478. tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL);
  479. if (cmd == SNDRV_PCM_TRIGGER_START) {
  480. tmp |= 1;
  481. } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
  482. tmp &= ~1;
  483. } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
  484. tmp |= 2;
  485. } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
  486. tmp &= ~2;
  487. } else {
  488. result = -EINVAL;
  489. }
  490. snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp);
  491. spin_unlock(&ice->reg_lock);
  492. return result;
  493. }
  494. static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream,
  495. int cmd)
  496. {
  497. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  498. int result = 0;
  499. u8 tmp;
  500. spin_lock(&ice->reg_lock);
  501. tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL);
  502. if (cmd == SNDRV_PCM_TRIGGER_START) {
  503. tmp |= 1;
  504. } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
  505. tmp &= ~1;
  506. } else {
  507. result = -EINVAL;
  508. }
  509. snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
  510. spin_unlock(&ice->reg_lock);
  511. return result;
  512. }
  513. static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream)
  514. {
  515. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  516. struct snd_pcm_runtime *runtime = substream->runtime;
  517. u32 period_size, buf_size, rate, tmp;
  518. period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  519. buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
  520. tmp = 0x0000;
  521. if (snd_pcm_format_width(runtime->format) == 16)
  522. tmp |= 0x10;
  523. if (runtime->channels == 2)
  524. tmp |= 0x08;
  525. rate = (runtime->rate * 8192) / 375;
  526. if (rate > 0x000fffff)
  527. rate = 0x000fffff;
  528. spin_lock_irq(&ice->reg_lock);
  529. outb(0, ice->ddma_port + 15);
  530. outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b);
  531. outl(runtime->dma_addr, ice->ddma_port + 0);
  532. outw(buf_size, ice->ddma_port + 4);
  533. snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff);
  534. snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff);
  535. snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff);
  536. snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
  537. snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff);
  538. snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8);
  539. snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0);
  540. snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0);
  541. spin_unlock_irq(&ice->reg_lock);
  542. return 0;
  543. }
  544. static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream)
  545. {
  546. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  547. struct snd_pcm_runtime *runtime = substream->runtime;
  548. u32 period_size, buf_size, rate, tmp, chn;
  549. period_size = snd_pcm_lib_period_bytes(substream) - 1;
  550. buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
  551. tmp = 0x0064;
  552. if (snd_pcm_format_width(runtime->format) == 16)
  553. tmp &= ~0x04;
  554. if (runtime->channels == 2)
  555. tmp |= 0x08;
  556. rate = (runtime->rate * 8192) / 375;
  557. if (rate > 0x000fffff)
  558. rate = 0x000fffff;
  559. ice->playback_con_active_buf[substream->number] = 0;
  560. ice->playback_con_virt_addr[substream->number] = runtime->dma_addr;
  561. chn = substream->number * 2;
  562. spin_lock_irq(&ice->reg_lock);
  563. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr);
  564. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size);
  565. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0));
  566. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size);
  567. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate);
  568. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0);
  569. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp);
  570. if (runtime->channels == 2) {
  571. snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate);
  572. snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0);
  573. }
  574. spin_unlock_irq(&ice->reg_lock);
  575. return 0;
  576. }
  577. static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream)
  578. {
  579. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  580. struct snd_pcm_runtime *runtime = substream->runtime;
  581. u32 period_size, buf_size;
  582. u8 tmp;
  583. period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  584. buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
  585. tmp = 0x06;
  586. if (snd_pcm_format_width(runtime->format) == 16)
  587. tmp &= ~0x04;
  588. if (runtime->channels == 2)
  589. tmp &= ~0x02;
  590. spin_lock_irq(&ice->reg_lock);
  591. outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR));
  592. outw(buf_size, ICEREG(ice, CONCAP_COUNT));
  593. snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8);
  594. snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff);
  595. snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
  596. spin_unlock_irq(&ice->reg_lock);
  597. snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
  598. return 0;
  599. }
  600. static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream)
  601. {
  602. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  603. struct snd_pcm_runtime *runtime = substream->runtime;
  604. size_t ptr;
  605. if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1))
  606. return 0;
  607. ptr = runtime->buffer_size - inw(ice->ddma_port + 4);
  608. if (ptr == runtime->buffer_size)
  609. ptr = 0;
  610. return bytes_to_frames(substream->runtime, ptr);
  611. }
  612. static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream)
  613. {
  614. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  615. u8 addr;
  616. size_t ptr;
  617. if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1))
  618. return 0;
  619. if (ice->playback_con_active_buf[substream->number])
  620. addr = ICE1712_DSC_ADDR1;
  621. else
  622. addr = ICE1712_DSC_ADDR0;
  623. ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) -
  624. ice->playback_con_virt_addr[substream->number];
  625. if (ptr == substream->runtime->buffer_size)
  626. ptr = 0;
  627. return bytes_to_frames(substream->runtime, ptr);
  628. }
  629. static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream)
  630. {
  631. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  632. size_t ptr;
  633. if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1))
  634. return 0;
  635. ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr;
  636. if (ptr == substream->runtime->buffer_size)
  637. ptr = 0;
  638. return bytes_to_frames(substream->runtime, ptr);
  639. }
  640. static struct snd_pcm_hardware snd_ice1712_playback =
  641. {
  642. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  643. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  644. SNDRV_PCM_INFO_MMAP_VALID |
  645. SNDRV_PCM_INFO_PAUSE),
  646. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  647. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  648. .rate_min = 4000,
  649. .rate_max = 48000,
  650. .channels_min = 1,
  651. .channels_max = 2,
  652. .buffer_bytes_max = (64*1024),
  653. .period_bytes_min = 64,
  654. .period_bytes_max = (64*1024),
  655. .periods_min = 1,
  656. .periods_max = 1024,
  657. .fifo_size = 0,
  658. };
  659. static struct snd_pcm_hardware snd_ice1712_playback_ds =
  660. {
  661. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  662. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  663. SNDRV_PCM_INFO_MMAP_VALID |
  664. SNDRV_PCM_INFO_PAUSE),
  665. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  666. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  667. .rate_min = 4000,
  668. .rate_max = 48000,
  669. .channels_min = 1,
  670. .channels_max = 2,
  671. .buffer_bytes_max = (128*1024),
  672. .period_bytes_min = 64,
  673. .period_bytes_max = (128*1024),
  674. .periods_min = 2,
  675. .periods_max = 2,
  676. .fifo_size = 0,
  677. };
  678. static struct snd_pcm_hardware snd_ice1712_capture =
  679. {
  680. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  681. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  682. SNDRV_PCM_INFO_MMAP_VALID),
  683. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  684. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  685. .rate_min = 4000,
  686. .rate_max = 48000,
  687. .channels_min = 1,
  688. .channels_max = 2,
  689. .buffer_bytes_max = (64*1024),
  690. .period_bytes_min = 64,
  691. .period_bytes_max = (64*1024),
  692. .periods_min = 1,
  693. .periods_max = 1024,
  694. .fifo_size = 0,
  695. };
  696. static int snd_ice1712_playback_open(struct snd_pcm_substream *substream)
  697. {
  698. struct snd_pcm_runtime *runtime = substream->runtime;
  699. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  700. ice->playback_con_substream = substream;
  701. runtime->hw = snd_ice1712_playback;
  702. return 0;
  703. }
  704. static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream)
  705. {
  706. struct snd_pcm_runtime *runtime = substream->runtime;
  707. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  708. u32 tmp;
  709. ice->playback_con_substream_ds[substream->number] = substream;
  710. runtime->hw = snd_ice1712_playback_ds;
  711. spin_lock_irq(&ice->reg_lock);
  712. tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2));
  713. outw(tmp, ICEDS(ice, INTMASK));
  714. spin_unlock_irq(&ice->reg_lock);
  715. return 0;
  716. }
  717. static int snd_ice1712_capture_open(struct snd_pcm_substream *substream)
  718. {
  719. struct snd_pcm_runtime *runtime = substream->runtime;
  720. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  721. ice->capture_con_substream = substream;
  722. runtime->hw = snd_ice1712_capture;
  723. runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC];
  724. if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000))
  725. runtime->hw.rate_min = 48000;
  726. return 0;
  727. }
  728. static int snd_ice1712_playback_close(struct snd_pcm_substream *substream)
  729. {
  730. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  731. ice->playback_con_substream = NULL;
  732. return 0;
  733. }
  734. static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream)
  735. {
  736. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  737. u32 tmp;
  738. spin_lock_irq(&ice->reg_lock);
  739. tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2));
  740. outw(tmp, ICEDS(ice, INTMASK));
  741. spin_unlock_irq(&ice->reg_lock);
  742. ice->playback_con_substream_ds[substream->number] = NULL;
  743. return 0;
  744. }
  745. static int snd_ice1712_capture_close(struct snd_pcm_substream *substream)
  746. {
  747. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  748. ice->capture_con_substream = NULL;
  749. return 0;
  750. }
  751. static struct snd_pcm_ops snd_ice1712_playback_ops = {
  752. .open = snd_ice1712_playback_open,
  753. .close = snd_ice1712_playback_close,
  754. .ioctl = snd_pcm_lib_ioctl,
  755. .hw_params = snd_ice1712_hw_params,
  756. .hw_free = snd_ice1712_hw_free,
  757. .prepare = snd_ice1712_playback_prepare,
  758. .trigger = snd_ice1712_playback_trigger,
  759. .pointer = snd_ice1712_playback_pointer,
  760. };
  761. static struct snd_pcm_ops snd_ice1712_playback_ds_ops = {
  762. .open = snd_ice1712_playback_ds_open,
  763. .close = snd_ice1712_playback_ds_close,
  764. .ioctl = snd_pcm_lib_ioctl,
  765. .hw_params = snd_ice1712_hw_params,
  766. .hw_free = snd_ice1712_hw_free,
  767. .prepare = snd_ice1712_playback_ds_prepare,
  768. .trigger = snd_ice1712_playback_ds_trigger,
  769. .pointer = snd_ice1712_playback_ds_pointer,
  770. };
  771. static struct snd_pcm_ops snd_ice1712_capture_ops = {
  772. .open = snd_ice1712_capture_open,
  773. .close = snd_ice1712_capture_close,
  774. .ioctl = snd_pcm_lib_ioctl,
  775. .hw_params = snd_ice1712_hw_params,
  776. .hw_free = snd_ice1712_hw_free,
  777. .prepare = snd_ice1712_capture_prepare,
  778. .trigger = snd_ice1712_capture_trigger,
  779. .pointer = snd_ice1712_capture_pointer,
  780. };
  781. static int __devinit snd_ice1712_pcm(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
  782. {
  783. struct snd_pcm *pcm;
  784. int err;
  785. if (rpcm)
  786. *rpcm = NULL;
  787. err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm);
  788. if (err < 0)
  789. return err;
  790. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops);
  791. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops);
  792. pcm->private_data = ice;
  793. pcm->info_flags = 0;
  794. strcpy(pcm->name, "ICE1712 consumer");
  795. ice->pcm = pcm;
  796. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  797. snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
  798. if (rpcm)
  799. *rpcm = pcm;
  800. printk(KERN_WARNING "Consumer PCM code does not work well at the moment --jk\n");
  801. return 0;
  802. }
  803. static int __devinit snd_ice1712_pcm_ds(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
  804. {
  805. struct snd_pcm *pcm;
  806. int err;
  807. if (rpcm)
  808. *rpcm = NULL;
  809. err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm);
  810. if (err < 0)
  811. return err;
  812. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops);
  813. pcm->private_data = ice;
  814. pcm->info_flags = 0;
  815. strcpy(pcm->name, "ICE1712 consumer (DS)");
  816. ice->pcm_ds = pcm;
  817. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  818. snd_dma_pci_data(ice->pci), 64*1024, 128*1024);
  819. if (rpcm)
  820. *rpcm = pcm;
  821. return 0;
  822. }
  823. /*
  824. * PCM code - professional part (multitrack)
  825. */
  826. static unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  827. 32000, 44100, 48000, 64000, 88200, 96000 };
  828. static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
  829. .count = ARRAY_SIZE(rates),
  830. .list = rates,
  831. .mask = 0,
  832. };
  833. static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream,
  834. int cmd)
  835. {
  836. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  837. switch (cmd) {
  838. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  839. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  840. {
  841. unsigned int what;
  842. unsigned int old;
  843. if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
  844. return -EINVAL;
  845. what = ICE1712_PLAYBACK_PAUSE;
  846. snd_pcm_trigger_done(substream, substream);
  847. spin_lock(&ice->reg_lock);
  848. old = inl(ICEMT(ice, PLAYBACK_CONTROL));
  849. if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
  850. old |= what;
  851. else
  852. old &= ~what;
  853. outl(old, ICEMT(ice, PLAYBACK_CONTROL));
  854. spin_unlock(&ice->reg_lock);
  855. break;
  856. }
  857. case SNDRV_PCM_TRIGGER_START:
  858. case SNDRV_PCM_TRIGGER_STOP:
  859. {
  860. unsigned int what = 0;
  861. unsigned int old;
  862. struct list_head *pos;
  863. struct snd_pcm_substream *s;
  864. snd_pcm_group_for_each(pos, substream) {
  865. s = snd_pcm_group_substream_entry(pos);
  866. if (s == ice->playback_pro_substream) {
  867. what |= ICE1712_PLAYBACK_START;
  868. snd_pcm_trigger_done(s, substream);
  869. } else if (s == ice->capture_pro_substream) {
  870. what |= ICE1712_CAPTURE_START_SHADOW;
  871. snd_pcm_trigger_done(s, substream);
  872. }
  873. }
  874. spin_lock(&ice->reg_lock);
  875. old = inl(ICEMT(ice, PLAYBACK_CONTROL));
  876. if (cmd == SNDRV_PCM_TRIGGER_START)
  877. old |= what;
  878. else
  879. old &= ~what;
  880. outl(old, ICEMT(ice, PLAYBACK_CONTROL));
  881. spin_unlock(&ice->reg_lock);
  882. break;
  883. }
  884. default:
  885. return -EINVAL;
  886. }
  887. return 0;
  888. }
  889. /*
  890. */
  891. static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force)
  892. {
  893. unsigned long flags;
  894. unsigned char val, old;
  895. unsigned int i;
  896. switch (rate) {
  897. case 8000: val = 6; break;
  898. case 9600: val = 3; break;
  899. case 11025: val = 10; break;
  900. case 12000: val = 2; break;
  901. case 16000: val = 5; break;
  902. case 22050: val = 9; break;
  903. case 24000: val = 1; break;
  904. case 32000: val = 4; break;
  905. case 44100: val = 8; break;
  906. case 48000: val = 0; break;
  907. case 64000: val = 15; break;
  908. case 88200: val = 11; break;
  909. case 96000: val = 7; break;
  910. default:
  911. snd_BUG();
  912. val = 0;
  913. rate = 48000;
  914. break;
  915. }
  916. spin_lock_irqsave(&ice->reg_lock, flags);
  917. if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW|
  918. ICE1712_PLAYBACK_PAUSE|
  919. ICE1712_PLAYBACK_START)) {
  920. __out:
  921. spin_unlock_irqrestore(&ice->reg_lock, flags);
  922. return;
  923. }
  924. if (!force && is_pro_rate_locked(ice))
  925. goto __out;
  926. old = inb(ICEMT(ice, RATE));
  927. if (!force && old == val)
  928. goto __out;
  929. outb(val, ICEMT(ice, RATE));
  930. spin_unlock_irqrestore(&ice->reg_lock, flags);
  931. if (ice->gpio.set_pro_rate)
  932. ice->gpio.set_pro_rate(ice, rate);
  933. for (i = 0; i < ice->akm_codecs; i++) {
  934. if (ice->akm[i].ops.set_rate_val)
  935. ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
  936. }
  937. if (ice->spdif.ops.setup_rate)
  938. ice->spdif.ops.setup_rate(ice, rate);
  939. }
  940. static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream)
  941. {
  942. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  943. ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream);
  944. spin_lock_irq(&ice->reg_lock);
  945. outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR));
  946. outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE));
  947. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT));
  948. spin_unlock_irq(&ice->reg_lock);
  949. return 0;
  950. }
  951. static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream,
  952. struct snd_pcm_hw_params *hw_params)
  953. {
  954. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  955. snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
  956. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  957. }
  958. static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream)
  959. {
  960. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  961. ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream);
  962. spin_lock_irq(&ice->reg_lock);
  963. outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR));
  964. outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE));
  965. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT));
  966. spin_unlock_irq(&ice->reg_lock);
  967. return 0;
  968. }
  969. static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream,
  970. struct snd_pcm_hw_params *hw_params)
  971. {
  972. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  973. snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
  974. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  975. }
  976. static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream)
  977. {
  978. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  979. size_t ptr;
  980. if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START))
  981. return 0;
  982. ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2);
  983. if (ptr == substream->runtime->buffer_size)
  984. ptr = 0;
  985. return bytes_to_frames(substream->runtime, ptr);
  986. }
  987. static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream)
  988. {
  989. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  990. size_t ptr;
  991. if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW))
  992. return 0;
  993. ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2);
  994. if (ptr == substream->runtime->buffer_size)
  995. ptr = 0;
  996. return bytes_to_frames(substream->runtime, ptr);
  997. }
  998. static struct snd_pcm_hardware snd_ice1712_playback_pro =
  999. {
  1000. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  1001. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  1002. SNDRV_PCM_INFO_MMAP_VALID |
  1003. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  1004. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  1005. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
  1006. .rate_min = 4000,
  1007. .rate_max = 96000,
  1008. .channels_min = 10,
  1009. .channels_max = 10,
  1010. .buffer_bytes_max = (256*1024),
  1011. .period_bytes_min = 10 * 4 * 2,
  1012. .period_bytes_max = 131040,
  1013. .periods_min = 1,
  1014. .periods_max = 1024,
  1015. .fifo_size = 0,
  1016. };
  1017. static struct snd_pcm_hardware snd_ice1712_capture_pro =
  1018. {
  1019. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  1020. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  1021. SNDRV_PCM_INFO_MMAP_VALID |
  1022. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  1023. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  1024. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
  1025. .rate_min = 4000,
  1026. .rate_max = 96000,
  1027. .channels_min = 12,
  1028. .channels_max = 12,
  1029. .buffer_bytes_max = (256*1024),
  1030. .period_bytes_min = 12 * 4 * 2,
  1031. .period_bytes_max = 131040,
  1032. .periods_min = 1,
  1033. .periods_max = 1024,
  1034. .fifo_size = 0,
  1035. };
  1036. static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream)
  1037. {
  1038. struct snd_pcm_runtime *runtime = substream->runtime;
  1039. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1040. ice->playback_pro_substream = substream;
  1041. runtime->hw = snd_ice1712_playback_pro;
  1042. snd_pcm_set_sync(substream);
  1043. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1044. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
  1045. if (ice->spdif.ops.open)
  1046. ice->spdif.ops.open(ice, substream);
  1047. return 0;
  1048. }
  1049. static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream)
  1050. {
  1051. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1052. struct snd_pcm_runtime *runtime = substream->runtime;
  1053. ice->capture_pro_substream = substream;
  1054. runtime->hw = snd_ice1712_capture_pro;
  1055. snd_pcm_set_sync(substream);
  1056. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1057. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
  1058. return 0;
  1059. }
  1060. static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream)
  1061. {
  1062. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1063. if (PRO_RATE_RESET)
  1064. snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  1065. ice->playback_pro_substream = NULL;
  1066. if (ice->spdif.ops.close)
  1067. ice->spdif.ops.close(ice, substream);
  1068. return 0;
  1069. }
  1070. static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream)
  1071. {
  1072. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1073. if (PRO_RATE_RESET)
  1074. snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  1075. ice->capture_pro_substream = NULL;
  1076. return 0;
  1077. }
  1078. static struct snd_pcm_ops snd_ice1712_playback_pro_ops = {
  1079. .open = snd_ice1712_playback_pro_open,
  1080. .close = snd_ice1712_playback_pro_close,
  1081. .ioctl = snd_pcm_lib_ioctl,
  1082. .hw_params = snd_ice1712_playback_pro_hw_params,
  1083. .hw_free = snd_ice1712_hw_free,
  1084. .prepare = snd_ice1712_playback_pro_prepare,
  1085. .trigger = snd_ice1712_pro_trigger,
  1086. .pointer = snd_ice1712_playback_pro_pointer,
  1087. };
  1088. static struct snd_pcm_ops snd_ice1712_capture_pro_ops = {
  1089. .open = snd_ice1712_capture_pro_open,
  1090. .close = snd_ice1712_capture_pro_close,
  1091. .ioctl = snd_pcm_lib_ioctl,
  1092. .hw_params = snd_ice1712_capture_pro_hw_params,
  1093. .hw_free = snd_ice1712_hw_free,
  1094. .prepare = snd_ice1712_capture_pro_prepare,
  1095. .trigger = snd_ice1712_pro_trigger,
  1096. .pointer = snd_ice1712_capture_pro_pointer,
  1097. };
  1098. static int __devinit snd_ice1712_pcm_profi(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
  1099. {
  1100. struct snd_pcm *pcm;
  1101. int err;
  1102. if (rpcm)
  1103. *rpcm = NULL;
  1104. err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm);
  1105. if (err < 0)
  1106. return err;
  1107. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops);
  1108. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops);
  1109. pcm->private_data = ice;
  1110. pcm->info_flags = 0;
  1111. strcpy(pcm->name, "ICE1712 multi");
  1112. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1113. snd_dma_pci_data(ice->pci), 256*1024, 256*1024);
  1114. ice->pcm_pro = pcm;
  1115. if (rpcm)
  1116. *rpcm = pcm;
  1117. if (ice->cs8427) {
  1118. /* assign channels to iec958 */
  1119. err = snd_cs8427_iec958_build(ice->cs8427,
  1120. pcm->streams[0].substream,
  1121. pcm->streams[1].substream);
  1122. if (err < 0)
  1123. return err;
  1124. }
  1125. if ((err = snd_ice1712_build_pro_mixer(ice)) < 0)
  1126. return err;
  1127. return 0;
  1128. }
  1129. /*
  1130. * Mixer section
  1131. */
  1132. static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index)
  1133. {
  1134. unsigned int vol = ice->pro_volumes[index];
  1135. unsigned short val = 0;
  1136. val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f;
  1137. val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8;
  1138. outb(index, ICEMT(ice, MONITOR_INDEX));
  1139. outw(val, ICEMT(ice, MONITOR_VOLUME));
  1140. }
  1141. static int snd_ice1712_pro_mixer_switch_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1142. {
  1143. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1144. uinfo->count = 2;
  1145. uinfo->value.integer.min = 0;
  1146. uinfo->value.integer.max = 1;
  1147. return 0;
  1148. }
  1149. static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1150. {
  1151. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1152. int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
  1153. spin_lock_irq(&ice->reg_lock);
  1154. ucontrol->value.integer.value[0] = !((ice->pro_volumes[index] >> 15) & 1);
  1155. ucontrol->value.integer.value[1] = !((ice->pro_volumes[index] >> 31) & 1);
  1156. spin_unlock_irq(&ice->reg_lock);
  1157. return 0;
  1158. }
  1159. static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1160. {
  1161. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1162. int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
  1163. unsigned int nval, change;
  1164. nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) |
  1165. (ucontrol->value.integer.value[1] ? 0 : 0x80000000);
  1166. spin_lock_irq(&ice->reg_lock);
  1167. nval |= ice->pro_volumes[index] & ~0x80008000;
  1168. change = nval != ice->pro_volumes[index];
  1169. ice->pro_volumes[index] = nval;
  1170. snd_ice1712_update_volume(ice, index);
  1171. spin_unlock_irq(&ice->reg_lock);
  1172. return change;
  1173. }
  1174. static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1175. {
  1176. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1177. uinfo->count = 2;
  1178. uinfo->value.integer.min = 0;
  1179. uinfo->value.integer.max = 96;
  1180. return 0;
  1181. }
  1182. static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1183. {
  1184. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1185. int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
  1186. spin_lock_irq(&ice->reg_lock);
  1187. ucontrol->value.integer.value[0] = (ice->pro_volumes[index] >> 0) & 127;
  1188. ucontrol->value.integer.value[1] = (ice->pro_volumes[index] >> 16) & 127;
  1189. spin_unlock_irq(&ice->reg_lock);
  1190. return 0;
  1191. }
  1192. static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1193. {
  1194. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1195. int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
  1196. unsigned int nval, change;
  1197. nval = (ucontrol->value.integer.value[0] & 127) |
  1198. ((ucontrol->value.integer.value[1] & 127) << 16);
  1199. spin_lock_irq(&ice->reg_lock);
  1200. nval |= ice->pro_volumes[index] & ~0x007f007f;
  1201. change = nval != ice->pro_volumes[index];
  1202. ice->pro_volumes[index] = nval;
  1203. snd_ice1712_update_volume(ice, index);
  1204. spin_unlock_irq(&ice->reg_lock);
  1205. return change;
  1206. }
  1207. static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] __devinitdata = {
  1208. {
  1209. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1210. .name = "Multi Playback Switch",
  1211. .info = snd_ice1712_pro_mixer_switch_info,
  1212. .get = snd_ice1712_pro_mixer_switch_get,
  1213. .put = snd_ice1712_pro_mixer_switch_put,
  1214. .private_value = 0,
  1215. .count = 10,
  1216. },
  1217. {
  1218. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1219. .name = "Multi Playback Volume",
  1220. .info = snd_ice1712_pro_mixer_volume_info,
  1221. .get = snd_ice1712_pro_mixer_volume_get,
  1222. .put = snd_ice1712_pro_mixer_volume_put,
  1223. .private_value = 0,
  1224. .count = 10,
  1225. },
  1226. };
  1227. static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch __devinitdata = {
  1228. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1229. .name = "H/W Multi Capture Switch",
  1230. .info = snd_ice1712_pro_mixer_switch_info,
  1231. .get = snd_ice1712_pro_mixer_switch_get,
  1232. .put = snd_ice1712_pro_mixer_switch_put,
  1233. .private_value = 10,
  1234. };
  1235. static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch __devinitdata = {
  1236. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1237. .name = SNDRV_CTL_NAME_IEC958("Multi ",CAPTURE,SWITCH),
  1238. .info = snd_ice1712_pro_mixer_switch_info,
  1239. .get = snd_ice1712_pro_mixer_switch_get,
  1240. .put = snd_ice1712_pro_mixer_switch_put,
  1241. .private_value = 18,
  1242. .count = 2,
  1243. };
  1244. static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume __devinitdata = {
  1245. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1246. .name = "H/W Multi Capture Volume",
  1247. .info = snd_ice1712_pro_mixer_volume_info,
  1248. .get = snd_ice1712_pro_mixer_volume_get,
  1249. .put = snd_ice1712_pro_mixer_volume_put,
  1250. .private_value = 10,
  1251. };
  1252. static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume __devinitdata = {
  1253. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1254. .name = SNDRV_CTL_NAME_IEC958("Multi ",CAPTURE,VOLUME),
  1255. .info = snd_ice1712_pro_mixer_volume_info,
  1256. .get = snd_ice1712_pro_mixer_volume_get,
  1257. .put = snd_ice1712_pro_mixer_volume_put,
  1258. .private_value = 18,
  1259. .count = 2,
  1260. };
  1261. static int __devinit snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice)
  1262. {
  1263. struct snd_card *card = ice->card;
  1264. unsigned int idx;
  1265. int err;
  1266. /* multi-channel mixer */
  1267. for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) {
  1268. err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice));
  1269. if (err < 0)
  1270. return err;
  1271. }
  1272. if (ice->num_total_adcs > 0) {
  1273. struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch;
  1274. tmp.count = ice->num_total_adcs;
  1275. err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
  1276. if (err < 0)
  1277. return err;
  1278. }
  1279. err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice));
  1280. if (err < 0)
  1281. return err;
  1282. if (ice->num_total_adcs > 0) {
  1283. struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume;
  1284. tmp.count = ice->num_total_adcs;
  1285. err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
  1286. if (err < 0)
  1287. return err;
  1288. }
  1289. err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice));
  1290. if (err < 0)
  1291. return err;
  1292. /* initialize volumes */
  1293. for (idx = 0; idx < 10; idx++) {
  1294. ice->pro_volumes[idx] = 0x80008000; /* mute */
  1295. snd_ice1712_update_volume(ice, idx);
  1296. }
  1297. for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) {
  1298. ice->pro_volumes[idx] = 0x80008000; /* mute */
  1299. snd_ice1712_update_volume(ice, idx);
  1300. }
  1301. for (idx = 18; idx < 20; idx++) {
  1302. ice->pro_volumes[idx] = 0x80008000; /* mute */
  1303. snd_ice1712_update_volume(ice, idx);
  1304. }
  1305. return 0;
  1306. }
  1307. static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97)
  1308. {
  1309. struct snd_ice1712 *ice = ac97->private_data;
  1310. ice->ac97 = NULL;
  1311. }
  1312. static int __devinit snd_ice1712_ac97_mixer(struct snd_ice1712 * ice)
  1313. {
  1314. int err, bus_num = 0;
  1315. struct snd_ac97_template ac97;
  1316. struct snd_ac97_bus *pbus;
  1317. static struct snd_ac97_bus_ops con_ops = {
  1318. .write = snd_ice1712_ac97_write,
  1319. .read = snd_ice1712_ac97_read,
  1320. };
  1321. static struct snd_ac97_bus_ops pro_ops = {
  1322. .write = snd_ice1712_pro_ac97_write,
  1323. .read = snd_ice1712_pro_ac97_read,
  1324. };
  1325. if (ice_has_con_ac97(ice)) {
  1326. if ((err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus)) < 0)
  1327. return err;
  1328. memset(&ac97, 0, sizeof(ac97));
  1329. ac97.private_data = ice;
  1330. ac97.private_free = snd_ice1712_mixer_free_ac97;
  1331. if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
  1332. printk(KERN_WARNING "ice1712: cannot initialize ac97 for consumer, skipped\n");
  1333. else {
  1334. if ((err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, ice))) < 0)
  1335. return err;
  1336. return 0;
  1337. }
  1338. }
  1339. if (! (ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) {
  1340. if ((err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus)) < 0)
  1341. return err;
  1342. memset(&ac97, 0, sizeof(ac97));
  1343. ac97.private_data = ice;
  1344. ac97.private_free = snd_ice1712_mixer_free_ac97;
  1345. if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
  1346. printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
  1347. else
  1348. return 0;
  1349. }
  1350. /* I2S mixer only */
  1351. strcat(ice->card->mixername, "ICE1712 - multitrack");
  1352. return 0;
  1353. }
  1354. /*
  1355. *
  1356. */
  1357. static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx)
  1358. {
  1359. return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8);
  1360. }
  1361. static void snd_ice1712_proc_read(struct snd_info_entry *entry,
  1362. struct snd_info_buffer *buffer)
  1363. {
  1364. struct snd_ice1712 *ice = entry->private_data;
  1365. unsigned int idx;
  1366. snd_iprintf(buffer, "%s\n\n", ice->card->longname);
  1367. snd_iprintf(buffer, "EEPROM:\n");
  1368. snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
  1369. snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
  1370. snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
  1371. snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]);
  1372. snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]);
  1373. snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]);
  1374. snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]);
  1375. snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
  1376. snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
  1377. snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
  1378. snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO));
  1379. snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO));
  1380. snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO));
  1381. snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]);
  1382. for (idx = 0; idx < 4; idx++)
  1383. snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]);
  1384. for (idx = 0; idx < 4; idx++)
  1385. snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]);
  1386. for (idx = 0x1c; idx < ice->eeprom.size; idx++)
  1387. snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
  1388. snd_iprintf(buffer, "\nRegisters:\n");
  1389. snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03)));
  1390. snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE)));
  1391. snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT)));
  1392. snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE)));
  1393. }
  1394. static void __devinit snd_ice1712_proc_init(struct snd_ice1712 * ice)
  1395. {
  1396. struct snd_info_entry *entry;
  1397. if (! snd_card_proc_new(ice->card, "ice1712", &entry))
  1398. snd_info_set_text_ops(entry, ice, 1024, snd_ice1712_proc_read);
  1399. }
  1400. /*
  1401. *
  1402. */
  1403. static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol,
  1404. struct snd_ctl_elem_info *uinfo)
  1405. {
  1406. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1407. uinfo->count = sizeof(struct snd_ice1712_eeprom);
  1408. return 0;
  1409. }
  1410. static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol,
  1411. struct snd_ctl_elem_value *ucontrol)
  1412. {
  1413. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1414. memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
  1415. return 0;
  1416. }
  1417. static struct snd_kcontrol_new snd_ice1712_eeprom __devinitdata = {
  1418. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  1419. .name = "ICE1712 EEPROM",
  1420. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1421. .info = snd_ice1712_eeprom_info,
  1422. .get = snd_ice1712_eeprom_get
  1423. };
  1424. /*
  1425. */
  1426. static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol,
  1427. struct snd_ctl_elem_info *uinfo)
  1428. {
  1429. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1430. uinfo->count = 1;
  1431. return 0;
  1432. }
  1433. static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol,
  1434. struct snd_ctl_elem_value *ucontrol)
  1435. {
  1436. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1437. if (ice->spdif.ops.default_get)
  1438. ice->spdif.ops.default_get(ice, ucontrol);
  1439. return 0;
  1440. }
  1441. static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol,
  1442. struct snd_ctl_elem_value *ucontrol)
  1443. {
  1444. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1445. if (ice->spdif.ops.default_put)
  1446. return ice->spdif.ops.default_put(ice, ucontrol);
  1447. return 0;
  1448. }
  1449. static struct snd_kcontrol_new snd_ice1712_spdif_default __devinitdata =
  1450. {
  1451. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1452. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  1453. .info = snd_ice1712_spdif_info,
  1454. .get = snd_ice1712_spdif_default_get,
  1455. .put = snd_ice1712_spdif_default_put
  1456. };
  1457. static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol,
  1458. struct snd_ctl_elem_value *ucontrol)
  1459. {
  1460. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1461. if (ice->spdif.ops.default_get) {
  1462. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1463. IEC958_AES0_PROFESSIONAL |
  1464. IEC958_AES0_CON_NOT_COPYRIGHT |
  1465. IEC958_AES0_CON_EMPHASIS;
  1466. ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
  1467. IEC958_AES1_CON_CATEGORY;
  1468. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
  1469. } else {
  1470. ucontrol->value.iec958.status[0] = 0xff;
  1471. ucontrol->value.iec958.status[1] = 0xff;
  1472. ucontrol->value.iec958.status[2] = 0xff;
  1473. ucontrol->value.iec958.status[3] = 0xff;
  1474. ucontrol->value.iec958.status[4] = 0xff;
  1475. }
  1476. return 0;
  1477. }
  1478. static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol,
  1479. struct snd_ctl_elem_value *ucontrol)
  1480. {
  1481. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1482. if (ice->spdif.ops.default_get) {
  1483. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1484. IEC958_AES0_PROFESSIONAL |
  1485. IEC958_AES0_PRO_FS |
  1486. IEC958_AES0_PRO_EMPHASIS;
  1487. ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE;
  1488. } else {
  1489. ucontrol->value.iec958.status[0] = 0xff;
  1490. ucontrol->value.iec958.status[1] = 0xff;
  1491. ucontrol->value.iec958.status[2] = 0xff;
  1492. ucontrol->value.iec958.status[3] = 0xff;
  1493. ucontrol->value.iec958.status[4] = 0xff;
  1494. }
  1495. return 0;
  1496. }
  1497. static struct snd_kcontrol_new snd_ice1712_spdif_maskc __devinitdata =
  1498. {
  1499. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1500. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1501. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
  1502. .info = snd_ice1712_spdif_info,
  1503. .get = snd_ice1712_spdif_maskc_get,
  1504. };
  1505. static struct snd_kcontrol_new snd_ice1712_spdif_maskp __devinitdata =
  1506. {
  1507. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1508. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1509. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
  1510. .info = snd_ice1712_spdif_info,
  1511. .get = snd_ice1712_spdif_maskp_get,
  1512. };
  1513. static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol,
  1514. struct snd_ctl_elem_value *ucontrol)
  1515. {
  1516. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1517. if (ice->spdif.ops.stream_get)
  1518. ice->spdif.ops.stream_get(ice, ucontrol);
  1519. return 0;
  1520. }
  1521. static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol,
  1522. struct snd_ctl_elem_value *ucontrol)
  1523. {
  1524. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1525. if (ice->spdif.ops.stream_put)
  1526. return ice->spdif.ops.stream_put(ice, ucontrol);
  1527. return 0;
  1528. }
  1529. static struct snd_kcontrol_new snd_ice1712_spdif_stream __devinitdata =
  1530. {
  1531. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1532. SNDRV_CTL_ELEM_ACCESS_INACTIVE),
  1533. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1534. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
  1535. .info = snd_ice1712_spdif_info,
  1536. .get = snd_ice1712_spdif_stream_get,
  1537. .put = snd_ice1712_spdif_stream_put
  1538. };
  1539. int snd_ice1712_gpio_info(struct snd_kcontrol *kcontrol,
  1540. struct snd_ctl_elem_info *uinfo)
  1541. {
  1542. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1543. uinfo->count = 1;
  1544. uinfo->value.integer.min = 0;
  1545. uinfo->value.integer.max = 1;
  1546. return 0;
  1547. }
  1548. int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol,
  1549. struct snd_ctl_elem_value *ucontrol)
  1550. {
  1551. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1552. unsigned char mask = kcontrol->private_value & 0xff;
  1553. int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
  1554. snd_ice1712_save_gpio_status(ice);
  1555. ucontrol->value.integer.value[0] =
  1556. (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert;
  1557. snd_ice1712_restore_gpio_status(ice);
  1558. return 0;
  1559. }
  1560. int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
  1561. struct snd_ctl_elem_value *ucontrol)
  1562. {
  1563. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1564. unsigned char mask = kcontrol->private_value & 0xff;
  1565. int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
  1566. unsigned int val, nval;
  1567. if (kcontrol->private_value & (1 << 31))
  1568. return -EPERM;
  1569. nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert;
  1570. snd_ice1712_save_gpio_status(ice);
  1571. val = snd_ice1712_gpio_read(ice);
  1572. nval |= val & ~mask;
  1573. if (val != nval)
  1574. snd_ice1712_gpio_write(ice, nval);
  1575. snd_ice1712_restore_gpio_status(ice);
  1576. return val != nval;
  1577. }
  1578. /*
  1579. * rate
  1580. */
  1581. static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
  1582. struct snd_ctl_elem_info *uinfo)
  1583. {
  1584. static char *texts[] = {
  1585. "8000", /* 0: 6 */
  1586. "9600", /* 1: 3 */
  1587. "11025", /* 2: 10 */
  1588. "12000", /* 3: 2 */
  1589. "16000", /* 4: 5 */
  1590. "22050", /* 5: 9 */
  1591. "24000", /* 6: 1 */
  1592. "32000", /* 7: 4 */
  1593. "44100", /* 8: 8 */
  1594. "48000", /* 9: 0 */
  1595. "64000", /* 10: 15 */
  1596. "88200", /* 11: 11 */
  1597. "96000", /* 12: 7 */
  1598. "IEC958 Input", /* 13: -- */
  1599. };
  1600. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1601. uinfo->count = 1;
  1602. uinfo->value.enumerated.items = 14;
  1603. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1604. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1605. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1606. return 0;
  1607. }
  1608. static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
  1609. struct snd_ctl_elem_value *ucontrol)
  1610. {
  1611. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1612. static unsigned char xlate[16] = {
  1613. 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10
  1614. };
  1615. unsigned char val;
  1616. spin_lock_irq(&ice->reg_lock);
  1617. if (is_spdif_master(ice)) {
  1618. ucontrol->value.enumerated.item[0] = 13;
  1619. } else {
  1620. val = xlate[inb(ICEMT(ice, RATE)) & 15];
  1621. if (val == 255) {
  1622. snd_BUG();
  1623. val = 0;
  1624. }
  1625. ucontrol->value.enumerated.item[0] = val;
  1626. }
  1627. spin_unlock_irq(&ice->reg_lock);
  1628. return 0;
  1629. }
  1630. static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
  1631. struct snd_ctl_elem_value *ucontrol)
  1632. {
  1633. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1634. static unsigned int xrate[13] = {
  1635. 8000, 9600, 11025, 12000, 1600, 22050, 24000,
  1636. 32000, 44100, 48000, 64000, 88200, 96000
  1637. };
  1638. unsigned char oval;
  1639. int change = 0;
  1640. spin_lock_irq(&ice->reg_lock);
  1641. oval = inb(ICEMT(ice, RATE));
  1642. if (ucontrol->value.enumerated.item[0] == 13) {
  1643. outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE));
  1644. } else {
  1645. PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
  1646. spin_unlock_irq(&ice->reg_lock);
  1647. snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
  1648. spin_lock_irq(&ice->reg_lock);
  1649. }
  1650. change = inb(ICEMT(ice, RATE)) != oval;
  1651. spin_unlock_irq(&ice->reg_lock);
  1652. if ((oval & ICE1712_SPDIF_MASTER) !=
  1653. (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER))
  1654. snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice));
  1655. return change;
  1656. }
  1657. static struct snd_kcontrol_new snd_ice1712_pro_internal_clock __devinitdata = {
  1658. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1659. .name = "Multi Track Internal Clock",
  1660. .info = snd_ice1712_pro_internal_clock_info,
  1661. .get = snd_ice1712_pro_internal_clock_get,
  1662. .put = snd_ice1712_pro_internal_clock_put
  1663. };
  1664. static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol,
  1665. struct snd_ctl_elem_info *uinfo)
  1666. {
  1667. static char *texts[] = {
  1668. "8000", /* 0: 6 */
  1669. "9600", /* 1: 3 */
  1670. "11025", /* 2: 10 */
  1671. "12000", /* 3: 2 */
  1672. "16000", /* 4: 5 */
  1673. "22050", /* 5: 9 */
  1674. "24000", /* 6: 1 */
  1675. "32000", /* 7: 4 */
  1676. "44100", /* 8: 8 */
  1677. "48000", /* 9: 0 */
  1678. "64000", /* 10: 15 */
  1679. "88200", /* 11: 11 */
  1680. "96000", /* 12: 7 */
  1681. // "IEC958 Input", /* 13: -- */
  1682. };
  1683. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1684. uinfo->count = 1;
  1685. uinfo->value.enumerated.items = 13;
  1686. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1687. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1688. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1689. return 0;
  1690. }
  1691. static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol,
  1692. struct snd_ctl_elem_value *ucontrol)
  1693. {
  1694. int val;
  1695. static unsigned int xrate[13] = {
  1696. 8000, 9600, 11025, 12000, 1600, 22050, 24000,
  1697. 32000, 44100, 48000, 64000, 88200, 96000
  1698. };
  1699. for (val = 0; val < 13; val++) {
  1700. if (xrate[val] == PRO_RATE_DEFAULT)
  1701. break;
  1702. }
  1703. ucontrol->value.enumerated.item[0] = val;
  1704. return 0;
  1705. }
  1706. static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol,
  1707. struct snd_ctl_elem_value *ucontrol)
  1708. {
  1709. static unsigned int xrate[13] = {
  1710. 8000, 9600, 11025, 12000, 1600, 22050, 24000,
  1711. 32000, 44100, 48000, 64000, 88200, 96000
  1712. };
  1713. unsigned char oval;
  1714. int change = 0;
  1715. oval = PRO_RATE_DEFAULT;
  1716. PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
  1717. change = PRO_RATE_DEFAULT != oval;
  1718. return change;
  1719. }
  1720. static struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default __devinitdata = {
  1721. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1722. .name = "Multi Track Internal Clock Default",
  1723. .info = snd_ice1712_pro_internal_clock_default_info,
  1724. .get = snd_ice1712_pro_internal_clock_default_get,
  1725. .put = snd_ice1712_pro_internal_clock_default_put
  1726. };
  1727. static int snd_ice1712_pro_rate_locking_info(struct snd_kcontrol *kcontrol,
  1728. struct snd_ctl_elem_info *uinfo)
  1729. {
  1730. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1731. uinfo->count = 1;
  1732. uinfo->value.integer.min = 0;
  1733. uinfo->value.integer.max = 1;
  1734. return 0;
  1735. }
  1736. static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
  1737. struct snd_ctl_elem_value *ucontrol)
  1738. {
  1739. ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
  1740. return 0;
  1741. }
  1742. static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
  1743. struct snd_ctl_elem_value *ucontrol)
  1744. {
  1745. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1746. int change = 0, nval;
  1747. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1748. spin_lock_irq(&ice->reg_lock);
  1749. change = PRO_RATE_LOCKED != nval;
  1750. PRO_RATE_LOCKED = nval;
  1751. spin_unlock_irq(&ice->reg_lock);
  1752. return change;
  1753. }
  1754. static struct snd_kcontrol_new snd_ice1712_pro_rate_locking __devinitdata = {
  1755. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1756. .name = "Multi Track Rate Locking",
  1757. .info = snd_ice1712_pro_rate_locking_info,
  1758. .get = snd_ice1712_pro_rate_locking_get,
  1759. .put = snd_ice1712_pro_rate_locking_put
  1760. };
  1761. static int snd_ice1712_pro_rate_reset_info(struct snd_kcontrol *kcontrol,
  1762. struct snd_ctl_elem_info *uinfo)
  1763. {
  1764. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1765. uinfo->count = 1;
  1766. uinfo->value.integer.min = 0;
  1767. uinfo->value.integer.max = 1;
  1768. return 0;
  1769. }
  1770. static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
  1771. struct snd_ctl_elem_value *ucontrol)
  1772. {
  1773. ucontrol->value.integer.value[0] = PRO_RATE_RESET;
  1774. return 0;
  1775. }
  1776. static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
  1777. struct snd_ctl_elem_value *ucontrol)
  1778. {
  1779. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1780. int change = 0, nval;
  1781. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1782. spin_lock_irq(&ice->reg_lock);
  1783. change = PRO_RATE_RESET != nval;
  1784. PRO_RATE_RESET = nval;
  1785. spin_unlock_irq(&ice->reg_lock);
  1786. return change;
  1787. }
  1788. static struct snd_kcontrol_new snd_ice1712_pro_rate_reset __devinitdata = {
  1789. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1790. .name = "Multi Track Rate Reset",
  1791. .info = snd_ice1712_pro_rate_reset_info,
  1792. .get = snd_ice1712_pro_rate_reset_get,
  1793. .put = snd_ice1712_pro_rate_reset_put
  1794. };
  1795. /*
  1796. * routing
  1797. */
  1798. static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol,
  1799. struct snd_ctl_elem_info *uinfo)
  1800. {
  1801. static char *texts[] = {
  1802. "PCM Out", /* 0 */
  1803. "H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */
  1804. "H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */
  1805. "IEC958 In L", "IEC958 In R", /* 9-10 */
  1806. "Digital Mixer", /* 11 - optional */
  1807. };
  1808. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1809. uinfo->count = 1;
  1810. uinfo->value.enumerated.items =
  1811. snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11;
  1812. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1813. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1814. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1815. return 0;
  1816. }
  1817. static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol,
  1818. struct snd_ctl_elem_value *ucontrol)
  1819. {
  1820. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1821. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1822. unsigned int val, cval;
  1823. spin_lock_irq(&ice->reg_lock);
  1824. val = inw(ICEMT(ice, ROUTE_PSDOUT03));
  1825. cval = inl(ICEMT(ice, ROUTE_CAPTURE));
  1826. spin_unlock_irq(&ice->reg_lock);
  1827. val >>= ((idx % 2) * 8) + ((idx / 2) * 2);
  1828. val &= 3;
  1829. cval >>= ((idx / 2) * 8) + ((idx % 2) * 4);
  1830. if (val == 1 && idx < 2)
  1831. ucontrol->value.enumerated.item[0] = 11;
  1832. else if (val == 2)
  1833. ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
  1834. else if (val == 3)
  1835. ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
  1836. else
  1837. ucontrol->value.enumerated.item[0] = 0;
  1838. return 0;
  1839. }
  1840. static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol,
  1841. struct snd_ctl_elem_value *ucontrol)
  1842. {
  1843. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1844. int change, shift;
  1845. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1846. unsigned int val, old_val, nval;
  1847. /* update PSDOUT */
  1848. if (ucontrol->value.enumerated.item[0] >= 11)
  1849. nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */
  1850. else if (ucontrol->value.enumerated.item[0] >= 9)
  1851. nval = 3; /* spdif in */
  1852. else if (ucontrol->value.enumerated.item[0] >= 1)
  1853. nval = 2; /* analog in */
  1854. else
  1855. nval = 0; /* pcm */
  1856. shift = ((idx % 2) * 8) + ((idx / 2) * 2);
  1857. spin_lock_irq(&ice->reg_lock);
  1858. val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03));
  1859. val &= ~(0x03 << shift);
  1860. val |= nval << shift;
  1861. change = val != old_val;
  1862. if (change)
  1863. outw(val, ICEMT(ice, ROUTE_PSDOUT03));
  1864. spin_unlock_irq(&ice->reg_lock);
  1865. if (nval < 2) /* dig mixer of pcm */
  1866. return change;
  1867. /* update CAPTURE */
  1868. spin_lock_irq(&ice->reg_lock);
  1869. val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE));
  1870. shift = ((idx / 2) * 8) + ((idx % 2) * 4);
  1871. if (nval == 2) { /* analog in */
  1872. nval = ucontrol->value.enumerated.item[0] - 1;
  1873. val &= ~(0x07 << shift);
  1874. val |= nval << shift;
  1875. } else { /* spdif in */
  1876. nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
  1877. val &= ~(0x08 << shift);
  1878. val |= nval << shift;
  1879. }
  1880. if (val != old_val) {
  1881. change = 1;
  1882. outl(val, ICEMT(ice, ROUTE_CAPTURE));
  1883. }
  1884. spin_unlock_irq(&ice->reg_lock);
  1885. return change;
  1886. }
  1887. static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
  1888. struct snd_ctl_elem_value *ucontrol)
  1889. {
  1890. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1891. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1892. unsigned int val, cval;
  1893. val = inw(ICEMT(ice, ROUTE_SPDOUT));
  1894. cval = (val >> (idx * 4 + 8)) & 0x0f;
  1895. val = (val >> (idx * 2)) & 0x03;
  1896. if (val == 1)
  1897. ucontrol->value.enumerated.item[0] = 11;
  1898. else if (val == 2)
  1899. ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
  1900. else if (val == 3)
  1901. ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
  1902. else
  1903. ucontrol->value.enumerated.item[0] = 0;
  1904. return 0;
  1905. }
  1906. static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
  1907. struct snd_ctl_elem_value *ucontrol)
  1908. {
  1909. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1910. int change, shift;
  1911. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1912. unsigned int val, old_val, nval;
  1913. /* update SPDOUT */
  1914. spin_lock_irq(&ice->reg_lock);
  1915. val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT));
  1916. if (ucontrol->value.enumerated.item[0] >= 11)
  1917. nval = 1;
  1918. else if (ucontrol->value.enumerated.item[0] >= 9)
  1919. nval = 3;
  1920. else if (ucontrol->value.enumerated.item[0] >= 1)
  1921. nval = 2;
  1922. else
  1923. nval = 0;
  1924. shift = idx * 2;
  1925. val &= ~(0x03 << shift);
  1926. val |= nval << shift;
  1927. shift = idx * 4 + 8;
  1928. if (nval == 2) {
  1929. nval = ucontrol->value.enumerated.item[0] - 1;
  1930. val &= ~(0x07 << shift);
  1931. val |= nval << shift;
  1932. } else if (nval == 3) {
  1933. nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
  1934. val &= ~(0x08 << shift);
  1935. val |= nval << shift;
  1936. }
  1937. change = val != old_val;
  1938. if (change)
  1939. outw(val, ICEMT(ice, ROUTE_SPDOUT));
  1940. spin_unlock_irq(&ice->reg_lock);
  1941. return change;
  1942. }
  1943. static struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route __devinitdata = {
  1944. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1945. .name = "H/W Playback Route",
  1946. .info = snd_ice1712_pro_route_info,
  1947. .get = snd_ice1712_pro_route_analog_get,
  1948. .put = snd_ice1712_pro_route_analog_put,
  1949. };
  1950. static struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route __devinitdata = {
  1951. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1952. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route",
  1953. .info = snd_ice1712_pro_route_info,
  1954. .get = snd_ice1712_pro_route_spdif_get,
  1955. .put = snd_ice1712_pro_route_spdif_put,
  1956. .count = 2,
  1957. };
  1958. static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol,
  1959. struct snd_ctl_elem_info *uinfo)
  1960. {
  1961. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1962. uinfo->count = 1;
  1963. uinfo->value.integer.min = 0;
  1964. uinfo->value.integer.max = 255;
  1965. return 0;
  1966. }
  1967. static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol,
  1968. struct snd_ctl_elem_value *ucontrol)
  1969. {
  1970. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1971. ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE));
  1972. return 0;
  1973. }
  1974. static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol,
  1975. struct snd_ctl_elem_value *ucontrol)
  1976. {
  1977. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1978. int change;
  1979. spin_lock_irq(&ice->reg_lock);
  1980. change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0];
  1981. outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE));
  1982. spin_unlock_irq(&ice->reg_lock);
  1983. return change;
  1984. }
  1985. static struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate __devinitdata = {
  1986. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1987. .name = "Multi Track Volume Rate",
  1988. .info = snd_ice1712_pro_volume_rate_info,
  1989. .get = snd_ice1712_pro_volume_rate_get,
  1990. .put = snd_ice1712_pro_volume_rate_put
  1991. };
  1992. static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol,
  1993. struct snd_ctl_elem_info *uinfo)
  1994. {
  1995. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1996. uinfo->count = 22;
  1997. uinfo->value.integer.min = 0;
  1998. uinfo->value.integer.max = 255;
  1999. return 0;
  2000. }
  2001. static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol,
  2002. struct snd_ctl_elem_value *ucontrol)
  2003. {
  2004. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  2005. int idx;
  2006. spin_lock_irq(&ice->reg_lock);
  2007. for (idx = 0; idx < 22; idx++) {
  2008. outb(idx, ICEMT(ice, MONITOR_PEAKINDEX));
  2009. ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA));
  2010. }
  2011. spin_unlock_irq(&ice->reg_lock);
  2012. return 0;
  2013. }
  2014. static struct snd_kcontrol_new snd_ice1712_mixer_pro_peak __devinitdata = {
  2015. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  2016. .name = "Multi Track Peak",
  2017. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  2018. .info = snd_ice1712_pro_peak_info,
  2019. .get = snd_ice1712_pro_peak_get
  2020. };
  2021. /*
  2022. *
  2023. */
  2024. /*
  2025. * list of available boards
  2026. */
  2027. static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
  2028. snd_ice1712_hoontech_cards,
  2029. snd_ice1712_delta_cards,
  2030. snd_ice1712_ews_cards,
  2031. NULL,
  2032. };
  2033. static unsigned char __devinit snd_ice1712_read_i2c(struct snd_ice1712 *ice,
  2034. unsigned char dev,
  2035. unsigned char addr)
  2036. {
  2037. long t = 0x10000;
  2038. outb(addr, ICEREG(ice, I2C_BYTE_ADDR));
  2039. outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR));
  2040. while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ;
  2041. return inb(ICEREG(ice, I2C_DATA));
  2042. }
  2043. static int __devinit snd_ice1712_read_eeprom(struct snd_ice1712 *ice,
  2044. const char *modelname)
  2045. {
  2046. int dev = 0xa0; /* EEPROM device address */
  2047. unsigned int i, size;
  2048. struct snd_ice1712_card_info **tbl, *c;
  2049. if (! modelname || ! *modelname) {
  2050. ice->eeprom.subvendor = 0;
  2051. if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0)
  2052. ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) |
  2053. (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) |
  2054. (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) |
  2055. (snd_ice1712_read_i2c(ice, dev, 0x03) << 24);
  2056. if (ice->eeprom.subvendor == 0 ||
  2057. ice->eeprom.subvendor == (unsigned int)-1) {
  2058. /* invalid subvendor from EEPROM, try the PCI subststem ID instead */
  2059. u16 vendor, device;
  2060. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
  2061. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
  2062. ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
  2063. if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
  2064. printk(KERN_ERR "ice1712: No valid ID is found\n");
  2065. return -ENXIO;
  2066. }
  2067. }
  2068. }
  2069. for (tbl = card_tables; *tbl; tbl++) {
  2070. for (c = *tbl; c->subvendor; c++) {
  2071. if (modelname && c->model && ! strcmp(modelname, c->model)) {
  2072. printk(KERN_INFO "ice1712: Using board model %s\n", c->name);
  2073. ice->eeprom.subvendor = c->subvendor;
  2074. } else if (c->subvendor != ice->eeprom.subvendor)
  2075. continue;
  2076. if (! c->eeprom_size || ! c->eeprom_data)
  2077. goto found;
  2078. /* if the EEPROM is given by the driver, use it */
  2079. snd_printdd("using the defined eeprom..\n");
  2080. ice->eeprom.version = 1;
  2081. ice->eeprom.size = c->eeprom_size + 6;
  2082. memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
  2083. goto read_skipped;
  2084. }
  2085. }
  2086. printk(KERN_WARNING "ice1712: No matching model found for ID 0x%x\n",
  2087. ice->eeprom.subvendor);
  2088. found:
  2089. ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04);
  2090. if (ice->eeprom.size < 6)
  2091. ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */
  2092. else if (ice->eeprom.size > 32) {
  2093. snd_printk(KERN_ERR "invalid EEPROM (size = %i)\n", ice->eeprom.size);
  2094. return -EIO;
  2095. }
  2096. ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05);
  2097. if (ice->eeprom.version != 1) {
  2098. snd_printk(KERN_ERR "invalid EEPROM version %i\n",
  2099. ice->eeprom.version);
  2100. /* return -EIO; */
  2101. }
  2102. size = ice->eeprom.size - 6;
  2103. for (i = 0; i < size; i++)
  2104. ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6);
  2105. read_skipped:
  2106. ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK];
  2107. ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE];
  2108. ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR];
  2109. return 0;
  2110. }
  2111. static int __devinit snd_ice1712_chip_init(struct snd_ice1712 *ice)
  2112. {
  2113. outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL));
  2114. udelay(200);
  2115. outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
  2116. udelay(200);
  2117. pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
  2118. pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
  2119. pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
  2120. pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]);
  2121. if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) {
  2122. ice->gpio.write_mask = ice->eeprom.gpiomask;
  2123. ice->gpio.direction = ice->eeprom.gpiodir;
  2124. snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK,
  2125. ice->eeprom.gpiomask);
  2126. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
  2127. ice->eeprom.gpiodir);
  2128. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
  2129. ice->eeprom.gpiostate);
  2130. } else {
  2131. ice->gpio.write_mask = 0xc0;
  2132. ice->gpio.direction = 0xff;
  2133. snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0);
  2134. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff);
  2135. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
  2136. ICE1712_STDSP24_CLOCK_BIT);
  2137. }
  2138. snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0);
  2139. if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) {
  2140. outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD));
  2141. udelay(100);
  2142. outb(0, ICEREG(ice, AC97_CMD));
  2143. udelay(200);
  2144. snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0);
  2145. }
  2146. snd_ice1712_set_pro_rate(ice, 48000, 1);
  2147. return 0;
  2148. }
  2149. int __devinit snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice)
  2150. {
  2151. int err;
  2152. struct snd_kcontrol *kctl;
  2153. snd_assert(ice->pcm_pro != NULL, return -EIO);
  2154. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice));
  2155. if (err < 0)
  2156. return err;
  2157. kctl->id.device = ice->pcm_pro->device;
  2158. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice));
  2159. if (err < 0)
  2160. return err;
  2161. kctl->id.device = ice->pcm_pro->device;
  2162. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice));
  2163. if (err < 0)
  2164. return err;
  2165. kctl->id.device = ice->pcm_pro->device;
  2166. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice));
  2167. if (err < 0)
  2168. return err;
  2169. kctl->id.device = ice->pcm_pro->device;
  2170. ice->spdif.stream_ctl = kctl;
  2171. return 0;
  2172. }
  2173. static int __devinit snd_ice1712_build_controls(struct snd_ice1712 *ice)
  2174. {
  2175. int err;
  2176. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice));
  2177. if (err < 0)
  2178. return err;
  2179. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice));
  2180. if (err < 0)
  2181. return err;
  2182. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice));
  2183. if (err < 0)
  2184. return err;
  2185. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice));
  2186. if (err < 0)
  2187. return err;
  2188. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice));
  2189. if (err < 0)
  2190. return err;
  2191. if (ice->num_total_dacs > 0) {
  2192. struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route;
  2193. tmp.count = ice->num_total_dacs;
  2194. err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
  2195. if (err < 0)
  2196. return err;
  2197. }
  2198. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice));
  2199. if (err < 0)
  2200. return err;
  2201. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice));
  2202. if (err < 0)
  2203. return err;
  2204. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice));
  2205. if (err < 0)
  2206. return err;
  2207. return 0;
  2208. }
  2209. static int snd_ice1712_free(struct snd_ice1712 *ice)
  2210. {
  2211. if (! ice->port)
  2212. goto __hw_end;
  2213. /* mask all interrupts */
  2214. outb(0xc0, ICEMT(ice, IRQ));
  2215. outb(0xff, ICEREG(ice, IRQMASK));
  2216. /* --- */
  2217. __hw_end:
  2218. if (ice->irq >= 0) {
  2219. synchronize_irq(ice->irq);
  2220. free_irq(ice->irq, ice);
  2221. }
  2222. if (ice->port)
  2223. pci_release_regions(ice->pci);
  2224. snd_ice1712_akm4xxx_free(ice);
  2225. pci_disable_device(ice->pci);
  2226. kfree(ice);
  2227. return 0;
  2228. }
  2229. static int snd_ice1712_dev_free(struct snd_device *device)
  2230. {
  2231. struct snd_ice1712 *ice = device->device_data;
  2232. return snd_ice1712_free(ice);
  2233. }
  2234. static int __devinit snd_ice1712_create(struct snd_card *card,
  2235. struct pci_dev *pci,
  2236. const char *modelname,
  2237. int omni,
  2238. int cs8427_timeout,
  2239. struct snd_ice1712 ** r_ice1712)
  2240. {
  2241. struct snd_ice1712 *ice;
  2242. int err;
  2243. static struct snd_device_ops ops = {
  2244. .dev_free = snd_ice1712_dev_free,
  2245. };
  2246. *r_ice1712 = NULL;
  2247. /* enable PCI device */
  2248. if ((err = pci_enable_device(pci)) < 0)
  2249. return err;
  2250. /* check, if we can restrict PCI DMA transfers to 28 bits */
  2251. if (pci_set_dma_mask(pci, 0x0fffffff) < 0 ||
  2252. pci_set_consistent_dma_mask(pci, 0x0fffffff) < 0) {
  2253. snd_printk(KERN_ERR "architecture does not support 28bit PCI busmaster DMA\n");
  2254. pci_disable_device(pci);
  2255. return -ENXIO;
  2256. }
  2257. ice = kzalloc(sizeof(*ice), GFP_KERNEL);
  2258. if (ice == NULL) {
  2259. pci_disable_device(pci);
  2260. return -ENOMEM;
  2261. }
  2262. ice->omni = omni ? 1 : 0;
  2263. if (cs8427_timeout < 1)
  2264. cs8427_timeout = 1;
  2265. else if (cs8427_timeout > 1000)
  2266. cs8427_timeout = 1000;
  2267. ice->cs8427_timeout = cs8427_timeout;
  2268. spin_lock_init(&ice->reg_lock);
  2269. mutex_init(&ice->gpio_mutex);
  2270. mutex_init(&ice->i2c_mutex);
  2271. mutex_init(&ice->open_mutex);
  2272. ice->gpio.set_mask = snd_ice1712_set_gpio_mask;
  2273. ice->gpio.set_dir = snd_ice1712_set_gpio_dir;
  2274. ice->gpio.set_data = snd_ice1712_set_gpio_data;
  2275. ice->gpio.get_data = snd_ice1712_get_gpio_data;
  2276. ice->spdif.cs8403_bits =
  2277. ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */
  2278. 0x10 | /* no emphasis */
  2279. 0x20); /* PCM encoder/decoder */
  2280. ice->card = card;
  2281. ice->pci = pci;
  2282. ice->irq = -1;
  2283. pci_set_master(pci);
  2284. pci_write_config_word(ice->pci, 0x40, 0x807f);
  2285. pci_write_config_word(ice->pci, 0x42, 0x0006);
  2286. snd_ice1712_proc_init(ice);
  2287. synchronize_irq(pci->irq);
  2288. if ((err = pci_request_regions(pci, "ICE1712")) < 0) {
  2289. kfree(ice);
  2290. pci_disable_device(pci);
  2291. return err;
  2292. }
  2293. ice->port = pci_resource_start(pci, 0);
  2294. ice->ddma_port = pci_resource_start(pci, 1);
  2295. ice->dmapath_port = pci_resource_start(pci, 2);
  2296. ice->profi_port = pci_resource_start(pci, 3);
  2297. if (request_irq(pci->irq, snd_ice1712_interrupt, SA_INTERRUPT|SA_SHIRQ,
  2298. "ICE1712", ice)) {
  2299. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  2300. snd_ice1712_free(ice);
  2301. return -EIO;
  2302. }
  2303. ice->irq = pci->irq;
  2304. if (snd_ice1712_read_eeprom(ice, modelname) < 0) {
  2305. snd_ice1712_free(ice);
  2306. return -EIO;
  2307. }
  2308. if (snd_ice1712_chip_init(ice) < 0) {
  2309. snd_ice1712_free(ice);
  2310. return -EIO;
  2311. }
  2312. /* unmask used interrupts */
  2313. outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ?
  2314. ICE1712_IRQ_MPU2 : 0) |
  2315. ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ?
  2316. ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0),
  2317. ICEREG(ice, IRQMASK));
  2318. outb(0x00, ICEMT(ice, IRQ));
  2319. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) {
  2320. snd_ice1712_free(ice);
  2321. return err;
  2322. }
  2323. snd_card_set_dev(card, &pci->dev);
  2324. *r_ice1712 = ice;
  2325. return 0;
  2326. }
  2327. /*
  2328. *
  2329. * Registration
  2330. *
  2331. */
  2332. static struct snd_ice1712_card_info no_matched __devinitdata;
  2333. static int __devinit snd_ice1712_probe(struct pci_dev *pci,
  2334. const struct pci_device_id *pci_id)
  2335. {
  2336. static int dev;
  2337. struct snd_card *card;
  2338. struct snd_ice1712 *ice;
  2339. int pcm_dev = 0, err;
  2340. struct snd_ice1712_card_info **tbl, *c;
  2341. if (dev >= SNDRV_CARDS)
  2342. return -ENODEV;
  2343. if (!enable[dev]) {
  2344. dev++;
  2345. return -ENOENT;
  2346. }
  2347. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  2348. if (card == NULL)
  2349. return -ENOMEM;
  2350. strcpy(card->driver, "ICE1712");
  2351. strcpy(card->shortname, "ICEnsemble ICE1712");
  2352. if ((err = snd_ice1712_create(card, pci, model[dev], omni[dev],
  2353. cs8427_timeout[dev], &ice)) < 0) {
  2354. snd_card_free(card);
  2355. return err;
  2356. }
  2357. for (tbl = card_tables; *tbl; tbl++) {
  2358. for (c = *tbl; c->subvendor; c++) {
  2359. if (c->subvendor == ice->eeprom.subvendor) {
  2360. strcpy(card->shortname, c->name);
  2361. if (c->driver) /* specific driver? */
  2362. strcpy(card->driver, c->driver);
  2363. if (c->chip_init) {
  2364. if ((err = c->chip_init(ice)) < 0) {
  2365. snd_card_free(card);
  2366. return err;
  2367. }
  2368. }
  2369. goto __found;
  2370. }
  2371. }
  2372. }
  2373. c = &no_matched;
  2374. __found:
  2375. if ((err = snd_ice1712_pcm_profi(ice, pcm_dev++, NULL)) < 0) {
  2376. snd_card_free(card);
  2377. return err;
  2378. }
  2379. if (ice_has_con_ac97(ice))
  2380. if ((err = snd_ice1712_pcm(ice, pcm_dev++, NULL)) < 0) {
  2381. snd_card_free(card);
  2382. return err;
  2383. }
  2384. if ((err = snd_ice1712_ac97_mixer(ice)) < 0) {
  2385. snd_card_free(card);
  2386. return err;
  2387. }
  2388. if ((err = snd_ice1712_build_controls(ice)) < 0) {
  2389. snd_card_free(card);
  2390. return err;
  2391. }
  2392. if (c->build_controls) {
  2393. if ((err = c->build_controls(ice)) < 0) {
  2394. snd_card_free(card);
  2395. return err;
  2396. }
  2397. }
  2398. if (ice_has_con_ac97(ice))
  2399. if ((err = snd_ice1712_pcm_ds(ice, pcm_dev++, NULL)) < 0) {
  2400. snd_card_free(card);
  2401. return err;
  2402. }
  2403. if (! c->no_mpu401) {
  2404. if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
  2405. ICEREG(ice, MPU1_CTRL), 1,
  2406. ice->irq, 0,
  2407. &ice->rmidi[0])) < 0) {
  2408. snd_card_free(card);
  2409. return err;
  2410. }
  2411. if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401)
  2412. if ((err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712,
  2413. ICEREG(ice, MPU2_CTRL), 1,
  2414. ice->irq, 0,
  2415. &ice->rmidi[1])) < 0) {
  2416. snd_card_free(card);
  2417. return err;
  2418. }
  2419. }
  2420. snd_ice1712_set_input_clock_source(ice, 0);
  2421. sprintf(card->longname, "%s at 0x%lx, irq %i",
  2422. card->shortname, ice->port, ice->irq);
  2423. if ((err = snd_card_register(card)) < 0) {
  2424. snd_card_free(card);
  2425. return err;
  2426. }
  2427. pci_set_drvdata(pci, card);
  2428. dev++;
  2429. return 0;
  2430. }
  2431. static void __devexit snd_ice1712_remove(struct pci_dev *pci)
  2432. {
  2433. snd_card_free(pci_get_drvdata(pci));
  2434. pci_set_drvdata(pci, NULL);
  2435. }
  2436. static struct pci_driver driver = {
  2437. .name = "ICE1712",
  2438. .id_table = snd_ice1712_ids,
  2439. .probe = snd_ice1712_probe,
  2440. .remove = __devexit_p(snd_ice1712_remove),
  2441. };
  2442. static int __init alsa_card_ice1712_init(void)
  2443. {
  2444. return pci_register_driver(&driver);
  2445. }
  2446. static void __exit alsa_card_ice1712_exit(void)
  2447. {
  2448. pci_unregister_driver(&driver);
  2449. }
  2450. module_init(alsa_card_ice1712_init)
  2451. module_exit(alsa_card_ice1712_exit)