common.c 148 KB

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  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/etherdevice.h>
  31. #include <linux/sched.h>
  32. #include <linux/slab.h>
  33. #include <linux/types.h>
  34. #include <linux/lockdep.h>
  35. #include <linux/init.h>
  36. #include <linux/pci.h>
  37. #include <linux/dma-mapping.h>
  38. #include <linux/delay.h>
  39. #include <linux/skbuff.h>
  40. #include <net/mac80211.h>
  41. #include "iwl-eeprom.h"
  42. #include "iwl-debug.h"
  43. #include "common.h"
  44. #include "iwl-power.h"
  45. const char *il_get_cmd_string(u8 cmd)
  46. {
  47. switch (cmd) {
  48. IL_CMD(N_ALIVE);
  49. IL_CMD(N_ERROR);
  50. IL_CMD(C_RXON);
  51. IL_CMD(C_RXON_ASSOC);
  52. IL_CMD(C_QOS_PARAM);
  53. IL_CMD(C_RXON_TIMING);
  54. IL_CMD(C_ADD_STA);
  55. IL_CMD(C_REM_STA);
  56. IL_CMD(C_WEPKEY);
  57. IL_CMD(N_3945_RX);
  58. IL_CMD(C_TX);
  59. IL_CMD(C_RATE_SCALE);
  60. IL_CMD(C_LEDS);
  61. IL_CMD(C_TX_LINK_QUALITY_CMD);
  62. IL_CMD(C_CHANNEL_SWITCH);
  63. IL_CMD(N_CHANNEL_SWITCH);
  64. IL_CMD(C_SPECTRUM_MEASUREMENT);
  65. IL_CMD(N_SPECTRUM_MEASUREMENT);
  66. IL_CMD(C_POWER_TBL);
  67. IL_CMD(N_PM_SLEEP);
  68. IL_CMD(N_PM_DEBUG_STATS);
  69. IL_CMD(C_SCAN);
  70. IL_CMD(C_SCAN_ABORT);
  71. IL_CMD(N_SCAN_START);
  72. IL_CMD(N_SCAN_RESULTS);
  73. IL_CMD(N_SCAN_COMPLETE);
  74. IL_CMD(N_BEACON);
  75. IL_CMD(C_TX_BEACON);
  76. IL_CMD(C_TX_PWR_TBL);
  77. IL_CMD(C_BT_CONFIG);
  78. IL_CMD(C_STATS);
  79. IL_CMD(N_STATS);
  80. IL_CMD(N_CARD_STATE);
  81. IL_CMD(N_MISSED_BEACONS);
  82. IL_CMD(C_CT_KILL_CONFIG);
  83. IL_CMD(C_SENSITIVITY);
  84. IL_CMD(C_PHY_CALIBRATION);
  85. IL_CMD(N_RX_PHY);
  86. IL_CMD(N_RX_MPDU);
  87. IL_CMD(N_RX);
  88. IL_CMD(N_COMPRESSED_BA);
  89. default:
  90. return "UNKNOWN";
  91. }
  92. }
  93. EXPORT_SYMBOL(il_get_cmd_string);
  94. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  95. static void il_generic_cmd_callback(struct il_priv *il,
  96. struct il_device_cmd *cmd,
  97. struct il_rx_pkt *pkt)
  98. {
  99. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  100. IL_ERR("Bad return from %s (0x%08X)\n",
  101. il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
  102. return;
  103. }
  104. #ifdef CONFIG_IWLEGACY_DEBUG
  105. switch (cmd->hdr.cmd) {
  106. case C_TX_LINK_QUALITY_CMD:
  107. case C_SENSITIVITY:
  108. D_HC_DUMP("back from %s (0x%08X)\n",
  109. il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
  110. break;
  111. default:
  112. D_HC("back from %s (0x%08X)\n",
  113. il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
  114. }
  115. #endif
  116. }
  117. static int
  118. il_send_cmd_async(struct il_priv *il, struct il_host_cmd *cmd)
  119. {
  120. int ret;
  121. BUG_ON(!(cmd->flags & CMD_ASYNC));
  122. /* An asynchronous command can not expect an SKB to be set. */
  123. BUG_ON(cmd->flags & CMD_WANT_SKB);
  124. /* Assign a generic callback if one is not provided */
  125. if (!cmd->callback)
  126. cmd->callback = il_generic_cmd_callback;
  127. if (test_bit(S_EXIT_PENDING, &il->status))
  128. return -EBUSY;
  129. ret = il_enqueue_hcmd(il, cmd);
  130. if (ret < 0) {
  131. IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n",
  132. il_get_cmd_string(cmd->id), ret);
  133. return ret;
  134. }
  135. return 0;
  136. }
  137. int il_send_cmd_sync(struct il_priv *il, struct il_host_cmd *cmd)
  138. {
  139. int cmd_idx;
  140. int ret;
  141. lockdep_assert_held(&il->mutex);
  142. BUG_ON(cmd->flags & CMD_ASYNC);
  143. /* A synchronous command can not have a callback set. */
  144. BUG_ON(cmd->callback);
  145. D_INFO("Attempting to send sync command %s\n",
  146. il_get_cmd_string(cmd->id));
  147. set_bit(S_HCMD_ACTIVE, &il->status);
  148. D_INFO("Setting HCMD_ACTIVE for command %s\n",
  149. il_get_cmd_string(cmd->id));
  150. cmd_idx = il_enqueue_hcmd(il, cmd);
  151. if (cmd_idx < 0) {
  152. ret = cmd_idx;
  153. IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n",
  154. il_get_cmd_string(cmd->id), ret);
  155. goto out;
  156. }
  157. ret = wait_event_timeout(il->wait_command_queue,
  158. !test_bit(S_HCMD_ACTIVE, &il->status),
  159. HOST_COMPLETE_TIMEOUT);
  160. if (!ret) {
  161. if (test_bit(S_HCMD_ACTIVE, &il->status)) {
  162. IL_ERR(
  163. "Error sending %s: time out after %dms.\n",
  164. il_get_cmd_string(cmd->id),
  165. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  166. clear_bit(S_HCMD_ACTIVE, &il->status);
  167. D_INFO(
  168. "Clearing HCMD_ACTIVE for command %s\n",
  169. il_get_cmd_string(cmd->id));
  170. ret = -ETIMEDOUT;
  171. goto cancel;
  172. }
  173. }
  174. if (test_bit(S_RF_KILL_HW, &il->status)) {
  175. IL_ERR("Command %s aborted: RF KILL Switch\n",
  176. il_get_cmd_string(cmd->id));
  177. ret = -ECANCELED;
  178. goto fail;
  179. }
  180. if (test_bit(S_FW_ERROR, &il->status)) {
  181. IL_ERR("Command %s failed: FW Error\n",
  182. il_get_cmd_string(cmd->id));
  183. ret = -EIO;
  184. goto fail;
  185. }
  186. if ((cmd->flags & CMD_WANT_SKB) && !cmd->reply_page) {
  187. IL_ERR("Error: Response NULL in '%s'\n",
  188. il_get_cmd_string(cmd->id));
  189. ret = -EIO;
  190. goto cancel;
  191. }
  192. ret = 0;
  193. goto out;
  194. cancel:
  195. if (cmd->flags & CMD_WANT_SKB) {
  196. /*
  197. * Cancel the CMD_WANT_SKB flag for the cmd in the
  198. * TX cmd queue. Otherwise in case the cmd comes
  199. * in later, it will possibly set an invalid
  200. * address (cmd->meta.source).
  201. */
  202. il->txq[il->cmd_queue].meta[cmd_idx].flags &=
  203. ~CMD_WANT_SKB;
  204. }
  205. fail:
  206. if (cmd->reply_page) {
  207. il_free_pages(il, cmd->reply_page);
  208. cmd->reply_page = 0;
  209. }
  210. out:
  211. return ret;
  212. }
  213. EXPORT_SYMBOL(il_send_cmd_sync);
  214. int il_send_cmd(struct il_priv *il, struct il_host_cmd *cmd)
  215. {
  216. if (cmd->flags & CMD_ASYNC)
  217. return il_send_cmd_async(il, cmd);
  218. return il_send_cmd_sync(il, cmd);
  219. }
  220. EXPORT_SYMBOL(il_send_cmd);
  221. int
  222. il_send_cmd_pdu(struct il_priv *il, u8 id, u16 len, const void *data)
  223. {
  224. struct il_host_cmd cmd = {
  225. .id = id,
  226. .len = len,
  227. .data = data,
  228. };
  229. return il_send_cmd_sync(il, &cmd);
  230. }
  231. EXPORT_SYMBOL(il_send_cmd_pdu);
  232. int il_send_cmd_pdu_async(struct il_priv *il,
  233. u8 id, u16 len, const void *data,
  234. void (*callback)(struct il_priv *il,
  235. struct il_device_cmd *cmd,
  236. struct il_rx_pkt *pkt))
  237. {
  238. struct il_host_cmd cmd = {
  239. .id = id,
  240. .len = len,
  241. .data = data,
  242. };
  243. cmd.flags |= CMD_ASYNC;
  244. cmd.callback = callback;
  245. return il_send_cmd_async(il, &cmd);
  246. }
  247. EXPORT_SYMBOL(il_send_cmd_pdu_async);
  248. /* default: IL_LED_BLINK(0) using blinking idx table */
  249. static int led_mode;
  250. module_param(led_mode, int, S_IRUGO);
  251. MODULE_PARM_DESC(led_mode, "0=system default, "
  252. "1=On(RF On)/Off(RF Off), 2=blinking");
  253. /* Throughput OFF time(ms) ON time (ms)
  254. * >300 25 25
  255. * >200 to 300 40 40
  256. * >100 to 200 55 55
  257. * >70 to 100 65 65
  258. * >50 to 70 75 75
  259. * >20 to 50 85 85
  260. * >10 to 20 95 95
  261. * >5 to 10 110 110
  262. * >1 to 5 130 130
  263. * >0 to 1 167 167
  264. * <=0 SOLID ON
  265. */
  266. static const struct ieee80211_tpt_blink il_blink[] = {
  267. { .throughput = 0, .blink_time = 334 },
  268. { .throughput = 1 * 1024 - 1, .blink_time = 260 },
  269. { .throughput = 5 * 1024 - 1, .blink_time = 220 },
  270. { .throughput = 10 * 1024 - 1, .blink_time = 190 },
  271. { .throughput = 20 * 1024 - 1, .blink_time = 170 },
  272. { .throughput = 50 * 1024 - 1, .blink_time = 150 },
  273. { .throughput = 70 * 1024 - 1, .blink_time = 130 },
  274. { .throughput = 100 * 1024 - 1, .blink_time = 110 },
  275. { .throughput = 200 * 1024 - 1, .blink_time = 80 },
  276. { .throughput = 300 * 1024 - 1, .blink_time = 50 },
  277. };
  278. /*
  279. * Adjust led blink rate to compensate on a MAC Clock difference on every HW
  280. * Led blink rate analysis showed an average deviation of 0% on 3945,
  281. * 5% on 4965 HW.
  282. * Need to compensate on the led on/off time per HW according to the deviation
  283. * to achieve the desired led frequency
  284. * The calculation is: (100-averageDeviation)/100 * blinkTime
  285. * For code efficiency the calculation will be:
  286. * compensation = (100 - averageDeviation) * 64 / 100
  287. * NewBlinkTime = (compensation * BlinkTime) / 64
  288. */
  289. static inline u8 il_blink_compensation(struct il_priv *il,
  290. u8 time, u16 compensation)
  291. {
  292. if (!compensation) {
  293. IL_ERR("undefined blink compensation: "
  294. "use pre-defined blinking time\n");
  295. return time;
  296. }
  297. return (u8)((time * compensation) >> 6);
  298. }
  299. /* Set led pattern command */
  300. static int il_led_cmd(struct il_priv *il,
  301. unsigned long on,
  302. unsigned long off)
  303. {
  304. struct il_led_cmd led_cmd = {
  305. .id = IL_LED_LINK,
  306. .interval = IL_DEF_LED_INTRVL
  307. };
  308. int ret;
  309. if (!test_bit(S_READY, &il->status))
  310. return -EBUSY;
  311. if (il->blink_on == on && il->blink_off == off)
  312. return 0;
  313. if (off == 0) {
  314. /* led is SOLID_ON */
  315. on = IL_LED_SOLID;
  316. }
  317. D_LED("Led blink time compensation=%u\n",
  318. il->cfg->base_params->led_compensation);
  319. led_cmd.on = il_blink_compensation(il, on,
  320. il->cfg->base_params->led_compensation);
  321. led_cmd.off = il_blink_compensation(il, off,
  322. il->cfg->base_params->led_compensation);
  323. ret = il->cfg->ops->led->cmd(il, &led_cmd);
  324. if (!ret) {
  325. il->blink_on = on;
  326. il->blink_off = off;
  327. }
  328. return ret;
  329. }
  330. static void il_led_brightness_set(struct led_classdev *led_cdev,
  331. enum led_brightness brightness)
  332. {
  333. struct il_priv *il = container_of(led_cdev, struct il_priv, led);
  334. unsigned long on = 0;
  335. if (brightness > 0)
  336. on = IL_LED_SOLID;
  337. il_led_cmd(il, on, 0);
  338. }
  339. static int il_led_blink_set(struct led_classdev *led_cdev,
  340. unsigned long *delay_on,
  341. unsigned long *delay_off)
  342. {
  343. struct il_priv *il = container_of(led_cdev, struct il_priv, led);
  344. return il_led_cmd(il, *delay_on, *delay_off);
  345. }
  346. void il_leds_init(struct il_priv *il)
  347. {
  348. int mode = led_mode;
  349. int ret;
  350. if (mode == IL_LED_DEFAULT)
  351. mode = il->cfg->led_mode;
  352. il->led.name = kasprintf(GFP_KERNEL, "%s-led",
  353. wiphy_name(il->hw->wiphy));
  354. il->led.brightness_set = il_led_brightness_set;
  355. il->led.blink_set = il_led_blink_set;
  356. il->led.max_brightness = 1;
  357. switch (mode) {
  358. case IL_LED_DEFAULT:
  359. WARN_ON(1);
  360. break;
  361. case IL_LED_BLINK:
  362. il->led.default_trigger =
  363. ieee80211_create_tpt_led_trigger(il->hw,
  364. IEEE80211_TPT_LEDTRIG_FL_CONNECTED,
  365. il_blink, ARRAY_SIZE(il_blink));
  366. break;
  367. case IL_LED_RF_STATE:
  368. il->led.default_trigger =
  369. ieee80211_get_radio_led_name(il->hw);
  370. break;
  371. }
  372. ret = led_classdev_register(&il->pci_dev->dev, &il->led);
  373. if (ret) {
  374. kfree(il->led.name);
  375. return;
  376. }
  377. il->led_registered = true;
  378. }
  379. EXPORT_SYMBOL(il_leds_init);
  380. void il_leds_exit(struct il_priv *il)
  381. {
  382. if (!il->led_registered)
  383. return;
  384. led_classdev_unregister(&il->led);
  385. kfree(il->led.name);
  386. }
  387. EXPORT_SYMBOL(il_leds_exit);
  388. /************************** EEPROM BANDS ****************************
  389. *
  390. * The il_eeprom_band definitions below provide the mapping from the
  391. * EEPROM contents to the specific channel number supported for each
  392. * band.
  393. *
  394. * For example, il_priv->eeprom.band_3_channels[4] from the band_3
  395. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  396. * The specific geography and calibration information for that channel
  397. * is contained in the eeprom map itself.
  398. *
  399. * During init, we copy the eeprom information and channel map
  400. * information into il->channel_info_24/52 and il->channel_map_24/52
  401. *
  402. * channel_map_24/52 provides the idx in the channel_info array for a
  403. * given channel. We have to have two separate maps as there is channel
  404. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  405. * band_2
  406. *
  407. * A value of 0xff stored in the channel_map indicates that the channel
  408. * is not supported by the hardware at all.
  409. *
  410. * A value of 0xfe in the channel_map indicates that the channel is not
  411. * valid for Tx with the current hardware. This means that
  412. * while the system can tune and receive on a given channel, it may not
  413. * be able to associate or transmit any frames on that
  414. * channel. There is no corresponding channel information for that
  415. * entry.
  416. *
  417. *********************************************************************/
  418. /* 2.4 GHz */
  419. const u8 il_eeprom_band_1[14] = {
  420. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  421. };
  422. /* 5.2 GHz bands */
  423. static const u8 il_eeprom_band_2[] = { /* 4915-5080MHz */
  424. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  425. };
  426. static const u8 il_eeprom_band_3[] = { /* 5170-5320MHz */
  427. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  428. };
  429. static const u8 il_eeprom_band_4[] = { /* 5500-5700MHz */
  430. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  431. };
  432. static const u8 il_eeprom_band_5[] = { /* 5725-5825MHz */
  433. 145, 149, 153, 157, 161, 165
  434. };
  435. static const u8 il_eeprom_band_6[] = { /* 2.4 ht40 channel */
  436. 1, 2, 3, 4, 5, 6, 7
  437. };
  438. static const u8 il_eeprom_band_7[] = { /* 5.2 ht40 channel */
  439. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  440. };
  441. /******************************************************************************
  442. *
  443. * EEPROM related functions
  444. *
  445. ******************************************************************************/
  446. static int il_eeprom_verify_signature(struct il_priv *il)
  447. {
  448. u32 gp = _il_rd(il, CSR_EEPROM_GP) & CSR_EEPROM_GP_VALID_MSK;
  449. int ret = 0;
  450. D_EEPROM("EEPROM signature=0x%08x\n", gp);
  451. switch (gp) {
  452. case CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K:
  453. case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K:
  454. break;
  455. default:
  456. IL_ERR("bad EEPROM signature,"
  457. "EEPROM_GP=0x%08x\n", gp);
  458. ret = -ENOENT;
  459. break;
  460. }
  461. return ret;
  462. }
  463. const u8
  464. *il_eeprom_query_addr(const struct il_priv *il, size_t offset)
  465. {
  466. BUG_ON(offset >= il->cfg->base_params->eeprom_size);
  467. return &il->eeprom[offset];
  468. }
  469. EXPORT_SYMBOL(il_eeprom_query_addr);
  470. u16 il_eeprom_query16(const struct il_priv *il, size_t offset)
  471. {
  472. if (!il->eeprom)
  473. return 0;
  474. return (u16)il->eeprom[offset] | ((u16)il->eeprom[offset + 1] << 8);
  475. }
  476. EXPORT_SYMBOL(il_eeprom_query16);
  477. /**
  478. * il_eeprom_init - read EEPROM contents
  479. *
  480. * Load the EEPROM contents from adapter into il->eeprom
  481. *
  482. * NOTE: This routine uses the non-debug IO access functions.
  483. */
  484. int il_eeprom_init(struct il_priv *il)
  485. {
  486. __le16 *e;
  487. u32 gp = _il_rd(il, CSR_EEPROM_GP);
  488. int sz;
  489. int ret;
  490. u16 addr;
  491. /* allocate eeprom */
  492. sz = il->cfg->base_params->eeprom_size;
  493. D_EEPROM("NVM size = %d\n", sz);
  494. il->eeprom = kzalloc(sz, GFP_KERNEL);
  495. if (!il->eeprom) {
  496. ret = -ENOMEM;
  497. goto alloc_err;
  498. }
  499. e = (__le16 *)il->eeprom;
  500. il->cfg->ops->lib->apm_ops.init(il);
  501. ret = il_eeprom_verify_signature(il);
  502. if (ret < 0) {
  503. IL_ERR("EEPROM not found, EEPROM_GP=0x%08x\n", gp);
  504. ret = -ENOENT;
  505. goto err;
  506. }
  507. /* Make sure driver (instead of uCode) is allowed to read EEPROM */
  508. ret = il->cfg->ops->lib->eeprom_ops.acquire_semaphore(il);
  509. if (ret < 0) {
  510. IL_ERR("Failed to acquire EEPROM semaphore.\n");
  511. ret = -ENOENT;
  512. goto err;
  513. }
  514. /* eeprom is an array of 16bit values */
  515. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  516. u32 r;
  517. _il_wr(il, CSR_EEPROM_REG,
  518. CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
  519. ret = _il_poll_bit(il, CSR_EEPROM_REG,
  520. CSR_EEPROM_REG_READ_VALID_MSK,
  521. CSR_EEPROM_REG_READ_VALID_MSK,
  522. IL_EEPROM_ACCESS_TIMEOUT);
  523. if (ret < 0) {
  524. IL_ERR("Time out reading EEPROM[%d]\n",
  525. addr);
  526. goto done;
  527. }
  528. r = _il_rd(il, CSR_EEPROM_REG);
  529. e[addr / 2] = cpu_to_le16(r >> 16);
  530. }
  531. D_EEPROM("NVM Type: %s, version: 0x%x\n",
  532. "EEPROM",
  533. il_eeprom_query16(il, EEPROM_VERSION));
  534. ret = 0;
  535. done:
  536. il->cfg->ops->lib->eeprom_ops.release_semaphore(il);
  537. err:
  538. if (ret)
  539. il_eeprom_free(il);
  540. /* Reset chip to save power until we load uCode during "up". */
  541. il_apm_stop(il);
  542. alloc_err:
  543. return ret;
  544. }
  545. EXPORT_SYMBOL(il_eeprom_init);
  546. void il_eeprom_free(struct il_priv *il)
  547. {
  548. kfree(il->eeprom);
  549. il->eeprom = NULL;
  550. }
  551. EXPORT_SYMBOL(il_eeprom_free);
  552. static void il_init_band_reference(const struct il_priv *il,
  553. int eep_band, int *eeprom_ch_count,
  554. const struct il_eeprom_channel **eeprom_ch_info,
  555. const u8 **eeprom_ch_idx)
  556. {
  557. u32 offset = il->cfg->ops->lib->
  558. eeprom_ops.regulatory_bands[eep_band - 1];
  559. switch (eep_band) {
  560. case 1: /* 2.4GHz band */
  561. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_1);
  562. *eeprom_ch_info = (struct il_eeprom_channel *)
  563. il_eeprom_query_addr(il, offset);
  564. *eeprom_ch_idx = il_eeprom_band_1;
  565. break;
  566. case 2: /* 4.9GHz band */
  567. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_2);
  568. *eeprom_ch_info = (struct il_eeprom_channel *)
  569. il_eeprom_query_addr(il, offset);
  570. *eeprom_ch_idx = il_eeprom_band_2;
  571. break;
  572. case 3: /* 5.2GHz band */
  573. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_3);
  574. *eeprom_ch_info = (struct il_eeprom_channel *)
  575. il_eeprom_query_addr(il, offset);
  576. *eeprom_ch_idx = il_eeprom_band_3;
  577. break;
  578. case 4: /* 5.5GHz band */
  579. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_4);
  580. *eeprom_ch_info = (struct il_eeprom_channel *)
  581. il_eeprom_query_addr(il, offset);
  582. *eeprom_ch_idx = il_eeprom_band_4;
  583. break;
  584. case 5: /* 5.7GHz band */
  585. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_5);
  586. *eeprom_ch_info = (struct il_eeprom_channel *)
  587. il_eeprom_query_addr(il, offset);
  588. *eeprom_ch_idx = il_eeprom_band_5;
  589. break;
  590. case 6: /* 2.4GHz ht40 channels */
  591. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_6);
  592. *eeprom_ch_info = (struct il_eeprom_channel *)
  593. il_eeprom_query_addr(il, offset);
  594. *eeprom_ch_idx = il_eeprom_band_6;
  595. break;
  596. case 7: /* 5 GHz ht40 channels */
  597. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_7);
  598. *eeprom_ch_info = (struct il_eeprom_channel *)
  599. il_eeprom_query_addr(il, offset);
  600. *eeprom_ch_idx = il_eeprom_band_7;
  601. break;
  602. default:
  603. BUG();
  604. }
  605. }
  606. #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
  607. ? # x " " : "")
  608. /**
  609. * il_mod_ht40_chan_info - Copy ht40 channel info into driver's il.
  610. *
  611. * Does not set up a command, or touch hardware.
  612. */
  613. static int il_mod_ht40_chan_info(struct il_priv *il,
  614. enum ieee80211_band band, u16 channel,
  615. const struct il_eeprom_channel *eeprom_ch,
  616. u8 clear_ht40_extension_channel)
  617. {
  618. struct il_channel_info *ch_info;
  619. ch_info = (struct il_channel_info *)
  620. il_get_channel_info(il, band, channel);
  621. if (!il_is_channel_valid(ch_info))
  622. return -1;
  623. D_EEPROM("HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
  624. " Ad-Hoc %ssupported\n",
  625. ch_info->channel,
  626. il_is_channel_a_band(ch_info) ?
  627. "5.2" : "2.4",
  628. CHECK_AND_PRINT(IBSS),
  629. CHECK_AND_PRINT(ACTIVE),
  630. CHECK_AND_PRINT(RADAR),
  631. CHECK_AND_PRINT(WIDE),
  632. CHECK_AND_PRINT(DFS),
  633. eeprom_ch->flags,
  634. eeprom_ch->max_power_avg,
  635. ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
  636. && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
  637. "" : "not ");
  638. ch_info->ht40_eeprom = *eeprom_ch;
  639. ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg;
  640. ch_info->ht40_flags = eeprom_ch->flags;
  641. if (eeprom_ch->flags & EEPROM_CHANNEL_VALID)
  642. ch_info->ht40_extension_channel &=
  643. ~clear_ht40_extension_channel;
  644. return 0;
  645. }
  646. #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  647. ? # x " " : "")
  648. /**
  649. * il_init_channel_map - Set up driver's info for all possible channels
  650. */
  651. int il_init_channel_map(struct il_priv *il)
  652. {
  653. int eeprom_ch_count = 0;
  654. const u8 *eeprom_ch_idx = NULL;
  655. const struct il_eeprom_channel *eeprom_ch_info = NULL;
  656. int band, ch;
  657. struct il_channel_info *ch_info;
  658. if (il->channel_count) {
  659. D_EEPROM("Channel map already initialized.\n");
  660. return 0;
  661. }
  662. D_EEPROM("Initializing regulatory info from EEPROM\n");
  663. il->channel_count =
  664. ARRAY_SIZE(il_eeprom_band_1) +
  665. ARRAY_SIZE(il_eeprom_band_2) +
  666. ARRAY_SIZE(il_eeprom_band_3) +
  667. ARRAY_SIZE(il_eeprom_band_4) +
  668. ARRAY_SIZE(il_eeprom_band_5);
  669. D_EEPROM("Parsing data for %d channels.\n",
  670. il->channel_count);
  671. il->channel_info = kzalloc(sizeof(struct il_channel_info) *
  672. il->channel_count, GFP_KERNEL);
  673. if (!il->channel_info) {
  674. IL_ERR("Could not allocate channel_info\n");
  675. il->channel_count = 0;
  676. return -ENOMEM;
  677. }
  678. ch_info = il->channel_info;
  679. /* Loop through the 5 EEPROM bands adding them in order to the
  680. * channel map we maintain (that contains additional information than
  681. * what just in the EEPROM) */
  682. for (band = 1; band <= 5; band++) {
  683. il_init_band_reference(il, band, &eeprom_ch_count,
  684. &eeprom_ch_info, &eeprom_ch_idx);
  685. /* Loop through each band adding each of the channels */
  686. for (ch = 0; ch < eeprom_ch_count; ch++) {
  687. ch_info->channel = eeprom_ch_idx[ch];
  688. ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
  689. IEEE80211_BAND_5GHZ;
  690. /* permanently store EEPROM's channel regulatory flags
  691. * and max power in channel info database. */
  692. ch_info->eeprom = eeprom_ch_info[ch];
  693. /* Copy the run-time flags so they are there even on
  694. * invalid channels */
  695. ch_info->flags = eeprom_ch_info[ch].flags;
  696. /* First write that ht40 is not enabled, and then enable
  697. * one by one */
  698. ch_info->ht40_extension_channel =
  699. IEEE80211_CHAN_NO_HT40;
  700. if (!(il_is_channel_valid(ch_info))) {
  701. D_EEPROM(
  702. "Ch. %d Flags %x [%sGHz] - "
  703. "No traffic\n",
  704. ch_info->channel,
  705. ch_info->flags,
  706. il_is_channel_a_band(ch_info) ?
  707. "5.2" : "2.4");
  708. ch_info++;
  709. continue;
  710. }
  711. /* Initialize regulatory-based run-time data */
  712. ch_info->max_power_avg = ch_info->curr_txpow =
  713. eeprom_ch_info[ch].max_power_avg;
  714. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  715. ch_info->min_power = 0;
  716. D_EEPROM("Ch. %d [%sGHz] "
  717. "%s%s%s%s%s%s(0x%02x %ddBm):"
  718. " Ad-Hoc %ssupported\n",
  719. ch_info->channel,
  720. il_is_channel_a_band(ch_info) ?
  721. "5.2" : "2.4",
  722. CHECK_AND_PRINT_I(VALID),
  723. CHECK_AND_PRINT_I(IBSS),
  724. CHECK_AND_PRINT_I(ACTIVE),
  725. CHECK_AND_PRINT_I(RADAR),
  726. CHECK_AND_PRINT_I(WIDE),
  727. CHECK_AND_PRINT_I(DFS),
  728. eeprom_ch_info[ch].flags,
  729. eeprom_ch_info[ch].max_power_avg,
  730. ((eeprom_ch_info[ch].
  731. flags & EEPROM_CHANNEL_IBSS)
  732. && !(eeprom_ch_info[ch].
  733. flags & EEPROM_CHANNEL_RADAR))
  734. ? "" : "not ");
  735. ch_info++;
  736. }
  737. }
  738. /* Check if we do have HT40 channels */
  739. if (il->cfg->ops->lib->eeprom_ops.regulatory_bands[5] ==
  740. EEPROM_REGULATORY_BAND_NO_HT40 &&
  741. il->cfg->ops->lib->eeprom_ops.regulatory_bands[6] ==
  742. EEPROM_REGULATORY_BAND_NO_HT40)
  743. return 0;
  744. /* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */
  745. for (band = 6; band <= 7; band++) {
  746. enum ieee80211_band ieeeband;
  747. il_init_band_reference(il, band, &eeprom_ch_count,
  748. &eeprom_ch_info, &eeprom_ch_idx);
  749. /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
  750. ieeeband =
  751. (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  752. /* Loop through each band adding each of the channels */
  753. for (ch = 0; ch < eeprom_ch_count; ch++) {
  754. /* Set up driver's info for lower half */
  755. il_mod_ht40_chan_info(il, ieeeband,
  756. eeprom_ch_idx[ch],
  757. &eeprom_ch_info[ch],
  758. IEEE80211_CHAN_NO_HT40PLUS);
  759. /* Set up driver's info for upper half */
  760. il_mod_ht40_chan_info(il, ieeeband,
  761. eeprom_ch_idx[ch] + 4,
  762. &eeprom_ch_info[ch],
  763. IEEE80211_CHAN_NO_HT40MINUS);
  764. }
  765. }
  766. return 0;
  767. }
  768. EXPORT_SYMBOL(il_init_channel_map);
  769. /*
  770. * il_free_channel_map - undo allocations in il_init_channel_map
  771. */
  772. void il_free_channel_map(struct il_priv *il)
  773. {
  774. kfree(il->channel_info);
  775. il->channel_count = 0;
  776. }
  777. EXPORT_SYMBOL(il_free_channel_map);
  778. /**
  779. * il_get_channel_info - Find driver's ilate channel info
  780. *
  781. * Based on band and channel number.
  782. */
  783. const struct
  784. il_channel_info *il_get_channel_info(const struct il_priv *il,
  785. enum ieee80211_band band, u16 channel)
  786. {
  787. int i;
  788. switch (band) {
  789. case IEEE80211_BAND_5GHZ:
  790. for (i = 14; i < il->channel_count; i++) {
  791. if (il->channel_info[i].channel == channel)
  792. return &il->channel_info[i];
  793. }
  794. break;
  795. case IEEE80211_BAND_2GHZ:
  796. if (channel >= 1 && channel <= 14)
  797. return &il->channel_info[channel - 1];
  798. break;
  799. default:
  800. BUG();
  801. }
  802. return NULL;
  803. }
  804. EXPORT_SYMBOL(il_get_channel_info);
  805. /*
  806. * Setting power level allows the card to go to sleep when not busy.
  807. *
  808. * We calculate a sleep command based on the required latency, which
  809. * we get from mac80211. In order to handle thermal throttling, we can
  810. * also use pre-defined power levels.
  811. */
  812. /*
  813. * This defines the old power levels. They are still used by default
  814. * (level 1) and for thermal throttle (levels 3 through 5)
  815. */
  816. struct il_power_vec_entry {
  817. struct il_powertable_cmd cmd;
  818. u8 no_dtim; /* number of skip dtim */
  819. };
  820. static void il_power_sleep_cam_cmd(struct il_priv *il,
  821. struct il_powertable_cmd *cmd)
  822. {
  823. memset(cmd, 0, sizeof(*cmd));
  824. if (il->power_data.pci_pm)
  825. cmd->flags |= IL_POWER_PCI_PM_MSK;
  826. D_POWER("Sleep command for CAM\n");
  827. }
  828. static int
  829. il_set_power(struct il_priv *il, struct il_powertable_cmd *cmd)
  830. {
  831. D_POWER("Sending power/sleep command\n");
  832. D_POWER("Flags value = 0x%08X\n", cmd->flags);
  833. D_POWER("Tx timeout = %u\n",
  834. le32_to_cpu(cmd->tx_data_timeout));
  835. D_POWER("Rx timeout = %u\n",
  836. le32_to_cpu(cmd->rx_data_timeout));
  837. D_POWER(
  838. "Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  839. le32_to_cpu(cmd->sleep_interval[0]),
  840. le32_to_cpu(cmd->sleep_interval[1]),
  841. le32_to_cpu(cmd->sleep_interval[2]),
  842. le32_to_cpu(cmd->sleep_interval[3]),
  843. le32_to_cpu(cmd->sleep_interval[4]));
  844. return il_send_cmd_pdu(il, C_POWER_TBL,
  845. sizeof(struct il_powertable_cmd), cmd);
  846. }
  847. int
  848. il_power_set_mode(struct il_priv *il, struct il_powertable_cmd *cmd,
  849. bool force)
  850. {
  851. int ret;
  852. bool update_chains;
  853. lockdep_assert_held(&il->mutex);
  854. /* Don't update the RX chain when chain noise calibration is running */
  855. update_chains = il->chain_noise_data.state == IL_CHAIN_NOISE_DONE ||
  856. il->chain_noise_data.state == IL_CHAIN_NOISE_ALIVE;
  857. if (!memcmp(&il->power_data.sleep_cmd, cmd, sizeof(*cmd)) && !force)
  858. return 0;
  859. if (!il_is_ready_rf(il))
  860. return -EIO;
  861. /* scan complete use sleep_power_next, need to be updated */
  862. memcpy(&il->power_data.sleep_cmd_next, cmd, sizeof(*cmd));
  863. if (test_bit(S_SCANNING, &il->status) && !force) {
  864. D_INFO("Defer power set mode while scanning\n");
  865. return 0;
  866. }
  867. if (cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK)
  868. set_bit(S_POWER_PMI, &il->status);
  869. ret = il_set_power(il, cmd);
  870. if (!ret) {
  871. if (!(cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK))
  872. clear_bit(S_POWER_PMI, &il->status);
  873. if (il->cfg->ops->lib->update_chain_flags && update_chains)
  874. il->cfg->ops->lib->update_chain_flags(il);
  875. else if (il->cfg->ops->lib->update_chain_flags)
  876. D_POWER(
  877. "Cannot update the power, chain noise "
  878. "calibration running: %d\n",
  879. il->chain_noise_data.state);
  880. memcpy(&il->power_data.sleep_cmd, cmd, sizeof(*cmd));
  881. } else
  882. IL_ERR("set power fail, ret = %d", ret);
  883. return ret;
  884. }
  885. int il_power_update_mode(struct il_priv *il, bool force)
  886. {
  887. struct il_powertable_cmd cmd;
  888. il_power_sleep_cam_cmd(il, &cmd);
  889. return il_power_set_mode(il, &cmd, force);
  890. }
  891. EXPORT_SYMBOL(il_power_update_mode);
  892. /* initialize to default */
  893. void il_power_initialize(struct il_priv *il)
  894. {
  895. u16 lctl = il_pcie_link_ctl(il);
  896. il->power_data.pci_pm = !(lctl & PCI_CFG_LINK_CTRL_VAL_L0S_EN);
  897. il->power_data.debug_sleep_level_override = -1;
  898. memset(&il->power_data.sleep_cmd, 0,
  899. sizeof(il->power_data.sleep_cmd));
  900. }
  901. EXPORT_SYMBOL(il_power_initialize);
  902. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  903. * sending probe req. This should be set long enough to hear probe responses
  904. * from more than one AP. */
  905. #define IL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
  906. #define IL_ACTIVE_DWELL_TIME_52 (20)
  907. #define IL_ACTIVE_DWELL_FACTOR_24GHZ (3)
  908. #define IL_ACTIVE_DWELL_FACTOR_52GHZ (2)
  909. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  910. * Must be set longer than active dwell time.
  911. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  912. #define IL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  913. #define IL_PASSIVE_DWELL_TIME_52 (10)
  914. #define IL_PASSIVE_DWELL_BASE (100)
  915. #define IL_CHANNEL_TUNE_TIME 5
  916. static int il_send_scan_abort(struct il_priv *il)
  917. {
  918. int ret;
  919. struct il_rx_pkt *pkt;
  920. struct il_host_cmd cmd = {
  921. .id = C_SCAN_ABORT,
  922. .flags = CMD_WANT_SKB,
  923. };
  924. /* Exit instantly with error when device is not ready
  925. * to receive scan abort command or it does not perform
  926. * hardware scan currently */
  927. if (!test_bit(S_READY, &il->status) ||
  928. !test_bit(S_GEO_CONFIGURED, &il->status) ||
  929. !test_bit(S_SCAN_HW, &il->status) ||
  930. test_bit(S_FW_ERROR, &il->status) ||
  931. test_bit(S_EXIT_PENDING, &il->status))
  932. return -EIO;
  933. ret = il_send_cmd_sync(il, &cmd);
  934. if (ret)
  935. return ret;
  936. pkt = (struct il_rx_pkt *)cmd.reply_page;
  937. if (pkt->u.status != CAN_ABORT_STATUS) {
  938. /* The scan abort will return 1 for success or
  939. * 2 for "failure". A failure condition can be
  940. * due to simply not being in an active scan which
  941. * can occur if we send the scan abort before we
  942. * the microcode has notified us that a scan is
  943. * completed. */
  944. D_SCAN("SCAN_ABORT ret %d.\n", pkt->u.status);
  945. ret = -EIO;
  946. }
  947. il_free_pages(il, cmd.reply_page);
  948. return ret;
  949. }
  950. static void il_complete_scan(struct il_priv *il, bool aborted)
  951. {
  952. /* check if scan was requested from mac80211 */
  953. if (il->scan_request) {
  954. D_SCAN("Complete scan in mac80211\n");
  955. ieee80211_scan_completed(il->hw, aborted);
  956. }
  957. il->scan_vif = NULL;
  958. il->scan_request = NULL;
  959. }
  960. void il_force_scan_end(struct il_priv *il)
  961. {
  962. lockdep_assert_held(&il->mutex);
  963. if (!test_bit(S_SCANNING, &il->status)) {
  964. D_SCAN("Forcing scan end while not scanning\n");
  965. return;
  966. }
  967. D_SCAN("Forcing scan end\n");
  968. clear_bit(S_SCANNING, &il->status);
  969. clear_bit(S_SCAN_HW, &il->status);
  970. clear_bit(S_SCAN_ABORTING, &il->status);
  971. il_complete_scan(il, true);
  972. }
  973. static void il_do_scan_abort(struct il_priv *il)
  974. {
  975. int ret;
  976. lockdep_assert_held(&il->mutex);
  977. if (!test_bit(S_SCANNING, &il->status)) {
  978. D_SCAN("Not performing scan to abort\n");
  979. return;
  980. }
  981. if (test_and_set_bit(S_SCAN_ABORTING, &il->status)) {
  982. D_SCAN("Scan abort in progress\n");
  983. return;
  984. }
  985. ret = il_send_scan_abort(il);
  986. if (ret) {
  987. D_SCAN("Send scan abort failed %d\n", ret);
  988. il_force_scan_end(il);
  989. } else
  990. D_SCAN("Successfully send scan abort\n");
  991. }
  992. /**
  993. * il_scan_cancel - Cancel any currently executing HW scan
  994. */
  995. int il_scan_cancel(struct il_priv *il)
  996. {
  997. D_SCAN("Queuing abort scan\n");
  998. queue_work(il->workqueue, &il->abort_scan);
  999. return 0;
  1000. }
  1001. EXPORT_SYMBOL(il_scan_cancel);
  1002. /**
  1003. * il_scan_cancel_timeout - Cancel any currently executing HW scan
  1004. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1005. *
  1006. */
  1007. int il_scan_cancel_timeout(struct il_priv *il, unsigned long ms)
  1008. {
  1009. unsigned long timeout = jiffies + msecs_to_jiffies(ms);
  1010. lockdep_assert_held(&il->mutex);
  1011. D_SCAN("Scan cancel timeout\n");
  1012. il_do_scan_abort(il);
  1013. while (time_before_eq(jiffies, timeout)) {
  1014. if (!test_bit(S_SCAN_HW, &il->status))
  1015. break;
  1016. msleep(20);
  1017. }
  1018. return test_bit(S_SCAN_HW, &il->status);
  1019. }
  1020. EXPORT_SYMBOL(il_scan_cancel_timeout);
  1021. /* Service response to C_SCAN (0x80) */
  1022. static void il_hdl_scan(struct il_priv *il,
  1023. struct il_rx_buf *rxb)
  1024. {
  1025. #ifdef CONFIG_IWLEGACY_DEBUG
  1026. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1027. struct il_scanreq_notification *notif =
  1028. (struct il_scanreq_notification *)pkt->u.raw;
  1029. D_SCAN("Scan request status = 0x%x\n", notif->status);
  1030. #endif
  1031. }
  1032. /* Service N_SCAN_START (0x82) */
  1033. static void il_hdl_scan_start(struct il_priv *il,
  1034. struct il_rx_buf *rxb)
  1035. {
  1036. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1037. struct il_scanstart_notification *notif =
  1038. (struct il_scanstart_notification *)pkt->u.raw;
  1039. il->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  1040. D_SCAN("Scan start: "
  1041. "%d [802.11%s] "
  1042. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  1043. notif->channel,
  1044. notif->band ? "bg" : "a",
  1045. le32_to_cpu(notif->tsf_high),
  1046. le32_to_cpu(notif->tsf_low),
  1047. notif->status, notif->beacon_timer);
  1048. }
  1049. /* Service N_SCAN_RESULTS (0x83) */
  1050. static void il_hdl_scan_results(struct il_priv *il,
  1051. struct il_rx_buf *rxb)
  1052. {
  1053. #ifdef CONFIG_IWLEGACY_DEBUG
  1054. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1055. struct il_scanresults_notification *notif =
  1056. (struct il_scanresults_notification *)pkt->u.raw;
  1057. D_SCAN("Scan ch.res: "
  1058. "%d [802.11%s] "
  1059. "(TSF: 0x%08X:%08X) - %d "
  1060. "elapsed=%lu usec\n",
  1061. notif->channel,
  1062. notif->band ? "bg" : "a",
  1063. le32_to_cpu(notif->tsf_high),
  1064. le32_to_cpu(notif->tsf_low),
  1065. le32_to_cpu(notif->stats[0]),
  1066. le32_to_cpu(notif->tsf_low) - il->scan_start_tsf);
  1067. #endif
  1068. }
  1069. /* Service N_SCAN_COMPLETE (0x84) */
  1070. static void il_hdl_scan_complete(struct il_priv *il,
  1071. struct il_rx_buf *rxb)
  1072. {
  1073. #ifdef CONFIG_IWLEGACY_DEBUG
  1074. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1075. struct il_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  1076. #endif
  1077. D_SCAN(
  1078. "Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  1079. scan_notif->scanned_channels,
  1080. scan_notif->tsf_low,
  1081. scan_notif->tsf_high, scan_notif->status);
  1082. /* The HW is no longer scanning */
  1083. clear_bit(S_SCAN_HW, &il->status);
  1084. D_SCAN("Scan on %sGHz took %dms\n",
  1085. (il->scan_band == IEEE80211_BAND_2GHZ) ? "2.4" : "5.2",
  1086. jiffies_to_msecs(jiffies - il->scan_start));
  1087. queue_work(il->workqueue, &il->scan_completed);
  1088. }
  1089. void il_setup_rx_scan_handlers(struct il_priv *il)
  1090. {
  1091. /* scan handlers */
  1092. il->handlers[C_SCAN] = il_hdl_scan;
  1093. il->handlers[N_SCAN_START] =
  1094. il_hdl_scan_start;
  1095. il->handlers[N_SCAN_RESULTS] =
  1096. il_hdl_scan_results;
  1097. il->handlers[N_SCAN_COMPLETE] =
  1098. il_hdl_scan_complete;
  1099. }
  1100. EXPORT_SYMBOL(il_setup_rx_scan_handlers);
  1101. inline u16 il_get_active_dwell_time(struct il_priv *il,
  1102. enum ieee80211_band band,
  1103. u8 n_probes)
  1104. {
  1105. if (band == IEEE80211_BAND_5GHZ)
  1106. return IL_ACTIVE_DWELL_TIME_52 +
  1107. IL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
  1108. else
  1109. return IL_ACTIVE_DWELL_TIME_24 +
  1110. IL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
  1111. }
  1112. EXPORT_SYMBOL(il_get_active_dwell_time);
  1113. u16 il_get_passive_dwell_time(struct il_priv *il,
  1114. enum ieee80211_band band,
  1115. struct ieee80211_vif *vif)
  1116. {
  1117. struct il_rxon_context *ctx = &il->ctx;
  1118. u16 value;
  1119. u16 passive = (band == IEEE80211_BAND_2GHZ) ?
  1120. IL_PASSIVE_DWELL_BASE + IL_PASSIVE_DWELL_TIME_24 :
  1121. IL_PASSIVE_DWELL_BASE + IL_PASSIVE_DWELL_TIME_52;
  1122. if (il_is_any_associated(il)) {
  1123. /*
  1124. * If we're associated, we clamp the maximum passive
  1125. * dwell time to be 98% of the smallest beacon interval
  1126. * (minus 2 * channel tune time)
  1127. */
  1128. value = ctx->vif ? ctx->vif->bss_conf.beacon_int : 0;
  1129. if (value > IL_PASSIVE_DWELL_BASE || !value)
  1130. value = IL_PASSIVE_DWELL_BASE;
  1131. value = (value * 98) / 100 - IL_CHANNEL_TUNE_TIME * 2;
  1132. passive = min(value, passive);
  1133. }
  1134. return passive;
  1135. }
  1136. EXPORT_SYMBOL(il_get_passive_dwell_time);
  1137. void il_init_scan_params(struct il_priv *il)
  1138. {
  1139. u8 ant_idx = fls(il->hw_params.valid_tx_ant) - 1;
  1140. if (!il->scan_tx_ant[IEEE80211_BAND_5GHZ])
  1141. il->scan_tx_ant[IEEE80211_BAND_5GHZ] = ant_idx;
  1142. if (!il->scan_tx_ant[IEEE80211_BAND_2GHZ])
  1143. il->scan_tx_ant[IEEE80211_BAND_2GHZ] = ant_idx;
  1144. }
  1145. EXPORT_SYMBOL(il_init_scan_params);
  1146. static int il_scan_initiate(struct il_priv *il,
  1147. struct ieee80211_vif *vif)
  1148. {
  1149. int ret;
  1150. lockdep_assert_held(&il->mutex);
  1151. if (WARN_ON(!il->cfg->ops->utils->request_scan))
  1152. return -EOPNOTSUPP;
  1153. cancel_delayed_work(&il->scan_check);
  1154. if (!il_is_ready_rf(il)) {
  1155. IL_WARN("Request scan called when driver not ready.\n");
  1156. return -EIO;
  1157. }
  1158. if (test_bit(S_SCAN_HW, &il->status)) {
  1159. D_SCAN(
  1160. "Multiple concurrent scan requests in parallel.\n");
  1161. return -EBUSY;
  1162. }
  1163. if (test_bit(S_SCAN_ABORTING, &il->status)) {
  1164. D_SCAN("Scan request while abort pending.\n");
  1165. return -EBUSY;
  1166. }
  1167. D_SCAN("Starting scan...\n");
  1168. set_bit(S_SCANNING, &il->status);
  1169. il->scan_start = jiffies;
  1170. ret = il->cfg->ops->utils->request_scan(il, vif);
  1171. if (ret) {
  1172. clear_bit(S_SCANNING, &il->status);
  1173. return ret;
  1174. }
  1175. queue_delayed_work(il->workqueue, &il->scan_check,
  1176. IL_SCAN_CHECK_WATCHDOG);
  1177. return 0;
  1178. }
  1179. int il_mac_hw_scan(struct ieee80211_hw *hw,
  1180. struct ieee80211_vif *vif,
  1181. struct cfg80211_scan_request *req)
  1182. {
  1183. struct il_priv *il = hw->priv;
  1184. int ret;
  1185. D_MAC80211("enter\n");
  1186. if (req->n_channels == 0)
  1187. return -EINVAL;
  1188. mutex_lock(&il->mutex);
  1189. if (test_bit(S_SCANNING, &il->status)) {
  1190. D_SCAN("Scan already in progress.\n");
  1191. ret = -EAGAIN;
  1192. goto out_unlock;
  1193. }
  1194. /* mac80211 will only ask for one band at a time */
  1195. il->scan_request = req;
  1196. il->scan_vif = vif;
  1197. il->scan_band = req->channels[0]->band;
  1198. ret = il_scan_initiate(il, vif);
  1199. D_MAC80211("leave\n");
  1200. out_unlock:
  1201. mutex_unlock(&il->mutex);
  1202. return ret;
  1203. }
  1204. EXPORT_SYMBOL(il_mac_hw_scan);
  1205. static void il_bg_scan_check(struct work_struct *data)
  1206. {
  1207. struct il_priv *il =
  1208. container_of(data, struct il_priv, scan_check.work);
  1209. D_SCAN("Scan check work\n");
  1210. /* Since we are here firmware does not finish scan and
  1211. * most likely is in bad shape, so we don't bother to
  1212. * send abort command, just force scan complete to mac80211 */
  1213. mutex_lock(&il->mutex);
  1214. il_force_scan_end(il);
  1215. mutex_unlock(&il->mutex);
  1216. }
  1217. /**
  1218. * il_fill_probe_req - fill in all required fields and IE for probe request
  1219. */
  1220. u16
  1221. il_fill_probe_req(struct il_priv *il, struct ieee80211_mgmt *frame,
  1222. const u8 *ta, const u8 *ies, int ie_len, int left)
  1223. {
  1224. int len = 0;
  1225. u8 *pos = NULL;
  1226. /* Make sure there is enough space for the probe request,
  1227. * two mandatory IEs and the data */
  1228. left -= 24;
  1229. if (left < 0)
  1230. return 0;
  1231. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1232. memcpy(frame->da, il_bcast_addr, ETH_ALEN);
  1233. memcpy(frame->sa, ta, ETH_ALEN);
  1234. memcpy(frame->bssid, il_bcast_addr, ETH_ALEN);
  1235. frame->seq_ctrl = 0;
  1236. len += 24;
  1237. /* ...next IE... */
  1238. pos = &frame->u.probe_req.variable[0];
  1239. /* fill in our indirect SSID IE */
  1240. left -= 2;
  1241. if (left < 0)
  1242. return 0;
  1243. *pos++ = WLAN_EID_SSID;
  1244. *pos++ = 0;
  1245. len += 2;
  1246. if (WARN_ON(left < ie_len))
  1247. return len;
  1248. if (ies && ie_len) {
  1249. memcpy(pos, ies, ie_len);
  1250. len += ie_len;
  1251. }
  1252. return (u16)len;
  1253. }
  1254. EXPORT_SYMBOL(il_fill_probe_req);
  1255. static void il_bg_abort_scan(struct work_struct *work)
  1256. {
  1257. struct il_priv *il = container_of(work, struct il_priv, abort_scan);
  1258. D_SCAN("Abort scan work\n");
  1259. /* We keep scan_check work queued in case when firmware will not
  1260. * report back scan completed notification */
  1261. mutex_lock(&il->mutex);
  1262. il_scan_cancel_timeout(il, 200);
  1263. mutex_unlock(&il->mutex);
  1264. }
  1265. static void il_bg_scan_completed(struct work_struct *work)
  1266. {
  1267. struct il_priv *il =
  1268. container_of(work, struct il_priv, scan_completed);
  1269. bool aborted;
  1270. D_SCAN("Completed scan.\n");
  1271. cancel_delayed_work(&il->scan_check);
  1272. mutex_lock(&il->mutex);
  1273. aborted = test_and_clear_bit(S_SCAN_ABORTING, &il->status);
  1274. if (aborted)
  1275. D_SCAN("Aborted scan completed.\n");
  1276. if (!test_and_clear_bit(S_SCANNING, &il->status)) {
  1277. D_SCAN("Scan already completed.\n");
  1278. goto out_settings;
  1279. }
  1280. il_complete_scan(il, aborted);
  1281. out_settings:
  1282. /* Can we still talk to firmware ? */
  1283. if (!il_is_ready_rf(il))
  1284. goto out;
  1285. /*
  1286. * We do not commit power settings while scan is pending,
  1287. * do it now if the settings changed.
  1288. */
  1289. il_power_set_mode(il, &il->power_data.sleep_cmd_next, false);
  1290. il_set_tx_power(il, il->tx_power_next, false);
  1291. il->cfg->ops->utils->post_scan(il);
  1292. out:
  1293. mutex_unlock(&il->mutex);
  1294. }
  1295. void il_setup_scan_deferred_work(struct il_priv *il)
  1296. {
  1297. INIT_WORK(&il->scan_completed, il_bg_scan_completed);
  1298. INIT_WORK(&il->abort_scan, il_bg_abort_scan);
  1299. INIT_DELAYED_WORK(&il->scan_check, il_bg_scan_check);
  1300. }
  1301. EXPORT_SYMBOL(il_setup_scan_deferred_work);
  1302. void il_cancel_scan_deferred_work(struct il_priv *il)
  1303. {
  1304. cancel_work_sync(&il->abort_scan);
  1305. cancel_work_sync(&il->scan_completed);
  1306. if (cancel_delayed_work_sync(&il->scan_check)) {
  1307. mutex_lock(&il->mutex);
  1308. il_force_scan_end(il);
  1309. mutex_unlock(&il->mutex);
  1310. }
  1311. }
  1312. EXPORT_SYMBOL(il_cancel_scan_deferred_work);
  1313. /* il->sta_lock must be held */
  1314. static void il_sta_ucode_activate(struct il_priv *il, u8 sta_id)
  1315. {
  1316. if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE))
  1317. IL_ERR(
  1318. "ACTIVATE a non DRIVER active station id %u addr %pM\n",
  1319. sta_id, il->stations[sta_id].sta.sta.addr);
  1320. if (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) {
  1321. D_ASSOC(
  1322. "STA id %u addr %pM already present"
  1323. " in uCode (according to driver)\n",
  1324. sta_id, il->stations[sta_id].sta.sta.addr);
  1325. } else {
  1326. il->stations[sta_id].used |= IL_STA_UCODE_ACTIVE;
  1327. D_ASSOC("Added STA id %u addr %pM to uCode\n",
  1328. sta_id, il->stations[sta_id].sta.sta.addr);
  1329. }
  1330. }
  1331. static int il_process_add_sta_resp(struct il_priv *il,
  1332. struct il_addsta_cmd *addsta,
  1333. struct il_rx_pkt *pkt,
  1334. bool sync)
  1335. {
  1336. u8 sta_id = addsta->sta.sta_id;
  1337. unsigned long flags;
  1338. int ret = -EIO;
  1339. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  1340. IL_ERR("Bad return from C_ADD_STA (0x%08X)\n",
  1341. pkt->hdr.flags);
  1342. return ret;
  1343. }
  1344. D_INFO("Processing response for adding station %u\n",
  1345. sta_id);
  1346. spin_lock_irqsave(&il->sta_lock, flags);
  1347. switch (pkt->u.add_sta.status) {
  1348. case ADD_STA_SUCCESS_MSK:
  1349. D_INFO("C_ADD_STA PASSED\n");
  1350. il_sta_ucode_activate(il, sta_id);
  1351. ret = 0;
  1352. break;
  1353. case ADD_STA_NO_ROOM_IN_TBL:
  1354. IL_ERR("Adding station %d failed, no room in table.\n",
  1355. sta_id);
  1356. break;
  1357. case ADD_STA_NO_BLOCK_ACK_RESOURCE:
  1358. IL_ERR(
  1359. "Adding station %d failed, no block ack resource.\n",
  1360. sta_id);
  1361. break;
  1362. case ADD_STA_MODIFY_NON_EXIST_STA:
  1363. IL_ERR("Attempting to modify non-existing station %d\n",
  1364. sta_id);
  1365. break;
  1366. default:
  1367. D_ASSOC("Received C_ADD_STA:(0x%08X)\n",
  1368. pkt->u.add_sta.status);
  1369. break;
  1370. }
  1371. D_INFO("%s station id %u addr %pM\n",
  1372. il->stations[sta_id].sta.mode ==
  1373. STA_CONTROL_MODIFY_MSK ? "Modified" : "Added",
  1374. sta_id, il->stations[sta_id].sta.sta.addr);
  1375. /*
  1376. * XXX: The MAC address in the command buffer is often changed from
  1377. * the original sent to the device. That is, the MAC address
  1378. * written to the command buffer often is not the same MAC address
  1379. * read from the command buffer when the command returns. This
  1380. * issue has not yet been resolved and this debugging is left to
  1381. * observe the problem.
  1382. */
  1383. D_INFO("%s station according to cmd buffer %pM\n",
  1384. il->stations[sta_id].sta.mode ==
  1385. STA_CONTROL_MODIFY_MSK ? "Modified" : "Added",
  1386. addsta->sta.addr);
  1387. spin_unlock_irqrestore(&il->sta_lock, flags);
  1388. return ret;
  1389. }
  1390. static void il_add_sta_callback(struct il_priv *il,
  1391. struct il_device_cmd *cmd,
  1392. struct il_rx_pkt *pkt)
  1393. {
  1394. struct il_addsta_cmd *addsta =
  1395. (struct il_addsta_cmd *)cmd->cmd.payload;
  1396. il_process_add_sta_resp(il, addsta, pkt, false);
  1397. }
  1398. int il_send_add_sta(struct il_priv *il,
  1399. struct il_addsta_cmd *sta, u8 flags)
  1400. {
  1401. struct il_rx_pkt *pkt = NULL;
  1402. int ret = 0;
  1403. u8 data[sizeof(*sta)];
  1404. struct il_host_cmd cmd = {
  1405. .id = C_ADD_STA,
  1406. .flags = flags,
  1407. .data = data,
  1408. };
  1409. u8 sta_id __maybe_unused = sta->sta.sta_id;
  1410. D_INFO("Adding sta %u (%pM) %ssynchronously\n",
  1411. sta_id, sta->sta.addr, flags & CMD_ASYNC ? "a" : "");
  1412. if (flags & CMD_ASYNC)
  1413. cmd.callback = il_add_sta_callback;
  1414. else {
  1415. cmd.flags |= CMD_WANT_SKB;
  1416. might_sleep();
  1417. }
  1418. cmd.len = il->cfg->ops->utils->build_addsta_hcmd(sta, data);
  1419. ret = il_send_cmd(il, &cmd);
  1420. if (ret || (flags & CMD_ASYNC))
  1421. return ret;
  1422. if (ret == 0) {
  1423. pkt = (struct il_rx_pkt *)cmd.reply_page;
  1424. ret = il_process_add_sta_resp(il, sta, pkt, true);
  1425. }
  1426. il_free_pages(il, cmd.reply_page);
  1427. return ret;
  1428. }
  1429. EXPORT_SYMBOL(il_send_add_sta);
  1430. static void il_set_ht_add_station(struct il_priv *il, u8 idx,
  1431. struct ieee80211_sta *sta,
  1432. struct il_rxon_context *ctx)
  1433. {
  1434. struct ieee80211_sta_ht_cap *sta_ht_inf = &sta->ht_cap;
  1435. __le32 sta_flags;
  1436. u8 mimo_ps_mode;
  1437. if (!sta || !sta_ht_inf->ht_supported)
  1438. goto done;
  1439. mimo_ps_mode = (sta_ht_inf->cap & IEEE80211_HT_CAP_SM_PS) >> 2;
  1440. D_ASSOC("spatial multiplexing power save mode: %s\n",
  1441. (mimo_ps_mode == WLAN_HT_CAP_SM_PS_STATIC) ?
  1442. "static" :
  1443. (mimo_ps_mode == WLAN_HT_CAP_SM_PS_DYNAMIC) ?
  1444. "dynamic" : "disabled");
  1445. sta_flags = il->stations[idx].sta.station_flags;
  1446. sta_flags &= ~(STA_FLG_RTS_MIMO_PROT_MSK | STA_FLG_MIMO_DIS_MSK);
  1447. switch (mimo_ps_mode) {
  1448. case WLAN_HT_CAP_SM_PS_STATIC:
  1449. sta_flags |= STA_FLG_MIMO_DIS_MSK;
  1450. break;
  1451. case WLAN_HT_CAP_SM_PS_DYNAMIC:
  1452. sta_flags |= STA_FLG_RTS_MIMO_PROT_MSK;
  1453. break;
  1454. case WLAN_HT_CAP_SM_PS_DISABLED:
  1455. break;
  1456. default:
  1457. IL_WARN("Invalid MIMO PS mode %d\n", mimo_ps_mode);
  1458. break;
  1459. }
  1460. sta_flags |= cpu_to_le32(
  1461. (u32)sta_ht_inf->ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS);
  1462. sta_flags |= cpu_to_le32(
  1463. (u32)sta_ht_inf->ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS);
  1464. if (il_is_ht40_tx_allowed(il, ctx, &sta->ht_cap))
  1465. sta_flags |= STA_FLG_HT40_EN_MSK;
  1466. else
  1467. sta_flags &= ~STA_FLG_HT40_EN_MSK;
  1468. il->stations[idx].sta.station_flags = sta_flags;
  1469. done:
  1470. return;
  1471. }
  1472. /**
  1473. * il_prep_station - Prepare station information for addition
  1474. *
  1475. * should be called with sta_lock held
  1476. */
  1477. u8 il_prep_station(struct il_priv *il, struct il_rxon_context *ctx,
  1478. const u8 *addr, bool is_ap, struct ieee80211_sta *sta)
  1479. {
  1480. struct il_station_entry *station;
  1481. int i;
  1482. u8 sta_id = IL_INVALID_STATION;
  1483. u16 rate;
  1484. if (is_ap)
  1485. sta_id = ctx->ap_sta_id;
  1486. else if (is_broadcast_ether_addr(addr))
  1487. sta_id = ctx->bcast_sta_id;
  1488. else
  1489. for (i = IL_STA_ID; i < il->hw_params.max_stations; i++) {
  1490. if (!compare_ether_addr(il->stations[i].sta.sta.addr,
  1491. addr)) {
  1492. sta_id = i;
  1493. break;
  1494. }
  1495. if (!il->stations[i].used &&
  1496. sta_id == IL_INVALID_STATION)
  1497. sta_id = i;
  1498. }
  1499. /*
  1500. * These two conditions have the same outcome, but keep them
  1501. * separate
  1502. */
  1503. if (unlikely(sta_id == IL_INVALID_STATION))
  1504. return sta_id;
  1505. /*
  1506. * uCode is not able to deal with multiple requests to add a
  1507. * station. Keep track if one is in progress so that we do not send
  1508. * another.
  1509. */
  1510. if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) {
  1511. D_INFO(
  1512. "STA %d already in process of being added.\n",
  1513. sta_id);
  1514. return sta_id;
  1515. }
  1516. if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) &&
  1517. (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) &&
  1518. !compare_ether_addr(il->stations[sta_id].sta.sta.addr, addr)) {
  1519. D_ASSOC(
  1520. "STA %d (%pM) already added, not adding again.\n",
  1521. sta_id, addr);
  1522. return sta_id;
  1523. }
  1524. station = &il->stations[sta_id];
  1525. station->used = IL_STA_DRIVER_ACTIVE;
  1526. D_ASSOC("Add STA to driver ID %d: %pM\n",
  1527. sta_id, addr);
  1528. il->num_stations++;
  1529. /* Set up the C_ADD_STA command to send to device */
  1530. memset(&station->sta, 0, sizeof(struct il_addsta_cmd));
  1531. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  1532. station->sta.mode = 0;
  1533. station->sta.sta.sta_id = sta_id;
  1534. station->sta.station_flags = ctx->station_flags;
  1535. station->ctxid = ctx->ctxid;
  1536. if (sta) {
  1537. struct il_station_priv_common *sta_priv;
  1538. sta_priv = (void *)sta->drv_priv;
  1539. sta_priv->ctx = ctx;
  1540. }
  1541. /*
  1542. * OK to call unconditionally, since local stations (IBSS BSSID
  1543. * STA and broadcast STA) pass in a NULL sta, and mac80211
  1544. * doesn't allow HT IBSS.
  1545. */
  1546. il_set_ht_add_station(il, sta_id, sta, ctx);
  1547. /* 3945 only */
  1548. rate = (il->band == IEEE80211_BAND_5GHZ) ?
  1549. RATE_6M_PLCP : RATE_1M_PLCP;
  1550. /* Turn on both antennas for the station... */
  1551. station->sta.rate_n_flags = cpu_to_le16(rate | RATE_MCS_ANT_AB_MSK);
  1552. return sta_id;
  1553. }
  1554. EXPORT_SYMBOL_GPL(il_prep_station);
  1555. #define STA_WAIT_TIMEOUT (HZ/2)
  1556. /**
  1557. * il_add_station_common -
  1558. */
  1559. int
  1560. il_add_station_common(struct il_priv *il,
  1561. struct il_rxon_context *ctx,
  1562. const u8 *addr, bool is_ap,
  1563. struct ieee80211_sta *sta, u8 *sta_id_r)
  1564. {
  1565. unsigned long flags_spin;
  1566. int ret = 0;
  1567. u8 sta_id;
  1568. struct il_addsta_cmd sta_cmd;
  1569. *sta_id_r = 0;
  1570. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1571. sta_id = il_prep_station(il, ctx, addr, is_ap, sta);
  1572. if (sta_id == IL_INVALID_STATION) {
  1573. IL_ERR("Unable to prepare station %pM for addition\n",
  1574. addr);
  1575. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1576. return -EINVAL;
  1577. }
  1578. /*
  1579. * uCode is not able to deal with multiple requests to add a
  1580. * station. Keep track if one is in progress so that we do not send
  1581. * another.
  1582. */
  1583. if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) {
  1584. D_INFO(
  1585. "STA %d already in process of being added.\n",
  1586. sta_id);
  1587. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1588. return -EEXIST;
  1589. }
  1590. if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) &&
  1591. (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) {
  1592. D_ASSOC(
  1593. "STA %d (%pM) already added, not adding again.\n",
  1594. sta_id, addr);
  1595. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1596. return -EEXIST;
  1597. }
  1598. il->stations[sta_id].used |= IL_STA_UCODE_INPROGRESS;
  1599. memcpy(&sta_cmd, &il->stations[sta_id].sta,
  1600. sizeof(struct il_addsta_cmd));
  1601. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1602. /* Add station to device's station table */
  1603. ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC);
  1604. if (ret) {
  1605. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1606. IL_ERR("Adding station %pM failed.\n",
  1607. il->stations[sta_id].sta.sta.addr);
  1608. il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE;
  1609. il->stations[sta_id].used &= ~IL_STA_UCODE_INPROGRESS;
  1610. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1611. }
  1612. *sta_id_r = sta_id;
  1613. return ret;
  1614. }
  1615. EXPORT_SYMBOL(il_add_station_common);
  1616. /**
  1617. * il_sta_ucode_deactivate - deactivate ucode status for a station
  1618. *
  1619. * il->sta_lock must be held
  1620. */
  1621. static void il_sta_ucode_deactivate(struct il_priv *il, u8 sta_id)
  1622. {
  1623. /* Ucode must be active and driver must be non active */
  1624. if ((il->stations[sta_id].used &
  1625. (IL_STA_UCODE_ACTIVE | IL_STA_DRIVER_ACTIVE)) !=
  1626. IL_STA_UCODE_ACTIVE)
  1627. IL_ERR("removed non active STA %u\n", sta_id);
  1628. il->stations[sta_id].used &= ~IL_STA_UCODE_ACTIVE;
  1629. memset(&il->stations[sta_id], 0, sizeof(struct il_station_entry));
  1630. D_ASSOC("Removed STA %u\n", sta_id);
  1631. }
  1632. static int il_send_remove_station(struct il_priv *il,
  1633. const u8 *addr, int sta_id,
  1634. bool temporary)
  1635. {
  1636. struct il_rx_pkt *pkt;
  1637. int ret;
  1638. unsigned long flags_spin;
  1639. struct il_rem_sta_cmd rm_sta_cmd;
  1640. struct il_host_cmd cmd = {
  1641. .id = C_REM_STA,
  1642. .len = sizeof(struct il_rem_sta_cmd),
  1643. .flags = CMD_SYNC,
  1644. .data = &rm_sta_cmd,
  1645. };
  1646. memset(&rm_sta_cmd, 0, sizeof(rm_sta_cmd));
  1647. rm_sta_cmd.num_sta = 1;
  1648. memcpy(&rm_sta_cmd.addr, addr, ETH_ALEN);
  1649. cmd.flags |= CMD_WANT_SKB;
  1650. ret = il_send_cmd(il, &cmd);
  1651. if (ret)
  1652. return ret;
  1653. pkt = (struct il_rx_pkt *)cmd.reply_page;
  1654. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  1655. IL_ERR("Bad return from C_REM_STA (0x%08X)\n",
  1656. pkt->hdr.flags);
  1657. ret = -EIO;
  1658. }
  1659. if (!ret) {
  1660. switch (pkt->u.rem_sta.status) {
  1661. case REM_STA_SUCCESS_MSK:
  1662. if (!temporary) {
  1663. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1664. il_sta_ucode_deactivate(il, sta_id);
  1665. spin_unlock_irqrestore(&il->sta_lock,
  1666. flags_spin);
  1667. }
  1668. D_ASSOC("C_REM_STA PASSED\n");
  1669. break;
  1670. default:
  1671. ret = -EIO;
  1672. IL_ERR("C_REM_STA failed\n");
  1673. break;
  1674. }
  1675. }
  1676. il_free_pages(il, cmd.reply_page);
  1677. return ret;
  1678. }
  1679. /**
  1680. * il_remove_station - Remove driver's knowledge of station.
  1681. */
  1682. int il_remove_station(struct il_priv *il, const u8 sta_id,
  1683. const u8 *addr)
  1684. {
  1685. unsigned long flags;
  1686. if (!il_is_ready(il)) {
  1687. D_INFO(
  1688. "Unable to remove station %pM, device not ready.\n",
  1689. addr);
  1690. /*
  1691. * It is typical for stations to be removed when we are
  1692. * going down. Return success since device will be down
  1693. * soon anyway
  1694. */
  1695. return 0;
  1696. }
  1697. D_ASSOC("Removing STA from driver:%d %pM\n",
  1698. sta_id, addr);
  1699. if (WARN_ON(sta_id == IL_INVALID_STATION))
  1700. return -EINVAL;
  1701. spin_lock_irqsave(&il->sta_lock, flags);
  1702. if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE)) {
  1703. D_INFO("Removing %pM but non DRIVER active\n",
  1704. addr);
  1705. goto out_err;
  1706. }
  1707. if (!(il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) {
  1708. D_INFO("Removing %pM but non UCODE active\n",
  1709. addr);
  1710. goto out_err;
  1711. }
  1712. if (il->stations[sta_id].used & IL_STA_LOCAL) {
  1713. kfree(il->stations[sta_id].lq);
  1714. il->stations[sta_id].lq = NULL;
  1715. }
  1716. il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE;
  1717. il->num_stations--;
  1718. BUG_ON(il->num_stations < 0);
  1719. spin_unlock_irqrestore(&il->sta_lock, flags);
  1720. return il_send_remove_station(il, addr, sta_id, false);
  1721. out_err:
  1722. spin_unlock_irqrestore(&il->sta_lock, flags);
  1723. return -EINVAL;
  1724. }
  1725. EXPORT_SYMBOL_GPL(il_remove_station);
  1726. /**
  1727. * il_clear_ucode_stations - clear ucode station table bits
  1728. *
  1729. * This function clears all the bits in the driver indicating
  1730. * which stations are active in the ucode. Call when something
  1731. * other than explicit station management would cause this in
  1732. * the ucode, e.g. unassociated RXON.
  1733. */
  1734. void il_clear_ucode_stations(struct il_priv *il,
  1735. struct il_rxon_context *ctx)
  1736. {
  1737. int i;
  1738. unsigned long flags_spin;
  1739. bool cleared = false;
  1740. D_INFO("Clearing ucode stations in driver\n");
  1741. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1742. for (i = 0; i < il->hw_params.max_stations; i++) {
  1743. if (ctx && ctx->ctxid != il->stations[i].ctxid)
  1744. continue;
  1745. if (il->stations[i].used & IL_STA_UCODE_ACTIVE) {
  1746. D_INFO(
  1747. "Clearing ucode active for station %d\n", i);
  1748. il->stations[i].used &= ~IL_STA_UCODE_ACTIVE;
  1749. cleared = true;
  1750. }
  1751. }
  1752. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1753. if (!cleared)
  1754. D_INFO(
  1755. "No active stations found to be cleared\n");
  1756. }
  1757. EXPORT_SYMBOL(il_clear_ucode_stations);
  1758. /**
  1759. * il_restore_stations() - Restore driver known stations to device
  1760. *
  1761. * All stations considered active by driver, but not present in ucode, is
  1762. * restored.
  1763. *
  1764. * Function sleeps.
  1765. */
  1766. void
  1767. il_restore_stations(struct il_priv *il, struct il_rxon_context *ctx)
  1768. {
  1769. struct il_addsta_cmd sta_cmd;
  1770. struct il_link_quality_cmd lq;
  1771. unsigned long flags_spin;
  1772. int i;
  1773. bool found = false;
  1774. int ret;
  1775. bool send_lq;
  1776. if (!il_is_ready(il)) {
  1777. D_INFO(
  1778. "Not ready yet, not restoring any stations.\n");
  1779. return;
  1780. }
  1781. D_ASSOC("Restoring all known stations ... start.\n");
  1782. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1783. for (i = 0; i < il->hw_params.max_stations; i++) {
  1784. if (ctx->ctxid != il->stations[i].ctxid)
  1785. continue;
  1786. if ((il->stations[i].used & IL_STA_DRIVER_ACTIVE) &&
  1787. !(il->stations[i].used & IL_STA_UCODE_ACTIVE)) {
  1788. D_ASSOC("Restoring sta %pM\n",
  1789. il->stations[i].sta.sta.addr);
  1790. il->stations[i].sta.mode = 0;
  1791. il->stations[i].used |= IL_STA_UCODE_INPROGRESS;
  1792. found = true;
  1793. }
  1794. }
  1795. for (i = 0; i < il->hw_params.max_stations; i++) {
  1796. if ((il->stations[i].used & IL_STA_UCODE_INPROGRESS)) {
  1797. memcpy(&sta_cmd, &il->stations[i].sta,
  1798. sizeof(struct il_addsta_cmd));
  1799. send_lq = false;
  1800. if (il->stations[i].lq) {
  1801. memcpy(&lq, il->stations[i].lq,
  1802. sizeof(struct il_link_quality_cmd));
  1803. send_lq = true;
  1804. }
  1805. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1806. ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC);
  1807. if (ret) {
  1808. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1809. IL_ERR("Adding station %pM failed.\n",
  1810. il->stations[i].sta.sta.addr);
  1811. il->stations[i].used &=
  1812. ~IL_STA_DRIVER_ACTIVE;
  1813. il->stations[i].used &=
  1814. ~IL_STA_UCODE_INPROGRESS;
  1815. spin_unlock_irqrestore(&il->sta_lock,
  1816. flags_spin);
  1817. }
  1818. /*
  1819. * Rate scaling has already been initialized, send
  1820. * current LQ command
  1821. */
  1822. if (send_lq)
  1823. il_send_lq_cmd(il, ctx, &lq,
  1824. CMD_SYNC, true);
  1825. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1826. il->stations[i].used &= ~IL_STA_UCODE_INPROGRESS;
  1827. }
  1828. }
  1829. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1830. if (!found)
  1831. D_INFO("Restoring all known stations"
  1832. " .... no stations to be restored.\n");
  1833. else
  1834. D_INFO("Restoring all known stations"
  1835. " .... complete.\n");
  1836. }
  1837. EXPORT_SYMBOL(il_restore_stations);
  1838. int il_get_free_ucode_key_idx(struct il_priv *il)
  1839. {
  1840. int i;
  1841. for (i = 0; i < il->sta_key_max_num; i++)
  1842. if (!test_and_set_bit(i, &il->ucode_key_table))
  1843. return i;
  1844. return WEP_INVALID_OFFSET;
  1845. }
  1846. EXPORT_SYMBOL(il_get_free_ucode_key_idx);
  1847. void il_dealloc_bcast_stations(struct il_priv *il)
  1848. {
  1849. unsigned long flags;
  1850. int i;
  1851. spin_lock_irqsave(&il->sta_lock, flags);
  1852. for (i = 0; i < il->hw_params.max_stations; i++) {
  1853. if (!(il->stations[i].used & IL_STA_BCAST))
  1854. continue;
  1855. il->stations[i].used &= ~IL_STA_UCODE_ACTIVE;
  1856. il->num_stations--;
  1857. BUG_ON(il->num_stations < 0);
  1858. kfree(il->stations[i].lq);
  1859. il->stations[i].lq = NULL;
  1860. }
  1861. spin_unlock_irqrestore(&il->sta_lock, flags);
  1862. }
  1863. EXPORT_SYMBOL_GPL(il_dealloc_bcast_stations);
  1864. #ifdef CONFIG_IWLEGACY_DEBUG
  1865. static void il_dump_lq_cmd(struct il_priv *il,
  1866. struct il_link_quality_cmd *lq)
  1867. {
  1868. int i;
  1869. D_RATE("lq station id 0x%x\n", lq->sta_id);
  1870. D_RATE("lq ant 0x%X 0x%X\n",
  1871. lq->general_params.single_stream_ant_msk,
  1872. lq->general_params.dual_stream_ant_msk);
  1873. for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++)
  1874. D_RATE("lq idx %d 0x%X\n",
  1875. i, lq->rs_table[i].rate_n_flags);
  1876. }
  1877. #else
  1878. static inline void il_dump_lq_cmd(struct il_priv *il,
  1879. struct il_link_quality_cmd *lq)
  1880. {
  1881. }
  1882. #endif
  1883. /**
  1884. * il_is_lq_table_valid() - Test one aspect of LQ cmd for validity
  1885. *
  1886. * It sometimes happens when a HT rate has been in use and we
  1887. * loose connectivity with AP then mac80211 will first tell us that the
  1888. * current channel is not HT anymore before removing the station. In such a
  1889. * scenario the RXON flags will be updated to indicate we are not
  1890. * communicating HT anymore, but the LQ command may still contain HT rates.
  1891. * Test for this to prevent driver from sending LQ command between the time
  1892. * RXON flags are updated and when LQ command is updated.
  1893. */
  1894. static bool il_is_lq_table_valid(struct il_priv *il,
  1895. struct il_rxon_context *ctx,
  1896. struct il_link_quality_cmd *lq)
  1897. {
  1898. int i;
  1899. if (ctx->ht.enabled)
  1900. return true;
  1901. D_INFO("Channel %u is not an HT channel\n",
  1902. ctx->active.channel);
  1903. for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
  1904. if (le32_to_cpu(lq->rs_table[i].rate_n_flags) &
  1905. RATE_MCS_HT_MSK) {
  1906. D_INFO(
  1907. "idx %d of LQ expects HT channel\n",
  1908. i);
  1909. return false;
  1910. }
  1911. }
  1912. return true;
  1913. }
  1914. /**
  1915. * il_send_lq_cmd() - Send link quality command
  1916. * @init: This command is sent as part of station initialization right
  1917. * after station has been added.
  1918. *
  1919. * The link quality command is sent as the last step of station creation.
  1920. * This is the special case in which init is set and we call a callback in
  1921. * this case to clear the state indicating that station creation is in
  1922. * progress.
  1923. */
  1924. int il_send_lq_cmd(struct il_priv *il, struct il_rxon_context *ctx,
  1925. struct il_link_quality_cmd *lq, u8 flags, bool init)
  1926. {
  1927. int ret = 0;
  1928. unsigned long flags_spin;
  1929. struct il_host_cmd cmd = {
  1930. .id = C_TX_LINK_QUALITY_CMD,
  1931. .len = sizeof(struct il_link_quality_cmd),
  1932. .flags = flags,
  1933. .data = lq,
  1934. };
  1935. if (WARN_ON(lq->sta_id == IL_INVALID_STATION))
  1936. return -EINVAL;
  1937. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1938. if (!(il->stations[lq->sta_id].used & IL_STA_DRIVER_ACTIVE)) {
  1939. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1940. return -EINVAL;
  1941. }
  1942. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1943. il_dump_lq_cmd(il, lq);
  1944. BUG_ON(init && (cmd.flags & CMD_ASYNC));
  1945. if (il_is_lq_table_valid(il, ctx, lq))
  1946. ret = il_send_cmd(il, &cmd);
  1947. else
  1948. ret = -EINVAL;
  1949. if (cmd.flags & CMD_ASYNC)
  1950. return ret;
  1951. if (init) {
  1952. D_INFO("init LQ command complete,"
  1953. " clearing sta addition status for sta %d\n",
  1954. lq->sta_id);
  1955. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1956. il->stations[lq->sta_id].used &= ~IL_STA_UCODE_INPROGRESS;
  1957. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1958. }
  1959. return ret;
  1960. }
  1961. EXPORT_SYMBOL(il_send_lq_cmd);
  1962. int il_mac_sta_remove(struct ieee80211_hw *hw,
  1963. struct ieee80211_vif *vif,
  1964. struct ieee80211_sta *sta)
  1965. {
  1966. struct il_priv *il = hw->priv;
  1967. struct il_station_priv_common *sta_common = (void *)sta->drv_priv;
  1968. int ret;
  1969. D_INFO("received request to remove station %pM\n",
  1970. sta->addr);
  1971. mutex_lock(&il->mutex);
  1972. D_INFO("proceeding to remove station %pM\n",
  1973. sta->addr);
  1974. ret = il_remove_station(il, sta_common->sta_id, sta->addr);
  1975. if (ret)
  1976. IL_ERR("Error removing station %pM\n",
  1977. sta->addr);
  1978. mutex_unlock(&il->mutex);
  1979. return ret;
  1980. }
  1981. EXPORT_SYMBOL(il_mac_sta_remove);
  1982. /************************** RX-FUNCTIONS ****************************/
  1983. /*
  1984. * Rx theory of operation
  1985. *
  1986. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  1987. * each of which point to Receive Buffers to be filled by the NIC. These get
  1988. * used not only for Rx frames, but for any command response or notification
  1989. * from the NIC. The driver and NIC manage the Rx buffers by means
  1990. * of idxes into the circular buffer.
  1991. *
  1992. * Rx Queue Indexes
  1993. * The host/firmware share two idx registers for managing the Rx buffers.
  1994. *
  1995. * The READ idx maps to the first position that the firmware may be writing
  1996. * to -- the driver can read up to (but not including) this position and get
  1997. * good data.
  1998. * The READ idx is managed by the firmware once the card is enabled.
  1999. *
  2000. * The WRITE idx maps to the last position the driver has read from -- the
  2001. * position preceding WRITE is the last slot the firmware can place a packet.
  2002. *
  2003. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  2004. * WRITE = READ.
  2005. *
  2006. * During initialization, the host sets up the READ queue position to the first
  2007. * IDX position, and WRITE to the last (READ - 1 wrapped)
  2008. *
  2009. * When the firmware places a packet in a buffer, it will advance the READ idx
  2010. * and fire the RX interrupt. The driver can then query the READ idx and
  2011. * process as many packets as possible, moving the WRITE idx forward as it
  2012. * resets the Rx queue buffers with new memory.
  2013. *
  2014. * The management in the driver is as follows:
  2015. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  2016. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  2017. * to replenish the iwl->rxq->rx_free.
  2018. * + In il_rx_replenish (scheduled) if 'processed' != 'read' then the
  2019. * iwl->rxq is replenished and the READ IDX is updated (updating the
  2020. * 'processed' and 'read' driver idxes as well)
  2021. * + A received packet is processed and handed to the kernel network stack,
  2022. * detached from the iwl->rxq. The driver 'processed' idx is updated.
  2023. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  2024. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  2025. * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
  2026. * were enough free buffers and RX_STALLED is set it is cleared.
  2027. *
  2028. *
  2029. * Driver sequence:
  2030. *
  2031. * il_rx_queue_alloc() Allocates rx_free
  2032. * il_rx_replenish() Replenishes rx_free list from rx_used, and calls
  2033. * il_rx_queue_restock
  2034. * il_rx_queue_restock() Moves available buffers from rx_free into Rx
  2035. * queue, updates firmware pointers, and updates
  2036. * the WRITE idx. If insufficient rx_free buffers
  2037. * are available, schedules il_rx_replenish
  2038. *
  2039. * -- enable interrupts --
  2040. * ISR - il_rx() Detach il_rx_bufs from pool up to the
  2041. * READ IDX, detaching the SKB from the pool.
  2042. * Moves the packet buffer from queue to rx_used.
  2043. * Calls il_rx_queue_restock to refill any empty
  2044. * slots.
  2045. * ...
  2046. *
  2047. */
  2048. /**
  2049. * il_rx_queue_space - Return number of free slots available in queue.
  2050. */
  2051. int il_rx_queue_space(const struct il_rx_queue *q)
  2052. {
  2053. int s = q->read - q->write;
  2054. if (s <= 0)
  2055. s += RX_QUEUE_SIZE;
  2056. /* keep some buffer to not confuse full and empty queue */
  2057. s -= 2;
  2058. if (s < 0)
  2059. s = 0;
  2060. return s;
  2061. }
  2062. EXPORT_SYMBOL(il_rx_queue_space);
  2063. /**
  2064. * il_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  2065. */
  2066. void
  2067. il_rx_queue_update_write_ptr(struct il_priv *il,
  2068. struct il_rx_queue *q)
  2069. {
  2070. unsigned long flags;
  2071. u32 rx_wrt_ptr_reg = il->hw_params.rx_wrt_ptr_reg;
  2072. u32 reg;
  2073. spin_lock_irqsave(&q->lock, flags);
  2074. if (q->need_update == 0)
  2075. goto exit_unlock;
  2076. /* If power-saving is in use, make sure device is awake */
  2077. if (test_bit(S_POWER_PMI, &il->status)) {
  2078. reg = _il_rd(il, CSR_UCODE_DRV_GP1);
  2079. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  2080. D_INFO(
  2081. "Rx queue requesting wakeup,"
  2082. " GP1 = 0x%x\n", reg);
  2083. il_set_bit(il, CSR_GP_CNTRL,
  2084. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  2085. goto exit_unlock;
  2086. }
  2087. q->write_actual = (q->write & ~0x7);
  2088. il_wr(il, rx_wrt_ptr_reg,
  2089. q->write_actual);
  2090. /* Else device is assumed to be awake */
  2091. } else {
  2092. /* Device expects a multiple of 8 */
  2093. q->write_actual = (q->write & ~0x7);
  2094. il_wr(il, rx_wrt_ptr_reg,
  2095. q->write_actual);
  2096. }
  2097. q->need_update = 0;
  2098. exit_unlock:
  2099. spin_unlock_irqrestore(&q->lock, flags);
  2100. }
  2101. EXPORT_SYMBOL(il_rx_queue_update_write_ptr);
  2102. int il_rx_queue_alloc(struct il_priv *il)
  2103. {
  2104. struct il_rx_queue *rxq = &il->rxq;
  2105. struct device *dev = &il->pci_dev->dev;
  2106. int i;
  2107. spin_lock_init(&rxq->lock);
  2108. INIT_LIST_HEAD(&rxq->rx_free);
  2109. INIT_LIST_HEAD(&rxq->rx_used);
  2110. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  2111. rxq->bd = dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->bd_dma,
  2112. GFP_KERNEL);
  2113. if (!rxq->bd)
  2114. goto err_bd;
  2115. rxq->rb_stts = dma_alloc_coherent(dev, sizeof(struct il_rb_status),
  2116. &rxq->rb_stts_dma, GFP_KERNEL);
  2117. if (!rxq->rb_stts)
  2118. goto err_rb;
  2119. /* Fill the rx_used queue with _all_ of the Rx buffers */
  2120. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  2121. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  2122. /* Set us so that we have processed and used all buffers, but have
  2123. * not restocked the Rx queue with fresh buffers */
  2124. rxq->read = rxq->write = 0;
  2125. rxq->write_actual = 0;
  2126. rxq->free_count = 0;
  2127. rxq->need_update = 0;
  2128. return 0;
  2129. err_rb:
  2130. dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  2131. rxq->bd_dma);
  2132. err_bd:
  2133. return -ENOMEM;
  2134. }
  2135. EXPORT_SYMBOL(il_rx_queue_alloc);
  2136. void il_hdl_spectrum_measurement(struct il_priv *il,
  2137. struct il_rx_buf *rxb)
  2138. {
  2139. struct il_rx_pkt *pkt = rxb_addr(rxb);
  2140. struct il_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2141. if (!report->state) {
  2142. D_11H(
  2143. "Spectrum Measure Notification: Start\n");
  2144. return;
  2145. }
  2146. memcpy(&il->measure_report, report, sizeof(*report));
  2147. il->measurement_status |= MEASUREMENT_READY;
  2148. }
  2149. EXPORT_SYMBOL(il_hdl_spectrum_measurement);
  2150. /*
  2151. * returns non-zero if packet should be dropped
  2152. */
  2153. int il_set_decrypted_flag(struct il_priv *il,
  2154. struct ieee80211_hdr *hdr,
  2155. u32 decrypt_res,
  2156. struct ieee80211_rx_status *stats)
  2157. {
  2158. u16 fc = le16_to_cpu(hdr->frame_control);
  2159. /*
  2160. * All contexts have the same setting here due to it being
  2161. * a module parameter, so OK to check any context.
  2162. */
  2163. if (il->ctx.active.filter_flags &
  2164. RXON_FILTER_DIS_DECRYPT_MSK)
  2165. return 0;
  2166. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2167. return 0;
  2168. D_RX("decrypt_res:0x%x\n", decrypt_res);
  2169. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2170. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2171. /* The uCode has got a bad phase 1 Key, pushes the packet.
  2172. * Decryption will be done in SW. */
  2173. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2174. RX_RES_STATUS_BAD_KEY_TTAK)
  2175. break;
  2176. case RX_RES_STATUS_SEC_TYPE_WEP:
  2177. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2178. RX_RES_STATUS_BAD_ICV_MIC) {
  2179. /* bad ICV, the packet is destroyed since the
  2180. * decryption is inplace, drop it */
  2181. D_RX("Packet destroyed\n");
  2182. return -1;
  2183. }
  2184. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2185. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2186. RX_RES_STATUS_DECRYPT_OK) {
  2187. D_RX("hw decrypt successfully!!!\n");
  2188. stats->flag |= RX_FLAG_DECRYPTED;
  2189. }
  2190. break;
  2191. default:
  2192. break;
  2193. }
  2194. return 0;
  2195. }
  2196. EXPORT_SYMBOL(il_set_decrypted_flag);
  2197. /**
  2198. * il_txq_update_write_ptr - Send new write idx to hardware
  2199. */
  2200. void
  2201. il_txq_update_write_ptr(struct il_priv *il, struct il_tx_queue *txq)
  2202. {
  2203. u32 reg = 0;
  2204. int txq_id = txq->q.id;
  2205. if (txq->need_update == 0)
  2206. return;
  2207. /* if we're trying to save power */
  2208. if (test_bit(S_POWER_PMI, &il->status)) {
  2209. /* wake up nic if it's powered down ...
  2210. * uCode will wake up, and interrupt us again, so next
  2211. * time we'll skip this part. */
  2212. reg = _il_rd(il, CSR_UCODE_DRV_GP1);
  2213. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  2214. D_INFO(
  2215. "Tx queue %d requesting wakeup,"
  2216. " GP1 = 0x%x\n", txq_id, reg);
  2217. il_set_bit(il, CSR_GP_CNTRL,
  2218. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  2219. return;
  2220. }
  2221. il_wr(il, HBUS_TARG_WRPTR,
  2222. txq->q.write_ptr | (txq_id << 8));
  2223. /*
  2224. * else not in power-save mode,
  2225. * uCode will never sleep when we're
  2226. * trying to tx (during RFKILL, we're not trying to tx).
  2227. */
  2228. } else
  2229. _il_wr(il, HBUS_TARG_WRPTR,
  2230. txq->q.write_ptr | (txq_id << 8));
  2231. txq->need_update = 0;
  2232. }
  2233. EXPORT_SYMBOL(il_txq_update_write_ptr);
  2234. /**
  2235. * il_tx_queue_unmap - Unmap any remaining DMA mappings and free skb's
  2236. */
  2237. void il_tx_queue_unmap(struct il_priv *il, int txq_id)
  2238. {
  2239. struct il_tx_queue *txq = &il->txq[txq_id];
  2240. struct il_queue *q = &txq->q;
  2241. if (q->n_bd == 0)
  2242. return;
  2243. while (q->write_ptr != q->read_ptr) {
  2244. il->cfg->ops->lib->txq_free_tfd(il, txq);
  2245. q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd);
  2246. }
  2247. }
  2248. EXPORT_SYMBOL(il_tx_queue_unmap);
  2249. /**
  2250. * il_tx_queue_free - Deallocate DMA queue.
  2251. * @txq: Transmit queue to deallocate.
  2252. *
  2253. * Empty queue by removing and destroying all BD's.
  2254. * Free all buffers.
  2255. * 0-fill, but do not free "txq" descriptor structure.
  2256. */
  2257. void il_tx_queue_free(struct il_priv *il, int txq_id)
  2258. {
  2259. struct il_tx_queue *txq = &il->txq[txq_id];
  2260. struct device *dev = &il->pci_dev->dev;
  2261. int i;
  2262. il_tx_queue_unmap(il, txq_id);
  2263. /* De-alloc array of command/tx buffers */
  2264. for (i = 0; i < TFD_TX_CMD_SLOTS; i++)
  2265. kfree(txq->cmd[i]);
  2266. /* De-alloc circular buffer of TFDs */
  2267. if (txq->q.n_bd)
  2268. dma_free_coherent(dev, il->hw_params.tfd_size *
  2269. txq->q.n_bd, txq->tfds, txq->q.dma_addr);
  2270. /* De-alloc array of per-TFD driver data */
  2271. kfree(txq->txb);
  2272. txq->txb = NULL;
  2273. /* deallocate arrays */
  2274. kfree(txq->cmd);
  2275. kfree(txq->meta);
  2276. txq->cmd = NULL;
  2277. txq->meta = NULL;
  2278. /* 0-fill queue descriptor structure */
  2279. memset(txq, 0, sizeof(*txq));
  2280. }
  2281. EXPORT_SYMBOL(il_tx_queue_free);
  2282. /**
  2283. * il_cmd_queue_unmap - Unmap any remaining DMA mappings from command queue
  2284. */
  2285. void il_cmd_queue_unmap(struct il_priv *il)
  2286. {
  2287. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2288. struct il_queue *q = &txq->q;
  2289. int i;
  2290. if (q->n_bd == 0)
  2291. return;
  2292. while (q->read_ptr != q->write_ptr) {
  2293. i = il_get_cmd_idx(q, q->read_ptr, 0);
  2294. if (txq->meta[i].flags & CMD_MAPPED) {
  2295. pci_unmap_single(il->pci_dev,
  2296. dma_unmap_addr(&txq->meta[i], mapping),
  2297. dma_unmap_len(&txq->meta[i], len),
  2298. PCI_DMA_BIDIRECTIONAL);
  2299. txq->meta[i].flags = 0;
  2300. }
  2301. q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd);
  2302. }
  2303. i = q->n_win;
  2304. if (txq->meta[i].flags & CMD_MAPPED) {
  2305. pci_unmap_single(il->pci_dev,
  2306. dma_unmap_addr(&txq->meta[i], mapping),
  2307. dma_unmap_len(&txq->meta[i], len),
  2308. PCI_DMA_BIDIRECTIONAL);
  2309. txq->meta[i].flags = 0;
  2310. }
  2311. }
  2312. EXPORT_SYMBOL(il_cmd_queue_unmap);
  2313. /**
  2314. * il_cmd_queue_free - Deallocate DMA queue.
  2315. * @txq: Transmit queue to deallocate.
  2316. *
  2317. * Empty queue by removing and destroying all BD's.
  2318. * Free all buffers.
  2319. * 0-fill, but do not free "txq" descriptor structure.
  2320. */
  2321. void il_cmd_queue_free(struct il_priv *il)
  2322. {
  2323. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2324. struct device *dev = &il->pci_dev->dev;
  2325. int i;
  2326. il_cmd_queue_unmap(il);
  2327. /* De-alloc array of command/tx buffers */
  2328. for (i = 0; i <= TFD_CMD_SLOTS; i++)
  2329. kfree(txq->cmd[i]);
  2330. /* De-alloc circular buffer of TFDs */
  2331. if (txq->q.n_bd)
  2332. dma_free_coherent(dev, il->hw_params.tfd_size * txq->q.n_bd,
  2333. txq->tfds, txq->q.dma_addr);
  2334. /* deallocate arrays */
  2335. kfree(txq->cmd);
  2336. kfree(txq->meta);
  2337. txq->cmd = NULL;
  2338. txq->meta = NULL;
  2339. /* 0-fill queue descriptor structure */
  2340. memset(txq, 0, sizeof(*txq));
  2341. }
  2342. EXPORT_SYMBOL(il_cmd_queue_free);
  2343. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  2344. * DMA services
  2345. *
  2346. * Theory of operation
  2347. *
  2348. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  2349. * of buffer descriptors, each of which points to one or more data buffers for
  2350. * the device to read from or fill. Driver and device exchange status of each
  2351. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  2352. * entries in each circular buffer, to protect against confusing empty and full
  2353. * queue states.
  2354. *
  2355. * The device reads or writes the data in the queues via the device's several
  2356. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  2357. *
  2358. * For Tx queue, there are low mark and high mark limits. If, after queuing
  2359. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  2360. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  2361. * Tx queue resumed.
  2362. *
  2363. * See more detailed info in 4965.h.
  2364. ***************************************************/
  2365. int il_queue_space(const struct il_queue *q)
  2366. {
  2367. int s = q->read_ptr - q->write_ptr;
  2368. if (q->read_ptr > q->write_ptr)
  2369. s -= q->n_bd;
  2370. if (s <= 0)
  2371. s += q->n_win;
  2372. /* keep some reserve to not confuse empty and full situations */
  2373. s -= 2;
  2374. if (s < 0)
  2375. s = 0;
  2376. return s;
  2377. }
  2378. EXPORT_SYMBOL(il_queue_space);
  2379. /**
  2380. * il_queue_init - Initialize queue's high/low-water and read/write idxes
  2381. */
  2382. static int il_queue_init(struct il_priv *il, struct il_queue *q,
  2383. int count, int slots_num, u32 id)
  2384. {
  2385. q->n_bd = count;
  2386. q->n_win = slots_num;
  2387. q->id = id;
  2388. /* count must be power-of-two size, otherwise il_queue_inc_wrap
  2389. * and il_queue_dec_wrap are broken. */
  2390. BUG_ON(!is_power_of_2(count));
  2391. /* slots_num must be power-of-two size, otherwise
  2392. * il_get_cmd_idx is broken. */
  2393. BUG_ON(!is_power_of_2(slots_num));
  2394. q->low_mark = q->n_win / 4;
  2395. if (q->low_mark < 4)
  2396. q->low_mark = 4;
  2397. q->high_mark = q->n_win / 8;
  2398. if (q->high_mark < 2)
  2399. q->high_mark = 2;
  2400. q->write_ptr = q->read_ptr = 0;
  2401. return 0;
  2402. }
  2403. /**
  2404. * il_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  2405. */
  2406. static int il_tx_queue_alloc(struct il_priv *il,
  2407. struct il_tx_queue *txq, u32 id)
  2408. {
  2409. struct device *dev = &il->pci_dev->dev;
  2410. size_t tfd_sz = il->hw_params.tfd_size * TFD_QUEUE_SIZE_MAX;
  2411. /* Driver ilate data, only for Tx (not command) queues,
  2412. * not shared with device. */
  2413. if (id != il->cmd_queue) {
  2414. txq->txb = kzalloc(sizeof(txq->txb[0]) *
  2415. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  2416. if (!txq->txb) {
  2417. IL_ERR("kmalloc for auxiliary BD "
  2418. "structures failed\n");
  2419. goto error;
  2420. }
  2421. } else {
  2422. txq->txb = NULL;
  2423. }
  2424. /* Circular buffer of transmit frame descriptors (TFDs),
  2425. * shared with device */
  2426. txq->tfds = dma_alloc_coherent(dev, tfd_sz, &txq->q.dma_addr,
  2427. GFP_KERNEL);
  2428. if (!txq->tfds) {
  2429. IL_ERR("pci_alloc_consistent(%zd) failed\n", tfd_sz);
  2430. goto error;
  2431. }
  2432. txq->q.id = id;
  2433. return 0;
  2434. error:
  2435. kfree(txq->txb);
  2436. txq->txb = NULL;
  2437. return -ENOMEM;
  2438. }
  2439. /**
  2440. * il_tx_queue_init - Allocate and initialize one tx/cmd queue
  2441. */
  2442. int il_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq,
  2443. int slots_num, u32 txq_id)
  2444. {
  2445. int i, len;
  2446. int ret;
  2447. int actual_slots = slots_num;
  2448. /*
  2449. * Alloc buffer array for commands (Tx or other types of commands).
  2450. * For the command queue (#4/#9), allocate command space + one big
  2451. * command for scan, since scan command is very huge; the system will
  2452. * not have two scans at the same time, so only one is needed.
  2453. * For normal Tx queues (all other queues), no super-size command
  2454. * space is needed.
  2455. */
  2456. if (txq_id == il->cmd_queue)
  2457. actual_slots++;
  2458. txq->meta = kzalloc(sizeof(struct il_cmd_meta) * actual_slots,
  2459. GFP_KERNEL);
  2460. txq->cmd = kzalloc(sizeof(struct il_device_cmd *) * actual_slots,
  2461. GFP_KERNEL);
  2462. if (!txq->meta || !txq->cmd)
  2463. goto out_free_arrays;
  2464. len = sizeof(struct il_device_cmd);
  2465. for (i = 0; i < actual_slots; i++) {
  2466. /* only happens for cmd queue */
  2467. if (i == slots_num)
  2468. len = IL_MAX_CMD_SIZE;
  2469. txq->cmd[i] = kmalloc(len, GFP_KERNEL);
  2470. if (!txq->cmd[i])
  2471. goto err;
  2472. }
  2473. /* Alloc driver data array and TFD circular buffer */
  2474. ret = il_tx_queue_alloc(il, txq, txq_id);
  2475. if (ret)
  2476. goto err;
  2477. txq->need_update = 0;
  2478. /*
  2479. * For the default queues 0-3, set up the swq_id
  2480. * already -- all others need to get one later
  2481. * (if they need one at all).
  2482. */
  2483. if (txq_id < 4)
  2484. il_set_swq_id(txq, txq_id, txq_id);
  2485. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  2486. * il_queue_inc_wrap and il_queue_dec_wrap are broken. */
  2487. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  2488. /* Initialize queue's high/low-water marks, and head/tail idxes */
  2489. il_queue_init(il, &txq->q,
  2490. TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  2491. /* Tell device where to find queue */
  2492. il->cfg->ops->lib->txq_init(il, txq);
  2493. return 0;
  2494. err:
  2495. for (i = 0; i < actual_slots; i++)
  2496. kfree(txq->cmd[i]);
  2497. out_free_arrays:
  2498. kfree(txq->meta);
  2499. kfree(txq->cmd);
  2500. return -ENOMEM;
  2501. }
  2502. EXPORT_SYMBOL(il_tx_queue_init);
  2503. void il_tx_queue_reset(struct il_priv *il, struct il_tx_queue *txq,
  2504. int slots_num, u32 txq_id)
  2505. {
  2506. int actual_slots = slots_num;
  2507. if (txq_id == il->cmd_queue)
  2508. actual_slots++;
  2509. memset(txq->meta, 0, sizeof(struct il_cmd_meta) * actual_slots);
  2510. txq->need_update = 0;
  2511. /* Initialize queue's high/low-water marks, and head/tail idxes */
  2512. il_queue_init(il, &txq->q,
  2513. TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  2514. /* Tell device where to find queue */
  2515. il->cfg->ops->lib->txq_init(il, txq);
  2516. }
  2517. EXPORT_SYMBOL(il_tx_queue_reset);
  2518. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  2519. /**
  2520. * il_enqueue_hcmd - enqueue a uCode command
  2521. * @il: device ilate data point
  2522. * @cmd: a point to the ucode command structure
  2523. *
  2524. * The function returns < 0 values to indicate the operation is
  2525. * failed. On success, it turns the idx (> 0) of command in the
  2526. * command queue.
  2527. */
  2528. int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd)
  2529. {
  2530. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2531. struct il_queue *q = &txq->q;
  2532. struct il_device_cmd *out_cmd;
  2533. struct il_cmd_meta *out_meta;
  2534. dma_addr_t phys_addr;
  2535. unsigned long flags;
  2536. int len;
  2537. u32 idx;
  2538. u16 fix_size;
  2539. cmd->len = il->cfg->ops->utils->get_hcmd_size(cmd->id, cmd->len);
  2540. fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  2541. /* If any of the command structures end up being larger than
  2542. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  2543. * we will need to increase the size of the TFD entries
  2544. * Also, check to see if command buffer should not exceed the size
  2545. * of device_cmd and max_cmd_size. */
  2546. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  2547. !(cmd->flags & CMD_SIZE_HUGE));
  2548. BUG_ON(fix_size > IL_MAX_CMD_SIZE);
  2549. if (il_is_rfkill(il) || il_is_ctkill(il)) {
  2550. IL_WARN("Not sending command - %s KILL\n",
  2551. il_is_rfkill(il) ? "RF" : "CT");
  2552. return -EIO;
  2553. }
  2554. spin_lock_irqsave(&il->hcmd_lock, flags);
  2555. if (il_queue_space(q) < ((cmd->flags & CMD_ASYNC) ? 2 : 1)) {
  2556. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2557. IL_ERR("Restarting adapter due to command queue full\n");
  2558. queue_work(il->workqueue, &il->restart);
  2559. return -ENOSPC;
  2560. }
  2561. idx = il_get_cmd_idx(q, q->write_ptr, cmd->flags & CMD_SIZE_HUGE);
  2562. out_cmd = txq->cmd[idx];
  2563. out_meta = &txq->meta[idx];
  2564. if (WARN_ON(out_meta->flags & CMD_MAPPED)) {
  2565. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2566. return -ENOSPC;
  2567. }
  2568. memset(out_meta, 0, sizeof(*out_meta)); /* re-initialize to NULL */
  2569. out_meta->flags = cmd->flags | CMD_MAPPED;
  2570. if (cmd->flags & CMD_WANT_SKB)
  2571. out_meta->source = cmd;
  2572. if (cmd->flags & CMD_ASYNC)
  2573. out_meta->callback = cmd->callback;
  2574. out_cmd->hdr.cmd = cmd->id;
  2575. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  2576. /* At this point, the out_cmd now has all of the incoming cmd
  2577. * information */
  2578. out_cmd->hdr.flags = 0;
  2579. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(il->cmd_queue) |
  2580. IDX_TO_SEQ(q->write_ptr));
  2581. if (cmd->flags & CMD_SIZE_HUGE)
  2582. out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
  2583. len = sizeof(struct il_device_cmd);
  2584. if (idx == TFD_CMD_SLOTS)
  2585. len = IL_MAX_CMD_SIZE;
  2586. #ifdef CONFIG_IWLEGACY_DEBUG
  2587. switch (out_cmd->hdr.cmd) {
  2588. case C_TX_LINK_QUALITY_CMD:
  2589. case C_SENSITIVITY:
  2590. D_HC_DUMP(
  2591. "Sending command %s (#%x), seq: 0x%04X, "
  2592. "%d bytes at %d[%d]:%d\n",
  2593. il_get_cmd_string(out_cmd->hdr.cmd),
  2594. out_cmd->hdr.cmd,
  2595. le16_to_cpu(out_cmd->hdr.sequence), fix_size,
  2596. q->write_ptr, idx, il->cmd_queue);
  2597. break;
  2598. default:
  2599. D_HC("Sending command %s (#%x), seq: 0x%04X, "
  2600. "%d bytes at %d[%d]:%d\n",
  2601. il_get_cmd_string(out_cmd->hdr.cmd),
  2602. out_cmd->hdr.cmd,
  2603. le16_to_cpu(out_cmd->hdr.sequence), fix_size,
  2604. q->write_ptr, idx, il->cmd_queue);
  2605. }
  2606. #endif
  2607. txq->need_update = 1;
  2608. if (il->cfg->ops->lib->txq_update_byte_cnt_tbl)
  2609. /* Set up entry in queue's byte count circular buffer */
  2610. il->cfg->ops->lib->txq_update_byte_cnt_tbl(il, txq, 0);
  2611. phys_addr = pci_map_single(il->pci_dev, &out_cmd->hdr,
  2612. fix_size, PCI_DMA_BIDIRECTIONAL);
  2613. dma_unmap_addr_set(out_meta, mapping, phys_addr);
  2614. dma_unmap_len_set(out_meta, len, fix_size);
  2615. il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq,
  2616. phys_addr, fix_size, 1,
  2617. U32_PAD(cmd->len));
  2618. /* Increment and update queue's write idx */
  2619. q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
  2620. il_txq_update_write_ptr(il, txq);
  2621. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2622. return idx;
  2623. }
  2624. /**
  2625. * il_hcmd_queue_reclaim - Reclaim TX command queue entries already Tx'd
  2626. *
  2627. * When FW advances 'R' idx, all entries between old and new 'R' idx
  2628. * need to be reclaimed. As result, some free space forms. If there is
  2629. * enough free space (> low mark), wake the stack that feeds us.
  2630. */
  2631. static void il_hcmd_queue_reclaim(struct il_priv *il, int txq_id,
  2632. int idx, int cmd_idx)
  2633. {
  2634. struct il_tx_queue *txq = &il->txq[txq_id];
  2635. struct il_queue *q = &txq->q;
  2636. int nfreed = 0;
  2637. if (idx >= q->n_bd || il_queue_used(q, idx) == 0) {
  2638. IL_ERR("Read idx for DMA queue txq id (%d), idx %d, "
  2639. "is out of range [0-%d] %d %d.\n", txq_id,
  2640. idx, q->n_bd, q->write_ptr, q->read_ptr);
  2641. return;
  2642. }
  2643. for (idx = il_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
  2644. q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2645. if (nfreed++ > 0) {
  2646. IL_ERR("HCMD skipped: idx (%d) %d %d\n", idx,
  2647. q->write_ptr, q->read_ptr);
  2648. queue_work(il->workqueue, &il->restart);
  2649. }
  2650. }
  2651. }
  2652. /**
  2653. * il_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  2654. * @rxb: Rx buffer to reclaim
  2655. *
  2656. * If an Rx buffer has an async callback associated with it the callback
  2657. * will be executed. The attached skb (if present) will only be freed
  2658. * if the callback returns 1
  2659. */
  2660. void
  2661. il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb)
  2662. {
  2663. struct il_rx_pkt *pkt = rxb_addr(rxb);
  2664. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2665. int txq_id = SEQ_TO_QUEUE(sequence);
  2666. int idx = SEQ_TO_IDX(sequence);
  2667. int cmd_idx;
  2668. bool huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
  2669. struct il_device_cmd *cmd;
  2670. struct il_cmd_meta *meta;
  2671. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2672. unsigned long flags;
  2673. /* If a Tx command is being handled and it isn't in the actual
  2674. * command queue then there a command routing bug has been introduced
  2675. * in the queue management code. */
  2676. if (WARN(txq_id != il->cmd_queue,
  2677. "wrong command queue %d (should be %d), sequence 0x%X readp=%d writep=%d\n",
  2678. txq_id, il->cmd_queue, sequence,
  2679. il->txq[il->cmd_queue].q.read_ptr,
  2680. il->txq[il->cmd_queue].q.write_ptr)) {
  2681. il_print_hex_error(il, pkt, 32);
  2682. return;
  2683. }
  2684. cmd_idx = il_get_cmd_idx(&txq->q, idx, huge);
  2685. cmd = txq->cmd[cmd_idx];
  2686. meta = &txq->meta[cmd_idx];
  2687. txq->time_stamp = jiffies;
  2688. pci_unmap_single(il->pci_dev,
  2689. dma_unmap_addr(meta, mapping),
  2690. dma_unmap_len(meta, len),
  2691. PCI_DMA_BIDIRECTIONAL);
  2692. /* Input error checking is done when commands are added to queue. */
  2693. if (meta->flags & CMD_WANT_SKB) {
  2694. meta->source->reply_page = (unsigned long)rxb_addr(rxb);
  2695. rxb->page = NULL;
  2696. } else if (meta->callback)
  2697. meta->callback(il, cmd, pkt);
  2698. spin_lock_irqsave(&il->hcmd_lock, flags);
  2699. il_hcmd_queue_reclaim(il, txq_id, idx, cmd_idx);
  2700. if (!(meta->flags & CMD_ASYNC)) {
  2701. clear_bit(S_HCMD_ACTIVE, &il->status);
  2702. D_INFO("Clearing HCMD_ACTIVE for command %s\n",
  2703. il_get_cmd_string(cmd->hdr.cmd));
  2704. wake_up(&il->wait_command_queue);
  2705. }
  2706. /* Mark as unmapped */
  2707. meta->flags = 0;
  2708. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2709. }
  2710. EXPORT_SYMBOL(il_tx_cmd_complete);
  2711. MODULE_DESCRIPTION("iwl-legacy: common functions for 3945 and 4965");
  2712. MODULE_VERSION(IWLWIFI_VERSION);
  2713. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  2714. MODULE_LICENSE("GPL");
  2715. /*
  2716. * set bt_coex_active to true, uCode will do kill/defer
  2717. * every time the priority line is asserted (BT is sending signals on the
  2718. * priority line in the PCIx).
  2719. * set bt_coex_active to false, uCode will ignore the BT activity and
  2720. * perform the normal operation
  2721. *
  2722. * User might experience transmit issue on some platform due to WiFi/BT
  2723. * co-exist problem. The possible behaviors are:
  2724. * Able to scan and finding all the available AP
  2725. * Not able to associate with any AP
  2726. * On those platforms, WiFi communication can be restored by set
  2727. * "bt_coex_active" module parameter to "false"
  2728. *
  2729. * default: bt_coex_active = true (BT_COEX_ENABLE)
  2730. */
  2731. static bool bt_coex_active = true;
  2732. module_param(bt_coex_active, bool, S_IRUGO);
  2733. MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
  2734. u32 il_debug_level;
  2735. EXPORT_SYMBOL(il_debug_level);
  2736. const u8 il_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  2737. EXPORT_SYMBOL(il_bcast_addr);
  2738. /* This function both allocates and initializes hw and il. */
  2739. struct ieee80211_hw *il_alloc_all(struct il_cfg *cfg)
  2740. {
  2741. struct il_priv *il;
  2742. /* mac80211 allocates memory for this device instance, including
  2743. * space for this driver's ilate structure */
  2744. struct ieee80211_hw *hw;
  2745. hw = ieee80211_alloc_hw(sizeof(struct il_priv),
  2746. cfg->ops->ieee80211_ops);
  2747. if (hw == NULL) {
  2748. pr_err("%s: Can not allocate network device\n",
  2749. cfg->name);
  2750. goto out;
  2751. }
  2752. il = hw->priv;
  2753. il->hw = hw;
  2754. out:
  2755. return hw;
  2756. }
  2757. EXPORT_SYMBOL(il_alloc_all);
  2758. #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
  2759. #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
  2760. static void il_init_ht_hw_capab(const struct il_priv *il,
  2761. struct ieee80211_sta_ht_cap *ht_info,
  2762. enum ieee80211_band band)
  2763. {
  2764. u16 max_bit_rate = 0;
  2765. u8 rx_chains_num = il->hw_params.rx_chains_num;
  2766. u8 tx_chains_num = il->hw_params.tx_chains_num;
  2767. ht_info->cap = 0;
  2768. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  2769. ht_info->ht_supported = true;
  2770. ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
  2771. max_bit_rate = MAX_BIT_RATE_20_MHZ;
  2772. if (il->hw_params.ht40_channel & BIT(band)) {
  2773. ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  2774. ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
  2775. ht_info->mcs.rx_mask[4] = 0x01;
  2776. max_bit_rate = MAX_BIT_RATE_40_MHZ;
  2777. }
  2778. if (il->cfg->mod_params->amsdu_size_8K)
  2779. ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  2780. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  2781. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  2782. ht_info->mcs.rx_mask[0] = 0xFF;
  2783. if (rx_chains_num >= 2)
  2784. ht_info->mcs.rx_mask[1] = 0xFF;
  2785. if (rx_chains_num >= 3)
  2786. ht_info->mcs.rx_mask[2] = 0xFF;
  2787. /* Highest supported Rx data rate */
  2788. max_bit_rate *= rx_chains_num;
  2789. WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
  2790. ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
  2791. /* Tx MCS capabilities */
  2792. ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  2793. if (tx_chains_num != rx_chains_num) {
  2794. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  2795. ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
  2796. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
  2797. }
  2798. }
  2799. /**
  2800. * il_init_geos - Initialize mac80211's geo/channel info based from eeprom
  2801. */
  2802. int il_init_geos(struct il_priv *il)
  2803. {
  2804. struct il_channel_info *ch;
  2805. struct ieee80211_supported_band *sband;
  2806. struct ieee80211_channel *channels;
  2807. struct ieee80211_channel *geo_ch;
  2808. struct ieee80211_rate *rates;
  2809. int i = 0;
  2810. s8 max_tx_power = 0;
  2811. if (il->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  2812. il->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  2813. D_INFO("Geography modes already initialized.\n");
  2814. set_bit(S_GEO_CONFIGURED, &il->status);
  2815. return 0;
  2816. }
  2817. channels = kzalloc(sizeof(struct ieee80211_channel) *
  2818. il->channel_count, GFP_KERNEL);
  2819. if (!channels)
  2820. return -ENOMEM;
  2821. rates = kzalloc((sizeof(struct ieee80211_rate) * RATE_COUNT_LEGACY),
  2822. GFP_KERNEL);
  2823. if (!rates) {
  2824. kfree(channels);
  2825. return -ENOMEM;
  2826. }
  2827. /* 5.2GHz channels start after the 2.4GHz channels */
  2828. sband = &il->bands[IEEE80211_BAND_5GHZ];
  2829. sband->channels = &channels[ARRAY_SIZE(il_eeprom_band_1)];
  2830. /* just OFDM */
  2831. sband->bitrates = &rates[IL_FIRST_OFDM_RATE];
  2832. sband->n_bitrates = RATE_COUNT_LEGACY - IL_FIRST_OFDM_RATE;
  2833. if (il->cfg->sku & IL_SKU_N)
  2834. il_init_ht_hw_capab(il, &sband->ht_cap,
  2835. IEEE80211_BAND_5GHZ);
  2836. sband = &il->bands[IEEE80211_BAND_2GHZ];
  2837. sband->channels = channels;
  2838. /* OFDM & CCK */
  2839. sband->bitrates = rates;
  2840. sband->n_bitrates = RATE_COUNT_LEGACY;
  2841. if (il->cfg->sku & IL_SKU_N)
  2842. il_init_ht_hw_capab(il, &sband->ht_cap,
  2843. IEEE80211_BAND_2GHZ);
  2844. il->ieee_channels = channels;
  2845. il->ieee_rates = rates;
  2846. for (i = 0; i < il->channel_count; i++) {
  2847. ch = &il->channel_info[i];
  2848. if (!il_is_channel_valid(ch))
  2849. continue;
  2850. sband = &il->bands[ch->band];
  2851. geo_ch = &sband->channels[sband->n_channels++];
  2852. geo_ch->center_freq =
  2853. ieee80211_channel_to_frequency(ch->channel, ch->band);
  2854. geo_ch->max_power = ch->max_power_avg;
  2855. geo_ch->max_antenna_gain = 0xff;
  2856. geo_ch->hw_value = ch->channel;
  2857. if (il_is_channel_valid(ch)) {
  2858. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  2859. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  2860. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  2861. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  2862. if (ch->flags & EEPROM_CHANNEL_RADAR)
  2863. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  2864. geo_ch->flags |= ch->ht40_extension_channel;
  2865. if (ch->max_power_avg > max_tx_power)
  2866. max_tx_power = ch->max_power_avg;
  2867. } else {
  2868. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  2869. }
  2870. D_INFO("Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
  2871. ch->channel, geo_ch->center_freq,
  2872. il_is_channel_a_band(ch) ? "5.2" : "2.4",
  2873. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  2874. "restricted" : "valid",
  2875. geo_ch->flags);
  2876. }
  2877. il->tx_power_device_lmt = max_tx_power;
  2878. il->tx_power_user_lmt = max_tx_power;
  2879. il->tx_power_next = max_tx_power;
  2880. if (il->bands[IEEE80211_BAND_5GHZ].n_channels == 0 &&
  2881. (il->cfg->sku & IL_SKU_A)) {
  2882. IL_INFO("Incorrectly detected BG card as ABG. "
  2883. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  2884. il->pci_dev->device,
  2885. il->pci_dev->subsystem_device);
  2886. il->cfg->sku &= ~IL_SKU_A;
  2887. }
  2888. IL_INFO("Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  2889. il->bands[IEEE80211_BAND_2GHZ].n_channels,
  2890. il->bands[IEEE80211_BAND_5GHZ].n_channels);
  2891. set_bit(S_GEO_CONFIGURED, &il->status);
  2892. return 0;
  2893. }
  2894. EXPORT_SYMBOL(il_init_geos);
  2895. /*
  2896. * il_free_geos - undo allocations in il_init_geos
  2897. */
  2898. void il_free_geos(struct il_priv *il)
  2899. {
  2900. kfree(il->ieee_channels);
  2901. kfree(il->ieee_rates);
  2902. clear_bit(S_GEO_CONFIGURED, &il->status);
  2903. }
  2904. EXPORT_SYMBOL(il_free_geos);
  2905. static bool il_is_channel_extension(struct il_priv *il,
  2906. enum ieee80211_band band,
  2907. u16 channel, u8 extension_chan_offset)
  2908. {
  2909. const struct il_channel_info *ch_info;
  2910. ch_info = il_get_channel_info(il, band, channel);
  2911. if (!il_is_channel_valid(ch_info))
  2912. return false;
  2913. if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
  2914. return !(ch_info->ht40_extension_channel &
  2915. IEEE80211_CHAN_NO_HT40PLUS);
  2916. else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  2917. return !(ch_info->ht40_extension_channel &
  2918. IEEE80211_CHAN_NO_HT40MINUS);
  2919. return false;
  2920. }
  2921. bool il_is_ht40_tx_allowed(struct il_priv *il,
  2922. struct il_rxon_context *ctx,
  2923. struct ieee80211_sta_ht_cap *ht_cap)
  2924. {
  2925. if (!ctx->ht.enabled || !ctx->ht.is_40mhz)
  2926. return false;
  2927. /*
  2928. * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
  2929. * the bit will not set if it is pure 40MHz case
  2930. */
  2931. if (ht_cap && !ht_cap->ht_supported)
  2932. return false;
  2933. #ifdef CONFIG_IWLEGACY_DEBUGFS
  2934. if (il->disable_ht40)
  2935. return false;
  2936. #endif
  2937. return il_is_channel_extension(il, il->band,
  2938. le16_to_cpu(ctx->staging.channel),
  2939. ctx->ht.extension_chan_offset);
  2940. }
  2941. EXPORT_SYMBOL(il_is_ht40_tx_allowed);
  2942. static u16 il_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
  2943. {
  2944. u16 new_val;
  2945. u16 beacon_factor;
  2946. /*
  2947. * If mac80211 hasn't given us a beacon interval, program
  2948. * the default into the device.
  2949. */
  2950. if (!beacon_val)
  2951. return DEFAULT_BEACON_INTERVAL;
  2952. /*
  2953. * If the beacon interval we obtained from the peer
  2954. * is too large, we'll have to wake up more often
  2955. * (and in IBSS case, we'll beacon too much)
  2956. *
  2957. * For example, if max_beacon_val is 4096, and the
  2958. * requested beacon interval is 7000, we'll have to
  2959. * use 3500 to be able to wake up on the beacons.
  2960. *
  2961. * This could badly influence beacon detection stats.
  2962. */
  2963. beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
  2964. new_val = beacon_val / beacon_factor;
  2965. if (!new_val)
  2966. new_val = max_beacon_val;
  2967. return new_val;
  2968. }
  2969. int
  2970. il_send_rxon_timing(struct il_priv *il, struct il_rxon_context *ctx)
  2971. {
  2972. u64 tsf;
  2973. s32 interval_tm, rem;
  2974. struct ieee80211_conf *conf = NULL;
  2975. u16 beacon_int;
  2976. struct ieee80211_vif *vif = ctx->vif;
  2977. conf = &il->hw->conf;
  2978. lockdep_assert_held(&il->mutex);
  2979. memset(&ctx->timing, 0, sizeof(struct il_rxon_time_cmd));
  2980. ctx->timing.timestamp = cpu_to_le64(il->timestamp);
  2981. ctx->timing.listen_interval = cpu_to_le16(conf->listen_interval);
  2982. beacon_int = vif ? vif->bss_conf.beacon_int : 0;
  2983. /*
  2984. * TODO: For IBSS we need to get atim_win from mac80211,
  2985. * for now just always use 0
  2986. */
  2987. ctx->timing.atim_win = 0;
  2988. beacon_int = il_adjust_beacon_interval(beacon_int,
  2989. il->hw_params.max_beacon_itrvl * TIME_UNIT);
  2990. ctx->timing.beacon_interval = cpu_to_le16(beacon_int);
  2991. tsf = il->timestamp; /* tsf is modifed by do_div: copy it */
  2992. interval_tm = beacon_int * TIME_UNIT;
  2993. rem = do_div(tsf, interval_tm);
  2994. ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
  2995. ctx->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ?: 1) : 1;
  2996. D_ASSOC(
  2997. "beacon interval %d beacon timer %d beacon tim %d\n",
  2998. le16_to_cpu(ctx->timing.beacon_interval),
  2999. le32_to_cpu(ctx->timing.beacon_init_val),
  3000. le16_to_cpu(ctx->timing.atim_win));
  3001. return il_send_cmd_pdu(il, ctx->rxon_timing_cmd,
  3002. sizeof(ctx->timing), &ctx->timing);
  3003. }
  3004. EXPORT_SYMBOL(il_send_rxon_timing);
  3005. void
  3006. il_set_rxon_hwcrypto(struct il_priv *il,
  3007. struct il_rxon_context *ctx,
  3008. int hw_decrypt)
  3009. {
  3010. struct il_rxon_cmd *rxon = &ctx->staging;
  3011. if (hw_decrypt)
  3012. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  3013. else
  3014. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  3015. }
  3016. EXPORT_SYMBOL(il_set_rxon_hwcrypto);
  3017. /* validate RXON structure is valid */
  3018. int
  3019. il_check_rxon_cmd(struct il_priv *il, struct il_rxon_context *ctx)
  3020. {
  3021. struct il_rxon_cmd *rxon = &ctx->staging;
  3022. bool error = false;
  3023. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  3024. if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
  3025. IL_WARN("check 2.4G: wrong narrow\n");
  3026. error = true;
  3027. }
  3028. if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
  3029. IL_WARN("check 2.4G: wrong radar\n");
  3030. error = true;
  3031. }
  3032. } else {
  3033. if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
  3034. IL_WARN("check 5.2G: not short slot!\n");
  3035. error = true;
  3036. }
  3037. if (rxon->flags & RXON_FLG_CCK_MSK) {
  3038. IL_WARN("check 5.2G: CCK!\n");
  3039. error = true;
  3040. }
  3041. }
  3042. if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
  3043. IL_WARN("mac/bssid mcast!\n");
  3044. error = true;
  3045. }
  3046. /* make sure basic rates 6Mbps and 1Mbps are supported */
  3047. if ((rxon->ofdm_basic_rates & RATE_6M_MASK) == 0 &&
  3048. (rxon->cck_basic_rates & RATE_1M_MASK) == 0) {
  3049. IL_WARN("neither 1 nor 6 are basic\n");
  3050. error = true;
  3051. }
  3052. if (le16_to_cpu(rxon->assoc_id) > 2007) {
  3053. IL_WARN("aid > 2007\n");
  3054. error = true;
  3055. }
  3056. if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  3057. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
  3058. IL_WARN("CCK and short slot\n");
  3059. error = true;
  3060. }
  3061. if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  3062. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
  3063. IL_WARN("CCK and auto detect");
  3064. error = true;
  3065. }
  3066. if ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  3067. RXON_FLG_TGG_PROTECT_MSK)) ==
  3068. RXON_FLG_TGG_PROTECT_MSK) {
  3069. IL_WARN("TGg but no auto-detect\n");
  3070. error = true;
  3071. }
  3072. if (error)
  3073. IL_WARN("Tuning to channel %d\n",
  3074. le16_to_cpu(rxon->channel));
  3075. if (error) {
  3076. IL_ERR("Invalid RXON\n");
  3077. return -EINVAL;
  3078. }
  3079. return 0;
  3080. }
  3081. EXPORT_SYMBOL(il_check_rxon_cmd);
  3082. /**
  3083. * il_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  3084. * @il: staging_rxon is compared to active_rxon
  3085. *
  3086. * If the RXON structure is changing enough to require a new tune,
  3087. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  3088. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  3089. */
  3090. int il_full_rxon_required(struct il_priv *il,
  3091. struct il_rxon_context *ctx)
  3092. {
  3093. const struct il_rxon_cmd *staging = &ctx->staging;
  3094. const struct il_rxon_cmd *active = &ctx->active;
  3095. #define CHK(cond) \
  3096. if ((cond)) { \
  3097. D_INFO("need full RXON - " #cond "\n"); \
  3098. return 1; \
  3099. }
  3100. #define CHK_NEQ(c1, c2) \
  3101. if ((c1) != (c2)) { \
  3102. D_INFO("need full RXON - " \
  3103. #c1 " != " #c2 " - %d != %d\n", \
  3104. (c1), (c2)); \
  3105. return 1; \
  3106. }
  3107. /* These items are only settable from the full RXON command */
  3108. CHK(!il_is_associated_ctx(ctx));
  3109. CHK(compare_ether_addr(staging->bssid_addr, active->bssid_addr));
  3110. CHK(compare_ether_addr(staging->node_addr, active->node_addr));
  3111. CHK(compare_ether_addr(staging->wlap_bssid_addr,
  3112. active->wlap_bssid_addr));
  3113. CHK_NEQ(staging->dev_type, active->dev_type);
  3114. CHK_NEQ(staging->channel, active->channel);
  3115. CHK_NEQ(staging->air_propagation, active->air_propagation);
  3116. CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
  3117. active->ofdm_ht_single_stream_basic_rates);
  3118. CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
  3119. active->ofdm_ht_dual_stream_basic_rates);
  3120. CHK_NEQ(staging->assoc_id, active->assoc_id);
  3121. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  3122. * be updated with the RXON_ASSOC command -- however only some
  3123. * flag transitions are allowed using RXON_ASSOC */
  3124. /* Check if we are not switching bands */
  3125. CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
  3126. active->flags & RXON_FLG_BAND_24G_MSK);
  3127. /* Check if we are switching association toggle */
  3128. CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
  3129. active->filter_flags & RXON_FILTER_ASSOC_MSK);
  3130. #undef CHK
  3131. #undef CHK_NEQ
  3132. return 0;
  3133. }
  3134. EXPORT_SYMBOL(il_full_rxon_required);
  3135. u8 il_get_lowest_plcp(struct il_priv *il,
  3136. struct il_rxon_context *ctx)
  3137. {
  3138. /*
  3139. * Assign the lowest rate -- should really get this from
  3140. * the beacon skb from mac80211.
  3141. */
  3142. if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK)
  3143. return RATE_1M_PLCP;
  3144. else
  3145. return RATE_6M_PLCP;
  3146. }
  3147. EXPORT_SYMBOL(il_get_lowest_plcp);
  3148. static void _il_set_rxon_ht(struct il_priv *il,
  3149. struct il_ht_config *ht_conf,
  3150. struct il_rxon_context *ctx)
  3151. {
  3152. struct il_rxon_cmd *rxon = &ctx->staging;
  3153. if (!ctx->ht.enabled) {
  3154. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  3155. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
  3156. RXON_FLG_HT40_PROT_MSK |
  3157. RXON_FLG_HT_PROT_MSK);
  3158. return;
  3159. }
  3160. rxon->flags |= cpu_to_le32(ctx->ht.protection <<
  3161. RXON_FLG_HT_OPERATING_MODE_POS);
  3162. /* Set up channel bandwidth:
  3163. * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
  3164. /* clear the HT channel mode before set the mode */
  3165. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  3166. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  3167. if (il_is_ht40_tx_allowed(il, ctx, NULL)) {
  3168. /* pure ht40 */
  3169. if (ctx->ht.protection ==
  3170. IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
  3171. rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
  3172. /* Note: control channel is opposite of extension channel */
  3173. switch (ctx->ht.extension_chan_offset) {
  3174. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  3175. rxon->flags &=
  3176. ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  3177. break;
  3178. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  3179. rxon->flags |=
  3180. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  3181. break;
  3182. }
  3183. } else {
  3184. /* Note: control channel is opposite of extension channel */
  3185. switch (ctx->ht.extension_chan_offset) {
  3186. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  3187. rxon->flags &=
  3188. ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  3189. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  3190. break;
  3191. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  3192. rxon->flags |=
  3193. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  3194. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  3195. break;
  3196. case IEEE80211_HT_PARAM_CHA_SEC_NONE:
  3197. default:
  3198. /* channel location only valid if in Mixed mode */
  3199. IL_ERR(
  3200. "invalid extension channel offset\n");
  3201. break;
  3202. }
  3203. }
  3204. } else {
  3205. rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
  3206. }
  3207. if (il->cfg->ops->hcmd->set_rxon_chain)
  3208. il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
  3209. D_ASSOC("rxon flags 0x%X operation mode :0x%X "
  3210. "extension channel offset 0x%x\n",
  3211. le32_to_cpu(rxon->flags), ctx->ht.protection,
  3212. ctx->ht.extension_chan_offset);
  3213. }
  3214. void il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf)
  3215. {
  3216. _il_set_rxon_ht(il, ht_conf, &il->ctx);
  3217. }
  3218. EXPORT_SYMBOL(il_set_rxon_ht);
  3219. /* Return valid, unused, channel for a passive scan to reset the RF */
  3220. u8 il_get_single_channel_number(struct il_priv *il,
  3221. enum ieee80211_band band)
  3222. {
  3223. const struct il_channel_info *ch_info;
  3224. int i;
  3225. u8 channel = 0;
  3226. u8 min, max;
  3227. if (band == IEEE80211_BAND_5GHZ) {
  3228. min = 14;
  3229. max = il->channel_count;
  3230. } else {
  3231. min = 0;
  3232. max = 14;
  3233. }
  3234. for (i = min; i < max; i++) {
  3235. channel = il->channel_info[i].channel;
  3236. if (channel == le16_to_cpu(il->ctx.staging.channel))
  3237. continue;
  3238. ch_info = il_get_channel_info(il, band, channel);
  3239. if (il_is_channel_valid(ch_info))
  3240. break;
  3241. }
  3242. return channel;
  3243. }
  3244. EXPORT_SYMBOL(il_get_single_channel_number);
  3245. /**
  3246. * il_set_rxon_channel - Set the band and channel values in staging RXON
  3247. * @ch: requested channel as a pointer to struct ieee80211_channel
  3248. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  3249. * in the staging RXON flag structure based on the ch->band
  3250. */
  3251. int
  3252. il_set_rxon_channel(struct il_priv *il, struct ieee80211_channel *ch,
  3253. struct il_rxon_context *ctx)
  3254. {
  3255. enum ieee80211_band band = ch->band;
  3256. u16 channel = ch->hw_value;
  3257. if (le16_to_cpu(ctx->staging.channel) == channel && il->band == band)
  3258. return 0;
  3259. ctx->staging.channel = cpu_to_le16(channel);
  3260. if (band == IEEE80211_BAND_5GHZ)
  3261. ctx->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
  3262. else
  3263. ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
  3264. il->band = band;
  3265. D_INFO("Staging channel set to %d [%d]\n", channel, band);
  3266. return 0;
  3267. }
  3268. EXPORT_SYMBOL(il_set_rxon_channel);
  3269. void il_set_flags_for_band(struct il_priv *il,
  3270. struct il_rxon_context *ctx,
  3271. enum ieee80211_band band,
  3272. struct ieee80211_vif *vif)
  3273. {
  3274. if (band == IEEE80211_BAND_5GHZ) {
  3275. ctx->staging.flags &=
  3276. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  3277. | RXON_FLG_CCK_MSK);
  3278. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  3279. } else {
  3280. /* Copied from il_post_associate() */
  3281. if (vif && vif->bss_conf.use_short_slot)
  3282. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  3283. else
  3284. ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  3285. ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
  3286. ctx->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
  3287. ctx->staging.flags &= ~RXON_FLG_CCK_MSK;
  3288. }
  3289. }
  3290. EXPORT_SYMBOL(il_set_flags_for_band);
  3291. /*
  3292. * initialize rxon structure with default values from eeprom
  3293. */
  3294. void il_connection_init_rx_config(struct il_priv *il,
  3295. struct il_rxon_context *ctx)
  3296. {
  3297. const struct il_channel_info *ch_info;
  3298. memset(&ctx->staging, 0, sizeof(ctx->staging));
  3299. if (!ctx->vif) {
  3300. ctx->staging.dev_type = ctx->unused_devtype;
  3301. } else
  3302. switch (ctx->vif->type) {
  3303. case NL80211_IFTYPE_STATION:
  3304. ctx->staging.dev_type = ctx->station_devtype;
  3305. ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  3306. break;
  3307. case NL80211_IFTYPE_ADHOC:
  3308. ctx->staging.dev_type = ctx->ibss_devtype;
  3309. ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  3310. ctx->staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  3311. RXON_FILTER_ACCEPT_GRP_MSK;
  3312. break;
  3313. default:
  3314. IL_ERR("Unsupported interface type %d\n",
  3315. ctx->vif->type);
  3316. break;
  3317. }
  3318. #if 0
  3319. /* TODO: Figure out when short_preamble would be set and cache from
  3320. * that */
  3321. if (!hw_to_local(il->hw)->short_preamble)
  3322. ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  3323. else
  3324. ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  3325. #endif
  3326. ch_info = il_get_channel_info(il, il->band,
  3327. le16_to_cpu(ctx->active.channel));
  3328. if (!ch_info)
  3329. ch_info = &il->channel_info[0];
  3330. ctx->staging.channel = cpu_to_le16(ch_info->channel);
  3331. il->band = ch_info->band;
  3332. il_set_flags_for_band(il, ctx, il->band, ctx->vif);
  3333. ctx->staging.ofdm_basic_rates =
  3334. (IL_OFDM_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
  3335. ctx->staging.cck_basic_rates =
  3336. (IL_CCK_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
  3337. /* clear both MIX and PURE40 mode flag */
  3338. ctx->staging.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
  3339. RXON_FLG_CHANNEL_MODE_PURE_40);
  3340. if (ctx->vif)
  3341. memcpy(ctx->staging.node_addr, ctx->vif->addr, ETH_ALEN);
  3342. ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff;
  3343. ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
  3344. }
  3345. EXPORT_SYMBOL(il_connection_init_rx_config);
  3346. void il_set_rate(struct il_priv *il)
  3347. {
  3348. const struct ieee80211_supported_band *hw = NULL;
  3349. struct ieee80211_rate *rate;
  3350. int i;
  3351. hw = il_get_hw_mode(il, il->band);
  3352. if (!hw) {
  3353. IL_ERR("Failed to set rate: unable to get hw mode\n");
  3354. return;
  3355. }
  3356. il->active_rate = 0;
  3357. for (i = 0; i < hw->n_bitrates; i++) {
  3358. rate = &(hw->bitrates[i]);
  3359. if (rate->hw_value < RATE_COUNT_LEGACY)
  3360. il->active_rate |= (1 << rate->hw_value);
  3361. }
  3362. D_RATE("Set active_rate = %0x\n", il->active_rate);
  3363. il->ctx.staging.cck_basic_rates =
  3364. (IL_CCK_BASIC_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
  3365. il->ctx.staging.ofdm_basic_rates =
  3366. (IL_OFDM_BASIC_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
  3367. }
  3368. EXPORT_SYMBOL(il_set_rate);
  3369. void il_chswitch_done(struct il_priv *il, bool is_success)
  3370. {
  3371. struct il_rxon_context *ctx = &il->ctx;
  3372. if (test_bit(S_EXIT_PENDING, &il->status))
  3373. return;
  3374. if (test_and_clear_bit(S_CHANNEL_SWITCH_PENDING, &il->status))
  3375. ieee80211_chswitch_done(ctx->vif, is_success);
  3376. }
  3377. EXPORT_SYMBOL(il_chswitch_done);
  3378. void il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb)
  3379. {
  3380. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3381. struct il_csa_notification *csa = &(pkt->u.csa_notif);
  3382. struct il_rxon_context *ctx = &il->ctx;
  3383. struct il_rxon_cmd *rxon = (void *)&ctx->active;
  3384. if (!test_bit(S_CHANNEL_SWITCH_PENDING, &il->status))
  3385. return;
  3386. if (!le32_to_cpu(csa->status) && csa->channel == il->switch_channel) {
  3387. rxon->channel = csa->channel;
  3388. ctx->staging.channel = csa->channel;
  3389. D_11H("CSA notif: channel %d\n",
  3390. le16_to_cpu(csa->channel));
  3391. il_chswitch_done(il, true);
  3392. } else {
  3393. IL_ERR("CSA notif (fail) : channel %d\n",
  3394. le16_to_cpu(csa->channel));
  3395. il_chswitch_done(il, false);
  3396. }
  3397. }
  3398. EXPORT_SYMBOL(il_hdl_csa);
  3399. #ifdef CONFIG_IWLEGACY_DEBUG
  3400. void il_print_rx_config_cmd(struct il_priv *il,
  3401. struct il_rxon_context *ctx)
  3402. {
  3403. struct il_rxon_cmd *rxon = &ctx->staging;
  3404. D_RADIO("RX CONFIG:\n");
  3405. il_print_hex_dump(il, IL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3406. D_RADIO("u16 channel: 0x%x\n",
  3407. le16_to_cpu(rxon->channel));
  3408. D_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3409. D_RADIO("u32 filter_flags: 0x%08x\n",
  3410. le32_to_cpu(rxon->filter_flags));
  3411. D_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3412. D_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3413. rxon->ofdm_basic_rates);
  3414. D_RADIO("u8 cck_basic_rates: 0x%02x\n",
  3415. rxon->cck_basic_rates);
  3416. D_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
  3417. D_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  3418. D_RADIO("u16 assoc_id: 0x%x\n",
  3419. le16_to_cpu(rxon->assoc_id));
  3420. }
  3421. EXPORT_SYMBOL(il_print_rx_config_cmd);
  3422. #endif
  3423. /**
  3424. * il_irq_handle_error - called for HW or SW error interrupt from card
  3425. */
  3426. void il_irq_handle_error(struct il_priv *il)
  3427. {
  3428. /* Set the FW error flag -- cleared on il_down */
  3429. set_bit(S_FW_ERROR, &il->status);
  3430. /* Cancel currently queued command. */
  3431. clear_bit(S_HCMD_ACTIVE, &il->status);
  3432. IL_ERR("Loaded firmware version: %s\n",
  3433. il->hw->wiphy->fw_version);
  3434. il->cfg->ops->lib->dump_nic_error_log(il);
  3435. if (il->cfg->ops->lib->dump_fh)
  3436. il->cfg->ops->lib->dump_fh(il, NULL, false);
  3437. #ifdef CONFIG_IWLEGACY_DEBUG
  3438. if (il_get_debug_level(il) & IL_DL_FW_ERRORS)
  3439. il_print_rx_config_cmd(il,
  3440. &il->ctx);
  3441. #endif
  3442. wake_up(&il->wait_command_queue);
  3443. /* Keep the restart process from trying to send host
  3444. * commands by clearing the INIT status bit */
  3445. clear_bit(S_READY, &il->status);
  3446. if (!test_bit(S_EXIT_PENDING, &il->status)) {
  3447. IL_DBG(IL_DL_FW_ERRORS,
  3448. "Restarting adapter due to uCode error.\n");
  3449. if (il->cfg->mod_params->restart_fw)
  3450. queue_work(il->workqueue, &il->restart);
  3451. }
  3452. }
  3453. EXPORT_SYMBOL(il_irq_handle_error);
  3454. static int il_apm_stop_master(struct il_priv *il)
  3455. {
  3456. int ret = 0;
  3457. /* stop device's busmaster DMA activity */
  3458. il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
  3459. ret = _il_poll_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
  3460. CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
  3461. if (ret)
  3462. IL_WARN("Master Disable Timed Out, 100 usec\n");
  3463. D_INFO("stop master\n");
  3464. return ret;
  3465. }
  3466. void il_apm_stop(struct il_priv *il)
  3467. {
  3468. D_INFO("Stop card, put in low power state\n");
  3469. /* Stop device's DMA activity */
  3470. il_apm_stop_master(il);
  3471. /* Reset the entire device */
  3472. il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  3473. udelay(10);
  3474. /*
  3475. * Clear "initialization complete" bit to move adapter from
  3476. * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
  3477. */
  3478. il_clear_bit(il, CSR_GP_CNTRL,
  3479. CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  3480. }
  3481. EXPORT_SYMBOL(il_apm_stop);
  3482. /*
  3483. * Start up NIC's basic functionality after it has been reset
  3484. * (e.g. after platform boot, or shutdown via il_apm_stop())
  3485. * NOTE: This does not load uCode nor start the embedded processor
  3486. */
  3487. int il_apm_init(struct il_priv *il)
  3488. {
  3489. int ret = 0;
  3490. u16 lctl;
  3491. D_INFO("Init card's basic functions\n");
  3492. /*
  3493. * Use "set_bit" below rather than "write", to preserve any hardware
  3494. * bits already set by default after reset.
  3495. */
  3496. /* Disable L0S exit timer (platform NMI Work/Around) */
  3497. il_set_bit(il, CSR_GIO_CHICKEN_BITS,
  3498. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  3499. /*
  3500. * Disable L0s without affecting L1;
  3501. * don't wait for ICH L0s (ICH bug W/A)
  3502. */
  3503. il_set_bit(il, CSR_GIO_CHICKEN_BITS,
  3504. CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
  3505. /* Set FH wait threshold to maximum (HW error during stress W/A) */
  3506. il_set_bit(il, CSR_DBG_HPET_MEM_REG,
  3507. CSR_DBG_HPET_MEM_REG_VAL);
  3508. /*
  3509. * Enable HAP INTA (interrupt from management bus) to
  3510. * wake device's PCI Express link L1a -> L0s
  3511. * NOTE: This is no-op for 3945 (non-existent bit)
  3512. */
  3513. il_set_bit(il, CSR_HW_IF_CONFIG_REG,
  3514. CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
  3515. /*
  3516. * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
  3517. * Check if BIOS (or OS) enabled L1-ASPM on this device.
  3518. * If so (likely), disable L0S, so device moves directly L0->L1;
  3519. * costs negligible amount of power savings.
  3520. * If not (unlikely), enable L0S, so there is at least some
  3521. * power savings, even without L1.
  3522. */
  3523. if (il->cfg->base_params->set_l0s) {
  3524. lctl = il_pcie_link_ctl(il);
  3525. if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
  3526. PCI_CFG_LINK_CTRL_VAL_L1_EN) {
  3527. /* L1-ASPM enabled; disable(!) L0S */
  3528. il_set_bit(il, CSR_GIO_REG,
  3529. CSR_GIO_REG_VAL_L0S_ENABLED);
  3530. D_POWER("L1 Enabled; Disabling L0S\n");
  3531. } else {
  3532. /* L1-ASPM disabled; enable(!) L0S */
  3533. il_clear_bit(il, CSR_GIO_REG,
  3534. CSR_GIO_REG_VAL_L0S_ENABLED);
  3535. D_POWER("L1 Disabled; Enabling L0S\n");
  3536. }
  3537. }
  3538. /* Configure analog phase-lock-loop before activating to D0A */
  3539. if (il->cfg->base_params->pll_cfg_val)
  3540. il_set_bit(il, CSR_ANA_PLL_CFG,
  3541. il->cfg->base_params->pll_cfg_val);
  3542. /*
  3543. * Set "initialization complete" bit to move adapter from
  3544. * D0U* --> D0A* (powered-up active) state.
  3545. */
  3546. il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  3547. /*
  3548. * Wait for clock stabilization; once stabilized, access to
  3549. * device-internal resources is supported, e.g. il_wr_prph()
  3550. * and accesses to uCode SRAM.
  3551. */
  3552. ret = _il_poll_bit(il, CSR_GP_CNTRL,
  3553. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  3554. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  3555. if (ret < 0) {
  3556. D_INFO("Failed to init the card\n");
  3557. goto out;
  3558. }
  3559. /*
  3560. * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
  3561. * BSM (Boostrap State Machine) is only in 3945 and 4965.
  3562. *
  3563. * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
  3564. * do not disable clocks. This preserves any hardware bits already
  3565. * set by default in "CLK_CTRL_REG" after reset.
  3566. */
  3567. if (il->cfg->base_params->use_bsm)
  3568. il_wr_prph(il, APMG_CLK_EN_REG,
  3569. APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
  3570. else
  3571. il_wr_prph(il, APMG_CLK_EN_REG,
  3572. APMG_CLK_VAL_DMA_CLK_RQT);
  3573. udelay(20);
  3574. /* Disable L1-Active */
  3575. il_set_bits_prph(il, APMG_PCIDEV_STT_REG,
  3576. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  3577. out:
  3578. return ret;
  3579. }
  3580. EXPORT_SYMBOL(il_apm_init);
  3581. int il_set_tx_power(struct il_priv *il, s8 tx_power, bool force)
  3582. {
  3583. int ret;
  3584. s8 prev_tx_power;
  3585. bool defer;
  3586. struct il_rxon_context *ctx = &il->ctx;
  3587. lockdep_assert_held(&il->mutex);
  3588. if (il->tx_power_user_lmt == tx_power && !force)
  3589. return 0;
  3590. if (!il->cfg->ops->lib->send_tx_power)
  3591. return -EOPNOTSUPP;
  3592. /* 0 dBm mean 1 milliwatt */
  3593. if (tx_power < 0) {
  3594. IL_WARN(
  3595. "Requested user TXPOWER %d below 1 mW.\n",
  3596. tx_power);
  3597. return -EINVAL;
  3598. }
  3599. if (tx_power > il->tx_power_device_lmt) {
  3600. IL_WARN(
  3601. "Requested user TXPOWER %d above upper limit %d.\n",
  3602. tx_power, il->tx_power_device_lmt);
  3603. return -EINVAL;
  3604. }
  3605. if (!il_is_ready_rf(il))
  3606. return -EIO;
  3607. /* scan complete and commit_rxon use tx_power_next value,
  3608. * it always need to be updated for newest request */
  3609. il->tx_power_next = tx_power;
  3610. /* do not set tx power when scanning or channel changing */
  3611. defer = test_bit(S_SCANNING, &il->status) ||
  3612. memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging));
  3613. if (defer && !force) {
  3614. D_INFO("Deferring tx power set\n");
  3615. return 0;
  3616. }
  3617. prev_tx_power = il->tx_power_user_lmt;
  3618. il->tx_power_user_lmt = tx_power;
  3619. ret = il->cfg->ops->lib->send_tx_power(il);
  3620. /* if fail to set tx_power, restore the orig. tx power */
  3621. if (ret) {
  3622. il->tx_power_user_lmt = prev_tx_power;
  3623. il->tx_power_next = prev_tx_power;
  3624. }
  3625. return ret;
  3626. }
  3627. EXPORT_SYMBOL(il_set_tx_power);
  3628. void il_send_bt_config(struct il_priv *il)
  3629. {
  3630. struct il_bt_cmd bt_cmd = {
  3631. .lead_time = BT_LEAD_TIME_DEF,
  3632. .max_kill = BT_MAX_KILL_DEF,
  3633. .kill_ack_mask = 0,
  3634. .kill_cts_mask = 0,
  3635. };
  3636. if (!bt_coex_active)
  3637. bt_cmd.flags = BT_COEX_DISABLE;
  3638. else
  3639. bt_cmd.flags = BT_COEX_ENABLE;
  3640. D_INFO("BT coex %s\n",
  3641. (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
  3642. if (il_send_cmd_pdu(il, C_BT_CONFIG,
  3643. sizeof(struct il_bt_cmd), &bt_cmd))
  3644. IL_ERR("failed to send BT Coex Config\n");
  3645. }
  3646. EXPORT_SYMBOL(il_send_bt_config);
  3647. int il_send_stats_request(struct il_priv *il, u8 flags, bool clear)
  3648. {
  3649. struct il_stats_cmd stats_cmd = {
  3650. .configuration_flags =
  3651. clear ? IL_STATS_CONF_CLEAR_STATS : 0,
  3652. };
  3653. if (flags & CMD_ASYNC)
  3654. return il_send_cmd_pdu_async(il, C_STATS,
  3655. sizeof(struct il_stats_cmd),
  3656. &stats_cmd, NULL);
  3657. else
  3658. return il_send_cmd_pdu(il, C_STATS,
  3659. sizeof(struct il_stats_cmd),
  3660. &stats_cmd);
  3661. }
  3662. EXPORT_SYMBOL(il_send_stats_request);
  3663. void il_hdl_pm_sleep(struct il_priv *il,
  3664. struct il_rx_buf *rxb)
  3665. {
  3666. #ifdef CONFIG_IWLEGACY_DEBUG
  3667. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3668. struct il_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3669. D_RX("sleep mode: %d, src: %d\n",
  3670. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3671. #endif
  3672. }
  3673. EXPORT_SYMBOL(il_hdl_pm_sleep);
  3674. void il_hdl_pm_debug_stats(struct il_priv *il,
  3675. struct il_rx_buf *rxb)
  3676. {
  3677. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3678. u32 len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
  3679. D_RADIO("Dumping %d bytes of unhandled "
  3680. "notification for %s:\n", len,
  3681. il_get_cmd_string(pkt->hdr.cmd));
  3682. il_print_hex_dump(il, IL_DL_RADIO, pkt->u.raw, len);
  3683. }
  3684. EXPORT_SYMBOL(il_hdl_pm_debug_stats);
  3685. void il_hdl_error(struct il_priv *il,
  3686. struct il_rx_buf *rxb)
  3687. {
  3688. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3689. IL_ERR("Error Reply type 0x%08X cmd %s (0x%02X) "
  3690. "seq 0x%04X ser 0x%08X\n",
  3691. le32_to_cpu(pkt->u.err_resp.error_type),
  3692. il_get_cmd_string(pkt->u.err_resp.cmd_id),
  3693. pkt->u.err_resp.cmd_id,
  3694. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  3695. le32_to_cpu(pkt->u.err_resp.error_info));
  3696. }
  3697. EXPORT_SYMBOL(il_hdl_error);
  3698. void il_clear_isr_stats(struct il_priv *il)
  3699. {
  3700. memset(&il->isr_stats, 0, sizeof(il->isr_stats));
  3701. }
  3702. int il_mac_conf_tx(struct ieee80211_hw *hw,
  3703. struct ieee80211_vif *vif, u16 queue,
  3704. const struct ieee80211_tx_queue_params *params)
  3705. {
  3706. struct il_priv *il = hw->priv;
  3707. unsigned long flags;
  3708. int q;
  3709. D_MAC80211("enter\n");
  3710. if (!il_is_ready_rf(il)) {
  3711. D_MAC80211("leave - RF not ready\n");
  3712. return -EIO;
  3713. }
  3714. if (queue >= AC_NUM) {
  3715. D_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  3716. return 0;
  3717. }
  3718. q = AC_NUM - 1 - queue;
  3719. spin_lock_irqsave(&il->lock, flags);
  3720. il->ctx.qos_data.def_qos_parm.ac[q].cw_min =
  3721. cpu_to_le16(params->cw_min);
  3722. il->ctx.qos_data.def_qos_parm.ac[q].cw_max =
  3723. cpu_to_le16(params->cw_max);
  3724. il->ctx.qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  3725. il->ctx.qos_data.def_qos_parm.ac[q].edca_txop =
  3726. cpu_to_le16((params->txop * 32));
  3727. il->ctx.qos_data.def_qos_parm.ac[q].reserved1 = 0;
  3728. spin_unlock_irqrestore(&il->lock, flags);
  3729. D_MAC80211("leave\n");
  3730. return 0;
  3731. }
  3732. EXPORT_SYMBOL(il_mac_conf_tx);
  3733. int il_mac_tx_last_beacon(struct ieee80211_hw *hw)
  3734. {
  3735. struct il_priv *il = hw->priv;
  3736. return il->ibss_manager == IL_IBSS_MANAGER;
  3737. }
  3738. EXPORT_SYMBOL_GPL(il_mac_tx_last_beacon);
  3739. static int
  3740. il_set_mode(struct il_priv *il, struct il_rxon_context *ctx)
  3741. {
  3742. il_connection_init_rx_config(il, ctx);
  3743. if (il->cfg->ops->hcmd->set_rxon_chain)
  3744. il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
  3745. return il_commit_rxon(il, ctx);
  3746. }
  3747. static int il_setup_interface(struct il_priv *il,
  3748. struct il_rxon_context *ctx)
  3749. {
  3750. struct ieee80211_vif *vif = ctx->vif;
  3751. int err;
  3752. lockdep_assert_held(&il->mutex);
  3753. /*
  3754. * This variable will be correct only when there's just
  3755. * a single context, but all code using it is for hardware
  3756. * that supports only one context.
  3757. */
  3758. il->iw_mode = vif->type;
  3759. ctx->is_active = true;
  3760. err = il_set_mode(il, ctx);
  3761. if (err) {
  3762. if (!ctx->always_active)
  3763. ctx->is_active = false;
  3764. return err;
  3765. }
  3766. return 0;
  3767. }
  3768. int
  3769. il_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  3770. {
  3771. struct il_priv *il = hw->priv;
  3772. struct il_vif_priv *vif_priv = (void *)vif->drv_priv;
  3773. int err;
  3774. u32 modes;
  3775. D_MAC80211("enter: type %d, addr %pM\n",
  3776. vif->type, vif->addr);
  3777. mutex_lock(&il->mutex);
  3778. if (!il_is_ready_rf(il)) {
  3779. IL_WARN("Try to add interface when device not ready\n");
  3780. err = -EINVAL;
  3781. goto out;
  3782. }
  3783. /* check if busy context is exclusive */
  3784. if (il->ctx.vif &&
  3785. (il->ctx.exclusive_interface_modes & BIT(il->ctx.vif->type))) {
  3786. err = -EINVAL;
  3787. goto out;
  3788. }
  3789. modes = il->ctx.interface_modes | il->ctx.exclusive_interface_modes;
  3790. if (!(modes & BIT(vif->type))) {
  3791. err = -EOPNOTSUPP;
  3792. goto out;
  3793. }
  3794. vif_priv->ctx = &il->ctx;
  3795. il->ctx.vif = vif;
  3796. err = il_setup_interface(il, &il->ctx);
  3797. if (err) {
  3798. il->ctx.vif = NULL;
  3799. il->iw_mode = NL80211_IFTYPE_STATION;
  3800. }
  3801. out:
  3802. mutex_unlock(&il->mutex);
  3803. D_MAC80211("leave\n");
  3804. return err;
  3805. }
  3806. EXPORT_SYMBOL(il_mac_add_interface);
  3807. static void il_teardown_interface(struct il_priv *il,
  3808. struct ieee80211_vif *vif,
  3809. bool mode_change)
  3810. {
  3811. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  3812. lockdep_assert_held(&il->mutex);
  3813. if (il->scan_vif == vif) {
  3814. il_scan_cancel_timeout(il, 200);
  3815. il_force_scan_end(il);
  3816. }
  3817. if (!mode_change) {
  3818. il_set_mode(il, ctx);
  3819. if (!ctx->always_active)
  3820. ctx->is_active = false;
  3821. }
  3822. }
  3823. void il_mac_remove_interface(struct ieee80211_hw *hw,
  3824. struct ieee80211_vif *vif)
  3825. {
  3826. struct il_priv *il = hw->priv;
  3827. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  3828. D_MAC80211("enter\n");
  3829. mutex_lock(&il->mutex);
  3830. WARN_ON(ctx->vif != vif);
  3831. ctx->vif = NULL;
  3832. il_teardown_interface(il, vif, false);
  3833. memset(il->bssid, 0, ETH_ALEN);
  3834. mutex_unlock(&il->mutex);
  3835. D_MAC80211("leave\n");
  3836. }
  3837. EXPORT_SYMBOL(il_mac_remove_interface);
  3838. int il_alloc_txq_mem(struct il_priv *il)
  3839. {
  3840. if (!il->txq)
  3841. il->txq = kzalloc(
  3842. sizeof(struct il_tx_queue) *
  3843. il->cfg->base_params->num_of_queues,
  3844. GFP_KERNEL);
  3845. if (!il->txq) {
  3846. IL_ERR("Not enough memory for txq\n");
  3847. return -ENOMEM;
  3848. }
  3849. return 0;
  3850. }
  3851. EXPORT_SYMBOL(il_alloc_txq_mem);
  3852. void il_txq_mem(struct il_priv *il)
  3853. {
  3854. kfree(il->txq);
  3855. il->txq = NULL;
  3856. }
  3857. EXPORT_SYMBOL(il_txq_mem);
  3858. #ifdef CONFIG_IWLEGACY_DEBUGFS
  3859. #define IL_TRAFFIC_DUMP_SIZE (IL_TRAFFIC_ENTRY_SIZE * IL_TRAFFIC_ENTRIES)
  3860. void il_reset_traffic_log(struct il_priv *il)
  3861. {
  3862. il->tx_traffic_idx = 0;
  3863. il->rx_traffic_idx = 0;
  3864. if (il->tx_traffic)
  3865. memset(il->tx_traffic, 0, IL_TRAFFIC_DUMP_SIZE);
  3866. if (il->rx_traffic)
  3867. memset(il->rx_traffic, 0, IL_TRAFFIC_DUMP_SIZE);
  3868. }
  3869. int il_alloc_traffic_mem(struct il_priv *il)
  3870. {
  3871. u32 traffic_size = IL_TRAFFIC_DUMP_SIZE;
  3872. if (il_debug_level & IL_DL_TX) {
  3873. if (!il->tx_traffic) {
  3874. il->tx_traffic =
  3875. kzalloc(traffic_size, GFP_KERNEL);
  3876. if (!il->tx_traffic)
  3877. return -ENOMEM;
  3878. }
  3879. }
  3880. if (il_debug_level & IL_DL_RX) {
  3881. if (!il->rx_traffic) {
  3882. il->rx_traffic =
  3883. kzalloc(traffic_size, GFP_KERNEL);
  3884. if (!il->rx_traffic)
  3885. return -ENOMEM;
  3886. }
  3887. }
  3888. il_reset_traffic_log(il);
  3889. return 0;
  3890. }
  3891. EXPORT_SYMBOL(il_alloc_traffic_mem);
  3892. void il_free_traffic_mem(struct il_priv *il)
  3893. {
  3894. kfree(il->tx_traffic);
  3895. il->tx_traffic = NULL;
  3896. kfree(il->rx_traffic);
  3897. il->rx_traffic = NULL;
  3898. }
  3899. EXPORT_SYMBOL(il_free_traffic_mem);
  3900. void il_dbg_log_tx_data_frame(struct il_priv *il,
  3901. u16 length, struct ieee80211_hdr *header)
  3902. {
  3903. __le16 fc;
  3904. u16 len;
  3905. if (likely(!(il_debug_level & IL_DL_TX)))
  3906. return;
  3907. if (!il->tx_traffic)
  3908. return;
  3909. fc = header->frame_control;
  3910. if (ieee80211_is_data(fc)) {
  3911. len = (length > IL_TRAFFIC_ENTRY_SIZE)
  3912. ? IL_TRAFFIC_ENTRY_SIZE : length;
  3913. memcpy((il->tx_traffic +
  3914. (il->tx_traffic_idx * IL_TRAFFIC_ENTRY_SIZE)),
  3915. header, len);
  3916. il->tx_traffic_idx =
  3917. (il->tx_traffic_idx + 1) % IL_TRAFFIC_ENTRIES;
  3918. }
  3919. }
  3920. EXPORT_SYMBOL(il_dbg_log_tx_data_frame);
  3921. void il_dbg_log_rx_data_frame(struct il_priv *il,
  3922. u16 length, struct ieee80211_hdr *header)
  3923. {
  3924. __le16 fc;
  3925. u16 len;
  3926. if (likely(!(il_debug_level & IL_DL_RX)))
  3927. return;
  3928. if (!il->rx_traffic)
  3929. return;
  3930. fc = header->frame_control;
  3931. if (ieee80211_is_data(fc)) {
  3932. len = (length > IL_TRAFFIC_ENTRY_SIZE)
  3933. ? IL_TRAFFIC_ENTRY_SIZE : length;
  3934. memcpy((il->rx_traffic +
  3935. (il->rx_traffic_idx * IL_TRAFFIC_ENTRY_SIZE)),
  3936. header, len);
  3937. il->rx_traffic_idx =
  3938. (il->rx_traffic_idx + 1) % IL_TRAFFIC_ENTRIES;
  3939. }
  3940. }
  3941. EXPORT_SYMBOL(il_dbg_log_rx_data_frame);
  3942. const char *il_get_mgmt_string(int cmd)
  3943. {
  3944. switch (cmd) {
  3945. IL_CMD(MANAGEMENT_ASSOC_REQ);
  3946. IL_CMD(MANAGEMENT_ASSOC_RESP);
  3947. IL_CMD(MANAGEMENT_REASSOC_REQ);
  3948. IL_CMD(MANAGEMENT_REASSOC_RESP);
  3949. IL_CMD(MANAGEMENT_PROBE_REQ);
  3950. IL_CMD(MANAGEMENT_PROBE_RESP);
  3951. IL_CMD(MANAGEMENT_BEACON);
  3952. IL_CMD(MANAGEMENT_ATIM);
  3953. IL_CMD(MANAGEMENT_DISASSOC);
  3954. IL_CMD(MANAGEMENT_AUTH);
  3955. IL_CMD(MANAGEMENT_DEAUTH);
  3956. IL_CMD(MANAGEMENT_ACTION);
  3957. default:
  3958. return "UNKNOWN";
  3959. }
  3960. }
  3961. const char *il_get_ctrl_string(int cmd)
  3962. {
  3963. switch (cmd) {
  3964. IL_CMD(CONTROL_BACK_REQ);
  3965. IL_CMD(CONTROL_BACK);
  3966. IL_CMD(CONTROL_PSPOLL);
  3967. IL_CMD(CONTROL_RTS);
  3968. IL_CMD(CONTROL_CTS);
  3969. IL_CMD(CONTROL_ACK);
  3970. IL_CMD(CONTROL_CFEND);
  3971. IL_CMD(CONTROL_CFENDACK);
  3972. default:
  3973. return "UNKNOWN";
  3974. }
  3975. }
  3976. void il_clear_traffic_stats(struct il_priv *il)
  3977. {
  3978. memset(&il->tx_stats, 0, sizeof(struct traffic_stats));
  3979. memset(&il->rx_stats, 0, sizeof(struct traffic_stats));
  3980. }
  3981. /*
  3982. * if CONFIG_IWLEGACY_DEBUGFS defined,
  3983. * il_update_stats function will
  3984. * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass
  3985. * Use debugFs to display the rx/rx_stats
  3986. * if CONFIG_IWLEGACY_DEBUGFS not being defined, then no MGMT and CTRL
  3987. * information will be recorded, but DATA pkt still will be recorded
  3988. * for the reason of il_led.c need to control the led blinking based on
  3989. * number of tx and rx data.
  3990. *
  3991. */
  3992. void
  3993. il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, u16 len)
  3994. {
  3995. struct traffic_stats *stats;
  3996. if (is_tx)
  3997. stats = &il->tx_stats;
  3998. else
  3999. stats = &il->rx_stats;
  4000. if (ieee80211_is_mgmt(fc)) {
  4001. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  4002. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  4003. stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
  4004. break;
  4005. case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
  4006. stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
  4007. break;
  4008. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  4009. stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
  4010. break;
  4011. case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
  4012. stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
  4013. break;
  4014. case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
  4015. stats->mgmt[MANAGEMENT_PROBE_REQ]++;
  4016. break;
  4017. case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
  4018. stats->mgmt[MANAGEMENT_PROBE_RESP]++;
  4019. break;
  4020. case cpu_to_le16(IEEE80211_STYPE_BEACON):
  4021. stats->mgmt[MANAGEMENT_BEACON]++;
  4022. break;
  4023. case cpu_to_le16(IEEE80211_STYPE_ATIM):
  4024. stats->mgmt[MANAGEMENT_ATIM]++;
  4025. break;
  4026. case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
  4027. stats->mgmt[MANAGEMENT_DISASSOC]++;
  4028. break;
  4029. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  4030. stats->mgmt[MANAGEMENT_AUTH]++;
  4031. break;
  4032. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  4033. stats->mgmt[MANAGEMENT_DEAUTH]++;
  4034. break;
  4035. case cpu_to_le16(IEEE80211_STYPE_ACTION):
  4036. stats->mgmt[MANAGEMENT_ACTION]++;
  4037. break;
  4038. }
  4039. } else if (ieee80211_is_ctl(fc)) {
  4040. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  4041. case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
  4042. stats->ctrl[CONTROL_BACK_REQ]++;
  4043. break;
  4044. case cpu_to_le16(IEEE80211_STYPE_BACK):
  4045. stats->ctrl[CONTROL_BACK]++;
  4046. break;
  4047. case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
  4048. stats->ctrl[CONTROL_PSPOLL]++;
  4049. break;
  4050. case cpu_to_le16(IEEE80211_STYPE_RTS):
  4051. stats->ctrl[CONTROL_RTS]++;
  4052. break;
  4053. case cpu_to_le16(IEEE80211_STYPE_CTS):
  4054. stats->ctrl[CONTROL_CTS]++;
  4055. break;
  4056. case cpu_to_le16(IEEE80211_STYPE_ACK):
  4057. stats->ctrl[CONTROL_ACK]++;
  4058. break;
  4059. case cpu_to_le16(IEEE80211_STYPE_CFEND):
  4060. stats->ctrl[CONTROL_CFEND]++;
  4061. break;
  4062. case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
  4063. stats->ctrl[CONTROL_CFENDACK]++;
  4064. break;
  4065. }
  4066. } else {
  4067. /* data */
  4068. stats->data_cnt++;
  4069. stats->data_bytes += len;
  4070. }
  4071. }
  4072. EXPORT_SYMBOL(il_update_stats);
  4073. #endif
  4074. int il_force_reset(struct il_priv *il, bool external)
  4075. {
  4076. struct il_force_reset *force_reset;
  4077. if (test_bit(S_EXIT_PENDING, &il->status))
  4078. return -EINVAL;
  4079. force_reset = &il->force_reset;
  4080. force_reset->reset_request_count++;
  4081. if (!external) {
  4082. if (force_reset->last_force_reset_jiffies &&
  4083. time_after(force_reset->last_force_reset_jiffies +
  4084. force_reset->reset_duration, jiffies)) {
  4085. D_INFO("force reset rejected\n");
  4086. force_reset->reset_reject_count++;
  4087. return -EAGAIN;
  4088. }
  4089. }
  4090. force_reset->reset_success_count++;
  4091. force_reset->last_force_reset_jiffies = jiffies;
  4092. /*
  4093. * if the request is from external(ex: debugfs),
  4094. * then always perform the request in regardless the module
  4095. * parameter setting
  4096. * if the request is from internal (uCode error or driver
  4097. * detect failure), then fw_restart module parameter
  4098. * need to be check before performing firmware reload
  4099. */
  4100. if (!external && !il->cfg->mod_params->restart_fw) {
  4101. D_INFO("Cancel firmware reload based on "
  4102. "module parameter setting\n");
  4103. return 0;
  4104. }
  4105. IL_ERR("On demand firmware reload\n");
  4106. /* Set the FW error flag -- cleared on il_down */
  4107. set_bit(S_FW_ERROR, &il->status);
  4108. wake_up(&il->wait_command_queue);
  4109. /*
  4110. * Keep the restart process from trying to send host
  4111. * commands by clearing the INIT status bit
  4112. */
  4113. clear_bit(S_READY, &il->status);
  4114. queue_work(il->workqueue, &il->restart);
  4115. return 0;
  4116. }
  4117. int
  4118. il_mac_change_interface(struct ieee80211_hw *hw,
  4119. struct ieee80211_vif *vif,
  4120. enum nl80211_iftype newtype, bool newp2p)
  4121. {
  4122. struct il_priv *il = hw->priv;
  4123. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  4124. u32 modes;
  4125. int err;
  4126. newtype = ieee80211_iftype_p2p(newtype, newp2p);
  4127. mutex_lock(&il->mutex);
  4128. if (!ctx->vif || !il_is_ready_rf(il)) {
  4129. /*
  4130. * Huh? But wait ... this can maybe happen when
  4131. * we're in the middle of a firmware restart!
  4132. */
  4133. err = -EBUSY;
  4134. goto out;
  4135. }
  4136. modes = ctx->interface_modes | ctx->exclusive_interface_modes;
  4137. if (!(modes & BIT(newtype))) {
  4138. err = -EOPNOTSUPP;
  4139. goto out;
  4140. }
  4141. if ((il->ctx.exclusive_interface_modes & BIT(il->ctx.vif->type)) ||
  4142. (il->ctx.exclusive_interface_modes & BIT(newtype))) {
  4143. err = -EINVAL;
  4144. goto out;
  4145. }
  4146. /* success */
  4147. il_teardown_interface(il, vif, true);
  4148. vif->type = newtype;
  4149. vif->p2p = newp2p;
  4150. err = il_setup_interface(il, ctx);
  4151. WARN_ON(err);
  4152. /*
  4153. * We've switched internally, but submitting to the
  4154. * device may have failed for some reason. Mask this
  4155. * error, because otherwise mac80211 will not switch
  4156. * (and set the interface type back) and we'll be
  4157. * out of sync with it.
  4158. */
  4159. err = 0;
  4160. out:
  4161. mutex_unlock(&il->mutex);
  4162. return err;
  4163. }
  4164. EXPORT_SYMBOL(il_mac_change_interface);
  4165. /*
  4166. * On every watchdog tick we check (latest) time stamp. If it does not
  4167. * change during timeout period and queue is not empty we reset firmware.
  4168. */
  4169. static int il_check_stuck_queue(struct il_priv *il, int cnt)
  4170. {
  4171. struct il_tx_queue *txq = &il->txq[cnt];
  4172. struct il_queue *q = &txq->q;
  4173. unsigned long timeout;
  4174. int ret;
  4175. if (q->read_ptr == q->write_ptr) {
  4176. txq->time_stamp = jiffies;
  4177. return 0;
  4178. }
  4179. timeout = txq->time_stamp +
  4180. msecs_to_jiffies(il->cfg->base_params->wd_timeout);
  4181. if (time_after(jiffies, timeout)) {
  4182. IL_ERR("Queue %d stuck for %u ms.\n",
  4183. q->id, il->cfg->base_params->wd_timeout);
  4184. ret = il_force_reset(il, false);
  4185. return (ret == -EAGAIN) ? 0 : 1;
  4186. }
  4187. return 0;
  4188. }
  4189. /*
  4190. * Making watchdog tick be a quarter of timeout assure we will
  4191. * discover the queue hung between timeout and 1.25*timeout
  4192. */
  4193. #define IL_WD_TICK(timeout) ((timeout) / 4)
  4194. /*
  4195. * Watchdog timer callback, we check each tx queue for stuck, if if hung
  4196. * we reset the firmware. If everything is fine just rearm the timer.
  4197. */
  4198. void il_bg_watchdog(unsigned long data)
  4199. {
  4200. struct il_priv *il = (struct il_priv *)data;
  4201. int cnt;
  4202. unsigned long timeout;
  4203. if (test_bit(S_EXIT_PENDING, &il->status))
  4204. return;
  4205. timeout = il->cfg->base_params->wd_timeout;
  4206. if (timeout == 0)
  4207. return;
  4208. /* monitor and check for stuck cmd queue */
  4209. if (il_check_stuck_queue(il, il->cmd_queue))
  4210. return;
  4211. /* monitor and check for other stuck queues */
  4212. if (il_is_any_associated(il)) {
  4213. for (cnt = 0; cnt < il->hw_params.max_txq_num; cnt++) {
  4214. /* skip as we already checked the command queue */
  4215. if (cnt == il->cmd_queue)
  4216. continue;
  4217. if (il_check_stuck_queue(il, cnt))
  4218. return;
  4219. }
  4220. }
  4221. mod_timer(&il->watchdog, jiffies +
  4222. msecs_to_jiffies(IL_WD_TICK(timeout)));
  4223. }
  4224. EXPORT_SYMBOL(il_bg_watchdog);
  4225. void il_setup_watchdog(struct il_priv *il)
  4226. {
  4227. unsigned int timeout = il->cfg->base_params->wd_timeout;
  4228. if (timeout)
  4229. mod_timer(&il->watchdog,
  4230. jiffies + msecs_to_jiffies(IL_WD_TICK(timeout)));
  4231. else
  4232. del_timer(&il->watchdog);
  4233. }
  4234. EXPORT_SYMBOL(il_setup_watchdog);
  4235. /*
  4236. * extended beacon time format
  4237. * time in usec will be changed into a 32-bit value in extended:internal format
  4238. * the extended part is the beacon counts
  4239. * the internal part is the time in usec within one beacon interval
  4240. */
  4241. u32
  4242. il_usecs_to_beacons(struct il_priv *il,
  4243. u32 usec, u32 beacon_interval)
  4244. {
  4245. u32 quot;
  4246. u32 rem;
  4247. u32 interval = beacon_interval * TIME_UNIT;
  4248. if (!interval || !usec)
  4249. return 0;
  4250. quot = (usec / interval) &
  4251. (il_beacon_time_mask_high(il,
  4252. il->hw_params.beacon_time_tsf_bits) >>
  4253. il->hw_params.beacon_time_tsf_bits);
  4254. rem = (usec % interval) & il_beacon_time_mask_low(il,
  4255. il->hw_params.beacon_time_tsf_bits);
  4256. return (quot << il->hw_params.beacon_time_tsf_bits) + rem;
  4257. }
  4258. EXPORT_SYMBOL(il_usecs_to_beacons);
  4259. /* base is usually what we get from ucode with each received frame,
  4260. * the same as HW timer counter counting down
  4261. */
  4262. __le32 il_add_beacon_time(struct il_priv *il, u32 base,
  4263. u32 addon, u32 beacon_interval)
  4264. {
  4265. u32 base_low = base & il_beacon_time_mask_low(il,
  4266. il->hw_params.beacon_time_tsf_bits);
  4267. u32 addon_low = addon & il_beacon_time_mask_low(il,
  4268. il->hw_params.beacon_time_tsf_bits);
  4269. u32 interval = beacon_interval * TIME_UNIT;
  4270. u32 res = (base & il_beacon_time_mask_high(il,
  4271. il->hw_params.beacon_time_tsf_bits)) +
  4272. (addon & il_beacon_time_mask_high(il,
  4273. il->hw_params.beacon_time_tsf_bits));
  4274. if (base_low > addon_low)
  4275. res += base_low - addon_low;
  4276. else if (base_low < addon_low) {
  4277. res += interval + base_low - addon_low;
  4278. res += (1 << il->hw_params.beacon_time_tsf_bits);
  4279. } else
  4280. res += (1 << il->hw_params.beacon_time_tsf_bits);
  4281. return cpu_to_le32(res);
  4282. }
  4283. EXPORT_SYMBOL(il_add_beacon_time);
  4284. #ifdef CONFIG_PM
  4285. int il_pci_suspend(struct device *device)
  4286. {
  4287. struct pci_dev *pdev = to_pci_dev(device);
  4288. struct il_priv *il = pci_get_drvdata(pdev);
  4289. /*
  4290. * This function is called when system goes into suspend state
  4291. * mac80211 will call il_mac_stop() from the mac80211 suspend function
  4292. * first but since il_mac_stop() has no knowledge of who the caller is,
  4293. * it will not call apm_ops.stop() to stop the DMA operation.
  4294. * Calling apm_ops.stop here to make sure we stop the DMA.
  4295. */
  4296. il_apm_stop(il);
  4297. return 0;
  4298. }
  4299. EXPORT_SYMBOL(il_pci_suspend);
  4300. int il_pci_resume(struct device *device)
  4301. {
  4302. struct pci_dev *pdev = to_pci_dev(device);
  4303. struct il_priv *il = pci_get_drvdata(pdev);
  4304. bool hw_rfkill = false;
  4305. /*
  4306. * We disable the RETRY_TIMEOUT register (0x41) to keep
  4307. * PCI Tx retries from interfering with C3 CPU state.
  4308. */
  4309. pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
  4310. il_enable_interrupts(il);
  4311. if (!(_il_rd(il, CSR_GP_CNTRL) &
  4312. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4313. hw_rfkill = true;
  4314. if (hw_rfkill)
  4315. set_bit(S_RF_KILL_HW, &il->status);
  4316. else
  4317. clear_bit(S_RF_KILL_HW, &il->status);
  4318. wiphy_rfkill_set_hw_state(il->hw->wiphy, hw_rfkill);
  4319. return 0;
  4320. }
  4321. EXPORT_SYMBOL(il_pci_resume);
  4322. const struct dev_pm_ops il_pm_ops = {
  4323. .suspend = il_pci_suspend,
  4324. .resume = il_pci_resume,
  4325. .freeze = il_pci_suspend,
  4326. .thaw = il_pci_resume,
  4327. .poweroff = il_pci_suspend,
  4328. .restore = il_pci_resume,
  4329. };
  4330. EXPORT_SYMBOL(il_pm_ops);
  4331. #endif /* CONFIG_PM */
  4332. static void
  4333. il_update_qos(struct il_priv *il, struct il_rxon_context *ctx)
  4334. {
  4335. if (test_bit(S_EXIT_PENDING, &il->status))
  4336. return;
  4337. if (!ctx->is_active)
  4338. return;
  4339. ctx->qos_data.def_qos_parm.qos_flags = 0;
  4340. if (ctx->qos_data.qos_active)
  4341. ctx->qos_data.def_qos_parm.qos_flags |=
  4342. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  4343. if (ctx->ht.enabled)
  4344. ctx->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  4345. D_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  4346. ctx->qos_data.qos_active,
  4347. ctx->qos_data.def_qos_parm.qos_flags);
  4348. il_send_cmd_pdu_async(il, ctx->qos_cmd,
  4349. sizeof(struct il_qosparam_cmd),
  4350. &ctx->qos_data.def_qos_parm, NULL);
  4351. }
  4352. /**
  4353. * il_mac_config - mac80211 config callback
  4354. */
  4355. int il_mac_config(struct ieee80211_hw *hw, u32 changed)
  4356. {
  4357. struct il_priv *il = hw->priv;
  4358. const struct il_channel_info *ch_info;
  4359. struct ieee80211_conf *conf = &hw->conf;
  4360. struct ieee80211_channel *channel = conf->channel;
  4361. struct il_ht_config *ht_conf = &il->current_ht_config;
  4362. struct il_rxon_context *ctx = &il->ctx;
  4363. unsigned long flags = 0;
  4364. int ret = 0;
  4365. u16 ch;
  4366. int scan_active = 0;
  4367. bool ht_changed = false;
  4368. if (WARN_ON(!il->cfg->ops->legacy))
  4369. return -EOPNOTSUPP;
  4370. mutex_lock(&il->mutex);
  4371. D_MAC80211("enter to channel %d changed 0x%X\n",
  4372. channel->hw_value, changed);
  4373. if (unlikely(test_bit(S_SCANNING, &il->status))) {
  4374. scan_active = 1;
  4375. D_MAC80211("scan active\n");
  4376. }
  4377. if (changed & (IEEE80211_CONF_CHANGE_SMPS |
  4378. IEEE80211_CONF_CHANGE_CHANNEL)) {
  4379. /* mac80211 uses static for non-HT which is what we want */
  4380. il->current_ht_config.smps = conf->smps_mode;
  4381. /*
  4382. * Recalculate chain counts.
  4383. *
  4384. * If monitor mode is enabled then mac80211 will
  4385. * set up the SM PS mode to OFF if an HT channel is
  4386. * configured.
  4387. */
  4388. if (il->cfg->ops->hcmd->set_rxon_chain)
  4389. il->cfg->ops->hcmd->set_rxon_chain(il, &il->ctx);
  4390. }
  4391. /* during scanning mac80211 will delay channel setting until
  4392. * scan finish with changed = 0
  4393. */
  4394. if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
  4395. if (scan_active)
  4396. goto set_ch_out;
  4397. ch = channel->hw_value;
  4398. ch_info = il_get_channel_info(il, channel->band, ch);
  4399. if (!il_is_channel_valid(ch_info)) {
  4400. D_MAC80211("leave - invalid channel\n");
  4401. ret = -EINVAL;
  4402. goto set_ch_out;
  4403. }
  4404. if (il->iw_mode == NL80211_IFTYPE_ADHOC &&
  4405. !il_is_channel_ibss(ch_info)) {
  4406. D_MAC80211("leave - not IBSS channel\n");
  4407. ret = -EINVAL;
  4408. goto set_ch_out;
  4409. }
  4410. spin_lock_irqsave(&il->lock, flags);
  4411. /* Configure HT40 channels */
  4412. if (ctx->ht.enabled != conf_is_ht(conf)) {
  4413. ctx->ht.enabled = conf_is_ht(conf);
  4414. ht_changed = true;
  4415. }
  4416. if (ctx->ht.enabled) {
  4417. if (conf_is_ht40_minus(conf)) {
  4418. ctx->ht.extension_chan_offset =
  4419. IEEE80211_HT_PARAM_CHA_SEC_BELOW;
  4420. ctx->ht.is_40mhz = true;
  4421. } else if (conf_is_ht40_plus(conf)) {
  4422. ctx->ht.extension_chan_offset =
  4423. IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
  4424. ctx->ht.is_40mhz = true;
  4425. } else {
  4426. ctx->ht.extension_chan_offset =
  4427. IEEE80211_HT_PARAM_CHA_SEC_NONE;
  4428. ctx->ht.is_40mhz = false;
  4429. }
  4430. } else
  4431. ctx->ht.is_40mhz = false;
  4432. /*
  4433. * Default to no protection. Protection mode will
  4434. * later be set from BSS config in il_ht_conf
  4435. */
  4436. ctx->ht.protection =
  4437. IEEE80211_HT_OP_MODE_PROTECTION_NONE;
  4438. /* if we are switching from ht to 2.4 clear flags
  4439. * from any ht related info since 2.4 does not
  4440. * support ht */
  4441. if ((le16_to_cpu(ctx->staging.channel) != ch))
  4442. ctx->staging.flags = 0;
  4443. il_set_rxon_channel(il, channel, ctx);
  4444. il_set_rxon_ht(il, ht_conf);
  4445. il_set_flags_for_band(il, ctx, channel->band,
  4446. ctx->vif);
  4447. spin_unlock_irqrestore(&il->lock, flags);
  4448. if (il->cfg->ops->legacy->update_bcast_stations)
  4449. ret =
  4450. il->cfg->ops->legacy->update_bcast_stations(il);
  4451. set_ch_out:
  4452. /* The list of supported rates and rate mask can be different
  4453. * for each band; since the band may have changed, reset
  4454. * the rate mask to what mac80211 lists */
  4455. il_set_rate(il);
  4456. }
  4457. if (changed & (IEEE80211_CONF_CHANGE_PS |
  4458. IEEE80211_CONF_CHANGE_IDLE)) {
  4459. ret = il_power_update_mode(il, false);
  4460. if (ret)
  4461. D_MAC80211("Error setting sleep level\n");
  4462. }
  4463. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  4464. D_MAC80211("TX Power old=%d new=%d\n",
  4465. il->tx_power_user_lmt, conf->power_level);
  4466. il_set_tx_power(il, conf->power_level, false);
  4467. }
  4468. if (!il_is_ready(il)) {
  4469. D_MAC80211("leave - not ready\n");
  4470. goto out;
  4471. }
  4472. if (scan_active)
  4473. goto out;
  4474. if (memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging)))
  4475. il_commit_rxon(il, ctx);
  4476. else
  4477. D_INFO("Not re-sending same RXON configuration.\n");
  4478. if (ht_changed)
  4479. il_update_qos(il, ctx);
  4480. out:
  4481. D_MAC80211("leave\n");
  4482. mutex_unlock(&il->mutex);
  4483. return ret;
  4484. }
  4485. EXPORT_SYMBOL(il_mac_config);
  4486. void il_mac_reset_tsf(struct ieee80211_hw *hw,
  4487. struct ieee80211_vif *vif)
  4488. {
  4489. struct il_priv *il = hw->priv;
  4490. unsigned long flags;
  4491. struct il_rxon_context *ctx = &il->ctx;
  4492. if (WARN_ON(!il->cfg->ops->legacy))
  4493. return;
  4494. mutex_lock(&il->mutex);
  4495. D_MAC80211("enter\n");
  4496. spin_lock_irqsave(&il->lock, flags);
  4497. memset(&il->current_ht_config, 0, sizeof(struct il_ht_config));
  4498. spin_unlock_irqrestore(&il->lock, flags);
  4499. spin_lock_irqsave(&il->lock, flags);
  4500. /* new association get rid of ibss beacon skb */
  4501. if (il->beacon_skb)
  4502. dev_kfree_skb(il->beacon_skb);
  4503. il->beacon_skb = NULL;
  4504. il->timestamp = 0;
  4505. spin_unlock_irqrestore(&il->lock, flags);
  4506. il_scan_cancel_timeout(il, 100);
  4507. if (!il_is_ready_rf(il)) {
  4508. D_MAC80211("leave - not ready\n");
  4509. mutex_unlock(&il->mutex);
  4510. return;
  4511. }
  4512. /* we are restarting association process
  4513. * clear RXON_FILTER_ASSOC_MSK bit
  4514. */
  4515. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4516. il_commit_rxon(il, ctx);
  4517. il_set_rate(il);
  4518. mutex_unlock(&il->mutex);
  4519. D_MAC80211("leave\n");
  4520. }
  4521. EXPORT_SYMBOL(il_mac_reset_tsf);
  4522. static void il_ht_conf(struct il_priv *il,
  4523. struct ieee80211_vif *vif)
  4524. {
  4525. struct il_ht_config *ht_conf = &il->current_ht_config;
  4526. struct ieee80211_sta *sta;
  4527. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  4528. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  4529. D_ASSOC("enter:\n");
  4530. if (!ctx->ht.enabled)
  4531. return;
  4532. ctx->ht.protection =
  4533. bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
  4534. ctx->ht.non_gf_sta_present =
  4535. !!(bss_conf->ht_operation_mode &
  4536. IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
  4537. ht_conf->single_chain_sufficient = false;
  4538. switch (vif->type) {
  4539. case NL80211_IFTYPE_STATION:
  4540. rcu_read_lock();
  4541. sta = ieee80211_find_sta(vif, bss_conf->bssid);
  4542. if (sta) {
  4543. struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
  4544. int maxstreams;
  4545. maxstreams = (ht_cap->mcs.tx_params &
  4546. IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
  4547. >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  4548. maxstreams += 1;
  4549. if (ht_cap->mcs.rx_mask[1] == 0 &&
  4550. ht_cap->mcs.rx_mask[2] == 0)
  4551. ht_conf->single_chain_sufficient = true;
  4552. if (maxstreams <= 1)
  4553. ht_conf->single_chain_sufficient = true;
  4554. } else {
  4555. /*
  4556. * If at all, this can only happen through a race
  4557. * when the AP disconnects us while we're still
  4558. * setting up the connection, in that case mac80211
  4559. * will soon tell us about that.
  4560. */
  4561. ht_conf->single_chain_sufficient = true;
  4562. }
  4563. rcu_read_unlock();
  4564. break;
  4565. case NL80211_IFTYPE_ADHOC:
  4566. ht_conf->single_chain_sufficient = true;
  4567. break;
  4568. default:
  4569. break;
  4570. }
  4571. D_ASSOC("leave\n");
  4572. }
  4573. static inline void il_set_no_assoc(struct il_priv *il,
  4574. struct ieee80211_vif *vif)
  4575. {
  4576. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  4577. /*
  4578. * inform the ucode that there is no longer an
  4579. * association and that no more packets should be
  4580. * sent
  4581. */
  4582. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4583. ctx->staging.assoc_id = 0;
  4584. il_commit_rxon(il, ctx);
  4585. }
  4586. static void il_beacon_update(struct ieee80211_hw *hw,
  4587. struct ieee80211_vif *vif)
  4588. {
  4589. struct il_priv *il = hw->priv;
  4590. unsigned long flags;
  4591. __le64 timestamp;
  4592. struct sk_buff *skb = ieee80211_beacon_get(hw, vif);
  4593. if (!skb)
  4594. return;
  4595. D_MAC80211("enter\n");
  4596. lockdep_assert_held(&il->mutex);
  4597. if (!il->beacon_ctx) {
  4598. IL_ERR("update beacon but no beacon context!\n");
  4599. dev_kfree_skb(skb);
  4600. return;
  4601. }
  4602. spin_lock_irqsave(&il->lock, flags);
  4603. if (il->beacon_skb)
  4604. dev_kfree_skb(il->beacon_skb);
  4605. il->beacon_skb = skb;
  4606. timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
  4607. il->timestamp = le64_to_cpu(timestamp);
  4608. D_MAC80211("leave\n");
  4609. spin_unlock_irqrestore(&il->lock, flags);
  4610. if (!il_is_ready_rf(il)) {
  4611. D_MAC80211("leave - RF not ready\n");
  4612. return;
  4613. }
  4614. il->cfg->ops->legacy->post_associate(il);
  4615. }
  4616. void il_mac_bss_info_changed(struct ieee80211_hw *hw,
  4617. struct ieee80211_vif *vif,
  4618. struct ieee80211_bss_conf *bss_conf,
  4619. u32 changes)
  4620. {
  4621. struct il_priv *il = hw->priv;
  4622. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  4623. int ret;
  4624. if (WARN_ON(!il->cfg->ops->legacy))
  4625. return;
  4626. D_MAC80211("changes = 0x%X\n", changes);
  4627. mutex_lock(&il->mutex);
  4628. if (!il_is_alive(il)) {
  4629. mutex_unlock(&il->mutex);
  4630. return;
  4631. }
  4632. if (changes & BSS_CHANGED_QOS) {
  4633. unsigned long flags;
  4634. spin_lock_irqsave(&il->lock, flags);
  4635. ctx->qos_data.qos_active = bss_conf->qos;
  4636. il_update_qos(il, ctx);
  4637. spin_unlock_irqrestore(&il->lock, flags);
  4638. }
  4639. if (changes & BSS_CHANGED_BEACON_ENABLED) {
  4640. /*
  4641. * the add_interface code must make sure we only ever
  4642. * have a single interface that could be beaconing at
  4643. * any time.
  4644. */
  4645. if (vif->bss_conf.enable_beacon)
  4646. il->beacon_ctx = ctx;
  4647. else
  4648. il->beacon_ctx = NULL;
  4649. }
  4650. if (changes & BSS_CHANGED_BSSID) {
  4651. D_MAC80211("BSSID %pM\n", bss_conf->bssid);
  4652. /*
  4653. * If there is currently a HW scan going on in the
  4654. * background then we need to cancel it else the RXON
  4655. * below/in post_associate will fail.
  4656. */
  4657. if (il_scan_cancel_timeout(il, 100)) {
  4658. IL_WARN(
  4659. "Aborted scan still in progress after 100ms\n");
  4660. D_MAC80211(
  4661. "leaving - scan abort failed.\n");
  4662. mutex_unlock(&il->mutex);
  4663. return;
  4664. }
  4665. /* mac80211 only sets assoc when in STATION mode */
  4666. if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) {
  4667. memcpy(ctx->staging.bssid_addr,
  4668. bss_conf->bssid, ETH_ALEN);
  4669. /* currently needed in a few places */
  4670. memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
  4671. } else {
  4672. ctx->staging.filter_flags &=
  4673. ~RXON_FILTER_ASSOC_MSK;
  4674. }
  4675. }
  4676. /*
  4677. * This needs to be after setting the BSSID in case
  4678. * mac80211 decides to do both changes at once because
  4679. * it will invoke post_associate.
  4680. */
  4681. if (vif->type == NL80211_IFTYPE_ADHOC && (changes & BSS_CHANGED_BEACON))
  4682. il_beacon_update(hw, vif);
  4683. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  4684. D_MAC80211("ERP_PREAMBLE %d\n",
  4685. bss_conf->use_short_preamble);
  4686. if (bss_conf->use_short_preamble)
  4687. ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  4688. else
  4689. ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  4690. }
  4691. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  4692. D_MAC80211(
  4693. "ERP_CTS %d\n", bss_conf->use_cts_prot);
  4694. if (bss_conf->use_cts_prot && il->band != IEEE80211_BAND_5GHZ)
  4695. ctx->staging.flags |= RXON_FLG_TGG_PROTECT_MSK;
  4696. else
  4697. ctx->staging.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  4698. if (bss_conf->use_cts_prot)
  4699. ctx->staging.flags |= RXON_FLG_SELF_CTS_EN;
  4700. else
  4701. ctx->staging.flags &= ~RXON_FLG_SELF_CTS_EN;
  4702. }
  4703. if (changes & BSS_CHANGED_BASIC_RATES) {
  4704. /* XXX use this information
  4705. *
  4706. * To do that, remove code from il_set_rate() and put something
  4707. * like this here:
  4708. *
  4709. if (A-band)
  4710. ctx->staging.ofdm_basic_rates =
  4711. bss_conf->basic_rates;
  4712. else
  4713. ctx->staging.ofdm_basic_rates =
  4714. bss_conf->basic_rates >> 4;
  4715. ctx->staging.cck_basic_rates =
  4716. bss_conf->basic_rates & 0xF;
  4717. */
  4718. }
  4719. if (changes & BSS_CHANGED_HT) {
  4720. il_ht_conf(il, vif);
  4721. if (il->cfg->ops->hcmd->set_rxon_chain)
  4722. il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
  4723. }
  4724. if (changes & BSS_CHANGED_ASSOC) {
  4725. D_MAC80211("ASSOC %d\n", bss_conf->assoc);
  4726. if (bss_conf->assoc) {
  4727. il->timestamp = bss_conf->timestamp;
  4728. if (!il_is_rfkill(il))
  4729. il->cfg->ops->legacy->post_associate(il);
  4730. } else
  4731. il_set_no_assoc(il, vif);
  4732. }
  4733. if (changes && il_is_associated_ctx(ctx) && bss_conf->aid) {
  4734. D_MAC80211("Changes (%#x) while associated\n",
  4735. changes);
  4736. ret = il_send_rxon_assoc(il, ctx);
  4737. if (!ret) {
  4738. /* Sync active_rxon with latest change. */
  4739. memcpy((void *)&ctx->active,
  4740. &ctx->staging,
  4741. sizeof(struct il_rxon_cmd));
  4742. }
  4743. }
  4744. if (changes & BSS_CHANGED_BEACON_ENABLED) {
  4745. if (vif->bss_conf.enable_beacon) {
  4746. memcpy(ctx->staging.bssid_addr,
  4747. bss_conf->bssid, ETH_ALEN);
  4748. memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
  4749. il->cfg->ops->legacy->config_ap(il);
  4750. } else
  4751. il_set_no_assoc(il, vif);
  4752. }
  4753. if (changes & BSS_CHANGED_IBSS) {
  4754. ret = il->cfg->ops->legacy->manage_ibss_station(il, vif,
  4755. bss_conf->ibss_joined);
  4756. if (ret)
  4757. IL_ERR("failed to %s IBSS station %pM\n",
  4758. bss_conf->ibss_joined ? "add" : "remove",
  4759. bss_conf->bssid);
  4760. }
  4761. mutex_unlock(&il->mutex);
  4762. D_MAC80211("leave\n");
  4763. }
  4764. EXPORT_SYMBOL(il_mac_bss_info_changed);
  4765. irqreturn_t il_isr(int irq, void *data)
  4766. {
  4767. struct il_priv *il = data;
  4768. u32 inta, inta_mask;
  4769. u32 inta_fh;
  4770. unsigned long flags;
  4771. if (!il)
  4772. return IRQ_NONE;
  4773. spin_lock_irqsave(&il->lock, flags);
  4774. /* Disable (but don't clear!) interrupts here to avoid
  4775. * back-to-back ISRs and sporadic interrupts from our NIC.
  4776. * If we have something to service, the tasklet will re-enable ints.
  4777. * If we *don't* have something, we'll re-enable before leaving here. */
  4778. inta_mask = _il_rd(il, CSR_INT_MASK); /* just for debug */
  4779. _il_wr(il, CSR_INT_MASK, 0x00000000);
  4780. /* Discover which interrupts are active/pending */
  4781. inta = _il_rd(il, CSR_INT);
  4782. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  4783. /* Ignore interrupt if there's nothing in NIC to service.
  4784. * This may be due to IRQ shared with another device,
  4785. * or due to sporadic interrupts thrown from our NIC. */
  4786. if (!inta && !inta_fh) {
  4787. D_ISR(
  4788. "Ignore interrupt, inta == 0, inta_fh == 0\n");
  4789. goto none;
  4790. }
  4791. if (inta == 0xFFFFFFFF || (inta & 0xFFFFFFF0) == 0xa5a5a5a0) {
  4792. /* Hardware disappeared. It might have already raised
  4793. * an interrupt */
  4794. IL_WARN("HARDWARE GONE?? INTA == 0x%08x\n", inta);
  4795. goto unplugged;
  4796. }
  4797. D_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4798. inta, inta_mask, inta_fh);
  4799. inta &= ~CSR_INT_BIT_SCD;
  4800. /* il_irq_tasklet() will service interrupts and re-enable them */
  4801. if (likely(inta || inta_fh))
  4802. tasklet_schedule(&il->irq_tasklet);
  4803. unplugged:
  4804. spin_unlock_irqrestore(&il->lock, flags);
  4805. return IRQ_HANDLED;
  4806. none:
  4807. /* re-enable interrupts here since we don't have anything to service. */
  4808. /* only Re-enable if disabled by irq */
  4809. if (test_bit(S_INT_ENABLED, &il->status))
  4810. il_enable_interrupts(il);
  4811. spin_unlock_irqrestore(&il->lock, flags);
  4812. return IRQ_NONE;
  4813. }
  4814. EXPORT_SYMBOL(il_isr);
  4815. /*
  4816. * il_tx_cmd_protection: Set rts/cts. 3945 and 4965 only share this
  4817. * function.
  4818. */
  4819. void il_tx_cmd_protection(struct il_priv *il,
  4820. struct ieee80211_tx_info *info,
  4821. __le16 fc, __le32 *tx_flags)
  4822. {
  4823. if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  4824. *tx_flags |= TX_CMD_FLG_RTS_MSK;
  4825. *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  4826. *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  4827. if (!ieee80211_is_mgmt(fc))
  4828. return;
  4829. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  4830. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  4831. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  4832. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  4833. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  4834. *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  4835. *tx_flags |= TX_CMD_FLG_CTS_MSK;
  4836. break;
  4837. }
  4838. } else if (info->control.rates[0].flags &
  4839. IEEE80211_TX_RC_USE_CTS_PROTECT) {
  4840. *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  4841. *tx_flags |= TX_CMD_FLG_CTS_MSK;
  4842. *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  4843. }
  4844. }
  4845. EXPORT_SYMBOL(il_tx_cmd_protection);