dhd_sdio.c 106 KB

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  1. /*
  2. * Copyright (c) 2010 Broadcom Corporation
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11. * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13. * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14. * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/types.h>
  17. #include <linux/kernel.h>
  18. #include <linux/kthread.h>
  19. #include <linux/printk.h>
  20. #include <linux/pci_ids.h>
  21. #include <linux/netdevice.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/mmc/sdio.h>
  25. #include <linux/mmc/sdio_func.h>
  26. #include <linux/mmc/card.h>
  27. #include <linux/semaphore.h>
  28. #include <linux/firmware.h>
  29. #include <linux/module.h>
  30. #include <linux/bcma/bcma.h>
  31. #include <asm/unaligned.h>
  32. #include <defs.h>
  33. #include <brcmu_wifi.h>
  34. #include <brcmu_utils.h>
  35. #include <brcm_hw_ids.h>
  36. #include <soc.h>
  37. #include "sdio_host.h"
  38. #include "sdio_chip.h"
  39. #define DCMD_RESP_TIMEOUT 2000 /* In milli second */
  40. #ifdef BCMDBG
  41. #define BRCMF_TRAP_INFO_SIZE 80
  42. #define CBUF_LEN (128)
  43. struct rte_log_le {
  44. __le32 buf; /* Can't be pointer on (64-bit) hosts */
  45. __le32 buf_size;
  46. __le32 idx;
  47. char *_buf_compat; /* Redundant pointer for backward compat. */
  48. };
  49. struct rte_console {
  50. /* Virtual UART
  51. * When there is no UART (e.g. Quickturn),
  52. * the host should write a complete
  53. * input line directly into cbuf and then write
  54. * the length into vcons_in.
  55. * This may also be used when there is a real UART
  56. * (at risk of conflicting with
  57. * the real UART). vcons_out is currently unused.
  58. */
  59. uint vcons_in;
  60. uint vcons_out;
  61. /* Output (logging) buffer
  62. * Console output is written to a ring buffer log_buf at index log_idx.
  63. * The host may read the output when it sees log_idx advance.
  64. * Output will be lost if the output wraps around faster than the host
  65. * polls.
  66. */
  67. struct rte_log_le log_le;
  68. /* Console input line buffer
  69. * Characters are read one at a time into cbuf
  70. * until <CR> is received, then
  71. * the buffer is processed as a command line.
  72. * Also used for virtual UART.
  73. */
  74. uint cbuf_idx;
  75. char cbuf[CBUF_LEN];
  76. };
  77. #endif /* BCMDBG */
  78. #include <chipcommon.h>
  79. #include "dhd.h"
  80. #include "dhd_bus.h"
  81. #include "dhd_proto.h"
  82. #include "dhd_dbg.h"
  83. #define TXQLEN 2048 /* bulk tx queue length */
  84. #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
  85. #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
  86. #define PRIOMASK 7
  87. #define TXRETRIES 2 /* # of retries for tx frames */
  88. #define BRCMF_RXBOUND 50 /* Default for max rx frames in
  89. one scheduling */
  90. #define BRCMF_TXBOUND 20 /* Default for max tx frames in
  91. one scheduling */
  92. #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
  93. #define MEMBLOCK 2048 /* Block size used for downloading
  94. of dongle image */
  95. #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
  96. biggest possible glom */
  97. #define BRCMF_FIRSTREAD (1 << 6)
  98. /* SBSDIO_DEVICE_CTL */
  99. /* 1: device will assert busy signal when receiving CMD53 */
  100. #define SBSDIO_DEVCTL_SETBUSY 0x01
  101. /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
  102. #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02
  103. /* 1: mask all interrupts to host except the chipActive (rev 8) */
  104. #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04
  105. /* 1: isolate internal sdio signals, put external pads in tri-state; requires
  106. * sdio bus power cycle to clear (rev 9) */
  107. #define SBSDIO_DEVCTL_PADS_ISO 0x08
  108. /* Force SD->SB reset mapping (rev 11) */
  109. #define SBSDIO_DEVCTL_SB_RST_CTL 0x30
  110. /* Determined by CoreControl bit */
  111. #define SBSDIO_DEVCTL_RST_CORECTL 0x00
  112. /* Force backplane reset */
  113. #define SBSDIO_DEVCTL_RST_BPRESET 0x10
  114. /* Force no backplane reset */
  115. #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20
  116. /* direct(mapped) cis space */
  117. /* MAPPED common CIS address */
  118. #define SBSDIO_CIS_BASE_COMMON 0x1000
  119. /* maximum bytes in one CIS */
  120. #define SBSDIO_CIS_SIZE_LIMIT 0x200
  121. /* cis offset addr is < 17 bits */
  122. #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF
  123. /* manfid tuple length, include tuple, link bytes */
  124. #define SBSDIO_CIS_MANFID_TUPLE_LEN 6
  125. /* intstatus */
  126. #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
  127. #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
  128. #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
  129. #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
  130. #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
  131. #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
  132. #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
  133. #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
  134. #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
  135. #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
  136. #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
  137. #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
  138. #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
  139. #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
  140. #define I_PC (1 << 10) /* descriptor error */
  141. #define I_PD (1 << 11) /* data error */
  142. #define I_DE (1 << 12) /* Descriptor protocol Error */
  143. #define I_RU (1 << 13) /* Receive descriptor Underflow */
  144. #define I_RO (1 << 14) /* Receive fifo Overflow */
  145. #define I_XU (1 << 15) /* Transmit fifo Underflow */
  146. #define I_RI (1 << 16) /* Receive Interrupt */
  147. #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
  148. #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
  149. #define I_XI (1 << 24) /* Transmit Interrupt */
  150. #define I_RF_TERM (1 << 25) /* Read Frame Terminate */
  151. #define I_WF_TERM (1 << 26) /* Write Frame Terminate */
  152. #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
  153. #define I_SBINT (1 << 28) /* sbintstatus Interrupt */
  154. #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
  155. #define I_SRESET (1 << 30) /* CCCR RES interrupt */
  156. #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
  157. #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
  158. #define I_DMA (I_RI | I_XI | I_ERRORS)
  159. /* corecontrol */
  160. #define CC_CISRDY (1 << 0) /* CIS Ready */
  161. #define CC_BPRESEN (1 << 1) /* CCCR RES signal */
  162. #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
  163. #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
  164. #define CC_XMTDATAAVAIL_MODE (1 << 4)
  165. #define CC_XMTDATAAVAIL_CTRL (1 << 5)
  166. /* SDA_FRAMECTRL */
  167. #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
  168. #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
  169. #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
  170. #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
  171. /* HW frame tag */
  172. #define SDPCM_FRAMETAG_LEN 4 /* 2 bytes len, 2 bytes check val */
  173. /* Total length of frame header for dongle protocol */
  174. #define SDPCM_HDRLEN (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN)
  175. #define SDPCM_RESERVE (SDPCM_HDRLEN + BRCMF_SDALIGN)
  176. /*
  177. * Software allocation of To SB Mailbox resources
  178. */
  179. /* tosbmailbox bits corresponding to intstatus bits */
  180. #define SMB_NAK (1 << 0) /* Frame NAK */
  181. #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
  182. #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
  183. #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
  184. /* tosbmailboxdata */
  185. #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
  186. /*
  187. * Software allocation of To Host Mailbox resources
  188. */
  189. /* intstatus bits */
  190. #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
  191. #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
  192. #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
  193. #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
  194. /* tohostmailboxdata */
  195. #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
  196. #define HMB_DATA_DEVREADY 2 /* talk to host after enable */
  197. #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
  198. #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
  199. #define HMB_DATA_FCDATA_MASK 0xff000000
  200. #define HMB_DATA_FCDATA_SHIFT 24
  201. #define HMB_DATA_VERSION_MASK 0x00ff0000
  202. #define HMB_DATA_VERSION_SHIFT 16
  203. /*
  204. * Software-defined protocol header
  205. */
  206. /* Current protocol version */
  207. #define SDPCM_PROT_VERSION 4
  208. /* SW frame header */
  209. #define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff)
  210. #define SDPCM_CHANNEL_MASK 0x00000f00
  211. #define SDPCM_CHANNEL_SHIFT 8
  212. #define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f)
  213. #define SDPCM_NEXTLEN_OFFSET 2
  214. /* Data Offset from SOF (HW Tag, SW Tag, Pad) */
  215. #define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */
  216. #define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
  217. #define SDPCM_DOFFSET_MASK 0xff000000
  218. #define SDPCM_DOFFSET_SHIFT 24
  219. #define SDPCM_FCMASK_OFFSET 4 /* Flow control */
  220. #define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff)
  221. #define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */
  222. #define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff)
  223. #define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */
  224. /* logical channel numbers */
  225. #define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */
  226. #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */
  227. #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */
  228. #define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */
  229. #define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */
  230. #define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */
  231. #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
  232. /*
  233. * Shared structure between dongle and the host.
  234. * The structure contains pointers to trap or assert information.
  235. */
  236. #define SDPCM_SHARED_VERSION 0x0002
  237. #define SDPCM_SHARED_VERSION_MASK 0x00FF
  238. #define SDPCM_SHARED_ASSERT_BUILT 0x0100
  239. #define SDPCM_SHARED_ASSERT 0x0200
  240. #define SDPCM_SHARED_TRAP 0x0400
  241. /* Space for header read, limit for data packets */
  242. #define MAX_HDR_READ (1 << 6)
  243. #define MAX_RX_DATASZ 2048
  244. /* Maximum milliseconds to wait for F2 to come up */
  245. #define BRCMF_WAIT_F2RDY 3000
  246. /* Bump up limit on waiting for HT to account for first startup;
  247. * if the image is doing a CRC calculation before programming the PMU
  248. * for HT availability, it could take a couple hundred ms more, so
  249. * max out at a 1 second (1000000us).
  250. */
  251. #undef PMU_MAX_TRANSITION_DLY
  252. #define PMU_MAX_TRANSITION_DLY 1000000
  253. /* Value for ChipClockCSR during initial setup */
  254. #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
  255. SBSDIO_ALP_AVAIL_REQ)
  256. /* Flags for SDH calls */
  257. #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
  258. #define BRCMFMAC_FW_NAME "brcm/brcmfmac.bin"
  259. #define BRCMFMAC_NV_NAME "brcm/brcmfmac.txt"
  260. MODULE_FIRMWARE(BRCMFMAC_FW_NAME);
  261. MODULE_FIRMWARE(BRCMFMAC_NV_NAME);
  262. /*
  263. * Conversion of 802.1D priority to precedence level
  264. */
  265. static uint prio2prec(u32 prio)
  266. {
  267. return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
  268. (prio^2) : prio;
  269. }
  270. /* core registers */
  271. struct sdpcmd_regs {
  272. u32 corecontrol; /* 0x00, rev8 */
  273. u32 corestatus; /* rev8 */
  274. u32 PAD[1];
  275. u32 biststatus; /* rev8 */
  276. /* PCMCIA access */
  277. u16 pcmciamesportaladdr; /* 0x010, rev8 */
  278. u16 PAD[1];
  279. u16 pcmciamesportalmask; /* rev8 */
  280. u16 PAD[1];
  281. u16 pcmciawrframebc; /* rev8 */
  282. u16 PAD[1];
  283. u16 pcmciaunderflowtimer; /* rev8 */
  284. u16 PAD[1];
  285. /* interrupt */
  286. u32 intstatus; /* 0x020, rev8 */
  287. u32 hostintmask; /* rev8 */
  288. u32 intmask; /* rev8 */
  289. u32 sbintstatus; /* rev8 */
  290. u32 sbintmask; /* rev8 */
  291. u32 funcintmask; /* rev4 */
  292. u32 PAD[2];
  293. u32 tosbmailbox; /* 0x040, rev8 */
  294. u32 tohostmailbox; /* rev8 */
  295. u32 tosbmailboxdata; /* rev8 */
  296. u32 tohostmailboxdata; /* rev8 */
  297. /* synchronized access to registers in SDIO clock domain */
  298. u32 sdioaccess; /* 0x050, rev8 */
  299. u32 PAD[3];
  300. /* PCMCIA frame control */
  301. u8 pcmciaframectrl; /* 0x060, rev8 */
  302. u8 PAD[3];
  303. u8 pcmciawatermark; /* rev8 */
  304. u8 PAD[155];
  305. /* interrupt batching control */
  306. u32 intrcvlazy; /* 0x100, rev8 */
  307. u32 PAD[3];
  308. /* counters */
  309. u32 cmd52rd; /* 0x110, rev8 */
  310. u32 cmd52wr; /* rev8 */
  311. u32 cmd53rd; /* rev8 */
  312. u32 cmd53wr; /* rev8 */
  313. u32 abort; /* rev8 */
  314. u32 datacrcerror; /* rev8 */
  315. u32 rdoutofsync; /* rev8 */
  316. u32 wroutofsync; /* rev8 */
  317. u32 writebusy; /* rev8 */
  318. u32 readwait; /* rev8 */
  319. u32 readterm; /* rev8 */
  320. u32 writeterm; /* rev8 */
  321. u32 PAD[40];
  322. u32 clockctlstatus; /* rev8 */
  323. u32 PAD[7];
  324. u32 PAD[128]; /* DMA engines */
  325. /* SDIO/PCMCIA CIS region */
  326. char cis[512]; /* 0x400-0x5ff, rev6 */
  327. /* PCMCIA function control registers */
  328. char pcmciafcr[256]; /* 0x600-6ff, rev6 */
  329. u16 PAD[55];
  330. /* PCMCIA backplane access */
  331. u16 backplanecsr; /* 0x76E, rev6 */
  332. u16 backplaneaddr0; /* rev6 */
  333. u16 backplaneaddr1; /* rev6 */
  334. u16 backplaneaddr2; /* rev6 */
  335. u16 backplaneaddr3; /* rev6 */
  336. u16 backplanedata0; /* rev6 */
  337. u16 backplanedata1; /* rev6 */
  338. u16 backplanedata2; /* rev6 */
  339. u16 backplanedata3; /* rev6 */
  340. u16 PAD[31];
  341. /* sprom "size" & "blank" info */
  342. u16 spromstatus; /* 0x7BE, rev2 */
  343. u32 PAD[464];
  344. u16 PAD[0x80];
  345. };
  346. #ifdef BCMDBG
  347. /* Device console log buffer state */
  348. struct brcmf_console {
  349. uint count; /* Poll interval msec counter */
  350. uint log_addr; /* Log struct address (fixed) */
  351. struct rte_log_le log_le; /* Log struct (host copy) */
  352. uint bufsize; /* Size of log buffer */
  353. u8 *buf; /* Log buffer (host copy) */
  354. uint last; /* Last buffer read index */
  355. };
  356. #endif /* BCMDBG */
  357. struct sdpcm_shared {
  358. u32 flags;
  359. u32 trap_addr;
  360. u32 assert_exp_addr;
  361. u32 assert_file_addr;
  362. u32 assert_line;
  363. u32 console_addr; /* Address of struct rte_console */
  364. u32 msgtrace_addr;
  365. u8 tag[32];
  366. };
  367. struct sdpcm_shared_le {
  368. __le32 flags;
  369. __le32 trap_addr;
  370. __le32 assert_exp_addr;
  371. __le32 assert_file_addr;
  372. __le32 assert_line;
  373. __le32 console_addr; /* Address of struct rte_console */
  374. __le32 msgtrace_addr;
  375. u8 tag[32];
  376. };
  377. /* misc chip info needed by some of the routines */
  378. /* Private data for SDIO bus interaction */
  379. struct brcmf_sdio {
  380. struct brcmf_pub *drvr;
  381. struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
  382. struct chip_info *ci; /* Chip info struct */
  383. char *vars; /* Variables (from CIS and/or other) */
  384. uint varsz; /* Size of variables buffer */
  385. u32 ramsize; /* Size of RAM in SOCRAM (bytes) */
  386. u32 hostintmask; /* Copy of Host Interrupt Mask */
  387. u32 intstatus; /* Intstatus bits (events) pending */
  388. bool dpc_sched; /* Indicates DPC schedule (intrpt rcvd) */
  389. bool fcstate; /* State of dongle flow-control */
  390. uint blocksize; /* Block size of SDIO transfers */
  391. uint roundup; /* Max roundup limit */
  392. struct pktq txq; /* Queue length used for flow-control */
  393. u8 flowcontrol; /* per prio flow control bitmask */
  394. u8 tx_seq; /* Transmit sequence number (next) */
  395. u8 tx_max; /* Maximum transmit sequence allowed */
  396. u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN];
  397. u8 *rxhdr; /* Header of current rx frame (in hdrbuf) */
  398. u16 nextlen; /* Next Read Len from last header */
  399. u8 rx_seq; /* Receive sequence number (expected) */
  400. bool rxskip; /* Skip receive (awaiting NAK ACK) */
  401. uint rxbound; /* Rx frames to read before resched */
  402. uint txbound; /* Tx frames to send before resched */
  403. uint txminmax;
  404. struct sk_buff *glomd; /* Packet containing glomming descriptor */
  405. struct sk_buff_head glom; /* Packet list for glommed superframe */
  406. uint glomerr; /* Glom packet read errors */
  407. u8 *rxbuf; /* Buffer for receiving control packets */
  408. uint rxblen; /* Allocated length of rxbuf */
  409. u8 *rxctl; /* Aligned pointer into rxbuf */
  410. u8 *databuf; /* Buffer for receiving big glom packet */
  411. u8 *dataptr; /* Aligned pointer into databuf */
  412. uint rxlen; /* Length of valid data in buffer */
  413. u8 sdpcm_ver; /* Bus protocol reported by dongle */
  414. bool intr; /* Use interrupts */
  415. bool poll; /* Use polling */
  416. bool ipend; /* Device interrupt is pending */
  417. uint intrcount; /* Count of device interrupt callbacks */
  418. uint lastintrs; /* Count as of last watchdog timer */
  419. uint spurious; /* Count of spurious interrupts */
  420. uint pollrate; /* Ticks between device polls */
  421. uint polltick; /* Tick counter */
  422. uint pollcnt; /* Count of active polls */
  423. #ifdef BCMDBG
  424. uint console_interval;
  425. struct brcmf_console console; /* Console output polling support */
  426. uint console_addr; /* Console address from shared struct */
  427. #endif /* BCMDBG */
  428. uint regfails; /* Count of R_REG failures */
  429. uint clkstate; /* State of sd and backplane clock(s) */
  430. bool activity; /* Activity flag for clock down */
  431. s32 idletime; /* Control for activity timeout */
  432. s32 idlecount; /* Activity timeout counter */
  433. s32 idleclock; /* How to set bus driver when idle */
  434. s32 sd_rxchain;
  435. bool use_rxchain; /* If brcmf should use PKT chains */
  436. bool sleeping; /* Is SDIO bus sleeping? */
  437. bool rxflow_mode; /* Rx flow control mode */
  438. bool rxflow; /* Is rx flow control on */
  439. bool alp_only; /* Don't use HT clock (ALP only) */
  440. /* Field to decide if rx of control frames happen in rxbuf or lb-pool */
  441. bool usebufpool;
  442. /* Some additional counters */
  443. uint tx_sderrs; /* Count of tx attempts with sd errors */
  444. uint fcqueued; /* Tx packets that got queued */
  445. uint rxrtx; /* Count of rtx requests (NAK to dongle) */
  446. uint rx_toolong; /* Receive frames too long to receive */
  447. uint rxc_errors; /* SDIO errors when reading control frames */
  448. uint rx_hdrfail; /* SDIO errors on header reads */
  449. uint rx_badhdr; /* Bad received headers (roosync?) */
  450. uint rx_badseq; /* Mismatched rx sequence number */
  451. uint fc_rcvd; /* Number of flow-control events received */
  452. uint fc_xoff; /* Number which turned on flow-control */
  453. uint fc_xon; /* Number which turned off flow-control */
  454. uint rxglomfail; /* Failed deglom attempts */
  455. uint rxglomframes; /* Number of glom frames (superframes) */
  456. uint rxglompkts; /* Number of packets from glom frames */
  457. uint f2rxhdrs; /* Number of header reads */
  458. uint f2rxdata; /* Number of frame data reads */
  459. uint f2txdata; /* Number of f2 frame writes */
  460. uint f1regdata; /* Number of f1 register accesses */
  461. u8 *ctrl_frame_buf;
  462. u32 ctrl_frame_len;
  463. bool ctrl_frame_stat;
  464. spinlock_t txqlock;
  465. wait_queue_head_t ctrl_wait;
  466. wait_queue_head_t dcmd_resp_wait;
  467. struct timer_list timer;
  468. struct completion watchdog_wait;
  469. struct task_struct *watchdog_tsk;
  470. bool wd_timer_valid;
  471. uint save_ms;
  472. struct task_struct *dpc_tsk;
  473. struct completion dpc_wait;
  474. struct semaphore sdsem;
  475. const struct firmware *firmware;
  476. u32 fw_ptr;
  477. };
  478. /* clkstate */
  479. #define CLK_NONE 0
  480. #define CLK_SDONLY 1
  481. #define CLK_PENDING 2 /* Not used yet */
  482. #define CLK_AVAIL 3
  483. #ifdef BCMDBG
  484. static int qcount[NUMPRIO];
  485. static int tx_packets[NUMPRIO];
  486. #endif /* BCMDBG */
  487. #define SDIO_DRIVE_STRENGTH 6 /* in milliamps */
  488. #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
  489. /* Retry count for register access failures */
  490. static const uint retry_limit = 2;
  491. /* Limit on rounding up frames */
  492. static const uint max_roundup = 512;
  493. #define ALIGNMENT 4
  494. static void pkt_align(struct sk_buff *p, int len, int align)
  495. {
  496. uint datalign;
  497. datalign = (unsigned long)(p->data);
  498. datalign = roundup(datalign, (align)) - datalign;
  499. if (datalign)
  500. skb_pull(p, datalign);
  501. __skb_trim(p, len);
  502. }
  503. /* To check if there's window offered */
  504. static bool data_ok(struct brcmf_sdio *bus)
  505. {
  506. return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
  507. ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
  508. }
  509. /*
  510. * Reads a register in the SDIO hardware block. This block occupies a series of
  511. * adresses on the 32 bit backplane bus.
  512. */
  513. static void
  514. r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 reg_offset, u32 *retryvar)
  515. {
  516. u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
  517. *retryvar = 0;
  518. do {
  519. *regvar = brcmf_sdcard_reg_read(bus->sdiodev,
  520. bus->ci->c_inf[idx].base + reg_offset,
  521. sizeof(u32));
  522. } while (brcmf_sdcard_regfail(bus->sdiodev) &&
  523. (++(*retryvar) <= retry_limit));
  524. if (*retryvar) {
  525. bus->regfails += (*retryvar-1);
  526. if (*retryvar > retry_limit) {
  527. brcmf_dbg(ERROR, "FAILED READ %Xh\n", reg_offset);
  528. *regvar = 0;
  529. }
  530. }
  531. }
  532. static void
  533. w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset, u32 *retryvar)
  534. {
  535. u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
  536. *retryvar = 0;
  537. do {
  538. brcmf_sdcard_reg_write(bus->sdiodev,
  539. bus->ci->c_inf[idx].base + reg_offset,
  540. sizeof(u32), regval);
  541. } while (brcmf_sdcard_regfail(bus->sdiodev) &&
  542. (++(*retryvar) <= retry_limit));
  543. if (*retryvar) {
  544. bus->regfails += (*retryvar-1);
  545. if (*retryvar > retry_limit)
  546. brcmf_dbg(ERROR, "FAILED REGISTER WRITE %Xh\n",
  547. reg_offset);
  548. }
  549. }
  550. #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND)
  551. #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
  552. /* Packet free applicable unconditionally for sdio and sdspi.
  553. * Conditional if bufpool was present for gspi bus.
  554. */
  555. static void brcmf_sdbrcm_pktfree2(struct brcmf_sdio *bus, struct sk_buff *pkt)
  556. {
  557. if (bus->usebufpool)
  558. brcmu_pkt_buf_free_skb(pkt);
  559. }
  560. /* Turn backplane clock on or off */
  561. static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
  562. {
  563. int err;
  564. u8 clkctl, clkreq, devctl;
  565. unsigned long timeout;
  566. brcmf_dbg(TRACE, "Enter\n");
  567. clkctl = 0;
  568. if (on) {
  569. /* Request HT Avail */
  570. clkreq =
  571. bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
  572. brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
  573. SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
  574. if (err) {
  575. brcmf_dbg(ERROR, "HT Avail request error: %d\n", err);
  576. return -EBADE;
  577. }
  578. /* Check current status */
  579. clkctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
  580. SBSDIO_FUNC1_CHIPCLKCSR, &err);
  581. if (err) {
  582. brcmf_dbg(ERROR, "HT Avail read error: %d\n", err);
  583. return -EBADE;
  584. }
  585. /* Go to pending and await interrupt if appropriate */
  586. if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
  587. /* Allow only clock-available interrupt */
  588. devctl = brcmf_sdcard_cfg_read(bus->sdiodev,
  589. SDIO_FUNC_1,
  590. SBSDIO_DEVICE_CTL, &err);
  591. if (err) {
  592. brcmf_dbg(ERROR, "Devctl error setting CA: %d\n",
  593. err);
  594. return -EBADE;
  595. }
  596. devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
  597. brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
  598. SBSDIO_DEVICE_CTL, devctl, &err);
  599. brcmf_dbg(INFO, "CLKCTL: set PENDING\n");
  600. bus->clkstate = CLK_PENDING;
  601. return 0;
  602. } else if (bus->clkstate == CLK_PENDING) {
  603. /* Cancel CA-only interrupt filter */
  604. devctl =
  605. brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
  606. SBSDIO_DEVICE_CTL, &err);
  607. devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
  608. brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
  609. SBSDIO_DEVICE_CTL, devctl, &err);
  610. }
  611. /* Otherwise, wait here (polling) for HT Avail */
  612. timeout = jiffies +
  613. msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
  614. while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
  615. clkctl = brcmf_sdcard_cfg_read(bus->sdiodev,
  616. SDIO_FUNC_1,
  617. SBSDIO_FUNC1_CHIPCLKCSR,
  618. &err);
  619. if (time_after(jiffies, timeout))
  620. break;
  621. else
  622. usleep_range(5000, 10000);
  623. }
  624. if (err) {
  625. brcmf_dbg(ERROR, "HT Avail request error: %d\n", err);
  626. return -EBADE;
  627. }
  628. if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
  629. brcmf_dbg(ERROR, "HT Avail timeout (%d): clkctl 0x%02x\n",
  630. PMU_MAX_TRANSITION_DLY, clkctl);
  631. return -EBADE;
  632. }
  633. /* Mark clock available */
  634. bus->clkstate = CLK_AVAIL;
  635. brcmf_dbg(INFO, "CLKCTL: turned ON\n");
  636. #if defined(BCMDBG)
  637. if (bus->alp_only != true) {
  638. if (SBSDIO_ALPONLY(clkctl))
  639. brcmf_dbg(ERROR, "HT Clock should be on\n");
  640. }
  641. #endif /* defined (BCMDBG) */
  642. bus->activity = true;
  643. } else {
  644. clkreq = 0;
  645. if (bus->clkstate == CLK_PENDING) {
  646. /* Cancel CA-only interrupt filter */
  647. devctl = brcmf_sdcard_cfg_read(bus->sdiodev,
  648. SDIO_FUNC_1,
  649. SBSDIO_DEVICE_CTL, &err);
  650. devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
  651. brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
  652. SBSDIO_DEVICE_CTL, devctl, &err);
  653. }
  654. bus->clkstate = CLK_SDONLY;
  655. brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
  656. SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
  657. brcmf_dbg(INFO, "CLKCTL: turned OFF\n");
  658. if (err) {
  659. brcmf_dbg(ERROR, "Failed access turning clock off: %d\n",
  660. err);
  661. return -EBADE;
  662. }
  663. }
  664. return 0;
  665. }
  666. /* Change idle/active SD state */
  667. static int brcmf_sdbrcm_sdclk(struct brcmf_sdio *bus, bool on)
  668. {
  669. brcmf_dbg(TRACE, "Enter\n");
  670. if (on)
  671. bus->clkstate = CLK_SDONLY;
  672. else
  673. bus->clkstate = CLK_NONE;
  674. return 0;
  675. }
  676. /* Transition SD and backplane clock readiness */
  677. static int brcmf_sdbrcm_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
  678. {
  679. #ifdef BCMDBG
  680. uint oldstate = bus->clkstate;
  681. #endif /* BCMDBG */
  682. brcmf_dbg(TRACE, "Enter\n");
  683. /* Early exit if we're already there */
  684. if (bus->clkstate == target) {
  685. if (target == CLK_AVAIL) {
  686. brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
  687. bus->activity = true;
  688. }
  689. return 0;
  690. }
  691. switch (target) {
  692. case CLK_AVAIL:
  693. /* Make sure SD clock is available */
  694. if (bus->clkstate == CLK_NONE)
  695. brcmf_sdbrcm_sdclk(bus, true);
  696. /* Now request HT Avail on the backplane */
  697. brcmf_sdbrcm_htclk(bus, true, pendok);
  698. brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
  699. bus->activity = true;
  700. break;
  701. case CLK_SDONLY:
  702. /* Remove HT request, or bring up SD clock */
  703. if (bus->clkstate == CLK_NONE)
  704. brcmf_sdbrcm_sdclk(bus, true);
  705. else if (bus->clkstate == CLK_AVAIL)
  706. brcmf_sdbrcm_htclk(bus, false, false);
  707. else
  708. brcmf_dbg(ERROR, "request for %d -> %d\n",
  709. bus->clkstate, target);
  710. brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
  711. break;
  712. case CLK_NONE:
  713. /* Make sure to remove HT request */
  714. if (bus->clkstate == CLK_AVAIL)
  715. brcmf_sdbrcm_htclk(bus, false, false);
  716. /* Now remove the SD clock */
  717. brcmf_sdbrcm_sdclk(bus, false);
  718. brcmf_sdbrcm_wd_timer(bus, 0);
  719. break;
  720. }
  721. #ifdef BCMDBG
  722. brcmf_dbg(INFO, "%d -> %d\n", oldstate, bus->clkstate);
  723. #endif /* BCMDBG */
  724. return 0;
  725. }
  726. static int brcmf_sdbrcm_bussleep(struct brcmf_sdio *bus, bool sleep)
  727. {
  728. uint retries = 0;
  729. brcmf_dbg(INFO, "request %s (currently %s)\n",
  730. sleep ? "SLEEP" : "WAKE",
  731. bus->sleeping ? "SLEEP" : "WAKE");
  732. /* Done if we're already in the requested state */
  733. if (sleep == bus->sleeping)
  734. return 0;
  735. /* Going to sleep: set the alarm and turn off the lights... */
  736. if (sleep) {
  737. /* Don't sleep if something is pending */
  738. if (bus->dpc_sched || bus->rxskip || pktq_len(&bus->txq))
  739. return -EBUSY;
  740. /* Make sure the controller has the bus up */
  741. brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
  742. /* Tell device to start using OOB wakeup */
  743. w_sdreg32(bus, SMB_USE_OOB,
  744. offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
  745. if (retries > retry_limit)
  746. brcmf_dbg(ERROR, "CANNOT SIGNAL CHIP, WILL NOT WAKE UP!!\n");
  747. /* Turn off our contribution to the HT clock request */
  748. brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
  749. brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
  750. SBSDIO_FUNC1_CHIPCLKCSR,
  751. SBSDIO_FORCE_HW_CLKREQ_OFF, NULL);
  752. /* Isolate the bus */
  753. brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
  754. SBSDIO_DEVICE_CTL,
  755. SBSDIO_DEVCTL_PADS_ISO, NULL);
  756. /* Change state */
  757. bus->sleeping = true;
  758. } else {
  759. /* Waking up: bus power up is ok, set local state */
  760. brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
  761. SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
  762. /* Make sure the controller has the bus up */
  763. brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
  764. /* Send misc interrupt to indicate OOB not needed */
  765. w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, tosbmailboxdata),
  766. &retries);
  767. if (retries <= retry_limit)
  768. w_sdreg32(bus, SMB_DEV_INT,
  769. offsetof(struct sdpcmd_regs, tosbmailbox),
  770. &retries);
  771. if (retries > retry_limit)
  772. brcmf_dbg(ERROR, "CANNOT SIGNAL CHIP TO CLEAR OOB!!\n");
  773. /* Make sure we have SD bus access */
  774. brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
  775. /* Change state */
  776. bus->sleeping = false;
  777. }
  778. return 0;
  779. }
  780. static void bus_wake(struct brcmf_sdio *bus)
  781. {
  782. if (bus->sleeping)
  783. brcmf_sdbrcm_bussleep(bus, false);
  784. }
  785. static u32 brcmf_sdbrcm_hostmail(struct brcmf_sdio *bus)
  786. {
  787. u32 intstatus = 0;
  788. u32 hmb_data;
  789. u8 fcbits;
  790. uint retries = 0;
  791. brcmf_dbg(TRACE, "Enter\n");
  792. /* Read mailbox data and ack that we did so */
  793. r_sdreg32(bus, &hmb_data,
  794. offsetof(struct sdpcmd_regs, tohostmailboxdata), &retries);
  795. if (retries <= retry_limit)
  796. w_sdreg32(bus, SMB_INT_ACK,
  797. offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
  798. bus->f1regdata += 2;
  799. /* Dongle recomposed rx frames, accept them again */
  800. if (hmb_data & HMB_DATA_NAKHANDLED) {
  801. brcmf_dbg(INFO, "Dongle reports NAK handled, expect rtx of %d\n",
  802. bus->rx_seq);
  803. if (!bus->rxskip)
  804. brcmf_dbg(ERROR, "unexpected NAKHANDLED!\n");
  805. bus->rxskip = false;
  806. intstatus |= I_HMB_FRAME_IND;
  807. }
  808. /*
  809. * DEVREADY does not occur with gSPI.
  810. */
  811. if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
  812. bus->sdpcm_ver =
  813. (hmb_data & HMB_DATA_VERSION_MASK) >>
  814. HMB_DATA_VERSION_SHIFT;
  815. if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
  816. brcmf_dbg(ERROR, "Version mismatch, dongle reports %d, "
  817. "expecting %d\n",
  818. bus->sdpcm_ver, SDPCM_PROT_VERSION);
  819. else
  820. brcmf_dbg(INFO, "Dongle ready, protocol version %d\n",
  821. bus->sdpcm_ver);
  822. }
  823. /*
  824. * Flow Control has been moved into the RX headers and this out of band
  825. * method isn't used any more.
  826. * remaining backward compatible with older dongles.
  827. */
  828. if (hmb_data & HMB_DATA_FC) {
  829. fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
  830. HMB_DATA_FCDATA_SHIFT;
  831. if (fcbits & ~bus->flowcontrol)
  832. bus->fc_xoff++;
  833. if (bus->flowcontrol & ~fcbits)
  834. bus->fc_xon++;
  835. bus->fc_rcvd++;
  836. bus->flowcontrol = fcbits;
  837. }
  838. /* Shouldn't be any others */
  839. if (hmb_data & ~(HMB_DATA_DEVREADY |
  840. HMB_DATA_NAKHANDLED |
  841. HMB_DATA_FC |
  842. HMB_DATA_FWREADY |
  843. HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
  844. brcmf_dbg(ERROR, "Unknown mailbox data content: 0x%02x\n",
  845. hmb_data);
  846. return intstatus;
  847. }
  848. static void brcmf_sdbrcm_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
  849. {
  850. uint retries = 0;
  851. u16 lastrbc;
  852. u8 hi, lo;
  853. int err;
  854. brcmf_dbg(ERROR, "%sterminate frame%s\n",
  855. abort ? "abort command, " : "",
  856. rtx ? ", send NAK" : "");
  857. if (abort)
  858. brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
  859. brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
  860. SBSDIO_FUNC1_FRAMECTRL,
  861. SFC_RF_TERM, &err);
  862. bus->f1regdata++;
  863. /* Wait until the packet has been flushed (device/FIFO stable) */
  864. for (lastrbc = retries = 0xffff; retries > 0; retries--) {
  865. hi = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
  866. SBSDIO_FUNC1_RFRAMEBCHI, NULL);
  867. lo = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
  868. SBSDIO_FUNC1_RFRAMEBCLO, NULL);
  869. bus->f1regdata += 2;
  870. if ((hi == 0) && (lo == 0))
  871. break;
  872. if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
  873. brcmf_dbg(ERROR, "count growing: last 0x%04x now 0x%04x\n",
  874. lastrbc, (hi << 8) + lo);
  875. }
  876. lastrbc = (hi << 8) + lo;
  877. }
  878. if (!retries)
  879. brcmf_dbg(ERROR, "count never zeroed: last 0x%04x\n", lastrbc);
  880. else
  881. brcmf_dbg(INFO, "flush took %d iterations\n", 0xffff - retries);
  882. if (rtx) {
  883. bus->rxrtx++;
  884. w_sdreg32(bus, SMB_NAK,
  885. offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
  886. bus->f1regdata++;
  887. if (retries <= retry_limit)
  888. bus->rxskip = true;
  889. }
  890. /* Clear partial in any case */
  891. bus->nextlen = 0;
  892. /* If we can't reach the device, signal failure */
  893. if (err || brcmf_sdcard_regfail(bus->sdiodev))
  894. bus->drvr->busstate = BRCMF_BUS_DOWN;
  895. }
  896. /* copy a buffer into a pkt buffer chain */
  897. static uint brcmf_sdbrcm_glom_from_buf(struct brcmf_sdio *bus, uint len)
  898. {
  899. uint n, ret = 0;
  900. struct sk_buff *p;
  901. u8 *buf;
  902. buf = bus->dataptr;
  903. /* copy the data */
  904. skb_queue_walk(&bus->glom, p) {
  905. n = min_t(uint, p->len, len);
  906. memcpy(p->data, buf, n);
  907. buf += n;
  908. len -= n;
  909. ret += n;
  910. if (!len)
  911. break;
  912. }
  913. return ret;
  914. }
  915. /* return total length of buffer chain */
  916. static uint brcmf_sdbrcm_glom_len(struct brcmf_sdio *bus)
  917. {
  918. struct sk_buff *p;
  919. uint total;
  920. total = 0;
  921. skb_queue_walk(&bus->glom, p)
  922. total += p->len;
  923. return total;
  924. }
  925. static void brcmf_sdbrcm_free_glom(struct brcmf_sdio *bus)
  926. {
  927. struct sk_buff *cur, *next;
  928. skb_queue_walk_safe(&bus->glom, cur, next) {
  929. skb_unlink(cur, &bus->glom);
  930. brcmu_pkt_buf_free_skb(cur);
  931. }
  932. }
  933. static u8 brcmf_sdbrcm_rxglom(struct brcmf_sdio *bus, u8 rxseq)
  934. {
  935. u16 dlen, totlen;
  936. u8 *dptr, num = 0;
  937. u16 sublen, check;
  938. struct sk_buff *pfirst, *pnext;
  939. int errcode;
  940. u8 chan, seq, doff, sfdoff;
  941. u8 txmax;
  942. int ifidx = 0;
  943. bool usechain = bus->use_rxchain;
  944. /* If packets, issue read(s) and send up packet chain */
  945. /* Return sequence numbers consumed? */
  946. brcmf_dbg(TRACE, "start: glomd %p glom %p\n",
  947. bus->glomd, skb_peek(&bus->glom));
  948. /* If there's a descriptor, generate the packet chain */
  949. if (bus->glomd) {
  950. pfirst = pnext = NULL;
  951. dlen = (u16) (bus->glomd->len);
  952. dptr = bus->glomd->data;
  953. if (!dlen || (dlen & 1)) {
  954. brcmf_dbg(ERROR, "bad glomd len(%d), ignore descriptor\n",
  955. dlen);
  956. dlen = 0;
  957. }
  958. for (totlen = num = 0; dlen; num++) {
  959. /* Get (and move past) next length */
  960. sublen = get_unaligned_le16(dptr);
  961. dlen -= sizeof(u16);
  962. dptr += sizeof(u16);
  963. if ((sublen < SDPCM_HDRLEN) ||
  964. ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
  965. brcmf_dbg(ERROR, "descriptor len %d bad: %d\n",
  966. num, sublen);
  967. pnext = NULL;
  968. break;
  969. }
  970. if (sublen % BRCMF_SDALIGN) {
  971. brcmf_dbg(ERROR, "sublen %d not multiple of %d\n",
  972. sublen, BRCMF_SDALIGN);
  973. usechain = false;
  974. }
  975. totlen += sublen;
  976. /* For last frame, adjust read len so total
  977. is a block multiple */
  978. if (!dlen) {
  979. sublen +=
  980. (roundup(totlen, bus->blocksize) - totlen);
  981. totlen = roundup(totlen, bus->blocksize);
  982. }
  983. /* Allocate/chain packet for next subframe */
  984. pnext = brcmu_pkt_buf_get_skb(sublen + BRCMF_SDALIGN);
  985. if (pnext == NULL) {
  986. brcmf_dbg(ERROR, "bcm_pkt_buf_get_skb failed, num %d len %d\n",
  987. num, sublen);
  988. break;
  989. }
  990. skb_queue_tail(&bus->glom, pnext);
  991. /* Adhere to start alignment requirements */
  992. pkt_align(pnext, sublen, BRCMF_SDALIGN);
  993. }
  994. /* If all allocations succeeded, save packet chain
  995. in bus structure */
  996. if (pnext) {
  997. brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
  998. totlen, num);
  999. if (BRCMF_GLOM_ON() && bus->nextlen &&
  1000. totlen != bus->nextlen) {
  1001. brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
  1002. bus->nextlen, totlen, rxseq);
  1003. }
  1004. pfirst = pnext = NULL;
  1005. } else {
  1006. brcmf_sdbrcm_free_glom(bus);
  1007. num = 0;
  1008. }
  1009. /* Done with descriptor packet */
  1010. brcmu_pkt_buf_free_skb(bus->glomd);
  1011. bus->glomd = NULL;
  1012. bus->nextlen = 0;
  1013. }
  1014. /* Ok -- either we just generated a packet chain,
  1015. or had one from before */
  1016. if (!skb_queue_empty(&bus->glom)) {
  1017. if (BRCMF_GLOM_ON()) {
  1018. brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
  1019. skb_queue_walk(&bus->glom, pnext) {
  1020. brcmf_dbg(GLOM, " %p: %p len 0x%04x (%d)\n",
  1021. pnext, (u8 *) (pnext->data),
  1022. pnext->len, pnext->len);
  1023. }
  1024. }
  1025. pfirst = skb_peek(&bus->glom);
  1026. dlen = (u16) brcmf_sdbrcm_glom_len(bus);
  1027. /* Do an SDIO read for the superframe. Configurable iovar to
  1028. * read directly into the chained packet, or allocate a large
  1029. * packet and and copy into the chain.
  1030. */
  1031. if (usechain) {
  1032. errcode = brcmf_sdcard_recv_chain(bus->sdiodev,
  1033. bus->sdiodev->sbwad,
  1034. SDIO_FUNC_2, F2SYNC, &bus->glom);
  1035. } else if (bus->dataptr) {
  1036. errcode = brcmf_sdcard_recv_buf(bus->sdiodev,
  1037. bus->sdiodev->sbwad,
  1038. SDIO_FUNC_2, F2SYNC,
  1039. bus->dataptr, dlen);
  1040. sublen = (u16) brcmf_sdbrcm_glom_from_buf(bus, dlen);
  1041. if (sublen != dlen) {
  1042. brcmf_dbg(ERROR, "FAILED TO COPY, dlen %d sublen %d\n",
  1043. dlen, sublen);
  1044. errcode = -1;
  1045. }
  1046. pnext = NULL;
  1047. } else {
  1048. brcmf_dbg(ERROR, "COULDN'T ALLOC %d-BYTE GLOM, FORCE FAILURE\n",
  1049. dlen);
  1050. errcode = -1;
  1051. }
  1052. bus->f2rxdata++;
  1053. /* On failure, kill the superframe, allow a couple retries */
  1054. if (errcode < 0) {
  1055. brcmf_dbg(ERROR, "glom read of %d bytes failed: %d\n",
  1056. dlen, errcode);
  1057. bus->drvr->rx_errors++;
  1058. if (bus->glomerr++ < 3) {
  1059. brcmf_sdbrcm_rxfail(bus, true, true);
  1060. } else {
  1061. bus->glomerr = 0;
  1062. brcmf_sdbrcm_rxfail(bus, true, false);
  1063. bus->rxglomfail++;
  1064. brcmf_sdbrcm_free_glom(bus);
  1065. }
  1066. return 0;
  1067. }
  1068. #ifdef BCMDBG
  1069. if (BRCMF_GLOM_ON()) {
  1070. printk(KERN_DEBUG "SUPERFRAME:\n");
  1071. print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
  1072. pfirst->data, min_t(int, pfirst->len, 48));
  1073. }
  1074. #endif
  1075. /* Validate the superframe header */
  1076. dptr = (u8 *) (pfirst->data);
  1077. sublen = get_unaligned_le16(dptr);
  1078. check = get_unaligned_le16(dptr + sizeof(u16));
  1079. chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
  1080. seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
  1081. bus->nextlen = dptr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
  1082. if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
  1083. brcmf_dbg(INFO, "nextlen too large (%d) seq %d\n",
  1084. bus->nextlen, seq);
  1085. bus->nextlen = 0;
  1086. }
  1087. doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
  1088. txmax = SDPCM_WINDOW_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
  1089. errcode = 0;
  1090. if ((u16)~(sublen ^ check)) {
  1091. brcmf_dbg(ERROR, "(superframe): HW hdr error: len/check 0x%04x/0x%04x\n",
  1092. sublen, check);
  1093. errcode = -1;
  1094. } else if (roundup(sublen, bus->blocksize) != dlen) {
  1095. brcmf_dbg(ERROR, "(superframe): len 0x%04x, rounded 0x%04x, expect 0x%04x\n",
  1096. sublen, roundup(sublen, bus->blocksize),
  1097. dlen);
  1098. errcode = -1;
  1099. } else if (SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]) !=
  1100. SDPCM_GLOM_CHANNEL) {
  1101. brcmf_dbg(ERROR, "(superframe): bad channel %d\n",
  1102. SDPCM_PACKET_CHANNEL(
  1103. &dptr[SDPCM_FRAMETAG_LEN]));
  1104. errcode = -1;
  1105. } else if (SDPCM_GLOMDESC(&dptr[SDPCM_FRAMETAG_LEN])) {
  1106. brcmf_dbg(ERROR, "(superframe): got 2nd descriptor?\n");
  1107. errcode = -1;
  1108. } else if ((doff < SDPCM_HDRLEN) ||
  1109. (doff > (pfirst->len - SDPCM_HDRLEN))) {
  1110. brcmf_dbg(ERROR, "(superframe): Bad data offset %d: HW %d pkt %d min %d\n",
  1111. doff, sublen, pfirst->len, SDPCM_HDRLEN);
  1112. errcode = -1;
  1113. }
  1114. /* Check sequence number of superframe SW header */
  1115. if (rxseq != seq) {
  1116. brcmf_dbg(INFO, "(superframe) rx_seq %d, expected %d\n",
  1117. seq, rxseq);
  1118. bus->rx_badseq++;
  1119. rxseq = seq;
  1120. }
  1121. /* Check window for sanity */
  1122. if ((u8) (txmax - bus->tx_seq) > 0x40) {
  1123. brcmf_dbg(ERROR, "unlikely tx max %d with tx_seq %d\n",
  1124. txmax, bus->tx_seq);
  1125. txmax = bus->tx_seq + 2;
  1126. }
  1127. bus->tx_max = txmax;
  1128. /* Remove superframe header, remember offset */
  1129. skb_pull(pfirst, doff);
  1130. sfdoff = doff;
  1131. num = 0;
  1132. /* Validate all the subframe headers */
  1133. skb_queue_walk(&bus->glom, pnext) {
  1134. /* leave when invalid subframe is found */
  1135. if (errcode)
  1136. break;
  1137. dptr = (u8 *) (pnext->data);
  1138. dlen = (u16) (pnext->len);
  1139. sublen = get_unaligned_le16(dptr);
  1140. check = get_unaligned_le16(dptr + sizeof(u16));
  1141. chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
  1142. doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
  1143. #ifdef BCMDBG
  1144. if (BRCMF_GLOM_ON()) {
  1145. printk(KERN_DEBUG "subframe:\n");
  1146. print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
  1147. dptr, 32);
  1148. }
  1149. #endif
  1150. if ((u16)~(sublen ^ check)) {
  1151. brcmf_dbg(ERROR, "(subframe %d): HW hdr error: len/check 0x%04x/0x%04x\n",
  1152. num, sublen, check);
  1153. errcode = -1;
  1154. } else if ((sublen > dlen) || (sublen < SDPCM_HDRLEN)) {
  1155. brcmf_dbg(ERROR, "(subframe %d): length mismatch: len 0x%04x, expect 0x%04x\n",
  1156. num, sublen, dlen);
  1157. errcode = -1;
  1158. } else if ((chan != SDPCM_DATA_CHANNEL) &&
  1159. (chan != SDPCM_EVENT_CHANNEL)) {
  1160. brcmf_dbg(ERROR, "(subframe %d): bad channel %d\n",
  1161. num, chan);
  1162. errcode = -1;
  1163. } else if ((doff < SDPCM_HDRLEN) || (doff > sublen)) {
  1164. brcmf_dbg(ERROR, "(subframe %d): Bad data offset %d: HW %d min %d\n",
  1165. num, doff, sublen, SDPCM_HDRLEN);
  1166. errcode = -1;
  1167. }
  1168. /* increase the subframe count */
  1169. num++;
  1170. }
  1171. if (errcode) {
  1172. /* Terminate frame on error, request
  1173. a couple retries */
  1174. if (bus->glomerr++ < 3) {
  1175. /* Restore superframe header space */
  1176. skb_push(pfirst, sfdoff);
  1177. brcmf_sdbrcm_rxfail(bus, true, true);
  1178. } else {
  1179. bus->glomerr = 0;
  1180. brcmf_sdbrcm_rxfail(bus, true, false);
  1181. bus->rxglomfail++;
  1182. brcmf_sdbrcm_free_glom(bus);
  1183. }
  1184. bus->nextlen = 0;
  1185. return 0;
  1186. }
  1187. /* Basic SD framing looks ok - process each packet (header) */
  1188. skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
  1189. dptr = (u8 *) (pfirst->data);
  1190. sublen = get_unaligned_le16(dptr);
  1191. chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
  1192. seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
  1193. doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
  1194. brcmf_dbg(GLOM, "Get subframe %d, %p(%p/%d), sublen %d chan %d seq %d\n",
  1195. num, pfirst, pfirst->data,
  1196. pfirst->len, sublen, chan, seq);
  1197. /* precondition: chan == SDPCM_DATA_CHANNEL ||
  1198. chan == SDPCM_EVENT_CHANNEL */
  1199. if (rxseq != seq) {
  1200. brcmf_dbg(GLOM, "rx_seq %d, expected %d\n",
  1201. seq, rxseq);
  1202. bus->rx_badseq++;
  1203. rxseq = seq;
  1204. }
  1205. rxseq++;
  1206. #ifdef BCMDBG
  1207. if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
  1208. printk(KERN_DEBUG "Rx Subframe Data:\n");
  1209. print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
  1210. dptr, dlen);
  1211. }
  1212. #endif
  1213. __skb_trim(pfirst, sublen);
  1214. skb_pull(pfirst, doff);
  1215. if (pfirst->len == 0) {
  1216. skb_unlink(pfirst, &bus->glom);
  1217. brcmu_pkt_buf_free_skb(pfirst);
  1218. continue;
  1219. } else if (brcmf_proto_hdrpull(bus->drvr, &ifidx,
  1220. pfirst) != 0) {
  1221. brcmf_dbg(ERROR, "rx protocol error\n");
  1222. bus->drvr->rx_errors++;
  1223. skb_unlink(pfirst, &bus->glom);
  1224. brcmu_pkt_buf_free_skb(pfirst);
  1225. continue;
  1226. }
  1227. #ifdef BCMDBG
  1228. if (BRCMF_GLOM_ON()) {
  1229. brcmf_dbg(GLOM, "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
  1230. bus->glom.qlen, pfirst, pfirst->data,
  1231. pfirst->len, pfirst->next,
  1232. pfirst->prev);
  1233. print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
  1234. pfirst->data,
  1235. min_t(int, pfirst->len, 32));
  1236. }
  1237. #endif /* BCMDBG */
  1238. }
  1239. /* sent any remaining packets up */
  1240. if (bus->glom.qlen) {
  1241. up(&bus->sdsem);
  1242. brcmf_rx_frame(bus->drvr, ifidx, &bus->glom);
  1243. down(&bus->sdsem);
  1244. }
  1245. bus->rxglomframes++;
  1246. bus->rxglompkts += bus->glom.qlen;
  1247. }
  1248. return num;
  1249. }
  1250. static int brcmf_sdbrcm_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
  1251. bool *pending)
  1252. {
  1253. DECLARE_WAITQUEUE(wait, current);
  1254. int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
  1255. /* Wait until control frame is available */
  1256. add_wait_queue(&bus->dcmd_resp_wait, &wait);
  1257. set_current_state(TASK_INTERRUPTIBLE);
  1258. while (!(*condition) && (!signal_pending(current) && timeout))
  1259. timeout = schedule_timeout(timeout);
  1260. if (signal_pending(current))
  1261. *pending = true;
  1262. set_current_state(TASK_RUNNING);
  1263. remove_wait_queue(&bus->dcmd_resp_wait, &wait);
  1264. return timeout;
  1265. }
  1266. static int brcmf_sdbrcm_dcmd_resp_wake(struct brcmf_sdio *bus)
  1267. {
  1268. if (waitqueue_active(&bus->dcmd_resp_wait))
  1269. wake_up_interruptible(&bus->dcmd_resp_wait);
  1270. return 0;
  1271. }
  1272. static void
  1273. brcmf_sdbrcm_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
  1274. {
  1275. uint rdlen, pad;
  1276. int sdret;
  1277. brcmf_dbg(TRACE, "Enter\n");
  1278. /* Set rxctl for frame (w/optional alignment) */
  1279. bus->rxctl = bus->rxbuf;
  1280. bus->rxctl += BRCMF_FIRSTREAD;
  1281. pad = ((unsigned long)bus->rxctl % BRCMF_SDALIGN);
  1282. if (pad)
  1283. bus->rxctl += (BRCMF_SDALIGN - pad);
  1284. bus->rxctl -= BRCMF_FIRSTREAD;
  1285. /* Copy the already-read portion over */
  1286. memcpy(bus->rxctl, hdr, BRCMF_FIRSTREAD);
  1287. if (len <= BRCMF_FIRSTREAD)
  1288. goto gotpkt;
  1289. /* Raise rdlen to next SDIO block to avoid tail command */
  1290. rdlen = len - BRCMF_FIRSTREAD;
  1291. if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
  1292. pad = bus->blocksize - (rdlen % bus->blocksize);
  1293. if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
  1294. ((len + pad) < bus->drvr->maxctl))
  1295. rdlen += pad;
  1296. } else if (rdlen % BRCMF_SDALIGN) {
  1297. rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
  1298. }
  1299. /* Satisfy length-alignment requirements */
  1300. if (rdlen & (ALIGNMENT - 1))
  1301. rdlen = roundup(rdlen, ALIGNMENT);
  1302. /* Drop if the read is too big or it exceeds our maximum */
  1303. if ((rdlen + BRCMF_FIRSTREAD) > bus->drvr->maxctl) {
  1304. brcmf_dbg(ERROR, "%d-byte control read exceeds %d-byte buffer\n",
  1305. rdlen, bus->drvr->maxctl);
  1306. bus->drvr->rx_errors++;
  1307. brcmf_sdbrcm_rxfail(bus, false, false);
  1308. goto done;
  1309. }
  1310. if ((len - doff) > bus->drvr->maxctl) {
  1311. brcmf_dbg(ERROR, "%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
  1312. len, len - doff, bus->drvr->maxctl);
  1313. bus->drvr->rx_errors++;
  1314. bus->rx_toolong++;
  1315. brcmf_sdbrcm_rxfail(bus, false, false);
  1316. goto done;
  1317. }
  1318. /* Read remainder of frame body into the rxctl buffer */
  1319. sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
  1320. bus->sdiodev->sbwad,
  1321. SDIO_FUNC_2,
  1322. F2SYNC, (bus->rxctl + BRCMF_FIRSTREAD), rdlen);
  1323. bus->f2rxdata++;
  1324. /* Control frame failures need retransmission */
  1325. if (sdret < 0) {
  1326. brcmf_dbg(ERROR, "read %d control bytes failed: %d\n",
  1327. rdlen, sdret);
  1328. bus->rxc_errors++;
  1329. brcmf_sdbrcm_rxfail(bus, true, true);
  1330. goto done;
  1331. }
  1332. gotpkt:
  1333. #ifdef BCMDBG
  1334. if (BRCMF_BYTES_ON() && BRCMF_CTL_ON()) {
  1335. printk(KERN_DEBUG "RxCtrl:\n");
  1336. print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, bus->rxctl, len);
  1337. }
  1338. #endif
  1339. /* Point to valid data and indicate its length */
  1340. bus->rxctl += doff;
  1341. bus->rxlen = len - doff;
  1342. done:
  1343. /* Awake any waiters */
  1344. brcmf_sdbrcm_dcmd_resp_wake(bus);
  1345. }
  1346. /* Pad read to blocksize for efficiency */
  1347. static void brcmf_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
  1348. {
  1349. if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
  1350. *pad = bus->blocksize - (*rdlen % bus->blocksize);
  1351. if (*pad <= bus->roundup && *pad < bus->blocksize &&
  1352. *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
  1353. *rdlen += *pad;
  1354. } else if (*rdlen % BRCMF_SDALIGN) {
  1355. *rdlen += BRCMF_SDALIGN - (*rdlen % BRCMF_SDALIGN);
  1356. }
  1357. }
  1358. static void
  1359. brcmf_alloc_pkt_and_read(struct brcmf_sdio *bus, u16 rdlen,
  1360. struct sk_buff **pkt, u8 **rxbuf)
  1361. {
  1362. int sdret; /* Return code from calls */
  1363. *pkt = brcmu_pkt_buf_get_skb(rdlen + BRCMF_SDALIGN);
  1364. if (*pkt == NULL)
  1365. return;
  1366. pkt_align(*pkt, rdlen, BRCMF_SDALIGN);
  1367. *rxbuf = (u8 *) ((*pkt)->data);
  1368. /* Read the entire frame */
  1369. sdret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
  1370. SDIO_FUNC_2, F2SYNC, *pkt);
  1371. bus->f2rxdata++;
  1372. if (sdret < 0) {
  1373. brcmf_dbg(ERROR, "(nextlen): read %d bytes failed: %d\n",
  1374. rdlen, sdret);
  1375. brcmu_pkt_buf_free_skb(*pkt);
  1376. bus->drvr->rx_errors++;
  1377. /* Force retry w/normal header read.
  1378. * Don't attempt NAK for
  1379. * gSPI
  1380. */
  1381. brcmf_sdbrcm_rxfail(bus, true, true);
  1382. *pkt = NULL;
  1383. }
  1384. }
  1385. /* Checks the header */
  1386. static int
  1387. brcmf_check_rxbuf(struct brcmf_sdio *bus, struct sk_buff *pkt, u8 *rxbuf,
  1388. u8 rxseq, u16 nextlen, u16 *len)
  1389. {
  1390. u16 check;
  1391. bool len_consistent; /* Result of comparing readahead len and
  1392. len from hw-hdr */
  1393. memcpy(bus->rxhdr, rxbuf, SDPCM_HDRLEN);
  1394. /* Extract hardware header fields */
  1395. *len = get_unaligned_le16(bus->rxhdr);
  1396. check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
  1397. /* All zeros means readahead info was bad */
  1398. if (!(*len | check)) {
  1399. brcmf_dbg(INFO, "(nextlen): read zeros in HW header???\n");
  1400. goto fail;
  1401. }
  1402. /* Validate check bytes */
  1403. if ((u16)~(*len ^ check)) {
  1404. brcmf_dbg(ERROR, "(nextlen): HW hdr error: nextlen/len/check 0x%04x/0x%04x/0x%04x\n",
  1405. nextlen, *len, check);
  1406. bus->rx_badhdr++;
  1407. brcmf_sdbrcm_rxfail(bus, false, false);
  1408. goto fail;
  1409. }
  1410. /* Validate frame length */
  1411. if (*len < SDPCM_HDRLEN) {
  1412. brcmf_dbg(ERROR, "(nextlen): HW hdr length invalid: %d\n",
  1413. *len);
  1414. goto fail;
  1415. }
  1416. /* Check for consistency with readahead info */
  1417. len_consistent = (nextlen != (roundup(*len, 16) >> 4));
  1418. if (len_consistent) {
  1419. /* Mismatch, force retry w/normal
  1420. header (may be >4K) */
  1421. brcmf_dbg(ERROR, "(nextlen): mismatch, nextlen %d len %d rnd %d; expected rxseq %d\n",
  1422. nextlen, *len, roundup(*len, 16),
  1423. rxseq);
  1424. brcmf_sdbrcm_rxfail(bus, true, true);
  1425. goto fail;
  1426. }
  1427. return 0;
  1428. fail:
  1429. brcmf_sdbrcm_pktfree2(bus, pkt);
  1430. return -EINVAL;
  1431. }
  1432. /* Return true if there may be more frames to read */
  1433. static uint
  1434. brcmf_sdbrcm_readframes(struct brcmf_sdio *bus, uint maxframes, bool *finished)
  1435. {
  1436. u16 len, check; /* Extracted hardware header fields */
  1437. u8 chan, seq, doff; /* Extracted software header fields */
  1438. u8 fcbits; /* Extracted fcbits from software header */
  1439. struct sk_buff *pkt; /* Packet for event or data frames */
  1440. u16 pad; /* Number of pad bytes to read */
  1441. u16 rdlen; /* Total number of bytes to read */
  1442. u8 rxseq; /* Next sequence number to expect */
  1443. uint rxleft = 0; /* Remaining number of frames allowed */
  1444. int sdret; /* Return code from calls */
  1445. u8 txmax; /* Maximum tx sequence offered */
  1446. u8 *rxbuf;
  1447. int ifidx = 0;
  1448. uint rxcount = 0; /* Total frames read */
  1449. brcmf_dbg(TRACE, "Enter\n");
  1450. /* Not finished unless we encounter no more frames indication */
  1451. *finished = false;
  1452. for (rxseq = bus->rx_seq, rxleft = maxframes;
  1453. !bus->rxskip && rxleft && bus->drvr->busstate != BRCMF_BUS_DOWN;
  1454. rxseq++, rxleft--) {
  1455. /* Handle glomming separately */
  1456. if (bus->glomd || !skb_queue_empty(&bus->glom)) {
  1457. u8 cnt;
  1458. brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
  1459. bus->glomd, skb_peek(&bus->glom));
  1460. cnt = brcmf_sdbrcm_rxglom(bus, rxseq);
  1461. brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
  1462. rxseq += cnt - 1;
  1463. rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
  1464. continue;
  1465. }
  1466. /* Try doing single read if we can */
  1467. if (bus->nextlen) {
  1468. u16 nextlen = bus->nextlen;
  1469. bus->nextlen = 0;
  1470. rdlen = len = nextlen << 4;
  1471. brcmf_pad(bus, &pad, &rdlen);
  1472. /*
  1473. * After the frame is received we have to
  1474. * distinguish whether it is data
  1475. * or non-data frame.
  1476. */
  1477. brcmf_alloc_pkt_and_read(bus, rdlen, &pkt, &rxbuf);
  1478. if (pkt == NULL) {
  1479. /* Give up on data, request rtx of events */
  1480. brcmf_dbg(ERROR, "(nextlen): brcmf_alloc_pkt_and_read failed: len %d rdlen %d expected rxseq %d\n",
  1481. len, rdlen, rxseq);
  1482. continue;
  1483. }
  1484. if (brcmf_check_rxbuf(bus, pkt, rxbuf, rxseq, nextlen,
  1485. &len) < 0)
  1486. continue;
  1487. /* Extract software header fields */
  1488. chan = SDPCM_PACKET_CHANNEL(
  1489. &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
  1490. seq = SDPCM_PACKET_SEQUENCE(
  1491. &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
  1492. doff = SDPCM_DOFFSET_VALUE(
  1493. &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
  1494. txmax = SDPCM_WINDOW_VALUE(
  1495. &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
  1496. bus->nextlen =
  1497. bus->rxhdr[SDPCM_FRAMETAG_LEN +
  1498. SDPCM_NEXTLEN_OFFSET];
  1499. if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
  1500. brcmf_dbg(INFO, "(nextlen): got frame w/nextlen too large (%d), seq %d\n",
  1501. bus->nextlen, seq);
  1502. bus->nextlen = 0;
  1503. }
  1504. bus->drvr->rx_readahead_cnt++;
  1505. /* Handle Flow Control */
  1506. fcbits = SDPCM_FCMASK_VALUE(
  1507. &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
  1508. if (bus->flowcontrol != fcbits) {
  1509. if (~bus->flowcontrol & fcbits)
  1510. bus->fc_xoff++;
  1511. if (bus->flowcontrol & ~fcbits)
  1512. bus->fc_xon++;
  1513. bus->fc_rcvd++;
  1514. bus->flowcontrol = fcbits;
  1515. }
  1516. /* Check and update sequence number */
  1517. if (rxseq != seq) {
  1518. brcmf_dbg(INFO, "(nextlen): rx_seq %d, expected %d\n",
  1519. seq, rxseq);
  1520. bus->rx_badseq++;
  1521. rxseq = seq;
  1522. }
  1523. /* Check window for sanity */
  1524. if ((u8) (txmax - bus->tx_seq) > 0x40) {
  1525. brcmf_dbg(ERROR, "got unlikely tx max %d with tx_seq %d\n",
  1526. txmax, bus->tx_seq);
  1527. txmax = bus->tx_seq + 2;
  1528. }
  1529. bus->tx_max = txmax;
  1530. #ifdef BCMDBG
  1531. if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
  1532. printk(KERN_DEBUG "Rx Data:\n");
  1533. print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
  1534. rxbuf, len);
  1535. } else if (BRCMF_HDRS_ON()) {
  1536. printk(KERN_DEBUG "RxHdr:\n");
  1537. print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
  1538. bus->rxhdr, SDPCM_HDRLEN);
  1539. }
  1540. #endif
  1541. if (chan == SDPCM_CONTROL_CHANNEL) {
  1542. brcmf_dbg(ERROR, "(nextlen): readahead on control packet %d?\n",
  1543. seq);
  1544. /* Force retry w/normal header read */
  1545. bus->nextlen = 0;
  1546. brcmf_sdbrcm_rxfail(bus, false, true);
  1547. brcmf_sdbrcm_pktfree2(bus, pkt);
  1548. continue;
  1549. }
  1550. /* Validate data offset */
  1551. if ((doff < SDPCM_HDRLEN) || (doff > len)) {
  1552. brcmf_dbg(ERROR, "(nextlen): bad data offset %d: HW len %d min %d\n",
  1553. doff, len, SDPCM_HDRLEN);
  1554. brcmf_sdbrcm_rxfail(bus, false, false);
  1555. brcmf_sdbrcm_pktfree2(bus, pkt);
  1556. continue;
  1557. }
  1558. /* All done with this one -- now deliver the packet */
  1559. goto deliver;
  1560. }
  1561. /* Read frame header (hardware and software) */
  1562. sdret = brcmf_sdcard_recv_buf(bus->sdiodev, bus->sdiodev->sbwad,
  1563. SDIO_FUNC_2, F2SYNC, bus->rxhdr,
  1564. BRCMF_FIRSTREAD);
  1565. bus->f2rxhdrs++;
  1566. if (sdret < 0) {
  1567. brcmf_dbg(ERROR, "RXHEADER FAILED: %d\n", sdret);
  1568. bus->rx_hdrfail++;
  1569. brcmf_sdbrcm_rxfail(bus, true, true);
  1570. continue;
  1571. }
  1572. #ifdef BCMDBG
  1573. if (BRCMF_BYTES_ON() || BRCMF_HDRS_ON()) {
  1574. printk(KERN_DEBUG "RxHdr:\n");
  1575. print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
  1576. bus->rxhdr, SDPCM_HDRLEN);
  1577. }
  1578. #endif
  1579. /* Extract hardware header fields */
  1580. len = get_unaligned_le16(bus->rxhdr);
  1581. check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
  1582. /* All zeros means no more frames */
  1583. if (!(len | check)) {
  1584. *finished = true;
  1585. break;
  1586. }
  1587. /* Validate check bytes */
  1588. if ((u16) ~(len ^ check)) {
  1589. brcmf_dbg(ERROR, "HW hdr err: len/check 0x%04x/0x%04x\n",
  1590. len, check);
  1591. bus->rx_badhdr++;
  1592. brcmf_sdbrcm_rxfail(bus, false, false);
  1593. continue;
  1594. }
  1595. /* Validate frame length */
  1596. if (len < SDPCM_HDRLEN) {
  1597. brcmf_dbg(ERROR, "HW hdr length invalid: %d\n", len);
  1598. continue;
  1599. }
  1600. /* Extract software header fields */
  1601. chan = SDPCM_PACKET_CHANNEL(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
  1602. seq = SDPCM_PACKET_SEQUENCE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
  1603. doff = SDPCM_DOFFSET_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
  1604. txmax = SDPCM_WINDOW_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
  1605. /* Validate data offset */
  1606. if ((doff < SDPCM_HDRLEN) || (doff > len)) {
  1607. brcmf_dbg(ERROR, "Bad data offset %d: HW len %d, min %d seq %d\n",
  1608. doff, len, SDPCM_HDRLEN, seq);
  1609. bus->rx_badhdr++;
  1610. brcmf_sdbrcm_rxfail(bus, false, false);
  1611. continue;
  1612. }
  1613. /* Save the readahead length if there is one */
  1614. bus->nextlen =
  1615. bus->rxhdr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
  1616. if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
  1617. brcmf_dbg(INFO, "(nextlen): got frame w/nextlen too large (%d), seq %d\n",
  1618. bus->nextlen, seq);
  1619. bus->nextlen = 0;
  1620. }
  1621. /* Handle Flow Control */
  1622. fcbits = SDPCM_FCMASK_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
  1623. if (bus->flowcontrol != fcbits) {
  1624. if (~bus->flowcontrol & fcbits)
  1625. bus->fc_xoff++;
  1626. if (bus->flowcontrol & ~fcbits)
  1627. bus->fc_xon++;
  1628. bus->fc_rcvd++;
  1629. bus->flowcontrol = fcbits;
  1630. }
  1631. /* Check and update sequence number */
  1632. if (rxseq != seq) {
  1633. brcmf_dbg(INFO, "rx_seq %d, expected %d\n", seq, rxseq);
  1634. bus->rx_badseq++;
  1635. rxseq = seq;
  1636. }
  1637. /* Check window for sanity */
  1638. if ((u8) (txmax - bus->tx_seq) > 0x40) {
  1639. brcmf_dbg(ERROR, "unlikely tx max %d with tx_seq %d\n",
  1640. txmax, bus->tx_seq);
  1641. txmax = bus->tx_seq + 2;
  1642. }
  1643. bus->tx_max = txmax;
  1644. /* Call a separate function for control frames */
  1645. if (chan == SDPCM_CONTROL_CHANNEL) {
  1646. brcmf_sdbrcm_read_control(bus, bus->rxhdr, len, doff);
  1647. continue;
  1648. }
  1649. /* precondition: chan is either SDPCM_DATA_CHANNEL,
  1650. SDPCM_EVENT_CHANNEL, SDPCM_TEST_CHANNEL or
  1651. SDPCM_GLOM_CHANNEL */
  1652. /* Length to read */
  1653. rdlen = (len > BRCMF_FIRSTREAD) ? (len - BRCMF_FIRSTREAD) : 0;
  1654. /* May pad read to blocksize for efficiency */
  1655. if (bus->roundup && bus->blocksize &&
  1656. (rdlen > bus->blocksize)) {
  1657. pad = bus->blocksize - (rdlen % bus->blocksize);
  1658. if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
  1659. ((rdlen + pad + BRCMF_FIRSTREAD) < MAX_RX_DATASZ))
  1660. rdlen += pad;
  1661. } else if (rdlen % BRCMF_SDALIGN) {
  1662. rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
  1663. }
  1664. /* Satisfy length-alignment requirements */
  1665. if (rdlen & (ALIGNMENT - 1))
  1666. rdlen = roundup(rdlen, ALIGNMENT);
  1667. if ((rdlen + BRCMF_FIRSTREAD) > MAX_RX_DATASZ) {
  1668. /* Too long -- skip this frame */
  1669. brcmf_dbg(ERROR, "too long: len %d rdlen %d\n",
  1670. len, rdlen);
  1671. bus->drvr->rx_errors++;
  1672. bus->rx_toolong++;
  1673. brcmf_sdbrcm_rxfail(bus, false, false);
  1674. continue;
  1675. }
  1676. pkt = brcmu_pkt_buf_get_skb(rdlen +
  1677. BRCMF_FIRSTREAD + BRCMF_SDALIGN);
  1678. if (!pkt) {
  1679. /* Give up on data, request rtx of events */
  1680. brcmf_dbg(ERROR, "brcmu_pkt_buf_get_skb failed: rdlen %d chan %d\n",
  1681. rdlen, chan);
  1682. bus->drvr->rx_dropped++;
  1683. brcmf_sdbrcm_rxfail(bus, false, RETRYCHAN(chan));
  1684. continue;
  1685. }
  1686. /* Leave room for what we already read, and align remainder */
  1687. skb_pull(pkt, BRCMF_FIRSTREAD);
  1688. pkt_align(pkt, rdlen, BRCMF_SDALIGN);
  1689. /* Read the remaining frame data */
  1690. sdret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
  1691. SDIO_FUNC_2, F2SYNC, pkt);
  1692. bus->f2rxdata++;
  1693. if (sdret < 0) {
  1694. brcmf_dbg(ERROR, "read %d %s bytes failed: %d\n", rdlen,
  1695. ((chan == SDPCM_EVENT_CHANNEL) ? "event"
  1696. : ((chan == SDPCM_DATA_CHANNEL) ? "data"
  1697. : "test")), sdret);
  1698. brcmu_pkt_buf_free_skb(pkt);
  1699. bus->drvr->rx_errors++;
  1700. brcmf_sdbrcm_rxfail(bus, true, RETRYCHAN(chan));
  1701. continue;
  1702. }
  1703. /* Copy the already-read portion */
  1704. skb_push(pkt, BRCMF_FIRSTREAD);
  1705. memcpy(pkt->data, bus->rxhdr, BRCMF_FIRSTREAD);
  1706. #ifdef BCMDBG
  1707. if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) {
  1708. printk(KERN_DEBUG "Rx Data:\n");
  1709. print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
  1710. pkt->data, len);
  1711. }
  1712. #endif
  1713. deliver:
  1714. /* Save superframe descriptor and allocate packet frame */
  1715. if (chan == SDPCM_GLOM_CHANNEL) {
  1716. if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_FRAMETAG_LEN])) {
  1717. brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
  1718. len);
  1719. #ifdef BCMDBG
  1720. if (BRCMF_GLOM_ON()) {
  1721. printk(KERN_DEBUG "Glom Data:\n");
  1722. print_hex_dump_bytes("",
  1723. DUMP_PREFIX_OFFSET,
  1724. pkt->data, len);
  1725. }
  1726. #endif
  1727. __skb_trim(pkt, len);
  1728. skb_pull(pkt, SDPCM_HDRLEN);
  1729. bus->glomd = pkt;
  1730. } else {
  1731. brcmf_dbg(ERROR, "%s: glom superframe w/o "
  1732. "descriptor!\n", __func__);
  1733. brcmf_sdbrcm_rxfail(bus, false, false);
  1734. }
  1735. continue;
  1736. }
  1737. /* Fill in packet len and prio, deliver upward */
  1738. __skb_trim(pkt, len);
  1739. skb_pull(pkt, doff);
  1740. if (pkt->len == 0) {
  1741. brcmu_pkt_buf_free_skb(pkt);
  1742. continue;
  1743. } else if (brcmf_proto_hdrpull(bus->drvr, &ifidx, pkt) != 0) {
  1744. brcmf_dbg(ERROR, "rx protocol error\n");
  1745. brcmu_pkt_buf_free_skb(pkt);
  1746. bus->drvr->rx_errors++;
  1747. continue;
  1748. }
  1749. /* Unlock during rx call */
  1750. up(&bus->sdsem);
  1751. brcmf_rx_packet(bus->drvr, ifidx, pkt);
  1752. down(&bus->sdsem);
  1753. }
  1754. rxcount = maxframes - rxleft;
  1755. #ifdef BCMDBG
  1756. /* Message if we hit the limit */
  1757. if (!rxleft)
  1758. brcmf_dbg(DATA, "hit rx limit of %d frames\n",
  1759. maxframes);
  1760. else
  1761. #endif /* BCMDBG */
  1762. brcmf_dbg(DATA, "processed %d frames\n", rxcount);
  1763. /* Back off rxseq if awaiting rtx, update rx_seq */
  1764. if (bus->rxskip)
  1765. rxseq--;
  1766. bus->rx_seq = rxseq;
  1767. return rxcount;
  1768. }
  1769. static void
  1770. brcmf_sdbrcm_wait_for_event(struct brcmf_sdio *bus, bool *lockvar)
  1771. {
  1772. up(&bus->sdsem);
  1773. wait_event_interruptible_timeout(bus->ctrl_wait,
  1774. (*lockvar == false), HZ * 2);
  1775. down(&bus->sdsem);
  1776. return;
  1777. }
  1778. static void
  1779. brcmf_sdbrcm_wait_event_wakeup(struct brcmf_sdio *bus)
  1780. {
  1781. if (waitqueue_active(&bus->ctrl_wait))
  1782. wake_up_interruptible(&bus->ctrl_wait);
  1783. return;
  1784. }
  1785. /* Writes a HW/SW header into the packet and sends it. */
  1786. /* Assumes: (a) header space already there, (b) caller holds lock */
  1787. static int brcmf_sdbrcm_txpkt(struct brcmf_sdio *bus, struct sk_buff *pkt,
  1788. uint chan, bool free_pkt)
  1789. {
  1790. int ret;
  1791. u8 *frame;
  1792. u16 len, pad = 0;
  1793. u32 swheader;
  1794. struct sk_buff *new;
  1795. int i;
  1796. brcmf_dbg(TRACE, "Enter\n");
  1797. frame = (u8 *) (pkt->data);
  1798. /* Add alignment padding, allocate new packet if needed */
  1799. pad = ((unsigned long)frame % BRCMF_SDALIGN);
  1800. if (pad) {
  1801. if (skb_headroom(pkt) < pad) {
  1802. brcmf_dbg(INFO, "insufficient headroom %d for %d pad\n",
  1803. skb_headroom(pkt), pad);
  1804. bus->drvr->tx_realloc++;
  1805. new = brcmu_pkt_buf_get_skb(pkt->len + BRCMF_SDALIGN);
  1806. if (!new) {
  1807. brcmf_dbg(ERROR, "couldn't allocate new %d-byte packet\n",
  1808. pkt->len + BRCMF_SDALIGN);
  1809. ret = -ENOMEM;
  1810. goto done;
  1811. }
  1812. pkt_align(new, pkt->len, BRCMF_SDALIGN);
  1813. memcpy(new->data, pkt->data, pkt->len);
  1814. if (free_pkt)
  1815. brcmu_pkt_buf_free_skb(pkt);
  1816. /* free the pkt if canned one is not used */
  1817. free_pkt = true;
  1818. pkt = new;
  1819. frame = (u8 *) (pkt->data);
  1820. /* precondition: (frame % BRCMF_SDALIGN) == 0) */
  1821. pad = 0;
  1822. } else {
  1823. skb_push(pkt, pad);
  1824. frame = (u8 *) (pkt->data);
  1825. /* precondition: pad + SDPCM_HDRLEN <= pkt->len */
  1826. memset(frame, 0, pad + SDPCM_HDRLEN);
  1827. }
  1828. }
  1829. /* precondition: pad < BRCMF_SDALIGN */
  1830. /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
  1831. len = (u16) (pkt->len);
  1832. *(__le16 *) frame = cpu_to_le16(len);
  1833. *(((__le16 *) frame) + 1) = cpu_to_le16(~len);
  1834. /* Software tag: channel, sequence number, data offset */
  1835. swheader =
  1836. ((chan << SDPCM_CHANNEL_SHIFT) & SDPCM_CHANNEL_MASK) | bus->tx_seq |
  1837. (((pad +
  1838. SDPCM_HDRLEN) << SDPCM_DOFFSET_SHIFT) & SDPCM_DOFFSET_MASK);
  1839. put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
  1840. put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
  1841. #ifdef BCMDBG
  1842. tx_packets[pkt->priority]++;
  1843. if (BRCMF_BYTES_ON() &&
  1844. (((BRCMF_CTL_ON() && (chan == SDPCM_CONTROL_CHANNEL)) ||
  1845. (BRCMF_DATA_ON() && (chan != SDPCM_CONTROL_CHANNEL))))) {
  1846. printk(KERN_DEBUG "Tx Frame:\n");
  1847. print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, frame, len);
  1848. } else if (BRCMF_HDRS_ON()) {
  1849. printk(KERN_DEBUG "TxHdr:\n");
  1850. print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
  1851. frame, min_t(u16, len, 16));
  1852. }
  1853. #endif
  1854. /* Raise len to next SDIO block to eliminate tail command */
  1855. if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
  1856. u16 pad = bus->blocksize - (len % bus->blocksize);
  1857. if ((pad <= bus->roundup) && (pad < bus->blocksize))
  1858. len += pad;
  1859. } else if (len % BRCMF_SDALIGN) {
  1860. len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
  1861. }
  1862. /* Some controllers have trouble with odd bytes -- round to even */
  1863. if (len & (ALIGNMENT - 1))
  1864. len = roundup(len, ALIGNMENT);
  1865. ret = brcmf_sdcard_send_pkt(bus->sdiodev, bus->sdiodev->sbwad,
  1866. SDIO_FUNC_2, F2SYNC, pkt);
  1867. bus->f2txdata++;
  1868. if (ret < 0) {
  1869. /* On failure, abort the command and terminate the frame */
  1870. brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
  1871. ret);
  1872. bus->tx_sderrs++;
  1873. brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
  1874. brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
  1875. SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
  1876. NULL);
  1877. bus->f1regdata++;
  1878. for (i = 0; i < 3; i++) {
  1879. u8 hi, lo;
  1880. hi = brcmf_sdcard_cfg_read(bus->sdiodev,
  1881. SDIO_FUNC_1,
  1882. SBSDIO_FUNC1_WFRAMEBCHI,
  1883. NULL);
  1884. lo = brcmf_sdcard_cfg_read(bus->sdiodev,
  1885. SDIO_FUNC_1,
  1886. SBSDIO_FUNC1_WFRAMEBCLO,
  1887. NULL);
  1888. bus->f1regdata += 2;
  1889. if ((hi == 0) && (lo == 0))
  1890. break;
  1891. }
  1892. }
  1893. if (ret == 0)
  1894. bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
  1895. done:
  1896. /* restore pkt buffer pointer before calling tx complete routine */
  1897. skb_pull(pkt, SDPCM_HDRLEN + pad);
  1898. up(&bus->sdsem);
  1899. brcmf_txcomplete(bus->drvr, pkt, ret != 0);
  1900. down(&bus->sdsem);
  1901. if (free_pkt)
  1902. brcmu_pkt_buf_free_skb(pkt);
  1903. return ret;
  1904. }
  1905. static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes)
  1906. {
  1907. struct sk_buff *pkt;
  1908. u32 intstatus = 0;
  1909. uint retries = 0;
  1910. int ret = 0, prec_out;
  1911. uint cnt = 0;
  1912. uint datalen;
  1913. u8 tx_prec_map;
  1914. struct brcmf_pub *drvr = bus->drvr;
  1915. brcmf_dbg(TRACE, "Enter\n");
  1916. tx_prec_map = ~bus->flowcontrol;
  1917. /* Send frames until the limit or some other event */
  1918. for (cnt = 0; (cnt < maxframes) && data_ok(bus); cnt++) {
  1919. spin_lock_bh(&bus->txqlock);
  1920. pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out);
  1921. if (pkt == NULL) {
  1922. spin_unlock_bh(&bus->txqlock);
  1923. break;
  1924. }
  1925. spin_unlock_bh(&bus->txqlock);
  1926. datalen = pkt->len - SDPCM_HDRLEN;
  1927. ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
  1928. if (ret)
  1929. bus->drvr->tx_errors++;
  1930. else
  1931. bus->drvr->dstats.tx_bytes += datalen;
  1932. /* In poll mode, need to check for other events */
  1933. if (!bus->intr && cnt) {
  1934. /* Check device status, signal pending interrupt */
  1935. r_sdreg32(bus, &intstatus,
  1936. offsetof(struct sdpcmd_regs, intstatus),
  1937. &retries);
  1938. bus->f2txdata++;
  1939. if (brcmf_sdcard_regfail(bus->sdiodev))
  1940. break;
  1941. if (intstatus & bus->hostintmask)
  1942. bus->ipend = true;
  1943. }
  1944. }
  1945. /* Deflow-control stack if needed */
  1946. if (drvr->up && (drvr->busstate == BRCMF_BUS_DATA) &&
  1947. drvr->txoff && (pktq_len(&bus->txq) < TXLOW))
  1948. brcmf_txflowcontrol(drvr, 0, OFF);
  1949. return cnt;
  1950. }
  1951. static bool brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)
  1952. {
  1953. u32 intstatus, newstatus = 0;
  1954. uint retries = 0;
  1955. uint rxlimit = bus->rxbound; /* Rx frames to read before resched */
  1956. uint txlimit = bus->txbound; /* Tx frames to send before resched */
  1957. uint framecnt = 0; /* Temporary counter of tx/rx frames */
  1958. bool rxdone = true; /* Flag for no more read data */
  1959. bool resched = false; /* Flag indicating resched wanted */
  1960. brcmf_dbg(TRACE, "Enter\n");
  1961. /* Start with leftover status bits */
  1962. intstatus = bus->intstatus;
  1963. down(&bus->sdsem);
  1964. /* If waiting for HTAVAIL, check status */
  1965. if (bus->clkstate == CLK_PENDING) {
  1966. int err;
  1967. u8 clkctl, devctl = 0;
  1968. #ifdef BCMDBG
  1969. /* Check for inconsistent device control */
  1970. devctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
  1971. SBSDIO_DEVICE_CTL, &err);
  1972. if (err) {
  1973. brcmf_dbg(ERROR, "error reading DEVCTL: %d\n", err);
  1974. bus->drvr->busstate = BRCMF_BUS_DOWN;
  1975. }
  1976. #endif /* BCMDBG */
  1977. /* Read CSR, if clock on switch to AVAIL, else ignore */
  1978. clkctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
  1979. SBSDIO_FUNC1_CHIPCLKCSR, &err);
  1980. if (err) {
  1981. brcmf_dbg(ERROR, "error reading CSR: %d\n",
  1982. err);
  1983. bus->drvr->busstate = BRCMF_BUS_DOWN;
  1984. }
  1985. brcmf_dbg(INFO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
  1986. devctl, clkctl);
  1987. if (SBSDIO_HTAV(clkctl)) {
  1988. devctl = brcmf_sdcard_cfg_read(bus->sdiodev,
  1989. SDIO_FUNC_1,
  1990. SBSDIO_DEVICE_CTL, &err);
  1991. if (err) {
  1992. brcmf_dbg(ERROR, "error reading DEVCTL: %d\n",
  1993. err);
  1994. bus->drvr->busstate = BRCMF_BUS_DOWN;
  1995. }
  1996. devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
  1997. brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
  1998. SBSDIO_DEVICE_CTL, devctl, &err);
  1999. if (err) {
  2000. brcmf_dbg(ERROR, "error writing DEVCTL: %d\n",
  2001. err);
  2002. bus->drvr->busstate = BRCMF_BUS_DOWN;
  2003. }
  2004. bus->clkstate = CLK_AVAIL;
  2005. } else {
  2006. goto clkwait;
  2007. }
  2008. }
  2009. bus_wake(bus);
  2010. /* Make sure backplane clock is on */
  2011. brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true);
  2012. if (bus->clkstate == CLK_PENDING)
  2013. goto clkwait;
  2014. /* Pending interrupt indicates new device status */
  2015. if (bus->ipend) {
  2016. bus->ipend = false;
  2017. r_sdreg32(bus, &newstatus,
  2018. offsetof(struct sdpcmd_regs, intstatus), &retries);
  2019. bus->f1regdata++;
  2020. if (brcmf_sdcard_regfail(bus->sdiodev))
  2021. newstatus = 0;
  2022. newstatus &= bus->hostintmask;
  2023. bus->fcstate = !!(newstatus & I_HMB_FC_STATE);
  2024. if (newstatus) {
  2025. w_sdreg32(bus, newstatus,
  2026. offsetof(struct sdpcmd_regs, intstatus),
  2027. &retries);
  2028. bus->f1regdata++;
  2029. }
  2030. }
  2031. /* Merge new bits with previous */
  2032. intstatus |= newstatus;
  2033. bus->intstatus = 0;
  2034. /* Handle flow-control change: read new state in case our ack
  2035. * crossed another change interrupt. If change still set, assume
  2036. * FC ON for safety, let next loop through do the debounce.
  2037. */
  2038. if (intstatus & I_HMB_FC_CHANGE) {
  2039. intstatus &= ~I_HMB_FC_CHANGE;
  2040. w_sdreg32(bus, I_HMB_FC_CHANGE,
  2041. offsetof(struct sdpcmd_regs, intstatus), &retries);
  2042. r_sdreg32(bus, &newstatus,
  2043. offsetof(struct sdpcmd_regs, intstatus), &retries);
  2044. bus->f1regdata += 2;
  2045. bus->fcstate =
  2046. !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE));
  2047. intstatus |= (newstatus & bus->hostintmask);
  2048. }
  2049. /* Handle host mailbox indication */
  2050. if (intstatus & I_HMB_HOST_INT) {
  2051. intstatus &= ~I_HMB_HOST_INT;
  2052. intstatus |= brcmf_sdbrcm_hostmail(bus);
  2053. }
  2054. /* Generally don't ask for these, can get CRC errors... */
  2055. if (intstatus & I_WR_OOSYNC) {
  2056. brcmf_dbg(ERROR, "Dongle reports WR_OOSYNC\n");
  2057. intstatus &= ~I_WR_OOSYNC;
  2058. }
  2059. if (intstatus & I_RD_OOSYNC) {
  2060. brcmf_dbg(ERROR, "Dongle reports RD_OOSYNC\n");
  2061. intstatus &= ~I_RD_OOSYNC;
  2062. }
  2063. if (intstatus & I_SBINT) {
  2064. brcmf_dbg(ERROR, "Dongle reports SBINT\n");
  2065. intstatus &= ~I_SBINT;
  2066. }
  2067. /* Would be active due to wake-wlan in gSPI */
  2068. if (intstatus & I_CHIPACTIVE) {
  2069. brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
  2070. intstatus &= ~I_CHIPACTIVE;
  2071. }
  2072. /* Ignore frame indications if rxskip is set */
  2073. if (bus->rxskip)
  2074. intstatus &= ~I_HMB_FRAME_IND;
  2075. /* On frame indication, read available frames */
  2076. if (PKT_AVAILABLE()) {
  2077. framecnt = brcmf_sdbrcm_readframes(bus, rxlimit, &rxdone);
  2078. if (rxdone || bus->rxskip)
  2079. intstatus &= ~I_HMB_FRAME_IND;
  2080. rxlimit -= min(framecnt, rxlimit);
  2081. }
  2082. /* Keep still-pending events for next scheduling */
  2083. bus->intstatus = intstatus;
  2084. clkwait:
  2085. if (data_ok(bus) && bus->ctrl_frame_stat &&
  2086. (bus->clkstate == CLK_AVAIL)) {
  2087. int ret, i;
  2088. ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
  2089. SDIO_FUNC_2, F2SYNC, (u8 *) bus->ctrl_frame_buf,
  2090. (u32) bus->ctrl_frame_len);
  2091. if (ret < 0) {
  2092. /* On failure, abort the command and
  2093. terminate the frame */
  2094. brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
  2095. ret);
  2096. bus->tx_sderrs++;
  2097. brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
  2098. brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
  2099. SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
  2100. NULL);
  2101. bus->f1regdata++;
  2102. for (i = 0; i < 3; i++) {
  2103. u8 hi, lo;
  2104. hi = brcmf_sdcard_cfg_read(bus->sdiodev,
  2105. SDIO_FUNC_1,
  2106. SBSDIO_FUNC1_WFRAMEBCHI,
  2107. NULL);
  2108. lo = brcmf_sdcard_cfg_read(bus->sdiodev,
  2109. SDIO_FUNC_1,
  2110. SBSDIO_FUNC1_WFRAMEBCLO,
  2111. NULL);
  2112. bus->f1regdata += 2;
  2113. if ((hi == 0) && (lo == 0))
  2114. break;
  2115. }
  2116. }
  2117. if (ret == 0)
  2118. bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
  2119. brcmf_dbg(INFO, "Return_dpc value is : %d\n", ret);
  2120. bus->ctrl_frame_stat = false;
  2121. brcmf_sdbrcm_wait_event_wakeup(bus);
  2122. }
  2123. /* Send queued frames (limit 1 if rx may still be pending) */
  2124. else if ((bus->clkstate == CLK_AVAIL) && !bus->fcstate &&
  2125. brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
  2126. && data_ok(bus)) {
  2127. framecnt = rxdone ? txlimit : min(txlimit, bus->txminmax);
  2128. framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt);
  2129. txlimit -= framecnt;
  2130. }
  2131. /* Resched if events or tx frames are pending,
  2132. else await next interrupt */
  2133. /* On failed register access, all bets are off:
  2134. no resched or interrupts */
  2135. if ((bus->drvr->busstate == BRCMF_BUS_DOWN) ||
  2136. brcmf_sdcard_regfail(bus->sdiodev)) {
  2137. brcmf_dbg(ERROR, "failed backplane access over SDIO, halting operation %d\n",
  2138. brcmf_sdcard_regfail(bus->sdiodev));
  2139. bus->drvr->busstate = BRCMF_BUS_DOWN;
  2140. bus->intstatus = 0;
  2141. } else if (bus->clkstate == CLK_PENDING) {
  2142. brcmf_dbg(INFO, "rescheduled due to CLK_PENDING awaiting I_CHIPACTIVE interrupt\n");
  2143. resched = true;
  2144. } else if (bus->intstatus || bus->ipend ||
  2145. (!bus->fcstate && brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol)
  2146. && data_ok(bus)) || PKT_AVAILABLE()) {
  2147. resched = true;
  2148. }
  2149. bus->dpc_sched = resched;
  2150. /* If we're done for now, turn off clock request. */
  2151. if ((bus->clkstate != CLK_PENDING)
  2152. && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
  2153. bus->activity = false;
  2154. brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
  2155. }
  2156. up(&bus->sdsem);
  2157. return resched;
  2158. }
  2159. static int brcmf_sdbrcm_dpc_thread(void *data)
  2160. {
  2161. struct brcmf_sdio *bus = (struct brcmf_sdio *) data;
  2162. allow_signal(SIGTERM);
  2163. /* Run until signal received */
  2164. while (1) {
  2165. if (kthread_should_stop())
  2166. break;
  2167. if (!wait_for_completion_interruptible(&bus->dpc_wait)) {
  2168. /* Call bus dpc unless it indicated down
  2169. (then clean stop) */
  2170. if (bus->drvr->busstate != BRCMF_BUS_DOWN) {
  2171. if (brcmf_sdbrcm_dpc(bus))
  2172. complete(&bus->dpc_wait);
  2173. } else {
  2174. /* after stopping the bus, exit thread */
  2175. brcmf_sdbrcm_bus_stop(bus);
  2176. bus->dpc_tsk = NULL;
  2177. break;
  2178. }
  2179. } else
  2180. break;
  2181. }
  2182. return 0;
  2183. }
  2184. int brcmf_sdbrcm_bus_txdata(struct brcmf_sdio *bus, struct sk_buff *pkt)
  2185. {
  2186. int ret = -EBADE;
  2187. uint datalen, prec;
  2188. brcmf_dbg(TRACE, "Enter\n");
  2189. datalen = pkt->len;
  2190. /* Add space for the header */
  2191. skb_push(pkt, SDPCM_HDRLEN);
  2192. /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
  2193. prec = prio2prec((pkt->priority & PRIOMASK));
  2194. /* Check for existing queue, current flow-control,
  2195. pending event, or pending clock */
  2196. brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
  2197. bus->fcqueued++;
  2198. /* Priority based enq */
  2199. spin_lock_bh(&bus->txqlock);
  2200. if (brcmf_c_prec_enq(bus->drvr, &bus->txq, pkt, prec) == false) {
  2201. skb_pull(pkt, SDPCM_HDRLEN);
  2202. brcmf_txcomplete(bus->drvr, pkt, false);
  2203. brcmu_pkt_buf_free_skb(pkt);
  2204. brcmf_dbg(ERROR, "out of bus->txq !!!\n");
  2205. ret = -ENOSR;
  2206. } else {
  2207. ret = 0;
  2208. }
  2209. spin_unlock_bh(&bus->txqlock);
  2210. if (pktq_len(&bus->txq) >= TXHI)
  2211. brcmf_txflowcontrol(bus->drvr, 0, ON);
  2212. #ifdef BCMDBG
  2213. if (pktq_plen(&bus->txq, prec) > qcount[prec])
  2214. qcount[prec] = pktq_plen(&bus->txq, prec);
  2215. #endif
  2216. /* Schedule DPC if needed to send queued packet(s) */
  2217. if (!bus->dpc_sched) {
  2218. bus->dpc_sched = true;
  2219. if (bus->dpc_tsk)
  2220. complete(&bus->dpc_wait);
  2221. }
  2222. return ret;
  2223. }
  2224. static int
  2225. brcmf_sdbrcm_membytes(struct brcmf_sdio *bus, bool write, u32 address, u8 *data,
  2226. uint size)
  2227. {
  2228. int bcmerror = 0;
  2229. u32 sdaddr;
  2230. uint dsize;
  2231. /* Determine initial transfer parameters */
  2232. sdaddr = address & SBSDIO_SB_OFT_ADDR_MASK;
  2233. if ((sdaddr + size) & SBSDIO_SBWINDOW_MASK)
  2234. dsize = (SBSDIO_SB_OFT_ADDR_LIMIT - sdaddr);
  2235. else
  2236. dsize = size;
  2237. /* Set the backplane window to include the start address */
  2238. bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev, address);
  2239. if (bcmerror) {
  2240. brcmf_dbg(ERROR, "window change failed\n");
  2241. goto xfer_done;
  2242. }
  2243. /* Do the transfer(s) */
  2244. while (size) {
  2245. brcmf_dbg(INFO, "%s %d bytes at offset 0x%08x in window 0x%08x\n",
  2246. write ? "write" : "read", dsize,
  2247. sdaddr, address & SBSDIO_SBWINDOW_MASK);
  2248. bcmerror = brcmf_sdcard_rwdata(bus->sdiodev, write,
  2249. sdaddr, data, dsize);
  2250. if (bcmerror) {
  2251. brcmf_dbg(ERROR, "membytes transfer failed\n");
  2252. break;
  2253. }
  2254. /* Adjust for next transfer (if any) */
  2255. size -= dsize;
  2256. if (size) {
  2257. data += dsize;
  2258. address += dsize;
  2259. bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev,
  2260. address);
  2261. if (bcmerror) {
  2262. brcmf_dbg(ERROR, "window change failed\n");
  2263. break;
  2264. }
  2265. sdaddr = 0;
  2266. dsize = min_t(uint, SBSDIO_SB_OFT_ADDR_LIMIT, size);
  2267. }
  2268. }
  2269. xfer_done:
  2270. /* Return the window to backplane enumeration space for core access */
  2271. if (brcmf_sdcard_set_sbaddr_window(bus->sdiodev, bus->sdiodev->sbwad))
  2272. brcmf_dbg(ERROR, "FAILED to set window back to 0x%x\n",
  2273. bus->sdiodev->sbwad);
  2274. return bcmerror;
  2275. }
  2276. #ifdef BCMDBG
  2277. #define CONSOLE_LINE_MAX 192
  2278. static int brcmf_sdbrcm_readconsole(struct brcmf_sdio *bus)
  2279. {
  2280. struct brcmf_console *c = &bus->console;
  2281. u8 line[CONSOLE_LINE_MAX], ch;
  2282. u32 n, idx, addr;
  2283. int rv;
  2284. /* Don't do anything until FWREADY updates console address */
  2285. if (bus->console_addr == 0)
  2286. return 0;
  2287. /* Read console log struct */
  2288. addr = bus->console_addr + offsetof(struct rte_console, log_le);
  2289. rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&c->log_le,
  2290. sizeof(c->log_le));
  2291. if (rv < 0)
  2292. return rv;
  2293. /* Allocate console buffer (one time only) */
  2294. if (c->buf == NULL) {
  2295. c->bufsize = le32_to_cpu(c->log_le.buf_size);
  2296. c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
  2297. if (c->buf == NULL)
  2298. return -ENOMEM;
  2299. }
  2300. idx = le32_to_cpu(c->log_le.idx);
  2301. /* Protect against corrupt value */
  2302. if (idx > c->bufsize)
  2303. return -EBADE;
  2304. /* Skip reading the console buffer if the index pointer
  2305. has not moved */
  2306. if (idx == c->last)
  2307. return 0;
  2308. /* Read the console buffer */
  2309. addr = le32_to_cpu(c->log_le.buf);
  2310. rv = brcmf_sdbrcm_membytes(bus, false, addr, c->buf, c->bufsize);
  2311. if (rv < 0)
  2312. return rv;
  2313. while (c->last != idx) {
  2314. for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
  2315. if (c->last == idx) {
  2316. /* This would output a partial line.
  2317. * Instead, back up
  2318. * the buffer pointer and output this
  2319. * line next time around.
  2320. */
  2321. if (c->last >= n)
  2322. c->last -= n;
  2323. else
  2324. c->last = c->bufsize - n;
  2325. goto break2;
  2326. }
  2327. ch = c->buf[c->last];
  2328. c->last = (c->last + 1) % c->bufsize;
  2329. if (ch == '\n')
  2330. break;
  2331. line[n] = ch;
  2332. }
  2333. if (n > 0) {
  2334. if (line[n - 1] == '\r')
  2335. n--;
  2336. line[n] = 0;
  2337. printk(KERN_DEBUG "CONSOLE: %s\n", line);
  2338. }
  2339. }
  2340. break2:
  2341. return 0;
  2342. }
  2343. #endif /* BCMDBG */
  2344. static int brcmf_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
  2345. {
  2346. int i;
  2347. int ret;
  2348. bus->ctrl_frame_stat = false;
  2349. ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
  2350. SDIO_FUNC_2, F2SYNC, frame, len);
  2351. if (ret < 0) {
  2352. /* On failure, abort the command and terminate the frame */
  2353. brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
  2354. ret);
  2355. bus->tx_sderrs++;
  2356. brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
  2357. brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
  2358. SBSDIO_FUNC1_FRAMECTRL,
  2359. SFC_WF_TERM, NULL);
  2360. bus->f1regdata++;
  2361. for (i = 0; i < 3; i++) {
  2362. u8 hi, lo;
  2363. hi = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
  2364. SBSDIO_FUNC1_WFRAMEBCHI,
  2365. NULL);
  2366. lo = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
  2367. SBSDIO_FUNC1_WFRAMEBCLO,
  2368. NULL);
  2369. bus->f1regdata += 2;
  2370. if (hi == 0 && lo == 0)
  2371. break;
  2372. }
  2373. return ret;
  2374. }
  2375. bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
  2376. return ret;
  2377. }
  2378. int
  2379. brcmf_sdbrcm_bus_txctl(struct brcmf_sdio *bus, unsigned char *msg, uint msglen)
  2380. {
  2381. u8 *frame;
  2382. u16 len;
  2383. u32 swheader;
  2384. uint retries = 0;
  2385. u8 doff = 0;
  2386. int ret = -1;
  2387. brcmf_dbg(TRACE, "Enter\n");
  2388. /* Back the pointer to make a room for bus header */
  2389. frame = msg - SDPCM_HDRLEN;
  2390. len = (msglen += SDPCM_HDRLEN);
  2391. /* Add alignment padding (optional for ctl frames) */
  2392. doff = ((unsigned long)frame % BRCMF_SDALIGN);
  2393. if (doff) {
  2394. frame -= doff;
  2395. len += doff;
  2396. msglen += doff;
  2397. memset(frame, 0, doff + SDPCM_HDRLEN);
  2398. }
  2399. /* precondition: doff < BRCMF_SDALIGN */
  2400. doff += SDPCM_HDRLEN;
  2401. /* Round send length to next SDIO block */
  2402. if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
  2403. u16 pad = bus->blocksize - (len % bus->blocksize);
  2404. if ((pad <= bus->roundup) && (pad < bus->blocksize))
  2405. len += pad;
  2406. } else if (len % BRCMF_SDALIGN) {
  2407. len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
  2408. }
  2409. /* Satisfy length-alignment requirements */
  2410. if (len & (ALIGNMENT - 1))
  2411. len = roundup(len, ALIGNMENT);
  2412. /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
  2413. /* Need to lock here to protect txseq and SDIO tx calls */
  2414. down(&bus->sdsem);
  2415. bus_wake(bus);
  2416. /* Make sure backplane clock is on */
  2417. brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
  2418. /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
  2419. *(__le16 *) frame = cpu_to_le16((u16) msglen);
  2420. *(((__le16 *) frame) + 1) = cpu_to_le16(~msglen);
  2421. /* Software tag: channel, sequence number, data offset */
  2422. swheader =
  2423. ((SDPCM_CONTROL_CHANNEL << SDPCM_CHANNEL_SHIFT) &
  2424. SDPCM_CHANNEL_MASK)
  2425. | bus->tx_seq | ((doff << SDPCM_DOFFSET_SHIFT) &
  2426. SDPCM_DOFFSET_MASK);
  2427. put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
  2428. put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
  2429. if (!data_ok(bus)) {
  2430. brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
  2431. bus->tx_max, bus->tx_seq);
  2432. bus->ctrl_frame_stat = true;
  2433. /* Send from dpc */
  2434. bus->ctrl_frame_buf = frame;
  2435. bus->ctrl_frame_len = len;
  2436. brcmf_sdbrcm_wait_for_event(bus, &bus->ctrl_frame_stat);
  2437. if (bus->ctrl_frame_stat == false) {
  2438. brcmf_dbg(INFO, "ctrl_frame_stat == false\n");
  2439. ret = 0;
  2440. } else {
  2441. brcmf_dbg(INFO, "ctrl_frame_stat == true\n");
  2442. ret = -1;
  2443. }
  2444. }
  2445. if (ret == -1) {
  2446. #ifdef BCMDBG
  2447. if (BRCMF_BYTES_ON() && BRCMF_CTL_ON()) {
  2448. printk(KERN_DEBUG "Tx Frame:\n");
  2449. print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
  2450. frame, len);
  2451. } else if (BRCMF_HDRS_ON()) {
  2452. printk(KERN_DEBUG "TxHdr:\n");
  2453. print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
  2454. frame, min_t(u16, len, 16));
  2455. }
  2456. #endif
  2457. do {
  2458. ret = brcmf_tx_frame(bus, frame, len);
  2459. } while (ret < 0 && retries++ < TXRETRIES);
  2460. }
  2461. if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) && !bus->dpc_sched) {
  2462. bus->activity = false;
  2463. brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
  2464. }
  2465. up(&bus->sdsem);
  2466. if (ret)
  2467. bus->drvr->tx_ctlerrs++;
  2468. else
  2469. bus->drvr->tx_ctlpkts++;
  2470. return ret ? -EIO : 0;
  2471. }
  2472. int
  2473. brcmf_sdbrcm_bus_rxctl(struct brcmf_sdio *bus, unsigned char *msg, uint msglen)
  2474. {
  2475. int timeleft;
  2476. uint rxlen = 0;
  2477. bool pending;
  2478. brcmf_dbg(TRACE, "Enter\n");
  2479. /* Wait until control frame is available */
  2480. timeleft = brcmf_sdbrcm_dcmd_resp_wait(bus, &bus->rxlen, &pending);
  2481. down(&bus->sdsem);
  2482. rxlen = bus->rxlen;
  2483. memcpy(msg, bus->rxctl, min(msglen, rxlen));
  2484. bus->rxlen = 0;
  2485. up(&bus->sdsem);
  2486. if (rxlen) {
  2487. brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
  2488. rxlen, msglen);
  2489. } else if (timeleft == 0) {
  2490. brcmf_dbg(ERROR, "resumed on timeout\n");
  2491. } else if (pending == true) {
  2492. brcmf_dbg(CTL, "cancelled\n");
  2493. return -ERESTARTSYS;
  2494. } else {
  2495. brcmf_dbg(CTL, "resumed for unknown reason?\n");
  2496. }
  2497. if (rxlen)
  2498. bus->drvr->rx_ctlpkts++;
  2499. else
  2500. bus->drvr->rx_ctlerrs++;
  2501. return rxlen ? (int)rxlen : -ETIMEDOUT;
  2502. }
  2503. static int brcmf_sdbrcm_downloadvars(struct brcmf_sdio *bus, void *arg, int len)
  2504. {
  2505. int bcmerror = 0;
  2506. brcmf_dbg(TRACE, "Enter\n");
  2507. /* Basic sanity checks */
  2508. if (bus->drvr->up) {
  2509. bcmerror = -EISCONN;
  2510. goto err;
  2511. }
  2512. if (!len) {
  2513. bcmerror = -EOVERFLOW;
  2514. goto err;
  2515. }
  2516. /* Free the old ones and replace with passed variables */
  2517. kfree(bus->vars);
  2518. bus->vars = kmalloc(len, GFP_ATOMIC);
  2519. bus->varsz = bus->vars ? len : 0;
  2520. if (bus->vars == NULL) {
  2521. bcmerror = -ENOMEM;
  2522. goto err;
  2523. }
  2524. /* Copy the passed variables, which should include the
  2525. terminating double-null */
  2526. memcpy(bus->vars, arg, bus->varsz);
  2527. err:
  2528. return bcmerror;
  2529. }
  2530. static int brcmf_sdbrcm_write_vars(struct brcmf_sdio *bus)
  2531. {
  2532. int bcmerror = 0;
  2533. u32 varsize;
  2534. u32 varaddr;
  2535. u8 *vbuffer;
  2536. u32 varsizew;
  2537. __le32 varsizew_le;
  2538. #ifdef BCMDBG
  2539. char *nvram_ularray;
  2540. #endif /* BCMDBG */
  2541. /* Even if there are no vars are to be written, we still
  2542. need to set the ramsize. */
  2543. varsize = bus->varsz ? roundup(bus->varsz, 4) : 0;
  2544. varaddr = (bus->ramsize - 4) - varsize;
  2545. if (bus->vars) {
  2546. vbuffer = kzalloc(varsize, GFP_ATOMIC);
  2547. if (!vbuffer)
  2548. return -ENOMEM;
  2549. memcpy(vbuffer, bus->vars, bus->varsz);
  2550. /* Write the vars list */
  2551. bcmerror =
  2552. brcmf_sdbrcm_membytes(bus, true, varaddr, vbuffer, varsize);
  2553. #ifdef BCMDBG
  2554. /* Verify NVRAM bytes */
  2555. brcmf_dbg(INFO, "Compare NVRAM dl & ul; varsize=%d\n", varsize);
  2556. nvram_ularray = kmalloc(varsize, GFP_ATOMIC);
  2557. if (!nvram_ularray)
  2558. return -ENOMEM;
  2559. /* Upload image to verify downloaded contents. */
  2560. memset(nvram_ularray, 0xaa, varsize);
  2561. /* Read the vars list to temp buffer for comparison */
  2562. bcmerror =
  2563. brcmf_sdbrcm_membytes(bus, false, varaddr, nvram_ularray,
  2564. varsize);
  2565. if (bcmerror) {
  2566. brcmf_dbg(ERROR, "error %d on reading %d nvram bytes at 0x%08x\n",
  2567. bcmerror, varsize, varaddr);
  2568. }
  2569. /* Compare the org NVRAM with the one read from RAM */
  2570. if (memcmp(vbuffer, nvram_ularray, varsize))
  2571. brcmf_dbg(ERROR, "Downloaded NVRAM image is corrupted\n");
  2572. else
  2573. brcmf_dbg(ERROR, "Download/Upload/Compare of NVRAM ok\n");
  2574. kfree(nvram_ularray);
  2575. #endif /* BCMDBG */
  2576. kfree(vbuffer);
  2577. }
  2578. /* adjust to the user specified RAM */
  2579. brcmf_dbg(INFO, "Physical memory size: %d\n", bus->ramsize);
  2580. brcmf_dbg(INFO, "Vars are at %d, orig varsize is %d\n",
  2581. varaddr, varsize);
  2582. varsize = ((bus->ramsize - 4) - varaddr);
  2583. /*
  2584. * Determine the length token:
  2585. * Varsize, converted to words, in lower 16-bits, checksum
  2586. * in upper 16-bits.
  2587. */
  2588. if (bcmerror) {
  2589. varsizew = 0;
  2590. varsizew_le = cpu_to_le32(0);
  2591. } else {
  2592. varsizew = varsize / 4;
  2593. varsizew = (~varsizew << 16) | (varsizew & 0x0000FFFF);
  2594. varsizew_le = cpu_to_le32(varsizew);
  2595. }
  2596. brcmf_dbg(INFO, "New varsize is %d, length token=0x%08x\n",
  2597. varsize, varsizew);
  2598. /* Write the length token to the last word */
  2599. bcmerror = brcmf_sdbrcm_membytes(bus, true, (bus->ramsize - 4),
  2600. (u8 *)&varsizew_le, 4);
  2601. return bcmerror;
  2602. }
  2603. static int brcmf_sdbrcm_download_state(struct brcmf_sdio *bus, bool enter)
  2604. {
  2605. uint retries;
  2606. int bcmerror = 0;
  2607. struct chip_info *ci = bus->ci;
  2608. /* To enter download state, disable ARM and reset SOCRAM.
  2609. * To exit download state, simply reset ARM (default is RAM boot).
  2610. */
  2611. if (enter) {
  2612. bus->alp_only = true;
  2613. ci->coredisable(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
  2614. ci->resetcore(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM);
  2615. /* Clear the top bit of memory */
  2616. if (bus->ramsize) {
  2617. u32 zeros = 0;
  2618. brcmf_sdbrcm_membytes(bus, true, bus->ramsize - 4,
  2619. (u8 *)&zeros, 4);
  2620. }
  2621. } else {
  2622. if (!ci->iscoreup(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM)) {
  2623. brcmf_dbg(ERROR, "SOCRAM core is down after reset?\n");
  2624. bcmerror = -EBADE;
  2625. goto fail;
  2626. }
  2627. bcmerror = brcmf_sdbrcm_write_vars(bus);
  2628. if (bcmerror) {
  2629. brcmf_dbg(ERROR, "no vars written to RAM\n");
  2630. bcmerror = 0;
  2631. }
  2632. w_sdreg32(bus, 0xFFFFFFFF,
  2633. offsetof(struct sdpcmd_regs, intstatus), &retries);
  2634. ci->resetcore(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
  2635. /* Allow HT Clock now that the ARM is running. */
  2636. bus->alp_only = false;
  2637. bus->drvr->busstate = BRCMF_BUS_LOAD;
  2638. }
  2639. fail:
  2640. return bcmerror;
  2641. }
  2642. static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_sdio *bus)
  2643. {
  2644. if (bus->firmware->size < bus->fw_ptr + len)
  2645. len = bus->firmware->size - bus->fw_ptr;
  2646. memcpy(buf, &bus->firmware->data[bus->fw_ptr], len);
  2647. bus->fw_ptr += len;
  2648. return len;
  2649. }
  2650. static int brcmf_sdbrcm_download_code_file(struct brcmf_sdio *bus)
  2651. {
  2652. int offset = 0;
  2653. uint len;
  2654. u8 *memblock = NULL, *memptr;
  2655. int ret;
  2656. brcmf_dbg(INFO, "Enter\n");
  2657. ret = request_firmware(&bus->firmware, BRCMFMAC_FW_NAME,
  2658. &bus->sdiodev->func[2]->dev);
  2659. if (ret) {
  2660. brcmf_dbg(ERROR, "Fail to request firmware %d\n", ret);
  2661. return ret;
  2662. }
  2663. bus->fw_ptr = 0;
  2664. memptr = memblock = kmalloc(MEMBLOCK + BRCMF_SDALIGN, GFP_ATOMIC);
  2665. if (memblock == NULL) {
  2666. ret = -ENOMEM;
  2667. goto err;
  2668. }
  2669. if ((u32)(unsigned long)memblock % BRCMF_SDALIGN)
  2670. memptr += (BRCMF_SDALIGN -
  2671. ((u32)(unsigned long)memblock % BRCMF_SDALIGN));
  2672. /* Download image */
  2673. while ((len =
  2674. brcmf_sdbrcm_get_image((char *)memptr, MEMBLOCK, bus))) {
  2675. ret = brcmf_sdbrcm_membytes(bus, true, offset, memptr, len);
  2676. if (ret) {
  2677. brcmf_dbg(ERROR, "error %d on writing %d membytes at 0x%08x\n",
  2678. ret, MEMBLOCK, offset);
  2679. goto err;
  2680. }
  2681. offset += MEMBLOCK;
  2682. }
  2683. err:
  2684. kfree(memblock);
  2685. release_firmware(bus->firmware);
  2686. bus->fw_ptr = 0;
  2687. return ret;
  2688. }
  2689. /*
  2690. * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
  2691. * and ending in a NUL.
  2692. * Removes carriage returns, empty lines, comment lines, and converts
  2693. * newlines to NULs.
  2694. * Shortens buffer as needed and pads with NULs. End of buffer is marked
  2695. * by two NULs.
  2696. */
  2697. static uint brcmf_process_nvram_vars(char *varbuf, uint len)
  2698. {
  2699. char *dp;
  2700. bool findNewline;
  2701. int column;
  2702. uint buf_len, n;
  2703. dp = varbuf;
  2704. findNewline = false;
  2705. column = 0;
  2706. for (n = 0; n < len; n++) {
  2707. if (varbuf[n] == 0)
  2708. break;
  2709. if (varbuf[n] == '\r')
  2710. continue;
  2711. if (findNewline && varbuf[n] != '\n')
  2712. continue;
  2713. findNewline = false;
  2714. if (varbuf[n] == '#') {
  2715. findNewline = true;
  2716. continue;
  2717. }
  2718. if (varbuf[n] == '\n') {
  2719. if (column == 0)
  2720. continue;
  2721. *dp++ = 0;
  2722. column = 0;
  2723. continue;
  2724. }
  2725. *dp++ = varbuf[n];
  2726. column++;
  2727. }
  2728. buf_len = dp - varbuf;
  2729. while (dp < varbuf + n)
  2730. *dp++ = 0;
  2731. return buf_len;
  2732. }
  2733. static int brcmf_sdbrcm_download_nvram(struct brcmf_sdio *bus)
  2734. {
  2735. uint len;
  2736. char *memblock = NULL;
  2737. char *bufp;
  2738. int ret;
  2739. ret = request_firmware(&bus->firmware, BRCMFMAC_NV_NAME,
  2740. &bus->sdiodev->func[2]->dev);
  2741. if (ret) {
  2742. brcmf_dbg(ERROR, "Fail to request nvram %d\n", ret);
  2743. return ret;
  2744. }
  2745. bus->fw_ptr = 0;
  2746. memblock = kmalloc(MEMBLOCK, GFP_ATOMIC);
  2747. if (memblock == NULL) {
  2748. ret = -ENOMEM;
  2749. goto err;
  2750. }
  2751. len = brcmf_sdbrcm_get_image(memblock, MEMBLOCK, bus);
  2752. if (len > 0 && len < MEMBLOCK) {
  2753. bufp = (char *)memblock;
  2754. bufp[len] = 0;
  2755. len = brcmf_process_nvram_vars(bufp, len);
  2756. bufp += len;
  2757. *bufp++ = 0;
  2758. if (len)
  2759. ret = brcmf_sdbrcm_downloadvars(bus, memblock, len + 1);
  2760. if (ret)
  2761. brcmf_dbg(ERROR, "error downloading vars: %d\n", ret);
  2762. } else {
  2763. brcmf_dbg(ERROR, "error reading nvram file: %d\n", len);
  2764. ret = -EIO;
  2765. }
  2766. err:
  2767. kfree(memblock);
  2768. release_firmware(bus->firmware);
  2769. bus->fw_ptr = 0;
  2770. return ret;
  2771. }
  2772. static int _brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
  2773. {
  2774. int bcmerror = -1;
  2775. /* Keep arm in reset */
  2776. if (brcmf_sdbrcm_download_state(bus, true)) {
  2777. brcmf_dbg(ERROR, "error placing ARM core in reset\n");
  2778. goto err;
  2779. }
  2780. /* External image takes precedence if specified */
  2781. if (brcmf_sdbrcm_download_code_file(bus)) {
  2782. brcmf_dbg(ERROR, "dongle image file download failed\n");
  2783. goto err;
  2784. }
  2785. /* External nvram takes precedence if specified */
  2786. if (brcmf_sdbrcm_download_nvram(bus))
  2787. brcmf_dbg(ERROR, "dongle nvram file download failed\n");
  2788. /* Take arm out of reset */
  2789. if (brcmf_sdbrcm_download_state(bus, false)) {
  2790. brcmf_dbg(ERROR, "error getting out of ARM core reset\n");
  2791. goto err;
  2792. }
  2793. bcmerror = 0;
  2794. err:
  2795. return bcmerror;
  2796. }
  2797. static bool
  2798. brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
  2799. {
  2800. bool ret;
  2801. /* Download the firmware */
  2802. brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
  2803. ret = _brcmf_sdbrcm_download_firmware(bus) == 0;
  2804. brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
  2805. return ret;
  2806. }
  2807. void brcmf_sdbrcm_bus_stop(struct brcmf_sdio *bus)
  2808. {
  2809. u32 local_hostintmask;
  2810. u8 saveclk;
  2811. uint retries;
  2812. int err;
  2813. brcmf_dbg(TRACE, "Enter\n");
  2814. if (bus->watchdog_tsk) {
  2815. send_sig(SIGTERM, bus->watchdog_tsk, 1);
  2816. kthread_stop(bus->watchdog_tsk);
  2817. bus->watchdog_tsk = NULL;
  2818. }
  2819. if (bus->dpc_tsk && bus->dpc_tsk != current) {
  2820. send_sig(SIGTERM, bus->dpc_tsk, 1);
  2821. kthread_stop(bus->dpc_tsk);
  2822. bus->dpc_tsk = NULL;
  2823. }
  2824. down(&bus->sdsem);
  2825. bus_wake(bus);
  2826. /* Enable clock for device interrupts */
  2827. brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
  2828. /* Disable and clear interrupts at the chip level also */
  2829. w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask), &retries);
  2830. local_hostintmask = bus->hostintmask;
  2831. bus->hostintmask = 0;
  2832. /* Change our idea of bus state */
  2833. bus->drvr->busstate = BRCMF_BUS_DOWN;
  2834. /* Force clocks on backplane to be sure F2 interrupt propagates */
  2835. saveclk = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
  2836. SBSDIO_FUNC1_CHIPCLKCSR, &err);
  2837. if (!err) {
  2838. brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
  2839. SBSDIO_FUNC1_CHIPCLKCSR,
  2840. (saveclk | SBSDIO_FORCE_HT), &err);
  2841. }
  2842. if (err)
  2843. brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);
  2844. /* Turn off the bus (F2), free any pending packets */
  2845. brcmf_dbg(INTR, "disable SDIO interrupts\n");
  2846. brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
  2847. SDIO_FUNC_ENABLE_1, NULL);
  2848. /* Clear any pending interrupts now that F2 is disabled */
  2849. w_sdreg32(bus, local_hostintmask,
  2850. offsetof(struct sdpcmd_regs, intstatus), &retries);
  2851. /* Turn off the backplane clock (only) */
  2852. brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
  2853. /* Clear the data packet queues */
  2854. brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
  2855. /* Clear any held glomming stuff */
  2856. if (bus->glomd)
  2857. brcmu_pkt_buf_free_skb(bus->glomd);
  2858. brcmf_sdbrcm_free_glom(bus);
  2859. /* Clear rx control and wake any waiters */
  2860. bus->rxlen = 0;
  2861. brcmf_sdbrcm_dcmd_resp_wake(bus);
  2862. /* Reset some F2 state stuff */
  2863. bus->rxskip = false;
  2864. bus->tx_seq = bus->rx_seq = 0;
  2865. up(&bus->sdsem);
  2866. }
  2867. int brcmf_sdbrcm_bus_init(struct brcmf_pub *drvr)
  2868. {
  2869. struct brcmf_sdio *bus = drvr->bus;
  2870. unsigned long timeout;
  2871. uint retries = 0;
  2872. u8 ready, enable;
  2873. int err, ret = 0;
  2874. u8 saveclk;
  2875. brcmf_dbg(TRACE, "Enter\n");
  2876. /* try to download image and nvram to the dongle */
  2877. if (drvr->busstate == BRCMF_BUS_DOWN) {
  2878. if (!(brcmf_sdbrcm_download_firmware(bus)))
  2879. return -1;
  2880. }
  2881. if (!bus->drvr)
  2882. return 0;
  2883. /* Start the watchdog timer */
  2884. bus->drvr->tickcnt = 0;
  2885. brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
  2886. down(&bus->sdsem);
  2887. /* Make sure backplane clock is on, needed to generate F2 interrupt */
  2888. brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
  2889. if (bus->clkstate != CLK_AVAIL)
  2890. goto exit;
  2891. /* Force clocks on backplane to be sure F2 interrupt propagates */
  2892. saveclk =
  2893. brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
  2894. SBSDIO_FUNC1_CHIPCLKCSR, &err);
  2895. if (!err) {
  2896. brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
  2897. SBSDIO_FUNC1_CHIPCLKCSR,
  2898. (saveclk | SBSDIO_FORCE_HT), &err);
  2899. }
  2900. if (err) {
  2901. brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);
  2902. goto exit;
  2903. }
  2904. /* Enable function 2 (frame transfers) */
  2905. w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
  2906. offsetof(struct sdpcmd_regs, tosbmailboxdata), &retries);
  2907. enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
  2908. brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
  2909. enable, NULL);
  2910. timeout = jiffies + msecs_to_jiffies(BRCMF_WAIT_F2RDY);
  2911. ready = 0;
  2912. while (enable != ready) {
  2913. ready = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_0,
  2914. SDIO_CCCR_IORx, NULL);
  2915. if (time_after(jiffies, timeout))
  2916. break;
  2917. else if (time_after(jiffies, timeout - BRCMF_WAIT_F2RDY + 50))
  2918. /* prevent busy waiting if it takes too long */
  2919. msleep_interruptible(20);
  2920. }
  2921. brcmf_dbg(INFO, "enable 0x%02x, ready 0x%02x\n", enable, ready);
  2922. /* If F2 successfully enabled, set core and enable interrupts */
  2923. if (ready == enable) {
  2924. /* Set up the interrupt mask and enable interrupts */
  2925. bus->hostintmask = HOSTINTMASK;
  2926. w_sdreg32(bus, bus->hostintmask,
  2927. offsetof(struct sdpcmd_regs, hostintmask), &retries);
  2928. brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
  2929. SBSDIO_WATERMARK, 8, &err);
  2930. /* Set bus state according to enable result */
  2931. drvr->busstate = BRCMF_BUS_DATA;
  2932. }
  2933. else {
  2934. /* Disable F2 again */
  2935. enable = SDIO_FUNC_ENABLE_1;
  2936. brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0,
  2937. SDIO_CCCR_IOEx, enable, NULL);
  2938. }
  2939. /* Restore previous clock setting */
  2940. brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
  2941. SBSDIO_FUNC1_CHIPCLKCSR, saveclk, &err);
  2942. /* If we didn't come up, turn off backplane clock */
  2943. if (drvr->busstate != BRCMF_BUS_DATA)
  2944. brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
  2945. exit:
  2946. up(&bus->sdsem);
  2947. return ret;
  2948. }
  2949. void brcmf_sdbrcm_isr(void *arg)
  2950. {
  2951. struct brcmf_sdio *bus = (struct brcmf_sdio *) arg;
  2952. brcmf_dbg(TRACE, "Enter\n");
  2953. if (!bus) {
  2954. brcmf_dbg(ERROR, "bus is null pointer, exiting\n");
  2955. return;
  2956. }
  2957. if (bus->drvr->busstate == BRCMF_BUS_DOWN) {
  2958. brcmf_dbg(ERROR, "bus is down. we have nothing to do\n");
  2959. return;
  2960. }
  2961. /* Count the interrupt call */
  2962. bus->intrcount++;
  2963. bus->ipend = true;
  2964. /* Shouldn't get this interrupt if we're sleeping? */
  2965. if (bus->sleeping) {
  2966. brcmf_dbg(ERROR, "INTERRUPT WHILE SLEEPING??\n");
  2967. return;
  2968. }
  2969. /* Disable additional interrupts (is this needed now)? */
  2970. if (!bus->intr)
  2971. brcmf_dbg(ERROR, "isr w/o interrupt configured!\n");
  2972. bus->dpc_sched = true;
  2973. if (bus->dpc_tsk)
  2974. complete(&bus->dpc_wait);
  2975. }
  2976. static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_pub *drvr)
  2977. {
  2978. struct brcmf_sdio *bus;
  2979. brcmf_dbg(TIMER, "Enter\n");
  2980. bus = drvr->bus;
  2981. /* Ignore the timer if simulating bus down */
  2982. if (bus->sleeping)
  2983. return false;
  2984. down(&bus->sdsem);
  2985. /* Poll period: check device if appropriate. */
  2986. if (bus->poll && (++bus->polltick >= bus->pollrate)) {
  2987. u32 intstatus = 0;
  2988. /* Reset poll tick */
  2989. bus->polltick = 0;
  2990. /* Check device if no interrupts */
  2991. if (!bus->intr || (bus->intrcount == bus->lastintrs)) {
  2992. if (!bus->dpc_sched) {
  2993. u8 devpend;
  2994. devpend = brcmf_sdcard_cfg_read(bus->sdiodev,
  2995. SDIO_FUNC_0, SDIO_CCCR_INTx,
  2996. NULL);
  2997. intstatus =
  2998. devpend & (INTR_STATUS_FUNC1 |
  2999. INTR_STATUS_FUNC2);
  3000. }
  3001. /* If there is something, make like the ISR and
  3002. schedule the DPC */
  3003. if (intstatus) {
  3004. bus->pollcnt++;
  3005. bus->ipend = true;
  3006. bus->dpc_sched = true;
  3007. if (bus->dpc_tsk)
  3008. complete(&bus->dpc_wait);
  3009. }
  3010. }
  3011. /* Update interrupt tracking */
  3012. bus->lastintrs = bus->intrcount;
  3013. }
  3014. #ifdef BCMDBG
  3015. /* Poll for console output periodically */
  3016. if (drvr->busstate == BRCMF_BUS_DATA && bus->console_interval != 0) {
  3017. bus->console.count += BRCMF_WD_POLL_MS;
  3018. if (bus->console.count >= bus->console_interval) {
  3019. bus->console.count -= bus->console_interval;
  3020. /* Make sure backplane clock is on */
  3021. brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
  3022. if (brcmf_sdbrcm_readconsole(bus) < 0)
  3023. /* stop on error */
  3024. bus->console_interval = 0;
  3025. }
  3026. }
  3027. #endif /* BCMDBG */
  3028. /* On idle timeout clear activity flag and/or turn off clock */
  3029. if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
  3030. if (++bus->idlecount >= bus->idletime) {
  3031. bus->idlecount = 0;
  3032. if (bus->activity) {
  3033. bus->activity = false;
  3034. brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
  3035. } else {
  3036. brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
  3037. }
  3038. }
  3039. }
  3040. up(&bus->sdsem);
  3041. return bus->ipend;
  3042. }
  3043. static bool brcmf_sdbrcm_chipmatch(u16 chipid)
  3044. {
  3045. if (chipid == BCM4329_CHIP_ID)
  3046. return true;
  3047. return false;
  3048. }
  3049. static void brcmf_sdbrcm_release_malloc(struct brcmf_sdio *bus)
  3050. {
  3051. brcmf_dbg(TRACE, "Enter\n");
  3052. kfree(bus->rxbuf);
  3053. bus->rxctl = bus->rxbuf = NULL;
  3054. bus->rxlen = 0;
  3055. kfree(bus->databuf);
  3056. bus->databuf = NULL;
  3057. }
  3058. static bool brcmf_sdbrcm_probe_malloc(struct brcmf_sdio *bus)
  3059. {
  3060. brcmf_dbg(TRACE, "Enter\n");
  3061. if (bus->drvr->maxctl) {
  3062. bus->rxblen =
  3063. roundup((bus->drvr->maxctl + SDPCM_HDRLEN),
  3064. ALIGNMENT) + BRCMF_SDALIGN;
  3065. bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
  3066. if (!(bus->rxbuf))
  3067. goto fail;
  3068. }
  3069. /* Allocate buffer to receive glomed packet */
  3070. bus->databuf = kmalloc(MAX_DATA_BUF, GFP_ATOMIC);
  3071. if (!(bus->databuf)) {
  3072. /* release rxbuf which was already located as above */
  3073. if (!bus->rxblen)
  3074. kfree(bus->rxbuf);
  3075. goto fail;
  3076. }
  3077. /* Align the buffer */
  3078. if ((unsigned long)bus->databuf % BRCMF_SDALIGN)
  3079. bus->dataptr = bus->databuf + (BRCMF_SDALIGN -
  3080. ((unsigned long)bus->databuf % BRCMF_SDALIGN));
  3081. else
  3082. bus->dataptr = bus->databuf;
  3083. return true;
  3084. fail:
  3085. return false;
  3086. }
  3087. static bool
  3088. brcmf_sdbrcm_probe_attach(struct brcmf_sdio *bus, u32 regsva)
  3089. {
  3090. u8 clkctl = 0;
  3091. int err = 0;
  3092. int reg_addr;
  3093. u32 reg_val;
  3094. u8 idx;
  3095. bus->alp_only = true;
  3096. /* Return the window to backplane enumeration space for core access */
  3097. if (brcmf_sdcard_set_sbaddr_window(bus->sdiodev, SI_ENUM_BASE))
  3098. brcmf_dbg(ERROR, "FAILED to return to SI_ENUM_BASE\n");
  3099. #ifdef BCMDBG
  3100. printk(KERN_DEBUG "F1 signature read @0x18000000=0x%4x\n",
  3101. brcmf_sdcard_reg_read(bus->sdiodev, SI_ENUM_BASE, 4));
  3102. #endif /* BCMDBG */
  3103. /*
  3104. * Force PLL off until brcmf_sdio_chip_attach()
  3105. * programs PLL control regs
  3106. */
  3107. brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
  3108. SBSDIO_FUNC1_CHIPCLKCSR,
  3109. BRCMF_INIT_CLKCTL1, &err);
  3110. if (!err)
  3111. clkctl =
  3112. brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
  3113. SBSDIO_FUNC1_CHIPCLKCSR, &err);
  3114. if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
  3115. brcmf_dbg(ERROR, "ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
  3116. err, BRCMF_INIT_CLKCTL1, clkctl);
  3117. goto fail;
  3118. }
  3119. if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci, regsva)) {
  3120. brcmf_dbg(ERROR, "brcmf_sdio_chip_attach failed!\n");
  3121. goto fail;
  3122. }
  3123. if (!brcmf_sdbrcm_chipmatch((u16) bus->ci->chip)) {
  3124. brcmf_dbg(ERROR, "unsupported chip: 0x%04x\n", bus->ci->chip);
  3125. goto fail;
  3126. }
  3127. brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci,
  3128. SDIO_DRIVE_STRENGTH);
  3129. /* Get info on the SOCRAM cores... */
  3130. bus->ramsize = bus->ci->ramsize;
  3131. if (!(bus->ramsize)) {
  3132. brcmf_dbg(ERROR, "failed to find SOCRAM memory!\n");
  3133. goto fail;
  3134. }
  3135. /* Set core control so an SDIO reset does a backplane reset */
  3136. idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
  3137. reg_addr = bus->ci->c_inf[idx].base +
  3138. offsetof(struct sdpcmd_regs, corecontrol);
  3139. reg_val = brcmf_sdcard_reg_read(bus->sdiodev, reg_addr, sizeof(u32));
  3140. brcmf_sdcard_reg_write(bus->sdiodev, reg_addr, sizeof(u32),
  3141. reg_val | CC_BPRESEN);
  3142. brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
  3143. /* Locate an appropriately-aligned portion of hdrbuf */
  3144. bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
  3145. BRCMF_SDALIGN);
  3146. /* Set the poll and/or interrupt flags */
  3147. bus->intr = true;
  3148. bus->poll = false;
  3149. if (bus->poll)
  3150. bus->pollrate = 1;
  3151. return true;
  3152. fail:
  3153. return false;
  3154. }
  3155. static bool brcmf_sdbrcm_probe_init(struct brcmf_sdio *bus)
  3156. {
  3157. brcmf_dbg(TRACE, "Enter\n");
  3158. /* Disable F2 to clear any intermediate frame state on the dongle */
  3159. brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
  3160. SDIO_FUNC_ENABLE_1, NULL);
  3161. bus->drvr->busstate = BRCMF_BUS_DOWN;
  3162. bus->sleeping = false;
  3163. bus->rxflow = false;
  3164. /* Done with backplane-dependent accesses, can drop clock... */
  3165. brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
  3166. SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
  3167. /* ...and initialize clock/power states */
  3168. bus->clkstate = CLK_SDONLY;
  3169. bus->idletime = BRCMF_IDLE_INTERVAL;
  3170. bus->idleclock = BRCMF_IDLE_ACTIVE;
  3171. /* Query the F2 block size, set roundup accordingly */
  3172. bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
  3173. bus->roundup = min(max_roundup, bus->blocksize);
  3174. /* bus module does not support packet chaining */
  3175. bus->use_rxchain = false;
  3176. bus->sd_rxchain = false;
  3177. return true;
  3178. }
  3179. static int
  3180. brcmf_sdbrcm_watchdog_thread(void *data)
  3181. {
  3182. struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
  3183. allow_signal(SIGTERM);
  3184. /* Run until signal received */
  3185. while (1) {
  3186. if (kthread_should_stop())
  3187. break;
  3188. if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
  3189. brcmf_sdbrcm_bus_watchdog(bus->drvr);
  3190. /* Count the tick for reference */
  3191. bus->drvr->tickcnt++;
  3192. } else
  3193. break;
  3194. }
  3195. return 0;
  3196. }
  3197. static void
  3198. brcmf_sdbrcm_watchdog(unsigned long data)
  3199. {
  3200. struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
  3201. if (bus->watchdog_tsk) {
  3202. complete(&bus->watchdog_wait);
  3203. /* Reschedule the watchdog */
  3204. if (bus->wd_timer_valid)
  3205. mod_timer(&bus->timer,
  3206. jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
  3207. }
  3208. }
  3209. static void brcmf_sdbrcm_release_dongle(struct brcmf_sdio *bus)
  3210. {
  3211. brcmf_dbg(TRACE, "Enter\n");
  3212. if (bus->ci) {
  3213. brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
  3214. brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
  3215. brcmf_sdio_chip_detach(&bus->ci);
  3216. if (bus->vars && bus->varsz)
  3217. kfree(bus->vars);
  3218. bus->vars = NULL;
  3219. }
  3220. brcmf_dbg(TRACE, "Disconnected\n");
  3221. }
  3222. /* Detach and free everything */
  3223. static void brcmf_sdbrcm_release(struct brcmf_sdio *bus)
  3224. {
  3225. brcmf_dbg(TRACE, "Enter\n");
  3226. if (bus) {
  3227. /* De-register interrupt handler */
  3228. brcmf_sdcard_intr_dereg(bus->sdiodev);
  3229. if (bus->drvr) {
  3230. brcmf_detach(bus->drvr);
  3231. brcmf_sdbrcm_release_dongle(bus);
  3232. bus->drvr = NULL;
  3233. }
  3234. brcmf_sdbrcm_release_malloc(bus);
  3235. kfree(bus);
  3236. }
  3237. brcmf_dbg(TRACE, "Disconnected\n");
  3238. }
  3239. void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev)
  3240. {
  3241. int ret;
  3242. struct brcmf_sdio *bus;
  3243. brcmf_dbg(TRACE, "Enter\n");
  3244. /* We make an assumption about address window mappings:
  3245. * regsva == SI_ENUM_BASE*/
  3246. /* Allocate private bus interface state */
  3247. bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
  3248. if (!bus)
  3249. goto fail;
  3250. bus->sdiodev = sdiodev;
  3251. sdiodev->bus = bus;
  3252. skb_queue_head_init(&bus->glom);
  3253. bus->txbound = BRCMF_TXBOUND;
  3254. bus->rxbound = BRCMF_RXBOUND;
  3255. bus->txminmax = BRCMF_TXMINMAX;
  3256. bus->tx_seq = SDPCM_SEQUENCE_WRAP - 1;
  3257. bus->usebufpool = false; /* Use bufpool if allocated,
  3258. else use locally malloced rxbuf */
  3259. /* attempt to attach to the dongle */
  3260. if (!(brcmf_sdbrcm_probe_attach(bus, regsva))) {
  3261. brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_attach failed\n");
  3262. goto fail;
  3263. }
  3264. spin_lock_init(&bus->txqlock);
  3265. init_waitqueue_head(&bus->ctrl_wait);
  3266. init_waitqueue_head(&bus->dcmd_resp_wait);
  3267. /* Set up the watchdog timer */
  3268. init_timer(&bus->timer);
  3269. bus->timer.data = (unsigned long)bus;
  3270. bus->timer.function = brcmf_sdbrcm_watchdog;
  3271. /* Initialize thread based operation and lock */
  3272. sema_init(&bus->sdsem, 1);
  3273. /* Initialize watchdog thread */
  3274. init_completion(&bus->watchdog_wait);
  3275. bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread,
  3276. bus, "brcmf_watchdog");
  3277. if (IS_ERR(bus->watchdog_tsk)) {
  3278. printk(KERN_WARNING
  3279. "brcmf_watchdog thread failed to start\n");
  3280. bus->watchdog_tsk = NULL;
  3281. }
  3282. /* Initialize DPC thread */
  3283. init_completion(&bus->dpc_wait);
  3284. bus->dpc_tsk = kthread_run(brcmf_sdbrcm_dpc_thread,
  3285. bus, "brcmf_dpc");
  3286. if (IS_ERR(bus->dpc_tsk)) {
  3287. printk(KERN_WARNING
  3288. "brcmf_dpc thread failed to start\n");
  3289. bus->dpc_tsk = NULL;
  3290. }
  3291. /* Attach to the brcmf/OS/network interface */
  3292. bus->drvr = brcmf_attach(bus, SDPCM_RESERVE);
  3293. if (!bus->drvr) {
  3294. brcmf_dbg(ERROR, "brcmf_attach failed\n");
  3295. goto fail;
  3296. }
  3297. /* Allocate buffers */
  3298. if (!(brcmf_sdbrcm_probe_malloc(bus))) {
  3299. brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_malloc failed\n");
  3300. goto fail;
  3301. }
  3302. if (!(brcmf_sdbrcm_probe_init(bus))) {
  3303. brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_init failed\n");
  3304. goto fail;
  3305. }
  3306. /* Register interrupt callback, but mask it (not operational yet). */
  3307. brcmf_dbg(INTR, "disable SDIO interrupts (not interested yet)\n");
  3308. ret = brcmf_sdcard_intr_reg(bus->sdiodev);
  3309. if (ret != 0) {
  3310. brcmf_dbg(ERROR, "FAILED: sdcard_intr_reg returned %d\n", ret);
  3311. goto fail;
  3312. }
  3313. brcmf_dbg(INTR, "registered SDIO interrupt function ok\n");
  3314. brcmf_dbg(INFO, "completed!!\n");
  3315. /* if firmware path present try to download and bring up bus */
  3316. ret = brcmf_bus_start(bus->drvr);
  3317. if (ret != 0) {
  3318. if (ret == -ENOLINK) {
  3319. brcmf_dbg(ERROR, "dongle is not responding\n");
  3320. goto fail;
  3321. }
  3322. }
  3323. /* add interface and open for business */
  3324. if (brcmf_add_if((struct brcmf_info *)bus->drvr, 0, "wlan%d", NULL)) {
  3325. brcmf_dbg(ERROR, "Add primary net device interface failed!!\n");
  3326. goto fail;
  3327. }
  3328. return bus;
  3329. fail:
  3330. brcmf_sdbrcm_release(bus);
  3331. return NULL;
  3332. }
  3333. void brcmf_sdbrcm_disconnect(void *ptr)
  3334. {
  3335. struct brcmf_sdio *bus = (struct brcmf_sdio *)ptr;
  3336. brcmf_dbg(TRACE, "Enter\n");
  3337. if (bus)
  3338. brcmf_sdbrcm_release(bus);
  3339. brcmf_dbg(TRACE, "Disconnected\n");
  3340. }
  3341. struct device *brcmf_bus_get_device(struct brcmf_sdio *bus)
  3342. {
  3343. return &bus->sdiodev->func[2]->dev;
  3344. }
  3345. void
  3346. brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
  3347. {
  3348. /* Totally stop the timer */
  3349. if (!wdtick && bus->wd_timer_valid == true) {
  3350. del_timer_sync(&bus->timer);
  3351. bus->wd_timer_valid = false;
  3352. bus->save_ms = wdtick;
  3353. return;
  3354. }
  3355. /* don't start the wd until fw is loaded */
  3356. if (bus->drvr->busstate == BRCMF_BUS_DOWN)
  3357. return;
  3358. if (wdtick) {
  3359. if (bus->save_ms != BRCMF_WD_POLL_MS) {
  3360. if (bus->wd_timer_valid == true)
  3361. /* Stop timer and restart at new value */
  3362. del_timer_sync(&bus->timer);
  3363. /* Create timer again when watchdog period is
  3364. dynamically changed or in the first instance
  3365. */
  3366. bus->timer.expires =
  3367. jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
  3368. add_timer(&bus->timer);
  3369. } else {
  3370. /* Re arm the timer, at last watchdog period */
  3371. mod_timer(&bus->timer,
  3372. jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
  3373. }
  3374. bus->wd_timer_valid = true;
  3375. bus->save_ms = wdtick;
  3376. }
  3377. }