main.c 55 KB

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  1. /*
  2. * Copyright (c) 2008-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include <linux/delay.h>
  18. #include "ath9k.h"
  19. #include "btcoex.h"
  20. static void ath9k_set_assoc_state(struct ath_softc *sc,
  21. struct ieee80211_vif *vif);
  22. u8 ath9k_parse_mpdudensity(u8 mpdudensity)
  23. {
  24. /*
  25. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  26. * 0 for no restriction
  27. * 1 for 1/4 us
  28. * 2 for 1/2 us
  29. * 3 for 1 us
  30. * 4 for 2 us
  31. * 5 for 4 us
  32. * 6 for 8 us
  33. * 7 for 16 us
  34. */
  35. switch (mpdudensity) {
  36. case 0:
  37. return 0;
  38. case 1:
  39. case 2:
  40. case 3:
  41. /* Our lower layer calculations limit our precision to
  42. 1 microsecond */
  43. return 1;
  44. case 4:
  45. return 2;
  46. case 5:
  47. return 4;
  48. case 6:
  49. return 8;
  50. case 7:
  51. return 16;
  52. default:
  53. return 0;
  54. }
  55. }
  56. static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
  57. {
  58. bool pending = false;
  59. spin_lock_bh(&txq->axq_lock);
  60. if (txq->axq_depth || !list_empty(&txq->axq_acq))
  61. pending = true;
  62. spin_unlock_bh(&txq->axq_lock);
  63. return pending;
  64. }
  65. static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  66. {
  67. unsigned long flags;
  68. bool ret;
  69. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  70. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  71. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  72. return ret;
  73. }
  74. void ath9k_ps_wakeup(struct ath_softc *sc)
  75. {
  76. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  77. unsigned long flags;
  78. enum ath9k_power_mode power_mode;
  79. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  80. if (++sc->ps_usecount != 1)
  81. goto unlock;
  82. power_mode = sc->sc_ah->power_mode;
  83. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  84. /*
  85. * While the hardware is asleep, the cycle counters contain no
  86. * useful data. Better clear them now so that they don't mess up
  87. * survey data results.
  88. */
  89. if (power_mode != ATH9K_PM_AWAKE) {
  90. spin_lock(&common->cc_lock);
  91. ath_hw_cycle_counters_update(common);
  92. memset(&common->cc_survey, 0, sizeof(common->cc_survey));
  93. memset(&common->cc_ani, 0, sizeof(common->cc_ani));
  94. spin_unlock(&common->cc_lock);
  95. }
  96. unlock:
  97. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  98. }
  99. void ath9k_ps_restore(struct ath_softc *sc)
  100. {
  101. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  102. enum ath9k_power_mode mode;
  103. unsigned long flags;
  104. bool reset;
  105. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  106. if (--sc->ps_usecount != 0)
  107. goto unlock;
  108. if (sc->ps_idle) {
  109. ath9k_hw_setrxabort(sc->sc_ah, 1);
  110. ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
  111. mode = ATH9K_PM_FULL_SLEEP;
  112. } else if (sc->ps_enabled &&
  113. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  114. PS_WAIT_FOR_CAB |
  115. PS_WAIT_FOR_PSPOLL_DATA |
  116. PS_WAIT_FOR_TX_ACK |
  117. PS_WAIT_FOR_ANI))) {
  118. mode = ATH9K_PM_NETWORK_SLEEP;
  119. if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
  120. ath9k_btcoex_stop_gen_timer(sc);
  121. } else {
  122. goto unlock;
  123. }
  124. spin_lock(&common->cc_lock);
  125. ath_hw_cycle_counters_update(common);
  126. spin_unlock(&common->cc_lock);
  127. ath9k_hw_setpower(sc->sc_ah, mode);
  128. unlock:
  129. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  130. }
  131. static void __ath_cancel_work(struct ath_softc *sc)
  132. {
  133. cancel_work_sync(&sc->paprd_work);
  134. cancel_work_sync(&sc->hw_check_work);
  135. cancel_delayed_work_sync(&sc->tx_complete_work);
  136. cancel_delayed_work_sync(&sc->hw_pll_work);
  137. #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
  138. if (ath9k_hw_mci_is_enabled(sc->sc_ah))
  139. cancel_work_sync(&sc->mci_work);
  140. #endif
  141. }
  142. static void ath_cancel_work(struct ath_softc *sc)
  143. {
  144. __ath_cancel_work(sc);
  145. cancel_work_sync(&sc->hw_reset_work);
  146. }
  147. static void ath_restart_work(struct ath_softc *sc)
  148. {
  149. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  150. if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9485(sc->sc_ah) ||
  151. AR_SREV_9550(sc->sc_ah))
  152. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
  153. msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
  154. ath_start_rx_poll(sc, 3);
  155. ath_start_ani(sc);
  156. }
  157. static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx)
  158. {
  159. struct ath_hw *ah = sc->sc_ah;
  160. bool ret = true;
  161. ieee80211_stop_queues(sc->hw);
  162. sc->hw_busy_count = 0;
  163. ath_stop_ani(sc);
  164. del_timer_sync(&sc->rx_poll_timer);
  165. ath9k_debug_samp_bb_mac(sc);
  166. ath9k_hw_disable_interrupts(ah);
  167. if (!ath_stoprecv(sc))
  168. ret = false;
  169. if (!ath_drain_all_txq(sc, retry_tx))
  170. ret = false;
  171. return ret;
  172. }
  173. static bool ath_complete_reset(struct ath_softc *sc, bool start)
  174. {
  175. struct ath_hw *ah = sc->sc_ah;
  176. struct ath_common *common = ath9k_hw_common(ah);
  177. unsigned long flags;
  178. if (ath_startrecv(sc) != 0) {
  179. ath_err(common, "Unable to restart recv logic\n");
  180. return false;
  181. }
  182. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  183. sc->config.txpowlimit, &sc->curtxpow);
  184. clear_bit(SC_OP_HW_RESET, &sc->sc_flags);
  185. ath9k_hw_set_interrupts(ah);
  186. ath9k_hw_enable_interrupts(ah);
  187. if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) && start) {
  188. if (!test_bit(SC_OP_BEACONS, &sc->sc_flags))
  189. goto work;
  190. ath9k_set_beacon(sc);
  191. if (ah->opmode == NL80211_IFTYPE_STATION &&
  192. test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
  193. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  194. sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
  195. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  196. }
  197. work:
  198. ath_restart_work(sc);
  199. }
  200. if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx != 3)
  201. ath_ant_comb_update(sc);
  202. ieee80211_wake_queues(sc->hw);
  203. return true;
  204. }
  205. static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
  206. bool retry_tx)
  207. {
  208. struct ath_hw *ah = sc->sc_ah;
  209. struct ath_common *common = ath9k_hw_common(ah);
  210. struct ath9k_hw_cal_data *caldata = NULL;
  211. bool fastcc = true;
  212. int r;
  213. __ath_cancel_work(sc);
  214. tasklet_disable(&sc->intr_tq);
  215. spin_lock_bh(&sc->sc_pcu_lock);
  216. if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)) {
  217. fastcc = false;
  218. caldata = &sc->caldata;
  219. }
  220. if (!hchan) {
  221. fastcc = false;
  222. hchan = ah->curchan;
  223. }
  224. if (!ath_prepare_reset(sc, retry_tx))
  225. fastcc = false;
  226. ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
  227. hchan->channel, IS_CHAN_HT40(hchan), fastcc);
  228. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  229. if (r) {
  230. ath_err(common,
  231. "Unable to reset channel, reset status %d\n", r);
  232. goto out;
  233. }
  234. if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
  235. (sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL))
  236. ath9k_mci_set_txpower(sc, true, false);
  237. if (!ath_complete_reset(sc, true))
  238. r = -EIO;
  239. out:
  240. spin_unlock_bh(&sc->sc_pcu_lock);
  241. tasklet_enable(&sc->intr_tq);
  242. return r;
  243. }
  244. /*
  245. * Set/change channels. If the channel is really being changed, it's done
  246. * by reseting the chip. To accomplish this we must first cleanup any pending
  247. * DMA, then restart stuff.
  248. */
  249. static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  250. struct ath9k_channel *hchan)
  251. {
  252. int r;
  253. if (test_bit(SC_OP_INVALID, &sc->sc_flags))
  254. return -EIO;
  255. r = ath_reset_internal(sc, hchan, false);
  256. return r;
  257. }
  258. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
  259. struct ieee80211_vif *vif)
  260. {
  261. struct ath_node *an;
  262. u8 density;
  263. an = (struct ath_node *)sta->drv_priv;
  264. an->sc = sc;
  265. an->sta = sta;
  266. an->vif = vif;
  267. if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
  268. ath_tx_node_init(sc, an);
  269. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  270. sta->ht_cap.ampdu_factor);
  271. density = ath9k_parse_mpdudensity(sta->ht_cap.ampdu_density);
  272. an->mpdudensity = density;
  273. }
  274. }
  275. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  276. {
  277. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  278. if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  279. ath_tx_node_cleanup(sc, an);
  280. }
  281. void ath9k_tasklet(unsigned long data)
  282. {
  283. struct ath_softc *sc = (struct ath_softc *)data;
  284. struct ath_hw *ah = sc->sc_ah;
  285. struct ath_common *common = ath9k_hw_common(ah);
  286. enum ath_reset_type type;
  287. unsigned long flags;
  288. u32 status = sc->intrstatus;
  289. u32 rxmask;
  290. ath9k_ps_wakeup(sc);
  291. spin_lock(&sc->sc_pcu_lock);
  292. if ((status & ATH9K_INT_FATAL) ||
  293. (status & ATH9K_INT_BB_WATCHDOG)) {
  294. if (status & ATH9K_INT_FATAL)
  295. type = RESET_TYPE_FATAL_INT;
  296. else
  297. type = RESET_TYPE_BB_WATCHDOG;
  298. ath9k_queue_reset(sc, type);
  299. goto out;
  300. }
  301. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  302. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  303. /*
  304. * TSF sync does not look correct; remain awake to sync with
  305. * the next Beacon.
  306. */
  307. ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
  308. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
  309. }
  310. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  311. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  312. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  313. ATH9K_INT_RXORN);
  314. else
  315. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  316. if (status & rxmask) {
  317. /* Check for high priority Rx first */
  318. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  319. (status & ATH9K_INT_RXHP))
  320. ath_rx_tasklet(sc, 0, true);
  321. ath_rx_tasklet(sc, 0, false);
  322. }
  323. if (status & ATH9K_INT_TX) {
  324. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  325. ath_tx_edma_tasklet(sc);
  326. else
  327. ath_tx_tasklet(sc);
  328. }
  329. ath9k_btcoex_handle_interrupt(sc, status);
  330. out:
  331. /* re-enable hardware interrupt */
  332. ath9k_hw_enable_interrupts(ah);
  333. spin_unlock(&sc->sc_pcu_lock);
  334. ath9k_ps_restore(sc);
  335. }
  336. irqreturn_t ath_isr(int irq, void *dev)
  337. {
  338. #define SCHED_INTR ( \
  339. ATH9K_INT_FATAL | \
  340. ATH9K_INT_BB_WATCHDOG | \
  341. ATH9K_INT_RXORN | \
  342. ATH9K_INT_RXEOL | \
  343. ATH9K_INT_RX | \
  344. ATH9K_INT_RXLP | \
  345. ATH9K_INT_RXHP | \
  346. ATH9K_INT_TX | \
  347. ATH9K_INT_BMISS | \
  348. ATH9K_INT_CST | \
  349. ATH9K_INT_TSFOOR | \
  350. ATH9K_INT_GENTIMER | \
  351. ATH9K_INT_MCI)
  352. struct ath_softc *sc = dev;
  353. struct ath_hw *ah = sc->sc_ah;
  354. struct ath_common *common = ath9k_hw_common(ah);
  355. enum ath9k_int status;
  356. bool sched = false;
  357. /*
  358. * The hardware is not ready/present, don't
  359. * touch anything. Note this can happen early
  360. * on if the IRQ is shared.
  361. */
  362. if (test_bit(SC_OP_INVALID, &sc->sc_flags))
  363. return IRQ_NONE;
  364. /* shared irq, not for us */
  365. if (!ath9k_hw_intrpend(ah))
  366. return IRQ_NONE;
  367. if (test_bit(SC_OP_HW_RESET, &sc->sc_flags)) {
  368. ath9k_hw_kill_interrupts(ah);
  369. return IRQ_HANDLED;
  370. }
  371. /*
  372. * Figure out the reason(s) for the interrupt. Note
  373. * that the hal returns a pseudo-ISR that may include
  374. * bits we haven't explicitly enabled so we mask the
  375. * value to insure we only process bits we requested.
  376. */
  377. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  378. status &= ah->imask; /* discard unasked-for bits */
  379. /*
  380. * If there are no status bits set, then this interrupt was not
  381. * for me (should have been caught above).
  382. */
  383. if (!status)
  384. return IRQ_NONE;
  385. /* Cache the status */
  386. sc->intrstatus = status;
  387. if (status & SCHED_INTR)
  388. sched = true;
  389. /*
  390. * If a FATAL or RXORN interrupt is received, we have to reset the
  391. * chip immediately.
  392. */
  393. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  394. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  395. goto chip_reset;
  396. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  397. (status & ATH9K_INT_BB_WATCHDOG)) {
  398. spin_lock(&common->cc_lock);
  399. ath_hw_cycle_counters_update(common);
  400. ar9003_hw_bb_watchdog_dbg_info(ah);
  401. spin_unlock(&common->cc_lock);
  402. goto chip_reset;
  403. }
  404. #ifdef CONFIG_PM_SLEEP
  405. if (status & ATH9K_INT_BMISS) {
  406. if (atomic_read(&sc->wow_sleep_proc_intr) == 0) {
  407. ath_dbg(common, ANY, "during WoW we got a BMISS\n");
  408. atomic_inc(&sc->wow_got_bmiss_intr);
  409. atomic_dec(&sc->wow_sleep_proc_intr);
  410. }
  411. }
  412. #endif
  413. if (status & ATH9K_INT_SWBA)
  414. tasklet_schedule(&sc->bcon_tasklet);
  415. if (status & ATH9K_INT_TXURN)
  416. ath9k_hw_updatetxtriglevel(ah, true);
  417. if (status & ATH9K_INT_RXEOL) {
  418. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  419. ath9k_hw_set_interrupts(ah);
  420. }
  421. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  422. if (status & ATH9K_INT_TIM_TIMER) {
  423. if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
  424. goto chip_reset;
  425. /* Clear RxAbort bit so that we can
  426. * receive frames */
  427. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  428. spin_lock(&sc->sc_pm_lock);
  429. ath9k_hw_setrxabort(sc->sc_ah, 0);
  430. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  431. spin_unlock(&sc->sc_pm_lock);
  432. }
  433. chip_reset:
  434. ath_debug_stat_interrupt(sc, status);
  435. if (sched) {
  436. /* turn off every interrupt */
  437. ath9k_hw_disable_interrupts(ah);
  438. tasklet_schedule(&sc->intr_tq);
  439. }
  440. return IRQ_HANDLED;
  441. #undef SCHED_INTR
  442. }
  443. static int ath_reset(struct ath_softc *sc, bool retry_tx)
  444. {
  445. int r;
  446. ath9k_ps_wakeup(sc);
  447. r = ath_reset_internal(sc, NULL, retry_tx);
  448. if (retry_tx) {
  449. int i;
  450. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  451. if (ATH_TXQ_SETUP(sc, i)) {
  452. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  453. ath_txq_schedule(sc, &sc->tx.txq[i]);
  454. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  455. }
  456. }
  457. }
  458. ath9k_ps_restore(sc);
  459. return r;
  460. }
  461. void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
  462. {
  463. #ifdef CONFIG_ATH9K_DEBUGFS
  464. RESET_STAT_INC(sc, type);
  465. #endif
  466. set_bit(SC_OP_HW_RESET, &sc->sc_flags);
  467. ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
  468. }
  469. void ath_reset_work(struct work_struct *work)
  470. {
  471. struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
  472. ath_reset(sc, true);
  473. }
  474. /**********************/
  475. /* mac80211 callbacks */
  476. /**********************/
  477. static int ath9k_start(struct ieee80211_hw *hw)
  478. {
  479. struct ath_softc *sc = hw->priv;
  480. struct ath_hw *ah = sc->sc_ah;
  481. struct ath_common *common = ath9k_hw_common(ah);
  482. struct ieee80211_channel *curchan = hw->conf.channel;
  483. struct ath9k_channel *init_channel;
  484. int r;
  485. ath_dbg(common, CONFIG,
  486. "Starting driver with initial channel: %d MHz\n",
  487. curchan->center_freq);
  488. ath9k_ps_wakeup(sc);
  489. mutex_lock(&sc->mutex);
  490. init_channel = ath9k_cmn_get_curchannel(hw, ah);
  491. /* Reset SERDES registers */
  492. ath9k_hw_configpcipowersave(ah, false);
  493. /*
  494. * The basic interface to setting the hardware in a good
  495. * state is ``reset''. On return the hardware is known to
  496. * be powered up and with interrupts disabled. This must
  497. * be followed by initialization of the appropriate bits
  498. * and then setup of the interrupt mask.
  499. */
  500. spin_lock_bh(&sc->sc_pcu_lock);
  501. atomic_set(&ah->intr_ref_cnt, -1);
  502. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  503. if (r) {
  504. ath_err(common,
  505. "Unable to reset hardware; reset status %d (freq %u MHz)\n",
  506. r, curchan->center_freq);
  507. ah->reset_power_on = false;
  508. }
  509. /* Setup our intr mask. */
  510. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  511. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  512. ATH9K_INT_GLOBAL;
  513. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  514. ah->imask |= ATH9K_INT_RXHP |
  515. ATH9K_INT_RXLP |
  516. ATH9K_INT_BB_WATCHDOG;
  517. else
  518. ah->imask |= ATH9K_INT_RX;
  519. ah->imask |= ATH9K_INT_GTT;
  520. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  521. ah->imask |= ATH9K_INT_CST;
  522. ath_mci_enable(sc);
  523. clear_bit(SC_OP_INVALID, &sc->sc_flags);
  524. sc->sc_ah->is_monitoring = false;
  525. if (!ath_complete_reset(sc, false))
  526. ah->reset_power_on = false;
  527. if (ah->led_pin >= 0) {
  528. ath9k_hw_cfg_output(ah, ah->led_pin,
  529. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  530. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  531. }
  532. /*
  533. * Reset key cache to sane defaults (all entries cleared) instead of
  534. * semi-random values after suspend/resume.
  535. */
  536. ath9k_cmn_init_crypto(sc->sc_ah);
  537. spin_unlock_bh(&sc->sc_pcu_lock);
  538. mutex_unlock(&sc->mutex);
  539. ath9k_ps_restore(sc);
  540. return 0;
  541. }
  542. static void ath9k_tx(struct ieee80211_hw *hw,
  543. struct ieee80211_tx_control *control,
  544. struct sk_buff *skb)
  545. {
  546. struct ath_softc *sc = hw->priv;
  547. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  548. struct ath_tx_control txctl;
  549. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  550. unsigned long flags;
  551. if (sc->ps_enabled) {
  552. /*
  553. * mac80211 does not set PM field for normal data frames, so we
  554. * need to update that based on the current PS mode.
  555. */
  556. if (ieee80211_is_data(hdr->frame_control) &&
  557. !ieee80211_is_nullfunc(hdr->frame_control) &&
  558. !ieee80211_has_pm(hdr->frame_control)) {
  559. ath_dbg(common, PS,
  560. "Add PM=1 for a TX frame while in PS mode\n");
  561. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  562. }
  563. }
  564. if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
  565. /*
  566. * We are using PS-Poll and mac80211 can request TX while in
  567. * power save mode. Need to wake up hardware for the TX to be
  568. * completed and if needed, also for RX of buffered frames.
  569. */
  570. ath9k_ps_wakeup(sc);
  571. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  572. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  573. ath9k_hw_setrxabort(sc->sc_ah, 0);
  574. if (ieee80211_is_pspoll(hdr->frame_control)) {
  575. ath_dbg(common, PS,
  576. "Sending PS-Poll to pick a buffered frame\n");
  577. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  578. } else {
  579. ath_dbg(common, PS, "Wake up to complete TX\n");
  580. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  581. }
  582. /*
  583. * The actual restore operation will happen only after
  584. * the ps_flags bit is cleared. We are just dropping
  585. * the ps_usecount here.
  586. */
  587. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  588. ath9k_ps_restore(sc);
  589. }
  590. /*
  591. * Cannot tx while the hardware is in full sleep, it first needs a full
  592. * chip reset to recover from that
  593. */
  594. if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
  595. ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
  596. goto exit;
  597. }
  598. memset(&txctl, 0, sizeof(struct ath_tx_control));
  599. txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
  600. txctl.sta = control->sta;
  601. ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
  602. if (ath_tx_start(hw, skb, &txctl) != 0) {
  603. ath_dbg(common, XMIT, "TX failed\n");
  604. TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
  605. goto exit;
  606. }
  607. return;
  608. exit:
  609. ieee80211_free_txskb(hw, skb);
  610. }
  611. static void ath9k_stop(struct ieee80211_hw *hw)
  612. {
  613. struct ath_softc *sc = hw->priv;
  614. struct ath_hw *ah = sc->sc_ah;
  615. struct ath_common *common = ath9k_hw_common(ah);
  616. bool prev_idle;
  617. mutex_lock(&sc->mutex);
  618. ath_cancel_work(sc);
  619. del_timer_sync(&sc->rx_poll_timer);
  620. if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
  621. ath_dbg(common, ANY, "Device not present\n");
  622. mutex_unlock(&sc->mutex);
  623. return;
  624. }
  625. /* Ensure HW is awake when we try to shut it down. */
  626. ath9k_ps_wakeup(sc);
  627. spin_lock_bh(&sc->sc_pcu_lock);
  628. /* prevent tasklets to enable interrupts once we disable them */
  629. ah->imask &= ~ATH9K_INT_GLOBAL;
  630. /* make sure h/w will not generate any interrupt
  631. * before setting the invalid flag. */
  632. ath9k_hw_disable_interrupts(ah);
  633. spin_unlock_bh(&sc->sc_pcu_lock);
  634. /* we can now sync irq and kill any running tasklets, since we already
  635. * disabled interrupts and not holding a spin lock */
  636. synchronize_irq(sc->irq);
  637. tasklet_kill(&sc->intr_tq);
  638. tasklet_kill(&sc->bcon_tasklet);
  639. prev_idle = sc->ps_idle;
  640. sc->ps_idle = true;
  641. spin_lock_bh(&sc->sc_pcu_lock);
  642. if (ah->led_pin >= 0) {
  643. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  644. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  645. }
  646. ath_prepare_reset(sc, false);
  647. if (sc->rx.frag) {
  648. dev_kfree_skb_any(sc->rx.frag);
  649. sc->rx.frag = NULL;
  650. }
  651. if (!ah->curchan)
  652. ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
  653. ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  654. ath9k_hw_phy_disable(ah);
  655. ath9k_hw_configpcipowersave(ah, true);
  656. spin_unlock_bh(&sc->sc_pcu_lock);
  657. ath9k_ps_restore(sc);
  658. set_bit(SC_OP_INVALID, &sc->sc_flags);
  659. sc->ps_idle = prev_idle;
  660. mutex_unlock(&sc->mutex);
  661. ath_dbg(common, CONFIG, "Driver halt\n");
  662. }
  663. bool ath9k_uses_beacons(int type)
  664. {
  665. switch (type) {
  666. case NL80211_IFTYPE_AP:
  667. case NL80211_IFTYPE_ADHOC:
  668. case NL80211_IFTYPE_MESH_POINT:
  669. return true;
  670. default:
  671. return false;
  672. }
  673. }
  674. static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  675. {
  676. struct ath9k_vif_iter_data *iter_data = data;
  677. int i;
  678. if (iter_data->hw_macaddr)
  679. for (i = 0; i < ETH_ALEN; i++)
  680. iter_data->mask[i] &=
  681. ~(iter_data->hw_macaddr[i] ^ mac[i]);
  682. switch (vif->type) {
  683. case NL80211_IFTYPE_AP:
  684. iter_data->naps++;
  685. break;
  686. case NL80211_IFTYPE_STATION:
  687. iter_data->nstations++;
  688. break;
  689. case NL80211_IFTYPE_ADHOC:
  690. iter_data->nadhocs++;
  691. break;
  692. case NL80211_IFTYPE_MESH_POINT:
  693. iter_data->nmeshes++;
  694. break;
  695. case NL80211_IFTYPE_WDS:
  696. iter_data->nwds++;
  697. break;
  698. default:
  699. break;
  700. }
  701. }
  702. static void ath9k_sta_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  703. {
  704. struct ath_softc *sc = data;
  705. struct ath_vif *avp = (void *)vif->drv_priv;
  706. if (vif->type != NL80211_IFTYPE_STATION)
  707. return;
  708. if (avp->primary_sta_vif)
  709. ath9k_set_assoc_state(sc, vif);
  710. }
  711. /* Called with sc->mutex held. */
  712. void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
  713. struct ieee80211_vif *vif,
  714. struct ath9k_vif_iter_data *iter_data)
  715. {
  716. struct ath_softc *sc = hw->priv;
  717. struct ath_hw *ah = sc->sc_ah;
  718. struct ath_common *common = ath9k_hw_common(ah);
  719. /*
  720. * Use the hardware MAC address as reference, the hardware uses it
  721. * together with the BSSID mask when matching addresses.
  722. */
  723. memset(iter_data, 0, sizeof(*iter_data));
  724. iter_data->hw_macaddr = common->macaddr;
  725. memset(&iter_data->mask, 0xff, ETH_ALEN);
  726. if (vif)
  727. ath9k_vif_iter(iter_data, vif->addr, vif);
  728. /* Get list of all active MAC addresses */
  729. ieee80211_iterate_active_interfaces_atomic(
  730. sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
  731. ath9k_vif_iter, iter_data);
  732. }
  733. /* Called with sc->mutex held. */
  734. static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
  735. struct ieee80211_vif *vif)
  736. {
  737. struct ath_softc *sc = hw->priv;
  738. struct ath_hw *ah = sc->sc_ah;
  739. struct ath_common *common = ath9k_hw_common(ah);
  740. struct ath9k_vif_iter_data iter_data;
  741. enum nl80211_iftype old_opmode = ah->opmode;
  742. ath9k_calculate_iter_data(hw, vif, &iter_data);
  743. memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
  744. ath_hw_setbssidmask(common);
  745. if (iter_data.naps > 0) {
  746. ath9k_hw_set_tsfadjust(ah, true);
  747. ah->opmode = NL80211_IFTYPE_AP;
  748. } else {
  749. ath9k_hw_set_tsfadjust(ah, false);
  750. if (iter_data.nmeshes)
  751. ah->opmode = NL80211_IFTYPE_MESH_POINT;
  752. else if (iter_data.nwds)
  753. ah->opmode = NL80211_IFTYPE_AP;
  754. else if (iter_data.nadhocs)
  755. ah->opmode = NL80211_IFTYPE_ADHOC;
  756. else
  757. ah->opmode = NL80211_IFTYPE_STATION;
  758. }
  759. ath9k_hw_setopmode(ah);
  760. if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
  761. ah->imask |= ATH9K_INT_TSFOOR;
  762. else
  763. ah->imask &= ~ATH9K_INT_TSFOOR;
  764. ath9k_hw_set_interrupts(ah);
  765. /*
  766. * If we are changing the opmode to STATION,
  767. * a beacon sync needs to be done.
  768. */
  769. if (ah->opmode == NL80211_IFTYPE_STATION &&
  770. old_opmode == NL80211_IFTYPE_AP &&
  771. test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
  772. ieee80211_iterate_active_interfaces_atomic(
  773. sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
  774. ath9k_sta_vif_iter, sc);
  775. }
  776. }
  777. static int ath9k_add_interface(struct ieee80211_hw *hw,
  778. struct ieee80211_vif *vif)
  779. {
  780. struct ath_softc *sc = hw->priv;
  781. struct ath_hw *ah = sc->sc_ah;
  782. struct ath_common *common = ath9k_hw_common(ah);
  783. mutex_lock(&sc->mutex);
  784. ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
  785. sc->nvifs++;
  786. ath9k_ps_wakeup(sc);
  787. ath9k_calculate_summary_state(hw, vif);
  788. ath9k_ps_restore(sc);
  789. if (ath9k_uses_beacons(vif->type))
  790. ath9k_beacon_assign_slot(sc, vif);
  791. mutex_unlock(&sc->mutex);
  792. return 0;
  793. }
  794. static int ath9k_change_interface(struct ieee80211_hw *hw,
  795. struct ieee80211_vif *vif,
  796. enum nl80211_iftype new_type,
  797. bool p2p)
  798. {
  799. struct ath_softc *sc = hw->priv;
  800. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  801. ath_dbg(common, CONFIG, "Change Interface\n");
  802. mutex_lock(&sc->mutex);
  803. if (ath9k_uses_beacons(vif->type))
  804. ath9k_beacon_remove_slot(sc, vif);
  805. vif->type = new_type;
  806. vif->p2p = p2p;
  807. ath9k_ps_wakeup(sc);
  808. ath9k_calculate_summary_state(hw, vif);
  809. ath9k_ps_restore(sc);
  810. if (ath9k_uses_beacons(vif->type))
  811. ath9k_beacon_assign_slot(sc, vif);
  812. mutex_unlock(&sc->mutex);
  813. return 0;
  814. }
  815. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  816. struct ieee80211_vif *vif)
  817. {
  818. struct ath_softc *sc = hw->priv;
  819. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  820. ath_dbg(common, CONFIG, "Detach Interface\n");
  821. mutex_lock(&sc->mutex);
  822. sc->nvifs--;
  823. if (ath9k_uses_beacons(vif->type))
  824. ath9k_beacon_remove_slot(sc, vif);
  825. ath9k_ps_wakeup(sc);
  826. ath9k_calculate_summary_state(hw, NULL);
  827. ath9k_ps_restore(sc);
  828. mutex_unlock(&sc->mutex);
  829. }
  830. static void ath9k_enable_ps(struct ath_softc *sc)
  831. {
  832. struct ath_hw *ah = sc->sc_ah;
  833. struct ath_common *common = ath9k_hw_common(ah);
  834. sc->ps_enabled = true;
  835. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  836. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  837. ah->imask |= ATH9K_INT_TIM_TIMER;
  838. ath9k_hw_set_interrupts(ah);
  839. }
  840. ath9k_hw_setrxabort(ah, 1);
  841. }
  842. ath_dbg(common, PS, "PowerSave enabled\n");
  843. }
  844. static void ath9k_disable_ps(struct ath_softc *sc)
  845. {
  846. struct ath_hw *ah = sc->sc_ah;
  847. struct ath_common *common = ath9k_hw_common(ah);
  848. sc->ps_enabled = false;
  849. ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
  850. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  851. ath9k_hw_setrxabort(ah, 0);
  852. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  853. PS_WAIT_FOR_CAB |
  854. PS_WAIT_FOR_PSPOLL_DATA |
  855. PS_WAIT_FOR_TX_ACK);
  856. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  857. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  858. ath9k_hw_set_interrupts(ah);
  859. }
  860. }
  861. ath_dbg(common, PS, "PowerSave disabled\n");
  862. }
  863. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  864. {
  865. struct ath_softc *sc = hw->priv;
  866. struct ath_hw *ah = sc->sc_ah;
  867. struct ath_common *common = ath9k_hw_common(ah);
  868. struct ieee80211_conf *conf = &hw->conf;
  869. bool reset_channel = false;
  870. ath9k_ps_wakeup(sc);
  871. mutex_lock(&sc->mutex);
  872. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  873. sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  874. if (sc->ps_idle) {
  875. ath_cancel_work(sc);
  876. ath9k_stop_btcoex(sc);
  877. } else {
  878. ath9k_start_btcoex(sc);
  879. /*
  880. * The chip needs a reset to properly wake up from
  881. * full sleep
  882. */
  883. reset_channel = ah->chip_fullsleep;
  884. }
  885. }
  886. /*
  887. * We just prepare to enable PS. We have to wait until our AP has
  888. * ACK'd our null data frame to disable RX otherwise we'll ignore
  889. * those ACKs and end up retransmitting the same null data frames.
  890. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  891. */
  892. if (changed & IEEE80211_CONF_CHANGE_PS) {
  893. unsigned long flags;
  894. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  895. if (conf->flags & IEEE80211_CONF_PS)
  896. ath9k_enable_ps(sc);
  897. else
  898. ath9k_disable_ps(sc);
  899. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  900. }
  901. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  902. if (conf->flags & IEEE80211_CONF_MONITOR) {
  903. ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
  904. sc->sc_ah->is_monitoring = true;
  905. } else {
  906. ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
  907. sc->sc_ah->is_monitoring = false;
  908. }
  909. }
  910. if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) || reset_channel) {
  911. struct ieee80211_channel *curchan = hw->conf.channel;
  912. int pos = curchan->hw_value;
  913. int old_pos = -1;
  914. unsigned long flags;
  915. if (ah->curchan)
  916. old_pos = ah->curchan - &ah->channels[0];
  917. ath_dbg(common, CONFIG, "Set channel: %d MHz type: %d\n",
  918. curchan->center_freq, conf->channel_type);
  919. /* update survey stats for the old channel before switching */
  920. spin_lock_irqsave(&common->cc_lock, flags);
  921. ath_update_survey_stats(sc);
  922. spin_unlock_irqrestore(&common->cc_lock, flags);
  923. /*
  924. * Preserve the current channel values, before updating
  925. * the same channel
  926. */
  927. if (ah->curchan && (old_pos == pos))
  928. ath9k_hw_getnf(ah, ah->curchan);
  929. ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
  930. curchan, conf->channel_type);
  931. /*
  932. * If the operating channel changes, change the survey in-use flags
  933. * along with it.
  934. * Reset the survey data for the new channel, unless we're switching
  935. * back to the operating channel from an off-channel operation.
  936. */
  937. if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
  938. sc->cur_survey != &sc->survey[pos]) {
  939. if (sc->cur_survey)
  940. sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
  941. sc->cur_survey = &sc->survey[pos];
  942. memset(sc->cur_survey, 0, sizeof(struct survey_info));
  943. sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
  944. } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
  945. memset(&sc->survey[pos], 0, sizeof(struct survey_info));
  946. }
  947. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  948. ath_err(common, "Unable to set channel\n");
  949. mutex_unlock(&sc->mutex);
  950. ath9k_ps_restore(sc);
  951. return -EINVAL;
  952. }
  953. /*
  954. * The most recent snapshot of channel->noisefloor for the old
  955. * channel is only available after the hardware reset. Copy it to
  956. * the survey stats now.
  957. */
  958. if (old_pos >= 0)
  959. ath_update_survey_nf(sc, old_pos);
  960. }
  961. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  962. ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
  963. sc->config.txpowlimit = 2 * conf->power_level;
  964. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  965. sc->config.txpowlimit, &sc->curtxpow);
  966. }
  967. mutex_unlock(&sc->mutex);
  968. ath9k_ps_restore(sc);
  969. return 0;
  970. }
  971. #define SUPPORTED_FILTERS \
  972. (FIF_PROMISC_IN_BSS | \
  973. FIF_ALLMULTI | \
  974. FIF_CONTROL | \
  975. FIF_PSPOLL | \
  976. FIF_OTHER_BSS | \
  977. FIF_BCN_PRBRESP_PROMISC | \
  978. FIF_PROBE_REQ | \
  979. FIF_FCSFAIL)
  980. /* FIXME: sc->sc_full_reset ? */
  981. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  982. unsigned int changed_flags,
  983. unsigned int *total_flags,
  984. u64 multicast)
  985. {
  986. struct ath_softc *sc = hw->priv;
  987. u32 rfilt;
  988. changed_flags &= SUPPORTED_FILTERS;
  989. *total_flags &= SUPPORTED_FILTERS;
  990. sc->rx.rxfilter = *total_flags;
  991. ath9k_ps_wakeup(sc);
  992. rfilt = ath_calcrxfilter(sc);
  993. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  994. ath9k_ps_restore(sc);
  995. ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
  996. rfilt);
  997. }
  998. static int ath9k_sta_add(struct ieee80211_hw *hw,
  999. struct ieee80211_vif *vif,
  1000. struct ieee80211_sta *sta)
  1001. {
  1002. struct ath_softc *sc = hw->priv;
  1003. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1004. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1005. struct ieee80211_key_conf ps_key = { };
  1006. ath_node_attach(sc, sta, vif);
  1007. if (vif->type != NL80211_IFTYPE_AP &&
  1008. vif->type != NL80211_IFTYPE_AP_VLAN)
  1009. return 0;
  1010. an->ps_key = ath_key_config(common, vif, sta, &ps_key);
  1011. return 0;
  1012. }
  1013. static void ath9k_del_ps_key(struct ath_softc *sc,
  1014. struct ieee80211_vif *vif,
  1015. struct ieee80211_sta *sta)
  1016. {
  1017. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1018. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1019. struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
  1020. if (!an->ps_key)
  1021. return;
  1022. ath_key_delete(common, &ps_key);
  1023. }
  1024. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1025. struct ieee80211_vif *vif,
  1026. struct ieee80211_sta *sta)
  1027. {
  1028. struct ath_softc *sc = hw->priv;
  1029. ath9k_del_ps_key(sc, vif, sta);
  1030. ath_node_detach(sc, sta);
  1031. return 0;
  1032. }
  1033. static void ath9k_sta_notify(struct ieee80211_hw *hw,
  1034. struct ieee80211_vif *vif,
  1035. enum sta_notify_cmd cmd,
  1036. struct ieee80211_sta *sta)
  1037. {
  1038. struct ath_softc *sc = hw->priv;
  1039. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1040. if (!sta->ht_cap.ht_supported)
  1041. return;
  1042. switch (cmd) {
  1043. case STA_NOTIFY_SLEEP:
  1044. an->sleeping = true;
  1045. ath_tx_aggr_sleep(sta, sc, an);
  1046. break;
  1047. case STA_NOTIFY_AWAKE:
  1048. an->sleeping = false;
  1049. ath_tx_aggr_wakeup(sc, an);
  1050. break;
  1051. }
  1052. }
  1053. static int ath9k_conf_tx(struct ieee80211_hw *hw,
  1054. struct ieee80211_vif *vif, u16 queue,
  1055. const struct ieee80211_tx_queue_params *params)
  1056. {
  1057. struct ath_softc *sc = hw->priv;
  1058. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1059. struct ath_txq *txq;
  1060. struct ath9k_tx_queue_info qi;
  1061. int ret = 0;
  1062. if (queue >= IEEE80211_NUM_ACS)
  1063. return 0;
  1064. txq = sc->tx.txq_map[queue];
  1065. ath9k_ps_wakeup(sc);
  1066. mutex_lock(&sc->mutex);
  1067. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1068. qi.tqi_aifs = params->aifs;
  1069. qi.tqi_cwmin = params->cw_min;
  1070. qi.tqi_cwmax = params->cw_max;
  1071. qi.tqi_burstTime = params->txop * 32;
  1072. ath_dbg(common, CONFIG,
  1073. "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1074. queue, txq->axq_qnum, params->aifs, params->cw_min,
  1075. params->cw_max, params->txop);
  1076. ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
  1077. ret = ath_txq_update(sc, txq->axq_qnum, &qi);
  1078. if (ret)
  1079. ath_err(common, "TXQ Update failed\n");
  1080. mutex_unlock(&sc->mutex);
  1081. ath9k_ps_restore(sc);
  1082. return ret;
  1083. }
  1084. static int ath9k_set_key(struct ieee80211_hw *hw,
  1085. enum set_key_cmd cmd,
  1086. struct ieee80211_vif *vif,
  1087. struct ieee80211_sta *sta,
  1088. struct ieee80211_key_conf *key)
  1089. {
  1090. struct ath_softc *sc = hw->priv;
  1091. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1092. int ret = 0;
  1093. if (ath9k_modparam_nohwcrypt)
  1094. return -ENOSPC;
  1095. if ((vif->type == NL80211_IFTYPE_ADHOC ||
  1096. vif->type == NL80211_IFTYPE_MESH_POINT) &&
  1097. (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
  1098. key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
  1099. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
  1100. /*
  1101. * For now, disable hw crypto for the RSN IBSS group keys. This
  1102. * could be optimized in the future to use a modified key cache
  1103. * design to support per-STA RX GTK, but until that gets
  1104. * implemented, use of software crypto for group addressed
  1105. * frames is a acceptable to allow RSN IBSS to be used.
  1106. */
  1107. return -EOPNOTSUPP;
  1108. }
  1109. mutex_lock(&sc->mutex);
  1110. ath9k_ps_wakeup(sc);
  1111. ath_dbg(common, CONFIG, "Set HW Key\n");
  1112. switch (cmd) {
  1113. case SET_KEY:
  1114. if (sta)
  1115. ath9k_del_ps_key(sc, vif, sta);
  1116. ret = ath_key_config(common, vif, sta, key);
  1117. if (ret >= 0) {
  1118. key->hw_key_idx = ret;
  1119. /* push IV and Michael MIC generation to stack */
  1120. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1121. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1122. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1123. if (sc->sc_ah->sw_mgmt_crypto &&
  1124. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1125. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
  1126. ret = 0;
  1127. }
  1128. break;
  1129. case DISABLE_KEY:
  1130. ath_key_delete(common, key);
  1131. break;
  1132. default:
  1133. ret = -EINVAL;
  1134. }
  1135. ath9k_ps_restore(sc);
  1136. mutex_unlock(&sc->mutex);
  1137. return ret;
  1138. }
  1139. static void ath9k_set_assoc_state(struct ath_softc *sc,
  1140. struct ieee80211_vif *vif)
  1141. {
  1142. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1143. struct ath_vif *avp = (void *)vif->drv_priv;
  1144. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1145. unsigned long flags;
  1146. set_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags);
  1147. avp->primary_sta_vif = true;
  1148. /*
  1149. * Set the AID, BSSID and do beacon-sync only when
  1150. * the HW opmode is STATION.
  1151. *
  1152. * But the primary bit is set above in any case.
  1153. */
  1154. if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
  1155. return;
  1156. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1157. common->curaid = bss_conf->aid;
  1158. ath9k_hw_write_associd(sc->sc_ah);
  1159. sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
  1160. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1161. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1162. sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
  1163. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1164. if (ath9k_hw_mci_is_enabled(sc->sc_ah))
  1165. ath9k_mci_update_wlan_channels(sc, false);
  1166. ath_dbg(common, CONFIG,
  1167. "Primary Station interface: %pM, BSSID: %pM\n",
  1168. vif->addr, common->curbssid);
  1169. }
  1170. static void ath9k_bss_assoc_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1171. {
  1172. struct ath_softc *sc = data;
  1173. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1174. if (test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
  1175. return;
  1176. if (bss_conf->assoc)
  1177. ath9k_set_assoc_state(sc, vif);
  1178. }
  1179. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1180. struct ieee80211_vif *vif,
  1181. struct ieee80211_bss_conf *bss_conf,
  1182. u32 changed)
  1183. {
  1184. #define CHECK_ANI \
  1185. (BSS_CHANGED_ASSOC | \
  1186. BSS_CHANGED_IBSS | \
  1187. BSS_CHANGED_BEACON_ENABLED)
  1188. struct ath_softc *sc = hw->priv;
  1189. struct ath_hw *ah = sc->sc_ah;
  1190. struct ath_common *common = ath9k_hw_common(ah);
  1191. struct ath_vif *avp = (void *)vif->drv_priv;
  1192. int slottime;
  1193. ath9k_ps_wakeup(sc);
  1194. mutex_lock(&sc->mutex);
  1195. if (changed & BSS_CHANGED_ASSOC) {
  1196. ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
  1197. bss_conf->bssid, bss_conf->assoc);
  1198. if (avp->primary_sta_vif && !bss_conf->assoc) {
  1199. clear_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags);
  1200. avp->primary_sta_vif = false;
  1201. if (ah->opmode == NL80211_IFTYPE_STATION)
  1202. clear_bit(SC_OP_BEACONS, &sc->sc_flags);
  1203. }
  1204. ieee80211_iterate_active_interfaces_atomic(
  1205. sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
  1206. ath9k_bss_assoc_iter, sc);
  1207. if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags) &&
  1208. ah->opmode == NL80211_IFTYPE_STATION) {
  1209. memset(common->curbssid, 0, ETH_ALEN);
  1210. common->curaid = 0;
  1211. ath9k_hw_write_associd(sc->sc_ah);
  1212. if (ath9k_hw_mci_is_enabled(sc->sc_ah))
  1213. ath9k_mci_update_wlan_channels(sc, true);
  1214. }
  1215. }
  1216. if (changed & BSS_CHANGED_IBSS) {
  1217. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1218. common->curaid = bss_conf->aid;
  1219. ath9k_hw_write_associd(sc->sc_ah);
  1220. }
  1221. if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
  1222. (changed & BSS_CHANGED_BEACON_INT)) {
  1223. if (ah->opmode == NL80211_IFTYPE_AP &&
  1224. bss_conf->enable_beacon)
  1225. ath9k_set_tsfadjust(sc, vif);
  1226. if (ath9k_allow_beacon_config(sc, vif))
  1227. ath9k_beacon_config(sc, vif, changed);
  1228. }
  1229. if (changed & BSS_CHANGED_ERP_SLOT) {
  1230. if (bss_conf->use_short_slot)
  1231. slottime = 9;
  1232. else
  1233. slottime = 20;
  1234. if (vif->type == NL80211_IFTYPE_AP) {
  1235. /*
  1236. * Defer update, so that connected stations can adjust
  1237. * their settings at the same time.
  1238. * See beacon.c for more details
  1239. */
  1240. sc->beacon.slottime = slottime;
  1241. sc->beacon.updateslot = UPDATE;
  1242. } else {
  1243. ah->slottime = slottime;
  1244. ath9k_hw_init_global_settings(ah);
  1245. }
  1246. }
  1247. if (changed & CHECK_ANI)
  1248. ath_check_ani(sc);
  1249. mutex_unlock(&sc->mutex);
  1250. ath9k_ps_restore(sc);
  1251. #undef CHECK_ANI
  1252. }
  1253. static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  1254. {
  1255. struct ath_softc *sc = hw->priv;
  1256. u64 tsf;
  1257. mutex_lock(&sc->mutex);
  1258. ath9k_ps_wakeup(sc);
  1259. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1260. ath9k_ps_restore(sc);
  1261. mutex_unlock(&sc->mutex);
  1262. return tsf;
  1263. }
  1264. static void ath9k_set_tsf(struct ieee80211_hw *hw,
  1265. struct ieee80211_vif *vif,
  1266. u64 tsf)
  1267. {
  1268. struct ath_softc *sc = hw->priv;
  1269. mutex_lock(&sc->mutex);
  1270. ath9k_ps_wakeup(sc);
  1271. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1272. ath9k_ps_restore(sc);
  1273. mutex_unlock(&sc->mutex);
  1274. }
  1275. static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  1276. {
  1277. struct ath_softc *sc = hw->priv;
  1278. mutex_lock(&sc->mutex);
  1279. ath9k_ps_wakeup(sc);
  1280. ath9k_hw_reset_tsf(sc->sc_ah);
  1281. ath9k_ps_restore(sc);
  1282. mutex_unlock(&sc->mutex);
  1283. }
  1284. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1285. struct ieee80211_vif *vif,
  1286. enum ieee80211_ampdu_mlme_action action,
  1287. struct ieee80211_sta *sta,
  1288. u16 tid, u16 *ssn, u8 buf_size)
  1289. {
  1290. struct ath_softc *sc = hw->priv;
  1291. int ret = 0;
  1292. local_bh_disable();
  1293. switch (action) {
  1294. case IEEE80211_AMPDU_RX_START:
  1295. break;
  1296. case IEEE80211_AMPDU_RX_STOP:
  1297. break;
  1298. case IEEE80211_AMPDU_TX_START:
  1299. ath9k_ps_wakeup(sc);
  1300. ret = ath_tx_aggr_start(sc, sta, tid, ssn);
  1301. if (!ret)
  1302. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1303. ath9k_ps_restore(sc);
  1304. break;
  1305. case IEEE80211_AMPDU_TX_STOP:
  1306. ath9k_ps_wakeup(sc);
  1307. ath_tx_aggr_stop(sc, sta, tid);
  1308. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1309. ath9k_ps_restore(sc);
  1310. break;
  1311. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1312. ath9k_ps_wakeup(sc);
  1313. ath_tx_aggr_resume(sc, sta, tid);
  1314. ath9k_ps_restore(sc);
  1315. break;
  1316. default:
  1317. ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
  1318. }
  1319. local_bh_enable();
  1320. return ret;
  1321. }
  1322. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1323. struct survey_info *survey)
  1324. {
  1325. struct ath_softc *sc = hw->priv;
  1326. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1327. struct ieee80211_supported_band *sband;
  1328. struct ieee80211_channel *chan;
  1329. unsigned long flags;
  1330. int pos;
  1331. spin_lock_irqsave(&common->cc_lock, flags);
  1332. if (idx == 0)
  1333. ath_update_survey_stats(sc);
  1334. sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  1335. if (sband && idx >= sband->n_channels) {
  1336. idx -= sband->n_channels;
  1337. sband = NULL;
  1338. }
  1339. if (!sband)
  1340. sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
  1341. if (!sband || idx >= sband->n_channels) {
  1342. spin_unlock_irqrestore(&common->cc_lock, flags);
  1343. return -ENOENT;
  1344. }
  1345. chan = &sband->channels[idx];
  1346. pos = chan->hw_value;
  1347. memcpy(survey, &sc->survey[pos], sizeof(*survey));
  1348. survey->channel = chan;
  1349. spin_unlock_irqrestore(&common->cc_lock, flags);
  1350. return 0;
  1351. }
  1352. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1353. {
  1354. struct ath_softc *sc = hw->priv;
  1355. struct ath_hw *ah = sc->sc_ah;
  1356. mutex_lock(&sc->mutex);
  1357. ah->coverage_class = coverage_class;
  1358. ath9k_ps_wakeup(sc);
  1359. ath9k_hw_init_global_settings(ah);
  1360. ath9k_ps_restore(sc);
  1361. mutex_unlock(&sc->mutex);
  1362. }
  1363. static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
  1364. {
  1365. struct ath_softc *sc = hw->priv;
  1366. struct ath_hw *ah = sc->sc_ah;
  1367. struct ath_common *common = ath9k_hw_common(ah);
  1368. int timeout = 200; /* ms */
  1369. int i, j;
  1370. bool drain_txq;
  1371. mutex_lock(&sc->mutex);
  1372. cancel_delayed_work_sync(&sc->tx_complete_work);
  1373. if (ah->ah_flags & AH_UNPLUGGED) {
  1374. ath_dbg(common, ANY, "Device has been unplugged!\n");
  1375. mutex_unlock(&sc->mutex);
  1376. return;
  1377. }
  1378. if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
  1379. ath_dbg(common, ANY, "Device not present\n");
  1380. mutex_unlock(&sc->mutex);
  1381. return;
  1382. }
  1383. for (j = 0; j < timeout; j++) {
  1384. bool npend = false;
  1385. if (j)
  1386. usleep_range(1000, 2000);
  1387. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1388. if (!ATH_TXQ_SETUP(sc, i))
  1389. continue;
  1390. npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
  1391. if (npend)
  1392. break;
  1393. }
  1394. if (!npend)
  1395. break;
  1396. }
  1397. if (drop) {
  1398. ath9k_ps_wakeup(sc);
  1399. spin_lock_bh(&sc->sc_pcu_lock);
  1400. drain_txq = ath_drain_all_txq(sc, false);
  1401. spin_unlock_bh(&sc->sc_pcu_lock);
  1402. if (!drain_txq)
  1403. ath_reset(sc, false);
  1404. ath9k_ps_restore(sc);
  1405. ieee80211_wake_queues(hw);
  1406. }
  1407. ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
  1408. mutex_unlock(&sc->mutex);
  1409. }
  1410. static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
  1411. {
  1412. struct ath_softc *sc = hw->priv;
  1413. int i;
  1414. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1415. if (!ATH_TXQ_SETUP(sc, i))
  1416. continue;
  1417. if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
  1418. return true;
  1419. }
  1420. return false;
  1421. }
  1422. static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
  1423. {
  1424. struct ath_softc *sc = hw->priv;
  1425. struct ath_hw *ah = sc->sc_ah;
  1426. struct ieee80211_vif *vif;
  1427. struct ath_vif *avp;
  1428. struct ath_buf *bf;
  1429. struct ath_tx_status ts;
  1430. bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
  1431. int status;
  1432. vif = sc->beacon.bslot[0];
  1433. if (!vif)
  1434. return 0;
  1435. if (!vif->bss_conf.enable_beacon)
  1436. return 0;
  1437. avp = (void *)vif->drv_priv;
  1438. if (!sc->beacon.tx_processed && !edma) {
  1439. tasklet_disable(&sc->bcon_tasklet);
  1440. bf = avp->av_bcbuf;
  1441. if (!bf || !bf->bf_mpdu)
  1442. goto skip;
  1443. status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
  1444. if (status == -EINPROGRESS)
  1445. goto skip;
  1446. sc->beacon.tx_processed = true;
  1447. sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
  1448. skip:
  1449. tasklet_enable(&sc->bcon_tasklet);
  1450. }
  1451. return sc->beacon.tx_last;
  1452. }
  1453. static int ath9k_get_stats(struct ieee80211_hw *hw,
  1454. struct ieee80211_low_level_stats *stats)
  1455. {
  1456. struct ath_softc *sc = hw->priv;
  1457. struct ath_hw *ah = sc->sc_ah;
  1458. struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
  1459. stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
  1460. stats->dot11RTSFailureCount = mib_stats->rts_bad;
  1461. stats->dot11FCSErrorCount = mib_stats->fcs_bad;
  1462. stats->dot11RTSSuccessCount = mib_stats->rts_good;
  1463. return 0;
  1464. }
  1465. static u32 fill_chainmask(u32 cap, u32 new)
  1466. {
  1467. u32 filled = 0;
  1468. int i;
  1469. for (i = 0; cap && new; i++, cap >>= 1) {
  1470. if (!(cap & BIT(0)))
  1471. continue;
  1472. if (new & BIT(0))
  1473. filled |= BIT(i);
  1474. new >>= 1;
  1475. }
  1476. return filled;
  1477. }
  1478. static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
  1479. {
  1480. if (AR_SREV_9300_20_OR_LATER(ah))
  1481. return true;
  1482. switch (val & 0x7) {
  1483. case 0x1:
  1484. case 0x3:
  1485. case 0x7:
  1486. return true;
  1487. case 0x2:
  1488. return (ah->caps.rx_chainmask == 1);
  1489. default:
  1490. return false;
  1491. }
  1492. }
  1493. static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
  1494. {
  1495. struct ath_softc *sc = hw->priv;
  1496. struct ath_hw *ah = sc->sc_ah;
  1497. if (ah->caps.rx_chainmask != 1)
  1498. rx_ant |= tx_ant;
  1499. if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
  1500. return -EINVAL;
  1501. sc->ant_rx = rx_ant;
  1502. sc->ant_tx = tx_ant;
  1503. if (ah->caps.rx_chainmask == 1)
  1504. return 0;
  1505. /* AR9100 runs into calibration issues if not all rx chains are enabled */
  1506. if (AR_SREV_9100(ah))
  1507. ah->rxchainmask = 0x7;
  1508. else
  1509. ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
  1510. ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
  1511. ath9k_reload_chainmask_settings(sc);
  1512. return 0;
  1513. }
  1514. static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
  1515. {
  1516. struct ath_softc *sc = hw->priv;
  1517. *tx_ant = sc->ant_tx;
  1518. *rx_ant = sc->ant_rx;
  1519. return 0;
  1520. }
  1521. #ifdef CONFIG_PM_SLEEP
  1522. static void ath9k_wow_map_triggers(struct ath_softc *sc,
  1523. struct cfg80211_wowlan *wowlan,
  1524. u32 *wow_triggers)
  1525. {
  1526. if (wowlan->disconnect)
  1527. *wow_triggers |= AH_WOW_LINK_CHANGE |
  1528. AH_WOW_BEACON_MISS;
  1529. if (wowlan->magic_pkt)
  1530. *wow_triggers |= AH_WOW_MAGIC_PATTERN_EN;
  1531. if (wowlan->n_patterns)
  1532. *wow_triggers |= AH_WOW_USER_PATTERN_EN;
  1533. sc->wow_enabled = *wow_triggers;
  1534. }
  1535. static void ath9k_wow_add_disassoc_deauth_pattern(struct ath_softc *sc)
  1536. {
  1537. struct ath_hw *ah = sc->sc_ah;
  1538. struct ath_common *common = ath9k_hw_common(ah);
  1539. struct ath9k_hw_capabilities *pcaps = &ah->caps;
  1540. int pattern_count = 0;
  1541. int i, byte_cnt;
  1542. u8 dis_deauth_pattern[MAX_PATTERN_SIZE];
  1543. u8 dis_deauth_mask[MAX_PATTERN_SIZE];
  1544. memset(dis_deauth_pattern, 0, MAX_PATTERN_SIZE);
  1545. memset(dis_deauth_mask, 0, MAX_PATTERN_SIZE);
  1546. /*
  1547. * Create Dissassociate / Deauthenticate packet filter
  1548. *
  1549. * 2 bytes 2 byte 6 bytes 6 bytes 6 bytes
  1550. * +--------------+----------+---------+--------+--------+----
  1551. * + Frame Control+ Duration + DA + SA + BSSID +
  1552. * +--------------+----------+---------+--------+--------+----
  1553. *
  1554. * The above is the management frame format for disassociate/
  1555. * deauthenticate pattern, from this we need to match the first byte
  1556. * of 'Frame Control' and DA, SA, and BSSID fields
  1557. * (skipping 2nd byte of FC and Duration feild.
  1558. *
  1559. * Disassociate pattern
  1560. * --------------------
  1561. * Frame control = 00 00 1010
  1562. * DA, SA, BSSID = x:x:x:x:x:x
  1563. * Pattern will be A0000000 | x:x:x:x:x:x | x:x:x:x:x:x
  1564. * | x:x:x:x:x:x -- 22 bytes
  1565. *
  1566. * Deauthenticate pattern
  1567. * ----------------------
  1568. * Frame control = 00 00 1100
  1569. * DA, SA, BSSID = x:x:x:x:x:x
  1570. * Pattern will be C0000000 | x:x:x:x:x:x | x:x:x:x:x:x
  1571. * | x:x:x:x:x:x -- 22 bytes
  1572. */
  1573. /* Create Disassociate Pattern first */
  1574. byte_cnt = 0;
  1575. /* Fill out the mask with all FF's */
  1576. for (i = 0; i < MAX_PATTERN_MASK_SIZE; i++)
  1577. dis_deauth_mask[i] = 0xff;
  1578. /* copy the first byte of frame control field */
  1579. dis_deauth_pattern[byte_cnt] = 0xa0;
  1580. byte_cnt++;
  1581. /* skip 2nd byte of frame control and Duration field */
  1582. byte_cnt += 3;
  1583. /*
  1584. * need not match the destination mac address, it can be a broadcast
  1585. * mac address or an unicast to this station
  1586. */
  1587. byte_cnt += 6;
  1588. /* copy the source mac address */
  1589. memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN);
  1590. byte_cnt += 6;
  1591. /* copy the bssid, its same as the source mac address */
  1592. memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN);
  1593. /* Create Disassociate pattern mask */
  1594. if (pcaps->hw_caps & ATH9K_HW_WOW_PATTERN_MATCH_EXACT) {
  1595. if (pcaps->hw_caps & ATH9K_HW_WOW_PATTERN_MATCH_DWORD) {
  1596. /*
  1597. * for AR9280, because of hardware limitation, the
  1598. * first 4 bytes have to be matched for all patterns.
  1599. * the mask for disassociation and de-auth pattern
  1600. * matching need to enable the first 4 bytes.
  1601. * also the duration field needs to be filled.
  1602. */
  1603. dis_deauth_mask[0] = 0xf0;
  1604. /*
  1605. * fill in duration field
  1606. FIXME: what is the exact value ?
  1607. */
  1608. dis_deauth_pattern[2] = 0xff;
  1609. dis_deauth_pattern[3] = 0xff;
  1610. } else {
  1611. dis_deauth_mask[0] = 0xfe;
  1612. }
  1613. dis_deauth_mask[1] = 0x03;
  1614. dis_deauth_mask[2] = 0xc0;
  1615. } else {
  1616. dis_deauth_mask[0] = 0xef;
  1617. dis_deauth_mask[1] = 0x3f;
  1618. dis_deauth_mask[2] = 0x00;
  1619. dis_deauth_mask[3] = 0xfc;
  1620. }
  1621. ath_dbg(common, WOW, "Adding disassoc/deauth patterns for WoW\n");
  1622. ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask,
  1623. pattern_count, byte_cnt);
  1624. pattern_count++;
  1625. /*
  1626. * for de-authenticate pattern, only the first byte of the frame
  1627. * control field gets changed from 0xA0 to 0xC0
  1628. */
  1629. dis_deauth_pattern[0] = 0xC0;
  1630. ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask,
  1631. pattern_count, byte_cnt);
  1632. }
  1633. static void ath9k_wow_add_pattern(struct ath_softc *sc,
  1634. struct cfg80211_wowlan *wowlan)
  1635. {
  1636. struct ath_hw *ah = sc->sc_ah;
  1637. struct ath9k_wow_pattern *wow_pattern = NULL;
  1638. struct cfg80211_wowlan_trig_pkt_pattern *patterns = wowlan->patterns;
  1639. int mask_len;
  1640. s8 i = 0;
  1641. if (!wowlan->n_patterns)
  1642. return;
  1643. /*
  1644. * Add the new user configured patterns
  1645. */
  1646. for (i = 0; i < wowlan->n_patterns; i++) {
  1647. wow_pattern = kzalloc(sizeof(*wow_pattern), GFP_KERNEL);
  1648. if (!wow_pattern)
  1649. return;
  1650. /*
  1651. * TODO: convert the generic user space pattern to
  1652. * appropriate chip specific/802.11 pattern.
  1653. */
  1654. mask_len = DIV_ROUND_UP(wowlan->patterns[i].pattern_len, 8);
  1655. memset(wow_pattern->pattern_bytes, 0, MAX_PATTERN_SIZE);
  1656. memset(wow_pattern->mask_bytes, 0, MAX_PATTERN_SIZE);
  1657. memcpy(wow_pattern->pattern_bytes, patterns[i].pattern,
  1658. patterns[i].pattern_len);
  1659. memcpy(wow_pattern->mask_bytes, patterns[i].mask, mask_len);
  1660. wow_pattern->pattern_len = patterns[i].pattern_len;
  1661. /*
  1662. * just need to take care of deauth and disssoc pattern,
  1663. * make sure we don't overwrite them.
  1664. */
  1665. ath9k_hw_wow_apply_pattern(ah, wow_pattern->pattern_bytes,
  1666. wow_pattern->mask_bytes,
  1667. i + 2,
  1668. wow_pattern->pattern_len);
  1669. kfree(wow_pattern);
  1670. }
  1671. }
  1672. static int ath9k_suspend(struct ieee80211_hw *hw,
  1673. struct cfg80211_wowlan *wowlan)
  1674. {
  1675. struct ath_softc *sc = hw->priv;
  1676. struct ath_hw *ah = sc->sc_ah;
  1677. struct ath_common *common = ath9k_hw_common(ah);
  1678. u32 wow_triggers_enabled = 0;
  1679. int ret = 0;
  1680. mutex_lock(&sc->mutex);
  1681. ath_cancel_work(sc);
  1682. ath_stop_ani(sc);
  1683. del_timer_sync(&sc->rx_poll_timer);
  1684. if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
  1685. ath_dbg(common, ANY, "Device not present\n");
  1686. ret = -EINVAL;
  1687. goto fail_wow;
  1688. }
  1689. if (WARN_ON(!wowlan)) {
  1690. ath_dbg(common, WOW, "None of the WoW triggers enabled\n");
  1691. ret = -EINVAL;
  1692. goto fail_wow;
  1693. }
  1694. if (!device_can_wakeup(sc->dev)) {
  1695. ath_dbg(common, WOW, "device_can_wakeup failed, WoW is not enabled\n");
  1696. ret = 1;
  1697. goto fail_wow;
  1698. }
  1699. /*
  1700. * none of the sta vifs are associated
  1701. * and we are not currently handling multivif
  1702. * cases, for instance we have to seperately
  1703. * configure 'keep alive frame' for each
  1704. * STA.
  1705. */
  1706. if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
  1707. ath_dbg(common, WOW, "None of the STA vifs are associated\n");
  1708. ret = 1;
  1709. goto fail_wow;
  1710. }
  1711. if (sc->nvifs > 1) {
  1712. ath_dbg(common, WOW, "WoW for multivif is not yet supported\n");
  1713. ret = 1;
  1714. goto fail_wow;
  1715. }
  1716. ath9k_wow_map_triggers(sc, wowlan, &wow_triggers_enabled);
  1717. ath_dbg(common, WOW, "WoW triggers enabled 0x%x\n",
  1718. wow_triggers_enabled);
  1719. ath9k_ps_wakeup(sc);
  1720. ath9k_stop_btcoex(sc);
  1721. /*
  1722. * Enable wake up on recieving disassoc/deauth
  1723. * frame by default.
  1724. */
  1725. ath9k_wow_add_disassoc_deauth_pattern(sc);
  1726. if (wow_triggers_enabled & AH_WOW_USER_PATTERN_EN)
  1727. ath9k_wow_add_pattern(sc, wowlan);
  1728. spin_lock_bh(&sc->sc_pcu_lock);
  1729. /*
  1730. * To avoid false wake, we enable beacon miss interrupt only
  1731. * when we go to sleep. We save the current interrupt mask
  1732. * so we can restore it after the system wakes up
  1733. */
  1734. sc->wow_intr_before_sleep = ah->imask;
  1735. ah->imask &= ~ATH9K_INT_GLOBAL;
  1736. ath9k_hw_disable_interrupts(ah);
  1737. ah->imask = ATH9K_INT_BMISS | ATH9K_INT_GLOBAL;
  1738. ath9k_hw_set_interrupts(ah);
  1739. ath9k_hw_enable_interrupts(ah);
  1740. spin_unlock_bh(&sc->sc_pcu_lock);
  1741. /*
  1742. * we can now sync irq and kill any running tasklets, since we already
  1743. * disabled interrupts and not holding a spin lock
  1744. */
  1745. synchronize_irq(sc->irq);
  1746. tasklet_kill(&sc->intr_tq);
  1747. ath9k_hw_wow_enable(ah, wow_triggers_enabled);
  1748. ath9k_ps_restore(sc);
  1749. ath_dbg(common, ANY, "WoW enabled in ath9k\n");
  1750. atomic_inc(&sc->wow_sleep_proc_intr);
  1751. fail_wow:
  1752. mutex_unlock(&sc->mutex);
  1753. return ret;
  1754. }
  1755. static int ath9k_resume(struct ieee80211_hw *hw)
  1756. {
  1757. struct ath_softc *sc = hw->priv;
  1758. struct ath_hw *ah = sc->sc_ah;
  1759. struct ath_common *common = ath9k_hw_common(ah);
  1760. u32 wow_status;
  1761. mutex_lock(&sc->mutex);
  1762. ath9k_ps_wakeup(sc);
  1763. spin_lock_bh(&sc->sc_pcu_lock);
  1764. ath9k_hw_disable_interrupts(ah);
  1765. ah->imask = sc->wow_intr_before_sleep;
  1766. ath9k_hw_set_interrupts(ah);
  1767. ath9k_hw_enable_interrupts(ah);
  1768. spin_unlock_bh(&sc->sc_pcu_lock);
  1769. wow_status = ath9k_hw_wow_wakeup(ah);
  1770. if (atomic_read(&sc->wow_got_bmiss_intr) == 0) {
  1771. /*
  1772. * some devices may not pick beacon miss
  1773. * as the reason they woke up so we add
  1774. * that here for that shortcoming.
  1775. */
  1776. wow_status |= AH_WOW_BEACON_MISS;
  1777. atomic_dec(&sc->wow_got_bmiss_intr);
  1778. ath_dbg(common, ANY, "Beacon miss interrupt picked up during WoW sleep\n");
  1779. }
  1780. atomic_dec(&sc->wow_sleep_proc_intr);
  1781. if (wow_status) {
  1782. ath_dbg(common, ANY, "Waking up due to WoW triggers %s with WoW status = %x\n",
  1783. ath9k_hw_wow_event_to_string(wow_status), wow_status);
  1784. }
  1785. ath_restart_work(sc);
  1786. ath9k_start_btcoex(sc);
  1787. ath9k_ps_restore(sc);
  1788. mutex_unlock(&sc->mutex);
  1789. return 0;
  1790. }
  1791. static void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)
  1792. {
  1793. struct ath_softc *sc = hw->priv;
  1794. mutex_lock(&sc->mutex);
  1795. device_init_wakeup(sc->dev, 1);
  1796. device_set_wakeup_enable(sc->dev, enabled);
  1797. mutex_unlock(&sc->mutex);
  1798. }
  1799. #endif
  1800. struct ieee80211_ops ath9k_ops = {
  1801. .tx = ath9k_tx,
  1802. .start = ath9k_start,
  1803. .stop = ath9k_stop,
  1804. .add_interface = ath9k_add_interface,
  1805. .change_interface = ath9k_change_interface,
  1806. .remove_interface = ath9k_remove_interface,
  1807. .config = ath9k_config,
  1808. .configure_filter = ath9k_configure_filter,
  1809. .sta_add = ath9k_sta_add,
  1810. .sta_remove = ath9k_sta_remove,
  1811. .sta_notify = ath9k_sta_notify,
  1812. .conf_tx = ath9k_conf_tx,
  1813. .bss_info_changed = ath9k_bss_info_changed,
  1814. .set_key = ath9k_set_key,
  1815. .get_tsf = ath9k_get_tsf,
  1816. .set_tsf = ath9k_set_tsf,
  1817. .reset_tsf = ath9k_reset_tsf,
  1818. .ampdu_action = ath9k_ampdu_action,
  1819. .get_survey = ath9k_get_survey,
  1820. .rfkill_poll = ath9k_rfkill_poll_state,
  1821. .set_coverage_class = ath9k_set_coverage_class,
  1822. .flush = ath9k_flush,
  1823. .tx_frames_pending = ath9k_tx_frames_pending,
  1824. .tx_last_beacon = ath9k_tx_last_beacon,
  1825. .get_stats = ath9k_get_stats,
  1826. .set_antenna = ath9k_set_antenna,
  1827. .get_antenna = ath9k_get_antenna,
  1828. #ifdef CONFIG_PM_SLEEP
  1829. .suspend = ath9k_suspend,
  1830. .resume = ath9k_resume,
  1831. .set_wakeup = ath9k_set_wakeup,
  1832. #endif
  1833. #ifdef CONFIG_ATH9K_DEBUGFS
  1834. .get_et_sset_count = ath9k_get_et_sset_count,
  1835. .get_et_stats = ath9k_get_et_stats,
  1836. .get_et_strings = ath9k_get_et_strings,
  1837. #endif
  1838. #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_DEBUGFS)
  1839. .sta_add_debugfs = ath9k_sta_add_debugfs,
  1840. .sta_remove_debugfs = ath9k_sta_remove_debugfs,
  1841. #endif
  1842. };