setup.c 15 KB

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  1. /*
  2. * Copyright (C) 2009 Renesas Solutions Corp.
  3. *
  4. * Kuninori Morimoto <morimoto.kuninori@renesas.com>
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/init.h>
  11. #include <linux/device.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/gpio.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/io.h>
  17. #include <linux/delay.h>
  18. #include <linux/usb/r8a66597.h>
  19. #include <linux/i2c.h>
  20. #include <linux/input.h>
  21. #include <video/sh_mobile_lcdc.h>
  22. #include <media/sh_mobile_ceu.h>
  23. #include <asm/heartbeat.h>
  24. #include <asm/sh_eth.h>
  25. #include <asm/sh_keysc.h>
  26. #include <cpu/sh7724.h>
  27. /*
  28. * Address Interface BusWidth
  29. *-----------------------------------------
  30. * 0x0000_0000 uboot 16bit
  31. * 0x0004_0000 Linux romImage 16bit
  32. * 0x0014_0000 MTD for Linux 16bit
  33. * 0x0400_0000 Internal I/O 16/32bit
  34. * 0x0800_0000 DRAM 32bit
  35. * 0x1800_0000 MFI 16bit
  36. */
  37. /* Heartbeat */
  38. static unsigned char led_pos[] = { 0, 1, 2, 3 };
  39. static struct heartbeat_data heartbeat_data = {
  40. .regsize = 8,
  41. .nr_bits = 4,
  42. .bit_pos = led_pos,
  43. };
  44. static struct resource heartbeat_resources[] = {
  45. [0] = {
  46. .start = 0xA405012C, /* PTG */
  47. .end = 0xA405012E - 1,
  48. .flags = IORESOURCE_MEM,
  49. },
  50. };
  51. static struct platform_device heartbeat_device = {
  52. .name = "heartbeat",
  53. .id = -1,
  54. .dev = {
  55. .platform_data = &heartbeat_data,
  56. },
  57. .num_resources = ARRAY_SIZE(heartbeat_resources),
  58. .resource = heartbeat_resources,
  59. };
  60. /* MTD */
  61. static struct mtd_partition nor_flash_partitions[] = {
  62. {
  63. .name = "boot loader",
  64. .offset = 0,
  65. .size = (5 * 1024 * 1024),
  66. .mask_flags = MTD_CAP_ROM,
  67. }, {
  68. .name = "free-area",
  69. .offset = MTDPART_OFS_APPEND,
  70. .size = MTDPART_SIZ_FULL,
  71. },
  72. };
  73. static struct physmap_flash_data nor_flash_data = {
  74. .width = 2,
  75. .parts = nor_flash_partitions,
  76. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  77. };
  78. static struct resource nor_flash_resources[] = {
  79. [0] = {
  80. .name = "NOR Flash",
  81. .start = 0x00000000,
  82. .end = 0x03ffffff,
  83. .flags = IORESOURCE_MEM,
  84. }
  85. };
  86. static struct platform_device nor_flash_device = {
  87. .name = "physmap-flash",
  88. .resource = nor_flash_resources,
  89. .num_resources = ARRAY_SIZE(nor_flash_resources),
  90. .dev = {
  91. .platform_data = &nor_flash_data,
  92. },
  93. };
  94. /* SH Eth */
  95. #define SH_ETH_ADDR (0xA4600000)
  96. #define SH_ETH_MAHR (SH_ETH_ADDR + 0x1C0)
  97. #define SH_ETH_MALR (SH_ETH_ADDR + 0x1C8)
  98. static struct resource sh_eth_resources[] = {
  99. [0] = {
  100. .start = SH_ETH_ADDR,
  101. .end = SH_ETH_ADDR + 0x1FC,
  102. .flags = IORESOURCE_MEM,
  103. },
  104. [1] = {
  105. .start = 91,
  106. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  107. },
  108. };
  109. struct sh_eth_plat_data sh_eth_plat = {
  110. .phy = 0x1f, /* SMSC LAN8700 */
  111. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  112. };
  113. static struct platform_device sh_eth_device = {
  114. .name = "sh-eth",
  115. .id = 0,
  116. .dev = {
  117. .platform_data = &sh_eth_plat,
  118. },
  119. .num_resources = ARRAY_SIZE(sh_eth_resources),
  120. .resource = sh_eth_resources,
  121. };
  122. /* USB0 host */
  123. void usb0_port_power(int port, int power)
  124. {
  125. gpio_set_value(GPIO_PTB4, power);
  126. }
  127. static struct r8a66597_platdata usb0_host_data = {
  128. .on_chip = 1,
  129. .port_power = usb0_port_power,
  130. };
  131. static struct resource usb0_host_resources[] = {
  132. [0] = {
  133. .start = 0xa4d80000,
  134. .end = 0xa4d80124 - 1,
  135. .flags = IORESOURCE_MEM,
  136. },
  137. [1] = {
  138. .start = 65,
  139. .end = 65,
  140. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  141. },
  142. };
  143. static struct platform_device usb0_host_device = {
  144. .name = "r8a66597_hcd",
  145. .id = 0,
  146. .dev = {
  147. .dma_mask = NULL, /* not use dma */
  148. .coherent_dma_mask = 0xffffffff,
  149. .platform_data = &usb0_host_data,
  150. },
  151. .num_resources = ARRAY_SIZE(usb0_host_resources),
  152. .resource = usb0_host_resources,
  153. };
  154. /*
  155. * USB1
  156. *
  157. * CN5 can use both host/function,
  158. * and we can determine it by checking PTB[3]
  159. *
  160. * This time only USB1 host is supported.
  161. */
  162. void usb1_port_power(int port, int power)
  163. {
  164. if (!gpio_get_value(GPIO_PTB3)) {
  165. printk(KERN_ERR "USB1 function is not supported\n");
  166. return;
  167. }
  168. gpio_set_value(GPIO_PTB5, power);
  169. }
  170. static struct r8a66597_platdata usb1_host_data = {
  171. .on_chip = 1,
  172. .port_power = usb1_port_power,
  173. };
  174. static struct resource usb1_host_resources[] = {
  175. [0] = {
  176. .start = 0xa4d90000,
  177. .end = 0xa4d90124 - 1,
  178. .flags = IORESOURCE_MEM,
  179. },
  180. [1] = {
  181. .start = 66,
  182. .end = 66,
  183. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  184. },
  185. };
  186. static struct platform_device usb1_host_device = {
  187. .name = "r8a66597_hcd",
  188. .id = 1,
  189. .dev = {
  190. .dma_mask = NULL, /* not use dma */
  191. .coherent_dma_mask = 0xffffffff,
  192. .platform_data = &usb1_host_data,
  193. },
  194. .num_resources = ARRAY_SIZE(usb1_host_resources),
  195. .resource = usb1_host_resources,
  196. };
  197. /* LCDC */
  198. static struct sh_mobile_lcdc_info lcdc_info = {
  199. .ch[0] = {
  200. .interface_type = RGB18,
  201. .chan = LCDC_CHAN_MAINLCD,
  202. .bpp = 16,
  203. .lcd_cfg = {
  204. .sync = 0, /* hsync and vsync are active low */
  205. },
  206. .lcd_size_cfg = { /* 7.0 inch */
  207. .width = 152,
  208. .height = 91,
  209. },
  210. .board_cfg = {
  211. },
  212. }
  213. };
  214. static struct resource lcdc_resources[] = {
  215. [0] = {
  216. .name = "LCDC",
  217. .start = 0xfe940000,
  218. .end = 0xfe941fff,
  219. .flags = IORESOURCE_MEM,
  220. },
  221. [1] = {
  222. .start = 106,
  223. .flags = IORESOURCE_IRQ,
  224. },
  225. };
  226. static struct platform_device lcdc_device = {
  227. .name = "sh_mobile_lcdc_fb",
  228. .num_resources = ARRAY_SIZE(lcdc_resources),
  229. .resource = lcdc_resources,
  230. .dev = {
  231. .platform_data = &lcdc_info,
  232. },
  233. .archdata = {
  234. .hwblk_id = HWBLK_LCDC,
  235. },
  236. };
  237. /* CEU0 */
  238. static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
  239. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  240. };
  241. static struct resource ceu0_resources[] = {
  242. [0] = {
  243. .name = "CEU0",
  244. .start = 0xfe910000,
  245. .end = 0xfe91009f,
  246. .flags = IORESOURCE_MEM,
  247. },
  248. [1] = {
  249. .start = 52,
  250. .flags = IORESOURCE_IRQ,
  251. },
  252. [2] = {
  253. /* place holder for contiguous memory */
  254. },
  255. };
  256. static struct platform_device ceu0_device = {
  257. .name = "sh_mobile_ceu",
  258. .id = 0, /* "ceu0" clock */
  259. .num_resources = ARRAY_SIZE(ceu0_resources),
  260. .resource = ceu0_resources,
  261. .dev = {
  262. .platform_data = &sh_mobile_ceu0_info,
  263. },
  264. .archdata = {
  265. .hwblk_id = HWBLK_CEU0,
  266. },
  267. };
  268. /* CEU1 */
  269. static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
  270. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  271. };
  272. static struct resource ceu1_resources[] = {
  273. [0] = {
  274. .name = "CEU1",
  275. .start = 0xfe914000,
  276. .end = 0xfe91409f,
  277. .flags = IORESOURCE_MEM,
  278. },
  279. [1] = {
  280. .start = 63,
  281. .flags = IORESOURCE_IRQ,
  282. },
  283. [2] = {
  284. /* place holder for contiguous memory */
  285. },
  286. };
  287. static struct platform_device ceu1_device = {
  288. .name = "sh_mobile_ceu",
  289. .id = 1, /* "ceu1" clock */
  290. .num_resources = ARRAY_SIZE(ceu1_resources),
  291. .resource = ceu1_resources,
  292. .dev = {
  293. .platform_data = &sh_mobile_ceu1_info,
  294. },
  295. .archdata = {
  296. .hwblk_id = HWBLK_CEU1,
  297. },
  298. };
  299. /* I2C device */
  300. static struct i2c_board_info i2c1_devices[] = {
  301. {
  302. I2C_BOARD_INFO("r2025sd", 0x32),
  303. },
  304. };
  305. /* KEYSC */
  306. static struct sh_keysc_info keysc_info = {
  307. .mode = SH_KEYSC_MODE_1,
  308. .scan_timing = 3,
  309. .delay = 50,
  310. .kycr2_delay = 100,
  311. .keycodes = { KEY_1, 0, 0, 0, 0,
  312. KEY_2, 0, 0, 0, 0,
  313. KEY_3, 0, 0, 0, 0,
  314. KEY_4, 0, 0, 0, 0,
  315. KEY_5, 0, 0, 0, 0,
  316. KEY_6, 0, 0, 0, 0, },
  317. };
  318. static struct resource keysc_resources[] = {
  319. [0] = {
  320. .name = "KEYSC",
  321. .start = 0x044b0000,
  322. .end = 0x044b000f,
  323. .flags = IORESOURCE_MEM,
  324. },
  325. [1] = {
  326. .start = 79,
  327. .flags = IORESOURCE_IRQ,
  328. },
  329. };
  330. static struct platform_device keysc_device = {
  331. .name = "sh_keysc",
  332. .id = 0, /* keysc0 clock */
  333. .num_resources = ARRAY_SIZE(keysc_resources),
  334. .resource = keysc_resources,
  335. .dev = {
  336. .platform_data = &keysc_info,
  337. },
  338. .archdata = {
  339. .hwblk_id = HWBLK_KEYSC,
  340. },
  341. };
  342. static struct platform_device *ecovec_devices[] __initdata = {
  343. &heartbeat_device,
  344. &nor_flash_device,
  345. &sh_eth_device,
  346. &usb0_host_device,
  347. &usb1_host_device, /* USB1 host support */
  348. &lcdc_device,
  349. &ceu0_device,
  350. &ceu1_device,
  351. &keysc_device,
  352. };
  353. #define EEPROM_ADDR 0x50
  354. static u8 mac_read(struct i2c_adapter *a, u8 command)
  355. {
  356. struct i2c_msg msg[2];
  357. u8 buf;
  358. int ret;
  359. msg[0].addr = EEPROM_ADDR;
  360. msg[0].flags = 0;
  361. msg[0].len = 1;
  362. msg[0].buf = &command;
  363. msg[1].addr = EEPROM_ADDR;
  364. msg[1].flags = I2C_M_RD;
  365. msg[1].len = 1;
  366. msg[1].buf = &buf;
  367. ret = i2c_transfer(a, msg, 2);
  368. if (ret < 0) {
  369. printk(KERN_ERR "error %d\n", ret);
  370. buf = 0xff;
  371. }
  372. return buf;
  373. }
  374. #define MAC_LEN 6
  375. static void __init sh_eth_init(void)
  376. {
  377. struct i2c_adapter *a = i2c_get_adapter(1);
  378. struct clk *eth_clk;
  379. u8 mac[MAC_LEN];
  380. int i;
  381. if (!a) {
  382. pr_err("can not get I2C 1\n");
  383. return;
  384. }
  385. eth_clk = clk_get(NULL, "eth0");
  386. if (!eth_clk) {
  387. pr_err("can not get eth0 clk\n");
  388. return;
  389. }
  390. /* read MAC address frome EEPROM */
  391. for (i = 0; i < MAC_LEN; i++) {
  392. mac[i] = mac_read(a, 0x10 + i);
  393. msleep(10);
  394. }
  395. /* clock enable */
  396. clk_enable(eth_clk);
  397. /* reset sh-eth */
  398. ctrl_outl(0x1, SH_ETH_ADDR + 0x0);
  399. /* set MAC addr */
  400. ctrl_outl((mac[0] << 24) |
  401. (mac[1] << 16) |
  402. (mac[2] << 8) |
  403. (mac[3] << 0), SH_ETH_MAHR);
  404. ctrl_outl((mac[4] << 8) |
  405. (mac[5] << 0), SH_ETH_MALR);
  406. clk_put(eth_clk);
  407. }
  408. #define PORT_HIZA 0xA4050158
  409. #define IODRIVEA 0xA405018A
  410. static int __init arch_setup(void)
  411. {
  412. /* enable SCIFA0 */
  413. gpio_request(GPIO_FN_SCIF0_TXD, NULL);
  414. gpio_request(GPIO_FN_SCIF0_RXD, NULL);
  415. /* enable debug LED */
  416. gpio_request(GPIO_PTG0, NULL);
  417. gpio_request(GPIO_PTG1, NULL);
  418. gpio_request(GPIO_PTG2, NULL);
  419. gpio_request(GPIO_PTG3, NULL);
  420. gpio_direction_output(GPIO_PTG0, 0);
  421. gpio_direction_output(GPIO_PTG1, 0);
  422. gpio_direction_output(GPIO_PTG2, 0);
  423. gpio_direction_output(GPIO_PTG3, 0);
  424. ctrl_outw((ctrl_inw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
  425. /* enable SH-Eth */
  426. gpio_request(GPIO_PTA1, NULL);
  427. gpio_direction_output(GPIO_PTA1, 1);
  428. mdelay(20);
  429. gpio_request(GPIO_FN_RMII_RXD0, NULL);
  430. gpio_request(GPIO_FN_RMII_RXD1, NULL);
  431. gpio_request(GPIO_FN_RMII_TXD0, NULL);
  432. gpio_request(GPIO_FN_RMII_TXD1, NULL);
  433. gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
  434. gpio_request(GPIO_FN_RMII_TX_EN, NULL);
  435. gpio_request(GPIO_FN_RMII_RX_ER, NULL);
  436. gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
  437. gpio_request(GPIO_FN_MDIO, NULL);
  438. gpio_request(GPIO_FN_MDC, NULL);
  439. gpio_request(GPIO_FN_LNKSTA, NULL);
  440. /* enable USB */
  441. ctrl_outw(0x0000, 0xA4D80000);
  442. gpio_request(GPIO_PTB3, NULL);
  443. gpio_request(GPIO_PTB4, NULL);
  444. gpio_request(GPIO_PTB5, NULL);
  445. gpio_direction_input(GPIO_PTB3);
  446. gpio_direction_output(GPIO_PTB4, 0);
  447. gpio_direction_output(GPIO_PTB5, 0);
  448. ctrl_outw(0x0600, 0xa40501d4);
  449. ctrl_outw(0x0600, 0xa4050192);
  450. /* enable LCDC */
  451. gpio_request(GPIO_FN_LCDD23, NULL);
  452. gpio_request(GPIO_FN_LCDD22, NULL);
  453. gpio_request(GPIO_FN_LCDD21, NULL);
  454. gpio_request(GPIO_FN_LCDD20, NULL);
  455. gpio_request(GPIO_FN_LCDD19, NULL);
  456. gpio_request(GPIO_FN_LCDD18, NULL);
  457. gpio_request(GPIO_FN_LCDD17, NULL);
  458. gpio_request(GPIO_FN_LCDD16, NULL);
  459. gpio_request(GPIO_FN_LCDD15, NULL);
  460. gpio_request(GPIO_FN_LCDD14, NULL);
  461. gpio_request(GPIO_FN_LCDD13, NULL);
  462. gpio_request(GPIO_FN_LCDD12, NULL);
  463. gpio_request(GPIO_FN_LCDD11, NULL);
  464. gpio_request(GPIO_FN_LCDD10, NULL);
  465. gpio_request(GPIO_FN_LCDD9, NULL);
  466. gpio_request(GPIO_FN_LCDD8, NULL);
  467. gpio_request(GPIO_FN_LCDD7, NULL);
  468. gpio_request(GPIO_FN_LCDD6, NULL);
  469. gpio_request(GPIO_FN_LCDD5, NULL);
  470. gpio_request(GPIO_FN_LCDD4, NULL);
  471. gpio_request(GPIO_FN_LCDD3, NULL);
  472. gpio_request(GPIO_FN_LCDD2, NULL);
  473. gpio_request(GPIO_FN_LCDD1, NULL);
  474. gpio_request(GPIO_FN_LCDD0, NULL);
  475. gpio_request(GPIO_FN_LCDDISP, NULL);
  476. gpio_request(GPIO_FN_LCDHSYN, NULL);
  477. gpio_request(GPIO_FN_LCDDCK, NULL);
  478. gpio_request(GPIO_FN_LCDVSYN, NULL);
  479. gpio_request(GPIO_FN_LCDDON, NULL);
  480. gpio_request(GPIO_FN_LCDLCLK, NULL);
  481. ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA);
  482. gpio_request(GPIO_PTE6, NULL);
  483. gpio_request(GPIO_PTU1, NULL);
  484. gpio_request(GPIO_PTR1, NULL);
  485. gpio_request(GPIO_PTA2, NULL);
  486. gpio_direction_input(GPIO_PTE6);
  487. gpio_direction_output(GPIO_PTU1, 0);
  488. gpio_direction_output(GPIO_PTR1, 0);
  489. gpio_direction_output(GPIO_PTA2, 0);
  490. /* I/O buffer drive ability is low */
  491. ctrl_outw((ctrl_inw(IODRIVEA) & ~0x00c0) | 0x0040 , IODRIVEA);
  492. if (gpio_get_value(GPIO_PTE6)) {
  493. /* DVI */
  494. lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
  495. lcdc_info.ch[0].clock_divider = 1,
  496. lcdc_info.ch[0].lcd_cfg.name = "DVI";
  497. lcdc_info.ch[0].lcd_cfg.xres = 1280;
  498. lcdc_info.ch[0].lcd_cfg.yres = 720;
  499. lcdc_info.ch[0].lcd_cfg.left_margin = 220;
  500. lcdc_info.ch[0].lcd_cfg.right_margin = 110;
  501. lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
  502. lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
  503. lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
  504. lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
  505. gpio_set_value(GPIO_PTA2, 1);
  506. gpio_set_value(GPIO_PTU1, 1);
  507. } else {
  508. /* Panel */
  509. lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
  510. lcdc_info.ch[0].clock_divider = 2,
  511. lcdc_info.ch[0].lcd_cfg.name = "Panel";
  512. lcdc_info.ch[0].lcd_cfg.xres = 800;
  513. lcdc_info.ch[0].lcd_cfg.yres = 480;
  514. lcdc_info.ch[0].lcd_cfg.left_margin = 220;
  515. lcdc_info.ch[0].lcd_cfg.right_margin = 110;
  516. lcdc_info.ch[0].lcd_cfg.hsync_len = 70;
  517. lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
  518. lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
  519. lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
  520. gpio_set_value(GPIO_PTR1, 1);
  521. /* FIXME
  522. *
  523. * LCDDON control is needed for Panel,
  524. * but current sh_mobile_lcdc driver doesn't control it.
  525. * It is temporary correspondence
  526. */
  527. gpio_request(GPIO_PTF4, NULL);
  528. gpio_direction_output(GPIO_PTF4, 1);
  529. }
  530. /* enable CEU0 */
  531. gpio_request(GPIO_FN_VIO0_D15, NULL);
  532. gpio_request(GPIO_FN_VIO0_D14, NULL);
  533. gpio_request(GPIO_FN_VIO0_D13, NULL);
  534. gpio_request(GPIO_FN_VIO0_D12, NULL);
  535. gpio_request(GPIO_FN_VIO0_D11, NULL);
  536. gpio_request(GPIO_FN_VIO0_D10, NULL);
  537. gpio_request(GPIO_FN_VIO0_D9, NULL);
  538. gpio_request(GPIO_FN_VIO0_D8, NULL);
  539. gpio_request(GPIO_FN_VIO0_D7, NULL);
  540. gpio_request(GPIO_FN_VIO0_D6, NULL);
  541. gpio_request(GPIO_FN_VIO0_D5, NULL);
  542. gpio_request(GPIO_FN_VIO0_D4, NULL);
  543. gpio_request(GPIO_FN_VIO0_D3, NULL);
  544. gpio_request(GPIO_FN_VIO0_D2, NULL);
  545. gpio_request(GPIO_FN_VIO0_D1, NULL);
  546. gpio_request(GPIO_FN_VIO0_D0, NULL);
  547. gpio_request(GPIO_FN_VIO0_VD, NULL);
  548. gpio_request(GPIO_FN_VIO0_CLK, NULL);
  549. gpio_request(GPIO_FN_VIO0_FLD, NULL);
  550. gpio_request(GPIO_FN_VIO0_HD, NULL);
  551. platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
  552. /* enable CEU1 */
  553. gpio_request(GPIO_FN_VIO1_D7, NULL);
  554. gpio_request(GPIO_FN_VIO1_D6, NULL);
  555. gpio_request(GPIO_FN_VIO1_D5, NULL);
  556. gpio_request(GPIO_FN_VIO1_D4, NULL);
  557. gpio_request(GPIO_FN_VIO1_D3, NULL);
  558. gpio_request(GPIO_FN_VIO1_D2, NULL);
  559. gpio_request(GPIO_FN_VIO1_D1, NULL);
  560. gpio_request(GPIO_FN_VIO1_D0, NULL);
  561. gpio_request(GPIO_FN_VIO1_FLD, NULL);
  562. gpio_request(GPIO_FN_VIO1_HD, NULL);
  563. gpio_request(GPIO_FN_VIO1_VD, NULL);
  564. gpio_request(GPIO_FN_VIO1_CLK, NULL);
  565. platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
  566. /* enable KEYSC */
  567. gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
  568. gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
  569. gpio_request(GPIO_FN_KEYOUT3, NULL);
  570. gpio_request(GPIO_FN_KEYOUT2, NULL);
  571. gpio_request(GPIO_FN_KEYOUT1, NULL);
  572. gpio_request(GPIO_FN_KEYOUT0, NULL);
  573. gpio_request(GPIO_FN_KEYIN0, NULL);
  574. /* enable I2C device */
  575. i2c_register_board_info(1, i2c1_devices,
  576. ARRAY_SIZE(i2c1_devices));
  577. return platform_add_devices(ecovec_devices,
  578. ARRAY_SIZE(ecovec_devices));
  579. }
  580. arch_initcall(arch_setup);
  581. static int __init devices_setup(void)
  582. {
  583. sh_eth_init();
  584. return 0;
  585. }
  586. device_initcall(devices_setup);
  587. static struct sh_machine_vector mv_ecovec __initmv = {
  588. .mv_name = "R0P7724 (EcoVec)",
  589. };