exynos5440.dtsi 4.5 KB

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  1. /*
  2. * SAMSUNG EXYNOS5440 SoC device tree source
  3. *
  4. * Copyright (c) 2012 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include "skeleton.dtsi"
  12. / {
  13. compatible = "samsung,exynos5440";
  14. interrupt-parent = <&gic>;
  15. aliases {
  16. spi0 = &spi_0;
  17. };
  18. clock: clock-controller@0x160000 {
  19. compatible = "samsung,exynos5440-clock";
  20. reg = <0x160000 0x1000>;
  21. #clock-cells = <1>;
  22. };
  23. gic:interrupt-controller@2E0000 {
  24. compatible = "arm,cortex-a15-gic";
  25. #interrupt-cells = <3>;
  26. interrupt-controller;
  27. reg = <0x2E1000 0x1000>,
  28. <0x2E2000 0x1000>,
  29. <0x2E4000 0x2000>,
  30. <0x2E6000 0x2000>;
  31. interrupts = <1 9 0xf04>;
  32. };
  33. cpus {
  34. #address-cells = <1>;
  35. #size-cells = <0>;
  36. cpu@0 {
  37. compatible = "arm,cortex-a15";
  38. reg = <0>;
  39. };
  40. cpu@1 {
  41. compatible = "arm,cortex-a15";
  42. reg = <1>;
  43. };
  44. cpu@2 {
  45. compatible = "arm,cortex-a15";
  46. reg = <2>;
  47. };
  48. cpu@3 {
  49. compatible = "arm,cortex-a15";
  50. reg = <3>;
  51. };
  52. };
  53. arm-pmu {
  54. compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu";
  55. interrupts = <0 52 4>,
  56. <0 53 4>,
  57. <0 54 4>,
  58. <0 55 4>;
  59. };
  60. timer {
  61. compatible = "arm,cortex-a15-timer",
  62. "arm,armv7-timer";
  63. interrupts = <1 13 0xf08>,
  64. <1 14 0xf08>,
  65. <1 11 0xf08>,
  66. <1 10 0xf08>;
  67. clock-frequency = <50000000>;
  68. };
  69. cpufreq@160000 {
  70. compatible = "samsung,exynos5440-cpufreq";
  71. reg = <0x160000 0x1000>;
  72. interrupts = <0 57 0>;
  73. operating-points = <
  74. /* KHz uV */
  75. 1500000 1100000
  76. 1400000 1075000
  77. 1300000 1050000
  78. 1200000 1025000
  79. 1100000 1000000
  80. 1000000 975000
  81. 900000 950000
  82. 800000 925000
  83. >;
  84. };
  85. serial@B0000 {
  86. compatible = "samsung,exynos4210-uart";
  87. reg = <0xB0000 0x1000>;
  88. interrupts = <0 2 0>;
  89. clocks = <&clock 21>, <&clock 21>;
  90. clock-names = "uart", "clk_uart_baud0";
  91. };
  92. serial@C0000 {
  93. compatible = "samsung,exynos4210-uart";
  94. reg = <0xC0000 0x1000>;
  95. interrupts = <0 3 0>;
  96. clocks = <&clock 21>, <&clock 21>;
  97. clock-names = "uart", "clk_uart_baud0";
  98. };
  99. spi_0: spi@D0000 {
  100. compatible = "samsung,exynos5440-spi";
  101. reg = <0xD0000 0x100>;
  102. interrupts = <0 4 0>;
  103. #address-cells = <1>;
  104. #size-cells = <0>;
  105. samsung,spi-src-clk = <0>;
  106. num-cs = <1>;
  107. clocks = <&clock 21>, <&clock 16>;
  108. clock-names = "spi", "spi_busclk0";
  109. };
  110. pinctrl {
  111. compatible = "samsung,exynos5440-pinctrl";
  112. reg = <0xE0000 0x1000>;
  113. interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>,
  114. <0 41 0>, <0 42 0>, <0 43 0>, <0 44 0>;
  115. interrupt-controller;
  116. #interrupt-cells = <2>;
  117. #gpio-cells = <2>;
  118. fan: fan {
  119. samsung,exynos5440-pin-function = <1>;
  120. };
  121. hdd_led0: hdd_led0 {
  122. samsung,exynos5440-pin-function = <2>;
  123. };
  124. hdd_led1: hdd_led1 {
  125. samsung,exynos5440-pin-function = <3>;
  126. };
  127. uart1: uart1 {
  128. samsung,exynos5440-pin-function = <4>;
  129. };
  130. };
  131. i2c@F0000 {
  132. compatible = "samsung,exynos5440-i2c";
  133. reg = <0xF0000 0x1000>;
  134. interrupts = <0 5 0>;
  135. #address-cells = <1>;
  136. #size-cells = <0>;
  137. clocks = <&clock 21>;
  138. clock-names = "i2c";
  139. };
  140. i2c@100000 {
  141. compatible = "samsung,exynos5440-i2c";
  142. reg = <0x100000 0x1000>;
  143. interrupts = <0 6 0>;
  144. #address-cells = <1>;
  145. #size-cells = <0>;
  146. clocks = <&clock 21>;
  147. clock-names = "i2c";
  148. };
  149. watchdog {
  150. compatible = "samsung,s3c2410-wdt";
  151. reg = <0x110000 0x1000>;
  152. interrupts = <0 1 0>;
  153. clocks = <&clock 21>;
  154. clock-names = "watchdog";
  155. };
  156. gmac: ethernet@00230000 {
  157. compatible = "snps,dwmac-3.70a";
  158. reg = <0x00230000 0x8000>;
  159. interrupt-parent = <&gic>;
  160. interrupts = <0 31 4>;
  161. interrupt-names = "macirq";
  162. phy-mode = "sgmii";
  163. clocks = <&clock 25>;
  164. clock-names = "stmmaceth";
  165. };
  166. amba {
  167. #address-cells = <1>;
  168. #size-cells = <1>;
  169. compatible = "arm,amba-bus";
  170. interrupt-parent = <&gic>;
  171. ranges;
  172. };
  173. rtc {
  174. compatible = "samsung,s3c6410-rtc";
  175. reg = <0x130000 0x1000>;
  176. interrupts = <0 17 0>, <0 16 0>;
  177. clocks = <&clock 21>;
  178. clock-names = "rtc";
  179. };
  180. sata@210000 {
  181. compatible = "snps,exynos5440-ahci";
  182. reg = <0x210000 0x10000>;
  183. interrupts = <0 30 0>;
  184. clocks = <&clock 23>;
  185. clock-names = "sata";
  186. };
  187. ohci@220000 {
  188. compatible = "samsung,exynos5440-ohci";
  189. reg = <0x220000 0x1000>;
  190. interrupts = <0 29 0>;
  191. clocks = <&clock 24>;
  192. clock-names = "usbhost";
  193. };
  194. ehci@221000 {
  195. compatible = "samsung,exynos5440-ehci";
  196. reg = <0x221000 0x1000>;
  197. interrupts = <0 29 0>;
  198. clocks = <&clock 24>;
  199. clock-names = "usbhost";
  200. };
  201. };