tlb_uv.c 44 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641
  1. /*
  2. * SGI UltraViolet TLB flush routines.
  3. *
  4. * (c) 2008-2010 Cliff Wickman <cpw@sgi.com>, SGI.
  5. *
  6. * This code is released under the GNU General Public License version 2 or
  7. * later.
  8. */
  9. #include <linux/seq_file.h>
  10. #include <linux/proc_fs.h>
  11. #include <linux/debugfs.h>
  12. #include <linux/kernel.h>
  13. #include <linux/slab.h>
  14. #include <asm/mmu_context.h>
  15. #include <asm/uv/uv.h>
  16. #include <asm/uv/uv_mmrs.h>
  17. #include <asm/uv/uv_hub.h>
  18. #include <asm/uv/uv_bau.h>
  19. #include <asm/apic.h>
  20. #include <asm/idle.h>
  21. #include <asm/tsc.h>
  22. #include <asm/irq_vectors.h>
  23. #include <asm/timer.h>
  24. struct msg_desc {
  25. struct bau_payload_queue_entry *msg;
  26. int msg_slot;
  27. int sw_ack_slot;
  28. struct bau_payload_queue_entry *va_queue_first;
  29. struct bau_payload_queue_entry *va_queue_last;
  30. };
  31. /* timeouts in nanoseconds (indexed by UVH_AGING_PRESCALE_SEL urgency7 30:28) */
  32. static int timeout_base_ns[] = {
  33. 20,
  34. 160,
  35. 1280,
  36. 10240,
  37. 81920,
  38. 655360,
  39. 5242880,
  40. 167772160
  41. };
  42. static int timeout_us;
  43. static int nobau;
  44. /* tunables: */
  45. static int max_bau_concurrent = MAX_BAU_CONCURRENT;
  46. static int max_bau_concurrent_constant = MAX_BAU_CONCURRENT;
  47. static int plugged_delay = PLUGGED_DELAY;
  48. static int plugsb4reset = PLUGSB4RESET;
  49. static int timeoutsb4reset = TIMEOUTSB4RESET;
  50. static int ipi_reset_limit = IPI_RESET_LIMIT;
  51. static int complete_threshold = COMPLETE_THRESHOLD;
  52. static int congested_response_us = CONGESTED_RESPONSE_US;
  53. static int congested_reps = CONGESTED_REPS;
  54. static int congested_period = CONGESTED_PERIOD;
  55. static struct dentry *tunables_dir;
  56. static struct dentry *tunables_file;
  57. static int __init setup_nobau(char *arg)
  58. {
  59. nobau = 1;
  60. return 0;
  61. }
  62. early_param("nobau", setup_nobau);
  63. /* base pnode in this partition */
  64. static int uv_partition_base_pnode __read_mostly;
  65. /* position of pnode (which is nasid>>1): */
  66. static int uv_nshift __read_mostly;
  67. static unsigned long uv_mmask __read_mostly;
  68. static DEFINE_PER_CPU(struct ptc_stats, ptcstats);
  69. static DEFINE_PER_CPU(struct bau_control, bau_control);
  70. static DEFINE_PER_CPU(cpumask_var_t, uv_flush_tlb_mask);
  71. struct reset_args {
  72. int sender;
  73. };
  74. /*
  75. * Determine the first node on a uvhub. 'Nodes' are used for kernel
  76. * memory allocation.
  77. */
  78. static int __init uvhub_to_first_node(int uvhub)
  79. {
  80. int node, b;
  81. for_each_online_node(node) {
  82. b = uv_node_to_blade_id(node);
  83. if (uvhub == b)
  84. return node;
  85. }
  86. return -1;
  87. }
  88. /*
  89. * Determine the apicid of the first cpu on a uvhub.
  90. */
  91. static int __init uvhub_to_first_apicid(int uvhub)
  92. {
  93. int cpu;
  94. for_each_present_cpu(cpu)
  95. if (uvhub == uv_cpu_to_blade_id(cpu))
  96. return per_cpu(x86_cpu_to_apicid, cpu);
  97. return -1;
  98. }
  99. /*
  100. * Free a software acknowledge hardware resource by clearing its Pending
  101. * bit. This will return a reply to the sender.
  102. * If the message has timed out, a reply has already been sent by the
  103. * hardware but the resource has not been released. In that case our
  104. * clear of the Timeout bit (as well) will free the resource. No reply will
  105. * be sent (the hardware will only do one reply per message).
  106. */
  107. static inline void uv_reply_to_message(struct msg_desc *mdp,
  108. struct bau_control *bcp)
  109. {
  110. unsigned long dw;
  111. struct bau_payload_queue_entry *msg;
  112. msg = mdp->msg;
  113. if (!msg->canceled) {
  114. dw = (msg->sw_ack_vector << UV_SW_ACK_NPENDING) |
  115. msg->sw_ack_vector;
  116. uv_write_local_mmr(
  117. UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS, dw);
  118. }
  119. msg->replied_to = 1;
  120. msg->sw_ack_vector = 0;
  121. }
  122. /*
  123. * Process the receipt of a RETRY message
  124. */
  125. static inline void uv_bau_process_retry_msg(struct msg_desc *mdp,
  126. struct bau_control *bcp)
  127. {
  128. int i;
  129. int cancel_count = 0;
  130. int slot2;
  131. unsigned long msg_res;
  132. unsigned long mmr = 0;
  133. struct bau_payload_queue_entry *msg;
  134. struct bau_payload_queue_entry *msg2;
  135. struct ptc_stats *stat;
  136. msg = mdp->msg;
  137. stat = &per_cpu(ptcstats, bcp->cpu);
  138. stat->d_retries++;
  139. /*
  140. * cancel any message from msg+1 to the retry itself
  141. */
  142. for (msg2 = msg+1, i = 0; i < DEST_Q_SIZE; msg2++, i++) {
  143. if (msg2 > mdp->va_queue_last)
  144. msg2 = mdp->va_queue_first;
  145. if (msg2 == msg)
  146. break;
  147. /* same conditions for cancellation as uv_do_reset */
  148. if ((msg2->replied_to == 0) && (msg2->canceled == 0) &&
  149. (msg2->sw_ack_vector) && ((msg2->sw_ack_vector &
  150. msg->sw_ack_vector) == 0) &&
  151. (msg2->sending_cpu == msg->sending_cpu) &&
  152. (msg2->msg_type != MSG_NOOP)) {
  153. slot2 = msg2 - mdp->va_queue_first;
  154. mmr = uv_read_local_mmr
  155. (UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
  156. msg_res = ((msg2->sw_ack_vector << 8) |
  157. msg2->sw_ack_vector);
  158. /*
  159. * This is a message retry; clear the resources held
  160. * by the previous message only if they timed out.
  161. * If it has not timed out we have an unexpected
  162. * situation to report.
  163. */
  164. if (mmr & (msg_res << 8)) {
  165. /*
  166. * is the resource timed out?
  167. * make everyone ignore the cancelled message.
  168. */
  169. msg2->canceled = 1;
  170. stat->d_canceled++;
  171. cancel_count++;
  172. uv_write_local_mmr(
  173. UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS,
  174. (msg_res << 8) | msg_res);
  175. } else
  176. printk(KERN_INFO "note bau retry: no effect\n");
  177. }
  178. }
  179. if (!cancel_count)
  180. stat->d_nocanceled++;
  181. }
  182. /*
  183. * Do all the things a cpu should do for a TLB shootdown message.
  184. * Other cpu's may come here at the same time for this message.
  185. */
  186. static void uv_bau_process_message(struct msg_desc *mdp,
  187. struct bau_control *bcp)
  188. {
  189. int msg_ack_count;
  190. short socket_ack_count = 0;
  191. struct ptc_stats *stat;
  192. struct bau_payload_queue_entry *msg;
  193. struct bau_control *smaster = bcp->socket_master;
  194. /*
  195. * This must be a normal message, or retry of a normal message
  196. */
  197. msg = mdp->msg;
  198. stat = &per_cpu(ptcstats, bcp->cpu);
  199. if (msg->address == TLB_FLUSH_ALL) {
  200. local_flush_tlb();
  201. stat->d_alltlb++;
  202. } else {
  203. __flush_tlb_one(msg->address);
  204. stat->d_onetlb++;
  205. }
  206. stat->d_requestee++;
  207. /*
  208. * One cpu on each uvhub has the additional job on a RETRY
  209. * of releasing the resource held by the message that is
  210. * being retried. That message is identified by sending
  211. * cpu number.
  212. */
  213. if (msg->msg_type == MSG_RETRY && bcp == bcp->uvhub_master)
  214. uv_bau_process_retry_msg(mdp, bcp);
  215. /*
  216. * This is a sw_ack message, so we have to reply to it.
  217. * Count each responding cpu on the socket. This avoids
  218. * pinging the count's cache line back and forth between
  219. * the sockets.
  220. */
  221. socket_ack_count = atomic_add_short_return(1, (struct atomic_short *)
  222. &smaster->socket_acknowledge_count[mdp->msg_slot]);
  223. if (socket_ack_count == bcp->cpus_in_socket) {
  224. /*
  225. * Both sockets dump their completed count total into
  226. * the message's count.
  227. */
  228. smaster->socket_acknowledge_count[mdp->msg_slot] = 0;
  229. msg_ack_count = atomic_add_short_return(socket_ack_count,
  230. (struct atomic_short *)&msg->acknowledge_count);
  231. if (msg_ack_count == bcp->cpus_in_uvhub) {
  232. /*
  233. * All cpus in uvhub saw it; reply
  234. */
  235. uv_reply_to_message(mdp, bcp);
  236. }
  237. }
  238. return;
  239. }
  240. /*
  241. * Determine the first cpu on a uvhub.
  242. */
  243. static int uvhub_to_first_cpu(int uvhub)
  244. {
  245. int cpu;
  246. for_each_present_cpu(cpu)
  247. if (uvhub == uv_cpu_to_blade_id(cpu))
  248. return cpu;
  249. return -1;
  250. }
  251. /*
  252. * Last resort when we get a large number of destination timeouts is
  253. * to clear resources held by a given cpu.
  254. * Do this with IPI so that all messages in the BAU message queue
  255. * can be identified by their nonzero sw_ack_vector field.
  256. *
  257. * This is entered for a single cpu on the uvhub.
  258. * The sender want's this uvhub to free a specific message's
  259. * sw_ack resources.
  260. */
  261. static void
  262. uv_do_reset(void *ptr)
  263. {
  264. int i;
  265. int slot;
  266. int count = 0;
  267. unsigned long mmr;
  268. unsigned long msg_res;
  269. struct bau_control *bcp;
  270. struct reset_args *rap;
  271. struct bau_payload_queue_entry *msg;
  272. struct ptc_stats *stat;
  273. bcp = &per_cpu(bau_control, smp_processor_id());
  274. rap = (struct reset_args *)ptr;
  275. stat = &per_cpu(ptcstats, bcp->cpu);
  276. stat->d_resets++;
  277. /*
  278. * We're looking for the given sender, and
  279. * will free its sw_ack resource.
  280. * If all cpu's finally responded after the timeout, its
  281. * message 'replied_to' was set.
  282. */
  283. for (msg = bcp->va_queue_first, i = 0; i < DEST_Q_SIZE; msg++, i++) {
  284. /* uv_do_reset: same conditions for cancellation as
  285. uv_bau_process_retry_msg() */
  286. if ((msg->replied_to == 0) &&
  287. (msg->canceled == 0) &&
  288. (msg->sending_cpu == rap->sender) &&
  289. (msg->sw_ack_vector) &&
  290. (msg->msg_type != MSG_NOOP)) {
  291. /*
  292. * make everyone else ignore this message
  293. */
  294. msg->canceled = 1;
  295. slot = msg - bcp->va_queue_first;
  296. count++;
  297. /*
  298. * only reset the resource if it is still pending
  299. */
  300. mmr = uv_read_local_mmr
  301. (UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
  302. msg_res = ((msg->sw_ack_vector << 8) |
  303. msg->sw_ack_vector);
  304. if (mmr & msg_res) {
  305. stat->d_rcanceled++;
  306. uv_write_local_mmr(
  307. UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS,
  308. msg_res);
  309. }
  310. }
  311. }
  312. return;
  313. }
  314. /*
  315. * Use IPI to get all target uvhubs to release resources held by
  316. * a given sending cpu number.
  317. */
  318. static void uv_reset_with_ipi(struct bau_target_uvhubmask *distribution,
  319. int sender)
  320. {
  321. int uvhub;
  322. int cpu;
  323. cpumask_t mask;
  324. struct reset_args reset_args;
  325. reset_args.sender = sender;
  326. cpus_clear(mask);
  327. /* find a single cpu for each uvhub in this distribution mask */
  328. for (uvhub = 0;
  329. uvhub < sizeof(struct bau_target_uvhubmask) * BITSPERBYTE;
  330. uvhub++) {
  331. if (!bau_uvhub_isset(uvhub, distribution))
  332. continue;
  333. /* find a cpu for this uvhub */
  334. cpu = uvhub_to_first_cpu(uvhub);
  335. cpu_set(cpu, mask);
  336. }
  337. /* IPI all cpus; Preemption is already disabled */
  338. smp_call_function_many(&mask, uv_do_reset, (void *)&reset_args, 1);
  339. return;
  340. }
  341. static inline unsigned long
  342. cycles_2_us(unsigned long long cyc)
  343. {
  344. unsigned long long ns;
  345. unsigned long us;
  346. ns = (cyc * per_cpu(cyc2ns, smp_processor_id()))
  347. >> CYC2NS_SCALE_FACTOR;
  348. us = ns / 1000;
  349. return us;
  350. }
  351. /*
  352. * wait for all cpus on this hub to finish their sends and go quiet
  353. * leaves uvhub_quiesce set so that no new broadcasts are started by
  354. * bau_flush_send_and_wait()
  355. */
  356. static inline void
  357. quiesce_local_uvhub(struct bau_control *hmaster)
  358. {
  359. atomic_add_short_return(1, (struct atomic_short *)
  360. &hmaster->uvhub_quiesce);
  361. }
  362. /*
  363. * mark this quiet-requestor as done
  364. */
  365. static inline void
  366. end_uvhub_quiesce(struct bau_control *hmaster)
  367. {
  368. atomic_add_short_return(-1, (struct atomic_short *)
  369. &hmaster->uvhub_quiesce);
  370. }
  371. /*
  372. * Wait for completion of a broadcast software ack message
  373. * return COMPLETE, RETRY(PLUGGED or TIMEOUT) or GIVEUP
  374. */
  375. static int uv_wait_completion(struct bau_desc *bau_desc,
  376. unsigned long mmr_offset, int right_shift, int this_cpu,
  377. struct bau_control *bcp, struct bau_control *smaster, long try)
  378. {
  379. int relaxes = 0;
  380. unsigned long descriptor_status;
  381. unsigned long mmr;
  382. unsigned long mask;
  383. cycles_t ttime;
  384. cycles_t timeout_time;
  385. struct ptc_stats *stat = &per_cpu(ptcstats, this_cpu);
  386. struct bau_control *hmaster;
  387. hmaster = bcp->uvhub_master;
  388. timeout_time = get_cycles() + bcp->timeout_interval;
  389. /* spin on the status MMR, waiting for it to go idle */
  390. while ((descriptor_status = (((unsigned long)
  391. uv_read_local_mmr(mmr_offset) >>
  392. right_shift) & UV_ACT_STATUS_MASK)) !=
  393. DESC_STATUS_IDLE) {
  394. /*
  395. * Our software ack messages may be blocked because there are
  396. * no swack resources available. As long as none of them
  397. * has timed out hardware will NACK our message and its
  398. * state will stay IDLE.
  399. */
  400. if (descriptor_status == DESC_STATUS_SOURCE_TIMEOUT) {
  401. stat->s_stimeout++;
  402. return FLUSH_GIVEUP;
  403. } else if (descriptor_status ==
  404. DESC_STATUS_DESTINATION_TIMEOUT) {
  405. stat->s_dtimeout++;
  406. ttime = get_cycles();
  407. /*
  408. * Our retries may be blocked by all destination
  409. * swack resources being consumed, and a timeout
  410. * pending. In that case hardware returns the
  411. * ERROR that looks like a destination timeout.
  412. */
  413. if (cycles_2_us(ttime - bcp->send_message) <
  414. timeout_us) {
  415. bcp->conseccompletes = 0;
  416. return FLUSH_RETRY_PLUGGED;
  417. }
  418. bcp->conseccompletes = 0;
  419. return FLUSH_RETRY_TIMEOUT;
  420. } else {
  421. /*
  422. * descriptor_status is still BUSY
  423. */
  424. cpu_relax();
  425. relaxes++;
  426. if (relaxes >= 10000) {
  427. relaxes = 0;
  428. if (get_cycles() > timeout_time) {
  429. quiesce_local_uvhub(hmaster);
  430. /* single-thread the register change */
  431. spin_lock(&hmaster->masks_lock);
  432. mmr = uv_read_local_mmr(mmr_offset);
  433. mask = 0UL;
  434. mask |= (3UL < right_shift);
  435. mask = ~mask;
  436. mmr &= mask;
  437. uv_write_local_mmr(mmr_offset, mmr);
  438. spin_unlock(&hmaster->masks_lock);
  439. end_uvhub_quiesce(hmaster);
  440. stat->s_busy++;
  441. return FLUSH_GIVEUP;
  442. }
  443. }
  444. }
  445. }
  446. bcp->conseccompletes++;
  447. return FLUSH_COMPLETE;
  448. }
  449. static inline cycles_t
  450. sec_2_cycles(unsigned long sec)
  451. {
  452. unsigned long ns;
  453. cycles_t cyc;
  454. ns = sec * 1000000000;
  455. cyc = (ns << CYC2NS_SCALE_FACTOR)/(per_cpu(cyc2ns, smp_processor_id()));
  456. return cyc;
  457. }
  458. /*
  459. * conditionally add 1 to *v, unless *v is >= u
  460. * return 0 if we cannot add 1 to *v because it is >= u
  461. * return 1 if we can add 1 to *v because it is < u
  462. * the add is atomic
  463. *
  464. * This is close to atomic_add_unless(), but this allows the 'u' value
  465. * to be lowered below the current 'v'. atomic_add_unless can only stop
  466. * on equal.
  467. */
  468. static inline int atomic_inc_unless_ge(spinlock_t *lock, atomic_t *v, int u)
  469. {
  470. spin_lock(lock);
  471. if (atomic_read(v) >= u) {
  472. spin_unlock(lock);
  473. return 0;
  474. }
  475. atomic_inc(v);
  476. spin_unlock(lock);
  477. return 1;
  478. }
  479. /**
  480. * uv_flush_send_and_wait
  481. *
  482. * Send a broadcast and wait for it to complete.
  483. *
  484. * The flush_mask contains the cpus the broadcast is to be sent to, plus
  485. * cpus that are on the local uvhub.
  486. *
  487. * Returns NULL if all flushing represented in the mask was done. The mask
  488. * is zeroed.
  489. * Returns @flush_mask if some remote flushing remains to be done. The
  490. * mask will have some bits still set, representing any cpus on the local
  491. * uvhub (not current cpu) and any on remote uvhubs if the broadcast failed.
  492. */
  493. const struct cpumask *uv_flush_send_and_wait(struct bau_desc *bau_desc,
  494. struct cpumask *flush_mask,
  495. struct bau_control *bcp)
  496. {
  497. int right_shift;
  498. int uvhub;
  499. int bit;
  500. int completion_status = 0;
  501. int seq_number = 0;
  502. long try = 0;
  503. int cpu = bcp->uvhub_cpu;
  504. int this_cpu = bcp->cpu;
  505. int this_uvhub = bcp->uvhub;
  506. unsigned long mmr_offset;
  507. unsigned long index;
  508. cycles_t time1;
  509. cycles_t time2;
  510. cycles_t elapsed;
  511. struct ptc_stats *stat = &per_cpu(ptcstats, bcp->cpu);
  512. struct bau_control *smaster = bcp->socket_master;
  513. struct bau_control *hmaster = bcp->uvhub_master;
  514. /*
  515. * Spin here while there are hmaster->max_bau_concurrent or more active
  516. * descriptors. This is the per-uvhub 'throttle'.
  517. */
  518. if (!atomic_inc_unless_ge(&hmaster->uvhub_lock,
  519. &hmaster->active_descriptor_count,
  520. hmaster->max_bau_concurrent)) {
  521. stat->s_throttles++;
  522. do {
  523. cpu_relax();
  524. } while (!atomic_inc_unless_ge(&hmaster->uvhub_lock,
  525. &hmaster->active_descriptor_count,
  526. hmaster->max_bau_concurrent));
  527. }
  528. while (hmaster->uvhub_quiesce)
  529. cpu_relax();
  530. if (cpu < UV_CPUS_PER_ACT_STATUS) {
  531. mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
  532. right_shift = cpu * UV_ACT_STATUS_SIZE;
  533. } else {
  534. mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_1;
  535. right_shift =
  536. ((cpu - UV_CPUS_PER_ACT_STATUS) * UV_ACT_STATUS_SIZE);
  537. }
  538. time1 = get_cycles();
  539. do {
  540. /*
  541. * Every message from any given cpu gets a unique message
  542. * sequence number. But retries use that same number.
  543. * Our message may have timed out at the destination because
  544. * all sw-ack resources are in use and there is a timeout
  545. * pending there. In that case, our last send never got
  546. * placed into the queue and we need to persist until it
  547. * does.
  548. *
  549. * Make any retry a type MSG_RETRY so that the destination will
  550. * free any resource held by a previous message from this cpu.
  551. */
  552. if (try == 0) {
  553. /* use message type set by the caller the first time */
  554. seq_number = bcp->message_number++;
  555. } else {
  556. /* use RETRY type on all the rest; same sequence */
  557. bau_desc->header.msg_type = MSG_RETRY;
  558. stat->s_retry_messages++;
  559. }
  560. bau_desc->header.sequence = seq_number;
  561. index = (1UL << UVH_LB_BAU_SB_ACTIVATION_CONTROL_PUSH_SHFT) |
  562. bcp->uvhub_cpu;
  563. bcp->send_message = get_cycles();
  564. uv_write_local_mmr(UVH_LB_BAU_SB_ACTIVATION_CONTROL, index);
  565. try++;
  566. completion_status = uv_wait_completion(bau_desc, mmr_offset,
  567. right_shift, this_cpu, bcp, smaster, try);
  568. if (completion_status == FLUSH_RETRY_PLUGGED) {
  569. /*
  570. * Our retries may be blocked by all destination swack
  571. * resources being consumed, and a timeout pending. In
  572. * that case hardware immediately returns the ERROR
  573. * that looks like a destination timeout.
  574. */
  575. udelay(bcp->plugged_delay);
  576. bcp->plugged_tries++;
  577. if (bcp->plugged_tries >= bcp->plugsb4reset) {
  578. bcp->plugged_tries = 0;
  579. quiesce_local_uvhub(hmaster);
  580. spin_lock(&hmaster->queue_lock);
  581. uv_reset_with_ipi(&bau_desc->distribution,
  582. this_cpu);
  583. spin_unlock(&hmaster->queue_lock);
  584. end_uvhub_quiesce(hmaster);
  585. bcp->ipi_attempts++;
  586. stat->s_resets_plug++;
  587. }
  588. } else if (completion_status == FLUSH_RETRY_TIMEOUT) {
  589. hmaster->max_bau_concurrent = 1;
  590. bcp->timeout_tries++;
  591. udelay(TIMEOUT_DELAY);
  592. if (bcp->timeout_tries >= bcp->timeoutsb4reset) {
  593. bcp->timeout_tries = 0;
  594. quiesce_local_uvhub(hmaster);
  595. spin_lock(&hmaster->queue_lock);
  596. uv_reset_with_ipi(&bau_desc->distribution,
  597. this_cpu);
  598. spin_unlock(&hmaster->queue_lock);
  599. end_uvhub_quiesce(hmaster);
  600. bcp->ipi_attempts++;
  601. stat->s_resets_timeout++;
  602. }
  603. }
  604. if (bcp->ipi_attempts >= bcp->ipi_reset_limit) {
  605. bcp->ipi_attempts = 0;
  606. completion_status = FLUSH_GIVEUP;
  607. break;
  608. }
  609. cpu_relax();
  610. } while ((completion_status == FLUSH_RETRY_PLUGGED) ||
  611. (completion_status == FLUSH_RETRY_TIMEOUT));
  612. time2 = get_cycles();
  613. bcp->plugged_tries = 0;
  614. bcp->timeout_tries = 0;
  615. if ((completion_status == FLUSH_COMPLETE) &&
  616. (bcp->conseccompletes > bcp->complete_threshold) &&
  617. (hmaster->max_bau_concurrent <
  618. hmaster->max_bau_concurrent_constant))
  619. hmaster->max_bau_concurrent++;
  620. /*
  621. * hold any cpu not timing out here; no other cpu currently held by
  622. * the 'throttle' should enter the activation code
  623. */
  624. while (hmaster->uvhub_quiesce)
  625. cpu_relax();
  626. atomic_dec(&hmaster->active_descriptor_count);
  627. /* guard against cycles wrap */
  628. if (time2 > time1) {
  629. elapsed = time2 - time1;
  630. stat->s_time += elapsed;
  631. } else
  632. stat->s_requestor--; /* don't count this one */
  633. if (completion_status == FLUSH_COMPLETE && try > 1)
  634. stat->s_retriesok++;
  635. else if (completion_status == FLUSH_GIVEUP) {
  636. /*
  637. * Cause the caller to do an IPI-style TLB shootdown on
  638. * the target cpu's, all of which are still in the mask.
  639. */
  640. stat->s_giveup++;
  641. return flush_mask;
  642. }
  643. /*
  644. * Success, so clear the remote cpu's from the mask so we don't
  645. * use the IPI method of shootdown on them.
  646. */
  647. for_each_cpu(bit, flush_mask) {
  648. uvhub = uv_cpu_to_blade_id(bit);
  649. if (uvhub == this_uvhub)
  650. continue;
  651. cpumask_clear_cpu(bit, flush_mask);
  652. }
  653. if (!cpumask_empty(flush_mask))
  654. return flush_mask;
  655. return NULL;
  656. }
  657. /**
  658. * uv_flush_tlb_others - globally purge translation cache of a virtual
  659. * address or all TLB's
  660. * @cpumask: mask of all cpu's in which the address is to be removed
  661. * @mm: mm_struct containing virtual address range
  662. * @va: virtual address to be removed (or TLB_FLUSH_ALL for all TLB's on cpu)
  663. * @cpu: the current cpu
  664. *
  665. * This is the entry point for initiating any UV global TLB shootdown.
  666. *
  667. * Purges the translation caches of all specified processors of the given
  668. * virtual address, or purges all TLB's on specified processors.
  669. *
  670. * The caller has derived the cpumask from the mm_struct. This function
  671. * is called only if there are bits set in the mask. (e.g. flush_tlb_page())
  672. *
  673. * The cpumask is converted into a uvhubmask of the uvhubs containing
  674. * those cpus.
  675. *
  676. * Note that this function should be called with preemption disabled.
  677. *
  678. * Returns NULL if all remote flushing was done.
  679. * Returns pointer to cpumask if some remote flushing remains to be
  680. * done. The returned pointer is valid till preemption is re-enabled.
  681. */
  682. const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
  683. struct mm_struct *mm,
  684. unsigned long va, unsigned int cpu)
  685. {
  686. int remotes;
  687. int tcpu;
  688. int uvhub;
  689. int locals = 0;
  690. struct bau_desc *bau_desc;
  691. struct cpumask *flush_mask;
  692. struct ptc_stats *stat;
  693. struct bau_control *bcp;
  694. /* kernel was booted 'nobau' */
  695. if (nobau)
  696. return cpumask;
  697. bcp = &per_cpu(bau_control, cpu);
  698. /*
  699. * Each sending cpu has a per-cpu mask which it fills from the caller's
  700. * cpu mask. Only remote cpus are converted to uvhubs and copied.
  701. */
  702. flush_mask = (struct cpumask *)per_cpu(uv_flush_tlb_mask, cpu);
  703. /*
  704. * copy cpumask to flush_mask, removing current cpu
  705. * (current cpu should already have been flushed by the caller and
  706. * should never be returned if we return flush_mask)
  707. */
  708. cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
  709. if (cpu_isset(cpu, *cpumask))
  710. locals++; /* current cpu was targeted */
  711. bau_desc = bcp->descriptor_base;
  712. bau_desc += UV_ITEMS_PER_DESCRIPTOR * bcp->uvhub_cpu;
  713. bau_uvhubs_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE);
  714. remotes = 0;
  715. for_each_cpu(tcpu, flush_mask) {
  716. uvhub = uv_cpu_to_blade_id(tcpu);
  717. if (uvhub == bcp->uvhub) {
  718. locals++;
  719. continue;
  720. }
  721. bau_uvhub_set(uvhub, &bau_desc->distribution);
  722. remotes++;
  723. }
  724. if (remotes == 0) {
  725. /*
  726. * No off_hub flushing; return status for local hub.
  727. * Return the caller's mask if all were local (the current
  728. * cpu may be in that mask).
  729. */
  730. if (locals)
  731. return cpumask;
  732. else
  733. return NULL;
  734. }
  735. stat = &per_cpu(ptcstats, cpu);
  736. stat->s_requestor++;
  737. stat->s_ntargcpu += remotes;
  738. remotes = bau_uvhub_weight(&bau_desc->distribution);
  739. stat->s_ntarguvhub += remotes;
  740. if (remotes >= 16)
  741. stat->s_ntarguvhub16++;
  742. else if (remotes >= 8)
  743. stat->s_ntarguvhub8++;
  744. else if (remotes >= 4)
  745. stat->s_ntarguvhub4++;
  746. else if (remotes >= 2)
  747. stat->s_ntarguvhub2++;
  748. else
  749. stat->s_ntarguvhub1++;
  750. bau_desc->payload.address = va;
  751. bau_desc->payload.sending_cpu = cpu;
  752. /*
  753. * uv_flush_send_and_wait returns null if all cpu's were messaged, or
  754. * the adjusted flush_mask if any cpu's were not messaged.
  755. */
  756. return uv_flush_send_and_wait(bau_desc, flush_mask, bcp);
  757. }
  758. /*
  759. * The BAU message interrupt comes here. (registered by set_intr_gate)
  760. * See entry_64.S
  761. *
  762. * We received a broadcast assist message.
  763. *
  764. * Interrupts are disabled; this interrupt could represent
  765. * the receipt of several messages.
  766. *
  767. * All cores/threads on this hub get this interrupt.
  768. * The last one to see it does the software ack.
  769. * (the resource will not be freed until noninterruptable cpus see this
  770. * interrupt; hardware may timeout the s/w ack and reply ERROR)
  771. */
  772. void uv_bau_message_interrupt(struct pt_regs *regs)
  773. {
  774. int count = 0;
  775. cycles_t time_start;
  776. struct bau_payload_queue_entry *msg;
  777. struct bau_control *bcp;
  778. struct ptc_stats *stat;
  779. struct msg_desc msgdesc;
  780. time_start = get_cycles();
  781. bcp = &per_cpu(bau_control, smp_processor_id());
  782. stat = &per_cpu(ptcstats, smp_processor_id());
  783. msgdesc.va_queue_first = bcp->va_queue_first;
  784. msgdesc.va_queue_last = bcp->va_queue_last;
  785. msg = bcp->bau_msg_head;
  786. while (msg->sw_ack_vector) {
  787. count++;
  788. msgdesc.msg_slot = msg - msgdesc.va_queue_first;
  789. msgdesc.sw_ack_slot = ffs(msg->sw_ack_vector) - 1;
  790. msgdesc.msg = msg;
  791. uv_bau_process_message(&msgdesc, bcp);
  792. msg++;
  793. if (msg > msgdesc.va_queue_last)
  794. msg = msgdesc.va_queue_first;
  795. bcp->bau_msg_head = msg;
  796. }
  797. stat->d_time += (get_cycles() - time_start);
  798. if (!count)
  799. stat->d_nomsg++;
  800. else if (count > 1)
  801. stat->d_multmsg++;
  802. ack_APIC_irq();
  803. }
  804. /*
  805. * uv_enable_timeouts
  806. *
  807. * Each target uvhub (i.e. a uvhub that has no cpu's) needs to have
  808. * shootdown message timeouts enabled. The timeout does not cause
  809. * an interrupt, but causes an error message to be returned to
  810. * the sender.
  811. */
  812. static void uv_enable_timeouts(void)
  813. {
  814. int uvhub;
  815. int nuvhubs;
  816. int pnode;
  817. unsigned long mmr_image;
  818. nuvhubs = uv_num_possible_blades();
  819. for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
  820. if (!uv_blade_nr_possible_cpus(uvhub))
  821. continue;
  822. pnode = uv_blade_to_pnode(uvhub);
  823. mmr_image =
  824. uv_read_global_mmr64(pnode, UVH_LB_BAU_MISC_CONTROL);
  825. /*
  826. * Set the timeout period and then lock it in, in three
  827. * steps; captures and locks in the period.
  828. *
  829. * To program the period, the SOFT_ACK_MODE must be off.
  830. */
  831. mmr_image &= ~((unsigned long)1 <<
  832. UVH_LB_BAU_MISC_CONTROL_ENABLE_INTD_SOFT_ACK_MODE_SHFT);
  833. uv_write_global_mmr64
  834. (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
  835. /*
  836. * Set the 4-bit period.
  837. */
  838. mmr_image &= ~((unsigned long)0xf <<
  839. UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHFT);
  840. mmr_image |= (UV_INTD_SOFT_ACK_TIMEOUT_PERIOD <<
  841. UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHFT);
  842. uv_write_global_mmr64
  843. (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
  844. /*
  845. * Subsequent reversals of the timebase bit (3) cause an
  846. * immediate timeout of one or all INTD resources as
  847. * indicated in bits 2:0 (7 causes all of them to timeout).
  848. */
  849. mmr_image |= ((unsigned long)1 <<
  850. UVH_LB_BAU_MISC_CONTROL_ENABLE_INTD_SOFT_ACK_MODE_SHFT);
  851. uv_write_global_mmr64
  852. (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
  853. }
  854. }
  855. static void *uv_ptc_seq_start(struct seq_file *file, loff_t *offset)
  856. {
  857. if (*offset < num_possible_cpus())
  858. return offset;
  859. return NULL;
  860. }
  861. static void *uv_ptc_seq_next(struct seq_file *file, void *data, loff_t *offset)
  862. {
  863. (*offset)++;
  864. if (*offset < num_possible_cpus())
  865. return offset;
  866. return NULL;
  867. }
  868. static void uv_ptc_seq_stop(struct seq_file *file, void *data)
  869. {
  870. }
  871. static inline unsigned long long
  872. microsec_2_cycles(unsigned long microsec)
  873. {
  874. unsigned long ns;
  875. unsigned long long cyc;
  876. ns = microsec * 1000;
  877. cyc = (ns << CYC2NS_SCALE_FACTOR)/(per_cpu(cyc2ns, smp_processor_id()));
  878. return cyc;
  879. }
  880. /*
  881. * Display the statistics thru /proc.
  882. * 'data' points to the cpu number
  883. */
  884. static int uv_ptc_seq_show(struct seq_file *file, void *data)
  885. {
  886. struct ptc_stats *stat;
  887. int cpu;
  888. cpu = *(loff_t *)data;
  889. if (!cpu) {
  890. seq_printf(file,
  891. "# cpu sent stime numuvhubs numuvhubs16 numuvhubs8 ");
  892. seq_printf(file,
  893. "numuvhubs4 numuvhubs2 numuvhubs1 numcpus dto ");
  894. seq_printf(file,
  895. "retries rok resetp resett giveup sto bz throt ");
  896. seq_printf(file,
  897. "sw_ack recv rtime all ");
  898. seq_printf(file,
  899. "one mult none retry canc nocan reset rcan\n");
  900. }
  901. if (cpu < num_possible_cpus() && cpu_online(cpu)) {
  902. stat = &per_cpu(ptcstats, cpu);
  903. /* source side statistics */
  904. seq_printf(file,
  905. "cpu %d %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
  906. cpu, stat->s_requestor, cycles_2_us(stat->s_time),
  907. stat->s_ntarguvhub, stat->s_ntarguvhub16,
  908. stat->s_ntarguvhub8, stat->s_ntarguvhub4,
  909. stat->s_ntarguvhub2, stat->s_ntarguvhub1,
  910. stat->s_ntargcpu, stat->s_dtimeout);
  911. seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld ",
  912. stat->s_retry_messages, stat->s_retriesok,
  913. stat->s_resets_plug, stat->s_resets_timeout,
  914. stat->s_giveup, stat->s_stimeout,
  915. stat->s_busy, stat->s_throttles);
  916. /* destination side statistics */
  917. seq_printf(file,
  918. "%lx %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld\n",
  919. uv_read_global_mmr64(uv_cpu_to_pnode(cpu),
  920. UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE),
  921. stat->d_requestee, cycles_2_us(stat->d_time),
  922. stat->d_alltlb, stat->d_onetlb, stat->d_multmsg,
  923. stat->d_nomsg, stat->d_retries, stat->d_canceled,
  924. stat->d_nocanceled, stat->d_resets,
  925. stat->d_rcanceled);
  926. }
  927. return 0;
  928. }
  929. /*
  930. * Display the tunables thru debugfs
  931. */
  932. static ssize_t tunables_read(struct file *file, char __user *userbuf,
  933. size_t count, loff_t *ppos)
  934. {
  935. char buf[300];
  936. int ret;
  937. ret = snprintf(buf, 300, "%s %s %s\n%d %d %d %d %d %d %d %d %d\n",
  938. "max_bau_concurrent plugged_delay plugsb4reset",
  939. "timeoutsb4reset ipi_reset_limit complete_threshold",
  940. "congested_response_us congested_reps congested_period",
  941. max_bau_concurrent, plugged_delay, plugsb4reset,
  942. timeoutsb4reset, ipi_reset_limit, complete_threshold,
  943. congested_response_us, congested_reps, congested_period);
  944. return simple_read_from_buffer(userbuf, count, ppos, buf, ret);
  945. }
  946. /*
  947. * -1: resetf the statistics
  948. * 0: display meaning of the statistics
  949. */
  950. static ssize_t uv_ptc_proc_write(struct file *file, const char __user *user,
  951. size_t count, loff_t *data)
  952. {
  953. int cpu;
  954. long input_arg;
  955. char optstr[64];
  956. struct ptc_stats *stat;
  957. if (count == 0 || count > sizeof(optstr))
  958. return -EINVAL;
  959. if (copy_from_user(optstr, user, count))
  960. return -EFAULT;
  961. optstr[count - 1] = '\0';
  962. if (strict_strtol(optstr, 10, &input_arg) < 0) {
  963. printk(KERN_DEBUG "%s is invalid\n", optstr);
  964. return -EINVAL;
  965. }
  966. if (input_arg == 0) {
  967. printk(KERN_DEBUG "# cpu: cpu number\n");
  968. printk(KERN_DEBUG "Sender statistics:\n");
  969. printk(KERN_DEBUG
  970. "sent: number of shootdown messages sent\n");
  971. printk(KERN_DEBUG
  972. "stime: time spent sending messages\n");
  973. printk(KERN_DEBUG
  974. "numuvhubs: number of hubs targeted with shootdown\n");
  975. printk(KERN_DEBUG
  976. "numuvhubs16: number times 16 or more hubs targeted\n");
  977. printk(KERN_DEBUG
  978. "numuvhubs8: number times 8 or more hubs targeted\n");
  979. printk(KERN_DEBUG
  980. "numuvhubs4: number times 4 or more hubs targeted\n");
  981. printk(KERN_DEBUG
  982. "numuvhubs2: number times 2 or more hubs targeted\n");
  983. printk(KERN_DEBUG
  984. "numuvhubs1: number times 1 hub targeted\n");
  985. printk(KERN_DEBUG
  986. "numcpus: number of cpus targeted with shootdown\n");
  987. printk(KERN_DEBUG
  988. "dto: number of destination timeouts\n");
  989. printk(KERN_DEBUG
  990. "retries: destination timeout retries sent\n");
  991. printk(KERN_DEBUG
  992. "rok: : destination timeouts successfully retried\n");
  993. printk(KERN_DEBUG
  994. "resetp: ipi-style resource resets for plugs\n");
  995. printk(KERN_DEBUG
  996. "resett: ipi-style resource resets for timeouts\n");
  997. printk(KERN_DEBUG
  998. "giveup: fall-backs to ipi-style shootdowns\n");
  999. printk(KERN_DEBUG
  1000. "sto: number of source timeouts\n");
  1001. printk(KERN_DEBUG
  1002. "bz: number of stay-busy's\n");
  1003. printk(KERN_DEBUG
  1004. "throt: number times spun in throttle\n");
  1005. printk(KERN_DEBUG "Destination side statistics:\n");
  1006. printk(KERN_DEBUG
  1007. "sw_ack: image of UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE\n");
  1008. printk(KERN_DEBUG
  1009. "recv: shootdown messages received\n");
  1010. printk(KERN_DEBUG
  1011. "rtime: time spent processing messages\n");
  1012. printk(KERN_DEBUG
  1013. "all: shootdown all-tlb messages\n");
  1014. printk(KERN_DEBUG
  1015. "one: shootdown one-tlb messages\n");
  1016. printk(KERN_DEBUG
  1017. "mult: interrupts that found multiple messages\n");
  1018. printk(KERN_DEBUG
  1019. "none: interrupts that found no messages\n");
  1020. printk(KERN_DEBUG
  1021. "retry: number of retry messages processed\n");
  1022. printk(KERN_DEBUG
  1023. "canc: number messages canceled by retries\n");
  1024. printk(KERN_DEBUG
  1025. "nocan: number retries that found nothing to cancel\n");
  1026. printk(KERN_DEBUG
  1027. "reset: number of ipi-style reset requests processed\n");
  1028. printk(KERN_DEBUG
  1029. "rcan: number messages canceled by reset requests\n");
  1030. } else if (input_arg == -1) {
  1031. for_each_present_cpu(cpu) {
  1032. stat = &per_cpu(ptcstats, cpu);
  1033. memset(stat, 0, sizeof(struct ptc_stats));
  1034. }
  1035. }
  1036. return count;
  1037. }
  1038. static int local_atoi(const char *name)
  1039. {
  1040. int val = 0;
  1041. for (;; name++) {
  1042. switch (*name) {
  1043. case '0' ... '9':
  1044. val = 10*val+(*name-'0');
  1045. break;
  1046. default:
  1047. return val;
  1048. }
  1049. }
  1050. }
  1051. /*
  1052. * set the tunables
  1053. * 0 values reset them to defaults
  1054. */
  1055. static ssize_t tunables_write(struct file *file, const char __user *user,
  1056. size_t count, loff_t *data)
  1057. {
  1058. int cpu;
  1059. int cnt = 0;
  1060. int val;
  1061. char *p;
  1062. char *q;
  1063. char instr[64];
  1064. struct bau_control *bcp;
  1065. if (count == 0 || count > sizeof(instr)-1)
  1066. return -EINVAL;
  1067. if (copy_from_user(instr, user, count))
  1068. return -EFAULT;
  1069. instr[count] = '\0';
  1070. /* count the fields */
  1071. p = instr + strspn(instr, WHITESPACE);
  1072. q = p;
  1073. for (; *p; p = q + strspn(q, WHITESPACE)) {
  1074. q = p + strcspn(p, WHITESPACE);
  1075. cnt++;
  1076. if (q == p)
  1077. break;
  1078. }
  1079. if (cnt != 9) {
  1080. printk(KERN_INFO "bau tunable error: should be 9 numbers\n");
  1081. return -EINVAL;
  1082. }
  1083. p = instr + strspn(instr, WHITESPACE);
  1084. q = p;
  1085. for (cnt = 0; *p; p = q + strspn(q, WHITESPACE), cnt++) {
  1086. q = p + strcspn(p, WHITESPACE);
  1087. val = local_atoi(p);
  1088. switch (cnt) {
  1089. case 0:
  1090. if (val == 0) {
  1091. max_bau_concurrent = MAX_BAU_CONCURRENT;
  1092. max_bau_concurrent_constant =
  1093. MAX_BAU_CONCURRENT;
  1094. continue;
  1095. }
  1096. bcp = &per_cpu(bau_control, smp_processor_id());
  1097. if (val < 1 || val > bcp->cpus_in_uvhub) {
  1098. printk(KERN_DEBUG
  1099. "Error: BAU max concurrent %d is invalid\n",
  1100. val);
  1101. return -EINVAL;
  1102. }
  1103. max_bau_concurrent = val;
  1104. max_bau_concurrent_constant = val;
  1105. continue;
  1106. case 1:
  1107. if (val == 0)
  1108. plugged_delay = PLUGGED_DELAY;
  1109. else
  1110. plugged_delay = val;
  1111. continue;
  1112. case 2:
  1113. if (val == 0)
  1114. plugsb4reset = PLUGSB4RESET;
  1115. else
  1116. plugsb4reset = val;
  1117. continue;
  1118. case 3:
  1119. if (val == 0)
  1120. timeoutsb4reset = TIMEOUTSB4RESET;
  1121. else
  1122. timeoutsb4reset = val;
  1123. continue;
  1124. case 4:
  1125. if (val == 0)
  1126. ipi_reset_limit = IPI_RESET_LIMIT;
  1127. else
  1128. ipi_reset_limit = val;
  1129. continue;
  1130. case 5:
  1131. if (val == 0)
  1132. complete_threshold = COMPLETE_THRESHOLD;
  1133. else
  1134. complete_threshold = val;
  1135. continue;
  1136. case 6:
  1137. if (val == 0)
  1138. congested_response_us = CONGESTED_RESPONSE_US;
  1139. else
  1140. congested_response_us = val;
  1141. continue;
  1142. case 7:
  1143. if (val == 0)
  1144. congested_reps = CONGESTED_REPS;
  1145. else
  1146. congested_reps = val;
  1147. continue;
  1148. case 8:
  1149. if (val == 0)
  1150. congested_period = CONGESTED_PERIOD;
  1151. else
  1152. congested_period = val;
  1153. continue;
  1154. }
  1155. if (q == p)
  1156. break;
  1157. }
  1158. for_each_present_cpu(cpu) {
  1159. bcp = &per_cpu(bau_control, cpu);
  1160. bcp->max_bau_concurrent = max_bau_concurrent;
  1161. bcp->max_bau_concurrent_constant = max_bau_concurrent;
  1162. bcp->plugged_delay = plugged_delay;
  1163. bcp->plugsb4reset = plugsb4reset;
  1164. bcp->timeoutsb4reset = timeoutsb4reset;
  1165. bcp->ipi_reset_limit = ipi_reset_limit;
  1166. bcp->complete_threshold = complete_threshold;
  1167. bcp->congested_response_us = congested_response_us;
  1168. bcp->congested_reps = congested_reps;
  1169. bcp->congested_period = congested_period;
  1170. }
  1171. return count;
  1172. }
  1173. static const struct seq_operations uv_ptc_seq_ops = {
  1174. .start = uv_ptc_seq_start,
  1175. .next = uv_ptc_seq_next,
  1176. .stop = uv_ptc_seq_stop,
  1177. .show = uv_ptc_seq_show
  1178. };
  1179. static int uv_ptc_proc_open(struct inode *inode, struct file *file)
  1180. {
  1181. return seq_open(file, &uv_ptc_seq_ops);
  1182. }
  1183. static int tunables_open(struct inode *inode, struct file *file)
  1184. {
  1185. return 0;
  1186. }
  1187. static const struct file_operations proc_uv_ptc_operations = {
  1188. .open = uv_ptc_proc_open,
  1189. .read = seq_read,
  1190. .write = uv_ptc_proc_write,
  1191. .llseek = seq_lseek,
  1192. .release = seq_release,
  1193. };
  1194. static const struct file_operations tunables_fops = {
  1195. .open = tunables_open,
  1196. .read = tunables_read,
  1197. .write = tunables_write,
  1198. };
  1199. static int __init uv_ptc_init(void)
  1200. {
  1201. struct proc_dir_entry *proc_uv_ptc;
  1202. if (!is_uv_system())
  1203. return 0;
  1204. proc_uv_ptc = proc_create(UV_PTC_BASENAME, 0444, NULL,
  1205. &proc_uv_ptc_operations);
  1206. if (!proc_uv_ptc) {
  1207. printk(KERN_ERR "unable to create %s proc entry\n",
  1208. UV_PTC_BASENAME);
  1209. return -EINVAL;
  1210. }
  1211. tunables_dir = debugfs_create_dir(UV_BAU_TUNABLES_DIR, NULL);
  1212. if (!tunables_dir) {
  1213. printk(KERN_ERR "unable to create debugfs directory %s\n",
  1214. UV_BAU_TUNABLES_DIR);
  1215. return -EINVAL;
  1216. }
  1217. tunables_file = debugfs_create_file(UV_BAU_TUNABLES_FILE, 0600,
  1218. tunables_dir, NULL, &tunables_fops);
  1219. if (!tunables_file) {
  1220. printk(KERN_ERR "unable to create debugfs file %s\n",
  1221. UV_BAU_TUNABLES_FILE);
  1222. return -EINVAL;
  1223. }
  1224. return 0;
  1225. }
  1226. /*
  1227. * initialize the sending side's sending buffers
  1228. */
  1229. static void
  1230. uv_activation_descriptor_init(int node, int pnode)
  1231. {
  1232. int i;
  1233. int cpu;
  1234. unsigned long pa;
  1235. unsigned long m;
  1236. unsigned long n;
  1237. struct bau_desc *bau_desc;
  1238. struct bau_desc *bd2;
  1239. struct bau_control *bcp;
  1240. /*
  1241. * each bau_desc is 64 bytes; there are 8 (UV_ITEMS_PER_DESCRIPTOR)
  1242. * per cpu; and up to 32 (UV_ADP_SIZE) cpu's per uvhub
  1243. */
  1244. bau_desc = (struct bau_desc *)kmalloc_node(sizeof(struct bau_desc)*
  1245. UV_ADP_SIZE*UV_ITEMS_PER_DESCRIPTOR, GFP_KERNEL, node);
  1246. BUG_ON(!bau_desc);
  1247. pa = uv_gpa(bau_desc); /* need the real nasid*/
  1248. n = pa >> uv_nshift;
  1249. m = pa & uv_mmask;
  1250. uv_write_global_mmr64(pnode, UVH_LB_BAU_SB_DESCRIPTOR_BASE,
  1251. (n << UV_DESC_BASE_PNODE_SHIFT | m));
  1252. /*
  1253. * initializing all 8 (UV_ITEMS_PER_DESCRIPTOR) descriptors for each
  1254. * cpu even though we only use the first one; one descriptor can
  1255. * describe a broadcast to 256 uv hubs.
  1256. */
  1257. for (i = 0, bd2 = bau_desc; i < (UV_ADP_SIZE*UV_ITEMS_PER_DESCRIPTOR);
  1258. i++, bd2++) {
  1259. memset(bd2, 0, sizeof(struct bau_desc));
  1260. bd2->header.sw_ack_flag = 1;
  1261. /*
  1262. * base_dest_nodeid is the nasid (pnode<<1) of the first uvhub
  1263. * in the partition. The bit map will indicate uvhub numbers,
  1264. * which are 0-N in a partition. Pnodes are unique system-wide.
  1265. */
  1266. bd2->header.base_dest_nodeid = uv_partition_base_pnode << 1;
  1267. bd2->header.dest_subnodeid = 0x10; /* the LB */
  1268. bd2->header.command = UV_NET_ENDPOINT_INTD;
  1269. bd2->header.int_both = 1;
  1270. /*
  1271. * all others need to be set to zero:
  1272. * fairness chaining multilevel count replied_to
  1273. */
  1274. }
  1275. for_each_present_cpu(cpu) {
  1276. if (pnode != uv_blade_to_pnode(uv_cpu_to_blade_id(cpu)))
  1277. continue;
  1278. bcp = &per_cpu(bau_control, cpu);
  1279. bcp->descriptor_base = bau_desc;
  1280. }
  1281. }
  1282. /*
  1283. * initialize the destination side's receiving buffers
  1284. * entered for each uvhub in the partition
  1285. * - node is first node (kernel memory notion) on the uvhub
  1286. * - pnode is the uvhub's physical identifier
  1287. */
  1288. static void
  1289. uv_payload_queue_init(int node, int pnode)
  1290. {
  1291. int pn;
  1292. int cpu;
  1293. char *cp;
  1294. unsigned long pa;
  1295. struct bau_payload_queue_entry *pqp;
  1296. struct bau_payload_queue_entry *pqp_malloc;
  1297. struct bau_control *bcp;
  1298. pqp = (struct bau_payload_queue_entry *) kmalloc_node(
  1299. (DEST_Q_SIZE + 1) * sizeof(struct bau_payload_queue_entry),
  1300. GFP_KERNEL, node);
  1301. BUG_ON(!pqp);
  1302. pqp_malloc = pqp;
  1303. cp = (char *)pqp + 31;
  1304. pqp = (struct bau_payload_queue_entry *)(((unsigned long)cp >> 5) << 5);
  1305. for_each_present_cpu(cpu) {
  1306. if (pnode != uv_cpu_to_pnode(cpu))
  1307. continue;
  1308. /* for every cpu on this pnode: */
  1309. bcp = &per_cpu(bau_control, cpu);
  1310. bcp->va_queue_first = pqp;
  1311. bcp->bau_msg_head = pqp;
  1312. bcp->va_queue_last = pqp + (DEST_Q_SIZE - 1);
  1313. }
  1314. /*
  1315. * need the pnode of where the memory was really allocated
  1316. */
  1317. pa = uv_gpa(pqp);
  1318. pn = pa >> uv_nshift;
  1319. uv_write_global_mmr64(pnode,
  1320. UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST,
  1321. ((unsigned long)pn << UV_PAYLOADQ_PNODE_SHIFT) |
  1322. uv_physnodeaddr(pqp));
  1323. uv_write_global_mmr64(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL,
  1324. uv_physnodeaddr(pqp));
  1325. uv_write_global_mmr64(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST,
  1326. (unsigned long)
  1327. uv_physnodeaddr(pqp + (DEST_Q_SIZE - 1)));
  1328. /* in effect, all msg_type's are set to MSG_NOOP */
  1329. memset(pqp, 0, sizeof(struct bau_payload_queue_entry) * DEST_Q_SIZE);
  1330. }
  1331. /*
  1332. * Initialization of each UV hub's structures
  1333. */
  1334. static void __init uv_init_uvhub(int uvhub, int vector)
  1335. {
  1336. int node;
  1337. int pnode;
  1338. unsigned long apicid;
  1339. node = uvhub_to_first_node(uvhub);
  1340. pnode = uv_blade_to_pnode(uvhub);
  1341. uv_activation_descriptor_init(node, pnode);
  1342. uv_payload_queue_init(node, pnode);
  1343. /*
  1344. * the below initialization can't be in firmware because the
  1345. * messaging IRQ will be determined by the OS
  1346. */
  1347. apicid = uvhub_to_first_apicid(uvhub);
  1348. uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG,
  1349. ((apicid << 32) | vector));
  1350. }
  1351. /*
  1352. * We will set BAU_MISC_CONTROL with a timeout period.
  1353. * But the BIOS has set UVH_AGING_PRESCALE_SEL and UVH_TRANSACTION_TIMEOUT.
  1354. * So the destination timeout period has be be calculated from them.
  1355. */
  1356. static int
  1357. calculate_destination_timeout(void)
  1358. {
  1359. unsigned long mmr_image;
  1360. int mult1;
  1361. int mult2;
  1362. int index;
  1363. int base;
  1364. int ret;
  1365. unsigned long ts_ns;
  1366. mult1 = UV_INTD_SOFT_ACK_TIMEOUT_PERIOD & BAU_MISC_CONTROL_MULT_MASK;
  1367. mmr_image = uv_read_local_mmr(UVH_AGING_PRESCALE_SEL);
  1368. index = (mmr_image >> BAU_URGENCY_7_SHIFT) & BAU_URGENCY_7_MASK;
  1369. mmr_image = uv_read_local_mmr(UVH_TRANSACTION_TIMEOUT);
  1370. mult2 = (mmr_image >> BAU_TRANS_SHIFT) & BAU_TRANS_MASK;
  1371. base = timeout_base_ns[index];
  1372. ts_ns = base * mult1 * mult2;
  1373. ret = ts_ns / 1000;
  1374. return ret;
  1375. }
  1376. /*
  1377. * initialize the bau_control structure for each cpu
  1378. */
  1379. static void uv_init_per_cpu(int nuvhubs)
  1380. {
  1381. int i, j, k;
  1382. int cpu;
  1383. int pnode;
  1384. int uvhub;
  1385. short socket = 0;
  1386. struct bau_control *bcp;
  1387. struct uvhub_desc *bdp;
  1388. struct socket_desc *sdp;
  1389. struct bau_control *hmaster = NULL;
  1390. struct bau_control *smaster = NULL;
  1391. struct socket_desc {
  1392. short num_cpus;
  1393. short cpu_number[16];
  1394. };
  1395. struct uvhub_desc {
  1396. short num_sockets;
  1397. short num_cpus;
  1398. short uvhub;
  1399. short pnode;
  1400. struct socket_desc socket[2];
  1401. };
  1402. struct uvhub_desc *uvhub_descs;
  1403. timeout_us = calculate_destination_timeout();
  1404. uvhub_descs = (struct uvhub_desc *)
  1405. kmalloc(nuvhubs * sizeof(struct uvhub_desc), GFP_KERNEL);
  1406. memset(uvhub_descs, 0, nuvhubs * sizeof(struct uvhub_desc));
  1407. for_each_present_cpu(cpu) {
  1408. bcp = &per_cpu(bau_control, cpu);
  1409. memset(bcp, 0, sizeof(struct bau_control));
  1410. spin_lock_init(&bcp->masks_lock);
  1411. pnode = uv_cpu_hub_info(cpu)->pnode;
  1412. uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
  1413. bdp = &uvhub_descs[uvhub];
  1414. bdp->num_cpus++;
  1415. bdp->uvhub = uvhub;
  1416. bdp->pnode = pnode;
  1417. /* kludge: assume uv_hub.h is constant */
  1418. socket = (cpu_physical_id(cpu)>>5)&1;
  1419. if (socket >= bdp->num_sockets)
  1420. bdp->num_sockets = socket+1;
  1421. sdp = &bdp->socket[socket];
  1422. sdp->cpu_number[sdp->num_cpus] = cpu;
  1423. sdp->num_cpus++;
  1424. }
  1425. socket = 0;
  1426. for_each_possible_blade(uvhub) {
  1427. bdp = &uvhub_descs[uvhub];
  1428. for (i = 0; i < bdp->num_sockets; i++) {
  1429. sdp = &bdp->socket[i];
  1430. for (j = 0; j < sdp->num_cpus; j++) {
  1431. cpu = sdp->cpu_number[j];
  1432. bcp = &per_cpu(bau_control, cpu);
  1433. bcp->cpu = cpu;
  1434. if (j == 0) {
  1435. smaster = bcp;
  1436. if (i == 0)
  1437. hmaster = bcp;
  1438. }
  1439. bcp->cpus_in_uvhub = bdp->num_cpus;
  1440. bcp->cpus_in_socket = sdp->num_cpus;
  1441. bcp->socket_master = smaster;
  1442. bcp->uvhub_master = hmaster;
  1443. for (k = 0; k < DEST_Q_SIZE; k++)
  1444. bcp->socket_acknowledge_count[k] = 0;
  1445. bcp->uvhub_cpu =
  1446. uv_cpu_hub_info(cpu)->blade_processor_id;
  1447. }
  1448. socket++;
  1449. }
  1450. }
  1451. kfree(uvhub_descs);
  1452. for_each_present_cpu(cpu) {
  1453. bcp = &per_cpu(bau_control, cpu);
  1454. /* time interval to catch a hardware stay-busy bug */
  1455. bcp->timeout_interval = microsec_2_cycles(2*timeout_us);
  1456. bcp->max_bau_concurrent = max_bau_concurrent;
  1457. bcp->max_bau_concurrent_constant = max_bau_concurrent;
  1458. bcp->plugged_delay = plugged_delay;
  1459. bcp->plugsb4reset = plugsb4reset;
  1460. bcp->timeoutsb4reset = timeoutsb4reset;
  1461. bcp->ipi_reset_limit = ipi_reset_limit;
  1462. bcp->complete_threshold = complete_threshold;
  1463. bcp->congested_response_us = congested_response_us;
  1464. bcp->congested_reps = congested_reps;
  1465. bcp->congested_period = congested_period;
  1466. }
  1467. }
  1468. /*
  1469. * Initialization of BAU-related structures
  1470. */
  1471. static int __init uv_bau_init(void)
  1472. {
  1473. int uvhub;
  1474. int pnode;
  1475. int nuvhubs;
  1476. int cur_cpu;
  1477. int vector;
  1478. unsigned long mmr;
  1479. if (!is_uv_system())
  1480. return 0;
  1481. if (nobau)
  1482. return 0;
  1483. for_each_possible_cpu(cur_cpu)
  1484. zalloc_cpumask_var_node(&per_cpu(uv_flush_tlb_mask, cur_cpu),
  1485. GFP_KERNEL, cpu_to_node(cur_cpu));
  1486. max_bau_concurrent = MAX_BAU_CONCURRENT;
  1487. uv_nshift = uv_hub_info->m_val;
  1488. uv_mmask = (1UL << uv_hub_info->m_val) - 1;
  1489. nuvhubs = uv_num_possible_blades();
  1490. uv_init_per_cpu(nuvhubs);
  1491. uv_partition_base_pnode = 0x7fffffff;
  1492. for (uvhub = 0; uvhub < nuvhubs; uvhub++)
  1493. if (uv_blade_nr_possible_cpus(uvhub) &&
  1494. (uv_blade_to_pnode(uvhub) < uv_partition_base_pnode))
  1495. uv_partition_base_pnode = uv_blade_to_pnode(uvhub);
  1496. vector = UV_BAU_MESSAGE;
  1497. for_each_possible_blade(uvhub)
  1498. if (uv_blade_nr_possible_cpus(uvhub))
  1499. uv_init_uvhub(uvhub, vector);
  1500. uv_enable_timeouts();
  1501. alloc_intr_gate(vector, uv_bau_message_intr1);
  1502. for_each_possible_blade(uvhub) {
  1503. pnode = uv_blade_to_pnode(uvhub);
  1504. /* INIT the bau */
  1505. uv_write_global_mmr64(pnode, UVH_LB_BAU_SB_ACTIVATION_CONTROL,
  1506. ((unsigned long)1 << 63));
  1507. mmr = 1; /* should be 1 to broadcast to both sockets */
  1508. uv_write_global_mmr64(pnode, UVH_BAU_DATA_BROADCAST, mmr);
  1509. }
  1510. return 0;
  1511. }
  1512. core_initcall(uv_bau_init);
  1513. fs_initcall(uv_ptc_init);