ak4642.c 13 KB

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  1. /*
  2. * ak4642.c -- AK4642/AK4643 ALSA Soc Audio driver
  3. *
  4. * Copyright (C) 2009 Renesas Solutions Corp.
  5. * Kuninori Morimoto <morimoto.kuninori@renesas.com>
  6. *
  7. * Based on wm8731.c by Richard Purdie
  8. * Based on ak4535.c by Richard Purdie
  9. * Based on wm8753.c by Liam Girdwood
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. /* ** CAUTION **
  16. *
  17. * This is very simple driver.
  18. * It can use headphone output / stereo input only
  19. *
  20. * AK4642 is tested.
  21. * AK4643 is tested.
  22. */
  23. #include <linux/delay.h>
  24. #include <linux/i2c.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/slab.h>
  27. #include <linux/module.h>
  28. #include <sound/soc.h>
  29. #include <sound/initval.h>
  30. #include <sound/tlv.h>
  31. #define AK4642_VERSION "0.0.1"
  32. #define PW_MGMT1 0x00
  33. #define PW_MGMT2 0x01
  34. #define SG_SL1 0x02
  35. #define SG_SL2 0x03
  36. #define MD_CTL1 0x04
  37. #define MD_CTL2 0x05
  38. #define TIMER 0x06
  39. #define ALC_CTL1 0x07
  40. #define ALC_CTL2 0x08
  41. #define L_IVC 0x09
  42. #define L_DVC 0x0a
  43. #define ALC_CTL3 0x0b
  44. #define R_IVC 0x0c
  45. #define R_DVC 0x0d
  46. #define MD_CTL3 0x0e
  47. #define MD_CTL4 0x0f
  48. #define PW_MGMT3 0x10
  49. #define DF_S 0x11
  50. #define FIL3_0 0x12
  51. #define FIL3_1 0x13
  52. #define FIL3_2 0x14
  53. #define FIL3_3 0x15
  54. #define EQ_0 0x16
  55. #define EQ_1 0x17
  56. #define EQ_2 0x18
  57. #define EQ_3 0x19
  58. #define EQ_4 0x1a
  59. #define EQ_5 0x1b
  60. #define FIL1_0 0x1c
  61. #define FIL1_1 0x1d
  62. #define FIL1_2 0x1e
  63. #define FIL1_3 0x1f
  64. #define PW_MGMT4 0x20
  65. #define MD_CTL5 0x21
  66. #define LO_MS 0x22
  67. #define HP_MS 0x23
  68. #define SPK_MS 0x24
  69. #define AK4642_CACHEREGNUM 0x25
  70. /* PW_MGMT1*/
  71. #define PMVCM (1 << 6) /* VCOM Power Management */
  72. #define PMMIN (1 << 5) /* MIN Input Power Management */
  73. #define PMDAC (1 << 2) /* DAC Power Management */
  74. #define PMADL (1 << 0) /* MIC Amp Lch and ADC Lch Power Management */
  75. /* PW_MGMT2 */
  76. #define HPMTN (1 << 6)
  77. #define PMHPL (1 << 5)
  78. #define PMHPR (1 << 4)
  79. #define MS (1 << 3) /* master/slave select */
  80. #define MCKO (1 << 1)
  81. #define PMPLL (1 << 0)
  82. #define PMHP_MASK (PMHPL | PMHPR)
  83. #define PMHP PMHP_MASK
  84. /* PW_MGMT3 */
  85. #define PMADR (1 << 0) /* MIC L / ADC R Power Management */
  86. /* SG_SL1 */
  87. #define MINS (1 << 6) /* Switch from MIN to Speaker */
  88. #define DACL (1 << 4) /* Switch from DAC to Stereo or Receiver */
  89. #define PMMP (1 << 2) /* MPWR pin Power Management */
  90. #define MGAIN0 (1 << 0) /* MIC amp gain*/
  91. /* TIMER */
  92. #define ZTM(param) ((param & 0x3) << 4) /* ALC Zoro Crossing TimeOut */
  93. #define WTM(param) (((param & 0x4) << 4) | ((param & 0x3) << 2))
  94. /* ALC_CTL1 */
  95. #define ALC (1 << 5) /* ALC Enable */
  96. #define LMTH0 (1 << 0) /* ALC Limiter / Recovery Level */
  97. /* MD_CTL1 */
  98. #define PLL3 (1 << 7)
  99. #define PLL2 (1 << 6)
  100. #define PLL1 (1 << 5)
  101. #define PLL0 (1 << 4)
  102. #define PLL_MASK (PLL3 | PLL2 | PLL1 | PLL0)
  103. #define BCKO_MASK (1 << 3)
  104. #define BCKO_64 BCKO_MASK
  105. #define DIF_MASK (3 << 0)
  106. #define DSP (0 << 0)
  107. #define RIGHT_J (1 << 0)
  108. #define LEFT_J (2 << 0)
  109. #define I2S (3 << 0)
  110. /* MD_CTL2 */
  111. #define FS0 (1 << 0)
  112. #define FS1 (1 << 1)
  113. #define FS2 (1 << 2)
  114. #define FS3 (1 << 5)
  115. #define FS_MASK (FS0 | FS1 | FS2 | FS3)
  116. /* MD_CTL3 */
  117. #define BST1 (1 << 3)
  118. /* MD_CTL4 */
  119. #define DACH (1 << 0)
  120. /*
  121. * Playback Volume (table 39)
  122. *
  123. * max : 0x00 : +12.0 dB
  124. * ( 0.5 dB step )
  125. * min : 0xFE : -115.0 dB
  126. * mute: 0xFF
  127. */
  128. static const DECLARE_TLV_DB_SCALE(out_tlv, -11500, 50, 1);
  129. static const struct snd_kcontrol_new ak4642_snd_controls[] = {
  130. SOC_DOUBLE_R_TLV("Digital Playback Volume", L_DVC, R_DVC,
  131. 0, 0xFF, 1, out_tlv),
  132. SOC_SINGLE("Headphone Switch", PW_MGMT2, 6, 1, 0),
  133. };
  134. static const struct snd_kcontrol_new ak4642_hpout_mixer_controls[] = {
  135. SOC_DAPM_SINGLE("DACH", MD_CTL4, 0, 1, 0),
  136. };
  137. static const struct snd_kcontrol_new ak4642_lout_mixer_controls[] = {
  138. SOC_DAPM_SINGLE("DACL", SG_SL1, 4, 1, 0),
  139. };
  140. static const struct snd_soc_dapm_widget ak4642_dapm_widgets[] = {
  141. /* Outputs */
  142. SND_SOC_DAPM_OUTPUT("HPOUTL"),
  143. SND_SOC_DAPM_OUTPUT("HPOUTR"),
  144. SND_SOC_DAPM_OUTPUT("LINEOUT"),
  145. SND_SOC_DAPM_MIXER("HPOUTL Mixer", PW_MGMT2, 5, 0,
  146. &ak4642_hpout_mixer_controls[0],
  147. ARRAY_SIZE(ak4642_hpout_mixer_controls)),
  148. SND_SOC_DAPM_MIXER("HPOUTR Mixer", PW_MGMT2, 4, 0,
  149. &ak4642_hpout_mixer_controls[0],
  150. ARRAY_SIZE(ak4642_hpout_mixer_controls)),
  151. SND_SOC_DAPM_MIXER("LINEOUT Mixer", PW_MGMT1, 3, 0,
  152. &ak4642_lout_mixer_controls[0],
  153. ARRAY_SIZE(ak4642_lout_mixer_controls)),
  154. /* DAC */
  155. SND_SOC_DAPM_DAC("DAC", "HiFi Playback", PW_MGMT1, 2, 0),
  156. };
  157. static const struct snd_soc_dapm_route ak4642_intercon[] = {
  158. /* Outputs */
  159. {"HPOUTL", NULL, "HPOUTL Mixer"},
  160. {"HPOUTR", NULL, "HPOUTR Mixer"},
  161. {"LINEOUT", NULL, "LINEOUT Mixer"},
  162. {"HPOUTL Mixer", "DACH", "DAC"},
  163. {"HPOUTR Mixer", "DACH", "DAC"},
  164. {"LINEOUT Mixer", "DACL", "DAC"},
  165. };
  166. /* codec private data */
  167. struct ak4642_priv {
  168. unsigned int sysclk;
  169. enum snd_soc_control_type control_type;
  170. };
  171. /*
  172. * ak4642 register cache
  173. */
  174. static const u8 ak4642_reg[AK4642_CACHEREGNUM] = {
  175. 0x00, 0x00, 0x01, 0x00,
  176. 0x02, 0x00, 0x00, 0x00,
  177. 0xe1, 0xe1, 0x18, 0x00,
  178. 0xe1, 0x18, 0x11, 0x08,
  179. 0x00, 0x00, 0x00, 0x00,
  180. 0x00, 0x00, 0x00, 0x00,
  181. 0x00, 0x00, 0x00, 0x00,
  182. 0x00, 0x00, 0x00, 0x00,
  183. 0x00, 0x00, 0x00, 0x00,
  184. 0x00,
  185. };
  186. static int ak4642_dai_startup(struct snd_pcm_substream *substream,
  187. struct snd_soc_dai *dai)
  188. {
  189. int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
  190. struct snd_soc_codec *codec = dai->codec;
  191. if (is_play) {
  192. /*
  193. * start headphone output
  194. *
  195. * PLL, Master Mode
  196. * Audio I/F Format :MSB justified (ADC & DAC)
  197. * Bass Boost Level : Middle
  198. *
  199. * This operation came from example code of
  200. * "ASAHI KASEI AK4642" (japanese) manual p97.
  201. */
  202. snd_soc_write(codec, L_IVC, 0x91); /* volume */
  203. snd_soc_write(codec, R_IVC, 0x91); /* volume */
  204. } else {
  205. /*
  206. * start stereo input
  207. *
  208. * PLL Master Mode
  209. * Audio I/F Format:MSB justified (ADC & DAC)
  210. * Pre MIC AMP:+20dB
  211. * MIC Power On
  212. * ALC setting:Refer to Table 35
  213. * ALC bit=“1”
  214. *
  215. * This operation came from example code of
  216. * "ASAHI KASEI AK4642" (japanese) manual p94.
  217. */
  218. snd_soc_write(codec, SG_SL1, PMMP | MGAIN0);
  219. snd_soc_write(codec, TIMER, ZTM(0x3) | WTM(0x3));
  220. snd_soc_write(codec, ALC_CTL1, ALC | LMTH0);
  221. snd_soc_update_bits(codec, PW_MGMT1, PMADL, PMADL);
  222. snd_soc_update_bits(codec, PW_MGMT3, PMADR, PMADR);
  223. }
  224. return 0;
  225. }
  226. static void ak4642_dai_shutdown(struct snd_pcm_substream *substream,
  227. struct snd_soc_dai *dai)
  228. {
  229. int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
  230. struct snd_soc_codec *codec = dai->codec;
  231. if (is_play) {
  232. } else {
  233. /* stop stereo input */
  234. snd_soc_update_bits(codec, PW_MGMT1, PMADL, 0);
  235. snd_soc_update_bits(codec, PW_MGMT3, PMADR, 0);
  236. snd_soc_update_bits(codec, ALC_CTL1, ALC, 0);
  237. }
  238. }
  239. static int ak4642_dai_set_sysclk(struct snd_soc_dai *codec_dai,
  240. int clk_id, unsigned int freq, int dir)
  241. {
  242. struct snd_soc_codec *codec = codec_dai->codec;
  243. u8 pll;
  244. switch (freq) {
  245. case 11289600:
  246. pll = PLL2;
  247. break;
  248. case 12288000:
  249. pll = PLL2 | PLL0;
  250. break;
  251. case 12000000:
  252. pll = PLL2 | PLL1;
  253. break;
  254. case 24000000:
  255. pll = PLL2 | PLL1 | PLL0;
  256. break;
  257. case 13500000:
  258. pll = PLL3 | PLL2;
  259. break;
  260. case 27000000:
  261. pll = PLL3 | PLL2 | PLL0;
  262. break;
  263. default:
  264. return -EINVAL;
  265. }
  266. snd_soc_update_bits(codec, MD_CTL1, PLL_MASK, pll);
  267. return 0;
  268. }
  269. static int ak4642_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
  270. {
  271. struct snd_soc_codec *codec = dai->codec;
  272. u8 data;
  273. u8 bcko;
  274. data = MCKO | PMPLL; /* use MCKO */
  275. bcko = 0;
  276. /* set master/slave audio interface */
  277. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  278. case SND_SOC_DAIFMT_CBM_CFM:
  279. data |= MS;
  280. bcko = BCKO_64;
  281. break;
  282. case SND_SOC_DAIFMT_CBS_CFS:
  283. break;
  284. default:
  285. return -EINVAL;
  286. }
  287. snd_soc_update_bits(codec, PW_MGMT2, MS | MCKO | PMPLL, data);
  288. snd_soc_update_bits(codec, MD_CTL1, BCKO_MASK, bcko);
  289. /* format type */
  290. data = 0;
  291. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  292. case SND_SOC_DAIFMT_LEFT_J:
  293. data = LEFT_J;
  294. break;
  295. case SND_SOC_DAIFMT_I2S:
  296. data = I2S;
  297. break;
  298. /* FIXME
  299. * Please add RIGHT_J / DSP support here
  300. */
  301. default:
  302. return -EINVAL;
  303. break;
  304. }
  305. snd_soc_update_bits(codec, MD_CTL1, DIF_MASK, data);
  306. return 0;
  307. }
  308. static int ak4642_dai_hw_params(struct snd_pcm_substream *substream,
  309. struct snd_pcm_hw_params *params,
  310. struct snd_soc_dai *dai)
  311. {
  312. struct snd_soc_codec *codec = dai->codec;
  313. u8 rate;
  314. switch (params_rate(params)) {
  315. case 7350:
  316. rate = FS2;
  317. break;
  318. case 8000:
  319. rate = 0;
  320. break;
  321. case 11025:
  322. rate = FS2 | FS0;
  323. break;
  324. case 12000:
  325. rate = FS0;
  326. break;
  327. case 14700:
  328. rate = FS2 | FS1;
  329. break;
  330. case 16000:
  331. rate = FS1;
  332. break;
  333. case 22050:
  334. rate = FS2 | FS1 | FS0;
  335. break;
  336. case 24000:
  337. rate = FS1 | FS0;
  338. break;
  339. case 29400:
  340. rate = FS3 | FS2 | FS1;
  341. break;
  342. case 32000:
  343. rate = FS3 | FS1;
  344. break;
  345. case 44100:
  346. rate = FS3 | FS2 | FS1 | FS0;
  347. break;
  348. case 48000:
  349. rate = FS3 | FS1 | FS0;
  350. break;
  351. default:
  352. return -EINVAL;
  353. break;
  354. }
  355. snd_soc_update_bits(codec, MD_CTL2, FS_MASK, rate);
  356. return 0;
  357. }
  358. static int ak4642_set_bias_level(struct snd_soc_codec *codec,
  359. enum snd_soc_bias_level level)
  360. {
  361. switch (level) {
  362. case SND_SOC_BIAS_OFF:
  363. snd_soc_write(codec, PW_MGMT1, 0x00);
  364. break;
  365. default:
  366. snd_soc_update_bits(codec, PW_MGMT1, PMVCM, PMVCM);
  367. break;
  368. }
  369. codec->dapm.bias_level = level;
  370. return 0;
  371. }
  372. static struct snd_soc_dai_ops ak4642_dai_ops = {
  373. .startup = ak4642_dai_startup,
  374. .shutdown = ak4642_dai_shutdown,
  375. .set_sysclk = ak4642_dai_set_sysclk,
  376. .set_fmt = ak4642_dai_set_fmt,
  377. .hw_params = ak4642_dai_hw_params,
  378. };
  379. static struct snd_soc_dai_driver ak4642_dai = {
  380. .name = "ak4642-hifi",
  381. .playback = {
  382. .stream_name = "Playback",
  383. .channels_min = 1,
  384. .channels_max = 2,
  385. .rates = SNDRV_PCM_RATE_8000_48000,
  386. .formats = SNDRV_PCM_FMTBIT_S16_LE },
  387. .capture = {
  388. .stream_name = "Capture",
  389. .channels_min = 1,
  390. .channels_max = 2,
  391. .rates = SNDRV_PCM_RATE_8000_48000,
  392. .formats = SNDRV_PCM_FMTBIT_S16_LE },
  393. .ops = &ak4642_dai_ops,
  394. .symmetric_rates = 1,
  395. };
  396. static int ak4642_resume(struct snd_soc_codec *codec)
  397. {
  398. snd_soc_cache_sync(codec);
  399. return 0;
  400. }
  401. static int ak4642_probe(struct snd_soc_codec *codec)
  402. {
  403. struct ak4642_priv *ak4642 = snd_soc_codec_get_drvdata(codec);
  404. int ret;
  405. dev_info(codec->dev, "AK4642 Audio Codec %s", AK4642_VERSION);
  406. ret = snd_soc_codec_set_cache_io(codec, 8, 8, ak4642->control_type);
  407. if (ret < 0) {
  408. dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
  409. return ret;
  410. }
  411. snd_soc_add_controls(codec, ak4642_snd_controls,
  412. ARRAY_SIZE(ak4642_snd_controls));
  413. ak4642_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  414. return 0;
  415. }
  416. static int ak4642_remove(struct snd_soc_codec *codec)
  417. {
  418. ak4642_set_bias_level(codec, SND_SOC_BIAS_OFF);
  419. return 0;
  420. }
  421. static struct snd_soc_codec_driver soc_codec_dev_ak4642 = {
  422. .probe = ak4642_probe,
  423. .remove = ak4642_remove,
  424. .resume = ak4642_resume,
  425. .set_bias_level = ak4642_set_bias_level,
  426. .reg_cache_size = ARRAY_SIZE(ak4642_reg),
  427. .reg_word_size = sizeof(u8),
  428. .reg_cache_default = ak4642_reg,
  429. .dapm_widgets = ak4642_dapm_widgets,
  430. .num_dapm_widgets = ARRAY_SIZE(ak4642_dapm_widgets),
  431. .dapm_routes = ak4642_intercon,
  432. .num_dapm_routes = ARRAY_SIZE(ak4642_intercon),
  433. };
  434. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  435. static __devinit int ak4642_i2c_probe(struct i2c_client *i2c,
  436. const struct i2c_device_id *id)
  437. {
  438. struct ak4642_priv *ak4642;
  439. int ret;
  440. ak4642 = kzalloc(sizeof(struct ak4642_priv), GFP_KERNEL);
  441. if (!ak4642)
  442. return -ENOMEM;
  443. i2c_set_clientdata(i2c, ak4642);
  444. ak4642->control_type = SND_SOC_I2C;
  445. ret = snd_soc_register_codec(&i2c->dev,
  446. &soc_codec_dev_ak4642, &ak4642_dai, 1);
  447. if (ret < 0)
  448. kfree(ak4642);
  449. return ret;
  450. }
  451. static __devexit int ak4642_i2c_remove(struct i2c_client *client)
  452. {
  453. snd_soc_unregister_codec(&client->dev);
  454. kfree(i2c_get_clientdata(client));
  455. return 0;
  456. }
  457. static const struct i2c_device_id ak4642_i2c_id[] = {
  458. { "ak4642", 0 },
  459. { "ak4643", 0 },
  460. { }
  461. };
  462. MODULE_DEVICE_TABLE(i2c, ak4642_i2c_id);
  463. static struct i2c_driver ak4642_i2c_driver = {
  464. .driver = {
  465. .name = "ak4642-codec",
  466. .owner = THIS_MODULE,
  467. },
  468. .probe = ak4642_i2c_probe,
  469. .remove = __devexit_p(ak4642_i2c_remove),
  470. .id_table = ak4642_i2c_id,
  471. };
  472. #endif
  473. static int __init ak4642_modinit(void)
  474. {
  475. int ret = 0;
  476. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  477. ret = i2c_add_driver(&ak4642_i2c_driver);
  478. #endif
  479. return ret;
  480. }
  481. module_init(ak4642_modinit);
  482. static void __exit ak4642_exit(void)
  483. {
  484. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  485. i2c_del_driver(&ak4642_i2c_driver);
  486. #endif
  487. }
  488. module_exit(ak4642_exit);
  489. MODULE_DESCRIPTION("Soc AK4642 driver");
  490. MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
  491. MODULE_LICENSE("GPL");