qla_init.c 141 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/slab.h>
  11. #include <linux/vmalloc.h>
  12. #include "qla_devtbl.h"
  13. #ifdef CONFIG_SPARC
  14. #include <asm/prom.h>
  15. #endif
  16. /*
  17. * QLogic ISP2x00 Hardware Support Function Prototypes.
  18. */
  19. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  20. static int qla2x00_setup_chip(scsi_qla_host_t *);
  21. static int qla2x00_init_rings(scsi_qla_host_t *);
  22. static int qla2x00_fw_ready(scsi_qla_host_t *);
  23. static int qla2x00_configure_hba(scsi_qla_host_t *);
  24. static int qla2x00_configure_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  26. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  27. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  28. static int qla2x00_device_resync(scsi_qla_host_t *);
  29. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  30. uint16_t *);
  31. static int qla2x00_restart_isp(scsi_qla_host_t *);
  32. static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *);
  33. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  34. static int qla84xx_init_chip(scsi_qla_host_t *);
  35. static int qla25xx_init_queues(struct qla_hw_data *);
  36. /* SRB Extensions ---------------------------------------------------------- */
  37. static void
  38. qla2x00_ctx_sp_timeout(unsigned long __data)
  39. {
  40. srb_t *sp = (srb_t *)__data;
  41. struct srb_ctx *ctx;
  42. struct srb_iocb *iocb;
  43. fc_port_t *fcport = sp->fcport;
  44. struct qla_hw_data *ha = fcport->vha->hw;
  45. struct req_que *req;
  46. unsigned long flags;
  47. spin_lock_irqsave(&ha->hardware_lock, flags);
  48. req = ha->req_q_map[0];
  49. req->outstanding_cmds[sp->handle] = NULL;
  50. ctx = sp->ctx;
  51. iocb = ctx->u.iocb_cmd;
  52. iocb->timeout(sp);
  53. iocb->free(sp);
  54. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  55. }
  56. void
  57. qla2x00_ctx_sp_free(srb_t *sp)
  58. {
  59. struct srb_ctx *ctx = sp->ctx;
  60. struct srb_iocb *iocb = ctx->u.iocb_cmd;
  61. del_timer_sync(&iocb->timer);
  62. kfree(iocb);
  63. kfree(ctx);
  64. mempool_free(sp, sp->fcport->vha->hw->srb_mempool);
  65. }
  66. inline srb_t *
  67. qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size,
  68. unsigned long tmo)
  69. {
  70. srb_t *sp;
  71. struct qla_hw_data *ha = vha->hw;
  72. struct srb_ctx *ctx;
  73. struct srb_iocb *iocb;
  74. sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL);
  75. if (!sp)
  76. goto done;
  77. ctx = kzalloc(size, GFP_KERNEL);
  78. if (!ctx) {
  79. mempool_free(sp, ha->srb_mempool);
  80. sp = NULL;
  81. goto done;
  82. }
  83. iocb = kzalloc(sizeof(struct srb_iocb), GFP_KERNEL);
  84. if (!iocb) {
  85. mempool_free(sp, ha->srb_mempool);
  86. sp = NULL;
  87. kfree(ctx);
  88. goto done;
  89. }
  90. memset(sp, 0, sizeof(*sp));
  91. sp->fcport = fcport;
  92. sp->ctx = ctx;
  93. ctx->u.iocb_cmd = iocb;
  94. iocb->free = qla2x00_ctx_sp_free;
  95. init_timer(&iocb->timer);
  96. if (!tmo)
  97. goto done;
  98. iocb->timer.expires = jiffies + tmo * HZ;
  99. iocb->timer.data = (unsigned long)sp;
  100. iocb->timer.function = qla2x00_ctx_sp_timeout;
  101. add_timer(&iocb->timer);
  102. done:
  103. return sp;
  104. }
  105. /* Asynchronous Login/Logout Routines -------------------------------------- */
  106. static inline unsigned long
  107. qla2x00_get_async_timeout(struct scsi_qla_host *vha)
  108. {
  109. unsigned long tmo;
  110. struct qla_hw_data *ha = vha->hw;
  111. /* Firmware should use switch negotiated r_a_tov for timeout. */
  112. tmo = ha->r_a_tov / 10 * 2;
  113. if (!IS_FWI2_CAPABLE(ha)) {
  114. /*
  115. * Except for earlier ISPs where the timeout is seeded from the
  116. * initialization control block.
  117. */
  118. tmo = ha->login_timeout;
  119. }
  120. return tmo;
  121. }
  122. static void
  123. qla2x00_async_iocb_timeout(srb_t *sp)
  124. {
  125. fc_port_t *fcport = sp->fcport;
  126. struct srb_ctx *ctx = sp->ctx;
  127. DEBUG2(printk(KERN_WARNING
  128. "scsi(%ld:%x): Async-%s timeout - portid=%02x%02x%02x.\n",
  129. fcport->vha->host_no, sp->handle,
  130. ctx->name, fcport->d_id.b.domain,
  131. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  132. fcport->flags &= ~FCF_ASYNC_SENT;
  133. if (ctx->type == SRB_LOGIN_CMD) {
  134. struct srb_iocb *lio = ctx->u.iocb_cmd;
  135. qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
  136. /* Retry as needed. */
  137. lio->u.logio.data[0] = MBS_COMMAND_ERROR;
  138. lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
  139. QLA_LOGIO_LOGIN_RETRIED : 0;
  140. qla2x00_post_async_login_done_work(fcport->vha, fcport,
  141. lio->u.logio.data);
  142. }
  143. }
  144. static void
  145. qla2x00_async_login_ctx_done(srb_t *sp)
  146. {
  147. struct srb_ctx *ctx = sp->ctx;
  148. struct srb_iocb *lio = ctx->u.iocb_cmd;
  149. qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport,
  150. lio->u.logio.data);
  151. lio->free(sp);
  152. }
  153. int
  154. qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
  155. uint16_t *data)
  156. {
  157. srb_t *sp;
  158. struct srb_ctx *ctx;
  159. struct srb_iocb *lio;
  160. int rval;
  161. rval = QLA_FUNCTION_FAILED;
  162. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  163. qla2x00_get_async_timeout(vha) + 2);
  164. if (!sp)
  165. goto done;
  166. ctx = sp->ctx;
  167. ctx->type = SRB_LOGIN_CMD;
  168. ctx->name = "login";
  169. lio = ctx->u.iocb_cmd;
  170. lio->timeout = qla2x00_async_iocb_timeout;
  171. lio->done = qla2x00_async_login_ctx_done;
  172. lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
  173. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  174. lio->u.logio.flags |= SRB_LOGIN_RETRIED;
  175. rval = qla2x00_start_sp(sp);
  176. if (rval != QLA_SUCCESS)
  177. goto done_free_sp;
  178. DEBUG2(printk(KERN_DEBUG
  179. "scsi(%ld:%x): Async-login - loop-id=%x portid=%02x%02x%02x "
  180. "retries=%d.\n", fcport->vha->host_no, sp->handle, fcport->loop_id,
  181. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
  182. fcport->login_retry));
  183. return rval;
  184. done_free_sp:
  185. lio->free(sp);
  186. done:
  187. return rval;
  188. }
  189. static void
  190. qla2x00_async_logout_ctx_done(srb_t *sp)
  191. {
  192. struct srb_ctx *ctx = sp->ctx;
  193. struct srb_iocb *lio = ctx->u.iocb_cmd;
  194. qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport,
  195. lio->u.logio.data);
  196. lio->free(sp);
  197. }
  198. int
  199. qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
  200. {
  201. srb_t *sp;
  202. struct srb_ctx *ctx;
  203. struct srb_iocb *lio;
  204. int rval;
  205. rval = QLA_FUNCTION_FAILED;
  206. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  207. qla2x00_get_async_timeout(vha) + 2);
  208. if (!sp)
  209. goto done;
  210. ctx = sp->ctx;
  211. ctx->type = SRB_LOGOUT_CMD;
  212. ctx->name = "logout";
  213. lio = ctx->u.iocb_cmd;
  214. lio->timeout = qla2x00_async_iocb_timeout;
  215. lio->done = qla2x00_async_logout_ctx_done;
  216. rval = qla2x00_start_sp(sp);
  217. if (rval != QLA_SUCCESS)
  218. goto done_free_sp;
  219. DEBUG2(printk(KERN_DEBUG
  220. "scsi(%ld:%x): Async-logout - loop-id=%x portid=%02x%02x%02x.\n",
  221. fcport->vha->host_no, sp->handle, fcport->loop_id,
  222. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  223. return rval;
  224. done_free_sp:
  225. lio->free(sp);
  226. done:
  227. return rval;
  228. }
  229. static void
  230. qla2x00_async_adisc_ctx_done(srb_t *sp)
  231. {
  232. struct srb_ctx *ctx = sp->ctx;
  233. struct srb_iocb *lio = ctx->u.iocb_cmd;
  234. qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport,
  235. lio->u.logio.data);
  236. lio->free(sp);
  237. }
  238. int
  239. qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
  240. uint16_t *data)
  241. {
  242. srb_t *sp;
  243. struct srb_ctx *ctx;
  244. struct srb_iocb *lio;
  245. int rval;
  246. rval = QLA_FUNCTION_FAILED;
  247. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  248. qla2x00_get_async_timeout(vha) + 2);
  249. if (!sp)
  250. goto done;
  251. ctx = sp->ctx;
  252. ctx->type = SRB_ADISC_CMD;
  253. ctx->name = "adisc";
  254. lio = ctx->u.iocb_cmd;
  255. lio->timeout = qla2x00_async_iocb_timeout;
  256. lio->done = qla2x00_async_adisc_ctx_done;
  257. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  258. lio->u.logio.flags |= SRB_LOGIN_RETRIED;
  259. rval = qla2x00_start_sp(sp);
  260. if (rval != QLA_SUCCESS)
  261. goto done_free_sp;
  262. DEBUG2(printk(KERN_DEBUG
  263. "scsi(%ld:%x): Async-adisc - loop-id=%x portid=%02x%02x%02x.\n",
  264. fcport->vha->host_no, sp->handle, fcport->loop_id,
  265. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  266. return rval;
  267. done_free_sp:
  268. lio->free(sp);
  269. done:
  270. return rval;
  271. }
  272. static void
  273. qla2x00_async_tm_cmd_ctx_done(srb_t *sp)
  274. {
  275. struct srb_ctx *ctx = sp->ctx;
  276. struct srb_iocb *iocb = (struct srb_iocb *)ctx->u.iocb_cmd;
  277. qla2x00_async_tm_cmd_done(sp->fcport->vha, sp->fcport, iocb);
  278. iocb->free(sp);
  279. }
  280. int
  281. qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
  282. uint32_t tag)
  283. {
  284. struct scsi_qla_host *vha = fcport->vha;
  285. srb_t *sp;
  286. struct srb_ctx *ctx;
  287. struct srb_iocb *tcf;
  288. int rval;
  289. rval = QLA_FUNCTION_FAILED;
  290. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  291. qla2x00_get_async_timeout(vha) + 2);
  292. if (!sp)
  293. goto done;
  294. ctx = sp->ctx;
  295. ctx->type = SRB_TM_CMD;
  296. ctx->name = "tmf";
  297. tcf = ctx->u.iocb_cmd;
  298. tcf->u.tmf.flags = flags;
  299. tcf->u.tmf.lun = lun;
  300. tcf->u.tmf.data = tag;
  301. tcf->timeout = qla2x00_async_iocb_timeout;
  302. tcf->done = qla2x00_async_tm_cmd_ctx_done;
  303. rval = qla2x00_start_sp(sp);
  304. if (rval != QLA_SUCCESS)
  305. goto done_free_sp;
  306. DEBUG2(printk(KERN_DEBUG
  307. "scsi(%ld:%x): Async-tmf - loop-id=%x portid=%02x%02x%02x.\n",
  308. fcport->vha->host_no, sp->handle, fcport->loop_id,
  309. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  310. return rval;
  311. done_free_sp:
  312. tcf->free(sp);
  313. done:
  314. return rval;
  315. }
  316. void
  317. qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  318. uint16_t *data)
  319. {
  320. int rval;
  321. switch (data[0]) {
  322. case MBS_COMMAND_COMPLETE:
  323. if (fcport->flags & FCF_FCP2_DEVICE) {
  324. fcport->flags |= FCF_ASYNC_SENT;
  325. qla2x00_post_async_adisc_work(vha, fcport, data);
  326. break;
  327. }
  328. qla2x00_update_fcport(vha, fcport);
  329. break;
  330. case MBS_COMMAND_ERROR:
  331. fcport->flags &= ~FCF_ASYNC_SENT;
  332. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  333. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  334. else
  335. qla2x00_mark_device_lost(vha, fcport, 1, 1);
  336. break;
  337. case MBS_PORT_ID_USED:
  338. fcport->loop_id = data[1];
  339. qla2x00_post_async_logout_work(vha, fcport, NULL);
  340. qla2x00_post_async_login_work(vha, fcport, NULL);
  341. break;
  342. case MBS_LOOP_ID_USED:
  343. fcport->loop_id++;
  344. rval = qla2x00_find_new_loop_id(vha, fcport);
  345. if (rval != QLA_SUCCESS) {
  346. fcport->flags &= ~FCF_ASYNC_SENT;
  347. qla2x00_mark_device_lost(vha, fcport, 1, 1);
  348. break;
  349. }
  350. qla2x00_post_async_login_work(vha, fcport, NULL);
  351. break;
  352. }
  353. return;
  354. }
  355. void
  356. qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  357. uint16_t *data)
  358. {
  359. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  360. return;
  361. }
  362. void
  363. qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  364. uint16_t *data)
  365. {
  366. if (data[0] == MBS_COMMAND_COMPLETE) {
  367. qla2x00_update_fcport(vha, fcport);
  368. return;
  369. }
  370. /* Retry login. */
  371. fcport->flags &= ~FCF_ASYNC_SENT;
  372. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  373. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  374. else
  375. qla2x00_mark_device_lost(vha, fcport, 1, 1);
  376. return;
  377. }
  378. void
  379. qla2x00_async_tm_cmd_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  380. struct srb_iocb *iocb)
  381. {
  382. int rval;
  383. uint32_t flags;
  384. uint16_t lun;
  385. flags = iocb->u.tmf.flags;
  386. lun = (uint16_t)iocb->u.tmf.lun;
  387. /* Issue Marker IOCB */
  388. rval = qla2x00_marker(vha, vha->hw->req_q_map[0],
  389. vha->hw->rsp_q_map[0], fcport->loop_id, lun,
  390. flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
  391. if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) {
  392. DEBUG2_3_11(printk(KERN_WARNING
  393. "%s(%ld): TM IOCB failed (%x).\n",
  394. __func__, vha->host_no, rval));
  395. }
  396. return;
  397. }
  398. /****************************************************************************/
  399. /* QLogic ISP2x00 Hardware Support Functions. */
  400. /****************************************************************************/
  401. /*
  402. * qla2x00_initialize_adapter
  403. * Initialize board.
  404. *
  405. * Input:
  406. * ha = adapter block pointer.
  407. *
  408. * Returns:
  409. * 0 = success
  410. */
  411. int
  412. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  413. {
  414. int rval;
  415. struct qla_hw_data *ha = vha->hw;
  416. struct req_que *req = ha->req_q_map[0];
  417. /* Clear adapter flags. */
  418. vha->flags.online = 0;
  419. ha->flags.chip_reset_done = 0;
  420. vha->flags.reset_active = 0;
  421. ha->flags.pci_channel_io_perm_failure = 0;
  422. ha->flags.eeh_busy = 0;
  423. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  424. atomic_set(&vha->loop_state, LOOP_DOWN);
  425. vha->device_flags = DFLG_NO_CABLE;
  426. vha->dpc_flags = 0;
  427. vha->flags.management_server_logged_in = 0;
  428. vha->marker_needed = 0;
  429. ha->isp_abort_cnt = 0;
  430. ha->beacon_blink_led = 0;
  431. set_bit(0, ha->req_qid_map);
  432. set_bit(0, ha->rsp_qid_map);
  433. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  434. rval = ha->isp_ops->pci_config(vha);
  435. if (rval) {
  436. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  437. vha->host_no));
  438. return (rval);
  439. }
  440. ha->isp_ops->reset_chip(vha);
  441. rval = qla2xxx_get_flash_info(vha);
  442. if (rval) {
  443. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  444. vha->host_no));
  445. return (rval);
  446. }
  447. ha->isp_ops->get_flash_version(vha, req->ring);
  448. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  449. ha->isp_ops->nvram_config(vha);
  450. if (ha->flags.disable_serdes) {
  451. /* Mask HBA via NVRAM settings? */
  452. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  453. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  454. vha->port_name[0], vha->port_name[1],
  455. vha->port_name[2], vha->port_name[3],
  456. vha->port_name[4], vha->port_name[5],
  457. vha->port_name[6], vha->port_name[7]);
  458. return QLA_FUNCTION_FAILED;
  459. }
  460. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  461. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  462. rval = ha->isp_ops->chip_diag(vha);
  463. if (rval)
  464. return (rval);
  465. rval = qla2x00_setup_chip(vha);
  466. if (rval)
  467. return (rval);
  468. }
  469. if (IS_QLA84XX(ha)) {
  470. ha->cs84xx = qla84xx_get_chip(vha);
  471. if (!ha->cs84xx) {
  472. qla_printk(KERN_ERR, ha,
  473. "Unable to configure ISP84XX.\n");
  474. return QLA_FUNCTION_FAILED;
  475. }
  476. }
  477. rval = qla2x00_init_rings(vha);
  478. ha->flags.chip_reset_done = 1;
  479. if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
  480. /* Issue verify 84xx FW IOCB to complete 84xx initialization */
  481. rval = qla84xx_init_chip(vha);
  482. if (rval != QLA_SUCCESS) {
  483. qla_printk(KERN_ERR, ha,
  484. "Unable to initialize ISP84XX.\n");
  485. qla84xx_put_chip(vha);
  486. }
  487. }
  488. if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
  489. qla24xx_read_fcp_prio_cfg(vha);
  490. return (rval);
  491. }
  492. /**
  493. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  494. * @ha: HA context
  495. *
  496. * Returns 0 on success.
  497. */
  498. int
  499. qla2100_pci_config(scsi_qla_host_t *vha)
  500. {
  501. uint16_t w;
  502. unsigned long flags;
  503. struct qla_hw_data *ha = vha->hw;
  504. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  505. pci_set_master(ha->pdev);
  506. pci_try_set_mwi(ha->pdev);
  507. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  508. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  509. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  510. pci_disable_rom(ha->pdev);
  511. /* Get PCI bus information. */
  512. spin_lock_irqsave(&ha->hardware_lock, flags);
  513. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  514. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  515. return QLA_SUCCESS;
  516. }
  517. /**
  518. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  519. * @ha: HA context
  520. *
  521. * Returns 0 on success.
  522. */
  523. int
  524. qla2300_pci_config(scsi_qla_host_t *vha)
  525. {
  526. uint16_t w;
  527. unsigned long flags = 0;
  528. uint32_t cnt;
  529. struct qla_hw_data *ha = vha->hw;
  530. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  531. pci_set_master(ha->pdev);
  532. pci_try_set_mwi(ha->pdev);
  533. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  534. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  535. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  536. w &= ~PCI_COMMAND_INTX_DISABLE;
  537. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  538. /*
  539. * If this is a 2300 card and not 2312, reset the
  540. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  541. * the 2310 also reports itself as a 2300 so we need to get the
  542. * fb revision level -- a 6 indicates it really is a 2300 and
  543. * not a 2310.
  544. */
  545. if (IS_QLA2300(ha)) {
  546. spin_lock_irqsave(&ha->hardware_lock, flags);
  547. /* Pause RISC. */
  548. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  549. for (cnt = 0; cnt < 30000; cnt++) {
  550. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  551. break;
  552. udelay(10);
  553. }
  554. /* Select FPM registers. */
  555. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  556. RD_REG_WORD(&reg->ctrl_status);
  557. /* Get the fb rev level */
  558. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  559. if (ha->fb_rev == FPM_2300)
  560. pci_clear_mwi(ha->pdev);
  561. /* Deselect FPM registers. */
  562. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  563. RD_REG_WORD(&reg->ctrl_status);
  564. /* Release RISC module. */
  565. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  566. for (cnt = 0; cnt < 30000; cnt++) {
  567. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  568. break;
  569. udelay(10);
  570. }
  571. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  572. }
  573. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  574. pci_disable_rom(ha->pdev);
  575. /* Get PCI bus information. */
  576. spin_lock_irqsave(&ha->hardware_lock, flags);
  577. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  578. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  579. return QLA_SUCCESS;
  580. }
  581. /**
  582. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  583. * @ha: HA context
  584. *
  585. * Returns 0 on success.
  586. */
  587. int
  588. qla24xx_pci_config(scsi_qla_host_t *vha)
  589. {
  590. uint16_t w;
  591. unsigned long flags = 0;
  592. struct qla_hw_data *ha = vha->hw;
  593. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  594. pci_set_master(ha->pdev);
  595. pci_try_set_mwi(ha->pdev);
  596. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  597. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  598. w &= ~PCI_COMMAND_INTX_DISABLE;
  599. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  600. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  601. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  602. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  603. pcix_set_mmrbc(ha->pdev, 2048);
  604. /* PCIe -- adjust Maximum Read Request Size (2048). */
  605. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  606. pcie_set_readrq(ha->pdev, 2048);
  607. pci_disable_rom(ha->pdev);
  608. ha->chip_revision = ha->pdev->revision;
  609. /* Get PCI bus information. */
  610. spin_lock_irqsave(&ha->hardware_lock, flags);
  611. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  612. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  613. return QLA_SUCCESS;
  614. }
  615. /**
  616. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  617. * @ha: HA context
  618. *
  619. * Returns 0 on success.
  620. */
  621. int
  622. qla25xx_pci_config(scsi_qla_host_t *vha)
  623. {
  624. uint16_t w;
  625. struct qla_hw_data *ha = vha->hw;
  626. pci_set_master(ha->pdev);
  627. pci_try_set_mwi(ha->pdev);
  628. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  629. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  630. w &= ~PCI_COMMAND_INTX_DISABLE;
  631. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  632. /* PCIe -- adjust Maximum Read Request Size (2048). */
  633. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  634. pcie_set_readrq(ha->pdev, 2048);
  635. pci_disable_rom(ha->pdev);
  636. ha->chip_revision = ha->pdev->revision;
  637. return QLA_SUCCESS;
  638. }
  639. /**
  640. * qla2x00_isp_firmware() - Choose firmware image.
  641. * @ha: HA context
  642. *
  643. * Returns 0 on success.
  644. */
  645. static int
  646. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  647. {
  648. int rval;
  649. uint16_t loop_id, topo, sw_cap;
  650. uint8_t domain, area, al_pa;
  651. struct qla_hw_data *ha = vha->hw;
  652. /* Assume loading risc code */
  653. rval = QLA_FUNCTION_FAILED;
  654. if (ha->flags.disable_risc_code_load) {
  655. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  656. vha->host_no));
  657. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  658. /* Verify checksum of loaded RISC code. */
  659. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  660. if (rval == QLA_SUCCESS) {
  661. /* And, verify we are not in ROM code. */
  662. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  663. &area, &domain, &topo, &sw_cap);
  664. }
  665. }
  666. if (rval) {
  667. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  668. vha->host_no));
  669. }
  670. return (rval);
  671. }
  672. /**
  673. * qla2x00_reset_chip() - Reset ISP chip.
  674. * @ha: HA context
  675. *
  676. * Returns 0 on success.
  677. */
  678. void
  679. qla2x00_reset_chip(scsi_qla_host_t *vha)
  680. {
  681. unsigned long flags = 0;
  682. struct qla_hw_data *ha = vha->hw;
  683. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  684. uint32_t cnt;
  685. uint16_t cmd;
  686. if (unlikely(pci_channel_offline(ha->pdev)))
  687. return;
  688. ha->isp_ops->disable_intrs(ha);
  689. spin_lock_irqsave(&ha->hardware_lock, flags);
  690. /* Turn off master enable */
  691. cmd = 0;
  692. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  693. cmd &= ~PCI_COMMAND_MASTER;
  694. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  695. if (!IS_QLA2100(ha)) {
  696. /* Pause RISC. */
  697. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  698. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  699. for (cnt = 0; cnt < 30000; cnt++) {
  700. if ((RD_REG_WORD(&reg->hccr) &
  701. HCCR_RISC_PAUSE) != 0)
  702. break;
  703. udelay(100);
  704. }
  705. } else {
  706. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  707. udelay(10);
  708. }
  709. /* Select FPM registers. */
  710. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  711. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  712. /* FPM Soft Reset. */
  713. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  714. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  715. /* Toggle Fpm Reset. */
  716. if (!IS_QLA2200(ha)) {
  717. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  718. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  719. }
  720. /* Select frame buffer registers. */
  721. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  722. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  723. /* Reset frame buffer FIFOs. */
  724. if (IS_QLA2200(ha)) {
  725. WRT_FB_CMD_REG(ha, reg, 0xa000);
  726. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  727. } else {
  728. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  729. /* Read back fb_cmd until zero or 3 seconds max */
  730. for (cnt = 0; cnt < 3000; cnt++) {
  731. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  732. break;
  733. udelay(100);
  734. }
  735. }
  736. /* Select RISC module registers. */
  737. WRT_REG_WORD(&reg->ctrl_status, 0);
  738. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  739. /* Reset RISC processor. */
  740. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  741. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  742. /* Release RISC processor. */
  743. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  744. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  745. }
  746. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  747. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  748. /* Reset ISP chip. */
  749. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  750. /* Wait for RISC to recover from reset. */
  751. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  752. /*
  753. * It is necessary to for a delay here since the card doesn't
  754. * respond to PCI reads during a reset. On some architectures
  755. * this will result in an MCA.
  756. */
  757. udelay(20);
  758. for (cnt = 30000; cnt; cnt--) {
  759. if ((RD_REG_WORD(&reg->ctrl_status) &
  760. CSR_ISP_SOFT_RESET) == 0)
  761. break;
  762. udelay(100);
  763. }
  764. } else
  765. udelay(10);
  766. /* Reset RISC processor. */
  767. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  768. WRT_REG_WORD(&reg->semaphore, 0);
  769. /* Release RISC processor. */
  770. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  771. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  772. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  773. for (cnt = 0; cnt < 30000; cnt++) {
  774. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  775. break;
  776. udelay(100);
  777. }
  778. } else
  779. udelay(100);
  780. /* Turn on master enable */
  781. cmd |= PCI_COMMAND_MASTER;
  782. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  783. /* Disable RISC pause on FPM parity error. */
  784. if (!IS_QLA2100(ha)) {
  785. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  786. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  787. }
  788. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  789. }
  790. /**
  791. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  792. * @ha: HA context
  793. *
  794. * Returns 0 on success.
  795. */
  796. static inline void
  797. qla24xx_reset_risc(scsi_qla_host_t *vha)
  798. {
  799. unsigned long flags = 0;
  800. struct qla_hw_data *ha = vha->hw;
  801. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  802. uint32_t cnt, d2;
  803. uint16_t wd;
  804. spin_lock_irqsave(&ha->hardware_lock, flags);
  805. /* Reset RISC. */
  806. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  807. for (cnt = 0; cnt < 30000; cnt++) {
  808. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  809. break;
  810. udelay(10);
  811. }
  812. WRT_REG_DWORD(&reg->ctrl_status,
  813. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  814. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  815. udelay(100);
  816. /* Wait for firmware to complete NVRAM accesses. */
  817. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  818. for (cnt = 10000 ; cnt && d2; cnt--) {
  819. udelay(5);
  820. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  821. barrier();
  822. }
  823. /* Wait for soft-reset to complete. */
  824. d2 = RD_REG_DWORD(&reg->ctrl_status);
  825. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  826. udelay(5);
  827. d2 = RD_REG_DWORD(&reg->ctrl_status);
  828. barrier();
  829. }
  830. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  831. RD_REG_DWORD(&reg->hccr);
  832. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  833. RD_REG_DWORD(&reg->hccr);
  834. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  835. RD_REG_DWORD(&reg->hccr);
  836. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  837. for (cnt = 6000000 ; cnt && d2; cnt--) {
  838. udelay(5);
  839. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  840. barrier();
  841. }
  842. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  843. if (IS_NOPOLLING_TYPE(ha))
  844. ha->isp_ops->enable_intrs(ha);
  845. }
  846. /**
  847. * qla24xx_reset_chip() - Reset ISP24xx chip.
  848. * @ha: HA context
  849. *
  850. * Returns 0 on success.
  851. */
  852. void
  853. qla24xx_reset_chip(scsi_qla_host_t *vha)
  854. {
  855. struct qla_hw_data *ha = vha->hw;
  856. if (pci_channel_offline(ha->pdev) &&
  857. ha->flags.pci_channel_io_perm_failure) {
  858. return;
  859. }
  860. ha->isp_ops->disable_intrs(ha);
  861. /* Perform RISC reset. */
  862. qla24xx_reset_risc(vha);
  863. }
  864. /**
  865. * qla2x00_chip_diag() - Test chip for proper operation.
  866. * @ha: HA context
  867. *
  868. * Returns 0 on success.
  869. */
  870. int
  871. qla2x00_chip_diag(scsi_qla_host_t *vha)
  872. {
  873. int rval;
  874. struct qla_hw_data *ha = vha->hw;
  875. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  876. unsigned long flags = 0;
  877. uint16_t data;
  878. uint32_t cnt;
  879. uint16_t mb[5];
  880. struct req_que *req = ha->req_q_map[0];
  881. /* Assume a failed state */
  882. rval = QLA_FUNCTION_FAILED;
  883. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  884. vha->host_no, (u_long)&reg->flash_address));
  885. spin_lock_irqsave(&ha->hardware_lock, flags);
  886. /* Reset ISP chip. */
  887. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  888. /*
  889. * We need to have a delay here since the card will not respond while
  890. * in reset causing an MCA on some architectures.
  891. */
  892. udelay(20);
  893. data = qla2x00_debounce_register(&reg->ctrl_status);
  894. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  895. udelay(5);
  896. data = RD_REG_WORD(&reg->ctrl_status);
  897. barrier();
  898. }
  899. if (!cnt)
  900. goto chip_diag_failed;
  901. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  902. vha->host_no));
  903. /* Reset RISC processor. */
  904. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  905. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  906. /* Workaround for QLA2312 PCI parity error */
  907. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  908. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  909. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  910. udelay(5);
  911. data = RD_MAILBOX_REG(ha, reg, 0);
  912. barrier();
  913. }
  914. } else
  915. udelay(10);
  916. if (!cnt)
  917. goto chip_diag_failed;
  918. /* Check product ID of chip */
  919. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no));
  920. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  921. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  922. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  923. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  924. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  925. mb[3] != PROD_ID_3) {
  926. qla_printk(KERN_WARNING, ha,
  927. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  928. goto chip_diag_failed;
  929. }
  930. ha->product_id[0] = mb[1];
  931. ha->product_id[1] = mb[2];
  932. ha->product_id[2] = mb[3];
  933. ha->product_id[3] = mb[4];
  934. /* Adjust fw RISC transfer size */
  935. if (req->length > 1024)
  936. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  937. else
  938. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  939. req->length;
  940. if (IS_QLA2200(ha) &&
  941. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  942. /* Limit firmware transfer size with a 2200A */
  943. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  944. vha->host_no));
  945. ha->device_type |= DT_ISP2200A;
  946. ha->fw_transfer_size = 128;
  947. }
  948. /* Wrap Incoming Mailboxes Test. */
  949. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  950. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  951. rval = qla2x00_mbx_reg_test(vha);
  952. if (rval) {
  953. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  954. vha->host_no));
  955. qla_printk(KERN_WARNING, ha,
  956. "Failed mailbox send register test\n");
  957. }
  958. else {
  959. /* Flag a successful rval */
  960. rval = QLA_SUCCESS;
  961. }
  962. spin_lock_irqsave(&ha->hardware_lock, flags);
  963. chip_diag_failed:
  964. if (rval)
  965. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  966. "****\n", vha->host_no));
  967. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  968. return (rval);
  969. }
  970. /**
  971. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  972. * @ha: HA context
  973. *
  974. * Returns 0 on success.
  975. */
  976. int
  977. qla24xx_chip_diag(scsi_qla_host_t *vha)
  978. {
  979. int rval;
  980. struct qla_hw_data *ha = vha->hw;
  981. struct req_que *req = ha->req_q_map[0];
  982. if (IS_QLA82XX(ha))
  983. return QLA_SUCCESS;
  984. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  985. rval = qla2x00_mbx_reg_test(vha);
  986. if (rval) {
  987. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  988. vha->host_no));
  989. qla_printk(KERN_WARNING, ha,
  990. "Failed mailbox send register test\n");
  991. } else {
  992. /* Flag a successful rval */
  993. rval = QLA_SUCCESS;
  994. }
  995. return rval;
  996. }
  997. void
  998. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  999. {
  1000. int rval;
  1001. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  1002. eft_size, fce_size, mq_size;
  1003. dma_addr_t tc_dma;
  1004. void *tc;
  1005. struct qla_hw_data *ha = vha->hw;
  1006. struct req_que *req = ha->req_q_map[0];
  1007. struct rsp_que *rsp = ha->rsp_q_map[0];
  1008. if (ha->fw_dump) {
  1009. qla_printk(KERN_WARNING, ha,
  1010. "Firmware dump previously allocated.\n");
  1011. return;
  1012. }
  1013. ha->fw_dumped = 0;
  1014. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  1015. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1016. fixed_size = sizeof(struct qla2100_fw_dump);
  1017. } else if (IS_QLA23XX(ha)) {
  1018. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  1019. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  1020. sizeof(uint16_t);
  1021. } else if (IS_FWI2_CAPABLE(ha)) {
  1022. if (IS_QLA81XX(ha))
  1023. fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
  1024. else if (IS_QLA25XX(ha))
  1025. fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
  1026. else
  1027. fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
  1028. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  1029. sizeof(uint32_t);
  1030. if (ha->mqenable)
  1031. mq_size = sizeof(struct qla2xxx_mq_chain);
  1032. /* Allocate memory for Fibre Channel Event Buffer. */
  1033. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  1034. goto try_eft;
  1035. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  1036. GFP_KERNEL);
  1037. if (!tc) {
  1038. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  1039. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  1040. goto try_eft;
  1041. }
  1042. memset(tc, 0, FCE_SIZE);
  1043. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  1044. ha->fce_mb, &ha->fce_bufs);
  1045. if (rval) {
  1046. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  1047. "FCE (%d).\n", rval);
  1048. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  1049. tc_dma);
  1050. ha->flags.fce_enabled = 0;
  1051. goto try_eft;
  1052. }
  1053. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  1054. FCE_SIZE / 1024);
  1055. fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
  1056. ha->flags.fce_enabled = 1;
  1057. ha->fce_dma = tc_dma;
  1058. ha->fce = tc;
  1059. try_eft:
  1060. /* Allocate memory for Extended Trace Buffer. */
  1061. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  1062. GFP_KERNEL);
  1063. if (!tc) {
  1064. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  1065. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  1066. goto cont_alloc;
  1067. }
  1068. memset(tc, 0, EFT_SIZE);
  1069. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  1070. if (rval) {
  1071. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  1072. "EFT (%d).\n", rval);
  1073. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  1074. tc_dma);
  1075. goto cont_alloc;
  1076. }
  1077. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  1078. EFT_SIZE / 1024);
  1079. eft_size = EFT_SIZE;
  1080. ha->eft_dma = tc_dma;
  1081. ha->eft = tc;
  1082. }
  1083. cont_alloc:
  1084. req_q_size = req->length * sizeof(request_t);
  1085. rsp_q_size = rsp->length * sizeof(response_t);
  1086. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  1087. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
  1088. ha->chain_offset = dump_size;
  1089. dump_size += mq_size + fce_size;
  1090. ha->fw_dump = vmalloc(dump_size);
  1091. if (!ha->fw_dump) {
  1092. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  1093. "firmware dump!!!\n", dump_size / 1024);
  1094. if (ha->eft) {
  1095. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  1096. ha->eft_dma);
  1097. ha->eft = NULL;
  1098. ha->eft_dma = 0;
  1099. }
  1100. return;
  1101. }
  1102. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  1103. dump_size / 1024);
  1104. ha->fw_dump_len = dump_size;
  1105. ha->fw_dump->signature[0] = 'Q';
  1106. ha->fw_dump->signature[1] = 'L';
  1107. ha->fw_dump->signature[2] = 'G';
  1108. ha->fw_dump->signature[3] = 'C';
  1109. ha->fw_dump->version = __constant_htonl(1);
  1110. ha->fw_dump->fixed_size = htonl(fixed_size);
  1111. ha->fw_dump->mem_size = htonl(mem_size);
  1112. ha->fw_dump->req_q_size = htonl(req_q_size);
  1113. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  1114. ha->fw_dump->eft_size = htonl(eft_size);
  1115. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  1116. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  1117. ha->fw_dump->header_size =
  1118. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  1119. }
  1120. static int
  1121. qla81xx_mpi_sync(scsi_qla_host_t *vha)
  1122. {
  1123. #define MPS_MASK 0xe0
  1124. int rval;
  1125. uint16_t dc;
  1126. uint32_t dw;
  1127. struct qla_hw_data *ha = vha->hw;
  1128. if (!IS_QLA81XX(vha->hw))
  1129. return QLA_SUCCESS;
  1130. rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
  1131. if (rval != QLA_SUCCESS) {
  1132. DEBUG2(qla_printk(KERN_WARNING, ha,
  1133. "Sync-MPI: Unable to acquire semaphore.\n"));
  1134. goto done;
  1135. }
  1136. pci_read_config_word(vha->hw->pdev, 0x54, &dc);
  1137. rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
  1138. if (rval != QLA_SUCCESS) {
  1139. DEBUG2(qla_printk(KERN_WARNING, ha,
  1140. "Sync-MPI: Unable to read sync.\n"));
  1141. goto done_release;
  1142. }
  1143. dc &= MPS_MASK;
  1144. if (dc == (dw & MPS_MASK))
  1145. goto done_release;
  1146. dw &= ~MPS_MASK;
  1147. dw |= dc;
  1148. rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
  1149. if (rval != QLA_SUCCESS) {
  1150. DEBUG2(qla_printk(KERN_WARNING, ha,
  1151. "Sync-MPI: Unable to gain sync.\n"));
  1152. }
  1153. done_release:
  1154. rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
  1155. if (rval != QLA_SUCCESS) {
  1156. DEBUG2(qla_printk(KERN_WARNING, ha,
  1157. "Sync-MPI: Unable to release semaphore.\n"));
  1158. }
  1159. done:
  1160. return rval;
  1161. }
  1162. /**
  1163. * qla2x00_setup_chip() - Load and start RISC firmware.
  1164. * @ha: HA context
  1165. *
  1166. * Returns 0 on success.
  1167. */
  1168. static int
  1169. qla2x00_setup_chip(scsi_qla_host_t *vha)
  1170. {
  1171. int rval;
  1172. uint32_t srisc_address = 0;
  1173. struct qla_hw_data *ha = vha->hw;
  1174. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1175. unsigned long flags;
  1176. uint16_t fw_major_version;
  1177. if (IS_QLA82XX(ha)) {
  1178. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  1179. if (rval == QLA_SUCCESS)
  1180. goto enable_82xx_npiv;
  1181. else
  1182. goto failed;
  1183. }
  1184. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1185. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  1186. spin_lock_irqsave(&ha->hardware_lock, flags);
  1187. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  1188. RD_REG_WORD(&reg->hccr);
  1189. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1190. }
  1191. qla81xx_mpi_sync(vha);
  1192. /* Load firmware sequences */
  1193. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  1194. if (rval == QLA_SUCCESS) {
  1195. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  1196. "code.\n", vha->host_no));
  1197. rval = qla2x00_verify_checksum(vha, srisc_address);
  1198. if (rval == QLA_SUCCESS) {
  1199. /* Start firmware execution. */
  1200. DEBUG(printk("scsi(%ld): Checksum OK, start "
  1201. "firmware.\n", vha->host_no));
  1202. rval = qla2x00_execute_fw(vha, srisc_address);
  1203. /* Retrieve firmware information. */
  1204. if (rval == QLA_SUCCESS) {
  1205. enable_82xx_npiv:
  1206. fw_major_version = ha->fw_major_version;
  1207. rval = qla2x00_get_fw_version(vha,
  1208. &ha->fw_major_version,
  1209. &ha->fw_minor_version,
  1210. &ha->fw_subminor_version,
  1211. &ha->fw_attributes, &ha->fw_memory_size,
  1212. ha->mpi_version, &ha->mpi_capabilities,
  1213. ha->phy_version);
  1214. if (rval != QLA_SUCCESS)
  1215. goto failed;
  1216. ha->flags.npiv_supported = 0;
  1217. if (IS_QLA2XXX_MIDTYPE(ha) &&
  1218. (ha->fw_attributes & BIT_2)) {
  1219. ha->flags.npiv_supported = 1;
  1220. if ((!ha->max_npiv_vports) ||
  1221. ((ha->max_npiv_vports + 1) %
  1222. MIN_MULTI_ID_FABRIC))
  1223. ha->max_npiv_vports =
  1224. MIN_MULTI_ID_FABRIC - 1;
  1225. }
  1226. qla2x00_get_resource_cnts(vha, NULL,
  1227. &ha->fw_xcb_count, NULL, NULL,
  1228. &ha->max_npiv_vports, NULL);
  1229. if (!fw_major_version && ql2xallocfwdump) {
  1230. if (!IS_QLA82XX(ha))
  1231. qla2x00_alloc_fw_dump(vha);
  1232. }
  1233. }
  1234. } else {
  1235. DEBUG2(printk(KERN_INFO
  1236. "scsi(%ld): ISP Firmware failed checksum.\n",
  1237. vha->host_no));
  1238. }
  1239. }
  1240. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1241. /* Enable proper parity. */
  1242. spin_lock_irqsave(&ha->hardware_lock, flags);
  1243. if (IS_QLA2300(ha))
  1244. /* SRAM parity */
  1245. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  1246. else
  1247. /* SRAM, Instruction RAM and GP RAM parity */
  1248. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  1249. RD_REG_WORD(&reg->hccr);
  1250. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1251. }
  1252. if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
  1253. uint32_t size;
  1254. rval = qla81xx_fac_get_sector_size(vha, &size);
  1255. if (rval == QLA_SUCCESS) {
  1256. ha->flags.fac_supported = 1;
  1257. ha->fdt_block_size = size << 2;
  1258. } else {
  1259. qla_printk(KERN_ERR, ha,
  1260. "Unsupported FAC firmware (%d.%02d.%02d).\n",
  1261. ha->fw_major_version, ha->fw_minor_version,
  1262. ha->fw_subminor_version);
  1263. }
  1264. }
  1265. failed:
  1266. if (rval) {
  1267. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  1268. vha->host_no));
  1269. }
  1270. return (rval);
  1271. }
  1272. /**
  1273. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  1274. * @ha: HA context
  1275. *
  1276. * Beginning of request ring has initialization control block already built
  1277. * by nvram config routine.
  1278. *
  1279. * Returns 0 on success.
  1280. */
  1281. void
  1282. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  1283. {
  1284. uint16_t cnt;
  1285. response_t *pkt;
  1286. rsp->ring_ptr = rsp->ring;
  1287. rsp->ring_index = 0;
  1288. rsp->status_srb = NULL;
  1289. pkt = rsp->ring_ptr;
  1290. for (cnt = 0; cnt < rsp->length; cnt++) {
  1291. pkt->signature = RESPONSE_PROCESSED;
  1292. pkt++;
  1293. }
  1294. }
  1295. /**
  1296. * qla2x00_update_fw_options() - Read and process firmware options.
  1297. * @ha: HA context
  1298. *
  1299. * Returns 0 on success.
  1300. */
  1301. void
  1302. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  1303. {
  1304. uint16_t swing, emphasis, tx_sens, rx_sens;
  1305. struct qla_hw_data *ha = vha->hw;
  1306. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  1307. qla2x00_get_fw_options(vha, ha->fw_options);
  1308. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1309. return;
  1310. /* Serial Link options. */
  1311. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  1312. vha->host_no));
  1313. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  1314. sizeof(ha->fw_seriallink_options)));
  1315. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  1316. if (ha->fw_seriallink_options[3] & BIT_2) {
  1317. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  1318. /* 1G settings */
  1319. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  1320. emphasis = (ha->fw_seriallink_options[2] &
  1321. (BIT_4 | BIT_3)) >> 3;
  1322. tx_sens = ha->fw_seriallink_options[0] &
  1323. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1324. rx_sens = (ha->fw_seriallink_options[0] &
  1325. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1326. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  1327. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1328. if (rx_sens == 0x0)
  1329. rx_sens = 0x3;
  1330. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  1331. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1332. ha->fw_options[10] |= BIT_5 |
  1333. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1334. (tx_sens & (BIT_1 | BIT_0));
  1335. /* 2G settings */
  1336. swing = (ha->fw_seriallink_options[2] &
  1337. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  1338. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  1339. tx_sens = ha->fw_seriallink_options[1] &
  1340. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1341. rx_sens = (ha->fw_seriallink_options[1] &
  1342. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1343. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  1344. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1345. if (rx_sens == 0x0)
  1346. rx_sens = 0x3;
  1347. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  1348. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1349. ha->fw_options[11] |= BIT_5 |
  1350. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1351. (tx_sens & (BIT_1 | BIT_0));
  1352. }
  1353. /* FCP2 options. */
  1354. /* Return command IOCBs without waiting for an ABTS to complete. */
  1355. ha->fw_options[3] |= BIT_13;
  1356. /* LED scheme. */
  1357. if (ha->flags.enable_led_scheme)
  1358. ha->fw_options[2] |= BIT_12;
  1359. /* Detect ISP6312. */
  1360. if (IS_QLA6312(ha))
  1361. ha->fw_options[2] |= BIT_13;
  1362. /* Update firmware options. */
  1363. qla2x00_set_fw_options(vha, ha->fw_options);
  1364. }
  1365. void
  1366. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  1367. {
  1368. int rval;
  1369. struct qla_hw_data *ha = vha->hw;
  1370. if (IS_QLA82XX(ha))
  1371. return;
  1372. /* Update Serial Link options. */
  1373. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  1374. return;
  1375. rval = qla2x00_set_serdes_params(vha,
  1376. le16_to_cpu(ha->fw_seriallink_options24[1]),
  1377. le16_to_cpu(ha->fw_seriallink_options24[2]),
  1378. le16_to_cpu(ha->fw_seriallink_options24[3]));
  1379. if (rval != QLA_SUCCESS) {
  1380. qla_printk(KERN_WARNING, ha,
  1381. "Unable to update Serial Link options (%x).\n", rval);
  1382. }
  1383. }
  1384. void
  1385. qla2x00_config_rings(struct scsi_qla_host *vha)
  1386. {
  1387. struct qla_hw_data *ha = vha->hw;
  1388. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1389. struct req_que *req = ha->req_q_map[0];
  1390. struct rsp_que *rsp = ha->rsp_q_map[0];
  1391. /* Setup ring parameters in initialization control block. */
  1392. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  1393. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  1394. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  1395. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  1396. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1397. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1398. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1399. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1400. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  1401. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  1402. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  1403. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  1404. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  1405. }
  1406. void
  1407. qla24xx_config_rings(struct scsi_qla_host *vha)
  1408. {
  1409. struct qla_hw_data *ha = vha->hw;
  1410. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  1411. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  1412. struct qla_msix_entry *msix;
  1413. struct init_cb_24xx *icb;
  1414. uint16_t rid = 0;
  1415. struct req_que *req = ha->req_q_map[0];
  1416. struct rsp_que *rsp = ha->rsp_q_map[0];
  1417. /* Setup ring parameters in initialization control block. */
  1418. icb = (struct init_cb_24xx *)ha->init_cb;
  1419. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  1420. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  1421. icb->request_q_length = cpu_to_le16(req->length);
  1422. icb->response_q_length = cpu_to_le16(rsp->length);
  1423. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1424. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1425. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1426. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1427. if (ha->mqenable) {
  1428. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  1429. icb->rid = __constant_cpu_to_le16(rid);
  1430. if (ha->flags.msix_enabled) {
  1431. msix = &ha->msix_entries[1];
  1432. DEBUG2_17(printk(KERN_INFO
  1433. "Registering vector 0x%x for base que\n", msix->entry));
  1434. icb->msix = cpu_to_le16(msix->entry);
  1435. }
  1436. /* Use alternate PCI bus number */
  1437. if (MSB(rid))
  1438. icb->firmware_options_2 |=
  1439. __constant_cpu_to_le32(BIT_19);
  1440. /* Use alternate PCI devfn */
  1441. if (LSB(rid))
  1442. icb->firmware_options_2 |=
  1443. __constant_cpu_to_le32(BIT_18);
  1444. /* Use Disable MSIX Handshake mode for capable adapters */
  1445. if (IS_MSIX_NACK_CAPABLE(ha)) {
  1446. icb->firmware_options_2 &=
  1447. __constant_cpu_to_le32(~BIT_22);
  1448. ha->flags.disable_msix_handshake = 1;
  1449. qla_printk(KERN_INFO, ha,
  1450. "MSIX Handshake Disable Mode turned on\n");
  1451. } else {
  1452. icb->firmware_options_2 |=
  1453. __constant_cpu_to_le32(BIT_22);
  1454. }
  1455. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1456. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1457. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1458. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1459. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1460. } else {
  1461. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1462. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1463. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1464. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1465. }
  1466. /* PCI posting */
  1467. RD_REG_DWORD(&ioreg->hccr);
  1468. }
  1469. /**
  1470. * qla2x00_init_rings() - Initializes firmware.
  1471. * @ha: HA context
  1472. *
  1473. * Beginning of request ring has initialization control block already built
  1474. * by nvram config routine.
  1475. *
  1476. * Returns 0 on success.
  1477. */
  1478. static int
  1479. qla2x00_init_rings(scsi_qla_host_t *vha)
  1480. {
  1481. int rval;
  1482. unsigned long flags = 0;
  1483. int cnt, que;
  1484. struct qla_hw_data *ha = vha->hw;
  1485. struct req_que *req;
  1486. struct rsp_que *rsp;
  1487. struct scsi_qla_host *vp;
  1488. struct mid_init_cb_24xx *mid_init_cb =
  1489. (struct mid_init_cb_24xx *) ha->init_cb;
  1490. spin_lock_irqsave(&ha->hardware_lock, flags);
  1491. /* Clear outstanding commands array. */
  1492. for (que = 0; que < ha->max_req_queues; que++) {
  1493. req = ha->req_q_map[que];
  1494. if (!req)
  1495. continue;
  1496. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1497. req->outstanding_cmds[cnt] = NULL;
  1498. req->current_outstanding_cmd = 1;
  1499. /* Initialize firmware. */
  1500. req->ring_ptr = req->ring;
  1501. req->ring_index = 0;
  1502. req->cnt = req->length;
  1503. }
  1504. for (que = 0; que < ha->max_rsp_queues; que++) {
  1505. rsp = ha->rsp_q_map[que];
  1506. if (!rsp)
  1507. continue;
  1508. /* Initialize response queue entries */
  1509. qla2x00_init_response_q_entries(rsp);
  1510. }
  1511. /* Clear RSCN queue. */
  1512. list_for_each_entry(vp, &ha->vp_list, list) {
  1513. vp->rscn_in_ptr = 0;
  1514. vp->rscn_out_ptr = 0;
  1515. }
  1516. ha->isp_ops->config_rings(vha);
  1517. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1518. /* Update any ISP specific firmware options before initialization. */
  1519. ha->isp_ops->update_fw_options(vha);
  1520. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1521. if (ha->flags.npiv_supported) {
  1522. if (ha->operating_mode == LOOP)
  1523. ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
  1524. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1525. }
  1526. if (IS_FWI2_CAPABLE(ha)) {
  1527. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1528. mid_init_cb->init_cb.execution_throttle =
  1529. cpu_to_le16(ha->fw_xcb_count);
  1530. }
  1531. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1532. if (rval) {
  1533. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1534. vha->host_no));
  1535. } else {
  1536. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1537. vha->host_no));
  1538. }
  1539. return (rval);
  1540. }
  1541. /**
  1542. * qla2x00_fw_ready() - Waits for firmware ready.
  1543. * @ha: HA context
  1544. *
  1545. * Returns 0 on success.
  1546. */
  1547. static int
  1548. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1549. {
  1550. int rval;
  1551. unsigned long wtime, mtime, cs84xx_time;
  1552. uint16_t min_wait; /* Minimum wait time if loop is down */
  1553. uint16_t wait_time; /* Wait time if loop is coming ready */
  1554. uint16_t state[5];
  1555. struct qla_hw_data *ha = vha->hw;
  1556. rval = QLA_SUCCESS;
  1557. /* 20 seconds for loop down. */
  1558. min_wait = 20;
  1559. /*
  1560. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1561. * our own processing.
  1562. */
  1563. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1564. wait_time = min_wait;
  1565. }
  1566. /* Min wait time if loop down */
  1567. mtime = jiffies + (min_wait * HZ);
  1568. /* wait time before firmware ready */
  1569. wtime = jiffies + (wait_time * HZ);
  1570. /* Wait for ISP to finish LIP */
  1571. if (!vha->flags.init_done)
  1572. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1573. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1574. vha->host_no));
  1575. do {
  1576. rval = qla2x00_get_firmware_state(vha, state);
  1577. if (rval == QLA_SUCCESS) {
  1578. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1579. vha->device_flags &= ~DFLG_NO_CABLE;
  1580. }
  1581. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1582. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1583. "84xx=%x.\n", vha->host_no, state[0],
  1584. state[2]));
  1585. if ((state[2] & FSTATE_LOGGED_IN) &&
  1586. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1587. DEBUG16(printk("scsi(%ld): Sending "
  1588. "verify iocb.\n", vha->host_no));
  1589. cs84xx_time = jiffies;
  1590. rval = qla84xx_init_chip(vha);
  1591. if (rval != QLA_SUCCESS)
  1592. break;
  1593. /* Add time taken to initialize. */
  1594. cs84xx_time = jiffies - cs84xx_time;
  1595. wtime += cs84xx_time;
  1596. mtime += cs84xx_time;
  1597. DEBUG16(printk("scsi(%ld): Increasing "
  1598. "wait time by %ld. New time %ld\n",
  1599. vha->host_no, cs84xx_time, wtime));
  1600. }
  1601. } else if (state[0] == FSTATE_READY) {
  1602. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1603. vha->host_no));
  1604. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1605. &ha->login_timeout, &ha->r_a_tov);
  1606. rval = QLA_SUCCESS;
  1607. break;
  1608. }
  1609. rval = QLA_FUNCTION_FAILED;
  1610. if (atomic_read(&vha->loop_down_timer) &&
  1611. state[0] != FSTATE_READY) {
  1612. /* Loop down. Timeout on min_wait for states
  1613. * other than Wait for Login.
  1614. */
  1615. if (time_after_eq(jiffies, mtime)) {
  1616. qla_printk(KERN_INFO, ha,
  1617. "Cable is unplugged...\n");
  1618. vha->device_flags |= DFLG_NO_CABLE;
  1619. break;
  1620. }
  1621. }
  1622. } else {
  1623. /* Mailbox cmd failed. Timeout on min_wait. */
  1624. if (time_after_eq(jiffies, mtime) ||
  1625. (IS_QLA82XX(ha) && ha->flags.fw_hung))
  1626. break;
  1627. }
  1628. if (time_after_eq(jiffies, wtime))
  1629. break;
  1630. /* Delay for a while */
  1631. msleep(500);
  1632. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1633. vha->host_no, state[0], jiffies));
  1634. } while (1);
  1635. DEBUG(printk("scsi(%ld): fw_state=%x (%x, %x, %x, %x) curr time=%lx.\n",
  1636. vha->host_no, state[0], state[1], state[2], state[3], state[4],
  1637. jiffies));
  1638. if (rval) {
  1639. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1640. vha->host_no));
  1641. }
  1642. return (rval);
  1643. }
  1644. /*
  1645. * qla2x00_configure_hba
  1646. * Setup adapter context.
  1647. *
  1648. * Input:
  1649. * ha = adapter state pointer.
  1650. *
  1651. * Returns:
  1652. * 0 = success
  1653. *
  1654. * Context:
  1655. * Kernel context.
  1656. */
  1657. static int
  1658. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1659. {
  1660. int rval;
  1661. uint16_t loop_id;
  1662. uint16_t topo;
  1663. uint16_t sw_cap;
  1664. uint8_t al_pa;
  1665. uint8_t area;
  1666. uint8_t domain;
  1667. char connect_type[22];
  1668. struct qla_hw_data *ha = vha->hw;
  1669. /* Get host addresses. */
  1670. rval = qla2x00_get_adapter_id(vha,
  1671. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1672. if (rval != QLA_SUCCESS) {
  1673. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1674. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1675. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1676. __func__, vha->host_no));
  1677. } else {
  1678. qla_printk(KERN_WARNING, ha,
  1679. "ERROR -- Unable to get host loop ID.\n");
  1680. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1681. }
  1682. return (rval);
  1683. }
  1684. if (topo == 4) {
  1685. qla_printk(KERN_INFO, ha,
  1686. "Cannot get topology - retrying.\n");
  1687. return (QLA_FUNCTION_FAILED);
  1688. }
  1689. vha->loop_id = loop_id;
  1690. /* initialize */
  1691. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1692. ha->operating_mode = LOOP;
  1693. ha->switch_cap = 0;
  1694. switch (topo) {
  1695. case 0:
  1696. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1697. vha->host_no));
  1698. ha->current_topology = ISP_CFG_NL;
  1699. strcpy(connect_type, "(Loop)");
  1700. break;
  1701. case 1:
  1702. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1703. vha->host_no));
  1704. ha->switch_cap = sw_cap;
  1705. ha->current_topology = ISP_CFG_FL;
  1706. strcpy(connect_type, "(FL_Port)");
  1707. break;
  1708. case 2:
  1709. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1710. vha->host_no));
  1711. ha->operating_mode = P2P;
  1712. ha->current_topology = ISP_CFG_N;
  1713. strcpy(connect_type, "(N_Port-to-N_Port)");
  1714. break;
  1715. case 3:
  1716. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1717. vha->host_no));
  1718. ha->switch_cap = sw_cap;
  1719. ha->operating_mode = P2P;
  1720. ha->current_topology = ISP_CFG_F;
  1721. strcpy(connect_type, "(F_Port)");
  1722. break;
  1723. default:
  1724. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1725. "Using NL.\n",
  1726. vha->host_no, topo));
  1727. ha->current_topology = ISP_CFG_NL;
  1728. strcpy(connect_type, "(Loop)");
  1729. break;
  1730. }
  1731. /* Save Host port and loop ID. */
  1732. /* byte order - Big Endian */
  1733. vha->d_id.b.domain = domain;
  1734. vha->d_id.b.area = area;
  1735. vha->d_id.b.al_pa = al_pa;
  1736. if (!vha->flags.init_done)
  1737. qla_printk(KERN_INFO, ha,
  1738. "Topology - %s, Host Loop address 0x%x\n",
  1739. connect_type, vha->loop_id);
  1740. if (rval) {
  1741. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1742. } else {
  1743. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1744. }
  1745. return(rval);
  1746. }
  1747. inline void
  1748. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1749. char *def)
  1750. {
  1751. char *st, *en;
  1752. uint16_t index;
  1753. struct qla_hw_data *ha = vha->hw;
  1754. int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
  1755. !IS_QLA8XXX_TYPE(ha);
  1756. if (memcmp(model, BINZERO, len) != 0) {
  1757. strncpy(ha->model_number, model, len);
  1758. st = en = ha->model_number;
  1759. en += len - 1;
  1760. while (en > st) {
  1761. if (*en != 0x20 && *en != 0x00)
  1762. break;
  1763. *en-- = '\0';
  1764. }
  1765. index = (ha->pdev->subsystem_device & 0xff);
  1766. if (use_tbl &&
  1767. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1768. index < QLA_MODEL_NAMES)
  1769. strncpy(ha->model_desc,
  1770. qla2x00_model_name[index * 2 + 1],
  1771. sizeof(ha->model_desc) - 1);
  1772. } else {
  1773. index = (ha->pdev->subsystem_device & 0xff);
  1774. if (use_tbl &&
  1775. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1776. index < QLA_MODEL_NAMES) {
  1777. strcpy(ha->model_number,
  1778. qla2x00_model_name[index * 2]);
  1779. strncpy(ha->model_desc,
  1780. qla2x00_model_name[index * 2 + 1],
  1781. sizeof(ha->model_desc) - 1);
  1782. } else {
  1783. strcpy(ha->model_number, def);
  1784. }
  1785. }
  1786. if (IS_FWI2_CAPABLE(ha))
  1787. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1788. sizeof(ha->model_desc));
  1789. }
  1790. /* On sparc systems, obtain port and node WWN from firmware
  1791. * properties.
  1792. */
  1793. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1794. {
  1795. #ifdef CONFIG_SPARC
  1796. struct qla_hw_data *ha = vha->hw;
  1797. struct pci_dev *pdev = ha->pdev;
  1798. struct device_node *dp = pci_device_to_OF_node(pdev);
  1799. const u8 *val;
  1800. int len;
  1801. val = of_get_property(dp, "port-wwn", &len);
  1802. if (val && len >= WWN_SIZE)
  1803. memcpy(nv->port_name, val, WWN_SIZE);
  1804. val = of_get_property(dp, "node-wwn", &len);
  1805. if (val && len >= WWN_SIZE)
  1806. memcpy(nv->node_name, val, WWN_SIZE);
  1807. #endif
  1808. }
  1809. /*
  1810. * NVRAM configuration for ISP 2xxx
  1811. *
  1812. * Input:
  1813. * ha = adapter block pointer.
  1814. *
  1815. * Output:
  1816. * initialization control block in response_ring
  1817. * host adapters parameters in host adapter block
  1818. *
  1819. * Returns:
  1820. * 0 = success.
  1821. */
  1822. int
  1823. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1824. {
  1825. int rval;
  1826. uint8_t chksum = 0;
  1827. uint16_t cnt;
  1828. uint8_t *dptr1, *dptr2;
  1829. struct qla_hw_data *ha = vha->hw;
  1830. init_cb_t *icb = ha->init_cb;
  1831. nvram_t *nv = ha->nvram;
  1832. uint8_t *ptr = ha->nvram;
  1833. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1834. rval = QLA_SUCCESS;
  1835. /* Determine NVRAM starting address. */
  1836. ha->nvram_size = sizeof(nvram_t);
  1837. ha->nvram_base = 0;
  1838. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1839. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1840. ha->nvram_base = 0x80;
  1841. /* Get NVRAM data and calculate checksum. */
  1842. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1843. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1844. chksum += *ptr++;
  1845. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1846. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1847. /* Bad NVRAM data, set defaults parameters. */
  1848. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1849. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1850. /* Reset NVRAM data. */
  1851. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1852. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1853. nv->nvram_version);
  1854. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1855. "invalid -- WWPN) defaults.\n");
  1856. /*
  1857. * Set default initialization control block.
  1858. */
  1859. memset(nv, 0, ha->nvram_size);
  1860. nv->parameter_block_version = ICB_VERSION;
  1861. if (IS_QLA23XX(ha)) {
  1862. nv->firmware_options[0] = BIT_2 | BIT_1;
  1863. nv->firmware_options[1] = BIT_7 | BIT_5;
  1864. nv->add_firmware_options[0] = BIT_5;
  1865. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1866. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1867. nv->special_options[1] = BIT_7;
  1868. } else if (IS_QLA2200(ha)) {
  1869. nv->firmware_options[0] = BIT_2 | BIT_1;
  1870. nv->firmware_options[1] = BIT_7 | BIT_5;
  1871. nv->add_firmware_options[0] = BIT_5;
  1872. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1873. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1874. } else if (IS_QLA2100(ha)) {
  1875. nv->firmware_options[0] = BIT_3 | BIT_1;
  1876. nv->firmware_options[1] = BIT_5;
  1877. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1878. }
  1879. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1880. nv->execution_throttle = __constant_cpu_to_le16(16);
  1881. nv->retry_count = 8;
  1882. nv->retry_delay = 1;
  1883. nv->port_name[0] = 33;
  1884. nv->port_name[3] = 224;
  1885. nv->port_name[4] = 139;
  1886. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1887. nv->login_timeout = 4;
  1888. /*
  1889. * Set default host adapter parameters
  1890. */
  1891. nv->host_p[1] = BIT_2;
  1892. nv->reset_delay = 5;
  1893. nv->port_down_retry_count = 8;
  1894. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1895. nv->link_down_timeout = 60;
  1896. rval = 1;
  1897. }
  1898. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1899. /*
  1900. * The SN2 does not provide BIOS emulation which means you can't change
  1901. * potentially bogus BIOS settings. Force the use of default settings
  1902. * for link rate and frame size. Hope that the rest of the settings
  1903. * are valid.
  1904. */
  1905. if (ia64_platform_is("sn2")) {
  1906. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1907. if (IS_QLA23XX(ha))
  1908. nv->special_options[1] = BIT_7;
  1909. }
  1910. #endif
  1911. /* Reset Initialization control block */
  1912. memset(icb, 0, ha->init_cb_size);
  1913. /*
  1914. * Setup driver NVRAM options.
  1915. */
  1916. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1917. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1918. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1919. nv->firmware_options[1] &= ~BIT_4;
  1920. if (IS_QLA23XX(ha)) {
  1921. nv->firmware_options[0] |= BIT_2;
  1922. nv->firmware_options[0] &= ~BIT_3;
  1923. nv->firmware_options[0] &= ~BIT_6;
  1924. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1925. if (IS_QLA2300(ha)) {
  1926. if (ha->fb_rev == FPM_2310) {
  1927. strcpy(ha->model_number, "QLA2310");
  1928. } else {
  1929. strcpy(ha->model_number, "QLA2300");
  1930. }
  1931. } else {
  1932. qla2x00_set_model_info(vha, nv->model_number,
  1933. sizeof(nv->model_number), "QLA23xx");
  1934. }
  1935. } else if (IS_QLA2200(ha)) {
  1936. nv->firmware_options[0] |= BIT_2;
  1937. /*
  1938. * 'Point-to-point preferred, else loop' is not a safe
  1939. * connection mode setting.
  1940. */
  1941. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1942. (BIT_5 | BIT_4)) {
  1943. /* Force 'loop preferred, else point-to-point'. */
  1944. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1945. nv->add_firmware_options[0] |= BIT_5;
  1946. }
  1947. strcpy(ha->model_number, "QLA22xx");
  1948. } else /*if (IS_QLA2100(ha))*/ {
  1949. strcpy(ha->model_number, "QLA2100");
  1950. }
  1951. /*
  1952. * Copy over NVRAM RISC parameter block to initialization control block.
  1953. */
  1954. dptr1 = (uint8_t *)icb;
  1955. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1956. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1957. while (cnt--)
  1958. *dptr1++ = *dptr2++;
  1959. /* Copy 2nd half. */
  1960. dptr1 = (uint8_t *)icb->add_firmware_options;
  1961. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1962. while (cnt--)
  1963. *dptr1++ = *dptr2++;
  1964. /* Use alternate WWN? */
  1965. if (nv->host_p[1] & BIT_7) {
  1966. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  1967. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  1968. }
  1969. /* Prepare nodename */
  1970. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1971. /*
  1972. * Firmware will apply the following mask if the nodename was
  1973. * not provided.
  1974. */
  1975. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1976. icb->node_name[0] &= 0xF0;
  1977. }
  1978. /*
  1979. * Set host adapter parameters.
  1980. */
  1981. if (nv->host_p[0] & BIT_7)
  1982. ql2xextended_error_logging = 1;
  1983. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1984. /* Always load RISC code on non ISP2[12]00 chips. */
  1985. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1986. ha->flags.disable_risc_code_load = 0;
  1987. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1988. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  1989. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  1990. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  1991. ha->flags.disable_serdes = 0;
  1992. ha->operating_mode =
  1993. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  1994. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  1995. sizeof(ha->fw_seriallink_options));
  1996. /* save HBA serial number */
  1997. ha->serial0 = icb->port_name[5];
  1998. ha->serial1 = icb->port_name[6];
  1999. ha->serial2 = icb->port_name[7];
  2000. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  2001. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  2002. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  2003. ha->retry_count = nv->retry_count;
  2004. /* Set minimum login_timeout to 4 seconds. */
  2005. if (nv->login_timeout != ql2xlogintimeout)
  2006. nv->login_timeout = ql2xlogintimeout;
  2007. if (nv->login_timeout < 4)
  2008. nv->login_timeout = 4;
  2009. ha->login_timeout = nv->login_timeout;
  2010. icb->login_timeout = nv->login_timeout;
  2011. /* Set minimum RATOV to 100 tenths of a second. */
  2012. ha->r_a_tov = 100;
  2013. ha->loop_reset_delay = nv->reset_delay;
  2014. /* Link Down Timeout = 0:
  2015. *
  2016. * When Port Down timer expires we will start returning
  2017. * I/O's to OS with "DID_NO_CONNECT".
  2018. *
  2019. * Link Down Timeout != 0:
  2020. *
  2021. * The driver waits for the link to come up after link down
  2022. * before returning I/Os to OS with "DID_NO_CONNECT".
  2023. */
  2024. if (nv->link_down_timeout == 0) {
  2025. ha->loop_down_abort_time =
  2026. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  2027. } else {
  2028. ha->link_down_timeout = nv->link_down_timeout;
  2029. ha->loop_down_abort_time =
  2030. (LOOP_DOWN_TIME - ha->link_down_timeout);
  2031. }
  2032. /*
  2033. * Need enough time to try and get the port back.
  2034. */
  2035. ha->port_down_retry_count = nv->port_down_retry_count;
  2036. if (qlport_down_retry)
  2037. ha->port_down_retry_count = qlport_down_retry;
  2038. /* Set login_retry_count */
  2039. ha->login_retry_count = nv->retry_count;
  2040. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  2041. ha->port_down_retry_count > 3)
  2042. ha->login_retry_count = ha->port_down_retry_count;
  2043. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  2044. ha->login_retry_count = ha->port_down_retry_count;
  2045. if (ql2xloginretrycount)
  2046. ha->login_retry_count = ql2xloginretrycount;
  2047. icb->lun_enables = __constant_cpu_to_le16(0);
  2048. icb->command_resource_count = 0;
  2049. icb->immediate_notify_resource_count = 0;
  2050. icb->timeout = __constant_cpu_to_le16(0);
  2051. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  2052. /* Enable RIO */
  2053. icb->firmware_options[0] &= ~BIT_3;
  2054. icb->add_firmware_options[0] &=
  2055. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2056. icb->add_firmware_options[0] |= BIT_2;
  2057. icb->response_accumulation_timer = 3;
  2058. icb->interrupt_delay_timer = 5;
  2059. vha->flags.process_response_queue = 1;
  2060. } else {
  2061. /* Enable ZIO. */
  2062. if (!vha->flags.init_done) {
  2063. ha->zio_mode = icb->add_firmware_options[0] &
  2064. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2065. ha->zio_timer = icb->interrupt_delay_timer ?
  2066. icb->interrupt_delay_timer: 2;
  2067. }
  2068. icb->add_firmware_options[0] &=
  2069. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2070. vha->flags.process_response_queue = 0;
  2071. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  2072. ha->zio_mode = QLA_ZIO_MODE_6;
  2073. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  2074. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  2075. ha->zio_timer * 100));
  2076. qla_printk(KERN_INFO, ha,
  2077. "ZIO mode %d enabled; timer delay (%d us).\n",
  2078. ha->zio_mode, ha->zio_timer * 100);
  2079. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  2080. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  2081. vha->flags.process_response_queue = 1;
  2082. }
  2083. }
  2084. if (rval) {
  2085. DEBUG2_3(printk(KERN_WARNING
  2086. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  2087. }
  2088. return (rval);
  2089. }
  2090. static void
  2091. qla2x00_rport_del(void *data)
  2092. {
  2093. fc_port_t *fcport = data;
  2094. struct fc_rport *rport;
  2095. spin_lock_irq(fcport->vha->host->host_lock);
  2096. rport = fcport->drport ? fcport->drport: fcport->rport;
  2097. fcport->drport = NULL;
  2098. spin_unlock_irq(fcport->vha->host->host_lock);
  2099. if (rport)
  2100. fc_remote_port_delete(rport);
  2101. }
  2102. /**
  2103. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  2104. * @ha: HA context
  2105. * @flags: allocation flags
  2106. *
  2107. * Returns a pointer to the allocated fcport, or NULL, if none available.
  2108. */
  2109. fc_port_t *
  2110. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  2111. {
  2112. fc_port_t *fcport;
  2113. fcport = kzalloc(sizeof(fc_port_t), flags);
  2114. if (!fcport)
  2115. return NULL;
  2116. /* Setup fcport template structure. */
  2117. fcport->vha = vha;
  2118. fcport->vp_idx = vha->vp_idx;
  2119. fcport->port_type = FCT_UNKNOWN;
  2120. fcport->loop_id = FC_NO_LOOP_ID;
  2121. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  2122. fcport->supported_classes = FC_COS_UNSPECIFIED;
  2123. return fcport;
  2124. }
  2125. /*
  2126. * qla2x00_configure_loop
  2127. * Updates Fibre Channel Device Database with what is actually on loop.
  2128. *
  2129. * Input:
  2130. * ha = adapter block pointer.
  2131. *
  2132. * Returns:
  2133. * 0 = success.
  2134. * 1 = error.
  2135. * 2 = database was full and device was not configured.
  2136. */
  2137. static int
  2138. qla2x00_configure_loop(scsi_qla_host_t *vha)
  2139. {
  2140. int rval;
  2141. unsigned long flags, save_flags;
  2142. struct qla_hw_data *ha = vha->hw;
  2143. rval = QLA_SUCCESS;
  2144. /* Get Initiator ID */
  2145. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  2146. rval = qla2x00_configure_hba(vha);
  2147. if (rval != QLA_SUCCESS) {
  2148. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  2149. vha->host_no));
  2150. return (rval);
  2151. }
  2152. }
  2153. save_flags = flags = vha->dpc_flags;
  2154. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  2155. vha->host_no, flags));
  2156. /*
  2157. * If we have both an RSCN and PORT UPDATE pending then handle them
  2158. * both at the same time.
  2159. */
  2160. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2161. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  2162. qla2x00_get_data_rate(vha);
  2163. /* Determine what we need to do */
  2164. if (ha->current_topology == ISP_CFG_FL &&
  2165. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  2166. vha->flags.rscn_queue_overflow = 1;
  2167. set_bit(RSCN_UPDATE, &flags);
  2168. } else if (ha->current_topology == ISP_CFG_F &&
  2169. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  2170. vha->flags.rscn_queue_overflow = 1;
  2171. set_bit(RSCN_UPDATE, &flags);
  2172. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  2173. } else if (ha->current_topology == ISP_CFG_N) {
  2174. clear_bit(RSCN_UPDATE, &flags);
  2175. } else if (!vha->flags.online ||
  2176. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  2177. vha->flags.rscn_queue_overflow = 1;
  2178. set_bit(RSCN_UPDATE, &flags);
  2179. set_bit(LOCAL_LOOP_UPDATE, &flags);
  2180. }
  2181. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  2182. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2183. rval = QLA_FUNCTION_FAILED;
  2184. else
  2185. rval = qla2x00_configure_local_loop(vha);
  2186. }
  2187. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  2188. if (LOOP_TRANSITION(vha))
  2189. rval = QLA_FUNCTION_FAILED;
  2190. else
  2191. rval = qla2x00_configure_fabric(vha);
  2192. }
  2193. if (rval == QLA_SUCCESS) {
  2194. if (atomic_read(&vha->loop_down_timer) ||
  2195. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  2196. rval = QLA_FUNCTION_FAILED;
  2197. } else {
  2198. atomic_set(&vha->loop_state, LOOP_READY);
  2199. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  2200. }
  2201. }
  2202. if (rval) {
  2203. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  2204. __func__, vha->host_no));
  2205. } else {
  2206. DEBUG3(printk("%s: exiting normally\n", __func__));
  2207. }
  2208. /* Restore state if a resync event occurred during processing */
  2209. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  2210. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  2211. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2212. if (test_bit(RSCN_UPDATE, &save_flags)) {
  2213. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  2214. if (!IS_ALOGIO_CAPABLE(ha))
  2215. vha->flags.rscn_queue_overflow = 1;
  2216. }
  2217. }
  2218. return (rval);
  2219. }
  2220. /*
  2221. * qla2x00_configure_local_loop
  2222. * Updates Fibre Channel Device Database with local loop devices.
  2223. *
  2224. * Input:
  2225. * ha = adapter block pointer.
  2226. *
  2227. * Returns:
  2228. * 0 = success.
  2229. */
  2230. static int
  2231. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  2232. {
  2233. int rval, rval2;
  2234. int found_devs;
  2235. int found;
  2236. fc_port_t *fcport, *new_fcport;
  2237. uint16_t index;
  2238. uint16_t entries;
  2239. char *id_iter;
  2240. uint16_t loop_id;
  2241. uint8_t domain, area, al_pa;
  2242. struct qla_hw_data *ha = vha->hw;
  2243. found_devs = 0;
  2244. new_fcport = NULL;
  2245. entries = MAX_FIBRE_DEVICES;
  2246. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  2247. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  2248. /* Get list of logged in devices. */
  2249. memset(ha->gid_list, 0, GID_LIST_SIZE);
  2250. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  2251. &entries);
  2252. if (rval != QLA_SUCCESS)
  2253. goto cleanup_allocation;
  2254. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  2255. vha->host_no, entries));
  2256. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  2257. entries * sizeof(struct gid_list_info)));
  2258. /* Allocate temporary fcport for any new fcports discovered. */
  2259. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2260. if (new_fcport == NULL) {
  2261. rval = QLA_MEMORY_ALLOC_FAILED;
  2262. goto cleanup_allocation;
  2263. }
  2264. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2265. /*
  2266. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  2267. */
  2268. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2269. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  2270. fcport->port_type != FCT_BROADCAST &&
  2271. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2272. DEBUG(printk("scsi(%ld): Marking port lost, "
  2273. "loop_id=0x%04x\n",
  2274. vha->host_no, fcport->loop_id));
  2275. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2276. }
  2277. }
  2278. /* Add devices to port list. */
  2279. id_iter = (char *)ha->gid_list;
  2280. for (index = 0; index < entries; index++) {
  2281. domain = ((struct gid_list_info *)id_iter)->domain;
  2282. area = ((struct gid_list_info *)id_iter)->area;
  2283. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  2284. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  2285. loop_id = (uint16_t)
  2286. ((struct gid_list_info *)id_iter)->loop_id_2100;
  2287. else
  2288. loop_id = le16_to_cpu(
  2289. ((struct gid_list_info *)id_iter)->loop_id);
  2290. id_iter += ha->gid_list_info_size;
  2291. /* Bypass reserved domain fields. */
  2292. if ((domain & 0xf0) == 0xf0)
  2293. continue;
  2294. /* Bypass if not same domain and area of adapter. */
  2295. if (area && domain &&
  2296. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  2297. continue;
  2298. /* Bypass invalid local loop ID. */
  2299. if (loop_id > LAST_LOCAL_LOOP_ID)
  2300. continue;
  2301. /* Fill in member data. */
  2302. new_fcport->d_id.b.domain = domain;
  2303. new_fcport->d_id.b.area = area;
  2304. new_fcport->d_id.b.al_pa = al_pa;
  2305. new_fcport->loop_id = loop_id;
  2306. new_fcport->vp_idx = vha->vp_idx;
  2307. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  2308. if (rval2 != QLA_SUCCESS) {
  2309. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  2310. "information -- get_port_database=%x, "
  2311. "loop_id=0x%04x\n",
  2312. vha->host_no, rval2, new_fcport->loop_id));
  2313. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  2314. vha->host_no));
  2315. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2316. continue;
  2317. }
  2318. /* Check for matching device in port list. */
  2319. found = 0;
  2320. fcport = NULL;
  2321. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2322. if (memcmp(new_fcport->port_name, fcport->port_name,
  2323. WWN_SIZE))
  2324. continue;
  2325. fcport->flags &= ~FCF_FABRIC_DEVICE;
  2326. fcport->loop_id = new_fcport->loop_id;
  2327. fcport->port_type = new_fcport->port_type;
  2328. fcport->d_id.b24 = new_fcport->d_id.b24;
  2329. memcpy(fcport->node_name, new_fcport->node_name,
  2330. WWN_SIZE);
  2331. found++;
  2332. break;
  2333. }
  2334. if (!found) {
  2335. /* New device, add to fcports list. */
  2336. if (vha->vp_idx) {
  2337. new_fcport->vha = vha;
  2338. new_fcport->vp_idx = vha->vp_idx;
  2339. }
  2340. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  2341. /* Allocate a new replacement fcport. */
  2342. fcport = new_fcport;
  2343. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2344. if (new_fcport == NULL) {
  2345. rval = QLA_MEMORY_ALLOC_FAILED;
  2346. goto cleanup_allocation;
  2347. }
  2348. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2349. }
  2350. /* Base iIDMA settings on HBA port speed. */
  2351. fcport->fp_speed = ha->link_data_rate;
  2352. qla2x00_update_fcport(vha, fcport);
  2353. found_devs++;
  2354. }
  2355. cleanup_allocation:
  2356. kfree(new_fcport);
  2357. if (rval != QLA_SUCCESS) {
  2358. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  2359. "rval=%x\n", vha->host_no, rval));
  2360. }
  2361. return (rval);
  2362. }
  2363. static void
  2364. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2365. {
  2366. #define LS_UNKNOWN 2
  2367. static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
  2368. char *link_speed;
  2369. int rval;
  2370. uint16_t mb[4];
  2371. struct qla_hw_data *ha = vha->hw;
  2372. if (!IS_IIDMA_CAPABLE(ha))
  2373. return;
  2374. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  2375. fcport->fp_speed > ha->link_data_rate)
  2376. return;
  2377. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  2378. mb);
  2379. if (rval != QLA_SUCCESS) {
  2380. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  2381. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  2382. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  2383. fcport->port_name[2], fcport->port_name[3],
  2384. fcport->port_name[4], fcport->port_name[5],
  2385. fcport->port_name[6], fcport->port_name[7], rval,
  2386. fcport->fp_speed, mb[0], mb[1]));
  2387. } else {
  2388. link_speed = link_speeds[LS_UNKNOWN];
  2389. if (fcport->fp_speed < 5)
  2390. link_speed = link_speeds[fcport->fp_speed];
  2391. else if (fcport->fp_speed == 0x13)
  2392. link_speed = link_speeds[5];
  2393. DEBUG2(qla_printk(KERN_INFO, ha,
  2394. "iIDMA adjusted to %s GB/s on "
  2395. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  2396. link_speed, fcport->port_name[0],
  2397. fcport->port_name[1], fcport->port_name[2],
  2398. fcport->port_name[3], fcport->port_name[4],
  2399. fcport->port_name[5], fcport->port_name[6],
  2400. fcport->port_name[7]));
  2401. }
  2402. }
  2403. static void
  2404. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  2405. {
  2406. struct fc_rport_identifiers rport_ids;
  2407. struct fc_rport *rport;
  2408. struct qla_hw_data *ha = vha->hw;
  2409. qla2x00_rport_del(fcport);
  2410. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  2411. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  2412. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  2413. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  2414. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2415. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  2416. if (!rport) {
  2417. qla_printk(KERN_WARNING, ha,
  2418. "Unable to allocate fc remote port!\n");
  2419. return;
  2420. }
  2421. spin_lock_irq(fcport->vha->host->host_lock);
  2422. *((fc_port_t **)rport->dd_data) = fcport;
  2423. spin_unlock_irq(fcport->vha->host->host_lock);
  2424. rport->supported_classes = fcport->supported_classes;
  2425. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2426. if (fcport->port_type == FCT_INITIATOR)
  2427. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  2428. if (fcport->port_type == FCT_TARGET)
  2429. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  2430. fc_remote_port_rolechg(rport, rport_ids.roles);
  2431. }
  2432. /*
  2433. * qla2x00_update_fcport
  2434. * Updates device on list.
  2435. *
  2436. * Input:
  2437. * ha = adapter block pointer.
  2438. * fcport = port structure pointer.
  2439. *
  2440. * Return:
  2441. * 0 - Success
  2442. * BIT_0 - error
  2443. *
  2444. * Context:
  2445. * Kernel context.
  2446. */
  2447. void
  2448. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2449. {
  2450. struct qla_hw_data *ha = vha->hw;
  2451. fcport->vha = vha;
  2452. fcport->login_retry = 0;
  2453. fcport->port_login_retry_count = ha->port_down_retry_count *
  2454. PORT_RETRY_TIME;
  2455. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  2456. PORT_RETRY_TIME);
  2457. fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
  2458. qla2x00_iidma_fcport(vha, fcport);
  2459. atomic_set(&fcport->state, FCS_ONLINE);
  2460. qla2x00_reg_remote_port(vha, fcport);
  2461. }
  2462. /*
  2463. * qla2x00_configure_fabric
  2464. * Setup SNS devices with loop ID's.
  2465. *
  2466. * Input:
  2467. * ha = adapter block pointer.
  2468. *
  2469. * Returns:
  2470. * 0 = success.
  2471. * BIT_0 = error
  2472. */
  2473. static int
  2474. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2475. {
  2476. int rval, rval2;
  2477. fc_port_t *fcport, *fcptemp;
  2478. uint16_t next_loopid;
  2479. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2480. uint16_t loop_id;
  2481. LIST_HEAD(new_fcports);
  2482. struct qla_hw_data *ha = vha->hw;
  2483. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2484. /* If FL port exists, then SNS is present */
  2485. if (IS_FWI2_CAPABLE(ha))
  2486. loop_id = NPH_F_PORT;
  2487. else
  2488. loop_id = SNS_FL_PORT;
  2489. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2490. if (rval != QLA_SUCCESS) {
  2491. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2492. "Port\n", vha->host_no));
  2493. vha->device_flags &= ~SWITCH_FOUND;
  2494. return (QLA_SUCCESS);
  2495. }
  2496. vha->device_flags |= SWITCH_FOUND;
  2497. /* Mark devices that need re-synchronization. */
  2498. rval2 = qla2x00_device_resync(vha);
  2499. if (rval2 == QLA_RSCNS_HANDLED) {
  2500. /* No point doing the scan, just continue. */
  2501. return (QLA_SUCCESS);
  2502. }
  2503. do {
  2504. /* FDMI support. */
  2505. if (ql2xfdmienable &&
  2506. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2507. qla2x00_fdmi_register(vha);
  2508. /* Ensure we are logged into the SNS. */
  2509. if (IS_FWI2_CAPABLE(ha))
  2510. loop_id = NPH_SNS;
  2511. else
  2512. loop_id = SIMPLE_NAME_SERVER;
  2513. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2514. 0xfc, mb, BIT_1 | BIT_0);
  2515. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2516. DEBUG2(qla_printk(KERN_INFO, ha,
  2517. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2518. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2519. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2520. return (QLA_SUCCESS);
  2521. }
  2522. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2523. if (qla2x00_rft_id(vha)) {
  2524. /* EMPTY */
  2525. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2526. "TYPE failed.\n", vha->host_no));
  2527. }
  2528. if (qla2x00_rff_id(vha)) {
  2529. /* EMPTY */
  2530. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2531. "Features failed.\n", vha->host_no));
  2532. }
  2533. if (qla2x00_rnn_id(vha)) {
  2534. /* EMPTY */
  2535. DEBUG2(printk("scsi(%ld): Register Node Name "
  2536. "failed.\n", vha->host_no));
  2537. } else if (qla2x00_rsnn_nn(vha)) {
  2538. /* EMPTY */
  2539. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2540. "Node Name failed.\n", vha->host_no));
  2541. }
  2542. }
  2543. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2544. if (rval != QLA_SUCCESS)
  2545. break;
  2546. /*
  2547. * Logout all previous fabric devices marked lost, except
  2548. * FCP2 devices.
  2549. */
  2550. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2551. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2552. break;
  2553. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2554. continue;
  2555. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2556. qla2x00_mark_device_lost(vha, fcport,
  2557. ql2xplogiabsentdevice, 0);
  2558. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2559. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2560. fcport->port_type != FCT_INITIATOR &&
  2561. fcport->port_type != FCT_BROADCAST) {
  2562. ha->isp_ops->fabric_logout(vha,
  2563. fcport->loop_id,
  2564. fcport->d_id.b.domain,
  2565. fcport->d_id.b.area,
  2566. fcport->d_id.b.al_pa);
  2567. fcport->loop_id = FC_NO_LOOP_ID;
  2568. }
  2569. }
  2570. }
  2571. /* Starting free loop ID. */
  2572. next_loopid = ha->min_external_loopid;
  2573. /*
  2574. * Scan through our port list and login entries that need to be
  2575. * logged in.
  2576. */
  2577. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2578. if (atomic_read(&vha->loop_down_timer) ||
  2579. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2580. break;
  2581. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2582. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2583. continue;
  2584. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2585. fcport->loop_id = next_loopid;
  2586. rval = qla2x00_find_new_loop_id(
  2587. base_vha, fcport);
  2588. if (rval != QLA_SUCCESS) {
  2589. /* Ran out of IDs to use */
  2590. break;
  2591. }
  2592. }
  2593. /* Login and update database */
  2594. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2595. }
  2596. /* Exit if out of loop IDs. */
  2597. if (rval != QLA_SUCCESS) {
  2598. break;
  2599. }
  2600. /*
  2601. * Login and add the new devices to our port list.
  2602. */
  2603. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2604. if (atomic_read(&vha->loop_down_timer) ||
  2605. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2606. break;
  2607. /* Find a new loop ID to use. */
  2608. fcport->loop_id = next_loopid;
  2609. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2610. if (rval != QLA_SUCCESS) {
  2611. /* Ran out of IDs to use */
  2612. break;
  2613. }
  2614. /* Login and update database */
  2615. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2616. if (vha->vp_idx) {
  2617. fcport->vha = vha;
  2618. fcport->vp_idx = vha->vp_idx;
  2619. }
  2620. list_move_tail(&fcport->list, &vha->vp_fcports);
  2621. }
  2622. } while (0);
  2623. /* Free all new device structures not processed. */
  2624. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2625. list_del(&fcport->list);
  2626. kfree(fcport);
  2627. }
  2628. if (rval) {
  2629. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2630. "rval=%d\n", vha->host_no, rval));
  2631. }
  2632. return (rval);
  2633. }
  2634. /*
  2635. * qla2x00_find_all_fabric_devs
  2636. *
  2637. * Input:
  2638. * ha = adapter block pointer.
  2639. * dev = database device entry pointer.
  2640. *
  2641. * Returns:
  2642. * 0 = success.
  2643. *
  2644. * Context:
  2645. * Kernel context.
  2646. */
  2647. static int
  2648. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2649. struct list_head *new_fcports)
  2650. {
  2651. int rval;
  2652. uint16_t loop_id;
  2653. fc_port_t *fcport, *new_fcport, *fcptemp;
  2654. int found;
  2655. sw_info_t *swl;
  2656. int swl_idx;
  2657. int first_dev, last_dev;
  2658. port_id_t wrap = {}, nxt_d_id;
  2659. struct qla_hw_data *ha = vha->hw;
  2660. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2661. struct scsi_qla_host *tvp;
  2662. rval = QLA_SUCCESS;
  2663. /* Try GID_PT to get device list, else GAN. */
  2664. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2665. if (!swl) {
  2666. /*EMPTY*/
  2667. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2668. "on GA_NXT\n", vha->host_no));
  2669. } else {
  2670. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2671. kfree(swl);
  2672. swl = NULL;
  2673. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2674. kfree(swl);
  2675. swl = NULL;
  2676. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2677. kfree(swl);
  2678. swl = NULL;
  2679. } else if (ql2xiidmaenable &&
  2680. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2681. qla2x00_gpsc(vha, swl);
  2682. }
  2683. /* If other queries succeeded probe for FC-4 type */
  2684. if (swl)
  2685. qla2x00_gff_id(vha, swl);
  2686. }
  2687. swl_idx = 0;
  2688. /* Allocate temporary fcport for any new fcports discovered. */
  2689. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2690. if (new_fcport == NULL) {
  2691. kfree(swl);
  2692. return (QLA_MEMORY_ALLOC_FAILED);
  2693. }
  2694. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2695. /* Set start port ID scan at adapter ID. */
  2696. first_dev = 1;
  2697. last_dev = 0;
  2698. /* Starting free loop ID. */
  2699. loop_id = ha->min_external_loopid;
  2700. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2701. if (qla2x00_is_reserved_id(vha, loop_id))
  2702. continue;
  2703. if (ha->current_topology == ISP_CFG_FL &&
  2704. (atomic_read(&vha->loop_down_timer) ||
  2705. LOOP_TRANSITION(vha))) {
  2706. atomic_set(&vha->loop_down_timer, 0);
  2707. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2708. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2709. break;
  2710. }
  2711. if (swl != NULL) {
  2712. if (last_dev) {
  2713. wrap.b24 = new_fcport->d_id.b24;
  2714. } else {
  2715. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2716. memcpy(new_fcport->node_name,
  2717. swl[swl_idx].node_name, WWN_SIZE);
  2718. memcpy(new_fcport->port_name,
  2719. swl[swl_idx].port_name, WWN_SIZE);
  2720. memcpy(new_fcport->fabric_port_name,
  2721. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2722. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2723. new_fcport->fc4_type = swl[swl_idx].fc4_type;
  2724. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2725. last_dev = 1;
  2726. }
  2727. swl_idx++;
  2728. }
  2729. } else {
  2730. /* Send GA_NXT to the switch */
  2731. rval = qla2x00_ga_nxt(vha, new_fcport);
  2732. if (rval != QLA_SUCCESS) {
  2733. qla_printk(KERN_WARNING, ha,
  2734. "SNS scan failed -- assuming zero-entry "
  2735. "result...\n");
  2736. list_for_each_entry_safe(fcport, fcptemp,
  2737. new_fcports, list) {
  2738. list_del(&fcport->list);
  2739. kfree(fcport);
  2740. }
  2741. rval = QLA_SUCCESS;
  2742. break;
  2743. }
  2744. }
  2745. /* If wrap on switch device list, exit. */
  2746. if (first_dev) {
  2747. wrap.b24 = new_fcport->d_id.b24;
  2748. first_dev = 0;
  2749. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2750. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2751. vha->host_no, new_fcport->d_id.b.domain,
  2752. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2753. break;
  2754. }
  2755. /* Bypass if same physical adapter. */
  2756. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2757. continue;
  2758. /* Bypass virtual ports of the same host. */
  2759. found = 0;
  2760. if (ha->num_vhosts) {
  2761. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2762. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2763. found = 1;
  2764. break;
  2765. }
  2766. }
  2767. if (found)
  2768. continue;
  2769. }
  2770. /* Bypass if same domain and area of adapter. */
  2771. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2772. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2773. ISP_CFG_FL)
  2774. continue;
  2775. /* Bypass reserved domain fields. */
  2776. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2777. continue;
  2778. /* Bypass ports whose FCP-4 type is not FCP_SCSI */
  2779. if (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
  2780. new_fcport->fc4_type != FC4_TYPE_UNKNOWN)
  2781. continue;
  2782. /* Locate matching device in database. */
  2783. found = 0;
  2784. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2785. if (memcmp(new_fcport->port_name, fcport->port_name,
  2786. WWN_SIZE))
  2787. continue;
  2788. found++;
  2789. /* Update port state. */
  2790. memcpy(fcport->fabric_port_name,
  2791. new_fcport->fabric_port_name, WWN_SIZE);
  2792. fcport->fp_speed = new_fcport->fp_speed;
  2793. /*
  2794. * If address the same and state FCS_ONLINE, nothing
  2795. * changed.
  2796. */
  2797. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2798. atomic_read(&fcport->state) == FCS_ONLINE) {
  2799. break;
  2800. }
  2801. /*
  2802. * If device was not a fabric device before.
  2803. */
  2804. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2805. fcport->d_id.b24 = new_fcport->d_id.b24;
  2806. fcport->loop_id = FC_NO_LOOP_ID;
  2807. fcport->flags |= (FCF_FABRIC_DEVICE |
  2808. FCF_LOGIN_NEEDED);
  2809. break;
  2810. }
  2811. /*
  2812. * Port ID changed or device was marked to be updated;
  2813. * Log it out if still logged in and mark it for
  2814. * relogin later.
  2815. */
  2816. fcport->d_id.b24 = new_fcport->d_id.b24;
  2817. fcport->flags |= FCF_LOGIN_NEEDED;
  2818. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2819. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2820. fcport->port_type != FCT_INITIATOR &&
  2821. fcport->port_type != FCT_BROADCAST) {
  2822. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2823. fcport->d_id.b.domain, fcport->d_id.b.area,
  2824. fcport->d_id.b.al_pa);
  2825. fcport->loop_id = FC_NO_LOOP_ID;
  2826. }
  2827. break;
  2828. }
  2829. if (found)
  2830. continue;
  2831. /* If device was not in our fcports list, then add it. */
  2832. list_add_tail(&new_fcport->list, new_fcports);
  2833. /* Allocate a new replacement fcport. */
  2834. nxt_d_id.b24 = new_fcport->d_id.b24;
  2835. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2836. if (new_fcport == NULL) {
  2837. kfree(swl);
  2838. return (QLA_MEMORY_ALLOC_FAILED);
  2839. }
  2840. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2841. new_fcport->d_id.b24 = nxt_d_id.b24;
  2842. }
  2843. kfree(swl);
  2844. kfree(new_fcport);
  2845. return (rval);
  2846. }
  2847. /*
  2848. * qla2x00_find_new_loop_id
  2849. * Scan through our port list and find a new usable loop ID.
  2850. *
  2851. * Input:
  2852. * ha: adapter state pointer.
  2853. * dev: port structure pointer.
  2854. *
  2855. * Returns:
  2856. * qla2x00 local function return status code.
  2857. *
  2858. * Context:
  2859. * Kernel context.
  2860. */
  2861. static int
  2862. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2863. {
  2864. int rval;
  2865. int found;
  2866. fc_port_t *fcport;
  2867. uint16_t first_loop_id;
  2868. struct qla_hw_data *ha = vha->hw;
  2869. struct scsi_qla_host *vp;
  2870. struct scsi_qla_host *tvp;
  2871. rval = QLA_SUCCESS;
  2872. /* Save starting loop ID. */
  2873. first_loop_id = dev->loop_id;
  2874. for (;;) {
  2875. /* Skip loop ID if already used by adapter. */
  2876. if (dev->loop_id == vha->loop_id)
  2877. dev->loop_id++;
  2878. /* Skip reserved loop IDs. */
  2879. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2880. dev->loop_id++;
  2881. /* Reset loop ID if passed the end. */
  2882. if (dev->loop_id > ha->max_loop_id) {
  2883. /* first loop ID. */
  2884. dev->loop_id = ha->min_external_loopid;
  2885. }
  2886. /* Check for loop ID being already in use. */
  2887. found = 0;
  2888. fcport = NULL;
  2889. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2890. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2891. if (fcport->loop_id == dev->loop_id &&
  2892. fcport != dev) {
  2893. /* ID possibly in use */
  2894. found++;
  2895. break;
  2896. }
  2897. }
  2898. if (found)
  2899. break;
  2900. }
  2901. /* If not in use then it is free to use. */
  2902. if (!found) {
  2903. break;
  2904. }
  2905. /* ID in use. Try next value. */
  2906. dev->loop_id++;
  2907. /* If wrap around. No free ID to use. */
  2908. if (dev->loop_id == first_loop_id) {
  2909. dev->loop_id = FC_NO_LOOP_ID;
  2910. rval = QLA_FUNCTION_FAILED;
  2911. break;
  2912. }
  2913. }
  2914. return (rval);
  2915. }
  2916. /*
  2917. * qla2x00_device_resync
  2918. * Marks devices in the database that needs resynchronization.
  2919. *
  2920. * Input:
  2921. * ha = adapter block pointer.
  2922. *
  2923. * Context:
  2924. * Kernel context.
  2925. */
  2926. static int
  2927. qla2x00_device_resync(scsi_qla_host_t *vha)
  2928. {
  2929. int rval;
  2930. uint32_t mask;
  2931. fc_port_t *fcport;
  2932. uint32_t rscn_entry;
  2933. uint8_t rscn_out_iter;
  2934. uint8_t format;
  2935. port_id_t d_id = {};
  2936. rval = QLA_RSCNS_HANDLED;
  2937. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  2938. vha->flags.rscn_queue_overflow) {
  2939. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  2940. format = MSB(MSW(rscn_entry));
  2941. d_id.b.domain = LSB(MSW(rscn_entry));
  2942. d_id.b.area = MSB(LSW(rscn_entry));
  2943. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2944. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2945. "[%02x/%02x%02x%02x].\n",
  2946. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  2947. d_id.b.area, d_id.b.al_pa));
  2948. vha->rscn_out_ptr++;
  2949. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  2950. vha->rscn_out_ptr = 0;
  2951. /* Skip duplicate entries. */
  2952. for (rscn_out_iter = vha->rscn_out_ptr;
  2953. !vha->flags.rscn_queue_overflow &&
  2954. rscn_out_iter != vha->rscn_in_ptr;
  2955. rscn_out_iter = (rscn_out_iter ==
  2956. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2957. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  2958. break;
  2959. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2960. "entry found at [%d].\n", vha->host_no,
  2961. rscn_out_iter));
  2962. vha->rscn_out_ptr = rscn_out_iter;
  2963. }
  2964. /* Queue overflow, set switch default case. */
  2965. if (vha->flags.rscn_queue_overflow) {
  2966. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2967. "overflow.\n", vha->host_no));
  2968. format = 3;
  2969. vha->flags.rscn_queue_overflow = 0;
  2970. }
  2971. switch (format) {
  2972. case 0:
  2973. mask = 0xffffff;
  2974. break;
  2975. case 1:
  2976. mask = 0xffff00;
  2977. break;
  2978. case 2:
  2979. mask = 0xff0000;
  2980. break;
  2981. default:
  2982. mask = 0x0;
  2983. d_id.b24 = 0;
  2984. vha->rscn_out_ptr = vha->rscn_in_ptr;
  2985. break;
  2986. }
  2987. rval = QLA_SUCCESS;
  2988. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2989. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2990. (fcport->d_id.b24 & mask) != d_id.b24 ||
  2991. fcport->port_type == FCT_BROADCAST)
  2992. continue;
  2993. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2994. if (format != 3 ||
  2995. fcport->port_type != FCT_INITIATOR) {
  2996. qla2x00_mark_device_lost(vha, fcport,
  2997. 0, 0);
  2998. }
  2999. }
  3000. }
  3001. }
  3002. return (rval);
  3003. }
  3004. /*
  3005. * qla2x00_fabric_dev_login
  3006. * Login fabric target device and update FC port database.
  3007. *
  3008. * Input:
  3009. * ha: adapter state pointer.
  3010. * fcport: port structure list pointer.
  3011. * next_loopid: contains value of a new loop ID that can be used
  3012. * by the next login attempt.
  3013. *
  3014. * Returns:
  3015. * qla2x00 local function return status code.
  3016. *
  3017. * Context:
  3018. * Kernel context.
  3019. */
  3020. static int
  3021. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  3022. uint16_t *next_loopid)
  3023. {
  3024. int rval;
  3025. int retry;
  3026. uint8_t opts;
  3027. struct qla_hw_data *ha = vha->hw;
  3028. rval = QLA_SUCCESS;
  3029. retry = 0;
  3030. if (IS_ALOGIO_CAPABLE(ha)) {
  3031. if (fcport->flags & FCF_ASYNC_SENT)
  3032. return rval;
  3033. fcport->flags |= FCF_ASYNC_SENT;
  3034. rval = qla2x00_post_async_login_work(vha, fcport, NULL);
  3035. if (!rval)
  3036. return rval;
  3037. }
  3038. fcport->flags &= ~FCF_ASYNC_SENT;
  3039. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  3040. if (rval == QLA_SUCCESS) {
  3041. /* Send an ADISC to FCP2 devices.*/
  3042. opts = 0;
  3043. if (fcport->flags & FCF_FCP2_DEVICE)
  3044. opts |= BIT_1;
  3045. rval = qla2x00_get_port_database(vha, fcport, opts);
  3046. if (rval != QLA_SUCCESS) {
  3047. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3048. fcport->d_id.b.domain, fcport->d_id.b.area,
  3049. fcport->d_id.b.al_pa);
  3050. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  3051. } else {
  3052. qla2x00_update_fcport(vha, fcport);
  3053. }
  3054. }
  3055. return (rval);
  3056. }
  3057. /*
  3058. * qla2x00_fabric_login
  3059. * Issue fabric login command.
  3060. *
  3061. * Input:
  3062. * ha = adapter block pointer.
  3063. * device = pointer to FC device type structure.
  3064. *
  3065. * Returns:
  3066. * 0 - Login successfully
  3067. * 1 - Login failed
  3068. * 2 - Initiator device
  3069. * 3 - Fatal error
  3070. */
  3071. int
  3072. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  3073. uint16_t *next_loopid)
  3074. {
  3075. int rval;
  3076. int retry;
  3077. uint16_t tmp_loopid;
  3078. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3079. struct qla_hw_data *ha = vha->hw;
  3080. retry = 0;
  3081. tmp_loopid = 0;
  3082. for (;;) {
  3083. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  3084. "for port %02x%02x%02x.\n",
  3085. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  3086. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  3087. /* Login fcport on switch. */
  3088. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  3089. fcport->d_id.b.domain, fcport->d_id.b.area,
  3090. fcport->d_id.b.al_pa, mb, BIT_0);
  3091. if (mb[0] == MBS_PORT_ID_USED) {
  3092. /*
  3093. * Device has another loop ID. The firmware team
  3094. * recommends the driver perform an implicit login with
  3095. * the specified ID again. The ID we just used is save
  3096. * here so we return with an ID that can be tried by
  3097. * the next login.
  3098. */
  3099. retry++;
  3100. tmp_loopid = fcport->loop_id;
  3101. fcport->loop_id = mb[1];
  3102. DEBUG(printk("Fabric Login: port in use - next "
  3103. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  3104. fcport->loop_id, fcport->d_id.b.domain,
  3105. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  3106. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  3107. /*
  3108. * Login succeeded.
  3109. */
  3110. if (retry) {
  3111. /* A retry occurred before. */
  3112. *next_loopid = tmp_loopid;
  3113. } else {
  3114. /*
  3115. * No retry occurred before. Just increment the
  3116. * ID value for next login.
  3117. */
  3118. *next_loopid = (fcport->loop_id + 1);
  3119. }
  3120. if (mb[1] & BIT_0) {
  3121. fcport->port_type = FCT_INITIATOR;
  3122. } else {
  3123. fcport->port_type = FCT_TARGET;
  3124. if (mb[1] & BIT_1) {
  3125. fcport->flags |= FCF_FCP2_DEVICE;
  3126. }
  3127. }
  3128. if (mb[10] & BIT_0)
  3129. fcport->supported_classes |= FC_COS_CLASS2;
  3130. if (mb[10] & BIT_1)
  3131. fcport->supported_classes |= FC_COS_CLASS3;
  3132. rval = QLA_SUCCESS;
  3133. break;
  3134. } else if (mb[0] == MBS_LOOP_ID_USED) {
  3135. /*
  3136. * Loop ID already used, try next loop ID.
  3137. */
  3138. fcport->loop_id++;
  3139. rval = qla2x00_find_new_loop_id(vha, fcport);
  3140. if (rval != QLA_SUCCESS) {
  3141. /* Ran out of loop IDs to use */
  3142. break;
  3143. }
  3144. } else if (mb[0] == MBS_COMMAND_ERROR) {
  3145. /*
  3146. * Firmware possibly timed out during login. If NO
  3147. * retries are left to do then the device is declared
  3148. * dead.
  3149. */
  3150. *next_loopid = fcport->loop_id;
  3151. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3152. fcport->d_id.b.domain, fcport->d_id.b.area,
  3153. fcport->d_id.b.al_pa);
  3154. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  3155. rval = 1;
  3156. break;
  3157. } else {
  3158. /*
  3159. * unrecoverable / not handled error
  3160. */
  3161. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  3162. "loop_id=%x jiffies=%lx.\n",
  3163. __func__, vha->host_no, mb[0],
  3164. fcport->d_id.b.domain, fcport->d_id.b.area,
  3165. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  3166. *next_loopid = fcport->loop_id;
  3167. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3168. fcport->d_id.b.domain, fcport->d_id.b.area,
  3169. fcport->d_id.b.al_pa);
  3170. fcport->loop_id = FC_NO_LOOP_ID;
  3171. fcport->login_retry = 0;
  3172. rval = 3;
  3173. break;
  3174. }
  3175. }
  3176. return (rval);
  3177. }
  3178. /*
  3179. * qla2x00_local_device_login
  3180. * Issue local device login command.
  3181. *
  3182. * Input:
  3183. * ha = adapter block pointer.
  3184. * loop_id = loop id of device to login to.
  3185. *
  3186. * Returns (Where's the #define!!!!):
  3187. * 0 - Login successfully
  3188. * 1 - Login failed
  3189. * 3 - Fatal error
  3190. */
  3191. int
  3192. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  3193. {
  3194. int rval;
  3195. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3196. memset(mb, 0, sizeof(mb));
  3197. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  3198. if (rval == QLA_SUCCESS) {
  3199. /* Interrogate mailbox registers for any errors */
  3200. if (mb[0] == MBS_COMMAND_ERROR)
  3201. rval = 1;
  3202. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  3203. /* device not in PCB table */
  3204. rval = 3;
  3205. }
  3206. return (rval);
  3207. }
  3208. /*
  3209. * qla2x00_loop_resync
  3210. * Resync with fibre channel devices.
  3211. *
  3212. * Input:
  3213. * ha = adapter block pointer.
  3214. *
  3215. * Returns:
  3216. * 0 = success
  3217. */
  3218. int
  3219. qla2x00_loop_resync(scsi_qla_host_t *vha)
  3220. {
  3221. int rval = QLA_SUCCESS;
  3222. uint32_t wait_time;
  3223. struct req_que *req;
  3224. struct rsp_que *rsp;
  3225. if (vha->hw->flags.cpu_affinity_enabled)
  3226. req = vha->hw->req_q_map[0];
  3227. else
  3228. req = vha->req;
  3229. rsp = req->rsp;
  3230. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3231. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3232. if (vha->flags.online) {
  3233. if (!(rval = qla2x00_fw_ready(vha))) {
  3234. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3235. wait_time = 256;
  3236. do {
  3237. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3238. /* Issue a marker after FW becomes ready. */
  3239. qla2x00_marker(vha, req, rsp, 0, 0,
  3240. MK_SYNC_ALL);
  3241. vha->marker_needed = 0;
  3242. /* Remap devices on Loop. */
  3243. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3244. qla2x00_configure_loop(vha);
  3245. wait_time--;
  3246. } while (!atomic_read(&vha->loop_down_timer) &&
  3247. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3248. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3249. &vha->dpc_flags)));
  3250. }
  3251. }
  3252. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3253. return (QLA_FUNCTION_FAILED);
  3254. if (rval)
  3255. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  3256. return (rval);
  3257. }
  3258. void
  3259. qla2x00_update_fcports(scsi_qla_host_t *base_vha)
  3260. {
  3261. fc_port_t *fcport;
  3262. struct scsi_qla_host *tvp, *vha;
  3263. /* Go with deferred removal of rport references. */
  3264. list_for_each_entry_safe(vha, tvp, &base_vha->hw->vp_list, list)
  3265. list_for_each_entry(fcport, &vha->vp_fcports, list)
  3266. if (fcport && fcport->drport &&
  3267. atomic_read(&fcport->state) != FCS_UNCONFIGURED)
  3268. qla2x00_rport_del(fcport);
  3269. }
  3270. void
  3271. qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
  3272. {
  3273. struct qla_hw_data *ha = vha->hw;
  3274. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  3275. struct scsi_qla_host *tvp;
  3276. vha->flags.online = 0;
  3277. ha->flags.chip_reset_done = 0;
  3278. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  3279. ha->qla_stats.total_isp_aborts++;
  3280. qla_printk(KERN_INFO, ha,
  3281. "Performing ISP error recovery - ha= %p.\n", ha);
  3282. /* Chip reset does not apply to 82XX */
  3283. if (!IS_QLA82XX(ha))
  3284. ha->isp_ops->reset_chip(vha);
  3285. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  3286. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  3287. atomic_set(&vha->loop_state, LOOP_DOWN);
  3288. qla2x00_mark_all_devices_lost(vha, 0);
  3289. list_for_each_entry_safe(vp, tvp, &base_vha->hw->vp_list, list)
  3290. qla2x00_mark_all_devices_lost(vp, 0);
  3291. } else {
  3292. if (!atomic_read(&vha->loop_down_timer))
  3293. atomic_set(&vha->loop_down_timer,
  3294. LOOP_DOWN_TIME);
  3295. }
  3296. /* Make sure for ISP 82XX IO DMA is complete */
  3297. if (IS_QLA82XX(ha))
  3298. qla82xx_wait_for_pending_commands(vha);
  3299. /* Requeue all commands in outstanding command list. */
  3300. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  3301. }
  3302. /*
  3303. * qla2x00_abort_isp
  3304. * Resets ISP and aborts all outstanding commands.
  3305. *
  3306. * Input:
  3307. * ha = adapter block pointer.
  3308. *
  3309. * Returns:
  3310. * 0 = success
  3311. */
  3312. int
  3313. qla2x00_abort_isp(scsi_qla_host_t *vha)
  3314. {
  3315. int rval;
  3316. uint8_t status = 0;
  3317. struct qla_hw_data *ha = vha->hw;
  3318. struct scsi_qla_host *vp;
  3319. struct scsi_qla_host *tvp;
  3320. struct req_que *req = ha->req_q_map[0];
  3321. if (vha->flags.online) {
  3322. qla2x00_abort_isp_cleanup(vha);
  3323. if (unlikely(pci_channel_offline(ha->pdev) &&
  3324. ha->flags.pci_channel_io_perm_failure)) {
  3325. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3326. status = 0;
  3327. return status;
  3328. }
  3329. ha->isp_ops->get_flash_version(vha, req->ring);
  3330. ha->isp_ops->nvram_config(vha);
  3331. if (!qla2x00_restart_isp(vha)) {
  3332. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3333. if (!atomic_read(&vha->loop_down_timer)) {
  3334. /*
  3335. * Issue marker command only when we are going
  3336. * to start the I/O .
  3337. */
  3338. vha->marker_needed = 1;
  3339. }
  3340. vha->flags.online = 1;
  3341. ha->isp_ops->enable_intrs(ha);
  3342. ha->isp_abort_cnt = 0;
  3343. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3344. if (IS_QLA81XX(ha))
  3345. qla2x00_get_fw_version(vha,
  3346. &ha->fw_major_version,
  3347. &ha->fw_minor_version,
  3348. &ha->fw_subminor_version,
  3349. &ha->fw_attributes, &ha->fw_memory_size,
  3350. ha->mpi_version, &ha->mpi_capabilities,
  3351. ha->phy_version);
  3352. if (ha->fce) {
  3353. ha->flags.fce_enabled = 1;
  3354. memset(ha->fce, 0,
  3355. fce_calc_size(ha->fce_bufs));
  3356. rval = qla2x00_enable_fce_trace(vha,
  3357. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  3358. &ha->fce_bufs);
  3359. if (rval) {
  3360. qla_printk(KERN_WARNING, ha,
  3361. "Unable to reinitialize FCE "
  3362. "(%d).\n", rval);
  3363. ha->flags.fce_enabled = 0;
  3364. }
  3365. }
  3366. if (ha->eft) {
  3367. memset(ha->eft, 0, EFT_SIZE);
  3368. rval = qla2x00_enable_eft_trace(vha,
  3369. ha->eft_dma, EFT_NUM_BUFFERS);
  3370. if (rval) {
  3371. qla_printk(KERN_WARNING, ha,
  3372. "Unable to reinitialize EFT "
  3373. "(%d).\n", rval);
  3374. }
  3375. }
  3376. } else { /* failed the ISP abort */
  3377. vha->flags.online = 1;
  3378. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  3379. if (ha->isp_abort_cnt == 0) {
  3380. qla_printk(KERN_WARNING, ha,
  3381. "ISP error recovery failed - "
  3382. "board disabled\n");
  3383. /*
  3384. * The next call disables the board
  3385. * completely.
  3386. */
  3387. ha->isp_ops->reset_adapter(vha);
  3388. vha->flags.online = 0;
  3389. clear_bit(ISP_ABORT_RETRY,
  3390. &vha->dpc_flags);
  3391. status = 0;
  3392. } else { /* schedule another ISP abort */
  3393. ha->isp_abort_cnt--;
  3394. DEBUG(printk("qla%ld: ISP abort - "
  3395. "retry remaining %d\n",
  3396. vha->host_no, ha->isp_abort_cnt));
  3397. status = 1;
  3398. }
  3399. } else {
  3400. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  3401. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  3402. "- retrying (%d) more times\n",
  3403. vha->host_no, ha->isp_abort_cnt));
  3404. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3405. status = 1;
  3406. }
  3407. }
  3408. }
  3409. if (!status) {
  3410. DEBUG(printk(KERN_INFO
  3411. "qla2x00_abort_isp(%ld): succeeded.\n",
  3412. vha->host_no));
  3413. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  3414. if (vp->vp_idx)
  3415. qla2x00_vp_abort_isp(vp);
  3416. }
  3417. } else {
  3418. qla_printk(KERN_INFO, ha,
  3419. "qla2x00_abort_isp: **** FAILED ****\n");
  3420. }
  3421. return(status);
  3422. }
  3423. /*
  3424. * qla2x00_restart_isp
  3425. * restarts the ISP after a reset
  3426. *
  3427. * Input:
  3428. * ha = adapter block pointer.
  3429. *
  3430. * Returns:
  3431. * 0 = success
  3432. */
  3433. static int
  3434. qla2x00_restart_isp(scsi_qla_host_t *vha)
  3435. {
  3436. int status = 0;
  3437. uint32_t wait_time;
  3438. struct qla_hw_data *ha = vha->hw;
  3439. struct req_que *req = ha->req_q_map[0];
  3440. struct rsp_que *rsp = ha->rsp_q_map[0];
  3441. /* If firmware needs to be loaded */
  3442. if (qla2x00_isp_firmware(vha)) {
  3443. vha->flags.online = 0;
  3444. status = ha->isp_ops->chip_diag(vha);
  3445. if (!status)
  3446. status = qla2x00_setup_chip(vha);
  3447. }
  3448. if (!status && !(status = qla2x00_init_rings(vha))) {
  3449. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3450. ha->flags.chip_reset_done = 1;
  3451. /* Initialize the queues in use */
  3452. qla25xx_init_queues(ha);
  3453. status = qla2x00_fw_ready(vha);
  3454. if (!status) {
  3455. DEBUG(printk("%s(): Start configure loop, "
  3456. "status = %d\n", __func__, status));
  3457. /* Issue a marker after FW becomes ready. */
  3458. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3459. vha->flags.online = 1;
  3460. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3461. wait_time = 256;
  3462. do {
  3463. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3464. qla2x00_configure_loop(vha);
  3465. wait_time--;
  3466. } while (!atomic_read(&vha->loop_down_timer) &&
  3467. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3468. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3469. &vha->dpc_flags)));
  3470. }
  3471. /* if no cable then assume it's good */
  3472. if ((vha->device_flags & DFLG_NO_CABLE))
  3473. status = 0;
  3474. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  3475. __func__,
  3476. status));
  3477. }
  3478. return (status);
  3479. }
  3480. static int
  3481. qla25xx_init_queues(struct qla_hw_data *ha)
  3482. {
  3483. struct rsp_que *rsp = NULL;
  3484. struct req_que *req = NULL;
  3485. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3486. int ret = -1;
  3487. int i;
  3488. for (i = 1; i < ha->max_rsp_queues; i++) {
  3489. rsp = ha->rsp_q_map[i];
  3490. if (rsp) {
  3491. rsp->options &= ~BIT_0;
  3492. ret = qla25xx_init_rsp_que(base_vha, rsp);
  3493. if (ret != QLA_SUCCESS)
  3494. DEBUG2_17(printk(KERN_WARNING
  3495. "%s Rsp que:%d init failed\n", __func__,
  3496. rsp->id));
  3497. else
  3498. DEBUG2_17(printk(KERN_INFO
  3499. "%s Rsp que:%d inited\n", __func__,
  3500. rsp->id));
  3501. }
  3502. }
  3503. for (i = 1; i < ha->max_req_queues; i++) {
  3504. req = ha->req_q_map[i];
  3505. if (req) {
  3506. /* Clear outstanding commands array. */
  3507. req->options &= ~BIT_0;
  3508. ret = qla25xx_init_req_que(base_vha, req);
  3509. if (ret != QLA_SUCCESS)
  3510. DEBUG2_17(printk(KERN_WARNING
  3511. "%s Req que:%d init failed\n", __func__,
  3512. req->id));
  3513. else
  3514. DEBUG2_17(printk(KERN_WARNING
  3515. "%s Req que:%d inited\n", __func__,
  3516. req->id));
  3517. }
  3518. }
  3519. return ret;
  3520. }
  3521. /*
  3522. * qla2x00_reset_adapter
  3523. * Reset adapter.
  3524. *
  3525. * Input:
  3526. * ha = adapter block pointer.
  3527. */
  3528. void
  3529. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3530. {
  3531. unsigned long flags = 0;
  3532. struct qla_hw_data *ha = vha->hw;
  3533. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3534. vha->flags.online = 0;
  3535. ha->isp_ops->disable_intrs(ha);
  3536. spin_lock_irqsave(&ha->hardware_lock, flags);
  3537. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3538. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3539. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3540. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3541. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3542. }
  3543. void
  3544. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3545. {
  3546. unsigned long flags = 0;
  3547. struct qla_hw_data *ha = vha->hw;
  3548. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3549. if (IS_QLA82XX(ha))
  3550. return;
  3551. vha->flags.online = 0;
  3552. ha->isp_ops->disable_intrs(ha);
  3553. spin_lock_irqsave(&ha->hardware_lock, flags);
  3554. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3555. RD_REG_DWORD(&reg->hccr);
  3556. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3557. RD_REG_DWORD(&reg->hccr);
  3558. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3559. if (IS_NOPOLLING_TYPE(ha))
  3560. ha->isp_ops->enable_intrs(ha);
  3561. }
  3562. /* On sparc systems, obtain port and node WWN from firmware
  3563. * properties.
  3564. */
  3565. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3566. struct nvram_24xx *nv)
  3567. {
  3568. #ifdef CONFIG_SPARC
  3569. struct qla_hw_data *ha = vha->hw;
  3570. struct pci_dev *pdev = ha->pdev;
  3571. struct device_node *dp = pci_device_to_OF_node(pdev);
  3572. const u8 *val;
  3573. int len;
  3574. val = of_get_property(dp, "port-wwn", &len);
  3575. if (val && len >= WWN_SIZE)
  3576. memcpy(nv->port_name, val, WWN_SIZE);
  3577. val = of_get_property(dp, "node-wwn", &len);
  3578. if (val && len >= WWN_SIZE)
  3579. memcpy(nv->node_name, val, WWN_SIZE);
  3580. #endif
  3581. }
  3582. int
  3583. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3584. {
  3585. int rval;
  3586. struct init_cb_24xx *icb;
  3587. struct nvram_24xx *nv;
  3588. uint32_t *dptr;
  3589. uint8_t *dptr1, *dptr2;
  3590. uint32_t chksum;
  3591. uint16_t cnt;
  3592. struct qla_hw_data *ha = vha->hw;
  3593. rval = QLA_SUCCESS;
  3594. icb = (struct init_cb_24xx *)ha->init_cb;
  3595. nv = ha->nvram;
  3596. /* Determine NVRAM starting address. */
  3597. if (ha->flags.port0) {
  3598. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3599. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3600. } else {
  3601. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3602. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3603. }
  3604. ha->nvram_size = sizeof(struct nvram_24xx);
  3605. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3606. if (IS_QLA82XX(ha))
  3607. ha->vpd_size = FA_VPD_SIZE_82XX;
  3608. /* Get VPD data into cache */
  3609. ha->vpd = ha->nvram + VPD_OFFSET;
  3610. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3611. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3612. /* Get NVRAM data into cache and calculate checksum. */
  3613. dptr = (uint32_t *)nv;
  3614. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3615. ha->nvram_size);
  3616. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3617. chksum += le32_to_cpu(*dptr++);
  3618. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3619. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3620. /* Bad NVRAM data, set defaults parameters. */
  3621. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3622. || nv->id[3] != ' ' ||
  3623. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3624. /* Reset NVRAM data. */
  3625. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3626. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3627. le16_to_cpu(nv->nvram_version));
  3628. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3629. "invalid -- WWPN) defaults.\n");
  3630. /*
  3631. * Set default initialization control block.
  3632. */
  3633. memset(nv, 0, ha->nvram_size);
  3634. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3635. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3636. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3637. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3638. nv->exchange_count = __constant_cpu_to_le16(0);
  3639. nv->hard_address = __constant_cpu_to_le16(124);
  3640. nv->port_name[0] = 0x21;
  3641. nv->port_name[1] = 0x00 + ha->port_no;
  3642. nv->port_name[2] = 0x00;
  3643. nv->port_name[3] = 0xe0;
  3644. nv->port_name[4] = 0x8b;
  3645. nv->port_name[5] = 0x1c;
  3646. nv->port_name[6] = 0x55;
  3647. nv->port_name[7] = 0x86;
  3648. nv->node_name[0] = 0x20;
  3649. nv->node_name[1] = 0x00;
  3650. nv->node_name[2] = 0x00;
  3651. nv->node_name[3] = 0xe0;
  3652. nv->node_name[4] = 0x8b;
  3653. nv->node_name[5] = 0x1c;
  3654. nv->node_name[6] = 0x55;
  3655. nv->node_name[7] = 0x86;
  3656. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3657. nv->login_retry_count = __constant_cpu_to_le16(8);
  3658. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3659. nv->login_timeout = __constant_cpu_to_le16(0);
  3660. nv->firmware_options_1 =
  3661. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3662. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3663. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3664. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3665. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3666. nv->efi_parameters = __constant_cpu_to_le32(0);
  3667. nv->reset_delay = 5;
  3668. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3669. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3670. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3671. rval = 1;
  3672. }
  3673. /* Reset Initialization control block */
  3674. memset(icb, 0, ha->init_cb_size);
  3675. /* Copy 1st segment. */
  3676. dptr1 = (uint8_t *)icb;
  3677. dptr2 = (uint8_t *)&nv->version;
  3678. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3679. while (cnt--)
  3680. *dptr1++ = *dptr2++;
  3681. icb->login_retry_count = nv->login_retry_count;
  3682. icb->link_down_on_nos = nv->link_down_on_nos;
  3683. /* Copy 2nd segment. */
  3684. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3685. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3686. cnt = (uint8_t *)&icb->reserved_3 -
  3687. (uint8_t *)&icb->interrupt_delay_timer;
  3688. while (cnt--)
  3689. *dptr1++ = *dptr2++;
  3690. /*
  3691. * Setup driver NVRAM options.
  3692. */
  3693. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3694. "QLA2462");
  3695. /* Use alternate WWN? */
  3696. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3697. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3698. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3699. }
  3700. /* Prepare nodename */
  3701. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3702. /*
  3703. * Firmware will apply the following mask if the nodename was
  3704. * not provided.
  3705. */
  3706. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3707. icb->node_name[0] &= 0xF0;
  3708. }
  3709. /* Set host adapter parameters. */
  3710. ha->flags.disable_risc_code_load = 0;
  3711. ha->flags.enable_lip_reset = 0;
  3712. ha->flags.enable_lip_full_login =
  3713. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3714. ha->flags.enable_target_reset =
  3715. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3716. ha->flags.enable_led_scheme = 0;
  3717. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3718. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3719. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3720. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3721. sizeof(ha->fw_seriallink_options24));
  3722. /* save HBA serial number */
  3723. ha->serial0 = icb->port_name[5];
  3724. ha->serial1 = icb->port_name[6];
  3725. ha->serial2 = icb->port_name[7];
  3726. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3727. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3728. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3729. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3730. /* Set minimum login_timeout to 4 seconds. */
  3731. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3732. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3733. if (le16_to_cpu(nv->login_timeout) < 4)
  3734. nv->login_timeout = __constant_cpu_to_le16(4);
  3735. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3736. icb->login_timeout = nv->login_timeout;
  3737. /* Set minimum RATOV to 100 tenths of a second. */
  3738. ha->r_a_tov = 100;
  3739. ha->loop_reset_delay = nv->reset_delay;
  3740. /* Link Down Timeout = 0:
  3741. *
  3742. * When Port Down timer expires we will start returning
  3743. * I/O's to OS with "DID_NO_CONNECT".
  3744. *
  3745. * Link Down Timeout != 0:
  3746. *
  3747. * The driver waits for the link to come up after link down
  3748. * before returning I/Os to OS with "DID_NO_CONNECT".
  3749. */
  3750. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3751. ha->loop_down_abort_time =
  3752. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3753. } else {
  3754. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3755. ha->loop_down_abort_time =
  3756. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3757. }
  3758. /* Need enough time to try and get the port back. */
  3759. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3760. if (qlport_down_retry)
  3761. ha->port_down_retry_count = qlport_down_retry;
  3762. /* Set login_retry_count */
  3763. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3764. if (ha->port_down_retry_count ==
  3765. le16_to_cpu(nv->port_down_retry_count) &&
  3766. ha->port_down_retry_count > 3)
  3767. ha->login_retry_count = ha->port_down_retry_count;
  3768. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3769. ha->login_retry_count = ha->port_down_retry_count;
  3770. if (ql2xloginretrycount)
  3771. ha->login_retry_count = ql2xloginretrycount;
  3772. /* Enable ZIO. */
  3773. if (!vha->flags.init_done) {
  3774. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3775. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3776. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3777. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3778. }
  3779. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3780. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3781. vha->flags.process_response_queue = 0;
  3782. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3783. ha->zio_mode = QLA_ZIO_MODE_6;
  3784. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3785. "(%d us).\n", vha->host_no, ha->zio_mode,
  3786. ha->zio_timer * 100));
  3787. qla_printk(KERN_INFO, ha,
  3788. "ZIO mode %d enabled; timer delay (%d us).\n",
  3789. ha->zio_mode, ha->zio_timer * 100);
  3790. icb->firmware_options_2 |= cpu_to_le32(
  3791. (uint32_t)ha->zio_mode);
  3792. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3793. vha->flags.process_response_queue = 1;
  3794. }
  3795. if (rval) {
  3796. DEBUG2_3(printk(KERN_WARNING
  3797. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3798. }
  3799. return (rval);
  3800. }
  3801. static int
  3802. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
  3803. uint32_t faddr)
  3804. {
  3805. int rval = QLA_SUCCESS;
  3806. int segments, fragment;
  3807. uint32_t *dcode, dlen;
  3808. uint32_t risc_addr;
  3809. uint32_t risc_size;
  3810. uint32_t i;
  3811. struct qla_hw_data *ha = vha->hw;
  3812. struct req_que *req = ha->req_q_map[0];
  3813. qla_printk(KERN_INFO, ha,
  3814. "FW: Loading from flash (%x)...\n", faddr);
  3815. rval = QLA_SUCCESS;
  3816. segments = FA_RISC_CODE_SEGMENTS;
  3817. dcode = (uint32_t *)req->ring;
  3818. *srisc_addr = 0;
  3819. /* Validate firmware image by checking version. */
  3820. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3821. for (i = 0; i < 4; i++)
  3822. dcode[i] = be32_to_cpu(dcode[i]);
  3823. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3824. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3825. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3826. dcode[3] == 0)) {
  3827. qla_printk(KERN_WARNING, ha,
  3828. "Unable to verify integrity of flash firmware image!\n");
  3829. qla_printk(KERN_WARNING, ha,
  3830. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3831. dcode[1], dcode[2], dcode[3]);
  3832. return QLA_FUNCTION_FAILED;
  3833. }
  3834. while (segments && rval == QLA_SUCCESS) {
  3835. /* Read segment's load information. */
  3836. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  3837. risc_addr = be32_to_cpu(dcode[2]);
  3838. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3839. risc_size = be32_to_cpu(dcode[3]);
  3840. fragment = 0;
  3841. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3842. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3843. if (dlen > risc_size)
  3844. dlen = risc_size;
  3845. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3846. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3847. vha->host_no, risc_addr, dlen, faddr));
  3848. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  3849. for (i = 0; i < dlen; i++)
  3850. dcode[i] = swab32(dcode[i]);
  3851. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3852. dlen);
  3853. if (rval) {
  3854. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3855. "segment %d of firmware\n", vha->host_no,
  3856. fragment));
  3857. qla_printk(KERN_WARNING, ha,
  3858. "[ERROR] Failed to load segment %d of "
  3859. "firmware\n", fragment);
  3860. break;
  3861. }
  3862. faddr += dlen;
  3863. risc_addr += dlen;
  3864. risc_size -= dlen;
  3865. fragment++;
  3866. }
  3867. /* Next segment. */
  3868. segments--;
  3869. }
  3870. return rval;
  3871. }
  3872. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3873. int
  3874. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3875. {
  3876. int rval;
  3877. int i, fragment;
  3878. uint16_t *wcode, *fwcode;
  3879. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3880. struct fw_blob *blob;
  3881. struct qla_hw_data *ha = vha->hw;
  3882. struct req_que *req = ha->req_q_map[0];
  3883. /* Load firmware blob. */
  3884. blob = qla2x00_request_firmware(vha);
  3885. if (!blob) {
  3886. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3887. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3888. "from: " QLA_FW_URL ".\n");
  3889. return QLA_FUNCTION_FAILED;
  3890. }
  3891. rval = QLA_SUCCESS;
  3892. wcode = (uint16_t *)req->ring;
  3893. *srisc_addr = 0;
  3894. fwcode = (uint16_t *)blob->fw->data;
  3895. fwclen = 0;
  3896. /* Validate firmware image by checking version. */
  3897. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3898. qla_printk(KERN_WARNING, ha,
  3899. "Unable to verify integrity of firmware image (%Zd)!\n",
  3900. blob->fw->size);
  3901. goto fail_fw_integrity;
  3902. }
  3903. for (i = 0; i < 4; i++)
  3904. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3905. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3906. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3907. wcode[2] == 0 && wcode[3] == 0)) {
  3908. qla_printk(KERN_WARNING, ha,
  3909. "Unable to verify integrity of firmware image!\n");
  3910. qla_printk(KERN_WARNING, ha,
  3911. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3912. wcode[1], wcode[2], wcode[3]);
  3913. goto fail_fw_integrity;
  3914. }
  3915. seg = blob->segs;
  3916. while (*seg && rval == QLA_SUCCESS) {
  3917. risc_addr = *seg;
  3918. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3919. risc_size = be16_to_cpu(fwcode[3]);
  3920. /* Validate firmware image size. */
  3921. fwclen += risc_size * sizeof(uint16_t);
  3922. if (blob->fw->size < fwclen) {
  3923. qla_printk(KERN_WARNING, ha,
  3924. "Unable to verify integrity of firmware image "
  3925. "(%Zd)!\n", blob->fw->size);
  3926. goto fail_fw_integrity;
  3927. }
  3928. fragment = 0;
  3929. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3930. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3931. if (wlen > risc_size)
  3932. wlen = risc_size;
  3933. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3934. "addr %x, number of words 0x%x.\n", vha->host_no,
  3935. risc_addr, wlen));
  3936. for (i = 0; i < wlen; i++)
  3937. wcode[i] = swab16(fwcode[i]);
  3938. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3939. wlen);
  3940. if (rval) {
  3941. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3942. "segment %d of firmware\n", vha->host_no,
  3943. fragment));
  3944. qla_printk(KERN_WARNING, ha,
  3945. "[ERROR] Failed to load segment %d of "
  3946. "firmware\n", fragment);
  3947. break;
  3948. }
  3949. fwcode += wlen;
  3950. risc_addr += wlen;
  3951. risc_size -= wlen;
  3952. fragment++;
  3953. }
  3954. /* Next segment. */
  3955. seg++;
  3956. }
  3957. return rval;
  3958. fail_fw_integrity:
  3959. return QLA_FUNCTION_FAILED;
  3960. }
  3961. static int
  3962. qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3963. {
  3964. int rval;
  3965. int segments, fragment;
  3966. uint32_t *dcode, dlen;
  3967. uint32_t risc_addr;
  3968. uint32_t risc_size;
  3969. uint32_t i;
  3970. struct fw_blob *blob;
  3971. uint32_t *fwcode, fwclen;
  3972. struct qla_hw_data *ha = vha->hw;
  3973. struct req_que *req = ha->req_q_map[0];
  3974. /* Load firmware blob. */
  3975. blob = qla2x00_request_firmware(vha);
  3976. if (!blob) {
  3977. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3978. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3979. "from: " QLA_FW_URL ".\n");
  3980. return QLA_FUNCTION_FAILED;
  3981. }
  3982. qla_printk(KERN_INFO, ha,
  3983. "FW: Loading via request-firmware...\n");
  3984. rval = QLA_SUCCESS;
  3985. segments = FA_RISC_CODE_SEGMENTS;
  3986. dcode = (uint32_t *)req->ring;
  3987. *srisc_addr = 0;
  3988. fwcode = (uint32_t *)blob->fw->data;
  3989. fwclen = 0;
  3990. /* Validate firmware image by checking version. */
  3991. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  3992. qla_printk(KERN_WARNING, ha,
  3993. "Unable to verify integrity of firmware image (%Zd)!\n",
  3994. blob->fw->size);
  3995. goto fail_fw_integrity;
  3996. }
  3997. for (i = 0; i < 4; i++)
  3998. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  3999. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  4000. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  4001. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  4002. dcode[3] == 0)) {
  4003. qla_printk(KERN_WARNING, ha,
  4004. "Unable to verify integrity of firmware image!\n");
  4005. qla_printk(KERN_WARNING, ha,
  4006. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  4007. dcode[1], dcode[2], dcode[3]);
  4008. goto fail_fw_integrity;
  4009. }
  4010. while (segments && rval == QLA_SUCCESS) {
  4011. risc_addr = be32_to_cpu(fwcode[2]);
  4012. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  4013. risc_size = be32_to_cpu(fwcode[3]);
  4014. /* Validate firmware image size. */
  4015. fwclen += risc_size * sizeof(uint32_t);
  4016. if (blob->fw->size < fwclen) {
  4017. qla_printk(KERN_WARNING, ha,
  4018. "Unable to verify integrity of firmware image "
  4019. "(%Zd)!\n", blob->fw->size);
  4020. goto fail_fw_integrity;
  4021. }
  4022. fragment = 0;
  4023. while (risc_size > 0 && rval == QLA_SUCCESS) {
  4024. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  4025. if (dlen > risc_size)
  4026. dlen = risc_size;
  4027. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  4028. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  4029. risc_addr, dlen));
  4030. for (i = 0; i < dlen; i++)
  4031. dcode[i] = swab32(fwcode[i]);
  4032. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  4033. dlen);
  4034. if (rval) {
  4035. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  4036. "segment %d of firmware\n", vha->host_no,
  4037. fragment));
  4038. qla_printk(KERN_WARNING, ha,
  4039. "[ERROR] Failed to load segment %d of "
  4040. "firmware\n", fragment);
  4041. break;
  4042. }
  4043. fwcode += dlen;
  4044. risc_addr += dlen;
  4045. risc_size -= dlen;
  4046. fragment++;
  4047. }
  4048. /* Next segment. */
  4049. segments--;
  4050. }
  4051. return rval;
  4052. fail_fw_integrity:
  4053. return QLA_FUNCTION_FAILED;
  4054. }
  4055. int
  4056. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4057. {
  4058. int rval;
  4059. if (ql2xfwloadbin == 1)
  4060. return qla81xx_load_risc(vha, srisc_addr);
  4061. /*
  4062. * FW Load priority:
  4063. * 1) Firmware via request-firmware interface (.bin file).
  4064. * 2) Firmware residing in flash.
  4065. */
  4066. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  4067. if (rval == QLA_SUCCESS)
  4068. return rval;
  4069. return qla24xx_load_risc_flash(vha, srisc_addr,
  4070. vha->hw->flt_region_fw);
  4071. }
  4072. int
  4073. qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4074. {
  4075. int rval;
  4076. struct qla_hw_data *ha = vha->hw;
  4077. if (ql2xfwloadbin == 2)
  4078. goto try_blob_fw;
  4079. /*
  4080. * FW Load priority:
  4081. * 1) Firmware residing in flash.
  4082. * 2) Firmware via request-firmware interface (.bin file).
  4083. * 3) Golden-Firmware residing in flash -- limited operation.
  4084. */
  4085. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
  4086. if (rval == QLA_SUCCESS)
  4087. return rval;
  4088. try_blob_fw:
  4089. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  4090. if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
  4091. return rval;
  4092. qla_printk(KERN_ERR, ha,
  4093. "FW: Attempting to fallback to golden firmware...\n");
  4094. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
  4095. if (rval != QLA_SUCCESS)
  4096. return rval;
  4097. qla_printk(KERN_ERR, ha,
  4098. "FW: Please update operational firmware...\n");
  4099. ha->flags.running_gold_fw = 1;
  4100. return rval;
  4101. }
  4102. void
  4103. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  4104. {
  4105. int ret, retries;
  4106. struct qla_hw_data *ha = vha->hw;
  4107. if (ha->flags.pci_channel_io_perm_failure)
  4108. return;
  4109. if (!IS_FWI2_CAPABLE(ha))
  4110. return;
  4111. if (!ha->fw_major_version)
  4112. return;
  4113. ret = qla2x00_stop_firmware(vha);
  4114. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  4115. ret != QLA_INVALID_COMMAND && retries ; retries--) {
  4116. ha->isp_ops->reset_chip(vha);
  4117. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  4118. continue;
  4119. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  4120. continue;
  4121. qla_printk(KERN_INFO, ha,
  4122. "Attempting retry of stop-firmware command...\n");
  4123. ret = qla2x00_stop_firmware(vha);
  4124. }
  4125. }
  4126. int
  4127. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  4128. {
  4129. int rval = QLA_SUCCESS;
  4130. uint16_t mb[MAILBOX_REGISTER_COUNT];
  4131. struct qla_hw_data *ha = vha->hw;
  4132. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  4133. struct req_que *req;
  4134. struct rsp_que *rsp;
  4135. if (!vha->vp_idx)
  4136. return -EINVAL;
  4137. rval = qla2x00_fw_ready(base_vha);
  4138. if (ha->flags.cpu_affinity_enabled)
  4139. req = ha->req_q_map[0];
  4140. else
  4141. req = vha->req;
  4142. rsp = req->rsp;
  4143. if (rval == QLA_SUCCESS) {
  4144. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4145. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  4146. }
  4147. vha->flags.management_server_logged_in = 0;
  4148. /* Login to SNS first */
  4149. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  4150. if (mb[0] != MBS_COMMAND_COMPLETE) {
  4151. DEBUG15(qla_printk(KERN_INFO, ha,
  4152. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  4153. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  4154. mb[0], mb[1], mb[2], mb[6], mb[7]));
  4155. return (QLA_FUNCTION_FAILED);
  4156. }
  4157. atomic_set(&vha->loop_down_timer, 0);
  4158. atomic_set(&vha->loop_state, LOOP_UP);
  4159. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  4160. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  4161. rval = qla2x00_loop_resync(base_vha);
  4162. return rval;
  4163. }
  4164. /* 84XX Support **************************************************************/
  4165. static LIST_HEAD(qla_cs84xx_list);
  4166. static DEFINE_MUTEX(qla_cs84xx_mutex);
  4167. static struct qla_chip_state_84xx *
  4168. qla84xx_get_chip(struct scsi_qla_host *vha)
  4169. {
  4170. struct qla_chip_state_84xx *cs84xx;
  4171. struct qla_hw_data *ha = vha->hw;
  4172. mutex_lock(&qla_cs84xx_mutex);
  4173. /* Find any shared 84xx chip. */
  4174. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  4175. if (cs84xx->bus == ha->pdev->bus) {
  4176. kref_get(&cs84xx->kref);
  4177. goto done;
  4178. }
  4179. }
  4180. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  4181. if (!cs84xx)
  4182. goto done;
  4183. kref_init(&cs84xx->kref);
  4184. spin_lock_init(&cs84xx->access_lock);
  4185. mutex_init(&cs84xx->fw_update_mutex);
  4186. cs84xx->bus = ha->pdev->bus;
  4187. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  4188. done:
  4189. mutex_unlock(&qla_cs84xx_mutex);
  4190. return cs84xx;
  4191. }
  4192. static void
  4193. __qla84xx_chip_release(struct kref *kref)
  4194. {
  4195. struct qla_chip_state_84xx *cs84xx =
  4196. container_of(kref, struct qla_chip_state_84xx, kref);
  4197. mutex_lock(&qla_cs84xx_mutex);
  4198. list_del(&cs84xx->list);
  4199. mutex_unlock(&qla_cs84xx_mutex);
  4200. kfree(cs84xx);
  4201. }
  4202. void
  4203. qla84xx_put_chip(struct scsi_qla_host *vha)
  4204. {
  4205. struct qla_hw_data *ha = vha->hw;
  4206. if (ha->cs84xx)
  4207. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  4208. }
  4209. static int
  4210. qla84xx_init_chip(scsi_qla_host_t *vha)
  4211. {
  4212. int rval;
  4213. uint16_t status[2];
  4214. struct qla_hw_data *ha = vha->hw;
  4215. mutex_lock(&ha->cs84xx->fw_update_mutex);
  4216. rval = qla84xx_verify_chip(vha, status);
  4217. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  4218. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  4219. QLA_SUCCESS;
  4220. }
  4221. /* 81XX Support **************************************************************/
  4222. int
  4223. qla81xx_nvram_config(scsi_qla_host_t *vha)
  4224. {
  4225. int rval;
  4226. struct init_cb_81xx *icb;
  4227. struct nvram_81xx *nv;
  4228. uint32_t *dptr;
  4229. uint8_t *dptr1, *dptr2;
  4230. uint32_t chksum;
  4231. uint16_t cnt;
  4232. struct qla_hw_data *ha = vha->hw;
  4233. rval = QLA_SUCCESS;
  4234. icb = (struct init_cb_81xx *)ha->init_cb;
  4235. nv = ha->nvram;
  4236. /* Determine NVRAM starting address. */
  4237. ha->nvram_size = sizeof(struct nvram_81xx);
  4238. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  4239. /* Get VPD data into cache */
  4240. ha->vpd = ha->nvram + VPD_OFFSET;
  4241. ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
  4242. ha->vpd_size);
  4243. /* Get NVRAM data into cache and calculate checksum. */
  4244. ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
  4245. ha->nvram_size);
  4246. dptr = (uint32_t *)nv;
  4247. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  4248. chksum += le32_to_cpu(*dptr++);
  4249. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  4250. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  4251. /* Bad NVRAM data, set defaults parameters. */
  4252. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  4253. || nv->id[3] != ' ' ||
  4254. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  4255. /* Reset NVRAM data. */
  4256. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  4257. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  4258. le16_to_cpu(nv->nvram_version));
  4259. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  4260. "invalid -- WWPN) defaults.\n");
  4261. /*
  4262. * Set default initialization control block.
  4263. */
  4264. memset(nv, 0, ha->nvram_size);
  4265. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  4266. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  4267. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  4268. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4269. nv->exchange_count = __constant_cpu_to_le16(0);
  4270. nv->port_name[0] = 0x21;
  4271. nv->port_name[1] = 0x00 + ha->port_no;
  4272. nv->port_name[2] = 0x00;
  4273. nv->port_name[3] = 0xe0;
  4274. nv->port_name[4] = 0x8b;
  4275. nv->port_name[5] = 0x1c;
  4276. nv->port_name[6] = 0x55;
  4277. nv->port_name[7] = 0x86;
  4278. nv->node_name[0] = 0x20;
  4279. nv->node_name[1] = 0x00;
  4280. nv->node_name[2] = 0x00;
  4281. nv->node_name[3] = 0xe0;
  4282. nv->node_name[4] = 0x8b;
  4283. nv->node_name[5] = 0x1c;
  4284. nv->node_name[6] = 0x55;
  4285. nv->node_name[7] = 0x86;
  4286. nv->login_retry_count = __constant_cpu_to_le16(8);
  4287. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  4288. nv->login_timeout = __constant_cpu_to_le16(0);
  4289. nv->firmware_options_1 =
  4290. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  4291. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  4292. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  4293. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  4294. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  4295. nv->efi_parameters = __constant_cpu_to_le32(0);
  4296. nv->reset_delay = 5;
  4297. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  4298. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  4299. nv->link_down_timeout = __constant_cpu_to_le16(30);
  4300. nv->enode_mac[0] = 0x00;
  4301. nv->enode_mac[1] = 0x02;
  4302. nv->enode_mac[2] = 0x03;
  4303. nv->enode_mac[3] = 0x04;
  4304. nv->enode_mac[4] = 0x05;
  4305. nv->enode_mac[5] = 0x06 + ha->port_no;
  4306. rval = 1;
  4307. }
  4308. /* Reset Initialization control block */
  4309. memset(icb, 0, sizeof(struct init_cb_81xx));
  4310. /* Copy 1st segment. */
  4311. dptr1 = (uint8_t *)icb;
  4312. dptr2 = (uint8_t *)&nv->version;
  4313. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  4314. while (cnt--)
  4315. *dptr1++ = *dptr2++;
  4316. icb->login_retry_count = nv->login_retry_count;
  4317. /* Copy 2nd segment. */
  4318. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  4319. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  4320. cnt = (uint8_t *)&icb->reserved_5 -
  4321. (uint8_t *)&icb->interrupt_delay_timer;
  4322. while (cnt--)
  4323. *dptr1++ = *dptr2++;
  4324. memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
  4325. /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
  4326. if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
  4327. icb->enode_mac[0] = 0x01;
  4328. icb->enode_mac[1] = 0x02;
  4329. icb->enode_mac[2] = 0x03;
  4330. icb->enode_mac[3] = 0x04;
  4331. icb->enode_mac[4] = 0x05;
  4332. icb->enode_mac[5] = 0x06 + ha->port_no;
  4333. }
  4334. /* Use extended-initialization control block. */
  4335. memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
  4336. /*
  4337. * Setup driver NVRAM options.
  4338. */
  4339. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  4340. "QLE8XXX");
  4341. /* Use alternate WWN? */
  4342. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  4343. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  4344. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  4345. }
  4346. /* Prepare nodename */
  4347. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  4348. /*
  4349. * Firmware will apply the following mask if the nodename was
  4350. * not provided.
  4351. */
  4352. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  4353. icb->node_name[0] &= 0xF0;
  4354. }
  4355. /* Set host adapter parameters. */
  4356. ha->flags.disable_risc_code_load = 0;
  4357. ha->flags.enable_lip_reset = 0;
  4358. ha->flags.enable_lip_full_login =
  4359. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  4360. ha->flags.enable_target_reset =
  4361. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  4362. ha->flags.enable_led_scheme = 0;
  4363. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  4364. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  4365. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  4366. /* save HBA serial number */
  4367. ha->serial0 = icb->port_name[5];
  4368. ha->serial1 = icb->port_name[6];
  4369. ha->serial2 = icb->port_name[7];
  4370. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  4371. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  4372. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4373. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  4374. /* Set minimum login_timeout to 4 seconds. */
  4375. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  4376. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  4377. if (le16_to_cpu(nv->login_timeout) < 4)
  4378. nv->login_timeout = __constant_cpu_to_le16(4);
  4379. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  4380. icb->login_timeout = nv->login_timeout;
  4381. /* Set minimum RATOV to 100 tenths of a second. */
  4382. ha->r_a_tov = 100;
  4383. ha->loop_reset_delay = nv->reset_delay;
  4384. /* Link Down Timeout = 0:
  4385. *
  4386. * When Port Down timer expires we will start returning
  4387. * I/O's to OS with "DID_NO_CONNECT".
  4388. *
  4389. * Link Down Timeout != 0:
  4390. *
  4391. * The driver waits for the link to come up after link down
  4392. * before returning I/Os to OS with "DID_NO_CONNECT".
  4393. */
  4394. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  4395. ha->loop_down_abort_time =
  4396. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  4397. } else {
  4398. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  4399. ha->loop_down_abort_time =
  4400. (LOOP_DOWN_TIME - ha->link_down_timeout);
  4401. }
  4402. /* Need enough time to try and get the port back. */
  4403. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  4404. if (qlport_down_retry)
  4405. ha->port_down_retry_count = qlport_down_retry;
  4406. /* Set login_retry_count */
  4407. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  4408. if (ha->port_down_retry_count ==
  4409. le16_to_cpu(nv->port_down_retry_count) &&
  4410. ha->port_down_retry_count > 3)
  4411. ha->login_retry_count = ha->port_down_retry_count;
  4412. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  4413. ha->login_retry_count = ha->port_down_retry_count;
  4414. if (ql2xloginretrycount)
  4415. ha->login_retry_count = ql2xloginretrycount;
  4416. /* Enable ZIO. */
  4417. if (!vha->flags.init_done) {
  4418. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  4419. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  4420. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  4421. le16_to_cpu(icb->interrupt_delay_timer): 2;
  4422. }
  4423. icb->firmware_options_2 &= __constant_cpu_to_le32(
  4424. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  4425. vha->flags.process_response_queue = 0;
  4426. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  4427. ha->zio_mode = QLA_ZIO_MODE_6;
  4428. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  4429. "(%d us).\n", vha->host_no, ha->zio_mode,
  4430. ha->zio_timer * 100));
  4431. qla_printk(KERN_INFO, ha,
  4432. "ZIO mode %d enabled; timer delay (%d us).\n",
  4433. ha->zio_mode, ha->zio_timer * 100);
  4434. icb->firmware_options_2 |= cpu_to_le32(
  4435. (uint32_t)ha->zio_mode);
  4436. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  4437. vha->flags.process_response_queue = 1;
  4438. }
  4439. if (rval) {
  4440. DEBUG2_3(printk(KERN_WARNING
  4441. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  4442. }
  4443. return (rval);
  4444. }
  4445. int
  4446. qla82xx_restart_isp(scsi_qla_host_t *vha)
  4447. {
  4448. int status, rval;
  4449. uint32_t wait_time;
  4450. struct qla_hw_data *ha = vha->hw;
  4451. struct req_que *req = ha->req_q_map[0];
  4452. struct rsp_que *rsp = ha->rsp_q_map[0];
  4453. struct scsi_qla_host *vp;
  4454. struct scsi_qla_host *tvp;
  4455. status = qla2x00_init_rings(vha);
  4456. if (!status) {
  4457. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4458. ha->flags.chip_reset_done = 1;
  4459. status = qla2x00_fw_ready(vha);
  4460. if (!status) {
  4461. qla_printk(KERN_INFO, ha,
  4462. "%s(): Start configure loop, "
  4463. "status = %d\n", __func__, status);
  4464. /* Issue a marker after FW becomes ready. */
  4465. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  4466. vha->flags.online = 1;
  4467. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  4468. wait_time = 256;
  4469. do {
  4470. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  4471. qla2x00_configure_loop(vha);
  4472. wait_time--;
  4473. } while (!atomic_read(&vha->loop_down_timer) &&
  4474. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) &&
  4475. wait_time &&
  4476. (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)));
  4477. }
  4478. /* if no cable then assume it's good */
  4479. if ((vha->device_flags & DFLG_NO_CABLE))
  4480. status = 0;
  4481. qla_printk(KERN_INFO, ha,
  4482. "%s(): Configure loop done, status = 0x%x\n",
  4483. __func__, status);
  4484. }
  4485. if (!status) {
  4486. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4487. if (!atomic_read(&vha->loop_down_timer)) {
  4488. /*
  4489. * Issue marker command only when we are going
  4490. * to start the I/O .
  4491. */
  4492. vha->marker_needed = 1;
  4493. }
  4494. vha->flags.online = 1;
  4495. ha->isp_ops->enable_intrs(ha);
  4496. ha->isp_abort_cnt = 0;
  4497. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  4498. if (ha->fce) {
  4499. ha->flags.fce_enabled = 1;
  4500. memset(ha->fce, 0,
  4501. fce_calc_size(ha->fce_bufs));
  4502. rval = qla2x00_enable_fce_trace(vha,
  4503. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  4504. &ha->fce_bufs);
  4505. if (rval) {
  4506. qla_printk(KERN_WARNING, ha,
  4507. "Unable to reinitialize FCE "
  4508. "(%d).\n", rval);
  4509. ha->flags.fce_enabled = 0;
  4510. }
  4511. }
  4512. if (ha->eft) {
  4513. memset(ha->eft, 0, EFT_SIZE);
  4514. rval = qla2x00_enable_eft_trace(vha,
  4515. ha->eft_dma, EFT_NUM_BUFFERS);
  4516. if (rval) {
  4517. qla_printk(KERN_WARNING, ha,
  4518. "Unable to reinitialize EFT "
  4519. "(%d).\n", rval);
  4520. }
  4521. }
  4522. }
  4523. if (!status) {
  4524. DEBUG(printk(KERN_INFO
  4525. "qla82xx_restart_isp(%ld): succeeded.\n",
  4526. vha->host_no));
  4527. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  4528. if (vp->vp_idx)
  4529. qla2x00_vp_abort_isp(vp);
  4530. }
  4531. } else {
  4532. qla_printk(KERN_INFO, ha,
  4533. "qla82xx_restart_isp: **** FAILED ****\n");
  4534. }
  4535. return status;
  4536. }
  4537. void
  4538. qla81xx_update_fw_options(scsi_qla_host_t *vha)
  4539. {
  4540. struct qla_hw_data *ha = vha->hw;
  4541. if (!ql2xetsenable)
  4542. return;
  4543. /* Enable ETS Burst. */
  4544. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  4545. ha->fw_options[2] |= BIT_9;
  4546. qla2x00_set_fw_options(vha, ha->fw_options);
  4547. }
  4548. /*
  4549. * qla24xx_get_fcp_prio
  4550. * Gets the fcp cmd priority value for the logged in port.
  4551. * Looks for a match of the port descriptors within
  4552. * each of the fcp prio config entries. If a match is found,
  4553. * the tag (priority) value is returned.
  4554. *
  4555. * Input:
  4556. * ha = adapter block po
  4557. * fcport = port structure pointer.
  4558. *
  4559. * Return:
  4560. * non-zero (if found)
  4561. * 0 (if not found)
  4562. *
  4563. * Context:
  4564. * Kernel context
  4565. */
  4566. uint8_t
  4567. qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
  4568. {
  4569. int i, entries;
  4570. uint8_t pid_match, wwn_match;
  4571. uint8_t priority;
  4572. uint32_t pid1, pid2;
  4573. uint64_t wwn1, wwn2;
  4574. struct qla_fcp_prio_entry *pri_entry;
  4575. struct qla_hw_data *ha = vha->hw;
  4576. if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
  4577. return 0;
  4578. priority = 0;
  4579. entries = ha->fcp_prio_cfg->num_entries;
  4580. pri_entry = &ha->fcp_prio_cfg->entry[0];
  4581. for (i = 0; i < entries; i++) {
  4582. pid_match = wwn_match = 0;
  4583. if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
  4584. pri_entry++;
  4585. continue;
  4586. }
  4587. /* check source pid for a match */
  4588. if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
  4589. pid1 = pri_entry->src_pid & INVALID_PORT_ID;
  4590. pid2 = vha->d_id.b24 & INVALID_PORT_ID;
  4591. if (pid1 == INVALID_PORT_ID)
  4592. pid_match++;
  4593. else if (pid1 == pid2)
  4594. pid_match++;
  4595. }
  4596. /* check destination pid for a match */
  4597. if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
  4598. pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
  4599. pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
  4600. if (pid1 == INVALID_PORT_ID)
  4601. pid_match++;
  4602. else if (pid1 == pid2)
  4603. pid_match++;
  4604. }
  4605. /* check source WWN for a match */
  4606. if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
  4607. wwn1 = wwn_to_u64(vha->port_name);
  4608. wwn2 = wwn_to_u64(pri_entry->src_wwpn);
  4609. if (wwn2 == (uint64_t)-1)
  4610. wwn_match++;
  4611. else if (wwn1 == wwn2)
  4612. wwn_match++;
  4613. }
  4614. /* check destination WWN for a match */
  4615. if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
  4616. wwn1 = wwn_to_u64(fcport->port_name);
  4617. wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
  4618. if (wwn2 == (uint64_t)-1)
  4619. wwn_match++;
  4620. else if (wwn1 == wwn2)
  4621. wwn_match++;
  4622. }
  4623. if (pid_match == 2 || wwn_match == 2) {
  4624. /* Found a matching entry */
  4625. if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
  4626. priority = pri_entry->tag;
  4627. break;
  4628. }
  4629. pri_entry++;
  4630. }
  4631. return priority;
  4632. }
  4633. /*
  4634. * qla24xx_update_fcport_fcp_prio
  4635. * Activates fcp priority for the logged in fc port
  4636. *
  4637. * Input:
  4638. * ha = adapter block pointer.
  4639. * fcp = port structure pointer.
  4640. *
  4641. * Return:
  4642. * QLA_SUCCESS or QLA_FUNCTION_FAILED
  4643. *
  4644. * Context:
  4645. * Kernel context.
  4646. */
  4647. int
  4648. qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *ha, fc_port_t *fcport)
  4649. {
  4650. int ret;
  4651. uint8_t priority;
  4652. uint16_t mb[5];
  4653. if (atomic_read(&fcport->state) == FCS_UNCONFIGURED ||
  4654. fcport->port_type != FCT_TARGET ||
  4655. fcport->loop_id == FC_NO_LOOP_ID)
  4656. return QLA_FUNCTION_FAILED;
  4657. priority = qla24xx_get_fcp_prio(ha, fcport);
  4658. ret = qla24xx_set_fcp_prio(ha, fcport->loop_id, priority, mb);
  4659. if (ret == QLA_SUCCESS)
  4660. fcport->fcp_prio = priority;
  4661. else
  4662. DEBUG2(printk(KERN_WARNING
  4663. "scsi(%ld): Unable to activate fcp priority, "
  4664. " ret=0x%x\n", ha->host_no, ret));
  4665. return ret;
  4666. }
  4667. /*
  4668. * qla24xx_update_all_fcp_prio
  4669. * Activates fcp priority for all the logged in ports
  4670. *
  4671. * Input:
  4672. * ha = adapter block pointer.
  4673. *
  4674. * Return:
  4675. * QLA_SUCCESS or QLA_FUNCTION_FAILED
  4676. *
  4677. * Context:
  4678. * Kernel context.
  4679. */
  4680. int
  4681. qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
  4682. {
  4683. int ret;
  4684. fc_port_t *fcport;
  4685. ret = QLA_FUNCTION_FAILED;
  4686. /* We need to set priority for all logged in ports */
  4687. list_for_each_entry(fcport, &vha->vp_fcports, list)
  4688. ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
  4689. return ret;
  4690. }