mmu.c 74 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include "mmu.h"
  20. #include <linux/kvm_host.h>
  21. #include <linux/types.h>
  22. #include <linux/string.h>
  23. #include <linux/mm.h>
  24. #include <linux/highmem.h>
  25. #include <linux/module.h>
  26. #include <linux/swap.h>
  27. #include <linux/hugetlb.h>
  28. #include <linux/compiler.h>
  29. #include <asm/page.h>
  30. #include <asm/cmpxchg.h>
  31. #include <asm/io.h>
  32. #include <asm/vmx.h>
  33. /*
  34. * When setting this variable to true it enables Two-Dimensional-Paging
  35. * where the hardware walks 2 page tables:
  36. * 1. the guest-virtual to guest-physical
  37. * 2. while doing 1. it walks guest-physical to host-physical
  38. * If the hardware supports that we don't need to do shadow paging.
  39. */
  40. bool tdp_enabled = false;
  41. #undef MMU_DEBUG
  42. #undef AUDIT
  43. #ifdef AUDIT
  44. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  45. #else
  46. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  47. #endif
  48. #ifdef MMU_DEBUG
  49. #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  50. #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  51. #else
  52. #define pgprintk(x...) do { } while (0)
  53. #define rmap_printk(x...) do { } while (0)
  54. #endif
  55. #if defined(MMU_DEBUG) || defined(AUDIT)
  56. static int dbg = 0;
  57. module_param(dbg, bool, 0644);
  58. #endif
  59. static int oos_shadow = 1;
  60. module_param(oos_shadow, bool, 0644);
  61. #ifndef MMU_DEBUG
  62. #define ASSERT(x) do { } while (0)
  63. #else
  64. #define ASSERT(x) \
  65. if (!(x)) { \
  66. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  67. __FILE__, __LINE__, #x); \
  68. }
  69. #endif
  70. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  71. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  72. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  73. #define PT64_LEVEL_BITS 9
  74. #define PT64_LEVEL_SHIFT(level) \
  75. (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
  76. #define PT64_LEVEL_MASK(level) \
  77. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  78. #define PT64_INDEX(address, level)\
  79. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  80. #define PT32_LEVEL_BITS 10
  81. #define PT32_LEVEL_SHIFT(level) \
  82. (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
  83. #define PT32_LEVEL_MASK(level) \
  84. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  85. #define PT32_INDEX(address, level)\
  86. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  87. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
  88. #define PT64_DIR_BASE_ADDR_MASK \
  89. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  90. #define PT32_BASE_ADDR_MASK PAGE_MASK
  91. #define PT32_DIR_BASE_ADDR_MASK \
  92. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  93. #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
  94. | PT64_NX_MASK)
  95. #define PFERR_PRESENT_MASK (1U << 0)
  96. #define PFERR_WRITE_MASK (1U << 1)
  97. #define PFERR_USER_MASK (1U << 2)
  98. #define PFERR_FETCH_MASK (1U << 4)
  99. #define PT_DIRECTORY_LEVEL 2
  100. #define PT_PAGE_TABLE_LEVEL 1
  101. #define RMAP_EXT 4
  102. #define ACC_EXEC_MASK 1
  103. #define ACC_WRITE_MASK PT_WRITABLE_MASK
  104. #define ACC_USER_MASK PT_USER_MASK
  105. #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
  106. #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
  107. struct kvm_rmap_desc {
  108. u64 *shadow_ptes[RMAP_EXT];
  109. struct kvm_rmap_desc *more;
  110. };
  111. struct kvm_shadow_walk_iterator {
  112. u64 addr;
  113. hpa_t shadow_addr;
  114. int level;
  115. u64 *sptep;
  116. unsigned index;
  117. };
  118. #define for_each_shadow_entry(_vcpu, _addr, _walker) \
  119. for (shadow_walk_init(&(_walker), _vcpu, _addr); \
  120. shadow_walk_okay(&(_walker)); \
  121. shadow_walk_next(&(_walker)))
  122. struct kvm_unsync_walk {
  123. int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
  124. };
  125. typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
  126. static struct kmem_cache *pte_chain_cache;
  127. static struct kmem_cache *rmap_desc_cache;
  128. static struct kmem_cache *mmu_page_header_cache;
  129. static u64 __read_mostly shadow_trap_nonpresent_pte;
  130. static u64 __read_mostly shadow_notrap_nonpresent_pte;
  131. static u64 __read_mostly shadow_base_present_pte;
  132. static u64 __read_mostly shadow_nx_mask;
  133. static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
  134. static u64 __read_mostly shadow_user_mask;
  135. static u64 __read_mostly shadow_accessed_mask;
  136. static u64 __read_mostly shadow_dirty_mask;
  137. static u64 __read_mostly shadow_mt_mask;
  138. void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
  139. {
  140. shadow_trap_nonpresent_pte = trap_pte;
  141. shadow_notrap_nonpresent_pte = notrap_pte;
  142. }
  143. EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
  144. void kvm_mmu_set_base_ptes(u64 base_pte)
  145. {
  146. shadow_base_present_pte = base_pte;
  147. }
  148. EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
  149. void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
  150. u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 mt_mask)
  151. {
  152. shadow_user_mask = user_mask;
  153. shadow_accessed_mask = accessed_mask;
  154. shadow_dirty_mask = dirty_mask;
  155. shadow_nx_mask = nx_mask;
  156. shadow_x_mask = x_mask;
  157. shadow_mt_mask = mt_mask;
  158. }
  159. EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
  160. static int is_write_protection(struct kvm_vcpu *vcpu)
  161. {
  162. return vcpu->arch.cr0 & X86_CR0_WP;
  163. }
  164. static int is_cpuid_PSE36(void)
  165. {
  166. return 1;
  167. }
  168. static int is_nx(struct kvm_vcpu *vcpu)
  169. {
  170. return vcpu->arch.shadow_efer & EFER_NX;
  171. }
  172. static int is_present_pte(unsigned long pte)
  173. {
  174. return pte & PT_PRESENT_MASK;
  175. }
  176. static int is_shadow_present_pte(u64 pte)
  177. {
  178. return pte != shadow_trap_nonpresent_pte
  179. && pte != shadow_notrap_nonpresent_pte;
  180. }
  181. static int is_large_pte(u64 pte)
  182. {
  183. return pte & PT_PAGE_SIZE_MASK;
  184. }
  185. static int is_writeble_pte(unsigned long pte)
  186. {
  187. return pte & PT_WRITABLE_MASK;
  188. }
  189. static int is_dirty_pte(unsigned long pte)
  190. {
  191. return pte & shadow_dirty_mask;
  192. }
  193. static int is_rmap_pte(u64 pte)
  194. {
  195. return is_shadow_present_pte(pte);
  196. }
  197. static pfn_t spte_to_pfn(u64 pte)
  198. {
  199. return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  200. }
  201. static gfn_t pse36_gfn_delta(u32 gpte)
  202. {
  203. int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
  204. return (gpte & PT32_DIR_PSE36_MASK) << shift;
  205. }
  206. static void set_shadow_pte(u64 *sptep, u64 spte)
  207. {
  208. #ifdef CONFIG_X86_64
  209. set_64bit((unsigned long *)sptep, spte);
  210. #else
  211. set_64bit((unsigned long long *)sptep, spte);
  212. #endif
  213. }
  214. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  215. struct kmem_cache *base_cache, int min)
  216. {
  217. void *obj;
  218. if (cache->nobjs >= min)
  219. return 0;
  220. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  221. obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
  222. if (!obj)
  223. return -ENOMEM;
  224. cache->objects[cache->nobjs++] = obj;
  225. }
  226. return 0;
  227. }
  228. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  229. {
  230. while (mc->nobjs)
  231. kfree(mc->objects[--mc->nobjs]);
  232. }
  233. static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
  234. int min)
  235. {
  236. struct page *page;
  237. if (cache->nobjs >= min)
  238. return 0;
  239. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  240. page = alloc_page(GFP_KERNEL);
  241. if (!page)
  242. return -ENOMEM;
  243. set_page_private(page, 0);
  244. cache->objects[cache->nobjs++] = page_address(page);
  245. }
  246. return 0;
  247. }
  248. static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
  249. {
  250. while (mc->nobjs)
  251. free_page((unsigned long)mc->objects[--mc->nobjs]);
  252. }
  253. static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
  254. {
  255. int r;
  256. r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
  257. pte_chain_cache, 4);
  258. if (r)
  259. goto out;
  260. r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
  261. rmap_desc_cache, 4);
  262. if (r)
  263. goto out;
  264. r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
  265. if (r)
  266. goto out;
  267. r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
  268. mmu_page_header_cache, 4);
  269. out:
  270. return r;
  271. }
  272. static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  273. {
  274. mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
  275. mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
  276. mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
  277. mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
  278. }
  279. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
  280. size_t size)
  281. {
  282. void *p;
  283. BUG_ON(!mc->nobjs);
  284. p = mc->objects[--mc->nobjs];
  285. memset(p, 0, size);
  286. return p;
  287. }
  288. static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
  289. {
  290. return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
  291. sizeof(struct kvm_pte_chain));
  292. }
  293. static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
  294. {
  295. kfree(pc);
  296. }
  297. static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
  298. {
  299. return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
  300. sizeof(struct kvm_rmap_desc));
  301. }
  302. static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
  303. {
  304. kfree(rd);
  305. }
  306. /*
  307. * Return the pointer to the largepage write count for a given
  308. * gfn, handling slots that are not large page aligned.
  309. */
  310. static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
  311. {
  312. unsigned long idx;
  313. idx = (gfn / KVM_PAGES_PER_HPAGE) -
  314. (slot->base_gfn / KVM_PAGES_PER_HPAGE);
  315. return &slot->lpage_info[idx].write_count;
  316. }
  317. static void account_shadowed(struct kvm *kvm, gfn_t gfn)
  318. {
  319. int *write_count;
  320. gfn = unalias_gfn(kvm, gfn);
  321. write_count = slot_largepage_idx(gfn,
  322. gfn_to_memslot_unaliased(kvm, gfn));
  323. *write_count += 1;
  324. }
  325. static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
  326. {
  327. int *write_count;
  328. gfn = unalias_gfn(kvm, gfn);
  329. write_count = slot_largepage_idx(gfn,
  330. gfn_to_memslot_unaliased(kvm, gfn));
  331. *write_count -= 1;
  332. WARN_ON(*write_count < 0);
  333. }
  334. static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
  335. {
  336. struct kvm_memory_slot *slot;
  337. int *largepage_idx;
  338. gfn = unalias_gfn(kvm, gfn);
  339. slot = gfn_to_memslot_unaliased(kvm, gfn);
  340. if (slot) {
  341. largepage_idx = slot_largepage_idx(gfn, slot);
  342. return *largepage_idx;
  343. }
  344. return 1;
  345. }
  346. static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
  347. {
  348. struct vm_area_struct *vma;
  349. unsigned long addr;
  350. int ret = 0;
  351. addr = gfn_to_hva(kvm, gfn);
  352. if (kvm_is_error_hva(addr))
  353. return ret;
  354. down_read(&current->mm->mmap_sem);
  355. vma = find_vma(current->mm, addr);
  356. if (vma && is_vm_hugetlb_page(vma))
  357. ret = 1;
  358. up_read(&current->mm->mmap_sem);
  359. return ret;
  360. }
  361. static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
  362. {
  363. struct kvm_memory_slot *slot;
  364. if (has_wrprotected_page(vcpu->kvm, large_gfn))
  365. return 0;
  366. if (!host_largepage_backed(vcpu->kvm, large_gfn))
  367. return 0;
  368. slot = gfn_to_memslot(vcpu->kvm, large_gfn);
  369. if (slot && slot->dirty_bitmap)
  370. return 0;
  371. return 1;
  372. }
  373. /*
  374. * Take gfn and return the reverse mapping to it.
  375. * Note: gfn must be unaliased before this function get called
  376. */
  377. static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
  378. {
  379. struct kvm_memory_slot *slot;
  380. unsigned long idx;
  381. slot = gfn_to_memslot(kvm, gfn);
  382. if (!lpage)
  383. return &slot->rmap[gfn - slot->base_gfn];
  384. idx = (gfn / KVM_PAGES_PER_HPAGE) -
  385. (slot->base_gfn / KVM_PAGES_PER_HPAGE);
  386. return &slot->lpage_info[idx].rmap_pde;
  387. }
  388. /*
  389. * Reverse mapping data structures:
  390. *
  391. * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
  392. * that points to page_address(page).
  393. *
  394. * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
  395. * containing more mappings.
  396. */
  397. static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
  398. {
  399. struct kvm_mmu_page *sp;
  400. struct kvm_rmap_desc *desc;
  401. unsigned long *rmapp;
  402. int i;
  403. if (!is_rmap_pte(*spte))
  404. return;
  405. gfn = unalias_gfn(vcpu->kvm, gfn);
  406. sp = page_header(__pa(spte));
  407. sp->gfns[spte - sp->spt] = gfn;
  408. rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
  409. if (!*rmapp) {
  410. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  411. *rmapp = (unsigned long)spte;
  412. } else if (!(*rmapp & 1)) {
  413. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  414. desc = mmu_alloc_rmap_desc(vcpu);
  415. desc->shadow_ptes[0] = (u64 *)*rmapp;
  416. desc->shadow_ptes[1] = spte;
  417. *rmapp = (unsigned long)desc | 1;
  418. } else {
  419. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  420. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  421. while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
  422. desc = desc->more;
  423. if (desc->shadow_ptes[RMAP_EXT-1]) {
  424. desc->more = mmu_alloc_rmap_desc(vcpu);
  425. desc = desc->more;
  426. }
  427. for (i = 0; desc->shadow_ptes[i]; ++i)
  428. ;
  429. desc->shadow_ptes[i] = spte;
  430. }
  431. }
  432. static void rmap_desc_remove_entry(unsigned long *rmapp,
  433. struct kvm_rmap_desc *desc,
  434. int i,
  435. struct kvm_rmap_desc *prev_desc)
  436. {
  437. int j;
  438. for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
  439. ;
  440. desc->shadow_ptes[i] = desc->shadow_ptes[j];
  441. desc->shadow_ptes[j] = NULL;
  442. if (j != 0)
  443. return;
  444. if (!prev_desc && !desc->more)
  445. *rmapp = (unsigned long)desc->shadow_ptes[0];
  446. else
  447. if (prev_desc)
  448. prev_desc->more = desc->more;
  449. else
  450. *rmapp = (unsigned long)desc->more | 1;
  451. mmu_free_rmap_desc(desc);
  452. }
  453. static void rmap_remove(struct kvm *kvm, u64 *spte)
  454. {
  455. struct kvm_rmap_desc *desc;
  456. struct kvm_rmap_desc *prev_desc;
  457. struct kvm_mmu_page *sp;
  458. pfn_t pfn;
  459. unsigned long *rmapp;
  460. int i;
  461. if (!is_rmap_pte(*spte))
  462. return;
  463. sp = page_header(__pa(spte));
  464. pfn = spte_to_pfn(*spte);
  465. if (*spte & shadow_accessed_mask)
  466. kvm_set_pfn_accessed(pfn);
  467. if (is_writeble_pte(*spte))
  468. kvm_release_pfn_dirty(pfn);
  469. else
  470. kvm_release_pfn_clean(pfn);
  471. rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
  472. if (!*rmapp) {
  473. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  474. BUG();
  475. } else if (!(*rmapp & 1)) {
  476. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  477. if ((u64 *)*rmapp != spte) {
  478. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  479. spte, *spte);
  480. BUG();
  481. }
  482. *rmapp = 0;
  483. } else {
  484. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  485. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  486. prev_desc = NULL;
  487. while (desc) {
  488. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
  489. if (desc->shadow_ptes[i] == spte) {
  490. rmap_desc_remove_entry(rmapp,
  491. desc, i,
  492. prev_desc);
  493. return;
  494. }
  495. prev_desc = desc;
  496. desc = desc->more;
  497. }
  498. BUG();
  499. }
  500. }
  501. static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
  502. {
  503. struct kvm_rmap_desc *desc;
  504. struct kvm_rmap_desc *prev_desc;
  505. u64 *prev_spte;
  506. int i;
  507. if (!*rmapp)
  508. return NULL;
  509. else if (!(*rmapp & 1)) {
  510. if (!spte)
  511. return (u64 *)*rmapp;
  512. return NULL;
  513. }
  514. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  515. prev_desc = NULL;
  516. prev_spte = NULL;
  517. while (desc) {
  518. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
  519. if (prev_spte == spte)
  520. return desc->shadow_ptes[i];
  521. prev_spte = desc->shadow_ptes[i];
  522. }
  523. desc = desc->more;
  524. }
  525. return NULL;
  526. }
  527. static int rmap_write_protect(struct kvm *kvm, u64 gfn)
  528. {
  529. unsigned long *rmapp;
  530. u64 *spte;
  531. int write_protected = 0;
  532. gfn = unalias_gfn(kvm, gfn);
  533. rmapp = gfn_to_rmap(kvm, gfn, 0);
  534. spte = rmap_next(kvm, rmapp, NULL);
  535. while (spte) {
  536. BUG_ON(!spte);
  537. BUG_ON(!(*spte & PT_PRESENT_MASK));
  538. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  539. if (is_writeble_pte(*spte)) {
  540. set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
  541. write_protected = 1;
  542. }
  543. spte = rmap_next(kvm, rmapp, spte);
  544. }
  545. if (write_protected) {
  546. pfn_t pfn;
  547. spte = rmap_next(kvm, rmapp, NULL);
  548. pfn = spte_to_pfn(*spte);
  549. kvm_set_pfn_dirty(pfn);
  550. }
  551. /* check for huge page mappings */
  552. rmapp = gfn_to_rmap(kvm, gfn, 1);
  553. spte = rmap_next(kvm, rmapp, NULL);
  554. while (spte) {
  555. BUG_ON(!spte);
  556. BUG_ON(!(*spte & PT_PRESENT_MASK));
  557. BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
  558. pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
  559. if (is_writeble_pte(*spte)) {
  560. rmap_remove(kvm, spte);
  561. --kvm->stat.lpages;
  562. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  563. spte = NULL;
  564. write_protected = 1;
  565. }
  566. spte = rmap_next(kvm, rmapp, spte);
  567. }
  568. return write_protected;
  569. }
  570. static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
  571. {
  572. u64 *spte;
  573. int need_tlb_flush = 0;
  574. while ((spte = rmap_next(kvm, rmapp, NULL))) {
  575. BUG_ON(!(*spte & PT_PRESENT_MASK));
  576. rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
  577. rmap_remove(kvm, spte);
  578. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  579. need_tlb_flush = 1;
  580. }
  581. return need_tlb_flush;
  582. }
  583. static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
  584. int (*handler)(struct kvm *kvm, unsigned long *rmapp))
  585. {
  586. int i;
  587. int retval = 0;
  588. /*
  589. * If mmap_sem isn't taken, we can look the memslots with only
  590. * the mmu_lock by skipping over the slots with userspace_addr == 0.
  591. */
  592. for (i = 0; i < kvm->nmemslots; i++) {
  593. struct kvm_memory_slot *memslot = &kvm->memslots[i];
  594. unsigned long start = memslot->userspace_addr;
  595. unsigned long end;
  596. /* mmu_lock protects userspace_addr */
  597. if (!start)
  598. continue;
  599. end = start + (memslot->npages << PAGE_SHIFT);
  600. if (hva >= start && hva < end) {
  601. gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
  602. retval |= handler(kvm, &memslot->rmap[gfn_offset]);
  603. retval |= handler(kvm,
  604. &memslot->lpage_info[
  605. gfn_offset /
  606. KVM_PAGES_PER_HPAGE].rmap_pde);
  607. }
  608. }
  609. return retval;
  610. }
  611. int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
  612. {
  613. return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
  614. }
  615. static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
  616. {
  617. u64 *spte;
  618. int young = 0;
  619. /* always return old for EPT */
  620. if (!shadow_accessed_mask)
  621. return 0;
  622. spte = rmap_next(kvm, rmapp, NULL);
  623. while (spte) {
  624. int _young;
  625. u64 _spte = *spte;
  626. BUG_ON(!(_spte & PT_PRESENT_MASK));
  627. _young = _spte & PT_ACCESSED_MASK;
  628. if (_young) {
  629. young = 1;
  630. clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
  631. }
  632. spte = rmap_next(kvm, rmapp, spte);
  633. }
  634. return young;
  635. }
  636. int kvm_age_hva(struct kvm *kvm, unsigned long hva)
  637. {
  638. return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
  639. }
  640. #ifdef MMU_DEBUG
  641. static int is_empty_shadow_page(u64 *spt)
  642. {
  643. u64 *pos;
  644. u64 *end;
  645. for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
  646. if (is_shadow_present_pte(*pos)) {
  647. printk(KERN_ERR "%s: %p %llx\n", __func__,
  648. pos, *pos);
  649. return 0;
  650. }
  651. return 1;
  652. }
  653. #endif
  654. static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  655. {
  656. ASSERT(is_empty_shadow_page(sp->spt));
  657. list_del(&sp->link);
  658. __free_page(virt_to_page(sp->spt));
  659. __free_page(virt_to_page(sp->gfns));
  660. kfree(sp);
  661. ++kvm->arch.n_free_mmu_pages;
  662. }
  663. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  664. {
  665. return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
  666. }
  667. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  668. u64 *parent_pte)
  669. {
  670. struct kvm_mmu_page *sp;
  671. sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
  672. sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  673. sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  674. set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
  675. list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
  676. INIT_LIST_HEAD(&sp->oos_link);
  677. ASSERT(is_empty_shadow_page(sp->spt));
  678. bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
  679. sp->multimapped = 0;
  680. sp->parent_pte = parent_pte;
  681. --vcpu->kvm->arch.n_free_mmu_pages;
  682. return sp;
  683. }
  684. static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
  685. struct kvm_mmu_page *sp, u64 *parent_pte)
  686. {
  687. struct kvm_pte_chain *pte_chain;
  688. struct hlist_node *node;
  689. int i;
  690. if (!parent_pte)
  691. return;
  692. if (!sp->multimapped) {
  693. u64 *old = sp->parent_pte;
  694. if (!old) {
  695. sp->parent_pte = parent_pte;
  696. return;
  697. }
  698. sp->multimapped = 1;
  699. pte_chain = mmu_alloc_pte_chain(vcpu);
  700. INIT_HLIST_HEAD(&sp->parent_ptes);
  701. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  702. pte_chain->parent_ptes[0] = old;
  703. }
  704. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
  705. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  706. continue;
  707. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  708. if (!pte_chain->parent_ptes[i]) {
  709. pte_chain->parent_ptes[i] = parent_pte;
  710. return;
  711. }
  712. }
  713. pte_chain = mmu_alloc_pte_chain(vcpu);
  714. BUG_ON(!pte_chain);
  715. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  716. pte_chain->parent_ptes[0] = parent_pte;
  717. }
  718. static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
  719. u64 *parent_pte)
  720. {
  721. struct kvm_pte_chain *pte_chain;
  722. struct hlist_node *node;
  723. int i;
  724. if (!sp->multimapped) {
  725. BUG_ON(sp->parent_pte != parent_pte);
  726. sp->parent_pte = NULL;
  727. return;
  728. }
  729. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  730. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  731. if (!pte_chain->parent_ptes[i])
  732. break;
  733. if (pte_chain->parent_ptes[i] != parent_pte)
  734. continue;
  735. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  736. && pte_chain->parent_ptes[i + 1]) {
  737. pte_chain->parent_ptes[i]
  738. = pte_chain->parent_ptes[i + 1];
  739. ++i;
  740. }
  741. pte_chain->parent_ptes[i] = NULL;
  742. if (i == 0) {
  743. hlist_del(&pte_chain->link);
  744. mmu_free_pte_chain(pte_chain);
  745. if (hlist_empty(&sp->parent_ptes)) {
  746. sp->multimapped = 0;
  747. sp->parent_pte = NULL;
  748. }
  749. }
  750. return;
  751. }
  752. BUG();
  753. }
  754. static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
  755. mmu_parent_walk_fn fn)
  756. {
  757. struct kvm_pte_chain *pte_chain;
  758. struct hlist_node *node;
  759. struct kvm_mmu_page *parent_sp;
  760. int i;
  761. if (!sp->multimapped && sp->parent_pte) {
  762. parent_sp = page_header(__pa(sp->parent_pte));
  763. fn(vcpu, parent_sp);
  764. mmu_parent_walk(vcpu, parent_sp, fn);
  765. return;
  766. }
  767. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  768. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  769. if (!pte_chain->parent_ptes[i])
  770. break;
  771. parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
  772. fn(vcpu, parent_sp);
  773. mmu_parent_walk(vcpu, parent_sp, fn);
  774. }
  775. }
  776. static void kvm_mmu_update_unsync_bitmap(u64 *spte)
  777. {
  778. unsigned int index;
  779. struct kvm_mmu_page *sp = page_header(__pa(spte));
  780. index = spte - sp->spt;
  781. if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
  782. sp->unsync_children++;
  783. WARN_ON(!sp->unsync_children);
  784. }
  785. static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
  786. {
  787. struct kvm_pte_chain *pte_chain;
  788. struct hlist_node *node;
  789. int i;
  790. if (!sp->parent_pte)
  791. return;
  792. if (!sp->multimapped) {
  793. kvm_mmu_update_unsync_bitmap(sp->parent_pte);
  794. return;
  795. }
  796. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  797. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  798. if (!pte_chain->parent_ptes[i])
  799. break;
  800. kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
  801. }
  802. }
  803. static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  804. {
  805. kvm_mmu_update_parents_unsync(sp);
  806. return 1;
  807. }
  808. static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
  809. struct kvm_mmu_page *sp)
  810. {
  811. mmu_parent_walk(vcpu, sp, unsync_walk_fn);
  812. kvm_mmu_update_parents_unsync(sp);
  813. }
  814. static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
  815. struct kvm_mmu_page *sp)
  816. {
  817. int i;
  818. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  819. sp->spt[i] = shadow_trap_nonpresent_pte;
  820. }
  821. static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
  822. struct kvm_mmu_page *sp)
  823. {
  824. return 1;
  825. }
  826. static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
  827. {
  828. }
  829. #define KVM_PAGE_ARRAY_NR 16
  830. struct kvm_mmu_pages {
  831. struct mmu_page_and_offset {
  832. struct kvm_mmu_page *sp;
  833. unsigned int idx;
  834. } page[KVM_PAGE_ARRAY_NR];
  835. unsigned int nr;
  836. };
  837. #define for_each_unsync_children(bitmap, idx) \
  838. for (idx = find_first_bit(bitmap, 512); \
  839. idx < 512; \
  840. idx = find_next_bit(bitmap, 512, idx+1))
  841. int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
  842. int idx)
  843. {
  844. int i;
  845. if (sp->unsync)
  846. for (i=0; i < pvec->nr; i++)
  847. if (pvec->page[i].sp == sp)
  848. return 0;
  849. pvec->page[pvec->nr].sp = sp;
  850. pvec->page[pvec->nr].idx = idx;
  851. pvec->nr++;
  852. return (pvec->nr == KVM_PAGE_ARRAY_NR);
  853. }
  854. static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
  855. struct kvm_mmu_pages *pvec)
  856. {
  857. int i, ret, nr_unsync_leaf = 0;
  858. for_each_unsync_children(sp->unsync_child_bitmap, i) {
  859. u64 ent = sp->spt[i];
  860. if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
  861. struct kvm_mmu_page *child;
  862. child = page_header(ent & PT64_BASE_ADDR_MASK);
  863. if (child->unsync_children) {
  864. if (mmu_pages_add(pvec, child, i))
  865. return -ENOSPC;
  866. ret = __mmu_unsync_walk(child, pvec);
  867. if (!ret)
  868. __clear_bit(i, sp->unsync_child_bitmap);
  869. else if (ret > 0)
  870. nr_unsync_leaf += ret;
  871. else
  872. return ret;
  873. }
  874. if (child->unsync) {
  875. nr_unsync_leaf++;
  876. if (mmu_pages_add(pvec, child, i))
  877. return -ENOSPC;
  878. }
  879. }
  880. }
  881. if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
  882. sp->unsync_children = 0;
  883. return nr_unsync_leaf;
  884. }
  885. static int mmu_unsync_walk(struct kvm_mmu_page *sp,
  886. struct kvm_mmu_pages *pvec)
  887. {
  888. if (!sp->unsync_children)
  889. return 0;
  890. mmu_pages_add(pvec, sp, 0);
  891. return __mmu_unsync_walk(sp, pvec);
  892. }
  893. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
  894. {
  895. unsigned index;
  896. struct hlist_head *bucket;
  897. struct kvm_mmu_page *sp;
  898. struct hlist_node *node;
  899. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  900. index = kvm_page_table_hashfn(gfn);
  901. bucket = &kvm->arch.mmu_page_hash[index];
  902. hlist_for_each_entry(sp, node, bucket, hash_link)
  903. if (sp->gfn == gfn && !sp->role.metaphysical
  904. && !sp->role.invalid) {
  905. pgprintk("%s: found role %x\n",
  906. __func__, sp->role.word);
  907. return sp;
  908. }
  909. return NULL;
  910. }
  911. static void kvm_unlink_unsync_global(struct kvm *kvm, struct kvm_mmu_page *sp)
  912. {
  913. list_del(&sp->oos_link);
  914. --kvm->stat.mmu_unsync_global;
  915. }
  916. static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  917. {
  918. WARN_ON(!sp->unsync);
  919. sp->unsync = 0;
  920. if (sp->global)
  921. kvm_unlink_unsync_global(kvm, sp);
  922. --kvm->stat.mmu_unsync;
  923. }
  924. static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
  925. static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  926. {
  927. if (sp->role.glevels != vcpu->arch.mmu.root_level) {
  928. kvm_mmu_zap_page(vcpu->kvm, sp);
  929. return 1;
  930. }
  931. if (rmap_write_protect(vcpu->kvm, sp->gfn))
  932. kvm_flush_remote_tlbs(vcpu->kvm);
  933. kvm_unlink_unsync_page(vcpu->kvm, sp);
  934. if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
  935. kvm_mmu_zap_page(vcpu->kvm, sp);
  936. return 1;
  937. }
  938. kvm_mmu_flush_tlb(vcpu);
  939. return 0;
  940. }
  941. struct mmu_page_path {
  942. struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
  943. unsigned int idx[PT64_ROOT_LEVEL-1];
  944. };
  945. #define for_each_sp(pvec, sp, parents, i) \
  946. for (i = mmu_pages_next(&pvec, &parents, -1), \
  947. sp = pvec.page[i].sp; \
  948. i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
  949. i = mmu_pages_next(&pvec, &parents, i))
  950. int mmu_pages_next(struct kvm_mmu_pages *pvec, struct mmu_page_path *parents,
  951. int i)
  952. {
  953. int n;
  954. for (n = i+1; n < pvec->nr; n++) {
  955. struct kvm_mmu_page *sp = pvec->page[n].sp;
  956. if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
  957. parents->idx[0] = pvec->page[n].idx;
  958. return n;
  959. }
  960. parents->parent[sp->role.level-2] = sp;
  961. parents->idx[sp->role.level-1] = pvec->page[n].idx;
  962. }
  963. return n;
  964. }
  965. void mmu_pages_clear_parents(struct mmu_page_path *parents)
  966. {
  967. struct kvm_mmu_page *sp;
  968. unsigned int level = 0;
  969. do {
  970. unsigned int idx = parents->idx[level];
  971. sp = parents->parent[level];
  972. if (!sp)
  973. return;
  974. --sp->unsync_children;
  975. WARN_ON((int)sp->unsync_children < 0);
  976. __clear_bit(idx, sp->unsync_child_bitmap);
  977. level++;
  978. } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
  979. }
  980. static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
  981. struct mmu_page_path *parents,
  982. struct kvm_mmu_pages *pvec)
  983. {
  984. parents->parent[parent->role.level-1] = NULL;
  985. pvec->nr = 0;
  986. }
  987. static void mmu_sync_children(struct kvm_vcpu *vcpu,
  988. struct kvm_mmu_page *parent)
  989. {
  990. int i;
  991. struct kvm_mmu_page *sp;
  992. struct mmu_page_path parents;
  993. struct kvm_mmu_pages pages;
  994. kvm_mmu_pages_init(parent, &parents, &pages);
  995. while (mmu_unsync_walk(parent, &pages)) {
  996. int protected = 0;
  997. for_each_sp(pages, sp, parents, i)
  998. protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
  999. if (protected)
  1000. kvm_flush_remote_tlbs(vcpu->kvm);
  1001. for_each_sp(pages, sp, parents, i) {
  1002. kvm_sync_page(vcpu, sp);
  1003. mmu_pages_clear_parents(&parents);
  1004. }
  1005. cond_resched_lock(&vcpu->kvm->mmu_lock);
  1006. kvm_mmu_pages_init(parent, &parents, &pages);
  1007. }
  1008. }
  1009. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  1010. gfn_t gfn,
  1011. gva_t gaddr,
  1012. unsigned level,
  1013. int metaphysical,
  1014. unsigned access,
  1015. u64 *parent_pte)
  1016. {
  1017. union kvm_mmu_page_role role;
  1018. unsigned index;
  1019. unsigned quadrant;
  1020. struct hlist_head *bucket;
  1021. struct kvm_mmu_page *sp;
  1022. struct hlist_node *node, *tmp;
  1023. role = vcpu->arch.mmu.base_role;
  1024. role.level = level;
  1025. role.metaphysical = metaphysical;
  1026. role.access = access;
  1027. if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
  1028. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  1029. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  1030. role.quadrant = quadrant;
  1031. }
  1032. pgprintk("%s: looking gfn %lx role %x\n", __func__,
  1033. gfn, role.word);
  1034. index = kvm_page_table_hashfn(gfn);
  1035. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1036. hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
  1037. if (sp->gfn == gfn) {
  1038. if (sp->unsync)
  1039. if (kvm_sync_page(vcpu, sp))
  1040. continue;
  1041. if (sp->role.word != role.word)
  1042. continue;
  1043. mmu_page_add_parent_pte(vcpu, sp, parent_pte);
  1044. if (sp->unsync_children) {
  1045. set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
  1046. kvm_mmu_mark_parents_unsync(vcpu, sp);
  1047. }
  1048. pgprintk("%s: found\n", __func__);
  1049. return sp;
  1050. }
  1051. ++vcpu->kvm->stat.mmu_cache_miss;
  1052. sp = kvm_mmu_alloc_page(vcpu, parent_pte);
  1053. if (!sp)
  1054. return sp;
  1055. pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
  1056. sp->gfn = gfn;
  1057. sp->role = role;
  1058. sp->global = role.cr4_pge;
  1059. hlist_add_head(&sp->hash_link, bucket);
  1060. if (!metaphysical) {
  1061. if (rmap_write_protect(vcpu->kvm, gfn))
  1062. kvm_flush_remote_tlbs(vcpu->kvm);
  1063. account_shadowed(vcpu->kvm, gfn);
  1064. }
  1065. if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
  1066. vcpu->arch.mmu.prefetch_page(vcpu, sp);
  1067. else
  1068. nonpaging_prefetch_page(vcpu, sp);
  1069. return sp;
  1070. }
  1071. static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
  1072. struct kvm_vcpu *vcpu, u64 addr)
  1073. {
  1074. iterator->addr = addr;
  1075. iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
  1076. iterator->level = vcpu->arch.mmu.shadow_root_level;
  1077. if (iterator->level == PT32E_ROOT_LEVEL) {
  1078. iterator->shadow_addr
  1079. = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
  1080. iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
  1081. --iterator->level;
  1082. if (!iterator->shadow_addr)
  1083. iterator->level = 0;
  1084. }
  1085. }
  1086. static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
  1087. {
  1088. if (iterator->level < PT_PAGE_TABLE_LEVEL)
  1089. return false;
  1090. iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
  1091. iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
  1092. return true;
  1093. }
  1094. static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
  1095. {
  1096. iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
  1097. --iterator->level;
  1098. }
  1099. static void kvm_mmu_page_unlink_children(struct kvm *kvm,
  1100. struct kvm_mmu_page *sp)
  1101. {
  1102. unsigned i;
  1103. u64 *pt;
  1104. u64 ent;
  1105. pt = sp->spt;
  1106. if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
  1107. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1108. if (is_shadow_present_pte(pt[i]))
  1109. rmap_remove(kvm, &pt[i]);
  1110. pt[i] = shadow_trap_nonpresent_pte;
  1111. }
  1112. return;
  1113. }
  1114. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1115. ent = pt[i];
  1116. if (is_shadow_present_pte(ent)) {
  1117. if (!is_large_pte(ent)) {
  1118. ent &= PT64_BASE_ADDR_MASK;
  1119. mmu_page_remove_parent_pte(page_header(ent),
  1120. &pt[i]);
  1121. } else {
  1122. --kvm->stat.lpages;
  1123. rmap_remove(kvm, &pt[i]);
  1124. }
  1125. }
  1126. pt[i] = shadow_trap_nonpresent_pte;
  1127. }
  1128. }
  1129. static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
  1130. {
  1131. mmu_page_remove_parent_pte(sp, parent_pte);
  1132. }
  1133. static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
  1134. {
  1135. int i;
  1136. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  1137. if (kvm->vcpus[i])
  1138. kvm->vcpus[i]->arch.last_pte_updated = NULL;
  1139. }
  1140. static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
  1141. {
  1142. u64 *parent_pte;
  1143. while (sp->multimapped || sp->parent_pte) {
  1144. if (!sp->multimapped)
  1145. parent_pte = sp->parent_pte;
  1146. else {
  1147. struct kvm_pte_chain *chain;
  1148. chain = container_of(sp->parent_ptes.first,
  1149. struct kvm_pte_chain, link);
  1150. parent_pte = chain->parent_ptes[0];
  1151. }
  1152. BUG_ON(!parent_pte);
  1153. kvm_mmu_put_page(sp, parent_pte);
  1154. set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
  1155. }
  1156. }
  1157. static int mmu_zap_unsync_children(struct kvm *kvm,
  1158. struct kvm_mmu_page *parent)
  1159. {
  1160. int i, zapped = 0;
  1161. struct mmu_page_path parents;
  1162. struct kvm_mmu_pages pages;
  1163. if (parent->role.level == PT_PAGE_TABLE_LEVEL)
  1164. return 0;
  1165. kvm_mmu_pages_init(parent, &parents, &pages);
  1166. while (mmu_unsync_walk(parent, &pages)) {
  1167. struct kvm_mmu_page *sp;
  1168. for_each_sp(pages, sp, parents, i) {
  1169. kvm_mmu_zap_page(kvm, sp);
  1170. mmu_pages_clear_parents(&parents);
  1171. }
  1172. zapped += pages.nr;
  1173. kvm_mmu_pages_init(parent, &parents, &pages);
  1174. }
  1175. return zapped;
  1176. }
  1177. static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  1178. {
  1179. int ret;
  1180. ++kvm->stat.mmu_shadow_zapped;
  1181. ret = mmu_zap_unsync_children(kvm, sp);
  1182. kvm_mmu_page_unlink_children(kvm, sp);
  1183. kvm_mmu_unlink_parents(kvm, sp);
  1184. kvm_flush_remote_tlbs(kvm);
  1185. if (!sp->role.invalid && !sp->role.metaphysical)
  1186. unaccount_shadowed(kvm, sp->gfn);
  1187. if (sp->unsync)
  1188. kvm_unlink_unsync_page(kvm, sp);
  1189. if (!sp->root_count) {
  1190. hlist_del(&sp->hash_link);
  1191. kvm_mmu_free_page(kvm, sp);
  1192. } else {
  1193. sp->role.invalid = 1;
  1194. list_move(&sp->link, &kvm->arch.active_mmu_pages);
  1195. kvm_reload_remote_mmus(kvm);
  1196. }
  1197. kvm_mmu_reset_last_pte_updated(kvm);
  1198. return ret;
  1199. }
  1200. /*
  1201. * Changing the number of mmu pages allocated to the vm
  1202. * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
  1203. */
  1204. void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
  1205. {
  1206. /*
  1207. * If we set the number of mmu pages to be smaller be than the
  1208. * number of actived pages , we must to free some mmu pages before we
  1209. * change the value
  1210. */
  1211. if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
  1212. kvm_nr_mmu_pages) {
  1213. int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
  1214. - kvm->arch.n_free_mmu_pages;
  1215. while (n_used_mmu_pages > kvm_nr_mmu_pages) {
  1216. struct kvm_mmu_page *page;
  1217. page = container_of(kvm->arch.active_mmu_pages.prev,
  1218. struct kvm_mmu_page, link);
  1219. kvm_mmu_zap_page(kvm, page);
  1220. n_used_mmu_pages--;
  1221. }
  1222. kvm->arch.n_free_mmu_pages = 0;
  1223. }
  1224. else
  1225. kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
  1226. - kvm->arch.n_alloc_mmu_pages;
  1227. kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
  1228. }
  1229. static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
  1230. {
  1231. unsigned index;
  1232. struct hlist_head *bucket;
  1233. struct kvm_mmu_page *sp;
  1234. struct hlist_node *node, *n;
  1235. int r;
  1236. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  1237. r = 0;
  1238. index = kvm_page_table_hashfn(gfn);
  1239. bucket = &kvm->arch.mmu_page_hash[index];
  1240. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
  1241. if (sp->gfn == gfn && !sp->role.metaphysical) {
  1242. pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
  1243. sp->role.word);
  1244. r = 1;
  1245. if (kvm_mmu_zap_page(kvm, sp))
  1246. n = bucket->first;
  1247. }
  1248. return r;
  1249. }
  1250. static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
  1251. {
  1252. struct kvm_mmu_page *sp;
  1253. while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
  1254. pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
  1255. kvm_mmu_zap_page(kvm, sp);
  1256. }
  1257. }
  1258. static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
  1259. {
  1260. int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
  1261. struct kvm_mmu_page *sp = page_header(__pa(pte));
  1262. __set_bit(slot, sp->slot_bitmap);
  1263. }
  1264. static void mmu_convert_notrap(struct kvm_mmu_page *sp)
  1265. {
  1266. int i;
  1267. u64 *pt = sp->spt;
  1268. if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
  1269. return;
  1270. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1271. if (pt[i] == shadow_notrap_nonpresent_pte)
  1272. set_shadow_pte(&pt[i], shadow_trap_nonpresent_pte);
  1273. }
  1274. }
  1275. struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
  1276. {
  1277. struct page *page;
  1278. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  1279. if (gpa == UNMAPPED_GVA)
  1280. return NULL;
  1281. page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1282. return page;
  1283. }
  1284. /*
  1285. * The function is based on mtrr_type_lookup() in
  1286. * arch/x86/kernel/cpu/mtrr/generic.c
  1287. */
  1288. static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
  1289. u64 start, u64 end)
  1290. {
  1291. int i;
  1292. u64 base, mask;
  1293. u8 prev_match, curr_match;
  1294. int num_var_ranges = KVM_NR_VAR_MTRR;
  1295. if (!mtrr_state->enabled)
  1296. return 0xFF;
  1297. /* Make end inclusive end, instead of exclusive */
  1298. end--;
  1299. /* Look in fixed ranges. Just return the type as per start */
  1300. if (mtrr_state->have_fixed && (start < 0x100000)) {
  1301. int idx;
  1302. if (start < 0x80000) {
  1303. idx = 0;
  1304. idx += (start >> 16);
  1305. return mtrr_state->fixed_ranges[idx];
  1306. } else if (start < 0xC0000) {
  1307. idx = 1 * 8;
  1308. idx += ((start - 0x80000) >> 14);
  1309. return mtrr_state->fixed_ranges[idx];
  1310. } else if (start < 0x1000000) {
  1311. idx = 3 * 8;
  1312. idx += ((start - 0xC0000) >> 12);
  1313. return mtrr_state->fixed_ranges[idx];
  1314. }
  1315. }
  1316. /*
  1317. * Look in variable ranges
  1318. * Look of multiple ranges matching this address and pick type
  1319. * as per MTRR precedence
  1320. */
  1321. if (!(mtrr_state->enabled & 2))
  1322. return mtrr_state->def_type;
  1323. prev_match = 0xFF;
  1324. for (i = 0; i < num_var_ranges; ++i) {
  1325. unsigned short start_state, end_state;
  1326. if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
  1327. continue;
  1328. base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
  1329. (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
  1330. mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
  1331. (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
  1332. start_state = ((start & mask) == (base & mask));
  1333. end_state = ((end & mask) == (base & mask));
  1334. if (start_state != end_state)
  1335. return 0xFE;
  1336. if ((start & mask) != (base & mask))
  1337. continue;
  1338. curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
  1339. if (prev_match == 0xFF) {
  1340. prev_match = curr_match;
  1341. continue;
  1342. }
  1343. if (prev_match == MTRR_TYPE_UNCACHABLE ||
  1344. curr_match == MTRR_TYPE_UNCACHABLE)
  1345. return MTRR_TYPE_UNCACHABLE;
  1346. if ((prev_match == MTRR_TYPE_WRBACK &&
  1347. curr_match == MTRR_TYPE_WRTHROUGH) ||
  1348. (prev_match == MTRR_TYPE_WRTHROUGH &&
  1349. curr_match == MTRR_TYPE_WRBACK)) {
  1350. prev_match = MTRR_TYPE_WRTHROUGH;
  1351. curr_match = MTRR_TYPE_WRTHROUGH;
  1352. }
  1353. if (prev_match != curr_match)
  1354. return MTRR_TYPE_UNCACHABLE;
  1355. }
  1356. if (prev_match != 0xFF)
  1357. return prev_match;
  1358. return mtrr_state->def_type;
  1359. }
  1360. static u8 get_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
  1361. {
  1362. u8 mtrr;
  1363. mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
  1364. (gfn << PAGE_SHIFT) + PAGE_SIZE);
  1365. if (mtrr == 0xfe || mtrr == 0xff)
  1366. mtrr = MTRR_TYPE_WRBACK;
  1367. return mtrr;
  1368. }
  1369. static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  1370. {
  1371. unsigned index;
  1372. struct hlist_head *bucket;
  1373. struct kvm_mmu_page *s;
  1374. struct hlist_node *node, *n;
  1375. index = kvm_page_table_hashfn(sp->gfn);
  1376. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1377. /* don't unsync if pagetable is shadowed with multiple roles */
  1378. hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
  1379. if (s->gfn != sp->gfn || s->role.metaphysical)
  1380. continue;
  1381. if (s->role.word != sp->role.word)
  1382. return 1;
  1383. }
  1384. ++vcpu->kvm->stat.mmu_unsync;
  1385. sp->unsync = 1;
  1386. if (sp->global) {
  1387. list_add(&sp->oos_link, &vcpu->kvm->arch.oos_global_pages);
  1388. ++vcpu->kvm->stat.mmu_unsync_global;
  1389. } else
  1390. kvm_mmu_mark_parents_unsync(vcpu, sp);
  1391. mmu_convert_notrap(sp);
  1392. return 0;
  1393. }
  1394. static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
  1395. bool can_unsync)
  1396. {
  1397. struct kvm_mmu_page *shadow;
  1398. shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
  1399. if (shadow) {
  1400. if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
  1401. return 1;
  1402. if (shadow->unsync)
  1403. return 0;
  1404. if (can_unsync && oos_shadow)
  1405. return kvm_unsync_page(vcpu, shadow);
  1406. return 1;
  1407. }
  1408. return 0;
  1409. }
  1410. static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
  1411. unsigned pte_access, int user_fault,
  1412. int write_fault, int dirty, int largepage,
  1413. int global, gfn_t gfn, pfn_t pfn, bool speculative,
  1414. bool can_unsync)
  1415. {
  1416. u64 spte;
  1417. int ret = 0;
  1418. u64 mt_mask = shadow_mt_mask;
  1419. struct kvm_mmu_page *sp = page_header(__pa(shadow_pte));
  1420. if (!global && sp->global) {
  1421. sp->global = 0;
  1422. if (sp->unsync) {
  1423. kvm_unlink_unsync_global(vcpu->kvm, sp);
  1424. kvm_mmu_mark_parents_unsync(vcpu, sp);
  1425. }
  1426. }
  1427. /*
  1428. * We don't set the accessed bit, since we sometimes want to see
  1429. * whether the guest actually used the pte (in order to detect
  1430. * demand paging).
  1431. */
  1432. spte = shadow_base_present_pte | shadow_dirty_mask;
  1433. if (!speculative)
  1434. spte |= shadow_accessed_mask;
  1435. if (!dirty)
  1436. pte_access &= ~ACC_WRITE_MASK;
  1437. if (pte_access & ACC_EXEC_MASK)
  1438. spte |= shadow_x_mask;
  1439. else
  1440. spte |= shadow_nx_mask;
  1441. if (pte_access & ACC_USER_MASK)
  1442. spte |= shadow_user_mask;
  1443. if (largepage)
  1444. spte |= PT_PAGE_SIZE_MASK;
  1445. if (mt_mask) {
  1446. if (!kvm_is_mmio_pfn(pfn)) {
  1447. mt_mask = get_memory_type(vcpu, gfn) <<
  1448. kvm_x86_ops->get_mt_mask_shift();
  1449. mt_mask |= VMX_EPT_IGMT_BIT;
  1450. } else
  1451. mt_mask = MTRR_TYPE_UNCACHABLE <<
  1452. kvm_x86_ops->get_mt_mask_shift();
  1453. spte |= mt_mask;
  1454. }
  1455. spte |= (u64)pfn << PAGE_SHIFT;
  1456. if ((pte_access & ACC_WRITE_MASK)
  1457. || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
  1458. if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
  1459. ret = 1;
  1460. spte = shadow_trap_nonpresent_pte;
  1461. goto set_pte;
  1462. }
  1463. spte |= PT_WRITABLE_MASK;
  1464. /*
  1465. * Optimization: for pte sync, if spte was writable the hash
  1466. * lookup is unnecessary (and expensive). Write protection
  1467. * is responsibility of mmu_get_page / kvm_sync_page.
  1468. * Same reasoning can be applied to dirty page accounting.
  1469. */
  1470. if (!can_unsync && is_writeble_pte(*shadow_pte))
  1471. goto set_pte;
  1472. if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
  1473. pgprintk("%s: found shadow page for %lx, marking ro\n",
  1474. __func__, gfn);
  1475. ret = 1;
  1476. pte_access &= ~ACC_WRITE_MASK;
  1477. if (is_writeble_pte(spte))
  1478. spte &= ~PT_WRITABLE_MASK;
  1479. }
  1480. }
  1481. if (pte_access & ACC_WRITE_MASK)
  1482. mark_page_dirty(vcpu->kvm, gfn);
  1483. set_pte:
  1484. set_shadow_pte(shadow_pte, spte);
  1485. return ret;
  1486. }
  1487. static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
  1488. unsigned pt_access, unsigned pte_access,
  1489. int user_fault, int write_fault, int dirty,
  1490. int *ptwrite, int largepage, int global,
  1491. gfn_t gfn, pfn_t pfn, bool speculative)
  1492. {
  1493. int was_rmapped = 0;
  1494. int was_writeble = is_writeble_pte(*shadow_pte);
  1495. pgprintk("%s: spte %llx access %x write_fault %d"
  1496. " user_fault %d gfn %lx\n",
  1497. __func__, *shadow_pte, pt_access,
  1498. write_fault, user_fault, gfn);
  1499. if (is_rmap_pte(*shadow_pte)) {
  1500. /*
  1501. * If we overwrite a PTE page pointer with a 2MB PMD, unlink
  1502. * the parent of the now unreachable PTE.
  1503. */
  1504. if (largepage && !is_large_pte(*shadow_pte)) {
  1505. struct kvm_mmu_page *child;
  1506. u64 pte = *shadow_pte;
  1507. child = page_header(pte & PT64_BASE_ADDR_MASK);
  1508. mmu_page_remove_parent_pte(child, shadow_pte);
  1509. } else if (pfn != spte_to_pfn(*shadow_pte)) {
  1510. pgprintk("hfn old %lx new %lx\n",
  1511. spte_to_pfn(*shadow_pte), pfn);
  1512. rmap_remove(vcpu->kvm, shadow_pte);
  1513. } else {
  1514. if (largepage)
  1515. was_rmapped = is_large_pte(*shadow_pte);
  1516. else
  1517. was_rmapped = 1;
  1518. }
  1519. }
  1520. if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
  1521. dirty, largepage, global, gfn, pfn, speculative, true)) {
  1522. if (write_fault)
  1523. *ptwrite = 1;
  1524. kvm_x86_ops->tlb_flush(vcpu);
  1525. }
  1526. pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte);
  1527. pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
  1528. is_large_pte(*shadow_pte)? "2MB" : "4kB",
  1529. is_present_pte(*shadow_pte)?"RW":"R", gfn,
  1530. *shadow_pte, shadow_pte);
  1531. if (!was_rmapped && is_large_pte(*shadow_pte))
  1532. ++vcpu->kvm->stat.lpages;
  1533. page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
  1534. if (!was_rmapped) {
  1535. rmap_add(vcpu, shadow_pte, gfn, largepage);
  1536. if (!is_rmap_pte(*shadow_pte))
  1537. kvm_release_pfn_clean(pfn);
  1538. } else {
  1539. if (was_writeble)
  1540. kvm_release_pfn_dirty(pfn);
  1541. else
  1542. kvm_release_pfn_clean(pfn);
  1543. }
  1544. if (speculative) {
  1545. vcpu->arch.last_pte_updated = shadow_pte;
  1546. vcpu->arch.last_pte_gfn = gfn;
  1547. }
  1548. }
  1549. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  1550. {
  1551. }
  1552. static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
  1553. int largepage, gfn_t gfn, pfn_t pfn)
  1554. {
  1555. struct kvm_shadow_walk_iterator iterator;
  1556. struct kvm_mmu_page *sp;
  1557. int pt_write = 0;
  1558. gfn_t pseudo_gfn;
  1559. for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
  1560. if (iterator.level == PT_PAGE_TABLE_LEVEL
  1561. || (largepage && iterator.level == PT_DIRECTORY_LEVEL)) {
  1562. mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
  1563. 0, write, 1, &pt_write,
  1564. largepage, 0, gfn, pfn, false);
  1565. ++vcpu->stat.pf_fixed;
  1566. break;
  1567. }
  1568. if (*iterator.sptep == shadow_trap_nonpresent_pte) {
  1569. pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
  1570. sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
  1571. iterator.level - 1,
  1572. 1, ACC_ALL, iterator.sptep);
  1573. if (!sp) {
  1574. pgprintk("nonpaging_map: ENOMEM\n");
  1575. kvm_release_pfn_clean(pfn);
  1576. return -ENOMEM;
  1577. }
  1578. set_shadow_pte(iterator.sptep,
  1579. __pa(sp->spt)
  1580. | PT_PRESENT_MASK | PT_WRITABLE_MASK
  1581. | shadow_user_mask | shadow_x_mask);
  1582. }
  1583. }
  1584. return pt_write;
  1585. }
  1586. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
  1587. {
  1588. int r;
  1589. int largepage = 0;
  1590. pfn_t pfn;
  1591. unsigned long mmu_seq;
  1592. if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
  1593. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1594. largepage = 1;
  1595. }
  1596. mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1597. smp_rmb();
  1598. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1599. /* mmio */
  1600. if (is_error_pfn(pfn)) {
  1601. kvm_release_pfn_clean(pfn);
  1602. return 1;
  1603. }
  1604. spin_lock(&vcpu->kvm->mmu_lock);
  1605. if (mmu_notifier_retry(vcpu, mmu_seq))
  1606. goto out_unlock;
  1607. kvm_mmu_free_some_pages(vcpu);
  1608. r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
  1609. spin_unlock(&vcpu->kvm->mmu_lock);
  1610. return r;
  1611. out_unlock:
  1612. spin_unlock(&vcpu->kvm->mmu_lock);
  1613. kvm_release_pfn_clean(pfn);
  1614. return 0;
  1615. }
  1616. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  1617. {
  1618. int i;
  1619. struct kvm_mmu_page *sp;
  1620. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1621. return;
  1622. spin_lock(&vcpu->kvm->mmu_lock);
  1623. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1624. hpa_t root = vcpu->arch.mmu.root_hpa;
  1625. sp = page_header(root);
  1626. --sp->root_count;
  1627. if (!sp->root_count && sp->role.invalid)
  1628. kvm_mmu_zap_page(vcpu->kvm, sp);
  1629. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1630. spin_unlock(&vcpu->kvm->mmu_lock);
  1631. return;
  1632. }
  1633. for (i = 0; i < 4; ++i) {
  1634. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1635. if (root) {
  1636. root &= PT64_BASE_ADDR_MASK;
  1637. sp = page_header(root);
  1638. --sp->root_count;
  1639. if (!sp->root_count && sp->role.invalid)
  1640. kvm_mmu_zap_page(vcpu->kvm, sp);
  1641. }
  1642. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  1643. }
  1644. spin_unlock(&vcpu->kvm->mmu_lock);
  1645. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1646. }
  1647. static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
  1648. {
  1649. int i;
  1650. gfn_t root_gfn;
  1651. struct kvm_mmu_page *sp;
  1652. int metaphysical = 0;
  1653. root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
  1654. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1655. hpa_t root = vcpu->arch.mmu.root_hpa;
  1656. ASSERT(!VALID_PAGE(root));
  1657. if (tdp_enabled)
  1658. metaphysical = 1;
  1659. sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
  1660. PT64_ROOT_LEVEL, metaphysical,
  1661. ACC_ALL, NULL);
  1662. root = __pa(sp->spt);
  1663. ++sp->root_count;
  1664. vcpu->arch.mmu.root_hpa = root;
  1665. return;
  1666. }
  1667. metaphysical = !is_paging(vcpu);
  1668. if (tdp_enabled)
  1669. metaphysical = 1;
  1670. for (i = 0; i < 4; ++i) {
  1671. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1672. ASSERT(!VALID_PAGE(root));
  1673. if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
  1674. if (!is_present_pte(vcpu->arch.pdptrs[i])) {
  1675. vcpu->arch.mmu.pae_root[i] = 0;
  1676. continue;
  1677. }
  1678. root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
  1679. } else if (vcpu->arch.mmu.root_level == 0)
  1680. root_gfn = 0;
  1681. sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  1682. PT32_ROOT_LEVEL, metaphysical,
  1683. ACC_ALL, NULL);
  1684. root = __pa(sp->spt);
  1685. ++sp->root_count;
  1686. vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
  1687. }
  1688. vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
  1689. }
  1690. static void mmu_sync_roots(struct kvm_vcpu *vcpu)
  1691. {
  1692. int i;
  1693. struct kvm_mmu_page *sp;
  1694. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1695. return;
  1696. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1697. hpa_t root = vcpu->arch.mmu.root_hpa;
  1698. sp = page_header(root);
  1699. mmu_sync_children(vcpu, sp);
  1700. return;
  1701. }
  1702. for (i = 0; i < 4; ++i) {
  1703. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1704. if (root) {
  1705. root &= PT64_BASE_ADDR_MASK;
  1706. sp = page_header(root);
  1707. mmu_sync_children(vcpu, sp);
  1708. }
  1709. }
  1710. }
  1711. static void mmu_sync_global(struct kvm_vcpu *vcpu)
  1712. {
  1713. struct kvm *kvm = vcpu->kvm;
  1714. struct kvm_mmu_page *sp, *n;
  1715. list_for_each_entry_safe(sp, n, &kvm->arch.oos_global_pages, oos_link)
  1716. kvm_sync_page(vcpu, sp);
  1717. }
  1718. void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
  1719. {
  1720. spin_lock(&vcpu->kvm->mmu_lock);
  1721. mmu_sync_roots(vcpu);
  1722. spin_unlock(&vcpu->kvm->mmu_lock);
  1723. }
  1724. void kvm_mmu_sync_global(struct kvm_vcpu *vcpu)
  1725. {
  1726. spin_lock(&vcpu->kvm->mmu_lock);
  1727. mmu_sync_global(vcpu);
  1728. spin_unlock(&vcpu->kvm->mmu_lock);
  1729. }
  1730. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
  1731. {
  1732. return vaddr;
  1733. }
  1734. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  1735. u32 error_code)
  1736. {
  1737. gfn_t gfn;
  1738. int r;
  1739. pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
  1740. r = mmu_topup_memory_caches(vcpu);
  1741. if (r)
  1742. return r;
  1743. ASSERT(vcpu);
  1744. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1745. gfn = gva >> PAGE_SHIFT;
  1746. return nonpaging_map(vcpu, gva & PAGE_MASK,
  1747. error_code & PFERR_WRITE_MASK, gfn);
  1748. }
  1749. static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
  1750. u32 error_code)
  1751. {
  1752. pfn_t pfn;
  1753. int r;
  1754. int largepage = 0;
  1755. gfn_t gfn = gpa >> PAGE_SHIFT;
  1756. unsigned long mmu_seq;
  1757. ASSERT(vcpu);
  1758. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1759. r = mmu_topup_memory_caches(vcpu);
  1760. if (r)
  1761. return r;
  1762. if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
  1763. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1764. largepage = 1;
  1765. }
  1766. mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1767. smp_rmb();
  1768. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1769. if (is_error_pfn(pfn)) {
  1770. kvm_release_pfn_clean(pfn);
  1771. return 1;
  1772. }
  1773. spin_lock(&vcpu->kvm->mmu_lock);
  1774. if (mmu_notifier_retry(vcpu, mmu_seq))
  1775. goto out_unlock;
  1776. kvm_mmu_free_some_pages(vcpu);
  1777. r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
  1778. largepage, gfn, pfn);
  1779. spin_unlock(&vcpu->kvm->mmu_lock);
  1780. return r;
  1781. out_unlock:
  1782. spin_unlock(&vcpu->kvm->mmu_lock);
  1783. kvm_release_pfn_clean(pfn);
  1784. return 0;
  1785. }
  1786. static void nonpaging_free(struct kvm_vcpu *vcpu)
  1787. {
  1788. mmu_free_roots(vcpu);
  1789. }
  1790. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  1791. {
  1792. struct kvm_mmu *context = &vcpu->arch.mmu;
  1793. context->new_cr3 = nonpaging_new_cr3;
  1794. context->page_fault = nonpaging_page_fault;
  1795. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1796. context->free = nonpaging_free;
  1797. context->prefetch_page = nonpaging_prefetch_page;
  1798. context->sync_page = nonpaging_sync_page;
  1799. context->invlpg = nonpaging_invlpg;
  1800. context->root_level = 0;
  1801. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1802. context->root_hpa = INVALID_PAGE;
  1803. return 0;
  1804. }
  1805. void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  1806. {
  1807. ++vcpu->stat.tlb_flush;
  1808. kvm_x86_ops->tlb_flush(vcpu);
  1809. }
  1810. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  1811. {
  1812. pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
  1813. mmu_free_roots(vcpu);
  1814. }
  1815. static void inject_page_fault(struct kvm_vcpu *vcpu,
  1816. u64 addr,
  1817. u32 err_code)
  1818. {
  1819. kvm_inject_page_fault(vcpu, addr, err_code);
  1820. }
  1821. static void paging_free(struct kvm_vcpu *vcpu)
  1822. {
  1823. nonpaging_free(vcpu);
  1824. }
  1825. #define PTTYPE 64
  1826. #include "paging_tmpl.h"
  1827. #undef PTTYPE
  1828. #define PTTYPE 32
  1829. #include "paging_tmpl.h"
  1830. #undef PTTYPE
  1831. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  1832. {
  1833. struct kvm_mmu *context = &vcpu->arch.mmu;
  1834. ASSERT(is_pae(vcpu));
  1835. context->new_cr3 = paging_new_cr3;
  1836. context->page_fault = paging64_page_fault;
  1837. context->gva_to_gpa = paging64_gva_to_gpa;
  1838. context->prefetch_page = paging64_prefetch_page;
  1839. context->sync_page = paging64_sync_page;
  1840. context->invlpg = paging64_invlpg;
  1841. context->free = paging_free;
  1842. context->root_level = level;
  1843. context->shadow_root_level = level;
  1844. context->root_hpa = INVALID_PAGE;
  1845. return 0;
  1846. }
  1847. static int paging64_init_context(struct kvm_vcpu *vcpu)
  1848. {
  1849. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  1850. }
  1851. static int paging32_init_context(struct kvm_vcpu *vcpu)
  1852. {
  1853. struct kvm_mmu *context = &vcpu->arch.mmu;
  1854. context->new_cr3 = paging_new_cr3;
  1855. context->page_fault = paging32_page_fault;
  1856. context->gva_to_gpa = paging32_gva_to_gpa;
  1857. context->free = paging_free;
  1858. context->prefetch_page = paging32_prefetch_page;
  1859. context->sync_page = paging32_sync_page;
  1860. context->invlpg = paging32_invlpg;
  1861. context->root_level = PT32_ROOT_LEVEL;
  1862. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1863. context->root_hpa = INVALID_PAGE;
  1864. return 0;
  1865. }
  1866. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  1867. {
  1868. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  1869. }
  1870. static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
  1871. {
  1872. struct kvm_mmu *context = &vcpu->arch.mmu;
  1873. context->new_cr3 = nonpaging_new_cr3;
  1874. context->page_fault = tdp_page_fault;
  1875. context->free = nonpaging_free;
  1876. context->prefetch_page = nonpaging_prefetch_page;
  1877. context->sync_page = nonpaging_sync_page;
  1878. context->invlpg = nonpaging_invlpg;
  1879. context->shadow_root_level = kvm_x86_ops->get_tdp_level();
  1880. context->root_hpa = INVALID_PAGE;
  1881. if (!is_paging(vcpu)) {
  1882. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1883. context->root_level = 0;
  1884. } else if (is_long_mode(vcpu)) {
  1885. context->gva_to_gpa = paging64_gva_to_gpa;
  1886. context->root_level = PT64_ROOT_LEVEL;
  1887. } else if (is_pae(vcpu)) {
  1888. context->gva_to_gpa = paging64_gva_to_gpa;
  1889. context->root_level = PT32E_ROOT_LEVEL;
  1890. } else {
  1891. context->gva_to_gpa = paging32_gva_to_gpa;
  1892. context->root_level = PT32_ROOT_LEVEL;
  1893. }
  1894. return 0;
  1895. }
  1896. static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
  1897. {
  1898. int r;
  1899. ASSERT(vcpu);
  1900. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1901. if (!is_paging(vcpu))
  1902. r = nonpaging_init_context(vcpu);
  1903. else if (is_long_mode(vcpu))
  1904. r = paging64_init_context(vcpu);
  1905. else if (is_pae(vcpu))
  1906. r = paging32E_init_context(vcpu);
  1907. else
  1908. r = paging32_init_context(vcpu);
  1909. vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
  1910. return r;
  1911. }
  1912. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  1913. {
  1914. vcpu->arch.update_pte.pfn = bad_pfn;
  1915. if (tdp_enabled)
  1916. return init_kvm_tdp_mmu(vcpu);
  1917. else
  1918. return init_kvm_softmmu(vcpu);
  1919. }
  1920. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  1921. {
  1922. ASSERT(vcpu);
  1923. if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
  1924. vcpu->arch.mmu.free(vcpu);
  1925. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1926. }
  1927. }
  1928. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  1929. {
  1930. destroy_kvm_mmu(vcpu);
  1931. return init_kvm_mmu(vcpu);
  1932. }
  1933. EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
  1934. int kvm_mmu_load(struct kvm_vcpu *vcpu)
  1935. {
  1936. int r;
  1937. r = mmu_topup_memory_caches(vcpu);
  1938. if (r)
  1939. goto out;
  1940. spin_lock(&vcpu->kvm->mmu_lock);
  1941. kvm_mmu_free_some_pages(vcpu);
  1942. mmu_alloc_roots(vcpu);
  1943. mmu_sync_roots(vcpu);
  1944. spin_unlock(&vcpu->kvm->mmu_lock);
  1945. kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
  1946. kvm_mmu_flush_tlb(vcpu);
  1947. out:
  1948. return r;
  1949. }
  1950. EXPORT_SYMBOL_GPL(kvm_mmu_load);
  1951. void kvm_mmu_unload(struct kvm_vcpu *vcpu)
  1952. {
  1953. mmu_free_roots(vcpu);
  1954. }
  1955. static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
  1956. struct kvm_mmu_page *sp,
  1957. u64 *spte)
  1958. {
  1959. u64 pte;
  1960. struct kvm_mmu_page *child;
  1961. pte = *spte;
  1962. if (is_shadow_present_pte(pte)) {
  1963. if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
  1964. is_large_pte(pte))
  1965. rmap_remove(vcpu->kvm, spte);
  1966. else {
  1967. child = page_header(pte & PT64_BASE_ADDR_MASK);
  1968. mmu_page_remove_parent_pte(child, spte);
  1969. }
  1970. }
  1971. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  1972. if (is_large_pte(pte))
  1973. --vcpu->kvm->stat.lpages;
  1974. }
  1975. static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
  1976. struct kvm_mmu_page *sp,
  1977. u64 *spte,
  1978. const void *new)
  1979. {
  1980. if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
  1981. if (!vcpu->arch.update_pte.largepage ||
  1982. sp->role.glevels == PT32_ROOT_LEVEL) {
  1983. ++vcpu->kvm->stat.mmu_pde_zapped;
  1984. return;
  1985. }
  1986. }
  1987. ++vcpu->kvm->stat.mmu_pte_updated;
  1988. if (sp->role.glevels == PT32_ROOT_LEVEL)
  1989. paging32_update_pte(vcpu, sp, spte, new);
  1990. else
  1991. paging64_update_pte(vcpu, sp, spte, new);
  1992. }
  1993. static bool need_remote_flush(u64 old, u64 new)
  1994. {
  1995. if (!is_shadow_present_pte(old))
  1996. return false;
  1997. if (!is_shadow_present_pte(new))
  1998. return true;
  1999. if ((old ^ new) & PT64_BASE_ADDR_MASK)
  2000. return true;
  2001. old ^= PT64_NX_MASK;
  2002. new ^= PT64_NX_MASK;
  2003. return (old & ~new & PT64_PERM_MASK) != 0;
  2004. }
  2005. static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
  2006. {
  2007. if (need_remote_flush(old, new))
  2008. kvm_flush_remote_tlbs(vcpu->kvm);
  2009. else
  2010. kvm_mmu_flush_tlb(vcpu);
  2011. }
  2012. static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
  2013. {
  2014. u64 *spte = vcpu->arch.last_pte_updated;
  2015. return !!(spte && (*spte & shadow_accessed_mask));
  2016. }
  2017. static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  2018. const u8 *new, int bytes)
  2019. {
  2020. gfn_t gfn;
  2021. int r;
  2022. u64 gpte = 0;
  2023. pfn_t pfn;
  2024. vcpu->arch.update_pte.largepage = 0;
  2025. if (bytes != 4 && bytes != 8)
  2026. return;
  2027. /*
  2028. * Assume that the pte write on a page table of the same type
  2029. * as the current vcpu paging mode. This is nearly always true
  2030. * (might be false while changing modes). Note it is verified later
  2031. * by update_pte().
  2032. */
  2033. if (is_pae(vcpu)) {
  2034. /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
  2035. if ((bytes == 4) && (gpa % 4 == 0)) {
  2036. r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
  2037. if (r)
  2038. return;
  2039. memcpy((void *)&gpte + (gpa % 8), new, 4);
  2040. } else if ((bytes == 8) && (gpa % 8 == 0)) {
  2041. memcpy((void *)&gpte, new, 8);
  2042. }
  2043. } else {
  2044. if ((bytes == 4) && (gpa % 4 == 0))
  2045. memcpy((void *)&gpte, new, 4);
  2046. }
  2047. if (!is_present_pte(gpte))
  2048. return;
  2049. gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  2050. if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
  2051. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  2052. vcpu->arch.update_pte.largepage = 1;
  2053. }
  2054. vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
  2055. smp_rmb();
  2056. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  2057. if (is_error_pfn(pfn)) {
  2058. kvm_release_pfn_clean(pfn);
  2059. return;
  2060. }
  2061. vcpu->arch.update_pte.gfn = gfn;
  2062. vcpu->arch.update_pte.pfn = pfn;
  2063. }
  2064. static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
  2065. {
  2066. u64 *spte = vcpu->arch.last_pte_updated;
  2067. if (spte
  2068. && vcpu->arch.last_pte_gfn == gfn
  2069. && shadow_accessed_mask
  2070. && !(*spte & shadow_accessed_mask)
  2071. && is_shadow_present_pte(*spte))
  2072. set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
  2073. }
  2074. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  2075. const u8 *new, int bytes,
  2076. bool guest_initiated)
  2077. {
  2078. gfn_t gfn = gpa >> PAGE_SHIFT;
  2079. struct kvm_mmu_page *sp;
  2080. struct hlist_node *node, *n;
  2081. struct hlist_head *bucket;
  2082. unsigned index;
  2083. u64 entry, gentry;
  2084. u64 *spte;
  2085. unsigned offset = offset_in_page(gpa);
  2086. unsigned pte_size;
  2087. unsigned page_offset;
  2088. unsigned misaligned;
  2089. unsigned quadrant;
  2090. int level;
  2091. int flooded = 0;
  2092. int npte;
  2093. int r;
  2094. pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
  2095. mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
  2096. spin_lock(&vcpu->kvm->mmu_lock);
  2097. kvm_mmu_access_page(vcpu, gfn);
  2098. kvm_mmu_free_some_pages(vcpu);
  2099. ++vcpu->kvm->stat.mmu_pte_write;
  2100. kvm_mmu_audit(vcpu, "pre pte write");
  2101. if (guest_initiated) {
  2102. if (gfn == vcpu->arch.last_pt_write_gfn
  2103. && !last_updated_pte_accessed(vcpu)) {
  2104. ++vcpu->arch.last_pt_write_count;
  2105. if (vcpu->arch.last_pt_write_count >= 3)
  2106. flooded = 1;
  2107. } else {
  2108. vcpu->arch.last_pt_write_gfn = gfn;
  2109. vcpu->arch.last_pt_write_count = 1;
  2110. vcpu->arch.last_pte_updated = NULL;
  2111. }
  2112. }
  2113. index = kvm_page_table_hashfn(gfn);
  2114. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  2115. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
  2116. if (sp->gfn != gfn || sp->role.metaphysical || sp->role.invalid)
  2117. continue;
  2118. pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
  2119. misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
  2120. misaligned |= bytes < 4;
  2121. if (misaligned || flooded) {
  2122. /*
  2123. * Misaligned accesses are too much trouble to fix
  2124. * up; also, they usually indicate a page is not used
  2125. * as a page table.
  2126. *
  2127. * If we're seeing too many writes to a page,
  2128. * it may no longer be a page table, or we may be
  2129. * forking, in which case it is better to unmap the
  2130. * page.
  2131. */
  2132. pgprintk("misaligned: gpa %llx bytes %d role %x\n",
  2133. gpa, bytes, sp->role.word);
  2134. if (kvm_mmu_zap_page(vcpu->kvm, sp))
  2135. n = bucket->first;
  2136. ++vcpu->kvm->stat.mmu_flooded;
  2137. continue;
  2138. }
  2139. page_offset = offset;
  2140. level = sp->role.level;
  2141. npte = 1;
  2142. if (sp->role.glevels == PT32_ROOT_LEVEL) {
  2143. page_offset <<= 1; /* 32->64 */
  2144. /*
  2145. * A 32-bit pde maps 4MB while the shadow pdes map
  2146. * only 2MB. So we need to double the offset again
  2147. * and zap two pdes instead of one.
  2148. */
  2149. if (level == PT32_ROOT_LEVEL) {
  2150. page_offset &= ~7; /* kill rounding error */
  2151. page_offset <<= 1;
  2152. npte = 2;
  2153. }
  2154. quadrant = page_offset >> PAGE_SHIFT;
  2155. page_offset &= ~PAGE_MASK;
  2156. if (quadrant != sp->role.quadrant)
  2157. continue;
  2158. }
  2159. spte = &sp->spt[page_offset / sizeof(*spte)];
  2160. if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
  2161. gentry = 0;
  2162. r = kvm_read_guest_atomic(vcpu->kvm,
  2163. gpa & ~(u64)(pte_size - 1),
  2164. &gentry, pte_size);
  2165. new = (const void *)&gentry;
  2166. if (r < 0)
  2167. new = NULL;
  2168. }
  2169. while (npte--) {
  2170. entry = *spte;
  2171. mmu_pte_write_zap_pte(vcpu, sp, spte);
  2172. if (new)
  2173. mmu_pte_write_new_pte(vcpu, sp, spte, new);
  2174. mmu_pte_write_flush_tlb(vcpu, entry, *spte);
  2175. ++spte;
  2176. }
  2177. }
  2178. kvm_mmu_audit(vcpu, "post pte write");
  2179. spin_unlock(&vcpu->kvm->mmu_lock);
  2180. if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
  2181. kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
  2182. vcpu->arch.update_pte.pfn = bad_pfn;
  2183. }
  2184. }
  2185. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  2186. {
  2187. gpa_t gpa;
  2188. int r;
  2189. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  2190. spin_lock(&vcpu->kvm->mmu_lock);
  2191. r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  2192. spin_unlock(&vcpu->kvm->mmu_lock);
  2193. return r;
  2194. }
  2195. EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
  2196. void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  2197. {
  2198. while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
  2199. struct kvm_mmu_page *sp;
  2200. sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
  2201. struct kvm_mmu_page, link);
  2202. kvm_mmu_zap_page(vcpu->kvm, sp);
  2203. ++vcpu->kvm->stat.mmu_recycled;
  2204. }
  2205. }
  2206. int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
  2207. {
  2208. int r;
  2209. enum emulation_result er;
  2210. r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
  2211. if (r < 0)
  2212. goto out;
  2213. if (!r) {
  2214. r = 1;
  2215. goto out;
  2216. }
  2217. r = mmu_topup_memory_caches(vcpu);
  2218. if (r)
  2219. goto out;
  2220. er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
  2221. switch (er) {
  2222. case EMULATE_DONE:
  2223. return 1;
  2224. case EMULATE_DO_MMIO:
  2225. ++vcpu->stat.mmio_exits;
  2226. return 0;
  2227. case EMULATE_FAIL:
  2228. kvm_report_emulation_failure(vcpu, "pagetable");
  2229. return 1;
  2230. default:
  2231. BUG();
  2232. }
  2233. out:
  2234. return r;
  2235. }
  2236. EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
  2237. void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
  2238. {
  2239. vcpu->arch.mmu.invlpg(vcpu, gva);
  2240. kvm_mmu_flush_tlb(vcpu);
  2241. ++vcpu->stat.invlpg;
  2242. }
  2243. EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
  2244. void kvm_enable_tdp(void)
  2245. {
  2246. tdp_enabled = true;
  2247. }
  2248. EXPORT_SYMBOL_GPL(kvm_enable_tdp);
  2249. void kvm_disable_tdp(void)
  2250. {
  2251. tdp_enabled = false;
  2252. }
  2253. EXPORT_SYMBOL_GPL(kvm_disable_tdp);
  2254. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  2255. {
  2256. struct kvm_mmu_page *sp;
  2257. while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
  2258. sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
  2259. struct kvm_mmu_page, link);
  2260. kvm_mmu_zap_page(vcpu->kvm, sp);
  2261. cond_resched();
  2262. }
  2263. free_page((unsigned long)vcpu->arch.mmu.pae_root);
  2264. }
  2265. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  2266. {
  2267. struct page *page;
  2268. int i;
  2269. ASSERT(vcpu);
  2270. if (vcpu->kvm->arch.n_requested_mmu_pages)
  2271. vcpu->kvm->arch.n_free_mmu_pages =
  2272. vcpu->kvm->arch.n_requested_mmu_pages;
  2273. else
  2274. vcpu->kvm->arch.n_free_mmu_pages =
  2275. vcpu->kvm->arch.n_alloc_mmu_pages;
  2276. /*
  2277. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  2278. * Therefore we need to allocate shadow page tables in the first
  2279. * 4GB of memory, which happens to fit the DMA32 zone.
  2280. */
  2281. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  2282. if (!page)
  2283. goto error_1;
  2284. vcpu->arch.mmu.pae_root = page_address(page);
  2285. for (i = 0; i < 4; ++i)
  2286. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  2287. return 0;
  2288. error_1:
  2289. free_mmu_pages(vcpu);
  2290. return -ENOMEM;
  2291. }
  2292. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  2293. {
  2294. ASSERT(vcpu);
  2295. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  2296. return alloc_mmu_pages(vcpu);
  2297. }
  2298. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  2299. {
  2300. ASSERT(vcpu);
  2301. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  2302. return init_kvm_mmu(vcpu);
  2303. }
  2304. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  2305. {
  2306. ASSERT(vcpu);
  2307. destroy_kvm_mmu(vcpu);
  2308. free_mmu_pages(vcpu);
  2309. mmu_free_memory_caches(vcpu);
  2310. }
  2311. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
  2312. {
  2313. struct kvm_mmu_page *sp;
  2314. spin_lock(&kvm->mmu_lock);
  2315. list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
  2316. int i;
  2317. u64 *pt;
  2318. if (!test_bit(slot, sp->slot_bitmap))
  2319. continue;
  2320. pt = sp->spt;
  2321. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  2322. /* avoid RMW */
  2323. if (pt[i] & PT_WRITABLE_MASK)
  2324. pt[i] &= ~PT_WRITABLE_MASK;
  2325. }
  2326. kvm_flush_remote_tlbs(kvm);
  2327. spin_unlock(&kvm->mmu_lock);
  2328. }
  2329. void kvm_mmu_zap_all(struct kvm *kvm)
  2330. {
  2331. struct kvm_mmu_page *sp, *node;
  2332. spin_lock(&kvm->mmu_lock);
  2333. list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
  2334. if (kvm_mmu_zap_page(kvm, sp))
  2335. node = container_of(kvm->arch.active_mmu_pages.next,
  2336. struct kvm_mmu_page, link);
  2337. spin_unlock(&kvm->mmu_lock);
  2338. kvm_flush_remote_tlbs(kvm);
  2339. }
  2340. static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
  2341. {
  2342. struct kvm_mmu_page *page;
  2343. page = container_of(kvm->arch.active_mmu_pages.prev,
  2344. struct kvm_mmu_page, link);
  2345. kvm_mmu_zap_page(kvm, page);
  2346. }
  2347. static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
  2348. {
  2349. struct kvm *kvm;
  2350. struct kvm *kvm_freed = NULL;
  2351. int cache_count = 0;
  2352. spin_lock(&kvm_lock);
  2353. list_for_each_entry(kvm, &vm_list, vm_list) {
  2354. int npages;
  2355. if (!down_read_trylock(&kvm->slots_lock))
  2356. continue;
  2357. spin_lock(&kvm->mmu_lock);
  2358. npages = kvm->arch.n_alloc_mmu_pages -
  2359. kvm->arch.n_free_mmu_pages;
  2360. cache_count += npages;
  2361. if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
  2362. kvm_mmu_remove_one_alloc_mmu_page(kvm);
  2363. cache_count--;
  2364. kvm_freed = kvm;
  2365. }
  2366. nr_to_scan--;
  2367. spin_unlock(&kvm->mmu_lock);
  2368. up_read(&kvm->slots_lock);
  2369. }
  2370. if (kvm_freed)
  2371. list_move_tail(&kvm_freed->vm_list, &vm_list);
  2372. spin_unlock(&kvm_lock);
  2373. return cache_count;
  2374. }
  2375. static struct shrinker mmu_shrinker = {
  2376. .shrink = mmu_shrink,
  2377. .seeks = DEFAULT_SEEKS * 10,
  2378. };
  2379. static void mmu_destroy_caches(void)
  2380. {
  2381. if (pte_chain_cache)
  2382. kmem_cache_destroy(pte_chain_cache);
  2383. if (rmap_desc_cache)
  2384. kmem_cache_destroy(rmap_desc_cache);
  2385. if (mmu_page_header_cache)
  2386. kmem_cache_destroy(mmu_page_header_cache);
  2387. }
  2388. void kvm_mmu_module_exit(void)
  2389. {
  2390. mmu_destroy_caches();
  2391. unregister_shrinker(&mmu_shrinker);
  2392. }
  2393. int kvm_mmu_module_init(void)
  2394. {
  2395. pte_chain_cache = kmem_cache_create("kvm_pte_chain",
  2396. sizeof(struct kvm_pte_chain),
  2397. 0, 0, NULL);
  2398. if (!pte_chain_cache)
  2399. goto nomem;
  2400. rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
  2401. sizeof(struct kvm_rmap_desc),
  2402. 0, 0, NULL);
  2403. if (!rmap_desc_cache)
  2404. goto nomem;
  2405. mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
  2406. sizeof(struct kvm_mmu_page),
  2407. 0, 0, NULL);
  2408. if (!mmu_page_header_cache)
  2409. goto nomem;
  2410. register_shrinker(&mmu_shrinker);
  2411. return 0;
  2412. nomem:
  2413. mmu_destroy_caches();
  2414. return -ENOMEM;
  2415. }
  2416. /*
  2417. * Caculate mmu pages needed for kvm.
  2418. */
  2419. unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
  2420. {
  2421. int i;
  2422. unsigned int nr_mmu_pages;
  2423. unsigned int nr_pages = 0;
  2424. for (i = 0; i < kvm->nmemslots; i++)
  2425. nr_pages += kvm->memslots[i].npages;
  2426. nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
  2427. nr_mmu_pages = max(nr_mmu_pages,
  2428. (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
  2429. return nr_mmu_pages;
  2430. }
  2431. static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  2432. unsigned len)
  2433. {
  2434. if (len > buffer->len)
  2435. return NULL;
  2436. return buffer->ptr;
  2437. }
  2438. static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  2439. unsigned len)
  2440. {
  2441. void *ret;
  2442. ret = pv_mmu_peek_buffer(buffer, len);
  2443. if (!ret)
  2444. return ret;
  2445. buffer->ptr += len;
  2446. buffer->len -= len;
  2447. buffer->processed += len;
  2448. return ret;
  2449. }
  2450. static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
  2451. gpa_t addr, gpa_t value)
  2452. {
  2453. int bytes = 8;
  2454. int r;
  2455. if (!is_long_mode(vcpu) && !is_pae(vcpu))
  2456. bytes = 4;
  2457. r = mmu_topup_memory_caches(vcpu);
  2458. if (r)
  2459. return r;
  2460. if (!emulator_write_phys(vcpu, addr, &value, bytes))
  2461. return -EFAULT;
  2462. return 1;
  2463. }
  2464. static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  2465. {
  2466. kvm_x86_ops->tlb_flush(vcpu);
  2467. set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
  2468. return 1;
  2469. }
  2470. static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
  2471. {
  2472. spin_lock(&vcpu->kvm->mmu_lock);
  2473. mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
  2474. spin_unlock(&vcpu->kvm->mmu_lock);
  2475. return 1;
  2476. }
  2477. static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
  2478. struct kvm_pv_mmu_op_buffer *buffer)
  2479. {
  2480. struct kvm_mmu_op_header *header;
  2481. header = pv_mmu_peek_buffer(buffer, sizeof *header);
  2482. if (!header)
  2483. return 0;
  2484. switch (header->op) {
  2485. case KVM_MMU_OP_WRITE_PTE: {
  2486. struct kvm_mmu_op_write_pte *wpte;
  2487. wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
  2488. if (!wpte)
  2489. return 0;
  2490. return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
  2491. wpte->pte_val);
  2492. }
  2493. case KVM_MMU_OP_FLUSH_TLB: {
  2494. struct kvm_mmu_op_flush_tlb *ftlb;
  2495. ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
  2496. if (!ftlb)
  2497. return 0;
  2498. return kvm_pv_mmu_flush_tlb(vcpu);
  2499. }
  2500. case KVM_MMU_OP_RELEASE_PT: {
  2501. struct kvm_mmu_op_release_pt *rpt;
  2502. rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
  2503. if (!rpt)
  2504. return 0;
  2505. return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
  2506. }
  2507. default: return 0;
  2508. }
  2509. }
  2510. int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
  2511. gpa_t addr, unsigned long *ret)
  2512. {
  2513. int r;
  2514. struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
  2515. buffer->ptr = buffer->buf;
  2516. buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
  2517. buffer->processed = 0;
  2518. r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
  2519. if (r)
  2520. goto out;
  2521. while (buffer->len) {
  2522. r = kvm_pv_mmu_op_one(vcpu, buffer);
  2523. if (r < 0)
  2524. goto out;
  2525. if (r == 0)
  2526. break;
  2527. }
  2528. r = 1;
  2529. out:
  2530. *ret = buffer->processed;
  2531. return r;
  2532. }
  2533. #ifdef AUDIT
  2534. static const char *audit_msg;
  2535. static gva_t canonicalize(gva_t gva)
  2536. {
  2537. #ifdef CONFIG_X86_64
  2538. gva = (long long)(gva << 16) >> 16;
  2539. #endif
  2540. return gva;
  2541. }
  2542. static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
  2543. gva_t va, int level)
  2544. {
  2545. u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
  2546. int i;
  2547. gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
  2548. for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
  2549. u64 ent = pt[i];
  2550. if (ent == shadow_trap_nonpresent_pte)
  2551. continue;
  2552. va = canonicalize(va);
  2553. if (level > 1) {
  2554. if (ent == shadow_notrap_nonpresent_pte)
  2555. printk(KERN_ERR "audit: (%s) nontrapping pte"
  2556. " in nonleaf level: levels %d gva %lx"
  2557. " level %d pte %llx\n", audit_msg,
  2558. vcpu->arch.mmu.root_level, va, level, ent);
  2559. audit_mappings_page(vcpu, ent, va, level - 1);
  2560. } else {
  2561. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
  2562. hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
  2563. if (is_shadow_present_pte(ent)
  2564. && (ent & PT64_BASE_ADDR_MASK) != hpa)
  2565. printk(KERN_ERR "xx audit error: (%s) levels %d"
  2566. " gva %lx gpa %llx hpa %llx ent %llx %d\n",
  2567. audit_msg, vcpu->arch.mmu.root_level,
  2568. va, gpa, hpa, ent,
  2569. is_shadow_present_pte(ent));
  2570. else if (ent == shadow_notrap_nonpresent_pte
  2571. && !is_error_hpa(hpa))
  2572. printk(KERN_ERR "audit: (%s) notrap shadow,"
  2573. " valid guest gva %lx\n", audit_msg, va);
  2574. kvm_release_pfn_clean(pfn);
  2575. }
  2576. }
  2577. }
  2578. static void audit_mappings(struct kvm_vcpu *vcpu)
  2579. {
  2580. unsigned i;
  2581. if (vcpu->arch.mmu.root_level == 4)
  2582. audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
  2583. else
  2584. for (i = 0; i < 4; ++i)
  2585. if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
  2586. audit_mappings_page(vcpu,
  2587. vcpu->arch.mmu.pae_root[i],
  2588. i << 30,
  2589. 2);
  2590. }
  2591. static int count_rmaps(struct kvm_vcpu *vcpu)
  2592. {
  2593. int nmaps = 0;
  2594. int i, j, k;
  2595. for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
  2596. struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
  2597. struct kvm_rmap_desc *d;
  2598. for (j = 0; j < m->npages; ++j) {
  2599. unsigned long *rmapp = &m->rmap[j];
  2600. if (!*rmapp)
  2601. continue;
  2602. if (!(*rmapp & 1)) {
  2603. ++nmaps;
  2604. continue;
  2605. }
  2606. d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  2607. while (d) {
  2608. for (k = 0; k < RMAP_EXT; ++k)
  2609. if (d->shadow_ptes[k])
  2610. ++nmaps;
  2611. else
  2612. break;
  2613. d = d->more;
  2614. }
  2615. }
  2616. }
  2617. return nmaps;
  2618. }
  2619. static int count_writable_mappings(struct kvm_vcpu *vcpu)
  2620. {
  2621. int nmaps = 0;
  2622. struct kvm_mmu_page *sp;
  2623. int i;
  2624. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  2625. u64 *pt = sp->spt;
  2626. if (sp->role.level != PT_PAGE_TABLE_LEVEL)
  2627. continue;
  2628. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  2629. u64 ent = pt[i];
  2630. if (!(ent & PT_PRESENT_MASK))
  2631. continue;
  2632. if (!(ent & PT_WRITABLE_MASK))
  2633. continue;
  2634. ++nmaps;
  2635. }
  2636. }
  2637. return nmaps;
  2638. }
  2639. static void audit_rmap(struct kvm_vcpu *vcpu)
  2640. {
  2641. int n_rmap = count_rmaps(vcpu);
  2642. int n_actual = count_writable_mappings(vcpu);
  2643. if (n_rmap != n_actual)
  2644. printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
  2645. __func__, audit_msg, n_rmap, n_actual);
  2646. }
  2647. static void audit_write_protection(struct kvm_vcpu *vcpu)
  2648. {
  2649. struct kvm_mmu_page *sp;
  2650. struct kvm_memory_slot *slot;
  2651. unsigned long *rmapp;
  2652. gfn_t gfn;
  2653. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  2654. if (sp->role.metaphysical)
  2655. continue;
  2656. gfn = unalias_gfn(vcpu->kvm, sp->gfn);
  2657. slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
  2658. rmapp = &slot->rmap[gfn - slot->base_gfn];
  2659. if (*rmapp)
  2660. printk(KERN_ERR "%s: (%s) shadow page has writable"
  2661. " mappings: gfn %lx role %x\n",
  2662. __func__, audit_msg, sp->gfn,
  2663. sp->role.word);
  2664. }
  2665. }
  2666. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
  2667. {
  2668. int olddbg = dbg;
  2669. dbg = 0;
  2670. audit_msg = msg;
  2671. audit_rmap(vcpu);
  2672. audit_write_protection(vcpu);
  2673. audit_mappings(vcpu);
  2674. dbg = olddbg;
  2675. }
  2676. #endif