Kconfig 6.2 KB

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  1. #
  2. # DMA engine configuration
  3. #
  4. menuconfig DMADEVICES
  5. bool "DMA Engine support"
  6. depends on HAS_DMA
  7. help
  8. DMA engines can do asynchronous data transfers without
  9. involving the host CPU. Currently, this framework can be
  10. used to offload memory copies in the network stack and
  11. RAID operations in the MD driver. This menu only presents
  12. DMA Device drivers supported by the configured arch, it may
  13. be empty in some cases.
  14. config DMADEVICES_DEBUG
  15. bool "DMA Engine debugging"
  16. depends on DMADEVICES != n
  17. help
  18. This is an option for use by developers; most people should
  19. say N here. This enables DMA engine core and driver debugging.
  20. config DMADEVICES_VDEBUG
  21. bool "DMA Engine verbose debugging"
  22. depends on DMADEVICES_DEBUG != n
  23. help
  24. This is an option for use by developers; most people should
  25. say N here. This enables deeper (more verbose) debugging of
  26. the DMA engine core and drivers.
  27. if DMADEVICES
  28. comment "DMA Devices"
  29. config INTEL_MID_DMAC
  30. tristate "Intel MID DMA support for Peripheral DMA controllers"
  31. depends on PCI && X86
  32. select DMA_ENGINE
  33. default n
  34. help
  35. Enable support for the Intel(R) MID DMA engine present
  36. in Intel MID chipsets.
  37. Say Y here if you have such a chipset.
  38. If unsure, say N.
  39. config ASYNC_TX_DISABLE_CHANNEL_SWITCH
  40. bool
  41. config AMBA_PL08X
  42. bool "ARM PrimeCell PL080 or PL081 support"
  43. depends on ARM_AMBA && EXPERIMENTAL
  44. select DMA_ENGINE
  45. help
  46. Platform has a PL08x DMAC device
  47. which can provide DMA engine support
  48. config INTEL_IOATDMA
  49. tristate "Intel I/OAT DMA support"
  50. depends on PCI && X86
  51. select DMA_ENGINE
  52. select DCA
  53. select ASYNC_TX_DISABLE_CHANNEL_SWITCH
  54. select ASYNC_TX_DISABLE_PQ_VAL_DMA
  55. select ASYNC_TX_DISABLE_XOR_VAL_DMA
  56. help
  57. Enable support for the Intel(R) I/OAT DMA engine present
  58. in recent Intel Xeon chipsets.
  59. Say Y here if you have such a chipset.
  60. If unsure, say N.
  61. config INTEL_IOP_ADMA
  62. tristate "Intel IOP ADMA support"
  63. depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
  64. select DMA_ENGINE
  65. help
  66. Enable support for the Intel(R) IOP Series RAID engines.
  67. config DW_DMAC
  68. tristate "Synopsys DesignWare AHB DMA support"
  69. depends on AVR32
  70. select DMA_ENGINE
  71. default y if CPU_AT32AP7000
  72. help
  73. Support the Synopsys DesignWare AHB DMA controller. This
  74. can be integrated in chips such as the Atmel AT32ap7000.
  75. config AT_HDMAC
  76. tristate "Atmel AHB DMA support"
  77. depends on ARCH_AT91SAM9RL || ARCH_AT91SAM9G45
  78. select DMA_ENGINE
  79. help
  80. Support the Atmel AHB DMA controller. This can be integrated in
  81. chips such as the Atmel AT91SAM9RL.
  82. config FSL_DMA
  83. tristate "Freescale Elo and Elo Plus DMA support"
  84. depends on FSL_SOC
  85. select DMA_ENGINE
  86. ---help---
  87. Enable support for the Freescale Elo and Elo Plus DMA controllers.
  88. The Elo is the DMA controller on some 82xx and 83xx parts, and the
  89. Elo Plus is the DMA controller on 85xx and 86xx parts.
  90. config MPC512X_DMA
  91. tristate "Freescale MPC512x built-in DMA engine support"
  92. depends on PPC_MPC512x
  93. select DMA_ENGINE
  94. ---help---
  95. Enable support for the Freescale MPC512x built-in DMA engine.
  96. config MV_XOR
  97. bool "Marvell XOR engine support"
  98. depends on PLAT_ORION
  99. select DMA_ENGINE
  100. ---help---
  101. Enable support for the Marvell XOR engine.
  102. config MX3_IPU
  103. bool "MX3x Image Processing Unit support"
  104. depends on ARCH_MX3
  105. select DMA_ENGINE
  106. default y
  107. help
  108. If you plan to use the Image Processing unit in the i.MX3x, say
  109. Y here. If unsure, select Y.
  110. config MX3_IPU_IRQS
  111. int "Number of dynamically mapped interrupts for IPU"
  112. depends on MX3_IPU
  113. range 2 137
  114. default 4
  115. help
  116. Out of 137 interrupt sources on i.MX31 IPU only very few are used.
  117. To avoid bloating the irq_desc[] array we allocate a sufficient
  118. number of IRQ slots and map them dynamically to specific sources.
  119. config TXX9_DMAC
  120. tristate "Toshiba TXx9 SoC DMA support"
  121. depends on MACH_TX49XX || MACH_TX39XX
  122. select DMA_ENGINE
  123. help
  124. Support the TXx9 SoC internal DMA controller. This can be
  125. integrated in chips such as the Toshiba TX4927/38/39.
  126. config SH_DMAE
  127. tristate "Renesas SuperH DMAC support"
  128. depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE)
  129. depends on !SH_DMA_API
  130. select DMA_ENGINE
  131. help
  132. Enable support for the Renesas SuperH DMA controllers.
  133. config COH901318
  134. bool "ST-Ericsson COH901318 DMA support"
  135. select DMA_ENGINE
  136. depends on ARCH_U300
  137. help
  138. Enable support for ST-Ericsson COH 901 318 DMA.
  139. config STE_DMA40
  140. bool "ST-Ericsson DMA40 support"
  141. depends on ARCH_U8500
  142. select DMA_ENGINE
  143. help
  144. Support for ST-Ericsson DMA40 controller
  145. config AMCC_PPC440SPE_ADMA
  146. tristate "AMCC PPC440SPe ADMA support"
  147. depends on 440SPe || 440SP
  148. select DMA_ENGINE
  149. select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
  150. help
  151. Enable support for the AMCC PPC440SPe RAID engines.
  152. config TIMB_DMA
  153. tristate "Timberdale FPGA DMA support"
  154. depends on MFD_TIMBERDALE || HAS_IOMEM
  155. select DMA_ENGINE
  156. help
  157. Enable support for the Timberdale FPGA DMA engine.
  158. config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
  159. bool
  160. config PL330_DMA
  161. tristate "DMA API Driver for PL330"
  162. select DMA_ENGINE
  163. depends on PL330
  164. help
  165. Select if your platform has one or more PL330 DMACs.
  166. You need to provide platform specific settings via
  167. platform_data for a dma-pl330 device.
  168. config PCH_DMA
  169. tristate "Topcliff PCH DMA support"
  170. depends on PCI && X86
  171. select DMA_ENGINE
  172. help
  173. Enable support for the Topcliff PCH DMA engine.
  174. config DMA_ENGINE
  175. bool
  176. comment "DMA Clients"
  177. depends on DMA_ENGINE
  178. config NET_DMA
  179. bool "Network: TCP receive copy offload"
  180. depends on DMA_ENGINE && NET
  181. default (INTEL_IOATDMA || FSL_DMA)
  182. help
  183. This enables the use of DMA engines in the network stack to
  184. offload receive copy-to-user operations, freeing CPU cycles.
  185. Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
  186. say N.
  187. config ASYNC_TX_DMA
  188. bool "Async_tx: Offload support for the async_tx api"
  189. depends on DMA_ENGINE
  190. help
  191. This allows the async_tx api to take advantage of offload engines for
  192. memcpy, memset, xor, and raid6 p+q operations. If your platform has
  193. a dma engine that can perform raid operations and you have enabled
  194. MD_RAID456 say Y.
  195. If unsure, say N.
  196. config DMATEST
  197. tristate "DMA Test client"
  198. depends on DMA_ENGINE
  199. help
  200. Simple DMA test client. Say N unless you're debugging a
  201. DMA Device driver.
  202. endif