Kconfig 65 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284
  1. config ARM
  2. bool
  3. default y
  4. select HAVE_AOUT
  5. select HAVE_DMA_API_DEBUG
  6. select HAVE_IDE if PCI || ISA || PCMCIA
  7. select HAVE_MEMBLOCK
  8. select RTC_LIB
  9. select SYS_SUPPORTS_APM_EMULATION
  10. select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  11. select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  12. select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
  13. select HAVE_ARCH_KGDB
  14. select HAVE_ARCH_TRACEHOOK
  15. select HAVE_KPROBES if !XIP_KERNEL
  16. select HAVE_KRETPROBES if (HAVE_KPROBES)
  17. select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  18. select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  19. select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  20. select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  21. select ARCH_BINFMT_ELF_RANDOMIZE_PIE
  22. select HAVE_GENERIC_DMA_COHERENT
  23. select HAVE_KERNEL_GZIP
  24. select HAVE_KERNEL_LZO
  25. select HAVE_KERNEL_LZMA
  26. select HAVE_KERNEL_XZ
  27. select HAVE_IRQ_WORK
  28. select HAVE_PERF_EVENTS
  29. select PERF_USE_VMALLOC
  30. select HAVE_REGS_AND_STACK_ACCESS_API
  31. select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  32. select HAVE_C_RECORDMCOUNT
  33. select HAVE_GENERIC_HARDIRQS
  34. select HARDIRQS_SW_RESEND
  35. select GENERIC_IRQ_PROBE
  36. select GENERIC_IRQ_SHOW
  37. select GENERIC_IRQ_PROBE
  38. select HARDIRQS_SW_RESEND
  39. select CPU_PM if (SUSPEND || CPU_IDLE)
  40. select GENERIC_PCI_IOMAP
  41. select HAVE_BPF_JIT
  42. select GENERIC_SMP_IDLE_THREAD
  43. help
  44. The ARM series is a line of low-power-consumption RISC chip designs
  45. licensed by ARM Ltd and targeted at embedded applications and
  46. handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
  47. manufactured, but legacy ARM-based PC hardware remains popular in
  48. Europe. There is an ARM Linux project with a web page at
  49. <http://www.arm.linux.org.uk/>.
  50. config ARM_HAS_SG_CHAIN
  51. bool
  52. config HAVE_PWM
  53. bool
  54. config MIGHT_HAVE_PCI
  55. bool
  56. config SYS_SUPPORTS_APM_EMULATION
  57. bool
  58. config GENERIC_GPIO
  59. bool
  60. config ARCH_USES_GETTIMEOFFSET
  61. bool
  62. default n
  63. config GENERIC_CLOCKEVENTS
  64. bool
  65. config GENERIC_CLOCKEVENTS_BROADCAST
  66. bool
  67. depends on GENERIC_CLOCKEVENTS
  68. default y if SMP
  69. config KTIME_SCALAR
  70. bool
  71. default y
  72. config HAVE_TCM
  73. bool
  74. select GENERIC_ALLOCATOR
  75. config HAVE_PROC_CPU
  76. bool
  77. config NO_IOPORT
  78. bool
  79. config EISA
  80. bool
  81. ---help---
  82. The Extended Industry Standard Architecture (EISA) bus was
  83. developed as an open alternative to the IBM MicroChannel bus.
  84. The EISA bus provided some of the features of the IBM MicroChannel
  85. bus while maintaining backward compatibility with cards made for
  86. the older ISA bus. The EISA bus saw limited use between 1988 and
  87. 1995 when it was made obsolete by the PCI bus.
  88. Say Y here if you are building a kernel for an EISA-based machine.
  89. Otherwise, say N.
  90. config SBUS
  91. bool
  92. config MCA
  93. bool
  94. help
  95. MicroChannel Architecture is found in some IBM PS/2 machines and
  96. laptops. It is a bus system similar to PCI or ISA. See
  97. <file:Documentation/mca.txt> (and especially the web page given
  98. there) before attempting to build an MCA bus kernel.
  99. config STACKTRACE_SUPPORT
  100. bool
  101. default y
  102. config HAVE_LATENCYTOP_SUPPORT
  103. bool
  104. depends on !SMP
  105. default y
  106. config LOCKDEP_SUPPORT
  107. bool
  108. default y
  109. config TRACE_IRQFLAGS_SUPPORT
  110. bool
  111. default y
  112. config GENERIC_LOCKBREAK
  113. bool
  114. default y
  115. depends on SMP && PREEMPT
  116. config RWSEM_GENERIC_SPINLOCK
  117. bool
  118. default y
  119. config RWSEM_XCHGADD_ALGORITHM
  120. bool
  121. config ARCH_HAS_ILOG2_U32
  122. bool
  123. config ARCH_HAS_ILOG2_U64
  124. bool
  125. config ARCH_HAS_CPUFREQ
  126. bool
  127. help
  128. Internal node to signify that the ARCH has CPUFREQ support
  129. and that the relevant menu configurations are displayed for
  130. it.
  131. config GENERIC_HWEIGHT
  132. bool
  133. default y
  134. config GENERIC_CALIBRATE_DELAY
  135. bool
  136. default y
  137. config ARCH_MAY_HAVE_PC_FDC
  138. bool
  139. config ZONE_DMA
  140. bool
  141. config NEED_DMA_MAP_STATE
  142. def_bool y
  143. config ARCH_HAS_DMA_SET_COHERENT_MASK
  144. bool
  145. config GENERIC_ISA_DMA
  146. bool
  147. config FIQ
  148. bool
  149. config NEED_RET_TO_USER
  150. bool
  151. config ARCH_MTD_XIP
  152. bool
  153. config VECTORS_BASE
  154. hex
  155. default 0xffff0000 if MMU || CPU_HIGH_VECTOR
  156. default DRAM_BASE if REMAP_VECTORS_TO_RAM
  157. default 0x00000000
  158. help
  159. The base address of exception vectors.
  160. config ARM_PATCH_PHYS_VIRT
  161. bool "Patch physical to virtual translations at runtime" if EMBEDDED
  162. default y
  163. depends on !XIP_KERNEL && MMU
  164. depends on !ARCH_REALVIEW || !SPARSEMEM
  165. help
  166. Patch phys-to-virt and virt-to-phys translation functions at
  167. boot and module load time according to the position of the
  168. kernel in system memory.
  169. This can only be used with non-XIP MMU kernels where the base
  170. of physical memory is at a 16MB boundary.
  171. Only disable this option if you know that you do not require
  172. this feature (eg, building a kernel for a single machine) and
  173. you need to shrink the kernel to the minimal size.
  174. config NEED_MACH_IO_H
  175. bool
  176. help
  177. Select this when mach/io.h is required to provide special
  178. definitions for this platform. The need for mach/io.h should
  179. be avoided when possible.
  180. config NEED_MACH_MEMORY_H
  181. bool
  182. help
  183. Select this when mach/memory.h is required to provide special
  184. definitions for this platform. The need for mach/memory.h should
  185. be avoided when possible.
  186. config PHYS_OFFSET
  187. hex "Physical address of main memory" if MMU
  188. depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
  189. default DRAM_BASE if !MMU
  190. help
  191. Please provide the physical address corresponding to the
  192. location of main memory in your system.
  193. config GENERIC_BUG
  194. def_bool y
  195. depends on BUG
  196. source "init/Kconfig"
  197. source "kernel/Kconfig.freezer"
  198. menu "System Type"
  199. config MMU
  200. bool "MMU-based Paged Memory Management Support"
  201. default y
  202. help
  203. Select if you want MMU-based virtualised addressing space
  204. support by paged memory management. If unsure, say 'Y'.
  205. #
  206. # The "ARM system type" choice list is ordered alphabetically by option
  207. # text. Please add new entries in the option alphabetic order.
  208. #
  209. choice
  210. prompt "ARM system type"
  211. default ARCH_VERSATILE
  212. config ARCH_INTEGRATOR
  213. bool "ARM Ltd. Integrator family"
  214. select ARM_AMBA
  215. select ARCH_HAS_CPUFREQ
  216. select CLKDEV_LOOKUP
  217. select HAVE_MACH_CLKDEV
  218. select HAVE_TCM
  219. select ICST
  220. select GENERIC_CLOCKEVENTS
  221. select PLAT_VERSATILE
  222. select PLAT_VERSATILE_FPGA_IRQ
  223. select NEED_MACH_IO_H
  224. select NEED_MACH_MEMORY_H
  225. select SPARSE_IRQ
  226. select MULTI_IRQ_HANDLER
  227. help
  228. Support for ARM's Integrator platform.
  229. config ARCH_REALVIEW
  230. bool "ARM Ltd. RealView family"
  231. select ARM_AMBA
  232. select CLKDEV_LOOKUP
  233. select HAVE_MACH_CLKDEV
  234. select ICST
  235. select GENERIC_CLOCKEVENTS
  236. select ARCH_WANT_OPTIONAL_GPIOLIB
  237. select PLAT_VERSATILE
  238. select PLAT_VERSATILE_CLCD
  239. select ARM_TIMER_SP804
  240. select GPIO_PL061 if GPIOLIB
  241. select NEED_MACH_MEMORY_H
  242. help
  243. This enables support for ARM Ltd RealView boards.
  244. config ARCH_VERSATILE
  245. bool "ARM Ltd. Versatile family"
  246. select ARM_AMBA
  247. select ARM_VIC
  248. select CLKDEV_LOOKUP
  249. select HAVE_MACH_CLKDEV
  250. select ICST
  251. select GENERIC_CLOCKEVENTS
  252. select ARCH_WANT_OPTIONAL_GPIOLIB
  253. select PLAT_VERSATILE
  254. select PLAT_VERSATILE_CLCD
  255. select PLAT_VERSATILE_FPGA_IRQ
  256. select ARM_TIMER_SP804
  257. help
  258. This enables support for ARM Ltd Versatile board.
  259. config ARCH_VEXPRESS
  260. bool "ARM Ltd. Versatile Express family"
  261. select ARCH_WANT_OPTIONAL_GPIOLIB
  262. select ARM_AMBA
  263. select ARM_TIMER_SP804
  264. select CLKDEV_LOOKUP
  265. select HAVE_MACH_CLKDEV
  266. select GENERIC_CLOCKEVENTS
  267. select HAVE_CLK
  268. select HAVE_PATA_PLATFORM
  269. select ICST
  270. select NO_IOPORT
  271. select PLAT_VERSATILE
  272. select PLAT_VERSATILE_CLCD
  273. help
  274. This enables support for the ARM Ltd Versatile Express boards.
  275. config ARCH_AT91
  276. bool "Atmel AT91"
  277. select ARCH_REQUIRE_GPIOLIB
  278. select HAVE_CLK
  279. select CLKDEV_LOOKUP
  280. select IRQ_DOMAIN
  281. select NEED_MACH_IO_H if PCCARD
  282. help
  283. This enables support for systems based on Atmel
  284. AT91RM9200 and AT91SAM9* processors.
  285. config ARCH_BCMRING
  286. bool "Broadcom BCMRING"
  287. depends on MMU
  288. select CPU_V6
  289. select ARM_AMBA
  290. select ARM_TIMER_SP804
  291. select CLKDEV_LOOKUP
  292. select GENERIC_CLOCKEVENTS
  293. select ARCH_WANT_OPTIONAL_GPIOLIB
  294. help
  295. Support for Broadcom's BCMRing platform.
  296. config ARCH_HIGHBANK
  297. bool "Calxeda Highbank-based"
  298. select ARCH_WANT_OPTIONAL_GPIOLIB
  299. select ARM_AMBA
  300. select ARM_GIC
  301. select ARM_TIMER_SP804
  302. select CACHE_L2X0
  303. select CLKDEV_LOOKUP
  304. select CPU_V7
  305. select GENERIC_CLOCKEVENTS
  306. select HAVE_ARM_SCU
  307. select HAVE_SMP
  308. select SPARSE_IRQ
  309. select USE_OF
  310. help
  311. Support for the Calxeda Highbank SoC based boards.
  312. config ARCH_CLPS711X
  313. bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
  314. select CPU_ARM720T
  315. select ARCH_USES_GETTIMEOFFSET
  316. select NEED_MACH_MEMORY_H
  317. help
  318. Support for Cirrus Logic 711x/721x/731x based boards.
  319. config ARCH_CNS3XXX
  320. bool "Cavium Networks CNS3XXX family"
  321. select CPU_V6K
  322. select GENERIC_CLOCKEVENTS
  323. select ARM_GIC
  324. select MIGHT_HAVE_CACHE_L2X0
  325. select MIGHT_HAVE_PCI
  326. select PCI_DOMAINS if PCI
  327. help
  328. Support for Cavium Networks CNS3XXX platform.
  329. config ARCH_GEMINI
  330. bool "Cortina Systems Gemini"
  331. select CPU_FA526
  332. select ARCH_REQUIRE_GPIOLIB
  333. select ARCH_USES_GETTIMEOFFSET
  334. help
  335. Support for the Cortina Systems Gemini family SoCs
  336. config ARCH_PRIMA2
  337. bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
  338. select CPU_V7
  339. select NO_IOPORT
  340. select GENERIC_CLOCKEVENTS
  341. select CLKDEV_LOOKUP
  342. select GENERIC_IRQ_CHIP
  343. select MIGHT_HAVE_CACHE_L2X0
  344. select PINCTRL
  345. select PINCTRL_SIRF
  346. select USE_OF
  347. select ZONE_DMA
  348. help
  349. Support for CSR SiRFSoC ARM Cortex A9 Platform
  350. config ARCH_EBSA110
  351. bool "EBSA-110"
  352. select CPU_SA110
  353. select ISA
  354. select NO_IOPORT
  355. select ARCH_USES_GETTIMEOFFSET
  356. select NEED_MACH_IO_H
  357. select NEED_MACH_MEMORY_H
  358. help
  359. This is an evaluation board for the StrongARM processor available
  360. from Digital. It has limited hardware on-board, including an
  361. Ethernet interface, two PCMCIA sockets, two serial ports and a
  362. parallel port.
  363. config ARCH_EP93XX
  364. bool "EP93xx-based"
  365. select CPU_ARM920T
  366. select ARM_AMBA
  367. select ARM_VIC
  368. select CLKDEV_LOOKUP
  369. select ARCH_REQUIRE_GPIOLIB
  370. select ARCH_HAS_HOLES_MEMORYMODEL
  371. select ARCH_USES_GETTIMEOFFSET
  372. select NEED_MACH_MEMORY_H
  373. help
  374. This enables support for the Cirrus EP93xx series of CPUs.
  375. config ARCH_FOOTBRIDGE
  376. bool "FootBridge"
  377. select CPU_SA110
  378. select FOOTBRIDGE
  379. select GENERIC_CLOCKEVENTS
  380. select HAVE_IDE
  381. select NEED_MACH_IO_H
  382. select NEED_MACH_MEMORY_H
  383. help
  384. Support for systems based on the DC21285 companion chip
  385. ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
  386. config ARCH_MXC
  387. bool "Freescale MXC/iMX-based"
  388. select GENERIC_CLOCKEVENTS
  389. select ARCH_REQUIRE_GPIOLIB
  390. select CLKDEV_LOOKUP
  391. select CLKSRC_MMIO
  392. select GENERIC_IRQ_CHIP
  393. select MULTI_IRQ_HANDLER
  394. help
  395. Support for Freescale MXC/iMX-based family of processors
  396. config ARCH_MXS
  397. bool "Freescale MXS-based"
  398. select GENERIC_CLOCKEVENTS
  399. select ARCH_REQUIRE_GPIOLIB
  400. select CLKDEV_LOOKUP
  401. select CLKSRC_MMIO
  402. select HAVE_CLK_PREPARE
  403. select PINCTRL
  404. help
  405. Support for Freescale MXS-based family of processors
  406. config ARCH_NETX
  407. bool "Hilscher NetX based"
  408. select CLKSRC_MMIO
  409. select CPU_ARM926T
  410. select ARM_VIC
  411. select GENERIC_CLOCKEVENTS
  412. help
  413. This enables support for systems based on the Hilscher NetX Soc
  414. config ARCH_H720X
  415. bool "Hynix HMS720x-based"
  416. select CPU_ARM720T
  417. select ISA_DMA_API
  418. select ARCH_USES_GETTIMEOFFSET
  419. help
  420. This enables support for systems based on the Hynix HMS720x
  421. config ARCH_IOP13XX
  422. bool "IOP13xx-based"
  423. depends on MMU
  424. select CPU_XSC3
  425. select PLAT_IOP
  426. select PCI
  427. select ARCH_SUPPORTS_MSI
  428. select VMSPLIT_1G
  429. select NEED_MACH_IO_H
  430. select NEED_MACH_MEMORY_H
  431. select NEED_RET_TO_USER
  432. help
  433. Support for Intel's IOP13XX (XScale) family of processors.
  434. config ARCH_IOP32X
  435. bool "IOP32x-based"
  436. depends on MMU
  437. select CPU_XSCALE
  438. select NEED_MACH_IO_H
  439. select NEED_RET_TO_USER
  440. select PLAT_IOP
  441. select PCI
  442. select ARCH_REQUIRE_GPIOLIB
  443. help
  444. Support for Intel's 80219 and IOP32X (XScale) family of
  445. processors.
  446. config ARCH_IOP33X
  447. bool "IOP33x-based"
  448. depends on MMU
  449. select CPU_XSCALE
  450. select NEED_MACH_IO_H
  451. select NEED_RET_TO_USER
  452. select PLAT_IOP
  453. select PCI
  454. select ARCH_REQUIRE_GPIOLIB
  455. help
  456. Support for Intel's IOP33X (XScale) family of processors.
  457. config ARCH_IXP4XX
  458. bool "IXP4xx-based"
  459. depends on MMU
  460. select ARCH_HAS_DMA_SET_COHERENT_MASK
  461. select CLKSRC_MMIO
  462. select CPU_XSCALE
  463. select GENERIC_GPIO
  464. select GENERIC_CLOCKEVENTS
  465. select MIGHT_HAVE_PCI
  466. select NEED_MACH_IO_H
  467. select DMABOUNCE if PCI
  468. help
  469. Support for Intel's IXP4XX (XScale) family of processors.
  470. config ARCH_DOVE
  471. bool "Marvell Dove"
  472. select CPU_V7
  473. select PCI
  474. select ARCH_REQUIRE_GPIOLIB
  475. select GENERIC_CLOCKEVENTS
  476. select NEED_MACH_IO_H
  477. select PLAT_ORION
  478. help
  479. Support for the Marvell Dove SoC 88AP510
  480. config ARCH_KIRKWOOD
  481. bool "Marvell Kirkwood"
  482. select CPU_FEROCEON
  483. select PCI
  484. select ARCH_REQUIRE_GPIOLIB
  485. select GENERIC_CLOCKEVENTS
  486. select NEED_MACH_IO_H
  487. select PLAT_ORION
  488. help
  489. Support for the following Marvell Kirkwood series SoCs:
  490. 88F6180, 88F6192 and 88F6281.
  491. config ARCH_LPC32XX
  492. bool "NXP LPC32XX"
  493. select CLKSRC_MMIO
  494. select CPU_ARM926T
  495. select ARCH_REQUIRE_GPIOLIB
  496. select HAVE_IDE
  497. select ARM_AMBA
  498. select USB_ARCH_HAS_OHCI
  499. select CLKDEV_LOOKUP
  500. select GENERIC_CLOCKEVENTS
  501. select USE_OF
  502. help
  503. Support for the NXP LPC32XX family of processors
  504. config ARCH_MV78XX0
  505. bool "Marvell MV78xx0"
  506. select CPU_FEROCEON
  507. select PCI
  508. select ARCH_REQUIRE_GPIOLIB
  509. select GENERIC_CLOCKEVENTS
  510. select NEED_MACH_IO_H
  511. select PLAT_ORION
  512. help
  513. Support for the following Marvell MV78xx0 series SoCs:
  514. MV781x0, MV782x0.
  515. config ARCH_ORION5X
  516. bool "Marvell Orion"
  517. depends on MMU
  518. select CPU_FEROCEON
  519. select PCI
  520. select ARCH_REQUIRE_GPIOLIB
  521. select GENERIC_CLOCKEVENTS
  522. select PLAT_ORION
  523. help
  524. Support for the following Marvell Orion 5x series SoCs:
  525. Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
  526. Orion-2 (5281), Orion-1-90 (6183).
  527. config ARCH_MMP
  528. bool "Marvell PXA168/910/MMP2"
  529. depends on MMU
  530. select ARCH_REQUIRE_GPIOLIB
  531. select CLKDEV_LOOKUP
  532. select GENERIC_CLOCKEVENTS
  533. select GPIO_PXA
  534. select IRQ_DOMAIN
  535. select PLAT_PXA
  536. select SPARSE_IRQ
  537. select GENERIC_ALLOCATOR
  538. help
  539. Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
  540. config ARCH_KS8695
  541. bool "Micrel/Kendin KS8695"
  542. select CPU_ARM922T
  543. select ARCH_REQUIRE_GPIOLIB
  544. select ARCH_USES_GETTIMEOFFSET
  545. select NEED_MACH_MEMORY_H
  546. help
  547. Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
  548. System-on-Chip devices.
  549. config ARCH_W90X900
  550. bool "Nuvoton W90X900 CPU"
  551. select CPU_ARM926T
  552. select ARCH_REQUIRE_GPIOLIB
  553. select CLKDEV_LOOKUP
  554. select CLKSRC_MMIO
  555. select GENERIC_CLOCKEVENTS
  556. help
  557. Support for Nuvoton (Winbond logic dept.) ARM9 processor,
  558. At present, the w90x900 has been renamed nuc900, regarding
  559. the ARM series product line, you can login the following
  560. link address to know more.
  561. <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
  562. ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
  563. config ARCH_TEGRA
  564. bool "NVIDIA Tegra"
  565. select CLKDEV_LOOKUP
  566. select CLKSRC_MMIO
  567. select GENERIC_CLOCKEVENTS
  568. select GENERIC_GPIO
  569. select HAVE_CLK
  570. select HAVE_SMP
  571. select MIGHT_HAVE_CACHE_L2X0
  572. select NEED_MACH_IO_H if PCI
  573. select ARCH_HAS_CPUFREQ
  574. help
  575. This enables support for NVIDIA Tegra based systems (Tegra APX,
  576. Tegra 6xx and Tegra 2 series).
  577. config ARCH_PICOXCELL
  578. bool "Picochip picoXcell"
  579. select ARCH_REQUIRE_GPIOLIB
  580. select ARM_PATCH_PHYS_VIRT
  581. select ARM_VIC
  582. select CPU_V6K
  583. select DW_APB_TIMER
  584. select GENERIC_CLOCKEVENTS
  585. select GENERIC_GPIO
  586. select HAVE_TCM
  587. select NO_IOPORT
  588. select SPARSE_IRQ
  589. select USE_OF
  590. help
  591. This enables support for systems based on the Picochip picoXcell
  592. family of Femtocell devices. The picoxcell support requires device tree
  593. for all boards.
  594. config ARCH_PNX4008
  595. bool "Philips Nexperia PNX4008 Mobile"
  596. select CPU_ARM926T
  597. select CLKDEV_LOOKUP
  598. select ARCH_USES_GETTIMEOFFSET
  599. help
  600. This enables support for Philips PNX4008 mobile platform.
  601. config ARCH_PXA
  602. bool "PXA2xx/PXA3xx-based"
  603. depends on MMU
  604. select ARCH_MTD_XIP
  605. select ARCH_HAS_CPUFREQ
  606. select CLKDEV_LOOKUP
  607. select CLKSRC_MMIO
  608. select ARCH_REQUIRE_GPIOLIB
  609. select GENERIC_CLOCKEVENTS
  610. select GPIO_PXA
  611. select PLAT_PXA
  612. select SPARSE_IRQ
  613. select AUTO_ZRELADDR
  614. select MULTI_IRQ_HANDLER
  615. select ARM_CPU_SUSPEND if PM
  616. select HAVE_IDE
  617. help
  618. Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
  619. config ARCH_MSM
  620. bool "Qualcomm MSM"
  621. select HAVE_CLK
  622. select GENERIC_CLOCKEVENTS
  623. select ARCH_REQUIRE_GPIOLIB
  624. select CLKDEV_LOOKUP
  625. help
  626. Support for Qualcomm MSM/QSD based systems. This runs on the
  627. apps processor of the MSM/QSD and depends on a shared memory
  628. interface to the modem processor which runs the baseband
  629. stack and controls some vital subsystems
  630. (clock and power control, etc).
  631. config ARCH_SHMOBILE
  632. bool "Renesas SH-Mobile / R-Mobile"
  633. select HAVE_CLK
  634. select CLKDEV_LOOKUP
  635. select HAVE_MACH_CLKDEV
  636. select HAVE_SMP
  637. select GENERIC_CLOCKEVENTS
  638. select MIGHT_HAVE_CACHE_L2X0
  639. select NO_IOPORT
  640. select SPARSE_IRQ
  641. select MULTI_IRQ_HANDLER
  642. select PM_GENERIC_DOMAINS if PM
  643. select NEED_MACH_MEMORY_H
  644. help
  645. Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
  646. config ARCH_RPC
  647. bool "RiscPC"
  648. select ARCH_ACORN
  649. select FIQ
  650. select ARCH_MAY_HAVE_PC_FDC
  651. select HAVE_PATA_PLATFORM
  652. select ISA_DMA_API
  653. select NO_IOPORT
  654. select ARCH_SPARSEMEM_ENABLE
  655. select ARCH_USES_GETTIMEOFFSET
  656. select HAVE_IDE
  657. select NEED_MACH_IO_H
  658. select NEED_MACH_MEMORY_H
  659. help
  660. On the Acorn Risc-PC, Linux can support the internal IDE disk and
  661. CD-ROM interface, serial and parallel port, and the floppy drive.
  662. config ARCH_SA1100
  663. bool "SA1100-based"
  664. select CLKSRC_MMIO
  665. select CPU_SA1100
  666. select ISA
  667. select ARCH_SPARSEMEM_ENABLE
  668. select ARCH_MTD_XIP
  669. select ARCH_HAS_CPUFREQ
  670. select CPU_FREQ
  671. select GENERIC_CLOCKEVENTS
  672. select CLKDEV_LOOKUP
  673. select ARCH_REQUIRE_GPIOLIB
  674. select HAVE_IDE
  675. select NEED_MACH_MEMORY_H
  676. select SPARSE_IRQ
  677. help
  678. Support for StrongARM 11x0 based boards.
  679. config ARCH_S3C24XX
  680. bool "Samsung S3C24XX SoCs"
  681. select GENERIC_GPIO
  682. select ARCH_HAS_CPUFREQ
  683. select HAVE_CLK
  684. select CLKDEV_LOOKUP
  685. select ARCH_USES_GETTIMEOFFSET
  686. select HAVE_S3C2410_I2C if I2C
  687. select HAVE_S3C_RTC if RTC_CLASS
  688. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  689. select NEED_MACH_IO_H
  690. help
  691. Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
  692. and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
  693. (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
  694. Samsung SMDK2410 development board (and derivatives).
  695. config ARCH_S3C64XX
  696. bool "Samsung S3C64XX"
  697. select PLAT_SAMSUNG
  698. select CPU_V6
  699. select ARM_VIC
  700. select HAVE_CLK
  701. select HAVE_TCM
  702. select CLKDEV_LOOKUP
  703. select NO_IOPORT
  704. select ARCH_USES_GETTIMEOFFSET
  705. select ARCH_HAS_CPUFREQ
  706. select ARCH_REQUIRE_GPIOLIB
  707. select SAMSUNG_CLKSRC
  708. select SAMSUNG_IRQ_VIC_TIMER
  709. select S3C_GPIO_TRACK
  710. select S3C_DEV_NAND
  711. select USB_ARCH_HAS_OHCI
  712. select SAMSUNG_GPIOLIB_4BIT
  713. select HAVE_S3C2410_I2C if I2C
  714. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  715. help
  716. Samsung S3C64XX series based systems
  717. config ARCH_S5P64X0
  718. bool "Samsung S5P6440 S5P6450"
  719. select CPU_V6
  720. select GENERIC_GPIO
  721. select HAVE_CLK
  722. select CLKDEV_LOOKUP
  723. select CLKSRC_MMIO
  724. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  725. select GENERIC_CLOCKEVENTS
  726. select HAVE_S3C2410_I2C if I2C
  727. select HAVE_S3C_RTC if RTC_CLASS
  728. help
  729. Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
  730. SMDK6450.
  731. config ARCH_S5PC100
  732. bool "Samsung S5PC100"
  733. select GENERIC_GPIO
  734. select HAVE_CLK
  735. select CLKDEV_LOOKUP
  736. select CPU_V7
  737. select ARCH_USES_GETTIMEOFFSET
  738. select HAVE_S3C2410_I2C if I2C
  739. select HAVE_S3C_RTC if RTC_CLASS
  740. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  741. help
  742. Samsung S5PC100 series based systems
  743. config ARCH_S5PV210
  744. bool "Samsung S5PV210/S5PC110"
  745. select CPU_V7
  746. select ARCH_SPARSEMEM_ENABLE
  747. select ARCH_HAS_HOLES_MEMORYMODEL
  748. select GENERIC_GPIO
  749. select HAVE_CLK
  750. select CLKDEV_LOOKUP
  751. select CLKSRC_MMIO
  752. select ARCH_HAS_CPUFREQ
  753. select GENERIC_CLOCKEVENTS
  754. select HAVE_S3C2410_I2C if I2C
  755. select HAVE_S3C_RTC if RTC_CLASS
  756. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  757. select NEED_MACH_MEMORY_H
  758. help
  759. Samsung S5PV210/S5PC110 series based systems
  760. config ARCH_EXYNOS
  761. bool "SAMSUNG EXYNOS"
  762. select CPU_V7
  763. select ARCH_SPARSEMEM_ENABLE
  764. select ARCH_HAS_HOLES_MEMORYMODEL
  765. select GENERIC_GPIO
  766. select HAVE_CLK
  767. select CLKDEV_LOOKUP
  768. select ARCH_HAS_CPUFREQ
  769. select GENERIC_CLOCKEVENTS
  770. select HAVE_S3C_RTC if RTC_CLASS
  771. select HAVE_S3C2410_I2C if I2C
  772. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  773. select NEED_MACH_MEMORY_H
  774. help
  775. Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
  776. config ARCH_SHARK
  777. bool "Shark"
  778. select CPU_SA110
  779. select ISA
  780. select ISA_DMA
  781. select ZONE_DMA
  782. select PCI
  783. select ARCH_USES_GETTIMEOFFSET
  784. select NEED_MACH_MEMORY_H
  785. select NEED_MACH_IO_H
  786. help
  787. Support for the StrongARM based Digital DNARD machine, also known
  788. as "Shark" (<http://www.shark-linux.de/shark.html>).
  789. config ARCH_U300
  790. bool "ST-Ericsson U300 Series"
  791. depends on MMU
  792. select CLKSRC_MMIO
  793. select CPU_ARM926T
  794. select HAVE_TCM
  795. select ARM_AMBA
  796. select ARM_PATCH_PHYS_VIRT
  797. select ARM_VIC
  798. select GENERIC_CLOCKEVENTS
  799. select CLKDEV_LOOKUP
  800. select HAVE_MACH_CLKDEV
  801. select GENERIC_GPIO
  802. select ARCH_REQUIRE_GPIOLIB
  803. help
  804. Support for ST-Ericsson U300 series mobile platforms.
  805. config ARCH_U8500
  806. bool "ST-Ericsson U8500 Series"
  807. depends on MMU
  808. select CPU_V7
  809. select ARM_AMBA
  810. select GENERIC_CLOCKEVENTS
  811. select CLKDEV_LOOKUP
  812. select ARCH_REQUIRE_GPIOLIB
  813. select ARCH_HAS_CPUFREQ
  814. select HAVE_SMP
  815. select MIGHT_HAVE_CACHE_L2X0
  816. help
  817. Support for ST-Ericsson's Ux500 architecture
  818. config ARCH_NOMADIK
  819. bool "STMicroelectronics Nomadik"
  820. select ARM_AMBA
  821. select ARM_VIC
  822. select CPU_ARM926T
  823. select CLKDEV_LOOKUP
  824. select GENERIC_CLOCKEVENTS
  825. select PINCTRL
  826. select MIGHT_HAVE_CACHE_L2X0
  827. select ARCH_REQUIRE_GPIOLIB
  828. help
  829. Support for the Nomadik platform by ST-Ericsson
  830. config ARCH_DAVINCI
  831. bool "TI DaVinci"
  832. select GENERIC_CLOCKEVENTS
  833. select ARCH_REQUIRE_GPIOLIB
  834. select ZONE_DMA
  835. select HAVE_IDE
  836. select CLKDEV_LOOKUP
  837. select GENERIC_ALLOCATOR
  838. select GENERIC_IRQ_CHIP
  839. select ARCH_HAS_HOLES_MEMORYMODEL
  840. help
  841. Support for TI's DaVinci platform.
  842. config ARCH_OMAP
  843. bool "TI OMAP"
  844. select HAVE_CLK
  845. select ARCH_REQUIRE_GPIOLIB
  846. select ARCH_HAS_CPUFREQ
  847. select CLKSRC_MMIO
  848. select GENERIC_CLOCKEVENTS
  849. select ARCH_HAS_HOLES_MEMORYMODEL
  850. help
  851. Support for TI's OMAP platform (OMAP1/2/3/4).
  852. config PLAT_SPEAR
  853. bool "ST SPEAr"
  854. select ARM_AMBA
  855. select ARCH_REQUIRE_GPIOLIB
  856. select CLKDEV_LOOKUP
  857. select CLKSRC_MMIO
  858. select GENERIC_CLOCKEVENTS
  859. select HAVE_CLK
  860. help
  861. Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
  862. config ARCH_VT8500
  863. bool "VIA/WonderMedia 85xx"
  864. select CPU_ARM926T
  865. select GENERIC_GPIO
  866. select ARCH_HAS_CPUFREQ
  867. select GENERIC_CLOCKEVENTS
  868. select ARCH_REQUIRE_GPIOLIB
  869. select HAVE_PWM
  870. help
  871. Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
  872. config ARCH_ZYNQ
  873. bool "Xilinx Zynq ARM Cortex A9 Platform"
  874. select CPU_V7
  875. select GENERIC_CLOCKEVENTS
  876. select CLKDEV_LOOKUP
  877. select ARM_GIC
  878. select ARM_AMBA
  879. select ICST
  880. select MIGHT_HAVE_CACHE_L2X0
  881. select USE_OF
  882. help
  883. Support for Xilinx Zynq ARM Cortex A9 Platform
  884. endchoice
  885. #
  886. # This is sorted alphabetically by mach-* pathname. However, plat-*
  887. # Kconfigs may be included either alphabetically (according to the
  888. # plat- suffix) or along side the corresponding mach-* source.
  889. #
  890. source "arch/arm/mach-at91/Kconfig"
  891. source "arch/arm/mach-bcmring/Kconfig"
  892. source "arch/arm/mach-clps711x/Kconfig"
  893. source "arch/arm/mach-cns3xxx/Kconfig"
  894. source "arch/arm/mach-davinci/Kconfig"
  895. source "arch/arm/mach-dove/Kconfig"
  896. source "arch/arm/mach-ep93xx/Kconfig"
  897. source "arch/arm/mach-footbridge/Kconfig"
  898. source "arch/arm/mach-gemini/Kconfig"
  899. source "arch/arm/mach-h720x/Kconfig"
  900. source "arch/arm/mach-integrator/Kconfig"
  901. source "arch/arm/mach-iop32x/Kconfig"
  902. source "arch/arm/mach-iop33x/Kconfig"
  903. source "arch/arm/mach-iop13xx/Kconfig"
  904. source "arch/arm/mach-ixp4xx/Kconfig"
  905. source "arch/arm/mach-kirkwood/Kconfig"
  906. source "arch/arm/mach-ks8695/Kconfig"
  907. source "arch/arm/mach-lpc32xx/Kconfig"
  908. source "arch/arm/mach-msm/Kconfig"
  909. source "arch/arm/mach-mv78xx0/Kconfig"
  910. source "arch/arm/plat-mxc/Kconfig"
  911. source "arch/arm/mach-mxs/Kconfig"
  912. source "arch/arm/mach-netx/Kconfig"
  913. source "arch/arm/mach-nomadik/Kconfig"
  914. source "arch/arm/plat-nomadik/Kconfig"
  915. source "arch/arm/plat-omap/Kconfig"
  916. source "arch/arm/mach-omap1/Kconfig"
  917. source "arch/arm/mach-omap2/Kconfig"
  918. source "arch/arm/mach-orion5x/Kconfig"
  919. source "arch/arm/mach-pxa/Kconfig"
  920. source "arch/arm/plat-pxa/Kconfig"
  921. source "arch/arm/mach-mmp/Kconfig"
  922. source "arch/arm/mach-realview/Kconfig"
  923. source "arch/arm/mach-sa1100/Kconfig"
  924. source "arch/arm/plat-samsung/Kconfig"
  925. source "arch/arm/plat-s3c24xx/Kconfig"
  926. source "arch/arm/plat-s5p/Kconfig"
  927. source "arch/arm/plat-spear/Kconfig"
  928. source "arch/arm/mach-s3c24xx/Kconfig"
  929. if ARCH_S3C24XX
  930. source "arch/arm/mach-s3c2412/Kconfig"
  931. source "arch/arm/mach-s3c2440/Kconfig"
  932. endif
  933. if ARCH_S3C64XX
  934. source "arch/arm/mach-s3c64xx/Kconfig"
  935. endif
  936. source "arch/arm/mach-s5p64x0/Kconfig"
  937. source "arch/arm/mach-s5pc100/Kconfig"
  938. source "arch/arm/mach-s5pv210/Kconfig"
  939. source "arch/arm/mach-exynos/Kconfig"
  940. source "arch/arm/mach-shmobile/Kconfig"
  941. source "arch/arm/mach-tegra/Kconfig"
  942. source "arch/arm/mach-u300/Kconfig"
  943. source "arch/arm/mach-ux500/Kconfig"
  944. source "arch/arm/mach-versatile/Kconfig"
  945. source "arch/arm/mach-vexpress/Kconfig"
  946. source "arch/arm/plat-versatile/Kconfig"
  947. source "arch/arm/mach-vt8500/Kconfig"
  948. source "arch/arm/mach-w90x900/Kconfig"
  949. # Definitions to make life easier
  950. config ARCH_ACORN
  951. bool
  952. config PLAT_IOP
  953. bool
  954. select GENERIC_CLOCKEVENTS
  955. config PLAT_ORION
  956. bool
  957. select CLKSRC_MMIO
  958. select GENERIC_IRQ_CHIP
  959. config PLAT_PXA
  960. bool
  961. config PLAT_VERSATILE
  962. bool
  963. config ARM_TIMER_SP804
  964. bool
  965. select CLKSRC_MMIO
  966. select HAVE_SCHED_CLOCK
  967. source arch/arm/mm/Kconfig
  968. config ARM_NR_BANKS
  969. int
  970. default 16 if ARCH_EP93XX
  971. default 8
  972. config IWMMXT
  973. bool "Enable iWMMXt support"
  974. depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
  975. default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
  976. help
  977. Enable support for iWMMXt context switching at run time if
  978. running on a CPU that supports it.
  979. config XSCALE_PMU
  980. bool
  981. depends on CPU_XSCALE
  982. default y
  983. config CPU_HAS_PMU
  984. depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
  985. (!ARCH_OMAP3 || OMAP3_EMU)
  986. default y
  987. bool
  988. config MULTI_IRQ_HANDLER
  989. bool
  990. help
  991. Allow each machine to specify it's own IRQ handler at run time.
  992. if !MMU
  993. source "arch/arm/Kconfig-nommu"
  994. endif
  995. config ARM_ERRATA_326103
  996. bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
  997. depends on CPU_V6
  998. help
  999. Executing a SWP instruction to read-only memory does not set bit 11
  1000. of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
  1001. treat the access as a read, preventing a COW from occurring and
  1002. causing the faulting task to livelock.
  1003. config ARM_ERRATA_411920
  1004. bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
  1005. depends on CPU_V6 || CPU_V6K
  1006. help
  1007. Invalidation of the Instruction Cache operation can
  1008. fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
  1009. It does not affect the MPCore. This option enables the ARM Ltd.
  1010. recommended workaround.
  1011. config ARM_ERRATA_430973
  1012. bool "ARM errata: Stale prediction on replaced interworking branch"
  1013. depends on CPU_V7
  1014. help
  1015. This option enables the workaround for the 430973 Cortex-A8
  1016. (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
  1017. interworking branch is replaced with another code sequence at the
  1018. same virtual address, whether due to self-modifying code or virtual
  1019. to physical address re-mapping, Cortex-A8 does not recover from the
  1020. stale interworking branch prediction. This results in Cortex-A8
  1021. executing the new code sequence in the incorrect ARM or Thumb state.
  1022. The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
  1023. and also flushes the branch target cache at every context switch.
  1024. Note that setting specific bits in the ACTLR register may not be
  1025. available in non-secure mode.
  1026. config ARM_ERRATA_458693
  1027. bool "ARM errata: Processor deadlock when a false hazard is created"
  1028. depends on CPU_V7
  1029. help
  1030. This option enables the workaround for the 458693 Cortex-A8 (r2p0)
  1031. erratum. For very specific sequences of memory operations, it is
  1032. possible for a hazard condition intended for a cache line to instead
  1033. be incorrectly associated with a different cache line. This false
  1034. hazard might then cause a processor deadlock. The workaround enables
  1035. the L1 caching of the NEON accesses and disables the PLD instruction
  1036. in the ACTLR register. Note that setting specific bits in the ACTLR
  1037. register may not be available in non-secure mode.
  1038. config ARM_ERRATA_460075
  1039. bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
  1040. depends on CPU_V7
  1041. help
  1042. This option enables the workaround for the 460075 Cortex-A8 (r2p0)
  1043. erratum. Any asynchronous access to the L2 cache may encounter a
  1044. situation in which recent store transactions to the L2 cache are lost
  1045. and overwritten with stale memory contents from external memory. The
  1046. workaround disables the write-allocate mode for the L2 cache via the
  1047. ACTLR register. Note that setting specific bits in the ACTLR register
  1048. may not be available in non-secure mode.
  1049. config ARM_ERRATA_742230
  1050. bool "ARM errata: DMB operation may be faulty"
  1051. depends on CPU_V7 && SMP
  1052. help
  1053. This option enables the workaround for the 742230 Cortex-A9
  1054. (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
  1055. between two write operations may not ensure the correct visibility
  1056. ordering of the two writes. This workaround sets a specific bit in
  1057. the diagnostic register of the Cortex-A9 which causes the DMB
  1058. instruction to behave as a DSB, ensuring the correct behaviour of
  1059. the two writes.
  1060. config ARM_ERRATA_742231
  1061. bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
  1062. depends on CPU_V7 && SMP
  1063. help
  1064. This option enables the workaround for the 742231 Cortex-A9
  1065. (r2p0..r2p2) erratum. Under certain conditions, specific to the
  1066. Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
  1067. accessing some data located in the same cache line, may get corrupted
  1068. data due to bad handling of the address hazard when the line gets
  1069. replaced from one of the CPUs at the same time as another CPU is
  1070. accessing it. This workaround sets specific bits in the diagnostic
  1071. register of the Cortex-A9 which reduces the linefill issuing
  1072. capabilities of the processor.
  1073. config PL310_ERRATA_588369
  1074. bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
  1075. depends on CACHE_L2X0
  1076. help
  1077. The PL310 L2 cache controller implements three types of Clean &
  1078. Invalidate maintenance operations: by Physical Address
  1079. (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
  1080. They are architecturally defined to behave as the execution of a
  1081. clean operation followed immediately by an invalidate operation,
  1082. both performing to the same memory location. This functionality
  1083. is not correctly implemented in PL310 as clean lines are not
  1084. invalidated as a result of these operations.
  1085. config ARM_ERRATA_720789
  1086. bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
  1087. depends on CPU_V7
  1088. help
  1089. This option enables the workaround for the 720789 Cortex-A9 (prior to
  1090. r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
  1091. broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
  1092. As a consequence of this erratum, some TLB entries which should be
  1093. invalidated are not, resulting in an incoherency in the system page
  1094. tables. The workaround changes the TLB flushing routines to invalidate
  1095. entries regardless of the ASID.
  1096. config PL310_ERRATA_727915
  1097. bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
  1098. depends on CACHE_L2X0
  1099. help
  1100. PL310 implements the Clean & Invalidate by Way L2 cache maintenance
  1101. operation (offset 0x7FC). This operation runs in background so that
  1102. PL310 can handle normal accesses while it is in progress. Under very
  1103. rare circumstances, due to this erratum, write data can be lost when
  1104. PL310 treats a cacheable write transaction during a Clean &
  1105. Invalidate by Way operation.
  1106. config ARM_ERRATA_743622
  1107. bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
  1108. depends on CPU_V7
  1109. help
  1110. This option enables the workaround for the 743622 Cortex-A9
  1111. (r2p*) erratum. Under very rare conditions, a faulty
  1112. optimisation in the Cortex-A9 Store Buffer may lead to data
  1113. corruption. This workaround sets a specific bit in the diagnostic
  1114. register of the Cortex-A9 which disables the Store Buffer
  1115. optimisation, preventing the defect from occurring. This has no
  1116. visible impact on the overall performance or power consumption of the
  1117. processor.
  1118. config ARM_ERRATA_751472
  1119. bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
  1120. depends on CPU_V7
  1121. help
  1122. This option enables the workaround for the 751472 Cortex-A9 (prior
  1123. to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
  1124. completion of a following broadcasted operation if the second
  1125. operation is received by a CPU before the ICIALLUIS has completed,
  1126. potentially leading to corrupted entries in the cache or TLB.
  1127. config PL310_ERRATA_753970
  1128. bool "PL310 errata: cache sync operation may be faulty"
  1129. depends on CACHE_PL310
  1130. help
  1131. This option enables the workaround for the 753970 PL310 (r3p0) erratum.
  1132. Under some condition the effect of cache sync operation on
  1133. the store buffer still remains when the operation completes.
  1134. This means that the store buffer is always asked to drain and
  1135. this prevents it from merging any further writes. The workaround
  1136. is to replace the normal offset of cache sync operation (0x730)
  1137. by another offset targeting an unmapped PL310 register 0x740.
  1138. This has the same effect as the cache sync operation: store buffer
  1139. drain and waiting for all buffers empty.
  1140. config ARM_ERRATA_754322
  1141. bool "ARM errata: possible faulty MMU translations following an ASID switch"
  1142. depends on CPU_V7
  1143. help
  1144. This option enables the workaround for the 754322 Cortex-A9 (r2p*,
  1145. r3p*) erratum. A speculative memory access may cause a page table walk
  1146. which starts prior to an ASID switch but completes afterwards. This
  1147. can populate the micro-TLB with a stale entry which may be hit with
  1148. the new ASID. This workaround places two dsb instructions in the mm
  1149. switching code so that no page table walks can cross the ASID switch.
  1150. config ARM_ERRATA_754327
  1151. bool "ARM errata: no automatic Store Buffer drain"
  1152. depends on CPU_V7 && SMP
  1153. help
  1154. This option enables the workaround for the 754327 Cortex-A9 (prior to
  1155. r2p0) erratum. The Store Buffer does not have any automatic draining
  1156. mechanism and therefore a livelock may occur if an external agent
  1157. continuously polls a memory location waiting to observe an update.
  1158. This workaround defines cpu_relax() as smp_mb(), preventing correctly
  1159. written polling loops from denying visibility of updates to memory.
  1160. config ARM_ERRATA_364296
  1161. bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
  1162. depends on CPU_V6 && !SMP
  1163. help
  1164. This options enables the workaround for the 364296 ARM1136
  1165. r0p2 erratum (possible cache data corruption with
  1166. hit-under-miss enabled). It sets the undocumented bit 31 in
  1167. the auxiliary control register and the FI bit in the control
  1168. register, thus disabling hit-under-miss without putting the
  1169. processor into full low interrupt latency mode. ARM11MPCore
  1170. is not affected.
  1171. config ARM_ERRATA_764369
  1172. bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
  1173. depends on CPU_V7 && SMP
  1174. help
  1175. This option enables the workaround for erratum 764369
  1176. affecting Cortex-A9 MPCore with two or more processors (all
  1177. current revisions). Under certain timing circumstances, a data
  1178. cache line maintenance operation by MVA targeting an Inner
  1179. Shareable memory region may fail to proceed up to either the
  1180. Point of Coherency or to the Point of Unification of the
  1181. system. This workaround adds a DSB instruction before the
  1182. relevant cache maintenance functions and sets a specific bit
  1183. in the diagnostic control register of the SCU.
  1184. config PL310_ERRATA_769419
  1185. bool "PL310 errata: no automatic Store Buffer drain"
  1186. depends on CACHE_L2X0
  1187. help
  1188. On revisions of the PL310 prior to r3p2, the Store Buffer does
  1189. not automatically drain. This can cause normal, non-cacheable
  1190. writes to be retained when the memory system is idle, leading
  1191. to suboptimal I/O performance for drivers using coherent DMA.
  1192. This option adds a write barrier to the cpu_idle loop so that,
  1193. on systems with an outer cache, the store buffer is drained
  1194. explicitly.
  1195. endmenu
  1196. source "arch/arm/common/Kconfig"
  1197. menu "Bus support"
  1198. config ARM_AMBA
  1199. bool
  1200. config ISA
  1201. bool
  1202. help
  1203. Find out whether you have ISA slots on your motherboard. ISA is the
  1204. name of a bus system, i.e. the way the CPU talks to the other stuff
  1205. inside your box. Other bus systems are PCI, EISA, MicroChannel
  1206. (MCA) or VESA. ISA is an older system, now being displaced by PCI;
  1207. newer boards don't support it. If you have ISA, say Y, otherwise N.
  1208. # Select ISA DMA controller support
  1209. config ISA_DMA
  1210. bool
  1211. select ISA_DMA_API
  1212. # Select ISA DMA interface
  1213. config ISA_DMA_API
  1214. bool
  1215. config PCI
  1216. bool "PCI support" if MIGHT_HAVE_PCI
  1217. help
  1218. Find out whether you have a PCI motherboard. PCI is the name of a
  1219. bus system, i.e. the way the CPU talks to the other stuff inside
  1220. your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
  1221. VESA. If you have PCI, say Y, otherwise N.
  1222. config PCI_DOMAINS
  1223. bool
  1224. depends on PCI
  1225. config PCI_NANOENGINE
  1226. bool "BSE nanoEngine PCI support"
  1227. depends on SA1100_NANOENGINE
  1228. help
  1229. Enable PCI on the BSE nanoEngine board.
  1230. config PCI_SYSCALL
  1231. def_bool PCI
  1232. # Select the host bridge type
  1233. config PCI_HOST_VIA82C505
  1234. bool
  1235. depends on PCI && ARCH_SHARK
  1236. default y
  1237. config PCI_HOST_ITE8152
  1238. bool
  1239. depends on PCI && MACH_ARMCORE
  1240. default y
  1241. select DMABOUNCE
  1242. source "drivers/pci/Kconfig"
  1243. source "drivers/pcmcia/Kconfig"
  1244. endmenu
  1245. menu "Kernel Features"
  1246. source "kernel/time/Kconfig"
  1247. config HAVE_SMP
  1248. bool
  1249. help
  1250. This option should be selected by machines which have an SMP-
  1251. capable CPU.
  1252. The only effect of this option is to make the SMP-related
  1253. options available to the user for configuration.
  1254. config SMP
  1255. bool "Symmetric Multi-Processing"
  1256. depends on CPU_V6K || CPU_V7
  1257. depends on GENERIC_CLOCKEVENTS
  1258. depends on HAVE_SMP
  1259. depends on MMU
  1260. select USE_GENERIC_SMP_HELPERS
  1261. select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
  1262. help
  1263. This enables support for systems with more than one CPU. If you have
  1264. a system with only one CPU, like most personal computers, say N. If
  1265. you have a system with more than one CPU, say Y.
  1266. If you say N here, the kernel will run on single and multiprocessor
  1267. machines, but will use only one CPU of a multiprocessor machine. If
  1268. you say Y here, the kernel will run on many, but not all, single
  1269. processor machines. On a single processor machine, the kernel will
  1270. run faster if you say N here.
  1271. See also <file:Documentation/x86/i386/IO-APIC.txt>,
  1272. <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
  1273. <http://tldp.org/HOWTO/SMP-HOWTO.html>.
  1274. If you don't know what to do here, say N.
  1275. config SMP_ON_UP
  1276. bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
  1277. depends on EXPERIMENTAL
  1278. depends on SMP && !XIP_KERNEL
  1279. default y
  1280. help
  1281. SMP kernels contain instructions which fail on non-SMP processors.
  1282. Enabling this option allows the kernel to modify itself to make
  1283. these instructions safe. Disabling it allows about 1K of space
  1284. savings.
  1285. If you don't know what to do here, say Y.
  1286. config ARM_CPU_TOPOLOGY
  1287. bool "Support cpu topology definition"
  1288. depends on SMP && CPU_V7
  1289. default y
  1290. help
  1291. Support ARM cpu topology definition. The MPIDR register defines
  1292. affinity between processors which is then used to describe the cpu
  1293. topology of an ARM System.
  1294. config SCHED_MC
  1295. bool "Multi-core scheduler support"
  1296. depends on ARM_CPU_TOPOLOGY
  1297. help
  1298. Multi-core scheduler support improves the CPU scheduler's decision
  1299. making when dealing with multi-core CPU chips at a cost of slightly
  1300. increased overhead in some places. If unsure say N here.
  1301. config SCHED_SMT
  1302. bool "SMT scheduler support"
  1303. depends on ARM_CPU_TOPOLOGY
  1304. help
  1305. Improves the CPU scheduler's decision making when dealing with
  1306. MultiThreading at a cost of slightly increased overhead in some
  1307. places. If unsure say N here.
  1308. config HAVE_ARM_SCU
  1309. bool
  1310. help
  1311. This option enables support for the ARM system coherency unit
  1312. config ARM_ARCH_TIMER
  1313. bool "Architected timer support"
  1314. depends on CPU_V7
  1315. help
  1316. This option enables support for the ARM architected timer
  1317. config HAVE_ARM_TWD
  1318. bool
  1319. depends on SMP
  1320. help
  1321. This options enables support for the ARM timer and watchdog unit
  1322. choice
  1323. prompt "Memory split"
  1324. default VMSPLIT_3G
  1325. help
  1326. Select the desired split between kernel and user memory.
  1327. If you are not absolutely sure what you are doing, leave this
  1328. option alone!
  1329. config VMSPLIT_3G
  1330. bool "3G/1G user/kernel split"
  1331. config VMSPLIT_2G
  1332. bool "2G/2G user/kernel split"
  1333. config VMSPLIT_1G
  1334. bool "1G/3G user/kernel split"
  1335. endchoice
  1336. config PAGE_OFFSET
  1337. hex
  1338. default 0x40000000 if VMSPLIT_1G
  1339. default 0x80000000 if VMSPLIT_2G
  1340. default 0xC0000000
  1341. config NR_CPUS
  1342. int "Maximum number of CPUs (2-32)"
  1343. range 2 32
  1344. depends on SMP
  1345. default "4"
  1346. config HOTPLUG_CPU
  1347. bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
  1348. depends on SMP && HOTPLUG && EXPERIMENTAL
  1349. help
  1350. Say Y here to experiment with turning CPUs off and on. CPUs
  1351. can be controlled through /sys/devices/system/cpu.
  1352. config LOCAL_TIMERS
  1353. bool "Use local timer interrupts"
  1354. depends on SMP
  1355. default y
  1356. select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
  1357. help
  1358. Enable support for local timers on SMP platforms, rather then the
  1359. legacy IPI broadcast method. Local timers allows the system
  1360. accounting to be spread across the timer interval, preventing a
  1361. "thundering herd" at every timer tick.
  1362. config ARCH_NR_GPIO
  1363. int
  1364. default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
  1365. default 355 if ARCH_U8500
  1366. default 264 if MACH_H4700
  1367. default 0
  1368. help
  1369. Maximum number of GPIOs in the system.
  1370. If unsure, leave the default value.
  1371. source kernel/Kconfig.preempt
  1372. config HZ
  1373. int
  1374. default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
  1375. ARCH_S5PV210 || ARCH_EXYNOS4
  1376. default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
  1377. default AT91_TIMER_HZ if ARCH_AT91
  1378. default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
  1379. default 100
  1380. config THUMB2_KERNEL
  1381. bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
  1382. depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
  1383. select AEABI
  1384. select ARM_ASM_UNIFIED
  1385. select ARM_UNWIND
  1386. help
  1387. By enabling this option, the kernel will be compiled in
  1388. Thumb-2 mode. A compiler/assembler that understand the unified
  1389. ARM-Thumb syntax is needed.
  1390. If unsure, say N.
  1391. config THUMB2_AVOID_R_ARM_THM_JUMP11
  1392. bool "Work around buggy Thumb-2 short branch relocations in gas"
  1393. depends on THUMB2_KERNEL && MODULES
  1394. default y
  1395. help
  1396. Various binutils versions can resolve Thumb-2 branches to
  1397. locally-defined, preemptible global symbols as short-range "b.n"
  1398. branch instructions.
  1399. This is a problem, because there's no guarantee the final
  1400. destination of the symbol, or any candidate locations for a
  1401. trampoline, are within range of the branch. For this reason, the
  1402. kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
  1403. relocation in modules at all, and it makes little sense to add
  1404. support.
  1405. The symptom is that the kernel fails with an "unsupported
  1406. relocation" error when loading some modules.
  1407. Until fixed tools are available, passing
  1408. -fno-optimize-sibling-calls to gcc should prevent gcc generating
  1409. code which hits this problem, at the cost of a bit of extra runtime
  1410. stack usage in some cases.
  1411. The problem is described in more detail at:
  1412. https://bugs.launchpad.net/binutils-linaro/+bug/725126
  1413. Only Thumb-2 kernels are affected.
  1414. Unless you are sure your tools don't have this problem, say Y.
  1415. config ARM_ASM_UNIFIED
  1416. bool
  1417. config AEABI
  1418. bool "Use the ARM EABI to compile the kernel"
  1419. help
  1420. This option allows for the kernel to be compiled using the latest
  1421. ARM ABI (aka EABI). This is only useful if you are using a user
  1422. space environment that is also compiled with EABI.
  1423. Since there are major incompatibilities between the legacy ABI and
  1424. EABI, especially with regard to structure member alignment, this
  1425. option also changes the kernel syscall calling convention to
  1426. disambiguate both ABIs and allow for backward compatibility support
  1427. (selected with CONFIG_OABI_COMPAT).
  1428. To use this you need GCC version 4.0.0 or later.
  1429. config OABI_COMPAT
  1430. bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
  1431. depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
  1432. default y
  1433. help
  1434. This option preserves the old syscall interface along with the
  1435. new (ARM EABI) one. It also provides a compatibility layer to
  1436. intercept syscalls that have structure arguments which layout
  1437. in memory differs between the legacy ABI and the new ARM EABI
  1438. (only for non "thumb" binaries). This option adds a tiny
  1439. overhead to all syscalls and produces a slightly larger kernel.
  1440. If you know you'll be using only pure EABI user space then you
  1441. can say N here. If this option is not selected and you attempt
  1442. to execute a legacy ABI binary then the result will be
  1443. UNPREDICTABLE (in fact it can be predicted that it won't work
  1444. at all). If in doubt say Y.
  1445. config ARCH_HAS_HOLES_MEMORYMODEL
  1446. bool
  1447. config ARCH_SPARSEMEM_ENABLE
  1448. bool
  1449. config ARCH_SPARSEMEM_DEFAULT
  1450. def_bool ARCH_SPARSEMEM_ENABLE
  1451. config ARCH_SELECT_MEMORY_MODEL
  1452. def_bool ARCH_SPARSEMEM_ENABLE
  1453. config HAVE_ARCH_PFN_VALID
  1454. def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
  1455. config HIGHMEM
  1456. bool "High Memory Support"
  1457. depends on MMU
  1458. help
  1459. The address space of ARM processors is only 4 Gigabytes large
  1460. and it has to accommodate user address space, kernel address
  1461. space as well as some memory mapped IO. That means that, if you
  1462. have a large amount of physical memory and/or IO, not all of the
  1463. memory can be "permanently mapped" by the kernel. The physical
  1464. memory that is not permanently mapped is called "high memory".
  1465. Depending on the selected kernel/user memory split, minimum
  1466. vmalloc space and actual amount of RAM, you may not need this
  1467. option which should result in a slightly faster kernel.
  1468. If unsure, say n.
  1469. config HIGHPTE
  1470. bool "Allocate 2nd-level pagetables from highmem"
  1471. depends on HIGHMEM
  1472. config HW_PERF_EVENTS
  1473. bool "Enable hardware performance counter support for perf events"
  1474. depends on PERF_EVENTS && CPU_HAS_PMU
  1475. default y
  1476. help
  1477. Enable hardware performance counter support for perf events. If
  1478. disabled, perf events will use software events only.
  1479. source "mm/Kconfig"
  1480. config FORCE_MAX_ZONEORDER
  1481. int "Maximum zone order" if ARCH_SHMOBILE
  1482. range 11 64 if ARCH_SHMOBILE
  1483. default "9" if SA1111
  1484. default "11"
  1485. help
  1486. The kernel memory allocator divides physically contiguous memory
  1487. blocks into "zones", where each zone is a power of two number of
  1488. pages. This option selects the largest power of two that the kernel
  1489. keeps in the memory allocator. If you need to allocate very large
  1490. blocks of physically contiguous memory, then you may need to
  1491. increase this value.
  1492. This config option is actually maximum order plus one. For example,
  1493. a value of 11 means that the largest free memory block is 2^10 pages.
  1494. config LEDS
  1495. bool "Timer and CPU usage LEDs"
  1496. depends on ARCH_CDB89712 || ARCH_EBSA110 || \
  1497. ARCH_EBSA285 || ARCH_INTEGRATOR || \
  1498. ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
  1499. ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
  1500. ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
  1501. ARCH_AT91 || ARCH_DAVINCI || \
  1502. ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
  1503. help
  1504. If you say Y here, the LEDs on your machine will be used
  1505. to provide useful information about your current system status.
  1506. If you are compiling a kernel for a NetWinder or EBSA-285, you will
  1507. be able to select which LEDs are active using the options below. If
  1508. you are compiling a kernel for the EBSA-110 or the LART however, the
  1509. red LED will simply flash regularly to indicate that the system is
  1510. still functional. It is safe to say Y here if you have a CATS
  1511. system, but the driver will do nothing.
  1512. config LEDS_TIMER
  1513. bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
  1514. OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
  1515. || MACH_OMAP_PERSEUS2
  1516. depends on LEDS
  1517. depends on !GENERIC_CLOCKEVENTS
  1518. default y if ARCH_EBSA110
  1519. help
  1520. If you say Y here, one of the system LEDs (the green one on the
  1521. NetWinder, the amber one on the EBSA285, or the red one on the LART)
  1522. will flash regularly to indicate that the system is still
  1523. operational. This is mainly useful to kernel hackers who are
  1524. debugging unstable kernels.
  1525. The LART uses the same LED for both Timer LED and CPU usage LED
  1526. functions. You may choose to use both, but the Timer LED function
  1527. will overrule the CPU usage LED.
  1528. config LEDS_CPU
  1529. bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
  1530. !ARCH_OMAP) \
  1531. || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
  1532. || MACH_OMAP_PERSEUS2
  1533. depends on LEDS
  1534. help
  1535. If you say Y here, the red LED will be used to give a good real
  1536. time indication of CPU usage, by lighting whenever the idle task
  1537. is not currently executing.
  1538. The LART uses the same LED for both Timer LED and CPU usage LED
  1539. functions. You may choose to use both, but the Timer LED function
  1540. will overrule the CPU usage LED.
  1541. config ALIGNMENT_TRAP
  1542. bool
  1543. depends on CPU_CP15_MMU
  1544. default y if !ARCH_EBSA110
  1545. select HAVE_PROC_CPU if PROC_FS
  1546. help
  1547. ARM processors cannot fetch/store information which is not
  1548. naturally aligned on the bus, i.e., a 4 byte fetch must start at an
  1549. address divisible by 4. On 32-bit ARM processors, these non-aligned
  1550. fetch/store instructions will be emulated in software if you say
  1551. here, which has a severe performance impact. This is necessary for
  1552. correct operation of some network protocols. With an IP-only
  1553. configuration it is safe to say N, otherwise say Y.
  1554. config UACCESS_WITH_MEMCPY
  1555. bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
  1556. depends on MMU && EXPERIMENTAL
  1557. default y if CPU_FEROCEON
  1558. help
  1559. Implement faster copy_to_user and clear_user methods for CPU
  1560. cores where a 8-word STM instruction give significantly higher
  1561. memory write throughput than a sequence of individual 32bit stores.
  1562. A possible side effect is a slight increase in scheduling latency
  1563. between threads sharing the same address space if they invoke
  1564. such copy operations with large buffers.
  1565. However, if the CPU data cache is using a write-allocate mode,
  1566. this option is unlikely to provide any performance gain.
  1567. config SECCOMP
  1568. bool
  1569. prompt "Enable seccomp to safely compute untrusted bytecode"
  1570. ---help---
  1571. This kernel feature is useful for number crunching applications
  1572. that may need to compute untrusted bytecode during their
  1573. execution. By using pipes or other transports made available to
  1574. the process as file descriptors supporting the read/write
  1575. syscalls, it's possible to isolate those applications in
  1576. their own address space using seccomp. Once seccomp is
  1577. enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
  1578. and the task is only allowed to execute a few safe syscalls
  1579. defined by each seccomp mode.
  1580. config CC_STACKPROTECTOR
  1581. bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
  1582. depends on EXPERIMENTAL
  1583. help
  1584. This option turns on the -fstack-protector GCC feature. This
  1585. feature puts, at the beginning of functions, a canary value on
  1586. the stack just before the return address, and validates
  1587. the value just before actually returning. Stack based buffer
  1588. overflows (that need to overwrite this return address) now also
  1589. overwrite the canary, which gets detected and the attack is then
  1590. neutralized via a kernel panic.
  1591. This feature requires gcc version 4.2 or above.
  1592. config DEPRECATED_PARAM_STRUCT
  1593. bool "Provide old way to pass kernel parameters"
  1594. help
  1595. This was deprecated in 2001 and announced to live on for 5 years.
  1596. Some old boot loaders still use this way.
  1597. endmenu
  1598. menu "Boot options"
  1599. config USE_OF
  1600. bool "Flattened Device Tree support"
  1601. select OF
  1602. select OF_EARLY_FLATTREE
  1603. select IRQ_DOMAIN
  1604. help
  1605. Include support for flattened device tree machine descriptions.
  1606. # Compressed boot loader in ROM. Yes, we really want to ask about
  1607. # TEXT and BSS so we preserve their values in the config files.
  1608. config ZBOOT_ROM_TEXT
  1609. hex "Compressed ROM boot loader base address"
  1610. default "0"
  1611. help
  1612. The physical address at which the ROM-able zImage is to be
  1613. placed in the target. Platforms which normally make use of
  1614. ROM-able zImage formats normally set this to a suitable
  1615. value in their defconfig file.
  1616. If ZBOOT_ROM is not enabled, this has no effect.
  1617. config ZBOOT_ROM_BSS
  1618. hex "Compressed ROM boot loader BSS address"
  1619. default "0"
  1620. help
  1621. The base address of an area of read/write memory in the target
  1622. for the ROM-able zImage which must be available while the
  1623. decompressor is running. It must be large enough to hold the
  1624. entire decompressed kernel plus an additional 128 KiB.
  1625. Platforms which normally make use of ROM-able zImage formats
  1626. normally set this to a suitable value in their defconfig file.
  1627. If ZBOOT_ROM is not enabled, this has no effect.
  1628. config ZBOOT_ROM
  1629. bool "Compressed boot loader in ROM/flash"
  1630. depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
  1631. help
  1632. Say Y here if you intend to execute your compressed kernel image
  1633. (zImage) directly from ROM or flash. If unsure, say N.
  1634. choice
  1635. prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
  1636. depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
  1637. default ZBOOT_ROM_NONE
  1638. help
  1639. Include experimental SD/MMC loading code in the ROM-able zImage.
  1640. With this enabled it is possible to write the ROM-able zImage
  1641. kernel image to an MMC or SD card and boot the kernel straight
  1642. from the reset vector. At reset the processor Mask ROM will load
  1643. the first part of the ROM-able zImage which in turn loads the
  1644. rest the kernel image to RAM.
  1645. config ZBOOT_ROM_NONE
  1646. bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
  1647. help
  1648. Do not load image from SD or MMC
  1649. config ZBOOT_ROM_MMCIF
  1650. bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
  1651. help
  1652. Load image from MMCIF hardware block.
  1653. config ZBOOT_ROM_SH_MOBILE_SDHI
  1654. bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
  1655. help
  1656. Load image from SDHI hardware block
  1657. endchoice
  1658. config ARM_APPENDED_DTB
  1659. bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
  1660. depends on OF && !ZBOOT_ROM && EXPERIMENTAL
  1661. help
  1662. With this option, the boot code will look for a device tree binary
  1663. (DTB) appended to zImage
  1664. (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
  1665. This is meant as a backward compatibility convenience for those
  1666. systems with a bootloader that can't be upgraded to accommodate
  1667. the documented boot protocol using a device tree.
  1668. Beware that there is very little in terms of protection against
  1669. this option being confused by leftover garbage in memory that might
  1670. look like a DTB header after a reboot if no actual DTB is appended
  1671. to zImage. Do not leave this option active in a production kernel
  1672. if you don't intend to always append a DTB. Proper passing of the
  1673. location into r2 of a bootloader provided DTB is always preferable
  1674. to this option.
  1675. config ARM_ATAG_DTB_COMPAT
  1676. bool "Supplement the appended DTB with traditional ATAG information"
  1677. depends on ARM_APPENDED_DTB
  1678. help
  1679. Some old bootloaders can't be updated to a DTB capable one, yet
  1680. they provide ATAGs with memory configuration, the ramdisk address,
  1681. the kernel cmdline string, etc. Such information is dynamically
  1682. provided by the bootloader and can't always be stored in a static
  1683. DTB. To allow a device tree enabled kernel to be used with such
  1684. bootloaders, this option allows zImage to extract the information
  1685. from the ATAG list and store it at run time into the appended DTB.
  1686. config CMDLINE
  1687. string "Default kernel command string"
  1688. default ""
  1689. help
  1690. On some architectures (EBSA110 and CATS), there is currently no way
  1691. for the boot loader to pass arguments to the kernel. For these
  1692. architectures, you should supply some command-line options at build
  1693. time by entering them here. As a minimum, you should specify the
  1694. memory size and the root device (e.g., mem=64M root=/dev/nfs).
  1695. choice
  1696. prompt "Kernel command line type" if CMDLINE != ""
  1697. default CMDLINE_FROM_BOOTLOADER
  1698. config CMDLINE_FROM_BOOTLOADER
  1699. bool "Use bootloader kernel arguments if available"
  1700. help
  1701. Uses the command-line options passed by the boot loader. If
  1702. the boot loader doesn't provide any, the default kernel command
  1703. string provided in CMDLINE will be used.
  1704. config CMDLINE_EXTEND
  1705. bool "Extend bootloader kernel arguments"
  1706. help
  1707. The command-line arguments provided by the boot loader will be
  1708. appended to the default kernel command string.
  1709. config CMDLINE_FORCE
  1710. bool "Always use the default kernel command string"
  1711. help
  1712. Always use the default kernel command string, even if the boot
  1713. loader passes other arguments to the kernel.
  1714. This is useful if you cannot or don't want to change the
  1715. command-line options your boot loader passes to the kernel.
  1716. endchoice
  1717. config XIP_KERNEL
  1718. bool "Kernel Execute-In-Place from ROM"
  1719. depends on !ZBOOT_ROM && !ARM_LPAE
  1720. help
  1721. Execute-In-Place allows the kernel to run from non-volatile storage
  1722. directly addressable by the CPU, such as NOR flash. This saves RAM
  1723. space since the text section of the kernel is not loaded from flash
  1724. to RAM. Read-write sections, such as the data section and stack,
  1725. are still copied to RAM. The XIP kernel is not compressed since
  1726. it has to run directly from flash, so it will take more space to
  1727. store it. The flash address used to link the kernel object files,
  1728. and for storing it, is configuration dependent. Therefore, if you
  1729. say Y here, you must know the proper physical address where to
  1730. store the kernel image depending on your own flash memory usage.
  1731. Also note that the make target becomes "make xipImage" rather than
  1732. "make zImage" or "make Image". The final kernel binary to put in
  1733. ROM memory will be arch/arm/boot/xipImage.
  1734. If unsure, say N.
  1735. config XIP_PHYS_ADDR
  1736. hex "XIP Kernel Physical Location"
  1737. depends on XIP_KERNEL
  1738. default "0x00080000"
  1739. help
  1740. This is the physical address in your flash memory the kernel will
  1741. be linked for and stored to. This address is dependent on your
  1742. own flash usage.
  1743. config KEXEC
  1744. bool "Kexec system call (EXPERIMENTAL)"
  1745. depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU)
  1746. help
  1747. kexec is a system call that implements the ability to shutdown your
  1748. current kernel, and to start another kernel. It is like a reboot
  1749. but it is independent of the system firmware. And like a reboot
  1750. you can start any kernel with it, not just Linux.
  1751. It is an ongoing process to be certain the hardware in a machine
  1752. is properly shutdown, so do not be surprised if this code does not
  1753. initially work for you. It may help to enable device hotplugging
  1754. support.
  1755. config ATAGS_PROC
  1756. bool "Export atags in procfs"
  1757. depends on KEXEC
  1758. default y
  1759. help
  1760. Should the atags used to boot the kernel be exported in an "atags"
  1761. file in procfs. Useful with kexec.
  1762. config CRASH_DUMP
  1763. bool "Build kdump crash kernel (EXPERIMENTAL)"
  1764. depends on EXPERIMENTAL
  1765. help
  1766. Generate crash dump after being started by kexec. This should
  1767. be normally only set in special crash dump kernels which are
  1768. loaded in the main kernel with kexec-tools into a specially
  1769. reserved region and then later executed after a crash by
  1770. kdump/kexec. The crash dump kernel must be compiled to a
  1771. memory address not used by the main kernel
  1772. For more details see Documentation/kdump/kdump.txt
  1773. config AUTO_ZRELADDR
  1774. bool "Auto calculation of the decompressed kernel image address"
  1775. depends on !ZBOOT_ROM && !ARCH_U300
  1776. help
  1777. ZRELADDR is the physical address where the decompressed kernel
  1778. image will be placed. If AUTO_ZRELADDR is selected, the address
  1779. will be determined at run-time by masking the current IP with
  1780. 0xf8000000. This assumes the zImage being placed in the first 128MB
  1781. from start of memory.
  1782. endmenu
  1783. menu "CPU Power Management"
  1784. if ARCH_HAS_CPUFREQ
  1785. source "drivers/cpufreq/Kconfig"
  1786. config CPU_FREQ_IMX
  1787. tristate "CPUfreq driver for i.MX CPUs"
  1788. depends on ARCH_MXC && CPU_FREQ
  1789. help
  1790. This enables the CPUfreq driver for i.MX CPUs.
  1791. config CPU_FREQ_SA1100
  1792. bool
  1793. config CPU_FREQ_SA1110
  1794. bool
  1795. config CPU_FREQ_INTEGRATOR
  1796. tristate "CPUfreq driver for ARM Integrator CPUs"
  1797. depends on ARCH_INTEGRATOR && CPU_FREQ
  1798. default y
  1799. help
  1800. This enables the CPUfreq driver for ARM Integrator CPUs.
  1801. For details, take a look at <file:Documentation/cpu-freq>.
  1802. If in doubt, say Y.
  1803. config CPU_FREQ_PXA
  1804. bool
  1805. depends on CPU_FREQ && ARCH_PXA && PXA25x
  1806. default y
  1807. select CPU_FREQ_TABLE
  1808. select CPU_FREQ_DEFAULT_GOV_USERSPACE
  1809. config CPU_FREQ_S3C
  1810. bool
  1811. help
  1812. Internal configuration node for common cpufreq on Samsung SoC
  1813. config CPU_FREQ_S3C24XX
  1814. bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
  1815. depends on ARCH_S3C24XX && CPU_FREQ && EXPERIMENTAL
  1816. select CPU_FREQ_S3C
  1817. help
  1818. This enables the CPUfreq driver for the Samsung S3C24XX family
  1819. of CPUs.
  1820. For details, take a look at <file:Documentation/cpu-freq>.
  1821. If in doubt, say N.
  1822. config CPU_FREQ_S3C24XX_PLL
  1823. bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
  1824. depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
  1825. help
  1826. Compile in support for changing the PLL frequency from the
  1827. S3C24XX series CPUfreq driver. The PLL takes time to settle
  1828. after a frequency change, so by default it is not enabled.
  1829. This also means that the PLL tables for the selected CPU(s) will
  1830. be built which may increase the size of the kernel image.
  1831. config CPU_FREQ_S3C24XX_DEBUG
  1832. bool "Debug CPUfreq Samsung driver core"
  1833. depends on CPU_FREQ_S3C24XX
  1834. help
  1835. Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
  1836. config CPU_FREQ_S3C24XX_IODEBUG
  1837. bool "Debug CPUfreq Samsung driver IO timing"
  1838. depends on CPU_FREQ_S3C24XX
  1839. help
  1840. Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
  1841. config CPU_FREQ_S3C24XX_DEBUGFS
  1842. bool "Export debugfs for CPUFreq"
  1843. depends on CPU_FREQ_S3C24XX && DEBUG_FS
  1844. help
  1845. Export status information via debugfs.
  1846. endif
  1847. source "drivers/cpuidle/Kconfig"
  1848. endmenu
  1849. menu "Floating point emulation"
  1850. comment "At least one emulation must be selected"
  1851. config FPE_NWFPE
  1852. bool "NWFPE math emulation"
  1853. depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
  1854. ---help---
  1855. Say Y to include the NWFPE floating point emulator in the kernel.
  1856. This is necessary to run most binaries. Linux does not currently
  1857. support floating point hardware so you need to say Y here even if
  1858. your machine has an FPA or floating point co-processor podule.
  1859. You may say N here if you are going to load the Acorn FPEmulator
  1860. early in the bootup.
  1861. config FPE_NWFPE_XP
  1862. bool "Support extended precision"
  1863. depends on FPE_NWFPE
  1864. help
  1865. Say Y to include 80-bit support in the kernel floating-point
  1866. emulator. Otherwise, only 32 and 64-bit support is compiled in.
  1867. Note that gcc does not generate 80-bit operations by default,
  1868. so in most cases this option only enlarges the size of the
  1869. floating point emulator without any good reason.
  1870. You almost surely want to say N here.
  1871. config FPE_FASTFPE
  1872. bool "FastFPE math emulation (EXPERIMENTAL)"
  1873. depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
  1874. ---help---
  1875. Say Y here to include the FAST floating point emulator in the kernel.
  1876. This is an experimental much faster emulator which now also has full
  1877. precision for the mantissa. It does not support any exceptions.
  1878. It is very simple, and approximately 3-6 times faster than NWFPE.
  1879. It should be sufficient for most programs. It may be not suitable
  1880. for scientific calculations, but you have to check this for yourself.
  1881. If you do not feel you need a faster FP emulation you should better
  1882. choose NWFPE.
  1883. config VFP
  1884. bool "VFP-format floating point maths"
  1885. depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
  1886. help
  1887. Say Y to include VFP support code in the kernel. This is needed
  1888. if your hardware includes a VFP unit.
  1889. Please see <file:Documentation/arm/VFP/release-notes.txt> for
  1890. release notes and additional status information.
  1891. Say N if your target does not have VFP hardware.
  1892. config VFPv3
  1893. bool
  1894. depends on VFP
  1895. default y if CPU_V7
  1896. config NEON
  1897. bool "Advanced SIMD (NEON) Extension support"
  1898. depends on VFPv3 && CPU_V7
  1899. help
  1900. Say Y to include support code for NEON, the ARMv7 Advanced SIMD
  1901. Extension.
  1902. endmenu
  1903. menu "Userspace binary formats"
  1904. source "fs/Kconfig.binfmt"
  1905. config ARTHUR
  1906. tristate "RISC OS personality"
  1907. depends on !AEABI
  1908. help
  1909. Say Y here to include the kernel code necessary if you want to run
  1910. Acorn RISC OS/Arthur binaries under Linux. This code is still very
  1911. experimental; if this sounds frightening, say N and sleep in peace.
  1912. You can also say M here to compile this support as a module (which
  1913. will be called arthur).
  1914. endmenu
  1915. menu "Power management options"
  1916. source "kernel/power/Kconfig"
  1917. config ARCH_SUSPEND_POSSIBLE
  1918. depends on !ARCH_S5PC100 && !ARCH_TEGRA
  1919. depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
  1920. CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
  1921. def_bool y
  1922. config ARM_CPU_SUSPEND
  1923. def_bool PM_SLEEP
  1924. endmenu
  1925. source "net/Kconfig"
  1926. source "drivers/Kconfig"
  1927. source "fs/Kconfig"
  1928. source "arch/arm/Kconfig.debug"
  1929. source "security/Kconfig"
  1930. source "crypto/Kconfig"
  1931. source "lib/Kconfig"