mmu.c 42 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include "vmx.h"
  20. #include "kvm.h"
  21. #include "x86.h"
  22. #include <linux/types.h>
  23. #include <linux/string.h>
  24. #include <linux/mm.h>
  25. #include <linux/highmem.h>
  26. #include <linux/module.h>
  27. #include <linux/swap.h>
  28. #include <asm/page.h>
  29. #include <asm/cmpxchg.h>
  30. #include <asm/io.h>
  31. #undef MMU_DEBUG
  32. #undef AUDIT
  33. #ifdef AUDIT
  34. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  35. #else
  36. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  37. #endif
  38. #ifdef MMU_DEBUG
  39. #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  40. #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  41. #else
  42. #define pgprintk(x...) do { } while (0)
  43. #define rmap_printk(x...) do { } while (0)
  44. #endif
  45. #if defined(MMU_DEBUG) || defined(AUDIT)
  46. static int dbg = 1;
  47. #endif
  48. #ifndef MMU_DEBUG
  49. #define ASSERT(x) do { } while (0)
  50. #else
  51. #define ASSERT(x) \
  52. if (!(x)) { \
  53. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  54. __FILE__, __LINE__, #x); \
  55. }
  56. #endif
  57. #define PT64_PT_BITS 9
  58. #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
  59. #define PT32_PT_BITS 10
  60. #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
  61. #define PT_WRITABLE_SHIFT 1
  62. #define PT_PRESENT_MASK (1ULL << 0)
  63. #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
  64. #define PT_USER_MASK (1ULL << 2)
  65. #define PT_PWT_MASK (1ULL << 3)
  66. #define PT_PCD_MASK (1ULL << 4)
  67. #define PT_ACCESSED_MASK (1ULL << 5)
  68. #define PT_DIRTY_MASK (1ULL << 6)
  69. #define PT_PAGE_SIZE_MASK (1ULL << 7)
  70. #define PT_PAT_MASK (1ULL << 7)
  71. #define PT_GLOBAL_MASK (1ULL << 8)
  72. #define PT64_NX_SHIFT 63
  73. #define PT64_NX_MASK (1ULL << PT64_NX_SHIFT)
  74. #define PT_PAT_SHIFT 7
  75. #define PT_DIR_PAT_SHIFT 12
  76. #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
  77. #define PT32_DIR_PSE36_SIZE 4
  78. #define PT32_DIR_PSE36_SHIFT 13
  79. #define PT32_DIR_PSE36_MASK \
  80. (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
  81. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  82. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  83. #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
  84. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  85. #define PT64_LEVEL_BITS 9
  86. #define PT64_LEVEL_SHIFT(level) \
  87. (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
  88. #define PT64_LEVEL_MASK(level) \
  89. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  90. #define PT64_INDEX(address, level)\
  91. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  92. #define PT32_LEVEL_BITS 10
  93. #define PT32_LEVEL_SHIFT(level) \
  94. (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
  95. #define PT32_LEVEL_MASK(level) \
  96. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  97. #define PT32_INDEX(address, level)\
  98. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  99. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
  100. #define PT64_DIR_BASE_ADDR_MASK \
  101. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  102. #define PT32_BASE_ADDR_MASK PAGE_MASK
  103. #define PT32_DIR_BASE_ADDR_MASK \
  104. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  105. #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
  106. | PT64_NX_MASK)
  107. #define PFERR_PRESENT_MASK (1U << 0)
  108. #define PFERR_WRITE_MASK (1U << 1)
  109. #define PFERR_USER_MASK (1U << 2)
  110. #define PFERR_FETCH_MASK (1U << 4)
  111. #define PT64_ROOT_LEVEL 4
  112. #define PT32_ROOT_LEVEL 2
  113. #define PT32E_ROOT_LEVEL 3
  114. #define PT_DIRECTORY_LEVEL 2
  115. #define PT_PAGE_TABLE_LEVEL 1
  116. #define RMAP_EXT 4
  117. #define ACC_EXEC_MASK 1
  118. #define ACC_WRITE_MASK PT_WRITABLE_MASK
  119. #define ACC_USER_MASK PT_USER_MASK
  120. #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
  121. struct kvm_rmap_desc {
  122. u64 *shadow_ptes[RMAP_EXT];
  123. struct kvm_rmap_desc *more;
  124. };
  125. static struct kmem_cache *pte_chain_cache;
  126. static struct kmem_cache *rmap_desc_cache;
  127. static struct kmem_cache *mmu_page_header_cache;
  128. static u64 __read_mostly shadow_trap_nonpresent_pte;
  129. static u64 __read_mostly shadow_notrap_nonpresent_pte;
  130. void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
  131. {
  132. shadow_trap_nonpresent_pte = trap_pte;
  133. shadow_notrap_nonpresent_pte = notrap_pte;
  134. }
  135. EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
  136. static int is_write_protection(struct kvm_vcpu *vcpu)
  137. {
  138. return vcpu->cr0 & X86_CR0_WP;
  139. }
  140. static int is_cpuid_PSE36(void)
  141. {
  142. return 1;
  143. }
  144. static int is_nx(struct kvm_vcpu *vcpu)
  145. {
  146. return vcpu->shadow_efer & EFER_NX;
  147. }
  148. static int is_present_pte(unsigned long pte)
  149. {
  150. return pte & PT_PRESENT_MASK;
  151. }
  152. static int is_shadow_present_pte(u64 pte)
  153. {
  154. pte &= ~PT_SHADOW_IO_MARK;
  155. return pte != shadow_trap_nonpresent_pte
  156. && pte != shadow_notrap_nonpresent_pte;
  157. }
  158. static int is_writeble_pte(unsigned long pte)
  159. {
  160. return pte & PT_WRITABLE_MASK;
  161. }
  162. static int is_dirty_pte(unsigned long pte)
  163. {
  164. return pte & PT_DIRTY_MASK;
  165. }
  166. static int is_io_pte(unsigned long pte)
  167. {
  168. return pte & PT_SHADOW_IO_MARK;
  169. }
  170. static int is_rmap_pte(u64 pte)
  171. {
  172. return pte != shadow_trap_nonpresent_pte
  173. && pte != shadow_notrap_nonpresent_pte;
  174. }
  175. static gfn_t pse36_gfn_delta(u32 gpte)
  176. {
  177. int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
  178. return (gpte & PT32_DIR_PSE36_MASK) << shift;
  179. }
  180. static void set_shadow_pte(u64 *sptep, u64 spte)
  181. {
  182. #ifdef CONFIG_X86_64
  183. set_64bit((unsigned long *)sptep, spte);
  184. #else
  185. set_64bit((unsigned long long *)sptep, spte);
  186. #endif
  187. }
  188. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  189. struct kmem_cache *base_cache, int min)
  190. {
  191. void *obj;
  192. if (cache->nobjs >= min)
  193. return 0;
  194. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  195. obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
  196. if (!obj)
  197. return -ENOMEM;
  198. cache->objects[cache->nobjs++] = obj;
  199. }
  200. return 0;
  201. }
  202. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  203. {
  204. while (mc->nobjs)
  205. kfree(mc->objects[--mc->nobjs]);
  206. }
  207. static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
  208. int min)
  209. {
  210. struct page *page;
  211. if (cache->nobjs >= min)
  212. return 0;
  213. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  214. page = alloc_page(GFP_KERNEL);
  215. if (!page)
  216. return -ENOMEM;
  217. set_page_private(page, 0);
  218. cache->objects[cache->nobjs++] = page_address(page);
  219. }
  220. return 0;
  221. }
  222. static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
  223. {
  224. while (mc->nobjs)
  225. free_page((unsigned long)mc->objects[--mc->nobjs]);
  226. }
  227. static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
  228. {
  229. int r;
  230. kvm_mmu_free_some_pages(vcpu);
  231. r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
  232. pte_chain_cache, 4);
  233. if (r)
  234. goto out;
  235. r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
  236. rmap_desc_cache, 1);
  237. if (r)
  238. goto out;
  239. r = mmu_topup_memory_cache_page(&vcpu->mmu_page_cache, 8);
  240. if (r)
  241. goto out;
  242. r = mmu_topup_memory_cache(&vcpu->mmu_page_header_cache,
  243. mmu_page_header_cache, 4);
  244. out:
  245. return r;
  246. }
  247. static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  248. {
  249. mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
  250. mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
  251. mmu_free_memory_cache_page(&vcpu->mmu_page_cache);
  252. mmu_free_memory_cache(&vcpu->mmu_page_header_cache);
  253. }
  254. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
  255. size_t size)
  256. {
  257. void *p;
  258. BUG_ON(!mc->nobjs);
  259. p = mc->objects[--mc->nobjs];
  260. memset(p, 0, size);
  261. return p;
  262. }
  263. static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
  264. {
  265. return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
  266. sizeof(struct kvm_pte_chain));
  267. }
  268. static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
  269. {
  270. kfree(pc);
  271. }
  272. static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
  273. {
  274. return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
  275. sizeof(struct kvm_rmap_desc));
  276. }
  277. static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
  278. {
  279. kfree(rd);
  280. }
  281. /*
  282. * Take gfn and return the reverse mapping to it.
  283. * Note: gfn must be unaliased before this function get called
  284. */
  285. static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn)
  286. {
  287. struct kvm_memory_slot *slot;
  288. slot = gfn_to_memslot(kvm, gfn);
  289. return &slot->rmap[gfn - slot->base_gfn];
  290. }
  291. /*
  292. * Reverse mapping data structures:
  293. *
  294. * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
  295. * that points to page_address(page).
  296. *
  297. * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
  298. * containing more mappings.
  299. */
  300. static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
  301. {
  302. struct kvm_mmu_page *sp;
  303. struct kvm_rmap_desc *desc;
  304. unsigned long *rmapp;
  305. int i;
  306. if (!is_rmap_pte(*spte))
  307. return;
  308. gfn = unalias_gfn(vcpu->kvm, gfn);
  309. sp = page_header(__pa(spte));
  310. sp->gfns[spte - sp->spt] = gfn;
  311. rmapp = gfn_to_rmap(vcpu->kvm, gfn);
  312. if (!*rmapp) {
  313. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  314. *rmapp = (unsigned long)spte;
  315. } else if (!(*rmapp & 1)) {
  316. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  317. desc = mmu_alloc_rmap_desc(vcpu);
  318. desc->shadow_ptes[0] = (u64 *)*rmapp;
  319. desc->shadow_ptes[1] = spte;
  320. *rmapp = (unsigned long)desc | 1;
  321. } else {
  322. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  323. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  324. while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
  325. desc = desc->more;
  326. if (desc->shadow_ptes[RMAP_EXT-1]) {
  327. desc->more = mmu_alloc_rmap_desc(vcpu);
  328. desc = desc->more;
  329. }
  330. for (i = 0; desc->shadow_ptes[i]; ++i)
  331. ;
  332. desc->shadow_ptes[i] = spte;
  333. }
  334. }
  335. static void rmap_desc_remove_entry(unsigned long *rmapp,
  336. struct kvm_rmap_desc *desc,
  337. int i,
  338. struct kvm_rmap_desc *prev_desc)
  339. {
  340. int j;
  341. for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
  342. ;
  343. desc->shadow_ptes[i] = desc->shadow_ptes[j];
  344. desc->shadow_ptes[j] = NULL;
  345. if (j != 0)
  346. return;
  347. if (!prev_desc && !desc->more)
  348. *rmapp = (unsigned long)desc->shadow_ptes[0];
  349. else
  350. if (prev_desc)
  351. prev_desc->more = desc->more;
  352. else
  353. *rmapp = (unsigned long)desc->more | 1;
  354. mmu_free_rmap_desc(desc);
  355. }
  356. static void rmap_remove(struct kvm *kvm, u64 *spte)
  357. {
  358. struct kvm_rmap_desc *desc;
  359. struct kvm_rmap_desc *prev_desc;
  360. struct kvm_mmu_page *sp;
  361. struct page *page;
  362. unsigned long *rmapp;
  363. int i;
  364. if (!is_rmap_pte(*spte))
  365. return;
  366. sp = page_header(__pa(spte));
  367. page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
  368. mark_page_accessed(page);
  369. if (is_writeble_pte(*spte))
  370. kvm_release_page_dirty(page);
  371. else
  372. kvm_release_page_clean(page);
  373. rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt]);
  374. if (!*rmapp) {
  375. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  376. BUG();
  377. } else if (!(*rmapp & 1)) {
  378. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  379. if ((u64 *)*rmapp != spte) {
  380. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  381. spte, *spte);
  382. BUG();
  383. }
  384. *rmapp = 0;
  385. } else {
  386. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  387. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  388. prev_desc = NULL;
  389. while (desc) {
  390. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
  391. if (desc->shadow_ptes[i] == spte) {
  392. rmap_desc_remove_entry(rmapp,
  393. desc, i,
  394. prev_desc);
  395. return;
  396. }
  397. prev_desc = desc;
  398. desc = desc->more;
  399. }
  400. BUG();
  401. }
  402. }
  403. static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
  404. {
  405. struct kvm_rmap_desc *desc;
  406. struct kvm_rmap_desc *prev_desc;
  407. u64 *prev_spte;
  408. int i;
  409. if (!*rmapp)
  410. return NULL;
  411. else if (!(*rmapp & 1)) {
  412. if (!spte)
  413. return (u64 *)*rmapp;
  414. return NULL;
  415. }
  416. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  417. prev_desc = NULL;
  418. prev_spte = NULL;
  419. while (desc) {
  420. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
  421. if (prev_spte == spte)
  422. return desc->shadow_ptes[i];
  423. prev_spte = desc->shadow_ptes[i];
  424. }
  425. desc = desc->more;
  426. }
  427. return NULL;
  428. }
  429. static void rmap_write_protect(struct kvm *kvm, u64 gfn)
  430. {
  431. unsigned long *rmapp;
  432. u64 *spte;
  433. gfn = unalias_gfn(kvm, gfn);
  434. rmapp = gfn_to_rmap(kvm, gfn);
  435. spte = rmap_next(kvm, rmapp, NULL);
  436. while (spte) {
  437. BUG_ON(!spte);
  438. BUG_ON(!(*spte & PT_PRESENT_MASK));
  439. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  440. if (is_writeble_pte(*spte))
  441. set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
  442. kvm_flush_remote_tlbs(kvm);
  443. spte = rmap_next(kvm, rmapp, spte);
  444. }
  445. }
  446. #ifdef MMU_DEBUG
  447. static int is_empty_shadow_page(u64 *spt)
  448. {
  449. u64 *pos;
  450. u64 *end;
  451. for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
  452. if ((*pos & ~PT_SHADOW_IO_MARK) != shadow_trap_nonpresent_pte) {
  453. printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
  454. pos, *pos);
  455. return 0;
  456. }
  457. return 1;
  458. }
  459. #endif
  460. static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  461. {
  462. ASSERT(is_empty_shadow_page(sp->spt));
  463. list_del(&sp->link);
  464. __free_page(virt_to_page(sp->spt));
  465. __free_page(virt_to_page(sp->gfns));
  466. kfree(sp);
  467. ++kvm->n_free_mmu_pages;
  468. }
  469. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  470. {
  471. return gfn;
  472. }
  473. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  474. u64 *parent_pte)
  475. {
  476. struct kvm_mmu_page *sp;
  477. if (!vcpu->kvm->n_free_mmu_pages)
  478. return NULL;
  479. sp = mmu_memory_cache_alloc(&vcpu->mmu_page_header_cache, sizeof *sp);
  480. sp->spt = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
  481. sp->gfns = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
  482. set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
  483. list_add(&sp->link, &vcpu->kvm->active_mmu_pages);
  484. ASSERT(is_empty_shadow_page(sp->spt));
  485. sp->slot_bitmap = 0;
  486. sp->multimapped = 0;
  487. sp->parent_pte = parent_pte;
  488. --vcpu->kvm->n_free_mmu_pages;
  489. return sp;
  490. }
  491. static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
  492. struct kvm_mmu_page *sp, u64 *parent_pte)
  493. {
  494. struct kvm_pte_chain *pte_chain;
  495. struct hlist_node *node;
  496. int i;
  497. if (!parent_pte)
  498. return;
  499. if (!sp->multimapped) {
  500. u64 *old = sp->parent_pte;
  501. if (!old) {
  502. sp->parent_pte = parent_pte;
  503. return;
  504. }
  505. sp->multimapped = 1;
  506. pte_chain = mmu_alloc_pte_chain(vcpu);
  507. INIT_HLIST_HEAD(&sp->parent_ptes);
  508. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  509. pte_chain->parent_ptes[0] = old;
  510. }
  511. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
  512. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  513. continue;
  514. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  515. if (!pte_chain->parent_ptes[i]) {
  516. pte_chain->parent_ptes[i] = parent_pte;
  517. return;
  518. }
  519. }
  520. pte_chain = mmu_alloc_pte_chain(vcpu);
  521. BUG_ON(!pte_chain);
  522. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  523. pte_chain->parent_ptes[0] = parent_pte;
  524. }
  525. static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
  526. u64 *parent_pte)
  527. {
  528. struct kvm_pte_chain *pte_chain;
  529. struct hlist_node *node;
  530. int i;
  531. if (!sp->multimapped) {
  532. BUG_ON(sp->parent_pte != parent_pte);
  533. sp->parent_pte = NULL;
  534. return;
  535. }
  536. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  537. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  538. if (!pte_chain->parent_ptes[i])
  539. break;
  540. if (pte_chain->parent_ptes[i] != parent_pte)
  541. continue;
  542. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  543. && pte_chain->parent_ptes[i + 1]) {
  544. pte_chain->parent_ptes[i]
  545. = pte_chain->parent_ptes[i + 1];
  546. ++i;
  547. }
  548. pte_chain->parent_ptes[i] = NULL;
  549. if (i == 0) {
  550. hlist_del(&pte_chain->link);
  551. mmu_free_pte_chain(pte_chain);
  552. if (hlist_empty(&sp->parent_ptes)) {
  553. sp->multimapped = 0;
  554. sp->parent_pte = NULL;
  555. }
  556. }
  557. return;
  558. }
  559. BUG();
  560. }
  561. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
  562. {
  563. unsigned index;
  564. struct hlist_head *bucket;
  565. struct kvm_mmu_page *sp;
  566. struct hlist_node *node;
  567. pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
  568. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  569. bucket = &kvm->mmu_page_hash[index];
  570. hlist_for_each_entry(sp, node, bucket, hash_link)
  571. if (sp->gfn == gfn && !sp->role.metaphysical) {
  572. pgprintk("%s: found role %x\n",
  573. __FUNCTION__, sp->role.word);
  574. return sp;
  575. }
  576. return NULL;
  577. }
  578. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  579. gfn_t gfn,
  580. gva_t gaddr,
  581. unsigned level,
  582. int metaphysical,
  583. unsigned access,
  584. u64 *parent_pte)
  585. {
  586. union kvm_mmu_page_role role;
  587. unsigned index;
  588. unsigned quadrant;
  589. struct hlist_head *bucket;
  590. struct kvm_mmu_page *sp;
  591. struct hlist_node *node;
  592. role.word = 0;
  593. role.glevels = vcpu->mmu.root_level;
  594. role.level = level;
  595. role.metaphysical = metaphysical;
  596. role.access = access;
  597. if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
  598. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  599. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  600. role.quadrant = quadrant;
  601. }
  602. pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
  603. gfn, role.word);
  604. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  605. bucket = &vcpu->kvm->mmu_page_hash[index];
  606. hlist_for_each_entry(sp, node, bucket, hash_link)
  607. if (sp->gfn == gfn && sp->role.word == role.word) {
  608. mmu_page_add_parent_pte(vcpu, sp, parent_pte);
  609. pgprintk("%s: found\n", __FUNCTION__);
  610. return sp;
  611. }
  612. sp = kvm_mmu_alloc_page(vcpu, parent_pte);
  613. if (!sp)
  614. return sp;
  615. pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
  616. sp->gfn = gfn;
  617. sp->role = role;
  618. hlist_add_head(&sp->hash_link, bucket);
  619. vcpu->mmu.prefetch_page(vcpu, sp);
  620. if (!metaphysical)
  621. rmap_write_protect(vcpu->kvm, gfn);
  622. return sp;
  623. }
  624. static void kvm_mmu_page_unlink_children(struct kvm *kvm,
  625. struct kvm_mmu_page *sp)
  626. {
  627. unsigned i;
  628. u64 *pt;
  629. u64 ent;
  630. pt = sp->spt;
  631. if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
  632. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  633. if (is_shadow_present_pte(pt[i]))
  634. rmap_remove(kvm, &pt[i]);
  635. pt[i] = shadow_trap_nonpresent_pte;
  636. }
  637. kvm_flush_remote_tlbs(kvm);
  638. return;
  639. }
  640. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  641. ent = pt[i];
  642. pt[i] = shadow_trap_nonpresent_pte;
  643. if (!is_shadow_present_pte(ent))
  644. continue;
  645. ent &= PT64_BASE_ADDR_MASK;
  646. mmu_page_remove_parent_pte(page_header(ent), &pt[i]);
  647. }
  648. kvm_flush_remote_tlbs(kvm);
  649. }
  650. static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
  651. {
  652. mmu_page_remove_parent_pte(sp, parent_pte);
  653. }
  654. static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
  655. {
  656. int i;
  657. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  658. if (kvm->vcpus[i])
  659. kvm->vcpus[i]->last_pte_updated = NULL;
  660. }
  661. static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  662. {
  663. u64 *parent_pte;
  664. ++kvm->stat.mmu_shadow_zapped;
  665. while (sp->multimapped || sp->parent_pte) {
  666. if (!sp->multimapped)
  667. parent_pte = sp->parent_pte;
  668. else {
  669. struct kvm_pte_chain *chain;
  670. chain = container_of(sp->parent_ptes.first,
  671. struct kvm_pte_chain, link);
  672. parent_pte = chain->parent_ptes[0];
  673. }
  674. BUG_ON(!parent_pte);
  675. kvm_mmu_put_page(sp, parent_pte);
  676. set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
  677. }
  678. kvm_mmu_page_unlink_children(kvm, sp);
  679. if (!sp->root_count) {
  680. hlist_del(&sp->hash_link);
  681. kvm_mmu_free_page(kvm, sp);
  682. } else
  683. list_move(&sp->link, &kvm->active_mmu_pages);
  684. kvm_mmu_reset_last_pte_updated(kvm);
  685. }
  686. /*
  687. * Changing the number of mmu pages allocated to the vm
  688. * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
  689. */
  690. void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
  691. {
  692. /*
  693. * If we set the number of mmu pages to be smaller be than the
  694. * number of actived pages , we must to free some mmu pages before we
  695. * change the value
  696. */
  697. if ((kvm->n_alloc_mmu_pages - kvm->n_free_mmu_pages) >
  698. kvm_nr_mmu_pages) {
  699. int n_used_mmu_pages = kvm->n_alloc_mmu_pages
  700. - kvm->n_free_mmu_pages;
  701. while (n_used_mmu_pages > kvm_nr_mmu_pages) {
  702. struct kvm_mmu_page *page;
  703. page = container_of(kvm->active_mmu_pages.prev,
  704. struct kvm_mmu_page, link);
  705. kvm_mmu_zap_page(kvm, page);
  706. n_used_mmu_pages--;
  707. }
  708. kvm->n_free_mmu_pages = 0;
  709. }
  710. else
  711. kvm->n_free_mmu_pages += kvm_nr_mmu_pages
  712. - kvm->n_alloc_mmu_pages;
  713. kvm->n_alloc_mmu_pages = kvm_nr_mmu_pages;
  714. }
  715. static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
  716. {
  717. unsigned index;
  718. struct hlist_head *bucket;
  719. struct kvm_mmu_page *sp;
  720. struct hlist_node *node, *n;
  721. int r;
  722. pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
  723. r = 0;
  724. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  725. bucket = &kvm->mmu_page_hash[index];
  726. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
  727. if (sp->gfn == gfn && !sp->role.metaphysical) {
  728. pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
  729. sp->role.word);
  730. kvm_mmu_zap_page(kvm, sp);
  731. r = 1;
  732. }
  733. return r;
  734. }
  735. static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
  736. {
  737. struct kvm_mmu_page *sp;
  738. while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
  739. pgprintk("%s: zap %lx %x\n", __FUNCTION__, gfn, sp->role.word);
  740. kvm_mmu_zap_page(kvm, sp);
  741. }
  742. }
  743. static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
  744. {
  745. int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
  746. struct kvm_mmu_page *sp = page_header(__pa(pte));
  747. __set_bit(slot, &sp->slot_bitmap);
  748. }
  749. struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
  750. {
  751. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  752. if (gpa == UNMAPPED_GVA)
  753. return NULL;
  754. return gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  755. }
  756. static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
  757. unsigned pt_access, unsigned pte_access,
  758. int user_fault, int write_fault, int dirty,
  759. int *ptwrite, gfn_t gfn)
  760. {
  761. u64 spte;
  762. int was_rmapped = is_rmap_pte(*shadow_pte);
  763. struct page *page;
  764. pgprintk("%s: spte %llx access %x write_fault %d"
  765. " user_fault %d gfn %lx\n",
  766. __FUNCTION__, *shadow_pte, pt_access,
  767. write_fault, user_fault, gfn);
  768. /*
  769. * We don't set the accessed bit, since we sometimes want to see
  770. * whether the guest actually used the pte (in order to detect
  771. * demand paging).
  772. */
  773. spte = PT_PRESENT_MASK | PT_DIRTY_MASK;
  774. if (!dirty)
  775. pte_access &= ~ACC_WRITE_MASK;
  776. if (!(pte_access & ACC_EXEC_MASK))
  777. spte |= PT64_NX_MASK;
  778. page = gfn_to_page(vcpu->kvm, gfn);
  779. spte |= PT_PRESENT_MASK;
  780. if (pte_access & ACC_USER_MASK)
  781. spte |= PT_USER_MASK;
  782. if (is_error_page(page)) {
  783. set_shadow_pte(shadow_pte,
  784. shadow_trap_nonpresent_pte | PT_SHADOW_IO_MARK);
  785. kvm_release_page_clean(page);
  786. return;
  787. }
  788. spte |= page_to_phys(page);
  789. if ((pte_access & ACC_WRITE_MASK)
  790. || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
  791. struct kvm_mmu_page *shadow;
  792. spte |= PT_WRITABLE_MASK;
  793. if (user_fault) {
  794. mmu_unshadow(vcpu->kvm, gfn);
  795. goto unshadowed;
  796. }
  797. shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
  798. if (shadow) {
  799. pgprintk("%s: found shadow page for %lx, marking ro\n",
  800. __FUNCTION__, gfn);
  801. pte_access &= ~ACC_WRITE_MASK;
  802. if (is_writeble_pte(spte)) {
  803. spte &= ~PT_WRITABLE_MASK;
  804. kvm_x86_ops->tlb_flush(vcpu);
  805. }
  806. if (write_fault)
  807. *ptwrite = 1;
  808. }
  809. }
  810. unshadowed:
  811. if (pte_access & ACC_WRITE_MASK)
  812. mark_page_dirty(vcpu->kvm, gfn);
  813. pgprintk("%s: setting spte %llx\n", __FUNCTION__, spte);
  814. set_shadow_pte(shadow_pte, spte);
  815. page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
  816. if (!was_rmapped) {
  817. rmap_add(vcpu, shadow_pte, gfn);
  818. if (!is_rmap_pte(*shadow_pte))
  819. kvm_release_page_clean(page);
  820. }
  821. else
  822. kvm_release_page_clean(page);
  823. if (!ptwrite || !*ptwrite)
  824. vcpu->last_pte_updated = shadow_pte;
  825. }
  826. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  827. {
  828. }
  829. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
  830. {
  831. int level = PT32E_ROOT_LEVEL;
  832. hpa_t table_addr = vcpu->mmu.root_hpa;
  833. int pt_write = 0;
  834. for (; ; level--) {
  835. u32 index = PT64_INDEX(v, level);
  836. u64 *table;
  837. ASSERT(VALID_PAGE(table_addr));
  838. table = __va(table_addr);
  839. if (level == 1) {
  840. mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL,
  841. 0, write, 1, &pt_write, gfn);
  842. return pt_write || is_io_pte(table[index]);
  843. }
  844. if (table[index] == shadow_trap_nonpresent_pte) {
  845. struct kvm_mmu_page *new_table;
  846. gfn_t pseudo_gfn;
  847. pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
  848. >> PAGE_SHIFT;
  849. new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
  850. v, level - 1,
  851. 1, ACC_ALL, &table[index]);
  852. if (!new_table) {
  853. pgprintk("nonpaging_map: ENOMEM\n");
  854. return -ENOMEM;
  855. }
  856. table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
  857. | PT_WRITABLE_MASK | PT_USER_MASK;
  858. }
  859. table_addr = table[index] & PT64_BASE_ADDR_MASK;
  860. }
  861. }
  862. static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
  863. struct kvm_mmu_page *sp)
  864. {
  865. int i;
  866. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  867. sp->spt[i] = shadow_trap_nonpresent_pte;
  868. }
  869. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  870. {
  871. int i;
  872. struct kvm_mmu_page *sp;
  873. if (!VALID_PAGE(vcpu->mmu.root_hpa))
  874. return;
  875. #ifdef CONFIG_X86_64
  876. if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  877. hpa_t root = vcpu->mmu.root_hpa;
  878. sp = page_header(root);
  879. --sp->root_count;
  880. vcpu->mmu.root_hpa = INVALID_PAGE;
  881. return;
  882. }
  883. #endif
  884. for (i = 0; i < 4; ++i) {
  885. hpa_t root = vcpu->mmu.pae_root[i];
  886. if (root) {
  887. root &= PT64_BASE_ADDR_MASK;
  888. sp = page_header(root);
  889. --sp->root_count;
  890. }
  891. vcpu->mmu.pae_root[i] = INVALID_PAGE;
  892. }
  893. vcpu->mmu.root_hpa = INVALID_PAGE;
  894. }
  895. static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
  896. {
  897. int i;
  898. gfn_t root_gfn;
  899. struct kvm_mmu_page *sp;
  900. root_gfn = vcpu->cr3 >> PAGE_SHIFT;
  901. #ifdef CONFIG_X86_64
  902. if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  903. hpa_t root = vcpu->mmu.root_hpa;
  904. ASSERT(!VALID_PAGE(root));
  905. sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
  906. PT64_ROOT_LEVEL, 0, ACC_ALL, NULL);
  907. root = __pa(sp->spt);
  908. ++sp->root_count;
  909. vcpu->mmu.root_hpa = root;
  910. return;
  911. }
  912. #endif
  913. for (i = 0; i < 4; ++i) {
  914. hpa_t root = vcpu->mmu.pae_root[i];
  915. ASSERT(!VALID_PAGE(root));
  916. if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) {
  917. if (!is_present_pte(vcpu->pdptrs[i])) {
  918. vcpu->mmu.pae_root[i] = 0;
  919. continue;
  920. }
  921. root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
  922. } else if (vcpu->mmu.root_level == 0)
  923. root_gfn = 0;
  924. sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  925. PT32_ROOT_LEVEL, !is_paging(vcpu),
  926. ACC_ALL, NULL);
  927. root = __pa(sp->spt);
  928. ++sp->root_count;
  929. vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
  930. }
  931. vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
  932. }
  933. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
  934. {
  935. return vaddr;
  936. }
  937. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  938. u32 error_code)
  939. {
  940. gfn_t gfn;
  941. int r;
  942. pgprintk("%s: gva %lx error %x\n", __FUNCTION__, gva, error_code);
  943. r = mmu_topup_memory_caches(vcpu);
  944. if (r)
  945. return r;
  946. ASSERT(vcpu);
  947. ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
  948. gfn = gva >> PAGE_SHIFT;
  949. return nonpaging_map(vcpu, gva & PAGE_MASK,
  950. error_code & PFERR_WRITE_MASK, gfn);
  951. }
  952. static void nonpaging_free(struct kvm_vcpu *vcpu)
  953. {
  954. mmu_free_roots(vcpu);
  955. }
  956. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  957. {
  958. struct kvm_mmu *context = &vcpu->mmu;
  959. context->new_cr3 = nonpaging_new_cr3;
  960. context->page_fault = nonpaging_page_fault;
  961. context->gva_to_gpa = nonpaging_gva_to_gpa;
  962. context->free = nonpaging_free;
  963. context->prefetch_page = nonpaging_prefetch_page;
  964. context->root_level = 0;
  965. context->shadow_root_level = PT32E_ROOT_LEVEL;
  966. context->root_hpa = INVALID_PAGE;
  967. return 0;
  968. }
  969. void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  970. {
  971. ++vcpu->stat.tlb_flush;
  972. kvm_x86_ops->tlb_flush(vcpu);
  973. }
  974. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  975. {
  976. pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
  977. mmu_free_roots(vcpu);
  978. }
  979. static void inject_page_fault(struct kvm_vcpu *vcpu,
  980. u64 addr,
  981. u32 err_code)
  982. {
  983. kvm_inject_page_fault(vcpu, addr, err_code);
  984. }
  985. static void paging_free(struct kvm_vcpu *vcpu)
  986. {
  987. nonpaging_free(vcpu);
  988. }
  989. #define PTTYPE 64
  990. #include "paging_tmpl.h"
  991. #undef PTTYPE
  992. #define PTTYPE 32
  993. #include "paging_tmpl.h"
  994. #undef PTTYPE
  995. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  996. {
  997. struct kvm_mmu *context = &vcpu->mmu;
  998. ASSERT(is_pae(vcpu));
  999. context->new_cr3 = paging_new_cr3;
  1000. context->page_fault = paging64_page_fault;
  1001. context->gva_to_gpa = paging64_gva_to_gpa;
  1002. context->prefetch_page = paging64_prefetch_page;
  1003. context->free = paging_free;
  1004. context->root_level = level;
  1005. context->shadow_root_level = level;
  1006. context->root_hpa = INVALID_PAGE;
  1007. return 0;
  1008. }
  1009. static int paging64_init_context(struct kvm_vcpu *vcpu)
  1010. {
  1011. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  1012. }
  1013. static int paging32_init_context(struct kvm_vcpu *vcpu)
  1014. {
  1015. struct kvm_mmu *context = &vcpu->mmu;
  1016. context->new_cr3 = paging_new_cr3;
  1017. context->page_fault = paging32_page_fault;
  1018. context->gva_to_gpa = paging32_gva_to_gpa;
  1019. context->free = paging_free;
  1020. context->prefetch_page = paging32_prefetch_page;
  1021. context->root_level = PT32_ROOT_LEVEL;
  1022. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1023. context->root_hpa = INVALID_PAGE;
  1024. return 0;
  1025. }
  1026. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  1027. {
  1028. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  1029. }
  1030. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  1031. {
  1032. ASSERT(vcpu);
  1033. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  1034. if (!is_paging(vcpu))
  1035. return nonpaging_init_context(vcpu);
  1036. else if (is_long_mode(vcpu))
  1037. return paging64_init_context(vcpu);
  1038. else if (is_pae(vcpu))
  1039. return paging32E_init_context(vcpu);
  1040. else
  1041. return paging32_init_context(vcpu);
  1042. }
  1043. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  1044. {
  1045. ASSERT(vcpu);
  1046. if (VALID_PAGE(vcpu->mmu.root_hpa)) {
  1047. vcpu->mmu.free(vcpu);
  1048. vcpu->mmu.root_hpa = INVALID_PAGE;
  1049. }
  1050. }
  1051. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  1052. {
  1053. destroy_kvm_mmu(vcpu);
  1054. return init_kvm_mmu(vcpu);
  1055. }
  1056. EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
  1057. int kvm_mmu_load(struct kvm_vcpu *vcpu)
  1058. {
  1059. int r;
  1060. mutex_lock(&vcpu->kvm->lock);
  1061. r = mmu_topup_memory_caches(vcpu);
  1062. if (r)
  1063. goto out;
  1064. mmu_alloc_roots(vcpu);
  1065. kvm_x86_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
  1066. kvm_mmu_flush_tlb(vcpu);
  1067. out:
  1068. mutex_unlock(&vcpu->kvm->lock);
  1069. return r;
  1070. }
  1071. EXPORT_SYMBOL_GPL(kvm_mmu_load);
  1072. void kvm_mmu_unload(struct kvm_vcpu *vcpu)
  1073. {
  1074. mmu_free_roots(vcpu);
  1075. }
  1076. static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
  1077. struct kvm_mmu_page *sp,
  1078. u64 *spte)
  1079. {
  1080. u64 pte;
  1081. struct kvm_mmu_page *child;
  1082. pte = *spte;
  1083. if (is_shadow_present_pte(pte)) {
  1084. if (sp->role.level == PT_PAGE_TABLE_LEVEL)
  1085. rmap_remove(vcpu->kvm, spte);
  1086. else {
  1087. child = page_header(pte & PT64_BASE_ADDR_MASK);
  1088. mmu_page_remove_parent_pte(child, spte);
  1089. }
  1090. }
  1091. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  1092. }
  1093. static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
  1094. struct kvm_mmu_page *sp,
  1095. u64 *spte,
  1096. const void *new, int bytes,
  1097. int offset_in_pte)
  1098. {
  1099. if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
  1100. ++vcpu->kvm->stat.mmu_pde_zapped;
  1101. return;
  1102. }
  1103. ++vcpu->kvm->stat.mmu_pte_updated;
  1104. if (sp->role.glevels == PT32_ROOT_LEVEL)
  1105. paging32_update_pte(vcpu, sp, spte, new, bytes, offset_in_pte);
  1106. else
  1107. paging64_update_pte(vcpu, sp, spte, new, bytes, offset_in_pte);
  1108. }
  1109. static bool need_remote_flush(u64 old, u64 new)
  1110. {
  1111. if (!is_shadow_present_pte(old))
  1112. return false;
  1113. if (!is_shadow_present_pte(new))
  1114. return true;
  1115. if ((old ^ new) & PT64_BASE_ADDR_MASK)
  1116. return true;
  1117. old ^= PT64_NX_MASK;
  1118. new ^= PT64_NX_MASK;
  1119. return (old & ~new & PT64_PERM_MASK) != 0;
  1120. }
  1121. static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
  1122. {
  1123. if (need_remote_flush(old, new))
  1124. kvm_flush_remote_tlbs(vcpu->kvm);
  1125. else
  1126. kvm_mmu_flush_tlb(vcpu);
  1127. }
  1128. static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
  1129. {
  1130. u64 *spte = vcpu->last_pte_updated;
  1131. return !!(spte && (*spte & PT_ACCESSED_MASK));
  1132. }
  1133. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  1134. const u8 *new, int bytes)
  1135. {
  1136. gfn_t gfn = gpa >> PAGE_SHIFT;
  1137. struct kvm_mmu_page *sp;
  1138. struct hlist_node *node, *n;
  1139. struct hlist_head *bucket;
  1140. unsigned index;
  1141. u64 entry;
  1142. u64 *spte;
  1143. unsigned offset = offset_in_page(gpa);
  1144. unsigned pte_size;
  1145. unsigned page_offset;
  1146. unsigned misaligned;
  1147. unsigned quadrant;
  1148. int level;
  1149. int flooded = 0;
  1150. int npte;
  1151. pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
  1152. ++vcpu->kvm->stat.mmu_pte_write;
  1153. kvm_mmu_audit(vcpu, "pre pte write");
  1154. if (gfn == vcpu->last_pt_write_gfn
  1155. && !last_updated_pte_accessed(vcpu)) {
  1156. ++vcpu->last_pt_write_count;
  1157. if (vcpu->last_pt_write_count >= 3)
  1158. flooded = 1;
  1159. } else {
  1160. vcpu->last_pt_write_gfn = gfn;
  1161. vcpu->last_pt_write_count = 1;
  1162. vcpu->last_pte_updated = NULL;
  1163. }
  1164. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  1165. bucket = &vcpu->kvm->mmu_page_hash[index];
  1166. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
  1167. if (sp->gfn != gfn || sp->role.metaphysical)
  1168. continue;
  1169. pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
  1170. misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
  1171. misaligned |= bytes < 4;
  1172. if (misaligned || flooded) {
  1173. /*
  1174. * Misaligned accesses are too much trouble to fix
  1175. * up; also, they usually indicate a page is not used
  1176. * as a page table.
  1177. *
  1178. * If we're seeing too many writes to a page,
  1179. * it may no longer be a page table, or we may be
  1180. * forking, in which case it is better to unmap the
  1181. * page.
  1182. */
  1183. pgprintk("misaligned: gpa %llx bytes %d role %x\n",
  1184. gpa, bytes, sp->role.word);
  1185. kvm_mmu_zap_page(vcpu->kvm, sp);
  1186. ++vcpu->kvm->stat.mmu_flooded;
  1187. continue;
  1188. }
  1189. page_offset = offset;
  1190. level = sp->role.level;
  1191. npte = 1;
  1192. if (sp->role.glevels == PT32_ROOT_LEVEL) {
  1193. page_offset <<= 1; /* 32->64 */
  1194. /*
  1195. * A 32-bit pde maps 4MB while the shadow pdes map
  1196. * only 2MB. So we need to double the offset again
  1197. * and zap two pdes instead of one.
  1198. */
  1199. if (level == PT32_ROOT_LEVEL) {
  1200. page_offset &= ~7; /* kill rounding error */
  1201. page_offset <<= 1;
  1202. npte = 2;
  1203. }
  1204. quadrant = page_offset >> PAGE_SHIFT;
  1205. page_offset &= ~PAGE_MASK;
  1206. if (quadrant != sp->role.quadrant)
  1207. continue;
  1208. }
  1209. spte = &sp->spt[page_offset / sizeof(*spte)];
  1210. while (npte--) {
  1211. entry = *spte;
  1212. mmu_pte_write_zap_pte(vcpu, sp, spte);
  1213. mmu_pte_write_new_pte(vcpu, sp, spte, new, bytes,
  1214. page_offset & (pte_size - 1));
  1215. mmu_pte_write_flush_tlb(vcpu, entry, *spte);
  1216. ++spte;
  1217. }
  1218. }
  1219. kvm_mmu_audit(vcpu, "post pte write");
  1220. }
  1221. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  1222. {
  1223. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  1224. return kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1225. }
  1226. void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  1227. {
  1228. while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
  1229. struct kvm_mmu_page *sp;
  1230. sp = container_of(vcpu->kvm->active_mmu_pages.prev,
  1231. struct kvm_mmu_page, link);
  1232. kvm_mmu_zap_page(vcpu->kvm, sp);
  1233. ++vcpu->kvm->stat.mmu_recycled;
  1234. }
  1235. }
  1236. int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
  1237. {
  1238. int r;
  1239. enum emulation_result er;
  1240. mutex_lock(&vcpu->kvm->lock);
  1241. r = vcpu->mmu.page_fault(vcpu, cr2, error_code);
  1242. if (r < 0)
  1243. goto out;
  1244. if (!r) {
  1245. r = 1;
  1246. goto out;
  1247. }
  1248. r = mmu_topup_memory_caches(vcpu);
  1249. if (r)
  1250. goto out;
  1251. er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
  1252. mutex_unlock(&vcpu->kvm->lock);
  1253. switch (er) {
  1254. case EMULATE_DONE:
  1255. return 1;
  1256. case EMULATE_DO_MMIO:
  1257. ++vcpu->stat.mmio_exits;
  1258. return 0;
  1259. case EMULATE_FAIL:
  1260. kvm_report_emulation_failure(vcpu, "pagetable");
  1261. return 1;
  1262. default:
  1263. BUG();
  1264. }
  1265. out:
  1266. mutex_unlock(&vcpu->kvm->lock);
  1267. return r;
  1268. }
  1269. EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
  1270. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  1271. {
  1272. struct kvm_mmu_page *sp;
  1273. while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
  1274. sp = container_of(vcpu->kvm->active_mmu_pages.next,
  1275. struct kvm_mmu_page, link);
  1276. kvm_mmu_zap_page(vcpu->kvm, sp);
  1277. }
  1278. free_page((unsigned long)vcpu->mmu.pae_root);
  1279. }
  1280. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  1281. {
  1282. struct page *page;
  1283. int i;
  1284. ASSERT(vcpu);
  1285. if (vcpu->kvm->n_requested_mmu_pages)
  1286. vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_requested_mmu_pages;
  1287. else
  1288. vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_alloc_mmu_pages;
  1289. /*
  1290. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  1291. * Therefore we need to allocate shadow page tables in the first
  1292. * 4GB of memory, which happens to fit the DMA32 zone.
  1293. */
  1294. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  1295. if (!page)
  1296. goto error_1;
  1297. vcpu->mmu.pae_root = page_address(page);
  1298. for (i = 0; i < 4; ++i)
  1299. vcpu->mmu.pae_root[i] = INVALID_PAGE;
  1300. return 0;
  1301. error_1:
  1302. free_mmu_pages(vcpu);
  1303. return -ENOMEM;
  1304. }
  1305. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  1306. {
  1307. ASSERT(vcpu);
  1308. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  1309. return alloc_mmu_pages(vcpu);
  1310. }
  1311. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  1312. {
  1313. ASSERT(vcpu);
  1314. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  1315. return init_kvm_mmu(vcpu);
  1316. }
  1317. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  1318. {
  1319. ASSERT(vcpu);
  1320. destroy_kvm_mmu(vcpu);
  1321. free_mmu_pages(vcpu);
  1322. mmu_free_memory_caches(vcpu);
  1323. }
  1324. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
  1325. {
  1326. struct kvm_mmu_page *sp;
  1327. list_for_each_entry(sp, &kvm->active_mmu_pages, link) {
  1328. int i;
  1329. u64 *pt;
  1330. if (!test_bit(slot, &sp->slot_bitmap))
  1331. continue;
  1332. pt = sp->spt;
  1333. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  1334. /* avoid RMW */
  1335. if (pt[i] & PT_WRITABLE_MASK)
  1336. pt[i] &= ~PT_WRITABLE_MASK;
  1337. }
  1338. }
  1339. void kvm_mmu_zap_all(struct kvm *kvm)
  1340. {
  1341. struct kvm_mmu_page *sp, *node;
  1342. list_for_each_entry_safe(sp, node, &kvm->active_mmu_pages, link)
  1343. kvm_mmu_zap_page(kvm, sp);
  1344. kvm_flush_remote_tlbs(kvm);
  1345. }
  1346. void kvm_mmu_module_exit(void)
  1347. {
  1348. if (pte_chain_cache)
  1349. kmem_cache_destroy(pte_chain_cache);
  1350. if (rmap_desc_cache)
  1351. kmem_cache_destroy(rmap_desc_cache);
  1352. if (mmu_page_header_cache)
  1353. kmem_cache_destroy(mmu_page_header_cache);
  1354. }
  1355. int kvm_mmu_module_init(void)
  1356. {
  1357. pte_chain_cache = kmem_cache_create("kvm_pte_chain",
  1358. sizeof(struct kvm_pte_chain),
  1359. 0, 0, NULL);
  1360. if (!pte_chain_cache)
  1361. goto nomem;
  1362. rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
  1363. sizeof(struct kvm_rmap_desc),
  1364. 0, 0, NULL);
  1365. if (!rmap_desc_cache)
  1366. goto nomem;
  1367. mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
  1368. sizeof(struct kvm_mmu_page),
  1369. 0, 0, NULL);
  1370. if (!mmu_page_header_cache)
  1371. goto nomem;
  1372. return 0;
  1373. nomem:
  1374. kvm_mmu_module_exit();
  1375. return -ENOMEM;
  1376. }
  1377. /*
  1378. * Caculate mmu pages needed for kvm.
  1379. */
  1380. unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
  1381. {
  1382. int i;
  1383. unsigned int nr_mmu_pages;
  1384. unsigned int nr_pages = 0;
  1385. for (i = 0; i < kvm->nmemslots; i++)
  1386. nr_pages += kvm->memslots[i].npages;
  1387. nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
  1388. nr_mmu_pages = max(nr_mmu_pages,
  1389. (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
  1390. return nr_mmu_pages;
  1391. }
  1392. #ifdef AUDIT
  1393. static const char *audit_msg;
  1394. static gva_t canonicalize(gva_t gva)
  1395. {
  1396. #ifdef CONFIG_X86_64
  1397. gva = (long long)(gva << 16) >> 16;
  1398. #endif
  1399. return gva;
  1400. }
  1401. static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
  1402. gva_t va, int level)
  1403. {
  1404. u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
  1405. int i;
  1406. gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
  1407. for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
  1408. u64 ent = pt[i];
  1409. if (ent == shadow_trap_nonpresent_pte)
  1410. continue;
  1411. va = canonicalize(va);
  1412. if (level > 1) {
  1413. if (ent == shadow_notrap_nonpresent_pte)
  1414. printk(KERN_ERR "audit: (%s) nontrapping pte"
  1415. " in nonleaf level: levels %d gva %lx"
  1416. " level %d pte %llx\n", audit_msg,
  1417. vcpu->mmu.root_level, va, level, ent);
  1418. audit_mappings_page(vcpu, ent, va, level - 1);
  1419. } else {
  1420. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
  1421. struct page *page = gpa_to_page(vcpu, gpa);
  1422. hpa_t hpa = page_to_phys(page);
  1423. if (is_shadow_present_pte(ent)
  1424. && (ent & PT64_BASE_ADDR_MASK) != hpa)
  1425. printk(KERN_ERR "xx audit error: (%s) levels %d"
  1426. " gva %lx gpa %llx hpa %llx ent %llx %d\n",
  1427. audit_msg, vcpu->mmu.root_level,
  1428. va, gpa, hpa, ent,
  1429. is_shadow_present_pte(ent));
  1430. else if (ent == shadow_notrap_nonpresent_pte
  1431. && !is_error_hpa(hpa))
  1432. printk(KERN_ERR "audit: (%s) notrap shadow,"
  1433. " valid guest gva %lx\n", audit_msg, va);
  1434. kvm_release_page_clean(page);
  1435. }
  1436. }
  1437. }
  1438. static void audit_mappings(struct kvm_vcpu *vcpu)
  1439. {
  1440. unsigned i;
  1441. if (vcpu->mmu.root_level == 4)
  1442. audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
  1443. else
  1444. for (i = 0; i < 4; ++i)
  1445. if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
  1446. audit_mappings_page(vcpu,
  1447. vcpu->mmu.pae_root[i],
  1448. i << 30,
  1449. 2);
  1450. }
  1451. static int count_rmaps(struct kvm_vcpu *vcpu)
  1452. {
  1453. int nmaps = 0;
  1454. int i, j, k;
  1455. for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
  1456. struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
  1457. struct kvm_rmap_desc *d;
  1458. for (j = 0; j < m->npages; ++j) {
  1459. unsigned long *rmapp = &m->rmap[j];
  1460. if (!*rmapp)
  1461. continue;
  1462. if (!(*rmapp & 1)) {
  1463. ++nmaps;
  1464. continue;
  1465. }
  1466. d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  1467. while (d) {
  1468. for (k = 0; k < RMAP_EXT; ++k)
  1469. if (d->shadow_ptes[k])
  1470. ++nmaps;
  1471. else
  1472. break;
  1473. d = d->more;
  1474. }
  1475. }
  1476. }
  1477. return nmaps;
  1478. }
  1479. static int count_writable_mappings(struct kvm_vcpu *vcpu)
  1480. {
  1481. int nmaps = 0;
  1482. struct kvm_mmu_page *sp;
  1483. int i;
  1484. list_for_each_entry(sp, &vcpu->kvm->active_mmu_pages, link) {
  1485. u64 *pt = sp->spt;
  1486. if (sp->role.level != PT_PAGE_TABLE_LEVEL)
  1487. continue;
  1488. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1489. u64 ent = pt[i];
  1490. if (!(ent & PT_PRESENT_MASK))
  1491. continue;
  1492. if (!(ent & PT_WRITABLE_MASK))
  1493. continue;
  1494. ++nmaps;
  1495. }
  1496. }
  1497. return nmaps;
  1498. }
  1499. static void audit_rmap(struct kvm_vcpu *vcpu)
  1500. {
  1501. int n_rmap = count_rmaps(vcpu);
  1502. int n_actual = count_writable_mappings(vcpu);
  1503. if (n_rmap != n_actual)
  1504. printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
  1505. __FUNCTION__, audit_msg, n_rmap, n_actual);
  1506. }
  1507. static void audit_write_protection(struct kvm_vcpu *vcpu)
  1508. {
  1509. struct kvm_mmu_page *sp;
  1510. struct kvm_memory_slot *slot;
  1511. unsigned long *rmapp;
  1512. gfn_t gfn;
  1513. list_for_each_entry(sp, &vcpu->kvm->active_mmu_pages, link) {
  1514. if (sp->role.metaphysical)
  1515. continue;
  1516. slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
  1517. gfn = unalias_gfn(vcpu->kvm, sp->gfn);
  1518. rmapp = &slot->rmap[gfn - slot->base_gfn];
  1519. if (*rmapp)
  1520. printk(KERN_ERR "%s: (%s) shadow page has writable"
  1521. " mappings: gfn %lx role %x\n",
  1522. __FUNCTION__, audit_msg, sp->gfn,
  1523. sp->role.word);
  1524. }
  1525. }
  1526. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
  1527. {
  1528. int olddbg = dbg;
  1529. dbg = 0;
  1530. audit_msg = msg;
  1531. audit_rmap(vcpu);
  1532. audit_write_protection(vcpu);
  1533. audit_mappings(vcpu);
  1534. dbg = olddbg;
  1535. }
  1536. #endif