qla_init.c 120 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439444044414442444344444445444644474448444944504451445244534454445544564457445844594460446144624463446444654466446744684469447044714472447344744475447644774478447944804481448244834484448544864487448844894490449144924493449444954496449744984499450045014502450345044505450645074508450945104511451245134514451545164517451845194520452145224523452445254526452745284529453045314532453345344535453645374538453945404541454245434544454545464547454845494550455145524553455445554556455745584559456045614562456345644565456645674568456945704571457245734574457545764577457845794580
  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/vmalloc.h>
  11. #include "qla_devtbl.h"
  12. #ifdef CONFIG_SPARC
  13. #include <asm/prom.h>
  14. #endif
  15. /*
  16. * QLogic ISP2x00 Hardware Support Function Prototypes.
  17. */
  18. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  19. static int qla2x00_setup_chip(scsi_qla_host_t *);
  20. static int qla2x00_init_rings(scsi_qla_host_t *);
  21. static int qla2x00_fw_ready(scsi_qla_host_t *);
  22. static int qla2x00_configure_hba(scsi_qla_host_t *);
  23. static int qla2x00_configure_loop(scsi_qla_host_t *);
  24. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  26. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  27. static int qla2x00_device_resync(scsi_qla_host_t *);
  28. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  29. uint16_t *);
  30. static int qla2x00_restart_isp(scsi_qla_host_t *);
  31. static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *);
  32. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  33. static int qla84xx_init_chip(scsi_qla_host_t *);
  34. static int qla25xx_init_queues(struct qla_hw_data *);
  35. /****************************************************************************/
  36. /* QLogic ISP2x00 Hardware Support Functions. */
  37. /****************************************************************************/
  38. /*
  39. * qla2x00_initialize_adapter
  40. * Initialize board.
  41. *
  42. * Input:
  43. * ha = adapter block pointer.
  44. *
  45. * Returns:
  46. * 0 = success
  47. */
  48. int
  49. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  50. {
  51. int rval;
  52. struct qla_hw_data *ha = vha->hw;
  53. struct req_que *req = ha->req_q_map[0];
  54. /* Clear adapter flags. */
  55. vha->flags.online = 0;
  56. ha->flags.chip_reset_done = 0;
  57. vha->flags.reset_active = 0;
  58. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  59. atomic_set(&vha->loop_state, LOOP_DOWN);
  60. vha->device_flags = DFLG_NO_CABLE;
  61. vha->dpc_flags = 0;
  62. vha->flags.management_server_logged_in = 0;
  63. vha->marker_needed = 0;
  64. ha->isp_abort_cnt = 0;
  65. ha->beacon_blink_led = 0;
  66. set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
  67. set_bit(0, ha->req_qid_map);
  68. set_bit(0, ha->rsp_qid_map);
  69. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  70. rval = ha->isp_ops->pci_config(vha);
  71. if (rval) {
  72. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  73. vha->host_no));
  74. return (rval);
  75. }
  76. ha->isp_ops->reset_chip(vha);
  77. rval = qla2xxx_get_flash_info(vha);
  78. if (rval) {
  79. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  80. vha->host_no));
  81. return (rval);
  82. }
  83. ha->isp_ops->get_flash_version(vha, req->ring);
  84. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  85. ha->isp_ops->nvram_config(vha);
  86. if (ha->flags.disable_serdes) {
  87. /* Mask HBA via NVRAM settings? */
  88. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  89. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  90. vha->port_name[0], vha->port_name[1],
  91. vha->port_name[2], vha->port_name[3],
  92. vha->port_name[4], vha->port_name[5],
  93. vha->port_name[6], vha->port_name[7]);
  94. return QLA_FUNCTION_FAILED;
  95. }
  96. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  97. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  98. rval = ha->isp_ops->chip_diag(vha);
  99. if (rval)
  100. return (rval);
  101. rval = qla2x00_setup_chip(vha);
  102. if (rval)
  103. return (rval);
  104. }
  105. if (IS_QLA84XX(ha)) {
  106. ha->cs84xx = qla84xx_get_chip(vha);
  107. if (!ha->cs84xx) {
  108. qla_printk(KERN_ERR, ha,
  109. "Unable to configure ISP84XX.\n");
  110. return QLA_FUNCTION_FAILED;
  111. }
  112. }
  113. rval = qla2x00_init_rings(vha);
  114. ha->flags.chip_reset_done = 1;
  115. return (rval);
  116. }
  117. /**
  118. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  119. * @ha: HA context
  120. *
  121. * Returns 0 on success.
  122. */
  123. int
  124. qla2100_pci_config(scsi_qla_host_t *vha)
  125. {
  126. uint16_t w;
  127. unsigned long flags;
  128. struct qla_hw_data *ha = vha->hw;
  129. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  130. pci_set_master(ha->pdev);
  131. pci_try_set_mwi(ha->pdev);
  132. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  133. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  134. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  135. pci_disable_rom(ha->pdev);
  136. /* Get PCI bus information. */
  137. spin_lock_irqsave(&ha->hardware_lock, flags);
  138. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  139. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  140. return QLA_SUCCESS;
  141. }
  142. /**
  143. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  144. * @ha: HA context
  145. *
  146. * Returns 0 on success.
  147. */
  148. int
  149. qla2300_pci_config(scsi_qla_host_t *vha)
  150. {
  151. uint16_t w;
  152. unsigned long flags = 0;
  153. uint32_t cnt;
  154. struct qla_hw_data *ha = vha->hw;
  155. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  156. pci_set_master(ha->pdev);
  157. pci_try_set_mwi(ha->pdev);
  158. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  159. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  160. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  161. w &= ~PCI_COMMAND_INTX_DISABLE;
  162. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  163. /*
  164. * If this is a 2300 card and not 2312, reset the
  165. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  166. * the 2310 also reports itself as a 2300 so we need to get the
  167. * fb revision level -- a 6 indicates it really is a 2300 and
  168. * not a 2310.
  169. */
  170. if (IS_QLA2300(ha)) {
  171. spin_lock_irqsave(&ha->hardware_lock, flags);
  172. /* Pause RISC. */
  173. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  174. for (cnt = 0; cnt < 30000; cnt++) {
  175. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  176. break;
  177. udelay(10);
  178. }
  179. /* Select FPM registers. */
  180. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  181. RD_REG_WORD(&reg->ctrl_status);
  182. /* Get the fb rev level */
  183. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  184. if (ha->fb_rev == FPM_2300)
  185. pci_clear_mwi(ha->pdev);
  186. /* Deselect FPM registers. */
  187. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  188. RD_REG_WORD(&reg->ctrl_status);
  189. /* Release RISC module. */
  190. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  191. for (cnt = 0; cnt < 30000; cnt++) {
  192. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  193. break;
  194. udelay(10);
  195. }
  196. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  197. }
  198. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  199. pci_disable_rom(ha->pdev);
  200. /* Get PCI bus information. */
  201. spin_lock_irqsave(&ha->hardware_lock, flags);
  202. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  203. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  204. return QLA_SUCCESS;
  205. }
  206. /**
  207. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  208. * @ha: HA context
  209. *
  210. * Returns 0 on success.
  211. */
  212. int
  213. qla24xx_pci_config(scsi_qla_host_t *vha)
  214. {
  215. uint16_t w;
  216. unsigned long flags = 0;
  217. struct qla_hw_data *ha = vha->hw;
  218. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  219. pci_set_master(ha->pdev);
  220. pci_try_set_mwi(ha->pdev);
  221. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  222. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  223. w &= ~PCI_COMMAND_INTX_DISABLE;
  224. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  225. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  226. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  227. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  228. pcix_set_mmrbc(ha->pdev, 2048);
  229. /* PCIe -- adjust Maximum Read Request Size (2048). */
  230. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  231. pcie_set_readrq(ha->pdev, 2048);
  232. pci_disable_rom(ha->pdev);
  233. ha->chip_revision = ha->pdev->revision;
  234. /* Get PCI bus information. */
  235. spin_lock_irqsave(&ha->hardware_lock, flags);
  236. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  237. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  238. return QLA_SUCCESS;
  239. }
  240. /**
  241. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  242. * @ha: HA context
  243. *
  244. * Returns 0 on success.
  245. */
  246. int
  247. qla25xx_pci_config(scsi_qla_host_t *vha)
  248. {
  249. uint16_t w;
  250. struct qla_hw_data *ha = vha->hw;
  251. pci_set_master(ha->pdev);
  252. pci_try_set_mwi(ha->pdev);
  253. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  254. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  255. w &= ~PCI_COMMAND_INTX_DISABLE;
  256. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  257. /* PCIe -- adjust Maximum Read Request Size (2048). */
  258. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  259. pcie_set_readrq(ha->pdev, 2048);
  260. pci_disable_rom(ha->pdev);
  261. ha->chip_revision = ha->pdev->revision;
  262. return QLA_SUCCESS;
  263. }
  264. /**
  265. * qla2x00_isp_firmware() - Choose firmware image.
  266. * @ha: HA context
  267. *
  268. * Returns 0 on success.
  269. */
  270. static int
  271. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  272. {
  273. int rval;
  274. uint16_t loop_id, topo, sw_cap;
  275. uint8_t domain, area, al_pa;
  276. struct qla_hw_data *ha = vha->hw;
  277. /* Assume loading risc code */
  278. rval = QLA_FUNCTION_FAILED;
  279. if (ha->flags.disable_risc_code_load) {
  280. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  281. vha->host_no));
  282. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  283. /* Verify checksum of loaded RISC code. */
  284. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  285. if (rval == QLA_SUCCESS) {
  286. /* And, verify we are not in ROM code. */
  287. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  288. &area, &domain, &topo, &sw_cap);
  289. }
  290. }
  291. if (rval) {
  292. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  293. vha->host_no));
  294. }
  295. return (rval);
  296. }
  297. /**
  298. * qla2x00_reset_chip() - Reset ISP chip.
  299. * @ha: HA context
  300. *
  301. * Returns 0 on success.
  302. */
  303. void
  304. qla2x00_reset_chip(scsi_qla_host_t *vha)
  305. {
  306. unsigned long flags = 0;
  307. struct qla_hw_data *ha = vha->hw;
  308. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  309. uint32_t cnt;
  310. uint16_t cmd;
  311. ha->isp_ops->disable_intrs(ha);
  312. spin_lock_irqsave(&ha->hardware_lock, flags);
  313. /* Turn off master enable */
  314. cmd = 0;
  315. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  316. cmd &= ~PCI_COMMAND_MASTER;
  317. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  318. if (!IS_QLA2100(ha)) {
  319. /* Pause RISC. */
  320. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  321. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  322. for (cnt = 0; cnt < 30000; cnt++) {
  323. if ((RD_REG_WORD(&reg->hccr) &
  324. HCCR_RISC_PAUSE) != 0)
  325. break;
  326. udelay(100);
  327. }
  328. } else {
  329. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  330. udelay(10);
  331. }
  332. /* Select FPM registers. */
  333. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  334. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  335. /* FPM Soft Reset. */
  336. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  337. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  338. /* Toggle Fpm Reset. */
  339. if (!IS_QLA2200(ha)) {
  340. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  341. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  342. }
  343. /* Select frame buffer registers. */
  344. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  345. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  346. /* Reset frame buffer FIFOs. */
  347. if (IS_QLA2200(ha)) {
  348. WRT_FB_CMD_REG(ha, reg, 0xa000);
  349. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  350. } else {
  351. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  352. /* Read back fb_cmd until zero or 3 seconds max */
  353. for (cnt = 0; cnt < 3000; cnt++) {
  354. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  355. break;
  356. udelay(100);
  357. }
  358. }
  359. /* Select RISC module registers. */
  360. WRT_REG_WORD(&reg->ctrl_status, 0);
  361. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  362. /* Reset RISC processor. */
  363. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  364. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  365. /* Release RISC processor. */
  366. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  367. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  368. }
  369. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  370. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  371. /* Reset ISP chip. */
  372. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  373. /* Wait for RISC to recover from reset. */
  374. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  375. /*
  376. * It is necessary to for a delay here since the card doesn't
  377. * respond to PCI reads during a reset. On some architectures
  378. * this will result in an MCA.
  379. */
  380. udelay(20);
  381. for (cnt = 30000; cnt; cnt--) {
  382. if ((RD_REG_WORD(&reg->ctrl_status) &
  383. CSR_ISP_SOFT_RESET) == 0)
  384. break;
  385. udelay(100);
  386. }
  387. } else
  388. udelay(10);
  389. /* Reset RISC processor. */
  390. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  391. WRT_REG_WORD(&reg->semaphore, 0);
  392. /* Release RISC processor. */
  393. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  394. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  395. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  396. for (cnt = 0; cnt < 30000; cnt++) {
  397. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  398. break;
  399. udelay(100);
  400. }
  401. } else
  402. udelay(100);
  403. /* Turn on master enable */
  404. cmd |= PCI_COMMAND_MASTER;
  405. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  406. /* Disable RISC pause on FPM parity error. */
  407. if (!IS_QLA2100(ha)) {
  408. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  409. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  410. }
  411. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  412. }
  413. /**
  414. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  415. * @ha: HA context
  416. *
  417. * Returns 0 on success.
  418. */
  419. static inline void
  420. qla24xx_reset_risc(scsi_qla_host_t *vha)
  421. {
  422. unsigned long flags = 0;
  423. struct qla_hw_data *ha = vha->hw;
  424. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  425. uint32_t cnt, d2;
  426. uint16_t wd;
  427. spin_lock_irqsave(&ha->hardware_lock, flags);
  428. /* Reset RISC. */
  429. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  430. for (cnt = 0; cnt < 30000; cnt++) {
  431. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  432. break;
  433. udelay(10);
  434. }
  435. WRT_REG_DWORD(&reg->ctrl_status,
  436. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  437. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  438. udelay(100);
  439. /* Wait for firmware to complete NVRAM accesses. */
  440. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  441. for (cnt = 10000 ; cnt && d2; cnt--) {
  442. udelay(5);
  443. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  444. barrier();
  445. }
  446. /* Wait for soft-reset to complete. */
  447. d2 = RD_REG_DWORD(&reg->ctrl_status);
  448. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  449. udelay(5);
  450. d2 = RD_REG_DWORD(&reg->ctrl_status);
  451. barrier();
  452. }
  453. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  454. RD_REG_DWORD(&reg->hccr);
  455. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  456. RD_REG_DWORD(&reg->hccr);
  457. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  458. RD_REG_DWORD(&reg->hccr);
  459. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  460. for (cnt = 6000000 ; cnt && d2; cnt--) {
  461. udelay(5);
  462. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  463. barrier();
  464. }
  465. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  466. if (IS_NOPOLLING_TYPE(ha))
  467. ha->isp_ops->enable_intrs(ha);
  468. }
  469. /**
  470. * qla24xx_reset_chip() - Reset ISP24xx chip.
  471. * @ha: HA context
  472. *
  473. * Returns 0 on success.
  474. */
  475. void
  476. qla24xx_reset_chip(scsi_qla_host_t *vha)
  477. {
  478. struct qla_hw_data *ha = vha->hw;
  479. ha->isp_ops->disable_intrs(ha);
  480. /* Perform RISC reset. */
  481. qla24xx_reset_risc(vha);
  482. }
  483. /**
  484. * qla2x00_chip_diag() - Test chip for proper operation.
  485. * @ha: HA context
  486. *
  487. * Returns 0 on success.
  488. */
  489. int
  490. qla2x00_chip_diag(scsi_qla_host_t *vha)
  491. {
  492. int rval;
  493. struct qla_hw_data *ha = vha->hw;
  494. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  495. unsigned long flags = 0;
  496. uint16_t data;
  497. uint32_t cnt;
  498. uint16_t mb[5];
  499. struct req_que *req = ha->req_q_map[0];
  500. /* Assume a failed state */
  501. rval = QLA_FUNCTION_FAILED;
  502. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  503. vha->host_no, (u_long)&reg->flash_address));
  504. spin_lock_irqsave(&ha->hardware_lock, flags);
  505. /* Reset ISP chip. */
  506. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  507. /*
  508. * We need to have a delay here since the card will not respond while
  509. * in reset causing an MCA on some architectures.
  510. */
  511. udelay(20);
  512. data = qla2x00_debounce_register(&reg->ctrl_status);
  513. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  514. udelay(5);
  515. data = RD_REG_WORD(&reg->ctrl_status);
  516. barrier();
  517. }
  518. if (!cnt)
  519. goto chip_diag_failed;
  520. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  521. vha->host_no));
  522. /* Reset RISC processor. */
  523. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  524. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  525. /* Workaround for QLA2312 PCI parity error */
  526. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  527. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  528. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  529. udelay(5);
  530. data = RD_MAILBOX_REG(ha, reg, 0);
  531. barrier();
  532. }
  533. } else
  534. udelay(10);
  535. if (!cnt)
  536. goto chip_diag_failed;
  537. /* Check product ID of chip */
  538. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no));
  539. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  540. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  541. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  542. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  543. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  544. mb[3] != PROD_ID_3) {
  545. qla_printk(KERN_WARNING, ha,
  546. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  547. goto chip_diag_failed;
  548. }
  549. ha->product_id[0] = mb[1];
  550. ha->product_id[1] = mb[2];
  551. ha->product_id[2] = mb[3];
  552. ha->product_id[3] = mb[4];
  553. /* Adjust fw RISC transfer size */
  554. if (req->length > 1024)
  555. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  556. else
  557. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  558. req->length;
  559. if (IS_QLA2200(ha) &&
  560. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  561. /* Limit firmware transfer size with a 2200A */
  562. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  563. vha->host_no));
  564. ha->device_type |= DT_ISP2200A;
  565. ha->fw_transfer_size = 128;
  566. }
  567. /* Wrap Incoming Mailboxes Test. */
  568. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  569. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  570. rval = qla2x00_mbx_reg_test(vha);
  571. if (rval) {
  572. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  573. vha->host_no));
  574. qla_printk(KERN_WARNING, ha,
  575. "Failed mailbox send register test\n");
  576. }
  577. else {
  578. /* Flag a successful rval */
  579. rval = QLA_SUCCESS;
  580. }
  581. spin_lock_irqsave(&ha->hardware_lock, flags);
  582. chip_diag_failed:
  583. if (rval)
  584. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  585. "****\n", vha->host_no));
  586. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  587. return (rval);
  588. }
  589. /**
  590. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  591. * @ha: HA context
  592. *
  593. * Returns 0 on success.
  594. */
  595. int
  596. qla24xx_chip_diag(scsi_qla_host_t *vha)
  597. {
  598. int rval;
  599. struct qla_hw_data *ha = vha->hw;
  600. struct req_que *req = ha->req_q_map[0];
  601. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  602. rval = qla2x00_mbx_reg_test(vha);
  603. if (rval) {
  604. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  605. vha->host_no));
  606. qla_printk(KERN_WARNING, ha,
  607. "Failed mailbox send register test\n");
  608. } else {
  609. /* Flag a successful rval */
  610. rval = QLA_SUCCESS;
  611. }
  612. return rval;
  613. }
  614. void
  615. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  616. {
  617. int rval;
  618. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  619. eft_size, fce_size, mq_size;
  620. dma_addr_t tc_dma;
  621. void *tc;
  622. struct qla_hw_data *ha = vha->hw;
  623. struct req_que *req = ha->req_q_map[0];
  624. struct rsp_que *rsp = ha->rsp_q_map[0];
  625. if (ha->fw_dump) {
  626. qla_printk(KERN_WARNING, ha,
  627. "Firmware dump previously allocated.\n");
  628. return;
  629. }
  630. ha->fw_dumped = 0;
  631. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  632. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  633. fixed_size = sizeof(struct qla2100_fw_dump);
  634. } else if (IS_QLA23XX(ha)) {
  635. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  636. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  637. sizeof(uint16_t);
  638. } else if (IS_FWI2_CAPABLE(ha)) {
  639. if (IS_QLA81XX(ha))
  640. fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
  641. else if (IS_QLA25XX(ha))
  642. fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
  643. else
  644. fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
  645. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  646. sizeof(uint32_t);
  647. if (ha->mqenable)
  648. mq_size = sizeof(struct qla2xxx_mq_chain);
  649. /* Allocate memory for Fibre Channel Event Buffer. */
  650. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  651. goto try_eft;
  652. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  653. GFP_KERNEL);
  654. if (!tc) {
  655. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  656. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  657. goto try_eft;
  658. }
  659. memset(tc, 0, FCE_SIZE);
  660. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  661. ha->fce_mb, &ha->fce_bufs);
  662. if (rval) {
  663. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  664. "FCE (%d).\n", rval);
  665. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  666. tc_dma);
  667. ha->flags.fce_enabled = 0;
  668. goto try_eft;
  669. }
  670. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  671. FCE_SIZE / 1024);
  672. fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
  673. ha->flags.fce_enabled = 1;
  674. ha->fce_dma = tc_dma;
  675. ha->fce = tc;
  676. try_eft:
  677. /* Allocate memory for Extended Trace Buffer. */
  678. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  679. GFP_KERNEL);
  680. if (!tc) {
  681. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  682. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  683. goto cont_alloc;
  684. }
  685. memset(tc, 0, EFT_SIZE);
  686. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  687. if (rval) {
  688. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  689. "EFT (%d).\n", rval);
  690. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  691. tc_dma);
  692. goto cont_alloc;
  693. }
  694. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  695. EFT_SIZE / 1024);
  696. eft_size = EFT_SIZE;
  697. ha->eft_dma = tc_dma;
  698. ha->eft = tc;
  699. }
  700. cont_alloc:
  701. req_q_size = req->length * sizeof(request_t);
  702. rsp_q_size = rsp->length * sizeof(response_t);
  703. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  704. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
  705. ha->chain_offset = dump_size;
  706. dump_size += mq_size + fce_size;
  707. ha->fw_dump = vmalloc(dump_size);
  708. if (!ha->fw_dump) {
  709. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  710. "firmware dump!!!\n", dump_size / 1024);
  711. if (ha->eft) {
  712. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  713. ha->eft_dma);
  714. ha->eft = NULL;
  715. ha->eft_dma = 0;
  716. }
  717. return;
  718. }
  719. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  720. dump_size / 1024);
  721. ha->fw_dump_len = dump_size;
  722. ha->fw_dump->signature[0] = 'Q';
  723. ha->fw_dump->signature[1] = 'L';
  724. ha->fw_dump->signature[2] = 'G';
  725. ha->fw_dump->signature[3] = 'C';
  726. ha->fw_dump->version = __constant_htonl(1);
  727. ha->fw_dump->fixed_size = htonl(fixed_size);
  728. ha->fw_dump->mem_size = htonl(mem_size);
  729. ha->fw_dump->req_q_size = htonl(req_q_size);
  730. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  731. ha->fw_dump->eft_size = htonl(eft_size);
  732. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  733. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  734. ha->fw_dump->header_size =
  735. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  736. }
  737. /**
  738. * qla2x00_setup_chip() - Load and start RISC firmware.
  739. * @ha: HA context
  740. *
  741. * Returns 0 on success.
  742. */
  743. static int
  744. qla2x00_setup_chip(scsi_qla_host_t *vha)
  745. {
  746. int rval;
  747. uint32_t srisc_address = 0;
  748. struct qla_hw_data *ha = vha->hw;
  749. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  750. unsigned long flags;
  751. uint16_t fw_major_version;
  752. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  753. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  754. spin_lock_irqsave(&ha->hardware_lock, flags);
  755. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  756. RD_REG_WORD(&reg->hccr);
  757. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  758. }
  759. /* Load firmware sequences */
  760. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  761. if (rval == QLA_SUCCESS) {
  762. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  763. "code.\n", vha->host_no));
  764. rval = qla2x00_verify_checksum(vha, srisc_address);
  765. if (rval == QLA_SUCCESS) {
  766. /* Start firmware execution. */
  767. DEBUG(printk("scsi(%ld): Checksum OK, start "
  768. "firmware.\n", vha->host_no));
  769. rval = qla2x00_execute_fw(vha, srisc_address);
  770. /* Retrieve firmware information. */
  771. if (rval == QLA_SUCCESS) {
  772. fw_major_version = ha->fw_major_version;
  773. rval = qla2x00_get_fw_version(vha,
  774. &ha->fw_major_version,
  775. &ha->fw_minor_version,
  776. &ha->fw_subminor_version,
  777. &ha->fw_attributes, &ha->fw_memory_size,
  778. ha->mpi_version, &ha->mpi_capabilities,
  779. ha->phy_version);
  780. if (rval != QLA_SUCCESS)
  781. goto failed;
  782. ha->flags.npiv_supported = 0;
  783. if (IS_QLA2XXX_MIDTYPE(ha) &&
  784. (ha->fw_attributes & BIT_2)) {
  785. ha->flags.npiv_supported = 1;
  786. if ((!ha->max_npiv_vports) ||
  787. ((ha->max_npiv_vports + 1) %
  788. MIN_MULTI_ID_FABRIC))
  789. ha->max_npiv_vports =
  790. MIN_MULTI_ID_FABRIC - 1;
  791. }
  792. qla2x00_get_resource_cnts(vha, NULL,
  793. &ha->fw_xcb_count, NULL, NULL,
  794. &ha->max_npiv_vports);
  795. if (!fw_major_version && ql2xallocfwdump)
  796. qla2x00_alloc_fw_dump(vha);
  797. }
  798. } else {
  799. DEBUG2(printk(KERN_INFO
  800. "scsi(%ld): ISP Firmware failed checksum.\n",
  801. vha->host_no));
  802. }
  803. }
  804. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  805. /* Enable proper parity. */
  806. spin_lock_irqsave(&ha->hardware_lock, flags);
  807. if (IS_QLA2300(ha))
  808. /* SRAM parity */
  809. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  810. else
  811. /* SRAM, Instruction RAM and GP RAM parity */
  812. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  813. RD_REG_WORD(&reg->hccr);
  814. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  815. }
  816. if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
  817. uint32_t size;
  818. rval = qla81xx_fac_get_sector_size(vha, &size);
  819. if (rval == QLA_SUCCESS) {
  820. ha->flags.fac_supported = 1;
  821. ha->fdt_block_size = size << 2;
  822. } else {
  823. qla_printk(KERN_ERR, ha,
  824. "Unsupported FAC firmware (%d.%02d.%02d).\n",
  825. ha->fw_major_version, ha->fw_minor_version,
  826. ha->fw_subminor_version);
  827. }
  828. }
  829. failed:
  830. if (rval) {
  831. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  832. vha->host_no));
  833. }
  834. return (rval);
  835. }
  836. /**
  837. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  838. * @ha: HA context
  839. *
  840. * Beginning of request ring has initialization control block already built
  841. * by nvram config routine.
  842. *
  843. * Returns 0 on success.
  844. */
  845. void
  846. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  847. {
  848. uint16_t cnt;
  849. response_t *pkt;
  850. rsp->ring_ptr = rsp->ring;
  851. rsp->ring_index = 0;
  852. rsp->status_srb = NULL;
  853. pkt = rsp->ring_ptr;
  854. for (cnt = 0; cnt < rsp->length; cnt++) {
  855. pkt->signature = RESPONSE_PROCESSED;
  856. pkt++;
  857. }
  858. }
  859. /**
  860. * qla2x00_update_fw_options() - Read and process firmware options.
  861. * @ha: HA context
  862. *
  863. * Returns 0 on success.
  864. */
  865. void
  866. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  867. {
  868. uint16_t swing, emphasis, tx_sens, rx_sens;
  869. struct qla_hw_data *ha = vha->hw;
  870. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  871. qla2x00_get_fw_options(vha, ha->fw_options);
  872. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  873. return;
  874. /* Serial Link options. */
  875. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  876. vha->host_no));
  877. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  878. sizeof(ha->fw_seriallink_options)));
  879. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  880. if (ha->fw_seriallink_options[3] & BIT_2) {
  881. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  882. /* 1G settings */
  883. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  884. emphasis = (ha->fw_seriallink_options[2] &
  885. (BIT_4 | BIT_3)) >> 3;
  886. tx_sens = ha->fw_seriallink_options[0] &
  887. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  888. rx_sens = (ha->fw_seriallink_options[0] &
  889. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  890. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  891. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  892. if (rx_sens == 0x0)
  893. rx_sens = 0x3;
  894. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  895. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  896. ha->fw_options[10] |= BIT_5 |
  897. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  898. (tx_sens & (BIT_1 | BIT_0));
  899. /* 2G settings */
  900. swing = (ha->fw_seriallink_options[2] &
  901. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  902. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  903. tx_sens = ha->fw_seriallink_options[1] &
  904. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  905. rx_sens = (ha->fw_seriallink_options[1] &
  906. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  907. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  908. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  909. if (rx_sens == 0x0)
  910. rx_sens = 0x3;
  911. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  912. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  913. ha->fw_options[11] |= BIT_5 |
  914. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  915. (tx_sens & (BIT_1 | BIT_0));
  916. }
  917. /* FCP2 options. */
  918. /* Return command IOCBs without waiting for an ABTS to complete. */
  919. ha->fw_options[3] |= BIT_13;
  920. /* LED scheme. */
  921. if (ha->flags.enable_led_scheme)
  922. ha->fw_options[2] |= BIT_12;
  923. /* Detect ISP6312. */
  924. if (IS_QLA6312(ha))
  925. ha->fw_options[2] |= BIT_13;
  926. /* Update firmware options. */
  927. qla2x00_set_fw_options(vha, ha->fw_options);
  928. }
  929. void
  930. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  931. {
  932. int rval;
  933. struct qla_hw_data *ha = vha->hw;
  934. /* Update Serial Link options. */
  935. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  936. return;
  937. rval = qla2x00_set_serdes_params(vha,
  938. le16_to_cpu(ha->fw_seriallink_options24[1]),
  939. le16_to_cpu(ha->fw_seriallink_options24[2]),
  940. le16_to_cpu(ha->fw_seriallink_options24[3]));
  941. if (rval != QLA_SUCCESS) {
  942. qla_printk(KERN_WARNING, ha,
  943. "Unable to update Serial Link options (%x).\n", rval);
  944. }
  945. }
  946. void
  947. qla2x00_config_rings(struct scsi_qla_host *vha)
  948. {
  949. struct qla_hw_data *ha = vha->hw;
  950. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  951. struct req_que *req = ha->req_q_map[0];
  952. struct rsp_que *rsp = ha->rsp_q_map[0];
  953. /* Setup ring parameters in initialization control block. */
  954. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  955. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  956. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  957. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  958. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  959. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  960. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  961. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  962. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  963. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  964. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  965. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  966. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  967. }
  968. void
  969. qla24xx_config_rings(struct scsi_qla_host *vha)
  970. {
  971. struct qla_hw_data *ha = vha->hw;
  972. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  973. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  974. struct qla_msix_entry *msix;
  975. struct init_cb_24xx *icb;
  976. uint16_t rid = 0;
  977. struct req_que *req = ha->req_q_map[0];
  978. struct rsp_que *rsp = ha->rsp_q_map[0];
  979. /* Setup ring parameters in initialization control block. */
  980. icb = (struct init_cb_24xx *)ha->init_cb;
  981. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  982. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  983. icb->request_q_length = cpu_to_le16(req->length);
  984. icb->response_q_length = cpu_to_le16(rsp->length);
  985. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  986. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  987. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  988. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  989. if (ha->mqenable) {
  990. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  991. icb->rid = __constant_cpu_to_le16(rid);
  992. if (ha->flags.msix_enabled) {
  993. msix = &ha->msix_entries[1];
  994. DEBUG2_17(printk(KERN_INFO
  995. "Registering vector 0x%x for base que\n", msix->entry));
  996. icb->msix = cpu_to_le16(msix->entry);
  997. }
  998. /* Use alternate PCI bus number */
  999. if (MSB(rid))
  1000. icb->firmware_options_2 |=
  1001. __constant_cpu_to_le32(BIT_19);
  1002. /* Use alternate PCI devfn */
  1003. if (LSB(rid))
  1004. icb->firmware_options_2 |=
  1005. __constant_cpu_to_le32(BIT_18);
  1006. icb->firmware_options_2 &= __constant_cpu_to_le32(~BIT_22);
  1007. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1008. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1009. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1010. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1011. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1012. } else {
  1013. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1014. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1015. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1016. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1017. }
  1018. /* PCI posting */
  1019. RD_REG_DWORD(&ioreg->hccr);
  1020. }
  1021. /**
  1022. * qla2x00_init_rings() - Initializes firmware.
  1023. * @ha: HA context
  1024. *
  1025. * Beginning of request ring has initialization control block already built
  1026. * by nvram config routine.
  1027. *
  1028. * Returns 0 on success.
  1029. */
  1030. static int
  1031. qla2x00_init_rings(scsi_qla_host_t *vha)
  1032. {
  1033. int rval;
  1034. unsigned long flags = 0;
  1035. int cnt, que;
  1036. struct qla_hw_data *ha = vha->hw;
  1037. struct req_que *req;
  1038. struct rsp_que *rsp;
  1039. struct scsi_qla_host *vp;
  1040. struct mid_init_cb_24xx *mid_init_cb =
  1041. (struct mid_init_cb_24xx *) ha->init_cb;
  1042. spin_lock_irqsave(&ha->hardware_lock, flags);
  1043. /* Clear outstanding commands array. */
  1044. for (que = 0; que < ha->max_req_queues; que++) {
  1045. req = ha->req_q_map[que];
  1046. if (!req)
  1047. continue;
  1048. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1049. req->outstanding_cmds[cnt] = NULL;
  1050. req->current_outstanding_cmd = 1;
  1051. /* Initialize firmware. */
  1052. req->ring_ptr = req->ring;
  1053. req->ring_index = 0;
  1054. req->cnt = req->length;
  1055. }
  1056. for (que = 0; que < ha->max_rsp_queues; que++) {
  1057. rsp = ha->rsp_q_map[que];
  1058. if (!rsp)
  1059. continue;
  1060. /* Initialize response queue entries */
  1061. qla2x00_init_response_q_entries(rsp);
  1062. }
  1063. /* Clear RSCN queue. */
  1064. list_for_each_entry(vp, &ha->vp_list, list) {
  1065. vp->rscn_in_ptr = 0;
  1066. vp->rscn_out_ptr = 0;
  1067. }
  1068. ha->isp_ops->config_rings(vha);
  1069. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1070. /* Update any ISP specific firmware options before initialization. */
  1071. ha->isp_ops->update_fw_options(vha);
  1072. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1073. if (ha->flags.npiv_supported) {
  1074. if (ha->operating_mode == LOOP)
  1075. ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
  1076. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1077. }
  1078. if (IS_FWI2_CAPABLE(ha)) {
  1079. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1080. mid_init_cb->init_cb.execution_throttle =
  1081. cpu_to_le16(ha->fw_xcb_count);
  1082. }
  1083. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1084. if (rval) {
  1085. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1086. vha->host_no));
  1087. } else {
  1088. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1089. vha->host_no));
  1090. }
  1091. return (rval);
  1092. }
  1093. /**
  1094. * qla2x00_fw_ready() - Waits for firmware ready.
  1095. * @ha: HA context
  1096. *
  1097. * Returns 0 on success.
  1098. */
  1099. static int
  1100. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1101. {
  1102. int rval;
  1103. unsigned long wtime, mtime, cs84xx_time;
  1104. uint16_t min_wait; /* Minimum wait time if loop is down */
  1105. uint16_t wait_time; /* Wait time if loop is coming ready */
  1106. uint16_t state[3];
  1107. struct qla_hw_data *ha = vha->hw;
  1108. rval = QLA_SUCCESS;
  1109. /* 20 seconds for loop down. */
  1110. min_wait = 20;
  1111. /*
  1112. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1113. * our own processing.
  1114. */
  1115. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1116. wait_time = min_wait;
  1117. }
  1118. /* Min wait time if loop down */
  1119. mtime = jiffies + (min_wait * HZ);
  1120. /* wait time before firmware ready */
  1121. wtime = jiffies + (wait_time * HZ);
  1122. /* Wait for ISP to finish LIP */
  1123. if (!vha->flags.init_done)
  1124. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1125. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1126. vha->host_no));
  1127. do {
  1128. rval = qla2x00_get_firmware_state(vha, state);
  1129. if (rval == QLA_SUCCESS) {
  1130. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1131. vha->device_flags &= ~DFLG_NO_CABLE;
  1132. }
  1133. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1134. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1135. "84xx=%x.\n", vha->host_no, state[0],
  1136. state[2]));
  1137. if ((state[2] & FSTATE_LOGGED_IN) &&
  1138. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1139. DEBUG16(printk("scsi(%ld): Sending "
  1140. "verify iocb.\n", vha->host_no));
  1141. cs84xx_time = jiffies;
  1142. rval = qla84xx_init_chip(vha);
  1143. if (rval != QLA_SUCCESS)
  1144. break;
  1145. /* Add time taken to initialize. */
  1146. cs84xx_time = jiffies - cs84xx_time;
  1147. wtime += cs84xx_time;
  1148. mtime += cs84xx_time;
  1149. DEBUG16(printk("scsi(%ld): Increasing "
  1150. "wait time by %ld. New time %ld\n",
  1151. vha->host_no, cs84xx_time, wtime));
  1152. }
  1153. } else if (state[0] == FSTATE_READY) {
  1154. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1155. vha->host_no));
  1156. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1157. &ha->login_timeout, &ha->r_a_tov);
  1158. rval = QLA_SUCCESS;
  1159. break;
  1160. }
  1161. rval = QLA_FUNCTION_FAILED;
  1162. if (atomic_read(&vha->loop_down_timer) &&
  1163. state[0] != FSTATE_READY) {
  1164. /* Loop down. Timeout on min_wait for states
  1165. * other than Wait for Login.
  1166. */
  1167. if (time_after_eq(jiffies, mtime)) {
  1168. qla_printk(KERN_INFO, ha,
  1169. "Cable is unplugged...\n");
  1170. vha->device_flags |= DFLG_NO_CABLE;
  1171. break;
  1172. }
  1173. }
  1174. } else {
  1175. /* Mailbox cmd failed. Timeout on min_wait. */
  1176. if (time_after_eq(jiffies, mtime))
  1177. break;
  1178. }
  1179. if (time_after_eq(jiffies, wtime))
  1180. break;
  1181. /* Delay for a while */
  1182. msleep(500);
  1183. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1184. vha->host_no, state[0], jiffies));
  1185. } while (1);
  1186. DEBUG(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1187. vha->host_no, state[0], jiffies));
  1188. if (rval) {
  1189. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1190. vha->host_no));
  1191. }
  1192. return (rval);
  1193. }
  1194. /*
  1195. * qla2x00_configure_hba
  1196. * Setup adapter context.
  1197. *
  1198. * Input:
  1199. * ha = adapter state pointer.
  1200. *
  1201. * Returns:
  1202. * 0 = success
  1203. *
  1204. * Context:
  1205. * Kernel context.
  1206. */
  1207. static int
  1208. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1209. {
  1210. int rval;
  1211. uint16_t loop_id;
  1212. uint16_t topo;
  1213. uint16_t sw_cap;
  1214. uint8_t al_pa;
  1215. uint8_t area;
  1216. uint8_t domain;
  1217. char connect_type[22];
  1218. struct qla_hw_data *ha = vha->hw;
  1219. /* Get host addresses. */
  1220. rval = qla2x00_get_adapter_id(vha,
  1221. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1222. if (rval != QLA_SUCCESS) {
  1223. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1224. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1225. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1226. __func__, vha->host_no));
  1227. } else {
  1228. qla_printk(KERN_WARNING, ha,
  1229. "ERROR -- Unable to get host loop ID.\n");
  1230. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1231. }
  1232. return (rval);
  1233. }
  1234. if (topo == 4) {
  1235. qla_printk(KERN_INFO, ha,
  1236. "Cannot get topology - retrying.\n");
  1237. return (QLA_FUNCTION_FAILED);
  1238. }
  1239. vha->loop_id = loop_id;
  1240. /* initialize */
  1241. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1242. ha->operating_mode = LOOP;
  1243. ha->switch_cap = 0;
  1244. switch (topo) {
  1245. case 0:
  1246. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1247. vha->host_no));
  1248. ha->current_topology = ISP_CFG_NL;
  1249. strcpy(connect_type, "(Loop)");
  1250. break;
  1251. case 1:
  1252. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1253. vha->host_no));
  1254. ha->switch_cap = sw_cap;
  1255. ha->current_topology = ISP_CFG_FL;
  1256. strcpy(connect_type, "(FL_Port)");
  1257. break;
  1258. case 2:
  1259. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1260. vha->host_no));
  1261. ha->operating_mode = P2P;
  1262. ha->current_topology = ISP_CFG_N;
  1263. strcpy(connect_type, "(N_Port-to-N_Port)");
  1264. break;
  1265. case 3:
  1266. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1267. vha->host_no));
  1268. ha->switch_cap = sw_cap;
  1269. ha->operating_mode = P2P;
  1270. ha->current_topology = ISP_CFG_F;
  1271. strcpy(connect_type, "(F_Port)");
  1272. break;
  1273. default:
  1274. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1275. "Using NL.\n",
  1276. vha->host_no, topo));
  1277. ha->current_topology = ISP_CFG_NL;
  1278. strcpy(connect_type, "(Loop)");
  1279. break;
  1280. }
  1281. /* Save Host port and loop ID. */
  1282. /* byte order - Big Endian */
  1283. vha->d_id.b.domain = domain;
  1284. vha->d_id.b.area = area;
  1285. vha->d_id.b.al_pa = al_pa;
  1286. if (!vha->flags.init_done)
  1287. qla_printk(KERN_INFO, ha,
  1288. "Topology - %s, Host Loop address 0x%x\n",
  1289. connect_type, vha->loop_id);
  1290. if (rval) {
  1291. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1292. } else {
  1293. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1294. }
  1295. return(rval);
  1296. }
  1297. static inline void
  1298. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1299. char *def)
  1300. {
  1301. char *st, *en;
  1302. uint16_t index;
  1303. struct qla_hw_data *ha = vha->hw;
  1304. int use_tbl = !IS_QLA25XX(ha) && !IS_QLA81XX(ha);
  1305. if (memcmp(model, BINZERO, len) != 0) {
  1306. strncpy(ha->model_number, model, len);
  1307. st = en = ha->model_number;
  1308. en += len - 1;
  1309. while (en > st) {
  1310. if (*en != 0x20 && *en != 0x00)
  1311. break;
  1312. *en-- = '\0';
  1313. }
  1314. index = (ha->pdev->subsystem_device & 0xff);
  1315. if (use_tbl &&
  1316. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1317. index < QLA_MODEL_NAMES)
  1318. strncpy(ha->model_desc,
  1319. qla2x00_model_name[index * 2 + 1],
  1320. sizeof(ha->model_desc) - 1);
  1321. } else {
  1322. index = (ha->pdev->subsystem_device & 0xff);
  1323. if (use_tbl &&
  1324. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1325. index < QLA_MODEL_NAMES) {
  1326. strcpy(ha->model_number,
  1327. qla2x00_model_name[index * 2]);
  1328. strncpy(ha->model_desc,
  1329. qla2x00_model_name[index * 2 + 1],
  1330. sizeof(ha->model_desc) - 1);
  1331. } else {
  1332. strcpy(ha->model_number, def);
  1333. }
  1334. }
  1335. if (IS_FWI2_CAPABLE(ha))
  1336. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1337. sizeof(ha->model_desc));
  1338. }
  1339. /* On sparc systems, obtain port and node WWN from firmware
  1340. * properties.
  1341. */
  1342. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1343. {
  1344. #ifdef CONFIG_SPARC
  1345. struct qla_hw_data *ha = vha->hw;
  1346. struct pci_dev *pdev = ha->pdev;
  1347. struct device_node *dp = pci_device_to_OF_node(pdev);
  1348. const u8 *val;
  1349. int len;
  1350. val = of_get_property(dp, "port-wwn", &len);
  1351. if (val && len >= WWN_SIZE)
  1352. memcpy(nv->port_name, val, WWN_SIZE);
  1353. val = of_get_property(dp, "node-wwn", &len);
  1354. if (val && len >= WWN_SIZE)
  1355. memcpy(nv->node_name, val, WWN_SIZE);
  1356. #endif
  1357. }
  1358. /*
  1359. * NVRAM configuration for ISP 2xxx
  1360. *
  1361. * Input:
  1362. * ha = adapter block pointer.
  1363. *
  1364. * Output:
  1365. * initialization control block in response_ring
  1366. * host adapters parameters in host adapter block
  1367. *
  1368. * Returns:
  1369. * 0 = success.
  1370. */
  1371. int
  1372. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1373. {
  1374. int rval;
  1375. uint8_t chksum = 0;
  1376. uint16_t cnt;
  1377. uint8_t *dptr1, *dptr2;
  1378. struct qla_hw_data *ha = vha->hw;
  1379. init_cb_t *icb = ha->init_cb;
  1380. nvram_t *nv = ha->nvram;
  1381. uint8_t *ptr = ha->nvram;
  1382. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1383. rval = QLA_SUCCESS;
  1384. /* Determine NVRAM starting address. */
  1385. ha->nvram_size = sizeof(nvram_t);
  1386. ha->nvram_base = 0;
  1387. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1388. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1389. ha->nvram_base = 0x80;
  1390. /* Get NVRAM data and calculate checksum. */
  1391. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1392. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1393. chksum += *ptr++;
  1394. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1395. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1396. /* Bad NVRAM data, set defaults parameters. */
  1397. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1398. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1399. /* Reset NVRAM data. */
  1400. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1401. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1402. nv->nvram_version);
  1403. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1404. "invalid -- WWPN) defaults.\n");
  1405. /*
  1406. * Set default initialization control block.
  1407. */
  1408. memset(nv, 0, ha->nvram_size);
  1409. nv->parameter_block_version = ICB_VERSION;
  1410. if (IS_QLA23XX(ha)) {
  1411. nv->firmware_options[0] = BIT_2 | BIT_1;
  1412. nv->firmware_options[1] = BIT_7 | BIT_5;
  1413. nv->add_firmware_options[0] = BIT_5;
  1414. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1415. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1416. nv->special_options[1] = BIT_7;
  1417. } else if (IS_QLA2200(ha)) {
  1418. nv->firmware_options[0] = BIT_2 | BIT_1;
  1419. nv->firmware_options[1] = BIT_7 | BIT_5;
  1420. nv->add_firmware_options[0] = BIT_5;
  1421. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1422. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1423. } else if (IS_QLA2100(ha)) {
  1424. nv->firmware_options[0] = BIT_3 | BIT_1;
  1425. nv->firmware_options[1] = BIT_5;
  1426. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1427. }
  1428. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1429. nv->execution_throttle = __constant_cpu_to_le16(16);
  1430. nv->retry_count = 8;
  1431. nv->retry_delay = 1;
  1432. nv->port_name[0] = 33;
  1433. nv->port_name[3] = 224;
  1434. nv->port_name[4] = 139;
  1435. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1436. nv->login_timeout = 4;
  1437. /*
  1438. * Set default host adapter parameters
  1439. */
  1440. nv->host_p[1] = BIT_2;
  1441. nv->reset_delay = 5;
  1442. nv->port_down_retry_count = 8;
  1443. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1444. nv->link_down_timeout = 60;
  1445. rval = 1;
  1446. }
  1447. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1448. /*
  1449. * The SN2 does not provide BIOS emulation which means you can't change
  1450. * potentially bogus BIOS settings. Force the use of default settings
  1451. * for link rate and frame size. Hope that the rest of the settings
  1452. * are valid.
  1453. */
  1454. if (ia64_platform_is("sn2")) {
  1455. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1456. if (IS_QLA23XX(ha))
  1457. nv->special_options[1] = BIT_7;
  1458. }
  1459. #endif
  1460. /* Reset Initialization control block */
  1461. memset(icb, 0, ha->init_cb_size);
  1462. /*
  1463. * Setup driver NVRAM options.
  1464. */
  1465. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1466. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1467. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1468. nv->firmware_options[1] &= ~BIT_4;
  1469. if (IS_QLA23XX(ha)) {
  1470. nv->firmware_options[0] |= BIT_2;
  1471. nv->firmware_options[0] &= ~BIT_3;
  1472. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1473. if (IS_QLA2300(ha)) {
  1474. if (ha->fb_rev == FPM_2310) {
  1475. strcpy(ha->model_number, "QLA2310");
  1476. } else {
  1477. strcpy(ha->model_number, "QLA2300");
  1478. }
  1479. } else {
  1480. qla2x00_set_model_info(vha, nv->model_number,
  1481. sizeof(nv->model_number), "QLA23xx");
  1482. }
  1483. } else if (IS_QLA2200(ha)) {
  1484. nv->firmware_options[0] |= BIT_2;
  1485. /*
  1486. * 'Point-to-point preferred, else loop' is not a safe
  1487. * connection mode setting.
  1488. */
  1489. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1490. (BIT_5 | BIT_4)) {
  1491. /* Force 'loop preferred, else point-to-point'. */
  1492. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1493. nv->add_firmware_options[0] |= BIT_5;
  1494. }
  1495. strcpy(ha->model_number, "QLA22xx");
  1496. } else /*if (IS_QLA2100(ha))*/ {
  1497. strcpy(ha->model_number, "QLA2100");
  1498. }
  1499. /*
  1500. * Copy over NVRAM RISC parameter block to initialization control block.
  1501. */
  1502. dptr1 = (uint8_t *)icb;
  1503. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1504. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1505. while (cnt--)
  1506. *dptr1++ = *dptr2++;
  1507. /* Copy 2nd half. */
  1508. dptr1 = (uint8_t *)icb->add_firmware_options;
  1509. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1510. while (cnt--)
  1511. *dptr1++ = *dptr2++;
  1512. /* Use alternate WWN? */
  1513. if (nv->host_p[1] & BIT_7) {
  1514. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  1515. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  1516. }
  1517. /* Prepare nodename */
  1518. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1519. /*
  1520. * Firmware will apply the following mask if the nodename was
  1521. * not provided.
  1522. */
  1523. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1524. icb->node_name[0] &= 0xF0;
  1525. }
  1526. /*
  1527. * Set host adapter parameters.
  1528. */
  1529. if (nv->host_p[0] & BIT_7)
  1530. ql2xextended_error_logging = 1;
  1531. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1532. /* Always load RISC code on non ISP2[12]00 chips. */
  1533. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1534. ha->flags.disable_risc_code_load = 0;
  1535. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1536. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  1537. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  1538. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  1539. ha->flags.disable_serdes = 0;
  1540. ha->operating_mode =
  1541. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  1542. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  1543. sizeof(ha->fw_seriallink_options));
  1544. /* save HBA serial number */
  1545. ha->serial0 = icb->port_name[5];
  1546. ha->serial1 = icb->port_name[6];
  1547. ha->serial2 = icb->port_name[7];
  1548. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  1549. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  1550. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  1551. ha->retry_count = nv->retry_count;
  1552. /* Set minimum login_timeout to 4 seconds. */
  1553. if (nv->login_timeout < ql2xlogintimeout)
  1554. nv->login_timeout = ql2xlogintimeout;
  1555. if (nv->login_timeout < 4)
  1556. nv->login_timeout = 4;
  1557. ha->login_timeout = nv->login_timeout;
  1558. icb->login_timeout = nv->login_timeout;
  1559. /* Set minimum RATOV to 100 tenths of a second. */
  1560. ha->r_a_tov = 100;
  1561. ha->loop_reset_delay = nv->reset_delay;
  1562. /* Link Down Timeout = 0:
  1563. *
  1564. * When Port Down timer expires we will start returning
  1565. * I/O's to OS with "DID_NO_CONNECT".
  1566. *
  1567. * Link Down Timeout != 0:
  1568. *
  1569. * The driver waits for the link to come up after link down
  1570. * before returning I/Os to OS with "DID_NO_CONNECT".
  1571. */
  1572. if (nv->link_down_timeout == 0) {
  1573. ha->loop_down_abort_time =
  1574. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  1575. } else {
  1576. ha->link_down_timeout = nv->link_down_timeout;
  1577. ha->loop_down_abort_time =
  1578. (LOOP_DOWN_TIME - ha->link_down_timeout);
  1579. }
  1580. /*
  1581. * Need enough time to try and get the port back.
  1582. */
  1583. ha->port_down_retry_count = nv->port_down_retry_count;
  1584. if (qlport_down_retry)
  1585. ha->port_down_retry_count = qlport_down_retry;
  1586. /* Set login_retry_count */
  1587. ha->login_retry_count = nv->retry_count;
  1588. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  1589. ha->port_down_retry_count > 3)
  1590. ha->login_retry_count = ha->port_down_retry_count;
  1591. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  1592. ha->login_retry_count = ha->port_down_retry_count;
  1593. if (ql2xloginretrycount)
  1594. ha->login_retry_count = ql2xloginretrycount;
  1595. icb->lun_enables = __constant_cpu_to_le16(0);
  1596. icb->command_resource_count = 0;
  1597. icb->immediate_notify_resource_count = 0;
  1598. icb->timeout = __constant_cpu_to_le16(0);
  1599. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1600. /* Enable RIO */
  1601. icb->firmware_options[0] &= ~BIT_3;
  1602. icb->add_firmware_options[0] &=
  1603. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1604. icb->add_firmware_options[0] |= BIT_2;
  1605. icb->response_accumulation_timer = 3;
  1606. icb->interrupt_delay_timer = 5;
  1607. vha->flags.process_response_queue = 1;
  1608. } else {
  1609. /* Enable ZIO. */
  1610. if (!vha->flags.init_done) {
  1611. ha->zio_mode = icb->add_firmware_options[0] &
  1612. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1613. ha->zio_timer = icb->interrupt_delay_timer ?
  1614. icb->interrupt_delay_timer: 2;
  1615. }
  1616. icb->add_firmware_options[0] &=
  1617. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1618. vha->flags.process_response_queue = 0;
  1619. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  1620. ha->zio_mode = QLA_ZIO_MODE_6;
  1621. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  1622. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  1623. ha->zio_timer * 100));
  1624. qla_printk(KERN_INFO, ha,
  1625. "ZIO mode %d enabled; timer delay (%d us).\n",
  1626. ha->zio_mode, ha->zio_timer * 100);
  1627. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  1628. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  1629. vha->flags.process_response_queue = 1;
  1630. }
  1631. }
  1632. if (rval) {
  1633. DEBUG2_3(printk(KERN_WARNING
  1634. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  1635. }
  1636. return (rval);
  1637. }
  1638. static void
  1639. qla2x00_rport_del(void *data)
  1640. {
  1641. fc_port_t *fcport = data;
  1642. struct fc_rport *rport;
  1643. spin_lock_irq(fcport->vha->host->host_lock);
  1644. rport = fcport->drport;
  1645. fcport->drport = NULL;
  1646. spin_unlock_irq(fcport->vha->host->host_lock);
  1647. if (rport)
  1648. fc_remote_port_delete(rport);
  1649. }
  1650. /**
  1651. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  1652. * @ha: HA context
  1653. * @flags: allocation flags
  1654. *
  1655. * Returns a pointer to the allocated fcport, or NULL, if none available.
  1656. */
  1657. static fc_port_t *
  1658. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  1659. {
  1660. fc_port_t *fcport;
  1661. fcport = kzalloc(sizeof(fc_port_t), flags);
  1662. if (!fcport)
  1663. return NULL;
  1664. /* Setup fcport template structure. */
  1665. fcport->vha = vha;
  1666. fcport->vp_idx = vha->vp_idx;
  1667. fcport->port_type = FCT_UNKNOWN;
  1668. fcport->loop_id = FC_NO_LOOP_ID;
  1669. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  1670. fcport->supported_classes = FC_COS_UNSPECIFIED;
  1671. return fcport;
  1672. }
  1673. /*
  1674. * qla2x00_configure_loop
  1675. * Updates Fibre Channel Device Database with what is actually on loop.
  1676. *
  1677. * Input:
  1678. * ha = adapter block pointer.
  1679. *
  1680. * Returns:
  1681. * 0 = success.
  1682. * 1 = error.
  1683. * 2 = database was full and device was not configured.
  1684. */
  1685. static int
  1686. qla2x00_configure_loop(scsi_qla_host_t *vha)
  1687. {
  1688. int rval;
  1689. unsigned long flags, save_flags;
  1690. struct qla_hw_data *ha = vha->hw;
  1691. rval = QLA_SUCCESS;
  1692. /* Get Initiator ID */
  1693. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  1694. rval = qla2x00_configure_hba(vha);
  1695. if (rval != QLA_SUCCESS) {
  1696. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  1697. vha->host_no));
  1698. return (rval);
  1699. }
  1700. }
  1701. save_flags = flags = vha->dpc_flags;
  1702. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  1703. vha->host_no, flags));
  1704. /*
  1705. * If we have both an RSCN and PORT UPDATE pending then handle them
  1706. * both at the same time.
  1707. */
  1708. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1709. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  1710. /* Determine what we need to do */
  1711. if (ha->current_topology == ISP_CFG_FL &&
  1712. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1713. vha->flags.rscn_queue_overflow = 1;
  1714. set_bit(RSCN_UPDATE, &flags);
  1715. } else if (ha->current_topology == ISP_CFG_F &&
  1716. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1717. vha->flags.rscn_queue_overflow = 1;
  1718. set_bit(RSCN_UPDATE, &flags);
  1719. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  1720. } else if (ha->current_topology == ISP_CFG_N) {
  1721. clear_bit(RSCN_UPDATE, &flags);
  1722. } else if (!vha->flags.online ||
  1723. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  1724. vha->flags.rscn_queue_overflow = 1;
  1725. set_bit(RSCN_UPDATE, &flags);
  1726. set_bit(LOCAL_LOOP_UPDATE, &flags);
  1727. }
  1728. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  1729. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  1730. rval = QLA_FUNCTION_FAILED;
  1731. else
  1732. rval = qla2x00_configure_local_loop(vha);
  1733. }
  1734. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  1735. if (LOOP_TRANSITION(vha))
  1736. rval = QLA_FUNCTION_FAILED;
  1737. else
  1738. rval = qla2x00_configure_fabric(vha);
  1739. }
  1740. if (rval == QLA_SUCCESS) {
  1741. if (atomic_read(&vha->loop_down_timer) ||
  1742. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1743. rval = QLA_FUNCTION_FAILED;
  1744. } else {
  1745. atomic_set(&vha->loop_state, LOOP_READY);
  1746. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  1747. }
  1748. }
  1749. if (rval) {
  1750. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  1751. __func__, vha->host_no));
  1752. } else {
  1753. DEBUG3(printk("%s: exiting normally\n", __func__));
  1754. }
  1755. /* Restore state if a resync event occurred during processing */
  1756. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1757. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  1758. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1759. if (test_bit(RSCN_UPDATE, &save_flags)) {
  1760. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  1761. vha->flags.rscn_queue_overflow = 1;
  1762. }
  1763. }
  1764. return (rval);
  1765. }
  1766. /*
  1767. * qla2x00_configure_local_loop
  1768. * Updates Fibre Channel Device Database with local loop devices.
  1769. *
  1770. * Input:
  1771. * ha = adapter block pointer.
  1772. *
  1773. * Returns:
  1774. * 0 = success.
  1775. */
  1776. static int
  1777. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  1778. {
  1779. int rval, rval2;
  1780. int found_devs;
  1781. int found;
  1782. fc_port_t *fcport, *new_fcport;
  1783. uint16_t index;
  1784. uint16_t entries;
  1785. char *id_iter;
  1786. uint16_t loop_id;
  1787. uint8_t domain, area, al_pa;
  1788. struct qla_hw_data *ha = vha->hw;
  1789. found_devs = 0;
  1790. new_fcport = NULL;
  1791. entries = MAX_FIBRE_DEVICES;
  1792. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  1793. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  1794. /* Get list of logged in devices. */
  1795. memset(ha->gid_list, 0, GID_LIST_SIZE);
  1796. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  1797. &entries);
  1798. if (rval != QLA_SUCCESS)
  1799. goto cleanup_allocation;
  1800. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  1801. vha->host_no, entries));
  1802. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  1803. entries * sizeof(struct gid_list_info)));
  1804. /* Allocate temporary fcport for any new fcports discovered. */
  1805. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  1806. if (new_fcport == NULL) {
  1807. rval = QLA_MEMORY_ALLOC_FAILED;
  1808. goto cleanup_allocation;
  1809. }
  1810. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1811. /*
  1812. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  1813. */
  1814. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  1815. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  1816. fcport->port_type != FCT_BROADCAST &&
  1817. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  1818. DEBUG(printk("scsi(%ld): Marking port lost, "
  1819. "loop_id=0x%04x\n",
  1820. vha->host_no, fcport->loop_id));
  1821. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  1822. }
  1823. }
  1824. /* Add devices to port list. */
  1825. id_iter = (char *)ha->gid_list;
  1826. for (index = 0; index < entries; index++) {
  1827. domain = ((struct gid_list_info *)id_iter)->domain;
  1828. area = ((struct gid_list_info *)id_iter)->area;
  1829. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  1830. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1831. loop_id = (uint16_t)
  1832. ((struct gid_list_info *)id_iter)->loop_id_2100;
  1833. else
  1834. loop_id = le16_to_cpu(
  1835. ((struct gid_list_info *)id_iter)->loop_id);
  1836. id_iter += ha->gid_list_info_size;
  1837. /* Bypass reserved domain fields. */
  1838. if ((domain & 0xf0) == 0xf0)
  1839. continue;
  1840. /* Bypass if not same domain and area of adapter. */
  1841. if (area && domain &&
  1842. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  1843. continue;
  1844. /* Bypass invalid local loop ID. */
  1845. if (loop_id > LAST_LOCAL_LOOP_ID)
  1846. continue;
  1847. /* Fill in member data. */
  1848. new_fcport->d_id.b.domain = domain;
  1849. new_fcport->d_id.b.area = area;
  1850. new_fcport->d_id.b.al_pa = al_pa;
  1851. new_fcport->loop_id = loop_id;
  1852. new_fcport->vp_idx = vha->vp_idx;
  1853. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  1854. if (rval2 != QLA_SUCCESS) {
  1855. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  1856. "information -- get_port_database=%x, "
  1857. "loop_id=0x%04x\n",
  1858. vha->host_no, rval2, new_fcport->loop_id));
  1859. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  1860. vha->host_no));
  1861. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  1862. continue;
  1863. }
  1864. /* Check for matching device in port list. */
  1865. found = 0;
  1866. fcport = NULL;
  1867. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  1868. if (memcmp(new_fcport->port_name, fcport->port_name,
  1869. WWN_SIZE))
  1870. continue;
  1871. fcport->flags &= ~FCF_FABRIC_DEVICE;
  1872. fcport->loop_id = new_fcport->loop_id;
  1873. fcport->port_type = new_fcport->port_type;
  1874. fcport->d_id.b24 = new_fcport->d_id.b24;
  1875. memcpy(fcport->node_name, new_fcport->node_name,
  1876. WWN_SIZE);
  1877. found++;
  1878. break;
  1879. }
  1880. if (!found) {
  1881. /* New device, add to fcports list. */
  1882. if (vha->vp_idx) {
  1883. new_fcport->vha = vha;
  1884. new_fcport->vp_idx = vha->vp_idx;
  1885. }
  1886. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  1887. /* Allocate a new replacement fcport. */
  1888. fcport = new_fcport;
  1889. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  1890. if (new_fcport == NULL) {
  1891. rval = QLA_MEMORY_ALLOC_FAILED;
  1892. goto cleanup_allocation;
  1893. }
  1894. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1895. }
  1896. /* Base iIDMA settings on HBA port speed. */
  1897. fcport->fp_speed = ha->link_data_rate;
  1898. qla2x00_update_fcport(vha, fcport);
  1899. found_devs++;
  1900. }
  1901. cleanup_allocation:
  1902. kfree(new_fcport);
  1903. if (rval != QLA_SUCCESS) {
  1904. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  1905. "rval=%x\n", vha->host_no, rval));
  1906. }
  1907. return (rval);
  1908. }
  1909. static void
  1910. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  1911. {
  1912. #define LS_UNKNOWN 2
  1913. static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
  1914. char *link_speed;
  1915. int rval;
  1916. uint16_t mb[6];
  1917. struct qla_hw_data *ha = vha->hw;
  1918. if (!IS_IIDMA_CAPABLE(ha))
  1919. return;
  1920. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  1921. fcport->fp_speed > ha->link_data_rate)
  1922. return;
  1923. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  1924. mb);
  1925. if (rval != QLA_SUCCESS) {
  1926. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  1927. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  1928. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  1929. fcport->port_name[2], fcport->port_name[3],
  1930. fcport->port_name[4], fcport->port_name[5],
  1931. fcport->port_name[6], fcport->port_name[7], rval,
  1932. fcport->fp_speed, mb[0], mb[1]));
  1933. } else {
  1934. link_speed = link_speeds[LS_UNKNOWN];
  1935. if (fcport->fp_speed < 5)
  1936. link_speed = link_speeds[fcport->fp_speed];
  1937. else if (fcport->fp_speed == 0x13)
  1938. link_speed = link_speeds[5];
  1939. DEBUG2(qla_printk(KERN_INFO, ha,
  1940. "iIDMA adjusted to %s GB/s on "
  1941. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  1942. link_speed, fcport->port_name[0],
  1943. fcport->port_name[1], fcport->port_name[2],
  1944. fcport->port_name[3], fcport->port_name[4],
  1945. fcport->port_name[5], fcport->port_name[6],
  1946. fcport->port_name[7]));
  1947. }
  1948. }
  1949. static void
  1950. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  1951. {
  1952. struct fc_rport_identifiers rport_ids;
  1953. struct fc_rport *rport;
  1954. struct qla_hw_data *ha = vha->hw;
  1955. if (fcport->drport)
  1956. qla2x00_rport_del(fcport);
  1957. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  1958. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  1959. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  1960. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  1961. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1962. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  1963. if (!rport) {
  1964. qla_printk(KERN_WARNING, ha,
  1965. "Unable to allocate fc remote port!\n");
  1966. return;
  1967. }
  1968. spin_lock_irq(fcport->vha->host->host_lock);
  1969. *((fc_port_t **)rport->dd_data) = fcport;
  1970. spin_unlock_irq(fcport->vha->host->host_lock);
  1971. rport->supported_classes = fcport->supported_classes;
  1972. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1973. if (fcport->port_type == FCT_INITIATOR)
  1974. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  1975. if (fcport->port_type == FCT_TARGET)
  1976. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  1977. fc_remote_port_rolechg(rport, rport_ids.roles);
  1978. }
  1979. /*
  1980. * qla2x00_update_fcport
  1981. * Updates device on list.
  1982. *
  1983. * Input:
  1984. * ha = adapter block pointer.
  1985. * fcport = port structure pointer.
  1986. *
  1987. * Return:
  1988. * 0 - Success
  1989. * BIT_0 - error
  1990. *
  1991. * Context:
  1992. * Kernel context.
  1993. */
  1994. void
  1995. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  1996. {
  1997. struct qla_hw_data *ha = vha->hw;
  1998. fcport->vha = vha;
  1999. fcport->login_retry = 0;
  2000. fcport->port_login_retry_count = ha->port_down_retry_count *
  2001. PORT_RETRY_TIME;
  2002. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  2003. PORT_RETRY_TIME);
  2004. fcport->flags &= ~FCF_LOGIN_NEEDED;
  2005. qla2x00_iidma_fcport(vha, fcport);
  2006. atomic_set(&fcport->state, FCS_ONLINE);
  2007. qla2x00_reg_remote_port(vha, fcport);
  2008. }
  2009. /*
  2010. * qla2x00_configure_fabric
  2011. * Setup SNS devices with loop ID's.
  2012. *
  2013. * Input:
  2014. * ha = adapter block pointer.
  2015. *
  2016. * Returns:
  2017. * 0 = success.
  2018. * BIT_0 = error
  2019. */
  2020. static int
  2021. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2022. {
  2023. int rval, rval2;
  2024. fc_port_t *fcport, *fcptemp;
  2025. uint16_t next_loopid;
  2026. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2027. uint16_t loop_id;
  2028. LIST_HEAD(new_fcports);
  2029. struct qla_hw_data *ha = vha->hw;
  2030. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2031. /* If FL port exists, then SNS is present */
  2032. if (IS_FWI2_CAPABLE(ha))
  2033. loop_id = NPH_F_PORT;
  2034. else
  2035. loop_id = SNS_FL_PORT;
  2036. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2037. if (rval != QLA_SUCCESS) {
  2038. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2039. "Port\n", vha->host_no));
  2040. vha->device_flags &= ~SWITCH_FOUND;
  2041. return (QLA_SUCCESS);
  2042. }
  2043. vha->device_flags |= SWITCH_FOUND;
  2044. /* Mark devices that need re-synchronization. */
  2045. rval2 = qla2x00_device_resync(vha);
  2046. if (rval2 == QLA_RSCNS_HANDLED) {
  2047. /* No point doing the scan, just continue. */
  2048. return (QLA_SUCCESS);
  2049. }
  2050. do {
  2051. /* FDMI support. */
  2052. if (ql2xfdmienable &&
  2053. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2054. qla2x00_fdmi_register(vha);
  2055. /* Ensure we are logged into the SNS. */
  2056. if (IS_FWI2_CAPABLE(ha))
  2057. loop_id = NPH_SNS;
  2058. else
  2059. loop_id = SIMPLE_NAME_SERVER;
  2060. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2061. 0xfc, mb, BIT_1 | BIT_0);
  2062. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2063. DEBUG2(qla_printk(KERN_INFO, ha,
  2064. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2065. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2066. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2067. return (QLA_SUCCESS);
  2068. }
  2069. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2070. if (qla2x00_rft_id(vha)) {
  2071. /* EMPTY */
  2072. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2073. "TYPE failed.\n", vha->host_no));
  2074. }
  2075. if (qla2x00_rff_id(vha)) {
  2076. /* EMPTY */
  2077. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2078. "Features failed.\n", vha->host_no));
  2079. }
  2080. if (qla2x00_rnn_id(vha)) {
  2081. /* EMPTY */
  2082. DEBUG2(printk("scsi(%ld): Register Node Name "
  2083. "failed.\n", vha->host_no));
  2084. } else if (qla2x00_rsnn_nn(vha)) {
  2085. /* EMPTY */
  2086. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2087. "Node Name failed.\n", vha->host_no));
  2088. }
  2089. }
  2090. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2091. if (rval != QLA_SUCCESS)
  2092. break;
  2093. /*
  2094. * Logout all previous fabric devices marked lost, except
  2095. * tape devices.
  2096. */
  2097. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2098. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2099. break;
  2100. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2101. continue;
  2102. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2103. qla2x00_mark_device_lost(vha, fcport,
  2104. ql2xplogiabsentdevice, 0);
  2105. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2106. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2107. fcport->port_type != FCT_INITIATOR &&
  2108. fcport->port_type != FCT_BROADCAST) {
  2109. ha->isp_ops->fabric_logout(vha,
  2110. fcport->loop_id,
  2111. fcport->d_id.b.domain,
  2112. fcport->d_id.b.area,
  2113. fcport->d_id.b.al_pa);
  2114. fcport->loop_id = FC_NO_LOOP_ID;
  2115. }
  2116. }
  2117. }
  2118. /* Starting free loop ID. */
  2119. next_loopid = ha->min_external_loopid;
  2120. /*
  2121. * Scan through our port list and login entries that need to be
  2122. * logged in.
  2123. */
  2124. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2125. if (atomic_read(&vha->loop_down_timer) ||
  2126. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2127. break;
  2128. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2129. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2130. continue;
  2131. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2132. fcport->loop_id = next_loopid;
  2133. rval = qla2x00_find_new_loop_id(
  2134. base_vha, fcport);
  2135. if (rval != QLA_SUCCESS) {
  2136. /* Ran out of IDs to use */
  2137. break;
  2138. }
  2139. }
  2140. /* Login and update database */
  2141. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2142. }
  2143. /* Exit if out of loop IDs. */
  2144. if (rval != QLA_SUCCESS) {
  2145. break;
  2146. }
  2147. /*
  2148. * Login and add the new devices to our port list.
  2149. */
  2150. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2151. if (atomic_read(&vha->loop_down_timer) ||
  2152. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2153. break;
  2154. /* Find a new loop ID to use. */
  2155. fcport->loop_id = next_loopid;
  2156. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2157. if (rval != QLA_SUCCESS) {
  2158. /* Ran out of IDs to use */
  2159. break;
  2160. }
  2161. /* Login and update database */
  2162. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2163. if (vha->vp_idx) {
  2164. fcport->vha = vha;
  2165. fcport->vp_idx = vha->vp_idx;
  2166. }
  2167. list_move_tail(&fcport->list, &vha->vp_fcports);
  2168. }
  2169. } while (0);
  2170. /* Free all new device structures not processed. */
  2171. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2172. list_del(&fcport->list);
  2173. kfree(fcport);
  2174. }
  2175. if (rval) {
  2176. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2177. "rval=%d\n", vha->host_no, rval));
  2178. }
  2179. return (rval);
  2180. }
  2181. /*
  2182. * qla2x00_find_all_fabric_devs
  2183. *
  2184. * Input:
  2185. * ha = adapter block pointer.
  2186. * dev = database device entry pointer.
  2187. *
  2188. * Returns:
  2189. * 0 = success.
  2190. *
  2191. * Context:
  2192. * Kernel context.
  2193. */
  2194. static int
  2195. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2196. struct list_head *new_fcports)
  2197. {
  2198. int rval;
  2199. uint16_t loop_id;
  2200. fc_port_t *fcport, *new_fcport, *fcptemp;
  2201. int found;
  2202. sw_info_t *swl;
  2203. int swl_idx;
  2204. int first_dev, last_dev;
  2205. port_id_t wrap, nxt_d_id;
  2206. struct qla_hw_data *ha = vha->hw;
  2207. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2208. struct scsi_qla_host *tvp;
  2209. rval = QLA_SUCCESS;
  2210. /* Try GID_PT to get device list, else GAN. */
  2211. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2212. if (!swl) {
  2213. /*EMPTY*/
  2214. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2215. "on GA_NXT\n", vha->host_no));
  2216. } else {
  2217. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2218. kfree(swl);
  2219. swl = NULL;
  2220. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2221. kfree(swl);
  2222. swl = NULL;
  2223. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2224. kfree(swl);
  2225. swl = NULL;
  2226. } else if (ql2xiidmaenable &&
  2227. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2228. qla2x00_gpsc(vha, swl);
  2229. }
  2230. }
  2231. swl_idx = 0;
  2232. /* Allocate temporary fcport for any new fcports discovered. */
  2233. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2234. if (new_fcport == NULL) {
  2235. kfree(swl);
  2236. return (QLA_MEMORY_ALLOC_FAILED);
  2237. }
  2238. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2239. /* Set start port ID scan at adapter ID. */
  2240. first_dev = 1;
  2241. last_dev = 0;
  2242. /* Starting free loop ID. */
  2243. loop_id = ha->min_external_loopid;
  2244. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2245. if (qla2x00_is_reserved_id(vha, loop_id))
  2246. continue;
  2247. if (atomic_read(&vha->loop_down_timer) || LOOP_TRANSITION(vha))
  2248. break;
  2249. if (swl != NULL) {
  2250. if (last_dev) {
  2251. wrap.b24 = new_fcport->d_id.b24;
  2252. } else {
  2253. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2254. memcpy(new_fcport->node_name,
  2255. swl[swl_idx].node_name, WWN_SIZE);
  2256. memcpy(new_fcport->port_name,
  2257. swl[swl_idx].port_name, WWN_SIZE);
  2258. memcpy(new_fcport->fabric_port_name,
  2259. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2260. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2261. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2262. last_dev = 1;
  2263. }
  2264. swl_idx++;
  2265. }
  2266. } else {
  2267. /* Send GA_NXT to the switch */
  2268. rval = qla2x00_ga_nxt(vha, new_fcport);
  2269. if (rval != QLA_SUCCESS) {
  2270. qla_printk(KERN_WARNING, ha,
  2271. "SNS scan failed -- assuming zero-entry "
  2272. "result...\n");
  2273. list_for_each_entry_safe(fcport, fcptemp,
  2274. new_fcports, list) {
  2275. list_del(&fcport->list);
  2276. kfree(fcport);
  2277. }
  2278. rval = QLA_SUCCESS;
  2279. break;
  2280. }
  2281. }
  2282. /* If wrap on switch device list, exit. */
  2283. if (first_dev) {
  2284. wrap.b24 = new_fcport->d_id.b24;
  2285. first_dev = 0;
  2286. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2287. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2288. vha->host_no, new_fcport->d_id.b.domain,
  2289. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2290. break;
  2291. }
  2292. /* Bypass if same physical adapter. */
  2293. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2294. continue;
  2295. /* Bypass virtual ports of the same host. */
  2296. found = 0;
  2297. if (ha->num_vhosts) {
  2298. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2299. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2300. found = 1;
  2301. break;
  2302. }
  2303. }
  2304. if (found)
  2305. continue;
  2306. }
  2307. /* Bypass if same domain and area of adapter. */
  2308. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2309. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2310. ISP_CFG_FL)
  2311. continue;
  2312. /* Bypass reserved domain fields. */
  2313. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2314. continue;
  2315. /* Locate matching device in database. */
  2316. found = 0;
  2317. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2318. if (memcmp(new_fcport->port_name, fcport->port_name,
  2319. WWN_SIZE))
  2320. continue;
  2321. found++;
  2322. /* Update port state. */
  2323. memcpy(fcport->fabric_port_name,
  2324. new_fcport->fabric_port_name, WWN_SIZE);
  2325. fcport->fp_speed = new_fcport->fp_speed;
  2326. /*
  2327. * If address the same and state FCS_ONLINE, nothing
  2328. * changed.
  2329. */
  2330. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2331. atomic_read(&fcport->state) == FCS_ONLINE) {
  2332. break;
  2333. }
  2334. /*
  2335. * If device was not a fabric device before.
  2336. */
  2337. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2338. fcport->d_id.b24 = new_fcport->d_id.b24;
  2339. fcport->loop_id = FC_NO_LOOP_ID;
  2340. fcport->flags |= (FCF_FABRIC_DEVICE |
  2341. FCF_LOGIN_NEEDED);
  2342. break;
  2343. }
  2344. /*
  2345. * Port ID changed or device was marked to be updated;
  2346. * Log it out if still logged in and mark it for
  2347. * relogin later.
  2348. */
  2349. fcport->d_id.b24 = new_fcport->d_id.b24;
  2350. fcport->flags |= FCF_LOGIN_NEEDED;
  2351. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2352. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2353. fcport->port_type != FCT_INITIATOR &&
  2354. fcport->port_type != FCT_BROADCAST) {
  2355. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2356. fcport->d_id.b.domain, fcport->d_id.b.area,
  2357. fcport->d_id.b.al_pa);
  2358. fcport->loop_id = FC_NO_LOOP_ID;
  2359. }
  2360. break;
  2361. }
  2362. if (found)
  2363. continue;
  2364. /* If device was not in our fcports list, then add it. */
  2365. list_add_tail(&new_fcport->list, new_fcports);
  2366. /* Allocate a new replacement fcport. */
  2367. nxt_d_id.b24 = new_fcport->d_id.b24;
  2368. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2369. if (new_fcport == NULL) {
  2370. kfree(swl);
  2371. return (QLA_MEMORY_ALLOC_FAILED);
  2372. }
  2373. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2374. new_fcport->d_id.b24 = nxt_d_id.b24;
  2375. }
  2376. kfree(swl);
  2377. kfree(new_fcport);
  2378. return (rval);
  2379. }
  2380. /*
  2381. * qla2x00_find_new_loop_id
  2382. * Scan through our port list and find a new usable loop ID.
  2383. *
  2384. * Input:
  2385. * ha: adapter state pointer.
  2386. * dev: port structure pointer.
  2387. *
  2388. * Returns:
  2389. * qla2x00 local function return status code.
  2390. *
  2391. * Context:
  2392. * Kernel context.
  2393. */
  2394. static int
  2395. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2396. {
  2397. int rval;
  2398. int found;
  2399. fc_port_t *fcport;
  2400. uint16_t first_loop_id;
  2401. struct qla_hw_data *ha = vha->hw;
  2402. struct scsi_qla_host *vp;
  2403. struct scsi_qla_host *tvp;
  2404. rval = QLA_SUCCESS;
  2405. /* Save starting loop ID. */
  2406. first_loop_id = dev->loop_id;
  2407. for (;;) {
  2408. /* Skip loop ID if already used by adapter. */
  2409. if (dev->loop_id == vha->loop_id)
  2410. dev->loop_id++;
  2411. /* Skip reserved loop IDs. */
  2412. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2413. dev->loop_id++;
  2414. /* Reset loop ID if passed the end. */
  2415. if (dev->loop_id > ha->max_loop_id) {
  2416. /* first loop ID. */
  2417. dev->loop_id = ha->min_external_loopid;
  2418. }
  2419. /* Check for loop ID being already in use. */
  2420. found = 0;
  2421. fcport = NULL;
  2422. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2423. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2424. if (fcport->loop_id == dev->loop_id &&
  2425. fcport != dev) {
  2426. /* ID possibly in use */
  2427. found++;
  2428. break;
  2429. }
  2430. }
  2431. if (found)
  2432. break;
  2433. }
  2434. /* If not in use then it is free to use. */
  2435. if (!found) {
  2436. break;
  2437. }
  2438. /* ID in use. Try next value. */
  2439. dev->loop_id++;
  2440. /* If wrap around. No free ID to use. */
  2441. if (dev->loop_id == first_loop_id) {
  2442. dev->loop_id = FC_NO_LOOP_ID;
  2443. rval = QLA_FUNCTION_FAILED;
  2444. break;
  2445. }
  2446. }
  2447. return (rval);
  2448. }
  2449. /*
  2450. * qla2x00_device_resync
  2451. * Marks devices in the database that needs resynchronization.
  2452. *
  2453. * Input:
  2454. * ha = adapter block pointer.
  2455. *
  2456. * Context:
  2457. * Kernel context.
  2458. */
  2459. static int
  2460. qla2x00_device_resync(scsi_qla_host_t *vha)
  2461. {
  2462. int rval;
  2463. uint32_t mask;
  2464. fc_port_t *fcport;
  2465. uint32_t rscn_entry;
  2466. uint8_t rscn_out_iter;
  2467. uint8_t format;
  2468. port_id_t d_id;
  2469. rval = QLA_RSCNS_HANDLED;
  2470. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  2471. vha->flags.rscn_queue_overflow) {
  2472. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  2473. format = MSB(MSW(rscn_entry));
  2474. d_id.b.domain = LSB(MSW(rscn_entry));
  2475. d_id.b.area = MSB(LSW(rscn_entry));
  2476. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2477. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2478. "[%02x/%02x%02x%02x].\n",
  2479. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  2480. d_id.b.area, d_id.b.al_pa));
  2481. vha->rscn_out_ptr++;
  2482. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  2483. vha->rscn_out_ptr = 0;
  2484. /* Skip duplicate entries. */
  2485. for (rscn_out_iter = vha->rscn_out_ptr;
  2486. !vha->flags.rscn_queue_overflow &&
  2487. rscn_out_iter != vha->rscn_in_ptr;
  2488. rscn_out_iter = (rscn_out_iter ==
  2489. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2490. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  2491. break;
  2492. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2493. "entry found at [%d].\n", vha->host_no,
  2494. rscn_out_iter));
  2495. vha->rscn_out_ptr = rscn_out_iter;
  2496. }
  2497. /* Queue overflow, set switch default case. */
  2498. if (vha->flags.rscn_queue_overflow) {
  2499. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2500. "overflow.\n", vha->host_no));
  2501. format = 3;
  2502. vha->flags.rscn_queue_overflow = 0;
  2503. }
  2504. switch (format) {
  2505. case 0:
  2506. mask = 0xffffff;
  2507. break;
  2508. case 1:
  2509. mask = 0xffff00;
  2510. break;
  2511. case 2:
  2512. mask = 0xff0000;
  2513. break;
  2514. default:
  2515. mask = 0x0;
  2516. d_id.b24 = 0;
  2517. vha->rscn_out_ptr = vha->rscn_in_ptr;
  2518. break;
  2519. }
  2520. rval = QLA_SUCCESS;
  2521. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2522. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2523. (fcport->d_id.b24 & mask) != d_id.b24 ||
  2524. fcport->port_type == FCT_BROADCAST)
  2525. continue;
  2526. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2527. if (format != 3 ||
  2528. fcport->port_type != FCT_INITIATOR) {
  2529. qla2x00_mark_device_lost(vha, fcport,
  2530. 0, 0);
  2531. }
  2532. }
  2533. }
  2534. }
  2535. return (rval);
  2536. }
  2537. /*
  2538. * qla2x00_fabric_dev_login
  2539. * Login fabric target device and update FC port database.
  2540. *
  2541. * Input:
  2542. * ha: adapter state pointer.
  2543. * fcport: port structure list pointer.
  2544. * next_loopid: contains value of a new loop ID that can be used
  2545. * by the next login attempt.
  2546. *
  2547. * Returns:
  2548. * qla2x00 local function return status code.
  2549. *
  2550. * Context:
  2551. * Kernel context.
  2552. */
  2553. static int
  2554. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2555. uint16_t *next_loopid)
  2556. {
  2557. int rval;
  2558. int retry;
  2559. uint8_t opts;
  2560. struct qla_hw_data *ha = vha->hw;
  2561. rval = QLA_SUCCESS;
  2562. retry = 0;
  2563. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  2564. if (rval == QLA_SUCCESS) {
  2565. /* Send an ADISC to tape devices.*/
  2566. opts = 0;
  2567. if (fcport->flags & FCF_TAPE_PRESENT)
  2568. opts |= BIT_1;
  2569. rval = qla2x00_get_port_database(vha, fcport, opts);
  2570. if (rval != QLA_SUCCESS) {
  2571. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2572. fcport->d_id.b.domain, fcport->d_id.b.area,
  2573. fcport->d_id.b.al_pa);
  2574. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2575. } else {
  2576. qla2x00_update_fcport(vha, fcport);
  2577. }
  2578. }
  2579. return (rval);
  2580. }
  2581. /*
  2582. * qla2x00_fabric_login
  2583. * Issue fabric login command.
  2584. *
  2585. * Input:
  2586. * ha = adapter block pointer.
  2587. * device = pointer to FC device type structure.
  2588. *
  2589. * Returns:
  2590. * 0 - Login successfully
  2591. * 1 - Login failed
  2592. * 2 - Initiator device
  2593. * 3 - Fatal error
  2594. */
  2595. int
  2596. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2597. uint16_t *next_loopid)
  2598. {
  2599. int rval;
  2600. int retry;
  2601. uint16_t tmp_loopid;
  2602. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2603. struct qla_hw_data *ha = vha->hw;
  2604. retry = 0;
  2605. tmp_loopid = 0;
  2606. for (;;) {
  2607. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  2608. "for port %02x%02x%02x.\n",
  2609. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  2610. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2611. /* Login fcport on switch. */
  2612. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  2613. fcport->d_id.b.domain, fcport->d_id.b.area,
  2614. fcport->d_id.b.al_pa, mb, BIT_0);
  2615. if (mb[0] == MBS_PORT_ID_USED) {
  2616. /*
  2617. * Device has another loop ID. The firmware team
  2618. * recommends the driver perform an implicit login with
  2619. * the specified ID again. The ID we just used is save
  2620. * here so we return with an ID that can be tried by
  2621. * the next login.
  2622. */
  2623. retry++;
  2624. tmp_loopid = fcport->loop_id;
  2625. fcport->loop_id = mb[1];
  2626. DEBUG(printk("Fabric Login: port in use - next "
  2627. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  2628. fcport->loop_id, fcport->d_id.b.domain,
  2629. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2630. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  2631. /*
  2632. * Login succeeded.
  2633. */
  2634. if (retry) {
  2635. /* A retry occurred before. */
  2636. *next_loopid = tmp_loopid;
  2637. } else {
  2638. /*
  2639. * No retry occurred before. Just increment the
  2640. * ID value for next login.
  2641. */
  2642. *next_loopid = (fcport->loop_id + 1);
  2643. }
  2644. if (mb[1] & BIT_0) {
  2645. fcport->port_type = FCT_INITIATOR;
  2646. } else {
  2647. fcport->port_type = FCT_TARGET;
  2648. if (mb[1] & BIT_1) {
  2649. fcport->flags |= FCF_TAPE_PRESENT;
  2650. }
  2651. }
  2652. if (mb[10] & BIT_0)
  2653. fcport->supported_classes |= FC_COS_CLASS2;
  2654. if (mb[10] & BIT_1)
  2655. fcport->supported_classes |= FC_COS_CLASS3;
  2656. rval = QLA_SUCCESS;
  2657. break;
  2658. } else if (mb[0] == MBS_LOOP_ID_USED) {
  2659. /*
  2660. * Loop ID already used, try next loop ID.
  2661. */
  2662. fcport->loop_id++;
  2663. rval = qla2x00_find_new_loop_id(vha, fcport);
  2664. if (rval != QLA_SUCCESS) {
  2665. /* Ran out of loop IDs to use */
  2666. break;
  2667. }
  2668. } else if (mb[0] == MBS_COMMAND_ERROR) {
  2669. /*
  2670. * Firmware possibly timed out during login. If NO
  2671. * retries are left to do then the device is declared
  2672. * dead.
  2673. */
  2674. *next_loopid = fcport->loop_id;
  2675. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2676. fcport->d_id.b.domain, fcport->d_id.b.area,
  2677. fcport->d_id.b.al_pa);
  2678. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2679. rval = 1;
  2680. break;
  2681. } else {
  2682. /*
  2683. * unrecoverable / not handled error
  2684. */
  2685. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  2686. "loop_id=%x jiffies=%lx.\n",
  2687. __func__, vha->host_no, mb[0],
  2688. fcport->d_id.b.domain, fcport->d_id.b.area,
  2689. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  2690. *next_loopid = fcport->loop_id;
  2691. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2692. fcport->d_id.b.domain, fcport->d_id.b.area,
  2693. fcport->d_id.b.al_pa);
  2694. fcport->loop_id = FC_NO_LOOP_ID;
  2695. fcport->login_retry = 0;
  2696. rval = 3;
  2697. break;
  2698. }
  2699. }
  2700. return (rval);
  2701. }
  2702. /*
  2703. * qla2x00_local_device_login
  2704. * Issue local device login command.
  2705. *
  2706. * Input:
  2707. * ha = adapter block pointer.
  2708. * loop_id = loop id of device to login to.
  2709. *
  2710. * Returns (Where's the #define!!!!):
  2711. * 0 - Login successfully
  2712. * 1 - Login failed
  2713. * 3 - Fatal error
  2714. */
  2715. int
  2716. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  2717. {
  2718. int rval;
  2719. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2720. memset(mb, 0, sizeof(mb));
  2721. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  2722. if (rval == QLA_SUCCESS) {
  2723. /* Interrogate mailbox registers for any errors */
  2724. if (mb[0] == MBS_COMMAND_ERROR)
  2725. rval = 1;
  2726. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  2727. /* device not in PCB table */
  2728. rval = 3;
  2729. }
  2730. return (rval);
  2731. }
  2732. /*
  2733. * qla2x00_loop_resync
  2734. * Resync with fibre channel devices.
  2735. *
  2736. * Input:
  2737. * ha = adapter block pointer.
  2738. *
  2739. * Returns:
  2740. * 0 = success
  2741. */
  2742. int
  2743. qla2x00_loop_resync(scsi_qla_host_t *vha)
  2744. {
  2745. int rval = QLA_SUCCESS;
  2746. uint32_t wait_time;
  2747. struct req_que *req;
  2748. struct rsp_que *rsp;
  2749. if (ql2xmultique_tag)
  2750. req = vha->hw->req_q_map[0];
  2751. else
  2752. req = vha->req;
  2753. rsp = req->rsp;
  2754. atomic_set(&vha->loop_state, LOOP_UPDATE);
  2755. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2756. if (vha->flags.online) {
  2757. if (!(rval = qla2x00_fw_ready(vha))) {
  2758. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2759. wait_time = 256;
  2760. do {
  2761. atomic_set(&vha->loop_state, LOOP_UPDATE);
  2762. /* Issue a marker after FW becomes ready. */
  2763. qla2x00_marker(vha, req, rsp, 0, 0,
  2764. MK_SYNC_ALL);
  2765. vha->marker_needed = 0;
  2766. /* Remap devices on Loop. */
  2767. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2768. qla2x00_configure_loop(vha);
  2769. wait_time--;
  2770. } while (!atomic_read(&vha->loop_down_timer) &&
  2771. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2772. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  2773. &vha->dpc_flags)));
  2774. }
  2775. }
  2776. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2777. return (QLA_FUNCTION_FAILED);
  2778. if (rval)
  2779. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  2780. return (rval);
  2781. }
  2782. void
  2783. qla2x00_update_fcports(scsi_qla_host_t *vha)
  2784. {
  2785. fc_port_t *fcport;
  2786. /* Go with deferred removal of rport references. */
  2787. list_for_each_entry(fcport, &vha->vp_fcports, list)
  2788. if (fcport && fcport->drport &&
  2789. atomic_read(&fcport->state) != FCS_UNCONFIGURED)
  2790. qla2x00_rport_del(fcport);
  2791. }
  2792. /*
  2793. * qla2x00_abort_isp
  2794. * Resets ISP and aborts all outstanding commands.
  2795. *
  2796. * Input:
  2797. * ha = adapter block pointer.
  2798. *
  2799. * Returns:
  2800. * 0 = success
  2801. */
  2802. int
  2803. qla2x00_abort_isp(scsi_qla_host_t *vha)
  2804. {
  2805. int rval;
  2806. uint8_t status = 0;
  2807. struct qla_hw_data *ha = vha->hw;
  2808. struct scsi_qla_host *vp;
  2809. struct scsi_qla_host *tvp;
  2810. struct req_que *req = ha->req_q_map[0];
  2811. if (vha->flags.online) {
  2812. vha->flags.online = 0;
  2813. ha->flags.chip_reset_done = 0;
  2814. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  2815. ha->qla_stats.total_isp_aborts++;
  2816. qla_printk(KERN_INFO, ha,
  2817. "Performing ISP error recovery - ha= %p.\n", ha);
  2818. ha->isp_ops->reset_chip(vha);
  2819. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  2820. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  2821. atomic_set(&vha->loop_state, LOOP_DOWN);
  2822. qla2x00_mark_all_devices_lost(vha, 0);
  2823. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list)
  2824. qla2x00_mark_all_devices_lost(vp, 0);
  2825. } else {
  2826. if (!atomic_read(&vha->loop_down_timer))
  2827. atomic_set(&vha->loop_down_timer,
  2828. LOOP_DOWN_TIME);
  2829. }
  2830. /* Requeue all commands in outstanding command list. */
  2831. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  2832. ha->isp_ops->get_flash_version(vha, req->ring);
  2833. ha->isp_ops->nvram_config(vha);
  2834. if (!qla2x00_restart_isp(vha)) {
  2835. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2836. if (!atomic_read(&vha->loop_down_timer)) {
  2837. /*
  2838. * Issue marker command only when we are going
  2839. * to start the I/O .
  2840. */
  2841. vha->marker_needed = 1;
  2842. }
  2843. vha->flags.online = 1;
  2844. ha->isp_ops->enable_intrs(ha);
  2845. ha->isp_abort_cnt = 0;
  2846. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2847. if (ha->fce) {
  2848. ha->flags.fce_enabled = 1;
  2849. memset(ha->fce, 0,
  2850. fce_calc_size(ha->fce_bufs));
  2851. rval = qla2x00_enable_fce_trace(vha,
  2852. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  2853. &ha->fce_bufs);
  2854. if (rval) {
  2855. qla_printk(KERN_WARNING, ha,
  2856. "Unable to reinitialize FCE "
  2857. "(%d).\n", rval);
  2858. ha->flags.fce_enabled = 0;
  2859. }
  2860. }
  2861. if (ha->eft) {
  2862. memset(ha->eft, 0, EFT_SIZE);
  2863. rval = qla2x00_enable_eft_trace(vha,
  2864. ha->eft_dma, EFT_NUM_BUFFERS);
  2865. if (rval) {
  2866. qla_printk(KERN_WARNING, ha,
  2867. "Unable to reinitialize EFT "
  2868. "(%d).\n", rval);
  2869. }
  2870. }
  2871. } else { /* failed the ISP abort */
  2872. vha->flags.online = 1;
  2873. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  2874. if (ha->isp_abort_cnt == 0) {
  2875. qla_printk(KERN_WARNING, ha,
  2876. "ISP error recovery failed - "
  2877. "board disabled\n");
  2878. /*
  2879. * The next call disables the board
  2880. * completely.
  2881. */
  2882. ha->isp_ops->reset_adapter(vha);
  2883. vha->flags.online = 0;
  2884. clear_bit(ISP_ABORT_RETRY,
  2885. &vha->dpc_flags);
  2886. status = 0;
  2887. } else { /* schedule another ISP abort */
  2888. ha->isp_abort_cnt--;
  2889. DEBUG(printk("qla%ld: ISP abort - "
  2890. "retry remaining %d\n",
  2891. vha->host_no, ha->isp_abort_cnt));
  2892. status = 1;
  2893. }
  2894. } else {
  2895. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  2896. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  2897. "- retrying (%d) more times\n",
  2898. vha->host_no, ha->isp_abort_cnt));
  2899. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2900. status = 1;
  2901. }
  2902. }
  2903. }
  2904. if (!status) {
  2905. DEBUG(printk(KERN_INFO
  2906. "qla2x00_abort_isp(%ld): succeeded.\n",
  2907. vha->host_no));
  2908. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2909. if (vp->vp_idx)
  2910. qla2x00_vp_abort_isp(vp);
  2911. }
  2912. } else {
  2913. qla_printk(KERN_INFO, ha,
  2914. "qla2x00_abort_isp: **** FAILED ****\n");
  2915. }
  2916. return(status);
  2917. }
  2918. /*
  2919. * qla2x00_restart_isp
  2920. * restarts the ISP after a reset
  2921. *
  2922. * Input:
  2923. * ha = adapter block pointer.
  2924. *
  2925. * Returns:
  2926. * 0 = success
  2927. */
  2928. static int
  2929. qla2x00_restart_isp(scsi_qla_host_t *vha)
  2930. {
  2931. int status = 0;
  2932. uint32_t wait_time;
  2933. struct qla_hw_data *ha = vha->hw;
  2934. struct req_que *req = ha->req_q_map[0];
  2935. struct rsp_que *rsp = ha->rsp_q_map[0];
  2936. /* If firmware needs to be loaded */
  2937. if (qla2x00_isp_firmware(vha)) {
  2938. vha->flags.online = 0;
  2939. status = ha->isp_ops->chip_diag(vha);
  2940. if (!status)
  2941. status = qla2x00_setup_chip(vha);
  2942. }
  2943. if (!status && !(status = qla2x00_init_rings(vha))) {
  2944. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2945. ha->flags.chip_reset_done = 1;
  2946. /* Initialize the queues in use */
  2947. qla25xx_init_queues(ha);
  2948. status = qla2x00_fw_ready(vha);
  2949. if (!status) {
  2950. DEBUG(printk("%s(): Start configure loop, "
  2951. "status = %d\n", __func__, status));
  2952. /* Issue a marker after FW becomes ready. */
  2953. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  2954. vha->flags.online = 1;
  2955. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2956. wait_time = 256;
  2957. do {
  2958. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2959. qla2x00_configure_loop(vha);
  2960. wait_time--;
  2961. } while (!atomic_read(&vha->loop_down_timer) &&
  2962. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2963. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  2964. &vha->dpc_flags)));
  2965. }
  2966. /* if no cable then assume it's good */
  2967. if ((vha->device_flags & DFLG_NO_CABLE))
  2968. status = 0;
  2969. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  2970. __func__,
  2971. status));
  2972. }
  2973. return (status);
  2974. }
  2975. static int
  2976. qla25xx_init_queues(struct qla_hw_data *ha)
  2977. {
  2978. struct rsp_que *rsp = NULL;
  2979. struct req_que *req = NULL;
  2980. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2981. int ret = -1;
  2982. int i;
  2983. for (i = 1; i < ha->max_rsp_queues; i++) {
  2984. rsp = ha->rsp_q_map[i];
  2985. if (rsp) {
  2986. rsp->options &= ~BIT_0;
  2987. ret = qla25xx_init_rsp_que(base_vha, rsp);
  2988. if (ret != QLA_SUCCESS)
  2989. DEBUG2_17(printk(KERN_WARNING
  2990. "%s Rsp que:%d init failed\n", __func__,
  2991. rsp->id));
  2992. else
  2993. DEBUG2_17(printk(KERN_INFO
  2994. "%s Rsp que:%d inited\n", __func__,
  2995. rsp->id));
  2996. }
  2997. }
  2998. for (i = 1; i < ha->max_req_queues; i++) {
  2999. req = ha->req_q_map[i];
  3000. if (req) {
  3001. /* Clear outstanding commands array. */
  3002. req->options &= ~BIT_0;
  3003. ret = qla25xx_init_req_que(base_vha, req);
  3004. if (ret != QLA_SUCCESS)
  3005. DEBUG2_17(printk(KERN_WARNING
  3006. "%s Req que:%d init failed\n", __func__,
  3007. req->id));
  3008. else
  3009. DEBUG2_17(printk(KERN_WARNING
  3010. "%s Req que:%d inited\n", __func__,
  3011. req->id));
  3012. }
  3013. }
  3014. return ret;
  3015. }
  3016. /*
  3017. * qla2x00_reset_adapter
  3018. * Reset adapter.
  3019. *
  3020. * Input:
  3021. * ha = adapter block pointer.
  3022. */
  3023. void
  3024. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3025. {
  3026. unsigned long flags = 0;
  3027. struct qla_hw_data *ha = vha->hw;
  3028. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3029. vha->flags.online = 0;
  3030. ha->isp_ops->disable_intrs(ha);
  3031. spin_lock_irqsave(&ha->hardware_lock, flags);
  3032. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3033. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3034. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3035. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3036. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3037. }
  3038. void
  3039. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3040. {
  3041. unsigned long flags = 0;
  3042. struct qla_hw_data *ha = vha->hw;
  3043. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3044. vha->flags.online = 0;
  3045. ha->isp_ops->disable_intrs(ha);
  3046. spin_lock_irqsave(&ha->hardware_lock, flags);
  3047. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3048. RD_REG_DWORD(&reg->hccr);
  3049. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3050. RD_REG_DWORD(&reg->hccr);
  3051. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3052. if (IS_NOPOLLING_TYPE(ha))
  3053. ha->isp_ops->enable_intrs(ha);
  3054. }
  3055. /* On sparc systems, obtain port and node WWN from firmware
  3056. * properties.
  3057. */
  3058. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3059. struct nvram_24xx *nv)
  3060. {
  3061. #ifdef CONFIG_SPARC
  3062. struct qla_hw_data *ha = vha->hw;
  3063. struct pci_dev *pdev = ha->pdev;
  3064. struct device_node *dp = pci_device_to_OF_node(pdev);
  3065. const u8 *val;
  3066. int len;
  3067. val = of_get_property(dp, "port-wwn", &len);
  3068. if (val && len >= WWN_SIZE)
  3069. memcpy(nv->port_name, val, WWN_SIZE);
  3070. val = of_get_property(dp, "node-wwn", &len);
  3071. if (val && len >= WWN_SIZE)
  3072. memcpy(nv->node_name, val, WWN_SIZE);
  3073. #endif
  3074. }
  3075. int
  3076. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3077. {
  3078. int rval;
  3079. struct init_cb_24xx *icb;
  3080. struct nvram_24xx *nv;
  3081. uint32_t *dptr;
  3082. uint8_t *dptr1, *dptr2;
  3083. uint32_t chksum;
  3084. uint16_t cnt;
  3085. struct qla_hw_data *ha = vha->hw;
  3086. rval = QLA_SUCCESS;
  3087. icb = (struct init_cb_24xx *)ha->init_cb;
  3088. nv = ha->nvram;
  3089. /* Determine NVRAM starting address. */
  3090. if (ha->flags.port0) {
  3091. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3092. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3093. } else {
  3094. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3095. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3096. }
  3097. ha->nvram_size = sizeof(struct nvram_24xx);
  3098. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3099. /* Get VPD data into cache */
  3100. ha->vpd = ha->nvram + VPD_OFFSET;
  3101. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3102. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3103. /* Get NVRAM data into cache and calculate checksum. */
  3104. dptr = (uint32_t *)nv;
  3105. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3106. ha->nvram_size);
  3107. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3108. chksum += le32_to_cpu(*dptr++);
  3109. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3110. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3111. /* Bad NVRAM data, set defaults parameters. */
  3112. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3113. || nv->id[3] != ' ' ||
  3114. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3115. /* Reset NVRAM data. */
  3116. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3117. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3118. le16_to_cpu(nv->nvram_version));
  3119. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3120. "invalid -- WWPN) defaults.\n");
  3121. /*
  3122. * Set default initialization control block.
  3123. */
  3124. memset(nv, 0, ha->nvram_size);
  3125. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3126. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3127. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3128. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3129. nv->exchange_count = __constant_cpu_to_le16(0);
  3130. nv->hard_address = __constant_cpu_to_le16(124);
  3131. nv->port_name[0] = 0x21;
  3132. nv->port_name[1] = 0x00 + ha->port_no;
  3133. nv->port_name[2] = 0x00;
  3134. nv->port_name[3] = 0xe0;
  3135. nv->port_name[4] = 0x8b;
  3136. nv->port_name[5] = 0x1c;
  3137. nv->port_name[6] = 0x55;
  3138. nv->port_name[7] = 0x86;
  3139. nv->node_name[0] = 0x20;
  3140. nv->node_name[1] = 0x00;
  3141. nv->node_name[2] = 0x00;
  3142. nv->node_name[3] = 0xe0;
  3143. nv->node_name[4] = 0x8b;
  3144. nv->node_name[5] = 0x1c;
  3145. nv->node_name[6] = 0x55;
  3146. nv->node_name[7] = 0x86;
  3147. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3148. nv->login_retry_count = __constant_cpu_to_le16(8);
  3149. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3150. nv->login_timeout = __constant_cpu_to_le16(0);
  3151. nv->firmware_options_1 =
  3152. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3153. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3154. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3155. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3156. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3157. nv->efi_parameters = __constant_cpu_to_le32(0);
  3158. nv->reset_delay = 5;
  3159. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3160. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3161. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3162. rval = 1;
  3163. }
  3164. /* Reset Initialization control block */
  3165. memset(icb, 0, ha->init_cb_size);
  3166. /* Copy 1st segment. */
  3167. dptr1 = (uint8_t *)icb;
  3168. dptr2 = (uint8_t *)&nv->version;
  3169. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3170. while (cnt--)
  3171. *dptr1++ = *dptr2++;
  3172. icb->login_retry_count = nv->login_retry_count;
  3173. icb->link_down_on_nos = nv->link_down_on_nos;
  3174. /* Copy 2nd segment. */
  3175. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3176. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3177. cnt = (uint8_t *)&icb->reserved_3 -
  3178. (uint8_t *)&icb->interrupt_delay_timer;
  3179. while (cnt--)
  3180. *dptr1++ = *dptr2++;
  3181. /*
  3182. * Setup driver NVRAM options.
  3183. */
  3184. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3185. "QLA2462");
  3186. /* Use alternate WWN? */
  3187. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3188. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3189. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3190. }
  3191. /* Prepare nodename */
  3192. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3193. /*
  3194. * Firmware will apply the following mask if the nodename was
  3195. * not provided.
  3196. */
  3197. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3198. icb->node_name[0] &= 0xF0;
  3199. }
  3200. /* Set host adapter parameters. */
  3201. ha->flags.disable_risc_code_load = 0;
  3202. ha->flags.enable_lip_reset = 0;
  3203. ha->flags.enable_lip_full_login =
  3204. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3205. ha->flags.enable_target_reset =
  3206. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3207. ha->flags.enable_led_scheme = 0;
  3208. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3209. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3210. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3211. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3212. sizeof(ha->fw_seriallink_options24));
  3213. /* save HBA serial number */
  3214. ha->serial0 = icb->port_name[5];
  3215. ha->serial1 = icb->port_name[6];
  3216. ha->serial2 = icb->port_name[7];
  3217. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3218. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3219. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3220. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3221. /* Set minimum login_timeout to 4 seconds. */
  3222. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3223. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3224. if (le16_to_cpu(nv->login_timeout) < 4)
  3225. nv->login_timeout = __constant_cpu_to_le16(4);
  3226. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3227. icb->login_timeout = nv->login_timeout;
  3228. /* Set minimum RATOV to 100 tenths of a second. */
  3229. ha->r_a_tov = 100;
  3230. ha->loop_reset_delay = nv->reset_delay;
  3231. /* Link Down Timeout = 0:
  3232. *
  3233. * When Port Down timer expires we will start returning
  3234. * I/O's to OS with "DID_NO_CONNECT".
  3235. *
  3236. * Link Down Timeout != 0:
  3237. *
  3238. * The driver waits for the link to come up after link down
  3239. * before returning I/Os to OS with "DID_NO_CONNECT".
  3240. */
  3241. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3242. ha->loop_down_abort_time =
  3243. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3244. } else {
  3245. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3246. ha->loop_down_abort_time =
  3247. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3248. }
  3249. /* Need enough time to try and get the port back. */
  3250. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3251. if (qlport_down_retry)
  3252. ha->port_down_retry_count = qlport_down_retry;
  3253. /* Set login_retry_count */
  3254. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3255. if (ha->port_down_retry_count ==
  3256. le16_to_cpu(nv->port_down_retry_count) &&
  3257. ha->port_down_retry_count > 3)
  3258. ha->login_retry_count = ha->port_down_retry_count;
  3259. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3260. ha->login_retry_count = ha->port_down_retry_count;
  3261. if (ql2xloginretrycount)
  3262. ha->login_retry_count = ql2xloginretrycount;
  3263. /* Enable ZIO. */
  3264. if (!vha->flags.init_done) {
  3265. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3266. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3267. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3268. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3269. }
  3270. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3271. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3272. vha->flags.process_response_queue = 0;
  3273. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3274. ha->zio_mode = QLA_ZIO_MODE_6;
  3275. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3276. "(%d us).\n", vha->host_no, ha->zio_mode,
  3277. ha->zio_timer * 100));
  3278. qla_printk(KERN_INFO, ha,
  3279. "ZIO mode %d enabled; timer delay (%d us).\n",
  3280. ha->zio_mode, ha->zio_timer * 100);
  3281. icb->firmware_options_2 |= cpu_to_le32(
  3282. (uint32_t)ha->zio_mode);
  3283. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3284. vha->flags.process_response_queue = 1;
  3285. }
  3286. if (rval) {
  3287. DEBUG2_3(printk(KERN_WARNING
  3288. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3289. }
  3290. return (rval);
  3291. }
  3292. static int
  3293. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
  3294. uint32_t faddr)
  3295. {
  3296. int rval = QLA_SUCCESS;
  3297. int segments, fragment;
  3298. uint32_t *dcode, dlen;
  3299. uint32_t risc_addr;
  3300. uint32_t risc_size;
  3301. uint32_t i;
  3302. struct qla_hw_data *ha = vha->hw;
  3303. struct req_que *req = ha->req_q_map[0];
  3304. qla_printk(KERN_INFO, ha,
  3305. "FW: Loading from flash (%x)...\n", faddr);
  3306. rval = QLA_SUCCESS;
  3307. segments = FA_RISC_CODE_SEGMENTS;
  3308. dcode = (uint32_t *)req->ring;
  3309. *srisc_addr = 0;
  3310. /* Validate firmware image by checking version. */
  3311. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3312. for (i = 0; i < 4; i++)
  3313. dcode[i] = be32_to_cpu(dcode[i]);
  3314. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3315. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3316. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3317. dcode[3] == 0)) {
  3318. qla_printk(KERN_WARNING, ha,
  3319. "Unable to verify integrity of flash firmware image!\n");
  3320. qla_printk(KERN_WARNING, ha,
  3321. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3322. dcode[1], dcode[2], dcode[3]);
  3323. return QLA_FUNCTION_FAILED;
  3324. }
  3325. while (segments && rval == QLA_SUCCESS) {
  3326. /* Read segment's load information. */
  3327. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  3328. risc_addr = be32_to_cpu(dcode[2]);
  3329. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3330. risc_size = be32_to_cpu(dcode[3]);
  3331. fragment = 0;
  3332. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3333. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3334. if (dlen > risc_size)
  3335. dlen = risc_size;
  3336. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3337. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3338. vha->host_no, risc_addr, dlen, faddr));
  3339. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  3340. for (i = 0; i < dlen; i++)
  3341. dcode[i] = swab32(dcode[i]);
  3342. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3343. dlen);
  3344. if (rval) {
  3345. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3346. "segment %d of firmware\n", vha->host_no,
  3347. fragment));
  3348. qla_printk(KERN_WARNING, ha,
  3349. "[ERROR] Failed to load segment %d of "
  3350. "firmware\n", fragment);
  3351. break;
  3352. }
  3353. faddr += dlen;
  3354. risc_addr += dlen;
  3355. risc_size -= dlen;
  3356. fragment++;
  3357. }
  3358. /* Next segment. */
  3359. segments--;
  3360. }
  3361. return rval;
  3362. }
  3363. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3364. int
  3365. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3366. {
  3367. int rval;
  3368. int i, fragment;
  3369. uint16_t *wcode, *fwcode;
  3370. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3371. struct fw_blob *blob;
  3372. struct qla_hw_data *ha = vha->hw;
  3373. struct req_que *req = ha->req_q_map[0];
  3374. /* Load firmware blob. */
  3375. blob = qla2x00_request_firmware(vha);
  3376. if (!blob) {
  3377. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3378. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3379. "from: " QLA_FW_URL ".\n");
  3380. return QLA_FUNCTION_FAILED;
  3381. }
  3382. rval = QLA_SUCCESS;
  3383. wcode = (uint16_t *)req->ring;
  3384. *srisc_addr = 0;
  3385. fwcode = (uint16_t *)blob->fw->data;
  3386. fwclen = 0;
  3387. /* Validate firmware image by checking version. */
  3388. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3389. qla_printk(KERN_WARNING, ha,
  3390. "Unable to verify integrity of firmware image (%Zd)!\n",
  3391. blob->fw->size);
  3392. goto fail_fw_integrity;
  3393. }
  3394. for (i = 0; i < 4; i++)
  3395. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3396. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3397. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3398. wcode[2] == 0 && wcode[3] == 0)) {
  3399. qla_printk(KERN_WARNING, ha,
  3400. "Unable to verify integrity of firmware image!\n");
  3401. qla_printk(KERN_WARNING, ha,
  3402. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3403. wcode[1], wcode[2], wcode[3]);
  3404. goto fail_fw_integrity;
  3405. }
  3406. seg = blob->segs;
  3407. while (*seg && rval == QLA_SUCCESS) {
  3408. risc_addr = *seg;
  3409. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3410. risc_size = be16_to_cpu(fwcode[3]);
  3411. /* Validate firmware image size. */
  3412. fwclen += risc_size * sizeof(uint16_t);
  3413. if (blob->fw->size < fwclen) {
  3414. qla_printk(KERN_WARNING, ha,
  3415. "Unable to verify integrity of firmware image "
  3416. "(%Zd)!\n", blob->fw->size);
  3417. goto fail_fw_integrity;
  3418. }
  3419. fragment = 0;
  3420. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3421. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3422. if (wlen > risc_size)
  3423. wlen = risc_size;
  3424. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3425. "addr %x, number of words 0x%x.\n", vha->host_no,
  3426. risc_addr, wlen));
  3427. for (i = 0; i < wlen; i++)
  3428. wcode[i] = swab16(fwcode[i]);
  3429. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3430. wlen);
  3431. if (rval) {
  3432. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3433. "segment %d of firmware\n", vha->host_no,
  3434. fragment));
  3435. qla_printk(KERN_WARNING, ha,
  3436. "[ERROR] Failed to load segment %d of "
  3437. "firmware\n", fragment);
  3438. break;
  3439. }
  3440. fwcode += wlen;
  3441. risc_addr += wlen;
  3442. risc_size -= wlen;
  3443. fragment++;
  3444. }
  3445. /* Next segment. */
  3446. seg++;
  3447. }
  3448. return rval;
  3449. fail_fw_integrity:
  3450. return QLA_FUNCTION_FAILED;
  3451. }
  3452. static int
  3453. qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3454. {
  3455. int rval;
  3456. int segments, fragment;
  3457. uint32_t *dcode, dlen;
  3458. uint32_t risc_addr;
  3459. uint32_t risc_size;
  3460. uint32_t i;
  3461. struct fw_blob *blob;
  3462. uint32_t *fwcode, fwclen;
  3463. struct qla_hw_data *ha = vha->hw;
  3464. struct req_que *req = ha->req_q_map[0];
  3465. /* Load firmware blob. */
  3466. blob = qla2x00_request_firmware(vha);
  3467. if (!blob) {
  3468. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3469. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3470. "from: " QLA_FW_URL ".\n");
  3471. return QLA_FUNCTION_FAILED;
  3472. }
  3473. qla_printk(KERN_INFO, ha,
  3474. "FW: Loading via request-firmware...\n");
  3475. rval = QLA_SUCCESS;
  3476. segments = FA_RISC_CODE_SEGMENTS;
  3477. dcode = (uint32_t *)req->ring;
  3478. *srisc_addr = 0;
  3479. fwcode = (uint32_t *)blob->fw->data;
  3480. fwclen = 0;
  3481. /* Validate firmware image by checking version. */
  3482. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  3483. qla_printk(KERN_WARNING, ha,
  3484. "Unable to verify integrity of firmware image (%Zd)!\n",
  3485. blob->fw->size);
  3486. goto fail_fw_integrity;
  3487. }
  3488. for (i = 0; i < 4; i++)
  3489. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  3490. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3491. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3492. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3493. dcode[3] == 0)) {
  3494. qla_printk(KERN_WARNING, ha,
  3495. "Unable to verify integrity of firmware image!\n");
  3496. qla_printk(KERN_WARNING, ha,
  3497. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3498. dcode[1], dcode[2], dcode[3]);
  3499. goto fail_fw_integrity;
  3500. }
  3501. while (segments && rval == QLA_SUCCESS) {
  3502. risc_addr = be32_to_cpu(fwcode[2]);
  3503. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3504. risc_size = be32_to_cpu(fwcode[3]);
  3505. /* Validate firmware image size. */
  3506. fwclen += risc_size * sizeof(uint32_t);
  3507. if (blob->fw->size < fwclen) {
  3508. qla_printk(KERN_WARNING, ha,
  3509. "Unable to verify integrity of firmware image "
  3510. "(%Zd)!\n", blob->fw->size);
  3511. goto fail_fw_integrity;
  3512. }
  3513. fragment = 0;
  3514. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3515. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3516. if (dlen > risc_size)
  3517. dlen = risc_size;
  3518. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3519. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  3520. risc_addr, dlen));
  3521. for (i = 0; i < dlen; i++)
  3522. dcode[i] = swab32(fwcode[i]);
  3523. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3524. dlen);
  3525. if (rval) {
  3526. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3527. "segment %d of firmware\n", vha->host_no,
  3528. fragment));
  3529. qla_printk(KERN_WARNING, ha,
  3530. "[ERROR] Failed to load segment %d of "
  3531. "firmware\n", fragment);
  3532. break;
  3533. }
  3534. fwcode += dlen;
  3535. risc_addr += dlen;
  3536. risc_size -= dlen;
  3537. fragment++;
  3538. }
  3539. /* Next segment. */
  3540. segments--;
  3541. }
  3542. return rval;
  3543. fail_fw_integrity:
  3544. return QLA_FUNCTION_FAILED;
  3545. }
  3546. int
  3547. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3548. {
  3549. int rval;
  3550. if (ql2xfwloadbin == 1)
  3551. return qla81xx_load_risc(vha, srisc_addr);
  3552. /*
  3553. * FW Load priority:
  3554. * 1) Firmware via request-firmware interface (.bin file).
  3555. * 2) Firmware residing in flash.
  3556. */
  3557. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  3558. if (rval == QLA_SUCCESS)
  3559. return rval;
  3560. return qla24xx_load_risc_flash(vha, srisc_addr,
  3561. vha->hw->flt_region_fw);
  3562. }
  3563. int
  3564. qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3565. {
  3566. int rval;
  3567. struct qla_hw_data *ha = vha->hw;
  3568. if (ql2xfwloadbin == 2)
  3569. goto try_blob_fw;
  3570. /*
  3571. * FW Load priority:
  3572. * 1) Firmware residing in flash.
  3573. * 2) Firmware via request-firmware interface (.bin file).
  3574. * 3) Golden-Firmware residing in flash -- limited operation.
  3575. */
  3576. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
  3577. if (rval == QLA_SUCCESS)
  3578. return rval;
  3579. try_blob_fw:
  3580. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  3581. if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
  3582. return rval;
  3583. qla_printk(KERN_ERR, ha,
  3584. "FW: Attempting to fallback to golden firmware...\n");
  3585. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
  3586. if (rval != QLA_SUCCESS)
  3587. return rval;
  3588. qla_printk(KERN_ERR, ha,
  3589. "FW: Please update operational firmware...\n");
  3590. ha->flags.running_gold_fw = 1;
  3591. return rval;
  3592. }
  3593. void
  3594. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  3595. {
  3596. int ret, retries;
  3597. struct qla_hw_data *ha = vha->hw;
  3598. if (!IS_FWI2_CAPABLE(ha))
  3599. return;
  3600. if (!ha->fw_major_version)
  3601. return;
  3602. ret = qla2x00_stop_firmware(vha);
  3603. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  3604. ret != QLA_INVALID_COMMAND && retries ; retries--) {
  3605. ha->isp_ops->reset_chip(vha);
  3606. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  3607. continue;
  3608. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  3609. continue;
  3610. qla_printk(KERN_INFO, ha,
  3611. "Attempting retry of stop-firmware command...\n");
  3612. ret = qla2x00_stop_firmware(vha);
  3613. }
  3614. }
  3615. int
  3616. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  3617. {
  3618. int rval = QLA_SUCCESS;
  3619. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3620. struct qla_hw_data *ha = vha->hw;
  3621. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3622. struct req_que *req;
  3623. struct rsp_que *rsp;
  3624. if (!vha->vp_idx)
  3625. return -EINVAL;
  3626. rval = qla2x00_fw_ready(base_vha);
  3627. if (ql2xmultique_tag)
  3628. req = ha->req_q_map[0];
  3629. else
  3630. req = vha->req;
  3631. rsp = req->rsp;
  3632. if (rval == QLA_SUCCESS) {
  3633. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3634. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3635. }
  3636. vha->flags.management_server_logged_in = 0;
  3637. /* Login to SNS first */
  3638. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  3639. if (mb[0] != MBS_COMMAND_COMPLETE) {
  3640. DEBUG15(qla_printk(KERN_INFO, ha,
  3641. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  3642. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  3643. mb[0], mb[1], mb[2], mb[6], mb[7]));
  3644. return (QLA_FUNCTION_FAILED);
  3645. }
  3646. atomic_set(&vha->loop_down_timer, 0);
  3647. atomic_set(&vha->loop_state, LOOP_UP);
  3648. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3649. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  3650. rval = qla2x00_loop_resync(base_vha);
  3651. return rval;
  3652. }
  3653. /* 84XX Support **************************************************************/
  3654. static LIST_HEAD(qla_cs84xx_list);
  3655. static DEFINE_MUTEX(qla_cs84xx_mutex);
  3656. static struct qla_chip_state_84xx *
  3657. qla84xx_get_chip(struct scsi_qla_host *vha)
  3658. {
  3659. struct qla_chip_state_84xx *cs84xx;
  3660. struct qla_hw_data *ha = vha->hw;
  3661. mutex_lock(&qla_cs84xx_mutex);
  3662. /* Find any shared 84xx chip. */
  3663. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  3664. if (cs84xx->bus == ha->pdev->bus) {
  3665. kref_get(&cs84xx->kref);
  3666. goto done;
  3667. }
  3668. }
  3669. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  3670. if (!cs84xx)
  3671. goto done;
  3672. kref_init(&cs84xx->kref);
  3673. spin_lock_init(&cs84xx->access_lock);
  3674. mutex_init(&cs84xx->fw_update_mutex);
  3675. cs84xx->bus = ha->pdev->bus;
  3676. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  3677. done:
  3678. mutex_unlock(&qla_cs84xx_mutex);
  3679. return cs84xx;
  3680. }
  3681. static void
  3682. __qla84xx_chip_release(struct kref *kref)
  3683. {
  3684. struct qla_chip_state_84xx *cs84xx =
  3685. container_of(kref, struct qla_chip_state_84xx, kref);
  3686. mutex_lock(&qla_cs84xx_mutex);
  3687. list_del(&cs84xx->list);
  3688. mutex_unlock(&qla_cs84xx_mutex);
  3689. kfree(cs84xx);
  3690. }
  3691. void
  3692. qla84xx_put_chip(struct scsi_qla_host *vha)
  3693. {
  3694. struct qla_hw_data *ha = vha->hw;
  3695. if (ha->cs84xx)
  3696. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  3697. }
  3698. static int
  3699. qla84xx_init_chip(scsi_qla_host_t *vha)
  3700. {
  3701. int rval;
  3702. uint16_t status[2];
  3703. struct qla_hw_data *ha = vha->hw;
  3704. mutex_lock(&ha->cs84xx->fw_update_mutex);
  3705. rval = qla84xx_verify_chip(vha, status);
  3706. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  3707. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  3708. QLA_SUCCESS;
  3709. }
  3710. /* 81XX Support **************************************************************/
  3711. int
  3712. qla81xx_nvram_config(scsi_qla_host_t *vha)
  3713. {
  3714. int rval;
  3715. struct init_cb_81xx *icb;
  3716. struct nvram_81xx *nv;
  3717. uint32_t *dptr;
  3718. uint8_t *dptr1, *dptr2;
  3719. uint32_t chksum;
  3720. uint16_t cnt;
  3721. struct qla_hw_data *ha = vha->hw;
  3722. rval = QLA_SUCCESS;
  3723. icb = (struct init_cb_81xx *)ha->init_cb;
  3724. nv = ha->nvram;
  3725. /* Determine NVRAM starting address. */
  3726. ha->nvram_size = sizeof(struct nvram_81xx);
  3727. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3728. /* Get VPD data into cache */
  3729. ha->vpd = ha->nvram + VPD_OFFSET;
  3730. ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
  3731. ha->vpd_size);
  3732. /* Get NVRAM data into cache and calculate checksum. */
  3733. ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
  3734. ha->nvram_size);
  3735. dptr = (uint32_t *)nv;
  3736. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3737. chksum += le32_to_cpu(*dptr++);
  3738. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3739. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3740. /* Bad NVRAM data, set defaults parameters. */
  3741. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3742. || nv->id[3] != ' ' ||
  3743. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3744. /* Reset NVRAM data. */
  3745. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3746. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3747. le16_to_cpu(nv->nvram_version));
  3748. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3749. "invalid -- WWPN) defaults.\n");
  3750. /*
  3751. * Set default initialization control block.
  3752. */
  3753. memset(nv, 0, ha->nvram_size);
  3754. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3755. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3756. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3757. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3758. nv->exchange_count = __constant_cpu_to_le16(0);
  3759. nv->port_name[0] = 0x21;
  3760. nv->port_name[1] = 0x00 + ha->port_no;
  3761. nv->port_name[2] = 0x00;
  3762. nv->port_name[3] = 0xe0;
  3763. nv->port_name[4] = 0x8b;
  3764. nv->port_name[5] = 0x1c;
  3765. nv->port_name[6] = 0x55;
  3766. nv->port_name[7] = 0x86;
  3767. nv->node_name[0] = 0x20;
  3768. nv->node_name[1] = 0x00;
  3769. nv->node_name[2] = 0x00;
  3770. nv->node_name[3] = 0xe0;
  3771. nv->node_name[4] = 0x8b;
  3772. nv->node_name[5] = 0x1c;
  3773. nv->node_name[6] = 0x55;
  3774. nv->node_name[7] = 0x86;
  3775. nv->login_retry_count = __constant_cpu_to_le16(8);
  3776. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3777. nv->login_timeout = __constant_cpu_to_le16(0);
  3778. nv->firmware_options_1 =
  3779. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3780. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3781. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3782. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3783. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3784. nv->efi_parameters = __constant_cpu_to_le32(0);
  3785. nv->reset_delay = 5;
  3786. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3787. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3788. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3789. nv->enode_mac[0] = 0x00;
  3790. nv->enode_mac[1] = 0x02;
  3791. nv->enode_mac[2] = 0x03;
  3792. nv->enode_mac[3] = 0x04;
  3793. nv->enode_mac[4] = 0x05;
  3794. nv->enode_mac[5] = 0x06 + ha->port_no;
  3795. rval = 1;
  3796. }
  3797. /* Reset Initialization control block */
  3798. memset(icb, 0, sizeof(struct init_cb_81xx));
  3799. /* Copy 1st segment. */
  3800. dptr1 = (uint8_t *)icb;
  3801. dptr2 = (uint8_t *)&nv->version;
  3802. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3803. while (cnt--)
  3804. *dptr1++ = *dptr2++;
  3805. icb->login_retry_count = nv->login_retry_count;
  3806. /* Copy 2nd segment. */
  3807. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3808. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3809. cnt = (uint8_t *)&icb->reserved_5 -
  3810. (uint8_t *)&icb->interrupt_delay_timer;
  3811. while (cnt--)
  3812. *dptr1++ = *dptr2++;
  3813. memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
  3814. /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
  3815. if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
  3816. icb->enode_mac[0] = 0x01;
  3817. icb->enode_mac[1] = 0x02;
  3818. icb->enode_mac[2] = 0x03;
  3819. icb->enode_mac[3] = 0x04;
  3820. icb->enode_mac[4] = 0x05;
  3821. icb->enode_mac[5] = 0x06 + ha->port_no;
  3822. }
  3823. /* Use extended-initialization control block. */
  3824. memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
  3825. /*
  3826. * Setup driver NVRAM options.
  3827. */
  3828. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3829. "QLE81XX");
  3830. /* Use alternate WWN? */
  3831. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3832. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3833. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3834. }
  3835. /* Prepare nodename */
  3836. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3837. /*
  3838. * Firmware will apply the following mask if the nodename was
  3839. * not provided.
  3840. */
  3841. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3842. icb->node_name[0] &= 0xF0;
  3843. }
  3844. /* Set host adapter parameters. */
  3845. ha->flags.disable_risc_code_load = 0;
  3846. ha->flags.enable_lip_reset = 0;
  3847. ha->flags.enable_lip_full_login =
  3848. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3849. ha->flags.enable_target_reset =
  3850. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3851. ha->flags.enable_led_scheme = 0;
  3852. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3853. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3854. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3855. /* save HBA serial number */
  3856. ha->serial0 = icb->port_name[5];
  3857. ha->serial1 = icb->port_name[6];
  3858. ha->serial2 = icb->port_name[7];
  3859. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3860. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3861. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3862. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3863. /* Set minimum login_timeout to 4 seconds. */
  3864. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3865. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3866. if (le16_to_cpu(nv->login_timeout) < 4)
  3867. nv->login_timeout = __constant_cpu_to_le16(4);
  3868. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3869. icb->login_timeout = nv->login_timeout;
  3870. /* Set minimum RATOV to 100 tenths of a second. */
  3871. ha->r_a_tov = 100;
  3872. ha->loop_reset_delay = nv->reset_delay;
  3873. /* Link Down Timeout = 0:
  3874. *
  3875. * When Port Down timer expires we will start returning
  3876. * I/O's to OS with "DID_NO_CONNECT".
  3877. *
  3878. * Link Down Timeout != 0:
  3879. *
  3880. * The driver waits for the link to come up after link down
  3881. * before returning I/Os to OS with "DID_NO_CONNECT".
  3882. */
  3883. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3884. ha->loop_down_abort_time =
  3885. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3886. } else {
  3887. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3888. ha->loop_down_abort_time =
  3889. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3890. }
  3891. /* Need enough time to try and get the port back. */
  3892. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3893. if (qlport_down_retry)
  3894. ha->port_down_retry_count = qlport_down_retry;
  3895. /* Set login_retry_count */
  3896. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3897. if (ha->port_down_retry_count ==
  3898. le16_to_cpu(nv->port_down_retry_count) &&
  3899. ha->port_down_retry_count > 3)
  3900. ha->login_retry_count = ha->port_down_retry_count;
  3901. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3902. ha->login_retry_count = ha->port_down_retry_count;
  3903. if (ql2xloginretrycount)
  3904. ha->login_retry_count = ql2xloginretrycount;
  3905. /* Enable ZIO. */
  3906. if (!vha->flags.init_done) {
  3907. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3908. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3909. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3910. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3911. }
  3912. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3913. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3914. vha->flags.process_response_queue = 0;
  3915. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3916. ha->zio_mode = QLA_ZIO_MODE_6;
  3917. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3918. "(%d us).\n", vha->host_no, ha->zio_mode,
  3919. ha->zio_timer * 100));
  3920. qla_printk(KERN_INFO, ha,
  3921. "ZIO mode %d enabled; timer delay (%d us).\n",
  3922. ha->zio_mode, ha->zio_timer * 100);
  3923. icb->firmware_options_2 |= cpu_to_le32(
  3924. (uint32_t)ha->zio_mode);
  3925. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3926. vha->flags.process_response_queue = 1;
  3927. }
  3928. if (rval) {
  3929. DEBUG2_3(printk(KERN_WARNING
  3930. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3931. }
  3932. return (rval);
  3933. }
  3934. void
  3935. qla81xx_update_fw_options(scsi_qla_host_t *ha)
  3936. {
  3937. }