init.c 106 KB

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  1. /* $XFree86$ */
  2. /* $XdotOrg$ */
  3. /*
  4. * Mode initializing code (CRT1 section) for
  5. * for SiS 300/305/540/630/730,
  6. * SiS 315/550/[M]650/651/[M]661[FGM]X/[M]74x[GX]/330/[M]76x[GX],
  7. * XGI Volari V3XT/V5/V8, Z7
  8. * (Universal module for Linux kernel framebuffer and X.org/XFree86 4.x)
  9. *
  10. * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
  11. *
  12. * If distributed as part of the Linux kernel, the following license terms
  13. * apply:
  14. *
  15. * * This program is free software; you can redistribute it and/or modify
  16. * * it under the terms of the GNU General Public License as published by
  17. * * the Free Software Foundation; either version 2 of the named License,
  18. * * or any later version.
  19. * *
  20. * * This program is distributed in the hope that it will be useful,
  21. * * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * * GNU General Public License for more details.
  24. * *
  25. * * You should have received a copy of the GNU General Public License
  26. * * along with this program; if not, write to the Free Software
  27. * * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
  28. *
  29. * Otherwise, the following license terms apply:
  30. *
  31. * * Redistribution and use in source and binary forms, with or without
  32. * * modification, are permitted provided that the following conditions
  33. * * are met:
  34. * * 1) Redistributions of source code must retain the above copyright
  35. * * notice, this list of conditions and the following disclaimer.
  36. * * 2) Redistributions in binary form must reproduce the above copyright
  37. * * notice, this list of conditions and the following disclaimer in the
  38. * * documentation and/or other materials provided with the distribution.
  39. * * 3) The name of the author may not be used to endorse or promote products
  40. * * derived from this software without specific prior written permission.
  41. * *
  42. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  43. * * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  44. * * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  45. * * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  46. * * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  47. * * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  48. * * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  49. * * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  50. * * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  51. * * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  52. *
  53. * Author: Thomas Winischhofer <thomas@winischhofer.net>
  54. *
  55. * Formerly based on non-functional code-fragements for 300 series by SiS, Inc.
  56. * Used by permission.
  57. */
  58. #ifdef HAVE_CONFIG_H
  59. #include "config.h"
  60. #endif
  61. #include "init.h"
  62. #ifdef SIS300
  63. #include "300vtbl.h"
  64. #endif
  65. #ifdef SIS315H
  66. #include "310vtbl.h"
  67. #endif
  68. #if defined(ALLOC_PRAGMA)
  69. #pragma alloc_text(PAGE,SiSSetMode)
  70. #endif
  71. /*********************************************/
  72. /* POINTER INITIALIZATION */
  73. /*********************************************/
  74. #if defined(SIS300) || defined(SIS315H)
  75. static void
  76. InitCommonPointer(struct SiS_Private *SiS_Pr)
  77. {
  78. SiS_Pr->SiS_SModeIDTable = SiS_SModeIDTable;
  79. SiS_Pr->SiS_StResInfo = SiS_StResInfo;
  80. SiS_Pr->SiS_ModeResInfo = SiS_ModeResInfo;
  81. SiS_Pr->SiS_StandTable = SiS_StandTable;
  82. SiS_Pr->SiS_NTSCTiming = SiS_NTSCTiming;
  83. SiS_Pr->SiS_PALTiming = SiS_PALTiming;
  84. SiS_Pr->SiS_HiTVSt1Timing = SiS_HiTVSt1Timing;
  85. SiS_Pr->SiS_HiTVSt2Timing = SiS_HiTVSt2Timing;
  86. SiS_Pr->SiS_HiTVExtTiming = SiS_HiTVExtTiming;
  87. SiS_Pr->SiS_HiTVGroup3Data = SiS_HiTVGroup3Data;
  88. SiS_Pr->SiS_HiTVGroup3Simu = SiS_HiTVGroup3Simu;
  89. #if 0
  90. SiS_Pr->SiS_HiTVTextTiming = SiS_HiTVTextTiming;
  91. SiS_Pr->SiS_HiTVGroup3Text = SiS_HiTVGroup3Text;
  92. #endif
  93. SiS_Pr->SiS_StPALData = SiS_StPALData;
  94. SiS_Pr->SiS_ExtPALData = SiS_ExtPALData;
  95. SiS_Pr->SiS_StNTSCData = SiS_StNTSCData;
  96. SiS_Pr->SiS_ExtNTSCData = SiS_ExtNTSCData;
  97. SiS_Pr->SiS_St1HiTVData = SiS_StHiTVData;
  98. SiS_Pr->SiS_St2HiTVData = SiS_St2HiTVData;
  99. SiS_Pr->SiS_ExtHiTVData = SiS_ExtHiTVData;
  100. SiS_Pr->SiS_St525iData = SiS_StNTSCData;
  101. SiS_Pr->SiS_St525pData = SiS_St525pData;
  102. SiS_Pr->SiS_St750pData = SiS_St750pData;
  103. SiS_Pr->SiS_Ext525iData = SiS_ExtNTSCData;
  104. SiS_Pr->SiS_Ext525pData = SiS_ExtNTSCData;
  105. SiS_Pr->SiS_Ext750pData = SiS_Ext750pData;
  106. SiS_Pr->pSiS_OutputSelect = &SiS_OutputSelect;
  107. SiS_Pr->pSiS_SoftSetting = &SiS_SoftSetting;
  108. SiS_Pr->SiS_LCD1280x720Data = SiS_LCD1280x720Data;
  109. SiS_Pr->SiS_StLCD1280x768_2Data = SiS_StLCD1280x768_2Data;
  110. SiS_Pr->SiS_ExtLCD1280x768_2Data = SiS_ExtLCD1280x768_2Data;
  111. SiS_Pr->SiS_LCD1280x800Data = SiS_LCD1280x800Data;
  112. SiS_Pr->SiS_LCD1280x800_2Data = SiS_LCD1280x800_2Data;
  113. SiS_Pr->SiS_LCD1280x854Data = SiS_LCD1280x854Data;
  114. SiS_Pr->SiS_LCD1280x960Data = SiS_LCD1280x960Data;
  115. SiS_Pr->SiS_StLCD1400x1050Data = SiS_StLCD1400x1050Data;
  116. SiS_Pr->SiS_ExtLCD1400x1050Data = SiS_ExtLCD1400x1050Data;
  117. SiS_Pr->SiS_LCD1680x1050Data = SiS_LCD1680x1050Data;
  118. SiS_Pr->SiS_StLCD1600x1200Data = SiS_StLCD1600x1200Data;
  119. SiS_Pr->SiS_ExtLCD1600x1200Data = SiS_ExtLCD1600x1200Data;
  120. SiS_Pr->SiS_NoScaleData = SiS_NoScaleData;
  121. SiS_Pr->SiS_LVDS320x240Data_1 = SiS_LVDS320x240Data_1;
  122. SiS_Pr->SiS_LVDS320x240Data_2 = SiS_LVDS320x240Data_2;
  123. SiS_Pr->SiS_LVDS640x480Data_1 = SiS_LVDS640x480Data_1;
  124. SiS_Pr->SiS_LVDS800x600Data_1 = SiS_LVDS800x600Data_1;
  125. SiS_Pr->SiS_LVDS1024x600Data_1 = SiS_LVDS1024x600Data_1;
  126. SiS_Pr->SiS_LVDS1024x768Data_1 = SiS_LVDS1024x768Data_1;
  127. SiS_Pr->SiS_LVDSCRT1320x240_1 = SiS_LVDSCRT1320x240_1;
  128. SiS_Pr->SiS_LVDSCRT1320x240_2 = SiS_LVDSCRT1320x240_2;
  129. SiS_Pr->SiS_LVDSCRT1320x240_2_H = SiS_LVDSCRT1320x240_2_H;
  130. SiS_Pr->SiS_LVDSCRT1320x240_3 = SiS_LVDSCRT1320x240_3;
  131. SiS_Pr->SiS_LVDSCRT1320x240_3_H = SiS_LVDSCRT1320x240_3_H;
  132. SiS_Pr->SiS_LVDSCRT1640x480_1 = SiS_LVDSCRT1640x480_1;
  133. SiS_Pr->SiS_LVDSCRT1640x480_1_H = SiS_LVDSCRT1640x480_1_H;
  134. #if 0
  135. SiS_Pr->SiS_LVDSCRT11024x600_1 = SiS_LVDSCRT11024x600_1;
  136. SiS_Pr->SiS_LVDSCRT11024x600_1_H = SiS_LVDSCRT11024x600_1_H;
  137. SiS_Pr->SiS_LVDSCRT11024x600_2 = SiS_LVDSCRT11024x600_2;
  138. SiS_Pr->SiS_LVDSCRT11024x600_2_H = SiS_LVDSCRT11024x600_2_H;
  139. #endif
  140. SiS_Pr->SiS_CHTVUNTSCData = SiS_CHTVUNTSCData;
  141. SiS_Pr->SiS_CHTVONTSCData = SiS_CHTVONTSCData;
  142. SiS_Pr->SiS_PanelMinLVDS = Panel_800x600; /* lowest value LVDS/LCDA */
  143. SiS_Pr->SiS_PanelMin301 = Panel_1024x768; /* lowest value 301 */
  144. }
  145. #endif
  146. #ifdef SIS300
  147. static void
  148. InitTo300Pointer(struct SiS_Private *SiS_Pr)
  149. {
  150. InitCommonPointer(SiS_Pr);
  151. SiS_Pr->SiS_VBModeIDTable = SiS300_VBModeIDTable;
  152. SiS_Pr->SiS_EModeIDTable = SiS300_EModeIDTable;
  153. SiS_Pr->SiS_RefIndex = SiS300_RefIndex;
  154. SiS_Pr->SiS_CRT1Table = SiS300_CRT1Table;
  155. if(SiS_Pr->ChipType == SIS_300) {
  156. SiS_Pr->SiS_MCLKData_0 = SiS300_MCLKData_300; /* 300 */
  157. } else {
  158. SiS_Pr->SiS_MCLKData_0 = SiS300_MCLKData_630; /* 630, 730 */
  159. }
  160. SiS_Pr->SiS_VCLKData = SiS300_VCLKData;
  161. SiS_Pr->SiS_VBVCLKData = (struct SiS_VBVCLKData *)SiS300_VCLKData;
  162. SiS_Pr->SiS_SR15 = SiS300_SR15;
  163. SiS_Pr->SiS_PanelDelayTbl = SiS300_PanelDelayTbl;
  164. SiS_Pr->SiS_PanelDelayTblLVDS = SiS300_PanelDelayTbl;
  165. SiS_Pr->SiS_ExtLCD1024x768Data = SiS300_ExtLCD1024x768Data;
  166. SiS_Pr->SiS_St2LCD1024x768Data = SiS300_St2LCD1024x768Data;
  167. SiS_Pr->SiS_ExtLCD1280x1024Data = SiS300_ExtLCD1280x1024Data;
  168. SiS_Pr->SiS_St2LCD1280x1024Data = SiS300_St2LCD1280x1024Data;
  169. SiS_Pr->SiS_CRT2Part2_1024x768_1 = SiS300_CRT2Part2_1024x768_1;
  170. SiS_Pr->SiS_CRT2Part2_1024x768_2 = SiS300_CRT2Part2_1024x768_2;
  171. SiS_Pr->SiS_CRT2Part2_1024x768_3 = SiS300_CRT2Part2_1024x768_3;
  172. SiS_Pr->SiS_CHTVUPALData = SiS300_CHTVUPALData;
  173. SiS_Pr->SiS_CHTVOPALData = SiS300_CHTVOPALData;
  174. SiS_Pr->SiS_CHTVUPALMData = SiS_CHTVUNTSCData; /* not supported on 300 series */
  175. SiS_Pr->SiS_CHTVOPALMData = SiS_CHTVONTSCData; /* not supported on 300 series */
  176. SiS_Pr->SiS_CHTVUPALNData = SiS300_CHTVUPALData; /* not supported on 300 series */
  177. SiS_Pr->SiS_CHTVOPALNData = SiS300_CHTVOPALData; /* not supported on 300 series */
  178. SiS_Pr->SiS_CHTVSOPALData = SiS300_CHTVSOPALData;
  179. SiS_Pr->SiS_LVDS848x480Data_1 = SiS300_LVDS848x480Data_1;
  180. SiS_Pr->SiS_LVDS848x480Data_2 = SiS300_LVDS848x480Data_2;
  181. SiS_Pr->SiS_LVDSBARCO1024Data_1 = SiS300_LVDSBARCO1024Data_1;
  182. SiS_Pr->SiS_LVDSBARCO1366Data_1 = SiS300_LVDSBARCO1366Data_1;
  183. SiS_Pr->SiS_LVDSBARCO1366Data_2 = SiS300_LVDSBARCO1366Data_2;
  184. SiS_Pr->SiS_PanelType04_1a = SiS300_PanelType04_1a;
  185. SiS_Pr->SiS_PanelType04_2a = SiS300_PanelType04_2a;
  186. SiS_Pr->SiS_PanelType04_1b = SiS300_PanelType04_1b;
  187. SiS_Pr->SiS_PanelType04_2b = SiS300_PanelType04_2b;
  188. SiS_Pr->SiS_CHTVCRT1UNTSC = SiS300_CHTVCRT1UNTSC;
  189. SiS_Pr->SiS_CHTVCRT1ONTSC = SiS300_CHTVCRT1ONTSC;
  190. SiS_Pr->SiS_CHTVCRT1UPAL = SiS300_CHTVCRT1UPAL;
  191. SiS_Pr->SiS_CHTVCRT1OPAL = SiS300_CHTVCRT1OPAL;
  192. SiS_Pr->SiS_CHTVCRT1SOPAL = SiS300_CHTVCRT1SOPAL;
  193. SiS_Pr->SiS_CHTVReg_UNTSC = SiS300_CHTVReg_UNTSC;
  194. SiS_Pr->SiS_CHTVReg_ONTSC = SiS300_CHTVReg_ONTSC;
  195. SiS_Pr->SiS_CHTVReg_UPAL = SiS300_CHTVReg_UPAL;
  196. SiS_Pr->SiS_CHTVReg_OPAL = SiS300_CHTVReg_OPAL;
  197. SiS_Pr->SiS_CHTVReg_UPALM = SiS300_CHTVReg_UNTSC; /* not supported on 300 series */
  198. SiS_Pr->SiS_CHTVReg_OPALM = SiS300_CHTVReg_ONTSC; /* not supported on 300 series */
  199. SiS_Pr->SiS_CHTVReg_UPALN = SiS300_CHTVReg_UPAL; /* not supported on 300 series */
  200. SiS_Pr->SiS_CHTVReg_OPALN = SiS300_CHTVReg_OPAL; /* not supported on 300 series */
  201. SiS_Pr->SiS_CHTVReg_SOPAL = SiS300_CHTVReg_SOPAL;
  202. SiS_Pr->SiS_CHTVVCLKUNTSC = SiS300_CHTVVCLKUNTSC;
  203. SiS_Pr->SiS_CHTVVCLKONTSC = SiS300_CHTVVCLKONTSC;
  204. SiS_Pr->SiS_CHTVVCLKUPAL = SiS300_CHTVVCLKUPAL;
  205. SiS_Pr->SiS_CHTVVCLKOPAL = SiS300_CHTVVCLKOPAL;
  206. SiS_Pr->SiS_CHTVVCLKUPALM = SiS300_CHTVVCLKUNTSC; /* not supported on 300 series */
  207. SiS_Pr->SiS_CHTVVCLKOPALM = SiS300_CHTVVCLKONTSC; /* not supported on 300 series */
  208. SiS_Pr->SiS_CHTVVCLKUPALN = SiS300_CHTVVCLKUPAL; /* not supported on 300 series */
  209. SiS_Pr->SiS_CHTVVCLKOPALN = SiS300_CHTVVCLKOPAL; /* not supported on 300 series */
  210. SiS_Pr->SiS_CHTVVCLKSOPAL = SiS300_CHTVVCLKSOPAL;
  211. }
  212. #endif
  213. #ifdef SIS315H
  214. static void
  215. InitTo310Pointer(struct SiS_Private *SiS_Pr)
  216. {
  217. InitCommonPointer(SiS_Pr);
  218. SiS_Pr->SiS_EModeIDTable = SiS310_EModeIDTable;
  219. SiS_Pr->SiS_RefIndex = SiS310_RefIndex;
  220. SiS_Pr->SiS_CRT1Table = SiS310_CRT1Table;
  221. if(SiS_Pr->ChipType >= SIS_340) {
  222. SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_340; /* 340 + XGI */
  223. } else if(SiS_Pr->ChipType >= SIS_761) {
  224. SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_761; /* 761 - preliminary */
  225. } else if(SiS_Pr->ChipType >= SIS_760) {
  226. SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_760; /* 760 */
  227. } else if(SiS_Pr->ChipType >= SIS_661) {
  228. SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_660; /* 661/741 */
  229. } else if(SiS_Pr->ChipType == SIS_330) {
  230. SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_330; /* 330 */
  231. } else if(SiS_Pr->ChipType > SIS_315PRO) {
  232. SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_650; /* 550, 650, 740 */
  233. } else {
  234. SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_315; /* 315 */
  235. }
  236. if(SiS_Pr->ChipType >= SIS_340) {
  237. SiS_Pr->SiS_MCLKData_1 = SiS310_MCLKData_1_340;
  238. } else {
  239. SiS_Pr->SiS_MCLKData_1 = SiS310_MCLKData_1;
  240. }
  241. SiS_Pr->SiS_VCLKData = SiS310_VCLKData;
  242. SiS_Pr->SiS_VBVCLKData = SiS310_VBVCLKData;
  243. SiS_Pr->SiS_SR15 = SiS310_SR15;
  244. SiS_Pr->SiS_PanelDelayTbl = SiS310_PanelDelayTbl;
  245. SiS_Pr->SiS_PanelDelayTblLVDS = SiS310_PanelDelayTblLVDS;
  246. SiS_Pr->SiS_St2LCD1024x768Data = SiS310_St2LCD1024x768Data;
  247. SiS_Pr->SiS_ExtLCD1024x768Data = SiS310_ExtLCD1024x768Data;
  248. SiS_Pr->SiS_St2LCD1280x1024Data = SiS310_St2LCD1280x1024Data;
  249. SiS_Pr->SiS_ExtLCD1280x1024Data = SiS310_ExtLCD1280x1024Data;
  250. SiS_Pr->SiS_CRT2Part2_1024x768_1 = SiS310_CRT2Part2_1024x768_1;
  251. SiS_Pr->SiS_CHTVUPALData = SiS310_CHTVUPALData;
  252. SiS_Pr->SiS_CHTVOPALData = SiS310_CHTVOPALData;
  253. SiS_Pr->SiS_CHTVUPALMData = SiS310_CHTVUPALMData;
  254. SiS_Pr->SiS_CHTVOPALMData = SiS310_CHTVOPALMData;
  255. SiS_Pr->SiS_CHTVUPALNData = SiS310_CHTVUPALNData;
  256. SiS_Pr->SiS_CHTVOPALNData = SiS310_CHTVOPALNData;
  257. SiS_Pr->SiS_CHTVSOPALData = SiS310_CHTVSOPALData;
  258. SiS_Pr->SiS_CHTVCRT1UNTSC = SiS310_CHTVCRT1UNTSC;
  259. SiS_Pr->SiS_CHTVCRT1ONTSC = SiS310_CHTVCRT1ONTSC;
  260. SiS_Pr->SiS_CHTVCRT1UPAL = SiS310_CHTVCRT1UPAL;
  261. SiS_Pr->SiS_CHTVCRT1OPAL = SiS310_CHTVCRT1OPAL;
  262. SiS_Pr->SiS_CHTVCRT1SOPAL = SiS310_CHTVCRT1OPAL;
  263. SiS_Pr->SiS_CHTVReg_UNTSC = SiS310_CHTVReg_UNTSC;
  264. SiS_Pr->SiS_CHTVReg_ONTSC = SiS310_CHTVReg_ONTSC;
  265. SiS_Pr->SiS_CHTVReg_UPAL = SiS310_CHTVReg_UPAL;
  266. SiS_Pr->SiS_CHTVReg_OPAL = SiS310_CHTVReg_OPAL;
  267. SiS_Pr->SiS_CHTVReg_UPALM = SiS310_CHTVReg_UPALM;
  268. SiS_Pr->SiS_CHTVReg_OPALM = SiS310_CHTVReg_OPALM;
  269. SiS_Pr->SiS_CHTVReg_UPALN = SiS310_CHTVReg_UPALN;
  270. SiS_Pr->SiS_CHTVReg_OPALN = SiS310_CHTVReg_OPALN;
  271. SiS_Pr->SiS_CHTVReg_SOPAL = SiS310_CHTVReg_OPAL;
  272. SiS_Pr->SiS_CHTVVCLKUNTSC = SiS310_CHTVVCLKUNTSC;
  273. SiS_Pr->SiS_CHTVVCLKONTSC = SiS310_CHTVVCLKONTSC;
  274. SiS_Pr->SiS_CHTVVCLKUPAL = SiS310_CHTVVCLKUPAL;
  275. SiS_Pr->SiS_CHTVVCLKOPAL = SiS310_CHTVVCLKOPAL;
  276. SiS_Pr->SiS_CHTVVCLKUPALM = SiS310_CHTVVCLKUPALM;
  277. SiS_Pr->SiS_CHTVVCLKOPALM = SiS310_CHTVVCLKOPALM;
  278. SiS_Pr->SiS_CHTVVCLKUPALN = SiS310_CHTVVCLKUPALN;
  279. SiS_Pr->SiS_CHTVVCLKOPALN = SiS310_CHTVVCLKOPALN;
  280. SiS_Pr->SiS_CHTVVCLKSOPAL = SiS310_CHTVVCLKOPAL;
  281. }
  282. #endif
  283. bool
  284. SiSInitPtr(struct SiS_Private *SiS_Pr)
  285. {
  286. if(SiS_Pr->ChipType < SIS_315H) {
  287. #ifdef SIS300
  288. InitTo300Pointer(SiS_Pr);
  289. #else
  290. return false;
  291. #endif
  292. } else {
  293. #ifdef SIS315H
  294. InitTo310Pointer(SiS_Pr);
  295. #else
  296. return false;
  297. #endif
  298. }
  299. return true;
  300. }
  301. /*********************************************/
  302. /* HELPER: Get ModeID */
  303. /*********************************************/
  304. static
  305. unsigned short
  306. SiS_GetModeID(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay,
  307. int Depth, bool FSTN, int LCDwidth, int LCDheight)
  308. {
  309. unsigned short ModeIndex = 0;
  310. switch(HDisplay)
  311. {
  312. case 320:
  313. if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
  314. else if(VDisplay == 240) {
  315. if((VBFlags & CRT2_LCD) && (FSTN))
  316. ModeIndex = ModeIndex_320x240_FSTN[Depth];
  317. else
  318. ModeIndex = ModeIndex_320x240[Depth];
  319. }
  320. break;
  321. case 400:
  322. if((!(VBFlags & CRT1_LCDA)) || ((LCDwidth >= 800) && (LCDwidth >= 600))) {
  323. if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
  324. }
  325. break;
  326. case 512:
  327. if((!(VBFlags & CRT1_LCDA)) || ((LCDwidth >= 1024) && (LCDwidth >= 768))) {
  328. if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
  329. }
  330. break;
  331. case 640:
  332. if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
  333. else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
  334. break;
  335. case 720:
  336. if(VDisplay == 480) ModeIndex = ModeIndex_720x480[Depth];
  337. else if(VDisplay == 576) ModeIndex = ModeIndex_720x576[Depth];
  338. break;
  339. case 768:
  340. if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
  341. break;
  342. case 800:
  343. if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
  344. else if(VDisplay == 480) ModeIndex = ModeIndex_800x480[Depth];
  345. break;
  346. case 848:
  347. if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
  348. break;
  349. case 856:
  350. if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth];
  351. break;
  352. case 960:
  353. if(VGAEngine == SIS_315_VGA) {
  354. if(VDisplay == 540) ModeIndex = ModeIndex_960x540[Depth];
  355. else if(VDisplay == 600) ModeIndex = ModeIndex_960x600[Depth];
  356. }
  357. break;
  358. case 1024:
  359. if(VDisplay == 576) ModeIndex = ModeIndex_1024x576[Depth];
  360. else if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
  361. else if(VGAEngine == SIS_300_VGA) {
  362. if(VDisplay == 600) ModeIndex = ModeIndex_1024x600[Depth];
  363. }
  364. break;
  365. case 1152:
  366. if(VDisplay == 864) ModeIndex = ModeIndex_1152x864[Depth];
  367. if(VGAEngine == SIS_300_VGA) {
  368. if(VDisplay == 768) ModeIndex = ModeIndex_1152x768[Depth];
  369. }
  370. break;
  371. case 1280:
  372. switch(VDisplay) {
  373. case 720:
  374. ModeIndex = ModeIndex_1280x720[Depth];
  375. break;
  376. case 768:
  377. if(VGAEngine == SIS_300_VGA) {
  378. ModeIndex = ModeIndex_300_1280x768[Depth];
  379. } else {
  380. ModeIndex = ModeIndex_310_1280x768[Depth];
  381. }
  382. break;
  383. case 800:
  384. if(VGAEngine == SIS_315_VGA) {
  385. ModeIndex = ModeIndex_1280x800[Depth];
  386. }
  387. break;
  388. case 854:
  389. if(VGAEngine == SIS_315_VGA) {
  390. ModeIndex = ModeIndex_1280x854[Depth];
  391. }
  392. break;
  393. case 960:
  394. ModeIndex = ModeIndex_1280x960[Depth];
  395. break;
  396. case 1024:
  397. ModeIndex = ModeIndex_1280x1024[Depth];
  398. break;
  399. }
  400. break;
  401. case 1360:
  402. if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
  403. if(VGAEngine == SIS_300_VGA) {
  404. if(VDisplay == 1024) ModeIndex = ModeIndex_300_1360x1024[Depth];
  405. }
  406. break;
  407. case 1400:
  408. if(VGAEngine == SIS_315_VGA) {
  409. if(VDisplay == 1050) {
  410. ModeIndex = ModeIndex_1400x1050[Depth];
  411. }
  412. }
  413. break;
  414. case 1600:
  415. if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
  416. break;
  417. case 1680:
  418. if(VGAEngine == SIS_315_VGA) {
  419. if(VDisplay == 1050) ModeIndex = ModeIndex_1680x1050[Depth];
  420. }
  421. break;
  422. case 1920:
  423. if(VDisplay == 1440) ModeIndex = ModeIndex_1920x1440[Depth];
  424. else if(VGAEngine == SIS_315_VGA) {
  425. if(VDisplay == 1080) ModeIndex = ModeIndex_1920x1080[Depth];
  426. }
  427. break;
  428. case 2048:
  429. if(VDisplay == 1536) {
  430. if(VGAEngine == SIS_300_VGA) {
  431. ModeIndex = ModeIndex_300_2048x1536[Depth];
  432. } else {
  433. ModeIndex = ModeIndex_310_2048x1536[Depth];
  434. }
  435. }
  436. break;
  437. }
  438. return ModeIndex;
  439. }
  440. unsigned short
  441. SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay,
  442. int Depth, bool FSTN, unsigned short CustomT, int LCDwidth, int LCDheight,
  443. unsigned int VBFlags2)
  444. {
  445. unsigned short ModeIndex = 0;
  446. if(VBFlags2 & (VB2_LVDS | VB2_30xBDH)) {
  447. switch(HDisplay)
  448. {
  449. case 320:
  450. if((CustomT != CUT_PANEL848) && (CustomT != CUT_PANEL856)) {
  451. if(VDisplay == 200) {
  452. if(!FSTN) ModeIndex = ModeIndex_320x200[Depth];
  453. } else if(VDisplay == 240) {
  454. if(!FSTN) ModeIndex = ModeIndex_320x240[Depth];
  455. else if(VGAEngine == SIS_315_VGA) {
  456. ModeIndex = ModeIndex_320x240_FSTN[Depth];
  457. }
  458. }
  459. }
  460. break;
  461. case 400:
  462. if((CustomT != CUT_PANEL848) && (CustomT != CUT_PANEL856)) {
  463. if(!((VGAEngine == SIS_300_VGA) && (VBFlags2 & VB2_TRUMPION))) {
  464. if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
  465. }
  466. }
  467. break;
  468. case 512:
  469. if((CustomT != CUT_PANEL848) && (CustomT != CUT_PANEL856)) {
  470. if(!((VGAEngine == SIS_300_VGA) && (VBFlags2 & VB2_TRUMPION))) {
  471. if(LCDwidth >= 1024 && LCDwidth != 1152 && LCDheight >= 768) {
  472. if(VDisplay == 384) {
  473. ModeIndex = ModeIndex_512x384[Depth];
  474. }
  475. }
  476. }
  477. }
  478. break;
  479. case 640:
  480. if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
  481. else if(VDisplay == 400) {
  482. if((CustomT != CUT_PANEL848) && (CustomT != CUT_PANEL856))
  483. ModeIndex = ModeIndex_640x400[Depth];
  484. }
  485. break;
  486. case 800:
  487. if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
  488. break;
  489. case 848:
  490. if(CustomT == CUT_PANEL848) {
  491. if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
  492. }
  493. break;
  494. case 856:
  495. if(CustomT == CUT_PANEL856) {
  496. if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth];
  497. }
  498. break;
  499. case 1024:
  500. if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
  501. else if(VGAEngine == SIS_300_VGA) {
  502. if((VDisplay == 600) && (LCDheight == 600)) {
  503. ModeIndex = ModeIndex_1024x600[Depth];
  504. }
  505. }
  506. break;
  507. case 1152:
  508. if(VGAEngine == SIS_300_VGA) {
  509. if((VDisplay == 768) && (LCDheight == 768)) {
  510. ModeIndex = ModeIndex_1152x768[Depth];
  511. }
  512. }
  513. break;
  514. case 1280:
  515. if(VDisplay == 1024) ModeIndex = ModeIndex_1280x1024[Depth];
  516. else if(VGAEngine == SIS_315_VGA) {
  517. if((VDisplay == 768) && (LCDheight == 768)) {
  518. ModeIndex = ModeIndex_310_1280x768[Depth];
  519. }
  520. }
  521. break;
  522. case 1360:
  523. if(VGAEngine == SIS_300_VGA) {
  524. if(CustomT == CUT_BARCO1366) {
  525. if(VDisplay == 1024) ModeIndex = ModeIndex_300_1360x1024[Depth];
  526. }
  527. }
  528. if(CustomT == CUT_PANEL848) {
  529. if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
  530. }
  531. break;
  532. case 1400:
  533. if(VGAEngine == SIS_315_VGA) {
  534. if(VDisplay == 1050) ModeIndex = ModeIndex_1400x1050[Depth];
  535. }
  536. break;
  537. case 1600:
  538. if(VGAEngine == SIS_315_VGA) {
  539. if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
  540. }
  541. break;
  542. }
  543. } else if(VBFlags2 & VB2_SISBRIDGE) {
  544. switch(HDisplay)
  545. {
  546. case 320:
  547. if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
  548. else if(VDisplay == 240) ModeIndex = ModeIndex_320x240[Depth];
  549. break;
  550. case 400:
  551. if(LCDwidth >= 800 && LCDheight >= 600) {
  552. if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
  553. }
  554. break;
  555. case 512:
  556. if(LCDwidth >= 1024 && LCDheight >= 768 && LCDwidth != 1152) {
  557. if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
  558. }
  559. break;
  560. case 640:
  561. if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
  562. else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
  563. break;
  564. case 720:
  565. if(VGAEngine == SIS_315_VGA) {
  566. if(VDisplay == 480) ModeIndex = ModeIndex_720x480[Depth];
  567. else if(VDisplay == 576) ModeIndex = ModeIndex_720x576[Depth];
  568. }
  569. break;
  570. case 768:
  571. if(VGAEngine == SIS_315_VGA) {
  572. if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
  573. }
  574. break;
  575. case 800:
  576. if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
  577. if(VGAEngine == SIS_315_VGA) {
  578. if(VDisplay == 480) ModeIndex = ModeIndex_800x480[Depth];
  579. }
  580. break;
  581. case 848:
  582. if(VGAEngine == SIS_315_VGA) {
  583. if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
  584. }
  585. break;
  586. case 856:
  587. if(VGAEngine == SIS_315_VGA) {
  588. if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth];
  589. }
  590. break;
  591. case 960:
  592. if(VGAEngine == SIS_315_VGA) {
  593. if(VDisplay == 540) ModeIndex = ModeIndex_960x540[Depth];
  594. else if(VDisplay == 600) ModeIndex = ModeIndex_960x600[Depth];
  595. }
  596. break;
  597. case 1024:
  598. if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
  599. if(VGAEngine == SIS_315_VGA) {
  600. if(VDisplay == 576) ModeIndex = ModeIndex_1024x576[Depth];
  601. }
  602. break;
  603. case 1152:
  604. if(VGAEngine == SIS_315_VGA) {
  605. if(VDisplay == 864) ModeIndex = ModeIndex_1152x864[Depth];
  606. }
  607. break;
  608. case 1280:
  609. switch(VDisplay) {
  610. case 720:
  611. ModeIndex = ModeIndex_1280x720[Depth];
  612. case 768:
  613. if(VGAEngine == SIS_300_VGA) {
  614. ModeIndex = ModeIndex_300_1280x768[Depth];
  615. } else {
  616. ModeIndex = ModeIndex_310_1280x768[Depth];
  617. }
  618. break;
  619. case 800:
  620. if(VGAEngine == SIS_315_VGA) {
  621. ModeIndex = ModeIndex_1280x800[Depth];
  622. }
  623. break;
  624. case 854:
  625. if(VGAEngine == SIS_315_VGA) {
  626. ModeIndex = ModeIndex_1280x854[Depth];
  627. }
  628. break;
  629. case 960:
  630. ModeIndex = ModeIndex_1280x960[Depth];
  631. break;
  632. case 1024:
  633. ModeIndex = ModeIndex_1280x1024[Depth];
  634. break;
  635. }
  636. break;
  637. case 1360:
  638. if(VGAEngine == SIS_315_VGA) { /* OVER1280 only? */
  639. if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
  640. }
  641. break;
  642. case 1400:
  643. if(VGAEngine == SIS_315_VGA) {
  644. if(VBFlags2 & VB2_LCDOVER1280BRIDGE) {
  645. if(VDisplay == 1050) ModeIndex = ModeIndex_1400x1050[Depth];
  646. }
  647. }
  648. break;
  649. case 1600:
  650. if(VGAEngine == SIS_315_VGA) {
  651. if(VBFlags2 & VB2_LCDOVER1280BRIDGE) {
  652. if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
  653. }
  654. }
  655. break;
  656. #ifndef VB_FORBID_CRT2LCD_OVER_1600
  657. case 1680:
  658. if(VGAEngine == SIS_315_VGA) {
  659. if(VBFlags2 & VB2_LCDOVER1280BRIDGE) {
  660. if(VDisplay == 1050) ModeIndex = ModeIndex_1680x1050[Depth];
  661. }
  662. }
  663. break;
  664. case 1920:
  665. if(VGAEngine == SIS_315_VGA) {
  666. if(VBFlags2 & VB2_LCDOVER1600BRIDGE) {
  667. if(VDisplay == 1440) ModeIndex = ModeIndex_1920x1440[Depth];
  668. }
  669. }
  670. break;
  671. case 2048:
  672. if(VGAEngine == SIS_315_VGA) {
  673. if(VBFlags2 & VB2_LCDOVER1600BRIDGE) {
  674. if(VDisplay == 1536) ModeIndex = ModeIndex_310_2048x1536[Depth];
  675. }
  676. }
  677. break;
  678. #endif
  679. }
  680. }
  681. return ModeIndex;
  682. }
  683. unsigned short
  684. SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay, int Depth,
  685. unsigned int VBFlags2)
  686. {
  687. unsigned short ModeIndex = 0;
  688. if(VBFlags2 & VB2_CHRONTEL) {
  689. switch(HDisplay)
  690. {
  691. case 512:
  692. if(VGAEngine == SIS_315_VGA) {
  693. if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
  694. }
  695. break;
  696. case 640:
  697. if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
  698. else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
  699. break;
  700. case 800:
  701. if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
  702. break;
  703. case 1024:
  704. if(VGAEngine == SIS_315_VGA) {
  705. if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
  706. }
  707. break;
  708. }
  709. } else if(VBFlags2 & VB2_SISTVBRIDGE) {
  710. switch(HDisplay)
  711. {
  712. case 320:
  713. if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
  714. else if(VDisplay == 240) ModeIndex = ModeIndex_320x240[Depth];
  715. break;
  716. case 400:
  717. if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
  718. break;
  719. case 512:
  720. if( ((VBFlags & TV_YPBPR) && (VBFlags & (TV_YPBPR750P | TV_YPBPR1080I))) ||
  721. (VBFlags & TV_HIVISION) ||
  722. ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL)) ) {
  723. if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
  724. }
  725. break;
  726. case 640:
  727. if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
  728. else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
  729. break;
  730. case 720:
  731. if((!(VBFlags & TV_HIVISION)) && (!((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I)))) {
  732. if(VDisplay == 480) {
  733. ModeIndex = ModeIndex_720x480[Depth];
  734. } else if(VDisplay == 576) {
  735. if( ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR750P)) ||
  736. ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL)) )
  737. ModeIndex = ModeIndex_720x576[Depth];
  738. }
  739. }
  740. break;
  741. case 768:
  742. if((!(VBFlags & TV_HIVISION)) && (!((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I)))) {
  743. if( ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR750P)) ||
  744. ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL)) ) {
  745. if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
  746. }
  747. }
  748. break;
  749. case 800:
  750. if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
  751. else if(VDisplay == 480) {
  752. if(!((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR750P))) {
  753. ModeIndex = ModeIndex_800x480[Depth];
  754. }
  755. }
  756. break;
  757. case 960:
  758. if(VGAEngine == SIS_315_VGA) {
  759. if(VDisplay == 600) {
  760. if((VBFlags & TV_HIVISION) || ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) {
  761. ModeIndex = ModeIndex_960x600[Depth];
  762. }
  763. }
  764. }
  765. break;
  766. case 1024:
  767. if(VDisplay == 768) {
  768. if(VBFlags2 & VB2_30xBLV) {
  769. ModeIndex = ModeIndex_1024x768[Depth];
  770. }
  771. } else if(VDisplay == 576) {
  772. if( (VBFlags & TV_HIVISION) ||
  773. ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I)) ||
  774. ((VBFlags2 & VB2_30xBLV) &&
  775. ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL))) ) {
  776. ModeIndex = ModeIndex_1024x576[Depth];
  777. }
  778. }
  779. break;
  780. case 1280:
  781. if(VDisplay == 720) {
  782. if((VBFlags & TV_HIVISION) ||
  783. ((VBFlags & TV_YPBPR) && (VBFlags & (TV_YPBPR1080I | TV_YPBPR750P)))) {
  784. ModeIndex = ModeIndex_1280x720[Depth];
  785. }
  786. } else if(VDisplay == 1024) {
  787. if((VBFlags & TV_HIVISION) ||
  788. ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) {
  789. ModeIndex = ModeIndex_1280x1024[Depth];
  790. }
  791. }
  792. break;
  793. }
  794. }
  795. return ModeIndex;
  796. }
  797. unsigned short
  798. SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay, int Depth,
  799. unsigned int VBFlags2)
  800. {
  801. if(!(VBFlags2 & VB2_SISVGA2BRIDGE)) return 0;
  802. if(HDisplay >= 1920) return 0;
  803. switch(HDisplay)
  804. {
  805. case 1600:
  806. if(VDisplay == 1200) {
  807. if(VGAEngine != SIS_315_VGA) return 0;
  808. if(!(VBFlags2 & VB2_30xB)) return 0;
  809. }
  810. break;
  811. case 1680:
  812. if(VDisplay == 1050) {
  813. if(VGAEngine != SIS_315_VGA) return 0;
  814. if(!(VBFlags2 & VB2_30xB)) return 0;
  815. }
  816. break;
  817. }
  818. return SiS_GetModeID(VGAEngine, 0, HDisplay, VDisplay, Depth, false, 0, 0);
  819. }
  820. /*********************************************/
  821. /* HELPER: SetReg, GetReg */
  822. /*********************************************/
  823. void
  824. SiS_SetReg(SISIOADDRESS port, unsigned short index, unsigned short data)
  825. {
  826. OutPortByte(port, index);
  827. OutPortByte(port + 1, data);
  828. }
  829. void
  830. SiS_SetRegByte(SISIOADDRESS port, unsigned short data)
  831. {
  832. OutPortByte(port, data);
  833. }
  834. void
  835. SiS_SetRegShort(SISIOADDRESS port, unsigned short data)
  836. {
  837. OutPortWord(port, data);
  838. }
  839. void
  840. SiS_SetRegLong(SISIOADDRESS port, unsigned int data)
  841. {
  842. OutPortLong(port, data);
  843. }
  844. unsigned char
  845. SiS_GetReg(SISIOADDRESS port, unsigned short index)
  846. {
  847. OutPortByte(port, index);
  848. return(InPortByte(port + 1));
  849. }
  850. unsigned char
  851. SiS_GetRegByte(SISIOADDRESS port)
  852. {
  853. return(InPortByte(port));
  854. }
  855. unsigned short
  856. SiS_GetRegShort(SISIOADDRESS port)
  857. {
  858. return(InPortWord(port));
  859. }
  860. unsigned int
  861. SiS_GetRegLong(SISIOADDRESS port)
  862. {
  863. return(InPortLong(port));
  864. }
  865. void
  866. SiS_SetRegANDOR(SISIOADDRESS Port, unsigned short Index, unsigned short DataAND, unsigned short DataOR)
  867. {
  868. unsigned short temp;
  869. temp = SiS_GetReg(Port, Index);
  870. temp = (temp & (DataAND)) | DataOR;
  871. SiS_SetReg(Port, Index, temp);
  872. }
  873. void
  874. SiS_SetRegAND(SISIOADDRESS Port, unsigned short Index, unsigned short DataAND)
  875. {
  876. unsigned short temp;
  877. temp = SiS_GetReg(Port, Index);
  878. temp &= DataAND;
  879. SiS_SetReg(Port, Index, temp);
  880. }
  881. void
  882. SiS_SetRegOR(SISIOADDRESS Port, unsigned short Index, unsigned short DataOR)
  883. {
  884. unsigned short temp;
  885. temp = SiS_GetReg(Port, Index);
  886. temp |= DataOR;
  887. SiS_SetReg(Port, Index, temp);
  888. }
  889. /*********************************************/
  890. /* HELPER: DisplayOn, DisplayOff */
  891. /*********************************************/
  892. void
  893. SiS_DisplayOn(struct SiS_Private *SiS_Pr)
  894. {
  895. SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x01,0xDF);
  896. }
  897. void
  898. SiS_DisplayOff(struct SiS_Private *SiS_Pr)
  899. {
  900. SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x20);
  901. }
  902. /*********************************************/
  903. /* HELPER: Init Port Addresses */
  904. /*********************************************/
  905. void
  906. SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr)
  907. {
  908. SiS_Pr->SiS_P3c4 = BaseAddr + 0x14;
  909. SiS_Pr->SiS_P3d4 = BaseAddr + 0x24;
  910. SiS_Pr->SiS_P3c0 = BaseAddr + 0x10;
  911. SiS_Pr->SiS_P3ce = BaseAddr + 0x1e;
  912. SiS_Pr->SiS_P3c2 = BaseAddr + 0x12;
  913. SiS_Pr->SiS_P3ca = BaseAddr + 0x1a;
  914. SiS_Pr->SiS_P3c6 = BaseAddr + 0x16;
  915. SiS_Pr->SiS_P3c7 = BaseAddr + 0x17;
  916. SiS_Pr->SiS_P3c8 = BaseAddr + 0x18;
  917. SiS_Pr->SiS_P3c9 = BaseAddr + 0x19;
  918. SiS_Pr->SiS_P3cb = BaseAddr + 0x1b;
  919. SiS_Pr->SiS_P3cc = BaseAddr + 0x1c;
  920. SiS_Pr->SiS_P3cd = BaseAddr + 0x1d;
  921. SiS_Pr->SiS_P3da = BaseAddr + 0x2a;
  922. SiS_Pr->SiS_Part1Port = BaseAddr + SIS_CRT2_PORT_04;
  923. SiS_Pr->SiS_Part2Port = BaseAddr + SIS_CRT2_PORT_10;
  924. SiS_Pr->SiS_Part3Port = BaseAddr + SIS_CRT2_PORT_12;
  925. SiS_Pr->SiS_Part4Port = BaseAddr + SIS_CRT2_PORT_14;
  926. SiS_Pr->SiS_Part5Port = BaseAddr + SIS_CRT2_PORT_14 + 2;
  927. SiS_Pr->SiS_DDC_Port = BaseAddr + 0x14;
  928. SiS_Pr->SiS_VidCapt = BaseAddr + SIS_VIDEO_CAPTURE;
  929. SiS_Pr->SiS_VidPlay = BaseAddr + SIS_VIDEO_PLAYBACK;
  930. }
  931. /*********************************************/
  932. /* HELPER: GetSysFlags */
  933. /*********************************************/
  934. static void
  935. SiS_GetSysFlags(struct SiS_Private *SiS_Pr)
  936. {
  937. unsigned char cr5f, temp1, temp2;
  938. /* 661 and newer: NEVER write non-zero to SR11[7:4] */
  939. /* (SR11 is used for DDC and in enable/disablebridge) */
  940. SiS_Pr->SiS_SensibleSR11 = false;
  941. SiS_Pr->SiS_MyCR63 = 0x63;
  942. if(SiS_Pr->ChipType >= SIS_330) {
  943. SiS_Pr->SiS_MyCR63 = 0x53;
  944. if(SiS_Pr->ChipType >= SIS_661) {
  945. SiS_Pr->SiS_SensibleSR11 = true;
  946. }
  947. }
  948. /* You should use the macros, not these flags directly */
  949. SiS_Pr->SiS_SysFlags = 0;
  950. if(SiS_Pr->ChipType == SIS_650) {
  951. cr5f = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0xf0;
  952. SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x5c,0x07);
  953. temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
  954. SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x5c,0xf8);
  955. temp2 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
  956. if((!temp1) || (temp2)) {
  957. switch(cr5f) {
  958. case 0x80:
  959. case 0x90:
  960. case 0xc0:
  961. SiS_Pr->SiS_SysFlags |= SF_IsM650;
  962. break;
  963. case 0xa0:
  964. case 0xb0:
  965. case 0xe0:
  966. SiS_Pr->SiS_SysFlags |= SF_Is651;
  967. break;
  968. }
  969. } else {
  970. switch(cr5f) {
  971. case 0x90:
  972. temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
  973. switch(temp1) {
  974. case 0x00: SiS_Pr->SiS_SysFlags |= SF_IsM652; break;
  975. case 0x40: SiS_Pr->SiS_SysFlags |= SF_IsM653; break;
  976. default: SiS_Pr->SiS_SysFlags |= SF_IsM650; break;
  977. }
  978. break;
  979. case 0xb0:
  980. SiS_Pr->SiS_SysFlags |= SF_Is652;
  981. break;
  982. default:
  983. SiS_Pr->SiS_SysFlags |= SF_IsM650;
  984. break;
  985. }
  986. }
  987. }
  988. if(SiS_Pr->ChipType >= SIS_760 && SiS_Pr->ChipType <= SIS_761) {
  989. if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0x30) {
  990. SiS_Pr->SiS_SysFlags |= SF_760LFB;
  991. }
  992. if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x79) & 0xf0) {
  993. SiS_Pr->SiS_SysFlags |= SF_760UMA;
  994. }
  995. }
  996. }
  997. /*********************************************/
  998. /* HELPER: Init PCI & Engines */
  999. /*********************************************/
  1000. static void
  1001. SiSInitPCIetc(struct SiS_Private *SiS_Pr)
  1002. {
  1003. switch(SiS_Pr->ChipType) {
  1004. #ifdef SIS300
  1005. case SIS_300:
  1006. case SIS_540:
  1007. case SIS_630:
  1008. case SIS_730:
  1009. /* Set - PCI LINEAR ADDRESSING ENABLE (0x80)
  1010. * - RELOCATED VGA IO ENABLED (0x20)
  1011. * - MMIO ENABLED (0x01)
  1012. * Leave other bits untouched.
  1013. */
  1014. SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x20,0xa1);
  1015. /* - Enable 2D (0x40)
  1016. * - Enable 3D (0x02)
  1017. * - Enable 3D Vertex command fetch (0x10) ?
  1018. * - Enable 3D command parser (0x08) ?
  1019. */
  1020. SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x5A);
  1021. break;
  1022. #endif
  1023. #ifdef SIS315H
  1024. case SIS_315H:
  1025. case SIS_315:
  1026. case SIS_315PRO:
  1027. case SIS_650:
  1028. case SIS_740:
  1029. case SIS_330:
  1030. case SIS_661:
  1031. case SIS_741:
  1032. case SIS_660:
  1033. case SIS_760:
  1034. case SIS_761:
  1035. case SIS_340:
  1036. case XGI_40:
  1037. /* See above */
  1038. SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x20,0xa1);
  1039. /* - Enable 3D G/L transformation engine (0x80)
  1040. * - Enable 2D (0x40)
  1041. * - Enable 3D vertex command fetch (0x10)
  1042. * - Enable 3D command parser (0x08)
  1043. * - Enable 3D (0x02)
  1044. */
  1045. SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0xDA);
  1046. break;
  1047. case XGI_20:
  1048. case SIS_550:
  1049. /* See above */
  1050. SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x20,0xa1);
  1051. /* No 3D engine ! */
  1052. /* - Enable 2D (0x40)
  1053. * - disable 3D
  1054. */
  1055. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x1E,0x60,0x40);
  1056. break;
  1057. #endif
  1058. default:
  1059. break;
  1060. }
  1061. }
  1062. /*********************************************/
  1063. /* HELPER: SetLVDSetc */
  1064. /*********************************************/
  1065. #ifdef SIS_LINUX_KERNEL
  1066. static
  1067. #endif
  1068. void
  1069. SiSSetLVDSetc(struct SiS_Private *SiS_Pr)
  1070. {
  1071. unsigned short temp;
  1072. SiS_Pr->SiS_IF_DEF_LVDS = 0;
  1073. SiS_Pr->SiS_IF_DEF_TRUMPION = 0;
  1074. SiS_Pr->SiS_IF_DEF_CH70xx = 0;
  1075. SiS_Pr->SiS_IF_DEF_CONEX = 0;
  1076. SiS_Pr->SiS_ChrontelInit = 0;
  1077. if(SiS_Pr->ChipType == XGI_20) return;
  1078. /* Check for SiS30x first */
  1079. temp = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00);
  1080. if((temp == 1) || (temp == 2)) return;
  1081. switch(SiS_Pr->ChipType) {
  1082. #ifdef SIS300
  1083. case SIS_540:
  1084. case SIS_630:
  1085. case SIS_730:
  1086. temp = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x37) & 0x0e) >> 1;
  1087. if((temp >= 2) && (temp <= 5)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
  1088. if(temp == 3) SiS_Pr->SiS_IF_DEF_TRUMPION = 1;
  1089. if((temp == 4) || (temp == 5)) {
  1090. /* Save power status (and error check) - UNUSED */
  1091. SiS_Pr->SiS_Backup70xx = SiS_GetCH700x(SiS_Pr, 0x0e);
  1092. SiS_Pr->SiS_IF_DEF_CH70xx = 1;
  1093. }
  1094. break;
  1095. #endif
  1096. #ifdef SIS315H
  1097. case SIS_550:
  1098. case SIS_650:
  1099. case SIS_740:
  1100. case SIS_330:
  1101. temp = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x37) & 0x0e) >> 1;
  1102. if((temp >= 2) && (temp <= 3)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
  1103. if(temp == 3) SiS_Pr->SiS_IF_DEF_CH70xx = 2;
  1104. break;
  1105. case SIS_661:
  1106. case SIS_741:
  1107. case SIS_660:
  1108. case SIS_760:
  1109. case SIS_761:
  1110. case SIS_340:
  1111. case XGI_20:
  1112. case XGI_40:
  1113. temp = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x38) & 0xe0) >> 5;
  1114. if((temp >= 2) && (temp <= 3)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
  1115. if(temp == 3) SiS_Pr->SiS_IF_DEF_CH70xx = 2;
  1116. if(temp == 4) SiS_Pr->SiS_IF_DEF_CONEX = 1; /* Not yet supported */
  1117. break;
  1118. #endif
  1119. default:
  1120. break;
  1121. }
  1122. }
  1123. /*********************************************/
  1124. /* HELPER: Enable DSTN/FSTN */
  1125. /*********************************************/
  1126. void
  1127. SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable)
  1128. {
  1129. SiS_Pr->SiS_IF_DEF_DSTN = enable ? 1 : 0;
  1130. }
  1131. void
  1132. SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable)
  1133. {
  1134. SiS_Pr->SiS_IF_DEF_FSTN = enable ? 1 : 0;
  1135. }
  1136. /*********************************************/
  1137. /* HELPER: Get modeflag */
  1138. /*********************************************/
  1139. unsigned short
  1140. SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
  1141. unsigned short ModeIdIndex)
  1142. {
  1143. if(SiS_Pr->UseCustomMode) {
  1144. return SiS_Pr->CModeFlag;
  1145. } else if(ModeNo <= 0x13) {
  1146. return SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
  1147. } else {
  1148. return SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
  1149. }
  1150. }
  1151. /*********************************************/
  1152. /* HELPER: Determine ROM usage */
  1153. /*********************************************/
  1154. bool
  1155. SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr)
  1156. {
  1157. unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
  1158. unsigned short romversoffs, romvmaj = 1, romvmin = 0;
  1159. if(SiS_Pr->ChipType >= XGI_20) {
  1160. /* XGI ROMs don't qualify */
  1161. return false;
  1162. } else if(SiS_Pr->ChipType >= SIS_761) {
  1163. /* I very much assume 761, 340 and newer will use new layout */
  1164. return true;
  1165. } else if(SiS_Pr->ChipType >= SIS_661) {
  1166. if((ROMAddr[0x1a] == 'N') &&
  1167. (ROMAddr[0x1b] == 'e') &&
  1168. (ROMAddr[0x1c] == 'w') &&
  1169. (ROMAddr[0x1d] == 'V')) {
  1170. return true;
  1171. }
  1172. romversoffs = ROMAddr[0x16] | (ROMAddr[0x17] << 8);
  1173. if(romversoffs) {
  1174. if((ROMAddr[romversoffs+1] == '.') || (ROMAddr[romversoffs+4] == '.')) {
  1175. romvmaj = ROMAddr[romversoffs] - '0';
  1176. romvmin = ((ROMAddr[romversoffs+2] -'0') * 10) + (ROMAddr[romversoffs+3] - '0');
  1177. }
  1178. }
  1179. if((romvmaj != 0) || (romvmin >= 92)) {
  1180. return true;
  1181. }
  1182. } else if(IS_SIS650740) {
  1183. if((ROMAddr[0x1a] == 'N') &&
  1184. (ROMAddr[0x1b] == 'e') &&
  1185. (ROMAddr[0x1c] == 'w') &&
  1186. (ROMAddr[0x1d] == 'V')) {
  1187. return true;
  1188. }
  1189. }
  1190. return false;
  1191. }
  1192. static void
  1193. SiSDetermineROMUsage(struct SiS_Private *SiS_Pr)
  1194. {
  1195. unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
  1196. unsigned short romptr = 0;
  1197. SiS_Pr->SiS_UseROM = false;
  1198. SiS_Pr->SiS_ROMNew = false;
  1199. SiS_Pr->SiS_PWDOffset = 0;
  1200. if(SiS_Pr->ChipType >= XGI_20) return;
  1201. if((ROMAddr) && (SiS_Pr->UseROM)) {
  1202. if(SiS_Pr->ChipType == SIS_300) {
  1203. /* 300: We check if the code starts below 0x220 by
  1204. * checking the jmp instruction at the beginning
  1205. * of the BIOS image.
  1206. */
  1207. if((ROMAddr[3] == 0xe9) && ((ROMAddr[5] << 8) | ROMAddr[4]) > 0x21a)
  1208. SiS_Pr->SiS_UseROM = true;
  1209. } else if(SiS_Pr->ChipType < SIS_315H) {
  1210. /* Sony's VAIO BIOS 1.09 follows the standard, so perhaps
  1211. * the others do as well
  1212. */
  1213. SiS_Pr->SiS_UseROM = true;
  1214. } else {
  1215. /* 315/330 series stick to the standard(s) */
  1216. SiS_Pr->SiS_UseROM = true;
  1217. if((SiS_Pr->SiS_ROMNew = SiSDetermineROMLayout661(SiS_Pr))) {
  1218. SiS_Pr->SiS_EMIOffset = 14;
  1219. SiS_Pr->SiS_PWDOffset = 17;
  1220. SiS_Pr->SiS661LCD2TableSize = 36;
  1221. /* Find out about LCD data table entry size */
  1222. if((romptr = SISGETROMW(0x0102))) {
  1223. if(ROMAddr[romptr + (32 * 16)] == 0xff)
  1224. SiS_Pr->SiS661LCD2TableSize = 32;
  1225. else if(ROMAddr[romptr + (34 * 16)] == 0xff)
  1226. SiS_Pr->SiS661LCD2TableSize = 34;
  1227. else if(ROMAddr[romptr + (36 * 16)] == 0xff) /* 0.94, 2.05.00+ */
  1228. SiS_Pr->SiS661LCD2TableSize = 36;
  1229. else if( (ROMAddr[romptr + (38 * 16)] == 0xff) || /* 2.00.00 - 2.02.00 */
  1230. (ROMAddr[0x6F] & 0x01) ) { /* 2.03.00 - <2.05.00 */
  1231. SiS_Pr->SiS661LCD2TableSize = 38; /* UMC data layout abandoned at 2.05.00 */
  1232. SiS_Pr->SiS_EMIOffset = 16;
  1233. SiS_Pr->SiS_PWDOffset = 19;
  1234. }
  1235. }
  1236. }
  1237. }
  1238. }
  1239. }
  1240. /*********************************************/
  1241. /* HELPER: SET SEGMENT REGISTERS */
  1242. /*********************************************/
  1243. static void
  1244. SiS_SetSegRegLower(struct SiS_Private *SiS_Pr, unsigned short value)
  1245. {
  1246. unsigned short temp;
  1247. value &= 0x00ff;
  1248. temp = SiS_GetRegByte(SiS_Pr->SiS_P3cb) & 0xf0;
  1249. temp |= (value >> 4);
  1250. SiS_SetRegByte(SiS_Pr->SiS_P3cb, temp);
  1251. temp = SiS_GetRegByte(SiS_Pr->SiS_P3cd) & 0xf0;
  1252. temp |= (value & 0x0f);
  1253. SiS_SetRegByte(SiS_Pr->SiS_P3cd, temp);
  1254. }
  1255. static void
  1256. SiS_SetSegRegUpper(struct SiS_Private *SiS_Pr, unsigned short value)
  1257. {
  1258. unsigned short temp;
  1259. value &= 0x00ff;
  1260. temp = SiS_GetRegByte(SiS_Pr->SiS_P3cb) & 0x0f;
  1261. temp |= (value & 0xf0);
  1262. SiS_SetRegByte(SiS_Pr->SiS_P3cb, temp);
  1263. temp = SiS_GetRegByte(SiS_Pr->SiS_P3cd) & 0x0f;
  1264. temp |= (value << 4);
  1265. SiS_SetRegByte(SiS_Pr->SiS_P3cd, temp);
  1266. }
  1267. static void
  1268. SiS_SetSegmentReg(struct SiS_Private *SiS_Pr, unsigned short value)
  1269. {
  1270. SiS_SetSegRegLower(SiS_Pr, value);
  1271. SiS_SetSegRegUpper(SiS_Pr, value);
  1272. }
  1273. static void
  1274. SiS_ResetSegmentReg(struct SiS_Private *SiS_Pr)
  1275. {
  1276. SiS_SetSegmentReg(SiS_Pr, 0);
  1277. }
  1278. static void
  1279. SiS_SetSegmentRegOver(struct SiS_Private *SiS_Pr, unsigned short value)
  1280. {
  1281. unsigned short temp = value >> 8;
  1282. temp &= 0x07;
  1283. temp |= (temp << 4);
  1284. SiS_SetReg(SiS_Pr->SiS_P3c4,0x1d,temp);
  1285. SiS_SetSegmentReg(SiS_Pr, value);
  1286. }
  1287. static void
  1288. SiS_ResetSegmentRegOver(struct SiS_Private *SiS_Pr)
  1289. {
  1290. SiS_SetSegmentRegOver(SiS_Pr, 0);
  1291. }
  1292. static void
  1293. SiS_ResetSegmentRegisters(struct SiS_Private *SiS_Pr)
  1294. {
  1295. if((IS_SIS65x) || (SiS_Pr->ChipType >= SIS_661)) {
  1296. SiS_ResetSegmentReg(SiS_Pr);
  1297. SiS_ResetSegmentRegOver(SiS_Pr);
  1298. }
  1299. }
  1300. /*********************************************/
  1301. /* HELPER: GetVBType */
  1302. /*********************************************/
  1303. #ifdef SIS_LINUX_KERNEL
  1304. static
  1305. #endif
  1306. void
  1307. SiS_GetVBType(struct SiS_Private *SiS_Pr)
  1308. {
  1309. unsigned short flag = 0, rev = 0, nolcd = 0;
  1310. unsigned short p4_0f, p4_25, p4_27;
  1311. SiS_Pr->SiS_VBType = 0;
  1312. if((SiS_Pr->SiS_IF_DEF_LVDS) || (SiS_Pr->SiS_IF_DEF_CONEX))
  1313. return;
  1314. if(SiS_Pr->ChipType == XGI_20)
  1315. return;
  1316. flag = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00);
  1317. if(flag > 3)
  1318. return;
  1319. rev = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x01);
  1320. if(flag >= 2) {
  1321. SiS_Pr->SiS_VBType = VB_SIS302B;
  1322. } else if(flag == 1) {
  1323. if(rev >= 0xC0) {
  1324. SiS_Pr->SiS_VBType = VB_SIS301C;
  1325. } else if(rev >= 0xB0) {
  1326. SiS_Pr->SiS_VBType = VB_SIS301B;
  1327. /* Check if 30xB DH version (no LCD support, use Panel Link instead) */
  1328. nolcd = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x23);
  1329. if(!(nolcd & 0x02)) SiS_Pr->SiS_VBType |= VB_NoLCD;
  1330. } else {
  1331. SiS_Pr->SiS_VBType = VB_SIS301;
  1332. }
  1333. }
  1334. if(SiS_Pr->SiS_VBType & (VB_SIS301B | VB_SIS301C | VB_SIS302B)) {
  1335. if(rev >= 0xE0) {
  1336. flag = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x39);
  1337. if(flag == 0xff) SiS_Pr->SiS_VBType = VB_SIS302LV;
  1338. else SiS_Pr->SiS_VBType = VB_SIS301C; /* VB_SIS302ELV; */
  1339. } else if(rev >= 0xD0) {
  1340. SiS_Pr->SiS_VBType = VB_SIS301LV;
  1341. }
  1342. }
  1343. if(SiS_Pr->SiS_VBType & (VB_SIS301C | VB_SIS301LV | VB_SIS302LV | VB_SIS302ELV)) {
  1344. p4_0f = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x0f);
  1345. p4_25 = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x25);
  1346. p4_27 = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x27);
  1347. SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x0f,0x7f);
  1348. SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x25,0x08);
  1349. SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x27,0xfd);
  1350. if(SiS_GetReg(SiS_Pr->SiS_Part4Port,0x26) & 0x08) {
  1351. SiS_Pr->SiS_VBType |= VB_UMC;
  1352. }
  1353. SiS_SetReg(SiS_Pr->SiS_Part4Port,0x27,p4_27);
  1354. SiS_SetReg(SiS_Pr->SiS_Part4Port,0x25,p4_25);
  1355. SiS_SetReg(SiS_Pr->SiS_Part4Port,0x0f,p4_0f);
  1356. }
  1357. }
  1358. /*********************************************/
  1359. /* HELPER: Check RAM size */
  1360. /*********************************************/
  1361. #ifdef SIS_LINUX_KERNEL
  1362. static bool
  1363. SiS_CheckMemorySize(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
  1364. unsigned short ModeIdIndex)
  1365. {
  1366. unsigned short AdapterMemSize = SiS_Pr->VideoMemorySize / (1024*1024);
  1367. unsigned short modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
  1368. unsigned short memorysize = ((modeflag & MemoryInfoFlag) >> MemorySizeShift) + 1;
  1369. if(!AdapterMemSize) return true;
  1370. if(AdapterMemSize < memorysize) return false;
  1371. return true;
  1372. }
  1373. #endif
  1374. /*********************************************/
  1375. /* HELPER: Get DRAM type */
  1376. /*********************************************/
  1377. #ifdef SIS315H
  1378. static unsigned char
  1379. SiS_Get310DRAMType(struct SiS_Private *SiS_Pr)
  1380. {
  1381. unsigned char data;
  1382. if((*SiS_Pr->pSiS_SoftSetting) & SoftDRAMType) {
  1383. data = (*SiS_Pr->pSiS_SoftSetting) & 0x03;
  1384. } else {
  1385. if(SiS_Pr->ChipType >= XGI_20) {
  1386. /* Do I need this? SR17 seems to be zero anyway... */
  1387. data = 0;
  1388. } else if(SiS_Pr->ChipType >= SIS_340) {
  1389. /* TODO */
  1390. data = 0;
  1391. } if(SiS_Pr->ChipType >= SIS_661) {
  1392. if(SiS_Pr->SiS_ROMNew) {
  1393. data = ((SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0xc0) >> 6);
  1394. } else {
  1395. data = SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0x07;
  1396. }
  1397. } else if(IS_SIS550650740) {
  1398. data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x13) & 0x07;
  1399. } else { /* 315, 330 */
  1400. data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x3a) & 0x03;
  1401. if(SiS_Pr->ChipType == SIS_330) {
  1402. if(data > 1) {
  1403. switch(SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0x30) {
  1404. case 0x00: data = 1; break;
  1405. case 0x10: data = 3; break;
  1406. case 0x20: data = 3; break;
  1407. case 0x30: data = 2; break;
  1408. }
  1409. } else {
  1410. data = 0;
  1411. }
  1412. }
  1413. }
  1414. }
  1415. return data;
  1416. }
  1417. static unsigned short
  1418. SiS_GetMCLK(struct SiS_Private *SiS_Pr)
  1419. {
  1420. unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
  1421. unsigned short index;
  1422. index = SiS_Get310DRAMType(SiS_Pr);
  1423. if(SiS_Pr->ChipType >= SIS_661) {
  1424. if(SiS_Pr->SiS_ROMNew) {
  1425. return((unsigned short)(SISGETROMW((0x90 + (index * 5) + 3))));
  1426. }
  1427. return(SiS_Pr->SiS_MCLKData_0[index].CLOCK);
  1428. } else if(index >= 4) {
  1429. return(SiS_Pr->SiS_MCLKData_1[index - 4].CLOCK);
  1430. } else {
  1431. return(SiS_Pr->SiS_MCLKData_0[index].CLOCK);
  1432. }
  1433. }
  1434. #endif
  1435. /*********************************************/
  1436. /* HELPER: ClearBuffer */
  1437. /*********************************************/
  1438. #ifdef SIS_LINUX_KERNEL
  1439. static void
  1440. SiS_ClearBuffer(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
  1441. {
  1442. unsigned char SISIOMEMTYPE *memaddr = SiS_Pr->VideoMemoryAddress;
  1443. unsigned int memsize = SiS_Pr->VideoMemorySize;
  1444. unsigned short SISIOMEMTYPE *pBuffer;
  1445. int i;
  1446. if(!memaddr || !memsize) return;
  1447. if(SiS_Pr->SiS_ModeType >= ModeEGA) {
  1448. if(ModeNo > 0x13) {
  1449. SiS_SetMemory(memaddr, memsize, 0);
  1450. } else {
  1451. pBuffer = (unsigned short SISIOMEMTYPE *)memaddr;
  1452. for(i = 0; i < 0x4000; i++) writew(0x0000, &pBuffer[i]);
  1453. }
  1454. } else if(SiS_Pr->SiS_ModeType < ModeCGA) {
  1455. pBuffer = (unsigned short SISIOMEMTYPE *)memaddr;
  1456. for(i = 0; i < 0x4000; i++) writew(0x0720, &pBuffer[i]);
  1457. } else {
  1458. SiS_SetMemory(memaddr, 0x8000, 0);
  1459. }
  1460. }
  1461. #endif
  1462. /*********************************************/
  1463. /* HELPER: SearchModeID */
  1464. /*********************************************/
  1465. bool
  1466. SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo,
  1467. unsigned short *ModeIdIndex)
  1468. {
  1469. unsigned char VGAINFO = SiS_Pr->SiS_VGAINFO;
  1470. if((*ModeNo) <= 0x13) {
  1471. if((*ModeNo) <= 0x05) (*ModeNo) |= 0x01;
  1472. for((*ModeIdIndex) = 0; ;(*ModeIdIndex)++) {
  1473. if(SiS_Pr->SiS_SModeIDTable[(*ModeIdIndex)].St_ModeID == (*ModeNo)) break;
  1474. if(SiS_Pr->SiS_SModeIDTable[(*ModeIdIndex)].St_ModeID == 0xFF) return false;
  1475. }
  1476. if((*ModeNo) == 0x07) {
  1477. if(VGAINFO & 0x10) (*ModeIdIndex)++; /* 400 lines */
  1478. /* else 350 lines */
  1479. }
  1480. if((*ModeNo) <= 0x03) {
  1481. if(!(VGAINFO & 0x80)) (*ModeIdIndex)++;
  1482. if(VGAINFO & 0x10) (*ModeIdIndex)++; /* 400 lines */
  1483. /* else 350 lines */
  1484. }
  1485. /* else 200 lines */
  1486. } else {
  1487. for((*ModeIdIndex) = 0; ;(*ModeIdIndex)++) {
  1488. if(SiS_Pr->SiS_EModeIDTable[(*ModeIdIndex)].Ext_ModeID == (*ModeNo)) break;
  1489. if(SiS_Pr->SiS_EModeIDTable[(*ModeIdIndex)].Ext_ModeID == 0xFF) return false;
  1490. }
  1491. }
  1492. return true;
  1493. }
  1494. /*********************************************/
  1495. /* HELPER: GetModePtr */
  1496. /*********************************************/
  1497. unsigned short
  1498. SiS_GetModePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
  1499. {
  1500. unsigned short index;
  1501. if(ModeNo <= 0x13) {
  1502. index = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_StTableIndex;
  1503. } else {
  1504. if(SiS_Pr->SiS_ModeType <= ModeEGA) index = 0x1B;
  1505. else index = 0x0F;
  1506. }
  1507. return index;
  1508. }
  1509. /*********************************************/
  1510. /* HELPERS: Get some indices */
  1511. /*********************************************/
  1512. unsigned short
  1513. SiS_GetRefCRTVCLK(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide)
  1514. {
  1515. if(SiS_Pr->SiS_RefIndex[Index].Ext_InfoFlag & HaveWideTiming) {
  1516. if(UseWide == 1) {
  1517. return SiS_Pr->SiS_RefIndex[Index].Ext_CRTVCLK_WIDE;
  1518. } else {
  1519. return SiS_Pr->SiS_RefIndex[Index].Ext_CRTVCLK_NORM;
  1520. }
  1521. } else {
  1522. return SiS_Pr->SiS_RefIndex[Index].Ext_CRTVCLK;
  1523. }
  1524. }
  1525. unsigned short
  1526. SiS_GetRefCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide)
  1527. {
  1528. if(SiS_Pr->SiS_RefIndex[Index].Ext_InfoFlag & HaveWideTiming) {
  1529. if(UseWide == 1) {
  1530. return SiS_Pr->SiS_RefIndex[Index].Ext_CRT1CRTC_WIDE;
  1531. } else {
  1532. return SiS_Pr->SiS_RefIndex[Index].Ext_CRT1CRTC_NORM;
  1533. }
  1534. } else {
  1535. return SiS_Pr->SiS_RefIndex[Index].Ext_CRT1CRTC;
  1536. }
  1537. }
  1538. /*********************************************/
  1539. /* HELPER: LowModeTests */
  1540. /*********************************************/
  1541. static bool
  1542. SiS_DoLowModeTest(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
  1543. {
  1544. unsigned short temp, temp1, temp2;
  1545. if((ModeNo != 0x03) && (ModeNo != 0x10) && (ModeNo != 0x12))
  1546. return true;
  1547. temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x11);
  1548. SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x11,0x80);
  1549. temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x00);
  1550. SiS_SetReg(SiS_Pr->SiS_P3d4,0x00,0x55);
  1551. temp2 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x00);
  1552. SiS_SetReg(SiS_Pr->SiS_P3d4,0x00,temp1);
  1553. SiS_SetReg(SiS_Pr->SiS_P3d4,0x11,temp);
  1554. if((SiS_Pr->ChipType >= SIS_315H) ||
  1555. (SiS_Pr->ChipType == SIS_300)) {
  1556. if(temp2 == 0x55) return false;
  1557. else return true;
  1558. } else {
  1559. if(temp2 != 0x55) return true;
  1560. else {
  1561. SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01);
  1562. return false;
  1563. }
  1564. }
  1565. }
  1566. static void
  1567. SiS_SetLowModeTest(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
  1568. {
  1569. if(SiS_DoLowModeTest(SiS_Pr, ModeNo)) {
  1570. SiS_Pr->SiS_SetFlag |= LowModeTests;
  1571. }
  1572. }
  1573. /*********************************************/
  1574. /* HELPER: OPEN/CLOSE CRT1 CRTC */
  1575. /*********************************************/
  1576. static void
  1577. SiS_OpenCRTC(struct SiS_Private *SiS_Pr)
  1578. {
  1579. if(IS_SIS650) {
  1580. SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x51,0x1f);
  1581. if(IS_SIS651) SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x51,0x20);
  1582. SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x56,0xe7);
  1583. } else if(IS_SIS661741660760) {
  1584. SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x61,0xf7);
  1585. SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x51,0x1f);
  1586. SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x56,0xe7);
  1587. if(!SiS_Pr->SiS_ROMNew) {
  1588. SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x3a,0xef);
  1589. }
  1590. }
  1591. }
  1592. static void
  1593. SiS_CloseCRTC(struct SiS_Private *SiS_Pr)
  1594. {
  1595. #if 0 /* This locks some CRTC registers. We don't want that. */
  1596. unsigned short temp1 = 0, temp2 = 0;
  1597. if(IS_SIS661741660760) {
  1598. if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
  1599. temp1 = 0xa0; temp2 = 0x08;
  1600. }
  1601. SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x51,0x1f,temp1);
  1602. SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x56,0xe7,temp2);
  1603. }
  1604. #endif
  1605. }
  1606. static void
  1607. SiS_HandleCRT1(struct SiS_Private *SiS_Pr)
  1608. {
  1609. /* Enable CRT1 gating */
  1610. SiS_SetRegAND(SiS_Pr->SiS_P3d4,SiS_Pr->SiS_MyCR63,0xbf);
  1611. #if 0
  1612. if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x15) & 0x01)) {
  1613. if((SiS_GetReg(SiS_Pr->SiS_P3c4,0x15) & 0x0a) ||
  1614. (SiS_GetReg(SiS_Pr->SiS_P3c4,0x16) & 0x01)) {
  1615. SiS_SetRegOR(SiS_Pr->SiS_P3d4,SiS_Pr->SiS_MyCR63,0x40);
  1616. }
  1617. }
  1618. #endif
  1619. }
  1620. /*********************************************/
  1621. /* HELPER: GetColorDepth */
  1622. /*********************************************/
  1623. unsigned short
  1624. SiS_GetColorDepth(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
  1625. unsigned short ModeIdIndex)
  1626. {
  1627. static const unsigned short ColorDepth[6] = { 1, 2, 4, 4, 6, 8 };
  1628. unsigned short modeflag;
  1629. short index;
  1630. /* Do NOT check UseCustomMode, will skrew up FIFO */
  1631. if(ModeNo == 0xfe) {
  1632. modeflag = SiS_Pr->CModeFlag;
  1633. } else if(ModeNo <= 0x13) {
  1634. modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
  1635. } else {
  1636. modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
  1637. }
  1638. index = (modeflag & ModeTypeMask) - ModeEGA;
  1639. if(index < 0) index = 0;
  1640. return ColorDepth[index];
  1641. }
  1642. /*********************************************/
  1643. /* HELPER: GetOffset */
  1644. /*********************************************/
  1645. unsigned short
  1646. SiS_GetOffset(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
  1647. unsigned short ModeIdIndex, unsigned short RRTI)
  1648. {
  1649. unsigned short xres, temp, colordepth, infoflag;
  1650. if(SiS_Pr->UseCustomMode) {
  1651. infoflag = SiS_Pr->CInfoFlag;
  1652. xres = SiS_Pr->CHDisplay;
  1653. } else {
  1654. infoflag = SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag;
  1655. xres = SiS_Pr->SiS_RefIndex[RRTI].XRes;
  1656. }
  1657. colordepth = SiS_GetColorDepth(SiS_Pr, ModeNo, ModeIdIndex);
  1658. temp = xres / 16;
  1659. if(infoflag & InterlaceMode) temp <<= 1;
  1660. temp *= colordepth;
  1661. if(xres % 16) temp += (colordepth >> 1);
  1662. return temp;
  1663. }
  1664. /*********************************************/
  1665. /* SEQ */
  1666. /*********************************************/
  1667. static void
  1668. SiS_SetSeqRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
  1669. {
  1670. unsigned char SRdata;
  1671. int i;
  1672. SiS_SetReg(SiS_Pr->SiS_P3c4,0x00,0x03);
  1673. /* or "display off" */
  1674. SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[0] | 0x20;
  1675. /* determine whether to force x8 dotclock */
  1676. if((SiS_Pr->SiS_VBType & VB_SISVB) || (SiS_Pr->SiS_IF_DEF_LVDS)) {
  1677. if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) {
  1678. if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) SRdata |= 0x01;
  1679. } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) SRdata |= 0x01;
  1680. }
  1681. SiS_SetReg(SiS_Pr->SiS_P3c4,0x01,SRdata);
  1682. for(i = 2; i <= 4; i++) {
  1683. SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[i - 1];
  1684. SiS_SetReg(SiS_Pr->SiS_P3c4,i,SRdata);
  1685. }
  1686. }
  1687. /*********************************************/
  1688. /* MISC */
  1689. /*********************************************/
  1690. static void
  1691. SiS_SetMiscRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
  1692. {
  1693. unsigned char Miscdata;
  1694. Miscdata = SiS_Pr->SiS_StandTable[StandTableIndex].MISC;
  1695. if(SiS_Pr->ChipType < SIS_661) {
  1696. if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
  1697. if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
  1698. Miscdata |= 0x0C;
  1699. }
  1700. }
  1701. }
  1702. SiS_SetRegByte(SiS_Pr->SiS_P3c2,Miscdata);
  1703. }
  1704. /*********************************************/
  1705. /* CRTC */
  1706. /*********************************************/
  1707. static void
  1708. SiS_SetCRTCRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
  1709. {
  1710. unsigned char CRTCdata;
  1711. unsigned short i;
  1712. /* Unlock CRTC */
  1713. SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f);
  1714. for(i = 0; i <= 0x18; i++) {
  1715. CRTCdata = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[i];
  1716. SiS_SetReg(SiS_Pr->SiS_P3d4,i,CRTCdata);
  1717. }
  1718. if(SiS_Pr->ChipType >= SIS_661) {
  1719. SiS_OpenCRTC(SiS_Pr);
  1720. for(i = 0x13; i <= 0x14; i++) {
  1721. CRTCdata = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[i];
  1722. SiS_SetReg(SiS_Pr->SiS_P3d4,i,CRTCdata);
  1723. }
  1724. } else if( ( (SiS_Pr->ChipType == SIS_630) ||
  1725. (SiS_Pr->ChipType == SIS_730) ) &&
  1726. (SiS_Pr->ChipRevision >= 0x30) ) {
  1727. if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
  1728. if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) {
  1729. SiS_SetReg(SiS_Pr->SiS_P3d4,0x18,0xFE);
  1730. }
  1731. }
  1732. }
  1733. }
  1734. /*********************************************/
  1735. /* ATT */
  1736. /*********************************************/
  1737. static void
  1738. SiS_SetATTRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
  1739. {
  1740. unsigned char ARdata;
  1741. unsigned short i;
  1742. for(i = 0; i <= 0x13; i++) {
  1743. ARdata = SiS_Pr->SiS_StandTable[StandTableIndex].ATTR[i];
  1744. if(i == 0x13) {
  1745. /* Pixel shift. If screen on LCD or TV is shifted left or right,
  1746. * this might be the cause.
  1747. */
  1748. if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
  1749. if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) ARdata = 0;
  1750. }
  1751. if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
  1752. if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
  1753. if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
  1754. if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata = 0;
  1755. }
  1756. }
  1757. }
  1758. if(SiS_Pr->ChipType >= SIS_661) {
  1759. if(SiS_Pr->SiS_VBInfo & (SetCRT2ToTV | SetCRT2ToLCD)) {
  1760. if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata = 0;
  1761. }
  1762. } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
  1763. if(SiS_Pr->ChipType >= SIS_315H) {
  1764. if(IS_SIS550650740660) {
  1765. /* 315, 330 don't do this */
  1766. if(SiS_Pr->SiS_VBType & VB_SIS30xB) {
  1767. if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata = 0;
  1768. } else {
  1769. ARdata = 0;
  1770. }
  1771. }
  1772. } else {
  1773. if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata = 0;
  1774. }
  1775. }
  1776. }
  1777. SiS_GetRegByte(SiS_Pr->SiS_P3da); /* reset 3da */
  1778. SiS_SetRegByte(SiS_Pr->SiS_P3c0,i); /* set index */
  1779. SiS_SetRegByte(SiS_Pr->SiS_P3c0,ARdata); /* set data */
  1780. }
  1781. SiS_GetRegByte(SiS_Pr->SiS_P3da); /* reset 3da */
  1782. SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x14); /* set index */
  1783. SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x00); /* set data */
  1784. SiS_GetRegByte(SiS_Pr->SiS_P3da);
  1785. SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x20); /* Enable Attribute */
  1786. SiS_GetRegByte(SiS_Pr->SiS_P3da);
  1787. }
  1788. /*********************************************/
  1789. /* GRC */
  1790. /*********************************************/
  1791. static void
  1792. SiS_SetGRCRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
  1793. {
  1794. unsigned char GRdata;
  1795. unsigned short i;
  1796. for(i = 0; i <= 0x08; i++) {
  1797. GRdata = SiS_Pr->SiS_StandTable[StandTableIndex].GRC[i];
  1798. SiS_SetReg(SiS_Pr->SiS_P3ce,i,GRdata);
  1799. }
  1800. if(SiS_Pr->SiS_ModeType > ModeVGA) {
  1801. /* 256 color disable */
  1802. SiS_SetRegAND(SiS_Pr->SiS_P3ce,0x05,0xBF);
  1803. }
  1804. }
  1805. /*********************************************/
  1806. /* CLEAR EXTENDED REGISTERS */
  1807. /*********************************************/
  1808. static void
  1809. SiS_ClearExt1Regs(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
  1810. {
  1811. unsigned short i;
  1812. for(i = 0x0A; i <= 0x0E; i++) {
  1813. SiS_SetReg(SiS_Pr->SiS_P3c4,i,0x00);
  1814. }
  1815. if(SiS_Pr->ChipType >= SIS_315H) {
  1816. SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x37,0xFE);
  1817. if(ModeNo <= 0x13) {
  1818. if(ModeNo == 0x06 || ModeNo >= 0x0e) {
  1819. SiS_SetReg(SiS_Pr->SiS_P3c4,0x0e,0x20);
  1820. }
  1821. }
  1822. }
  1823. }
  1824. /*********************************************/
  1825. /* RESET VCLK */
  1826. /*********************************************/
  1827. static void
  1828. SiS_ResetCRT1VCLK(struct SiS_Private *SiS_Pr)
  1829. {
  1830. if(SiS_Pr->ChipType >= SIS_315H) {
  1831. if(SiS_Pr->ChipType < SIS_661) {
  1832. if(SiS_Pr->SiS_IF_DEF_LVDS == 0) return;
  1833. }
  1834. } else {
  1835. if((SiS_Pr->SiS_IF_DEF_LVDS == 0) &&
  1836. (!(SiS_Pr->SiS_VBType & VB_SIS30xBLV)) ) {
  1837. return;
  1838. }
  1839. }
  1840. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x31,0xcf,0x20);
  1841. SiS_SetReg(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VCLKData[1].SR2B);
  1842. SiS_SetReg(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VCLKData[1].SR2C);
  1843. SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80);
  1844. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x31,0xcf,0x10);
  1845. SiS_SetReg(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VCLKData[0].SR2B);
  1846. SiS_SetReg(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VCLKData[0].SR2C);
  1847. SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80);
  1848. }
  1849. /*********************************************/
  1850. /* SYNC */
  1851. /*********************************************/
  1852. static void
  1853. SiS_SetCRT1Sync(struct SiS_Private *SiS_Pr, unsigned short RRTI)
  1854. {
  1855. unsigned short sync;
  1856. if(SiS_Pr->UseCustomMode) {
  1857. sync = SiS_Pr->CInfoFlag >> 8;
  1858. } else {
  1859. sync = SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag >> 8;
  1860. }
  1861. sync &= 0xC0;
  1862. sync |= 0x2f;
  1863. SiS_SetRegByte(SiS_Pr->SiS_P3c2,sync);
  1864. }
  1865. /*********************************************/
  1866. /* CRTC/2 */
  1867. /*********************************************/
  1868. static void
  1869. SiS_SetCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
  1870. unsigned short ModeIdIndex, unsigned short RRTI)
  1871. {
  1872. unsigned short temp, i, j, modeflag;
  1873. unsigned char *crt1data = NULL;
  1874. modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
  1875. if(SiS_Pr->UseCustomMode) {
  1876. crt1data = &SiS_Pr->CCRT1CRTC[0];
  1877. } else {
  1878. temp = SiS_GetRefCRT1CRTC(SiS_Pr, RRTI, SiS_Pr->SiS_UseWide);
  1879. /* Alternate for 1600x1200 LCDA */
  1880. if((temp == 0x20) && (SiS_Pr->Alternate1600x1200)) temp = 0x57;
  1881. crt1data = (unsigned char *)&SiS_Pr->SiS_CRT1Table[temp].CR[0];
  1882. }
  1883. /* unlock cr0-7 */
  1884. SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f);
  1885. for(i = 0, j = 0; i <= 7; i++, j++) {
  1886. SiS_SetReg(SiS_Pr->SiS_P3d4,j,crt1data[i]);
  1887. }
  1888. for(j = 0x10; i <= 10; i++, j++) {
  1889. SiS_SetReg(SiS_Pr->SiS_P3d4,j,crt1data[i]);
  1890. }
  1891. for(j = 0x15; i <= 12; i++, j++) {
  1892. SiS_SetReg(SiS_Pr->SiS_P3d4,j,crt1data[i]);
  1893. }
  1894. for(j = 0x0A; i <= 15; i++, j++) {
  1895. SiS_SetReg(SiS_Pr->SiS_P3c4,j,crt1data[i]);
  1896. }
  1897. SiS_SetReg(SiS_Pr->SiS_P3c4,0x0E,crt1data[16] & 0xE0);
  1898. temp = (crt1data[16] & 0x01) << 5;
  1899. if(modeflag & DoubleScanMode) temp |= 0x80;
  1900. SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,temp);
  1901. if(SiS_Pr->SiS_ModeType > ModeVGA) {
  1902. SiS_SetReg(SiS_Pr->SiS_P3d4,0x14,0x4F);
  1903. }
  1904. #ifdef SIS315H
  1905. if(SiS_Pr->ChipType == XGI_20) {
  1906. SiS_SetReg(SiS_Pr->SiS_P3d4,0x04,crt1data[4] - 1);
  1907. if(!(temp = crt1data[5] & 0x1f)) {
  1908. SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x0c,0xfb);
  1909. }
  1910. SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x05,0xe0,((temp - 1) & 0x1f));
  1911. temp = (crt1data[16] >> 5) + 3;
  1912. if(temp > 7) temp -= 7;
  1913. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0e,0x1f,(temp << 5));
  1914. }
  1915. #endif
  1916. }
  1917. /*********************************************/
  1918. /* OFFSET & PITCH */
  1919. /*********************************************/
  1920. /* (partly overruled by SetPitch() in XF86) */
  1921. /*********************************************/
  1922. static void
  1923. SiS_SetCRT1Offset(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
  1924. unsigned short ModeIdIndex, unsigned short RRTI)
  1925. {
  1926. unsigned short temp, DisplayUnit, infoflag;
  1927. if(SiS_Pr->UseCustomMode) {
  1928. infoflag = SiS_Pr->CInfoFlag;
  1929. } else {
  1930. infoflag = SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag;
  1931. }
  1932. DisplayUnit = SiS_GetOffset(SiS_Pr, ModeNo, ModeIdIndex, RRTI);
  1933. temp = (DisplayUnit >> 8) & 0x0f;
  1934. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0xF0,temp);
  1935. SiS_SetReg(SiS_Pr->SiS_P3d4,0x13,DisplayUnit & 0xFF);
  1936. if(infoflag & InterlaceMode) DisplayUnit >>= 1;
  1937. DisplayUnit <<= 5;
  1938. temp = (DisplayUnit >> 8) + 1;
  1939. if(DisplayUnit & 0xff) temp++;
  1940. if(SiS_Pr->ChipType == XGI_20) {
  1941. if(ModeNo == 0x4a || ModeNo == 0x49) temp--;
  1942. }
  1943. SiS_SetReg(SiS_Pr->SiS_P3c4,0x10,temp);
  1944. }
  1945. /*********************************************/
  1946. /* VCLK */
  1947. /*********************************************/
  1948. static void
  1949. SiS_SetCRT1VCLK(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
  1950. unsigned short ModeIdIndex, unsigned short RRTI)
  1951. {
  1952. unsigned short index = 0, clka, clkb;
  1953. if(SiS_Pr->UseCustomMode) {
  1954. clka = SiS_Pr->CSR2B;
  1955. clkb = SiS_Pr->CSR2C;
  1956. } else {
  1957. index = SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RRTI);
  1958. if((SiS_Pr->SiS_VBType & VB_SIS30xBLV) &&
  1959. (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
  1960. /* Alternate for 1600x1200 LCDA */
  1961. if((index == 0x21) && (SiS_Pr->Alternate1600x1200)) index = 0x72;
  1962. clka = SiS_Pr->SiS_VBVCLKData[index].Part4_A;
  1963. clkb = SiS_Pr->SiS_VBVCLKData[index].Part4_B;
  1964. } else {
  1965. clka = SiS_Pr->SiS_VCLKData[index].SR2B;
  1966. clkb = SiS_Pr->SiS_VCLKData[index].SR2C;
  1967. }
  1968. }
  1969. SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x31,0xCF);
  1970. SiS_SetReg(SiS_Pr->SiS_P3c4,0x2b,clka);
  1971. SiS_SetReg(SiS_Pr->SiS_P3c4,0x2c,clkb);
  1972. if(SiS_Pr->ChipType >= SIS_315H) {
  1973. #ifdef SIS315H
  1974. SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x01);
  1975. if(SiS_Pr->ChipType == XGI_20) {
  1976. unsigned short mf = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
  1977. if(mf & HalfDCLK) {
  1978. SiS_SetReg(SiS_Pr->SiS_P3c4,0x2b,SiS_GetReg(SiS_Pr->SiS_P3c4,0x2b));
  1979. clkb = SiS_GetReg(SiS_Pr->SiS_P3c4,0x2c);
  1980. clkb = (((clkb & 0x1f) << 1) + 1) | (clkb & 0xe0);
  1981. SiS_SetReg(SiS_Pr->SiS_P3c4,0x2c,clkb);
  1982. }
  1983. }
  1984. #endif
  1985. } else {
  1986. SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80);
  1987. }
  1988. }
  1989. /*********************************************/
  1990. /* FIFO */
  1991. /*********************************************/
  1992. #ifdef SIS300
  1993. void
  1994. SiS_GetFIFOThresholdIndex300(struct SiS_Private *SiS_Pr, unsigned short *idx1,
  1995. unsigned short *idx2)
  1996. {
  1997. unsigned short temp1, temp2;
  1998. static const unsigned char ThTiming[8] = {
  1999. 1, 2, 2, 3, 0, 1, 1, 2
  2000. };
  2001. temp1 = temp2 = (SiS_GetReg(SiS_Pr->SiS_P3c4,0x18) & 0x62) >> 1;
  2002. (*idx2) = (unsigned short)(ThTiming[((temp2 >> 3) | temp1) & 0x07]);
  2003. (*idx1) = (unsigned short)(SiS_GetReg(SiS_Pr->SiS_P3c4,0x16) >> 6) & 0x03;
  2004. (*idx1) |= (unsigned short)(((SiS_GetReg(SiS_Pr->SiS_P3c4,0x14) >> 4) & 0x0c));
  2005. (*idx1) <<= 1;
  2006. }
  2007. static unsigned short
  2008. SiS_GetFIFOThresholdA300(unsigned short idx1, unsigned short idx2)
  2009. {
  2010. static const unsigned char ThLowA[8 * 3] = {
  2011. 61, 3,52, 5,68, 7,100,11,
  2012. 43, 3,42, 5,54, 7, 78,11,
  2013. 34, 3,37, 5,47, 7, 67,11
  2014. };
  2015. return (unsigned short)((ThLowA[idx1 + 1] * idx2) + ThLowA[idx1]);
  2016. }
  2017. unsigned short
  2018. SiS_GetFIFOThresholdB300(unsigned short idx1, unsigned short idx2)
  2019. {
  2020. static const unsigned char ThLowB[8 * 3] = {
  2021. 81, 4,72, 6,88, 8,120,12,
  2022. 55, 4,54, 6,66, 8, 90,12,
  2023. 42, 4,45, 6,55, 8, 75,12
  2024. };
  2025. return (unsigned short)((ThLowB[idx1 + 1] * idx2) + ThLowB[idx1]);
  2026. }
  2027. static unsigned short
  2028. SiS_DoCalcDelay(struct SiS_Private *SiS_Pr, unsigned short MCLK, unsigned short VCLK,
  2029. unsigned short colordepth, unsigned short key)
  2030. {
  2031. unsigned short idx1, idx2;
  2032. unsigned int longtemp = VCLK * colordepth;
  2033. SiS_GetFIFOThresholdIndex300(SiS_Pr, &idx1, &idx2);
  2034. if(key == 0) {
  2035. longtemp *= SiS_GetFIFOThresholdA300(idx1, idx2);
  2036. } else {
  2037. longtemp *= SiS_GetFIFOThresholdB300(idx1, idx2);
  2038. }
  2039. idx1 = longtemp % (MCLK * 16);
  2040. longtemp /= (MCLK * 16);
  2041. if(idx1) longtemp++;
  2042. return (unsigned short)longtemp;
  2043. }
  2044. static unsigned short
  2045. SiS_CalcDelay(struct SiS_Private *SiS_Pr, unsigned short VCLK,
  2046. unsigned short colordepth, unsigned short MCLK)
  2047. {
  2048. unsigned short temp1, temp2;
  2049. temp2 = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 0);
  2050. temp1 = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 1);
  2051. if(temp1 < 4) temp1 = 4;
  2052. temp1 -= 4;
  2053. if(temp2 < temp1) temp2 = temp1;
  2054. return temp2;
  2055. }
  2056. static void
  2057. SiS_SetCRT1FIFO_300(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
  2058. unsigned short RefreshRateTableIndex)
  2059. {
  2060. unsigned short ThresholdLow = 0;
  2061. unsigned short temp, index, VCLK, MCLK, colorth;
  2062. static const unsigned short colortharray[6] = { 1, 1, 2, 2, 3, 4 };
  2063. if(ModeNo > 0x13) {
  2064. /* Get VCLK */
  2065. if(SiS_Pr->UseCustomMode) {
  2066. VCLK = SiS_Pr->CSRClock;
  2067. } else {
  2068. index = SiS_GetRefCRTVCLK(SiS_Pr, RefreshRateTableIndex, SiS_Pr->SiS_UseWide);
  2069. VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;
  2070. }
  2071. /* Get half colordepth */
  2072. colorth = colortharray[(SiS_Pr->SiS_ModeType - ModeEGA)];
  2073. /* Get MCLK */
  2074. index = SiS_GetReg(SiS_Pr->SiS_P3c4,0x3A) & 0x07;
  2075. MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK;
  2076. temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35) & 0xc3;
  2077. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x16,0x3c,temp);
  2078. do {
  2079. ThresholdLow = SiS_CalcDelay(SiS_Pr, VCLK, colorth, MCLK) + 1;
  2080. if(ThresholdLow < 0x13) break;
  2081. SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x16,0xfc);
  2082. ThresholdLow = 0x13;
  2083. temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x16) >> 6;
  2084. if(!temp) break;
  2085. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x16,0x3f,((temp - 1) << 6));
  2086. } while(0);
  2087. } else ThresholdLow = 2;
  2088. /* Write CRT/CPU threshold low, CRT/Engine threshold high */
  2089. temp = (ThresholdLow << 4) | 0x0f;
  2090. SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,temp);
  2091. temp = (ThresholdLow & 0x10) << 1;
  2092. if(ModeNo > 0x13) temp |= 0x40;
  2093. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0f,0x9f,temp);
  2094. /* What is this? */
  2095. SiS_SetReg(SiS_Pr->SiS_P3c4,0x3B,0x09);
  2096. /* Write CRT/CPU threshold high */
  2097. temp = ThresholdLow + 3;
  2098. if(temp > 0x0f) temp = 0x0f;
  2099. SiS_SetReg(SiS_Pr->SiS_P3c4,0x09,temp);
  2100. }
  2101. unsigned short
  2102. SiS_GetLatencyFactor630(struct SiS_Private *SiS_Pr, unsigned short index)
  2103. {
  2104. static const unsigned char LatencyFactor[] = {
  2105. 97, 88, 86, 79, 77, 0, /* 64 bit BQ=2 */
  2106. 0, 87, 85, 78, 76, 54, /* 64 bit BQ=1 */
  2107. 97, 88, 86, 79, 77, 0, /* 128 bit BQ=2 */
  2108. 0, 79, 77, 70, 68, 48, /* 128 bit BQ=1 */
  2109. 80, 72, 69, 63, 61, 0, /* 64 bit BQ=2 */
  2110. 0, 70, 68, 61, 59, 37, /* 64 bit BQ=1 */
  2111. 86, 77, 75, 68, 66, 0, /* 128 bit BQ=2 */
  2112. 0, 68, 66, 59, 57, 37 /* 128 bit BQ=1 */
  2113. };
  2114. static const unsigned char LatencyFactor730[] = {
  2115. 69, 63, 61,
  2116. 86, 79, 77,
  2117. 103, 96, 94,
  2118. 120,113,111,
  2119. 137,130,128
  2120. };
  2121. if(SiS_Pr->ChipType == SIS_730) {
  2122. return (unsigned short)LatencyFactor730[index];
  2123. } else {
  2124. return (unsigned short)LatencyFactor[index];
  2125. }
  2126. }
  2127. static unsigned short
  2128. SiS_CalcDelay2(struct SiS_Private *SiS_Pr, unsigned char key)
  2129. {
  2130. unsigned short index;
  2131. if(SiS_Pr->ChipType == SIS_730) {
  2132. index = ((key & 0x0f) * 3) + ((key & 0xc0) >> 6);
  2133. } else {
  2134. index = (key & 0xe0) >> 5;
  2135. if(key & 0x10) index += 6;
  2136. if(!(key & 0x01)) index += 24;
  2137. if(SiS_GetReg(SiS_Pr->SiS_P3c4,0x14) & 0x80) index += 12;
  2138. }
  2139. return SiS_GetLatencyFactor630(SiS_Pr, index);
  2140. }
  2141. static void
  2142. SiS_SetCRT1FIFO_630(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
  2143. unsigned short RefreshRateTableIndex)
  2144. {
  2145. unsigned short ThresholdLow = 0;
  2146. unsigned short i, data, VCLK, MCLK16, colorth = 0;
  2147. unsigned int templ, datal;
  2148. const unsigned char *queuedata = NULL;
  2149. static const unsigned char FQBQData[21] = {
  2150. 0x01,0x21,0x41,0x61,0x81,
  2151. 0x31,0x51,0x71,0x91,0xb1,
  2152. 0x00,0x20,0x40,0x60,0x80,
  2153. 0x30,0x50,0x70,0x90,0xb0,
  2154. 0xff
  2155. };
  2156. static const unsigned char FQBQData730[16] = {
  2157. 0x34,0x74,0xb4,
  2158. 0x23,0x63,0xa3,
  2159. 0x12,0x52,0x92,
  2160. 0x01,0x41,0x81,
  2161. 0x00,0x40,0x80,
  2162. 0xff
  2163. };
  2164. static const unsigned short colortharray[6] = {
  2165. 1, 1, 2, 2, 3, 4
  2166. };
  2167. i = 0;
  2168. if(ModeNo > 0x13) {
  2169. /* Get VCLK */
  2170. if(SiS_Pr->UseCustomMode) {
  2171. VCLK = SiS_Pr->CSRClock;
  2172. } else {
  2173. data = SiS_GetRefCRTVCLK(SiS_Pr, RefreshRateTableIndex, SiS_Pr->SiS_UseWide);
  2174. VCLK = SiS_Pr->SiS_VCLKData[data].CLOCK;
  2175. }
  2176. /* Get MCLK * 16 */
  2177. data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x1A) & 0x07;
  2178. MCLK16 = SiS_Pr->SiS_MCLKData_0[data].CLOCK * 16;
  2179. /* Get half colordepth */
  2180. colorth = colortharray[(SiS_Pr->SiS_ModeType - ModeEGA)];
  2181. if(SiS_Pr->ChipType == SIS_730) {
  2182. queuedata = &FQBQData730[0];
  2183. } else {
  2184. queuedata = &FQBQData[0];
  2185. }
  2186. do {
  2187. templ = SiS_CalcDelay2(SiS_Pr, queuedata[i]) * VCLK * colorth;
  2188. datal = templ % MCLK16;
  2189. templ = (templ / MCLK16) + 1;
  2190. if(datal) templ++;
  2191. if(templ > 0x13) {
  2192. if(queuedata[i + 1] == 0xFF) {
  2193. ThresholdLow = 0x13;
  2194. break;
  2195. }
  2196. i++;
  2197. } else {
  2198. ThresholdLow = templ;
  2199. break;
  2200. }
  2201. } while(queuedata[i] != 0xFF);
  2202. } else {
  2203. if(SiS_Pr->ChipType != SIS_730) i = 9;
  2204. ThresholdLow = 0x02;
  2205. }
  2206. /* Write CRT/CPU threshold low, CRT/Engine threshold high */
  2207. data = ((ThresholdLow & 0x0f) << 4) | 0x0f;
  2208. SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,data);
  2209. data = (ThresholdLow & 0x10) << 1;
  2210. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xDF,data);
  2211. /* What is this? */
  2212. SiS_SetReg(SiS_Pr->SiS_P3c4,0x3B,0x09);
  2213. /* Write CRT/CPU threshold high (gap = 3) */
  2214. data = ThresholdLow + 3;
  2215. if(data > 0x0f) data = 0x0f;
  2216. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x09,0x80,data);
  2217. /* Write foreground and background queue */
  2218. #ifdef SIS_LINUX_KERNEL
  2219. templ = sisfb_read_nbridge_pci_dword(SiS_Pr, 0x50);
  2220. #else
  2221. templ = pciReadLong(0x00000000, 0x50);
  2222. #endif
  2223. if(SiS_Pr->ChipType == SIS_730) {
  2224. templ &= 0xfffff9ff;
  2225. templ |= ((queuedata[i] & 0xc0) << 3);
  2226. } else {
  2227. templ &= 0xf0ffffff;
  2228. if( (ModeNo <= 0x13) &&
  2229. (SiS_Pr->ChipType == SIS_630) &&
  2230. (SiS_Pr->ChipRevision >= 0x30) ) {
  2231. templ |= 0x0b000000;
  2232. } else {
  2233. templ |= ((queuedata[i] & 0xf0) << 20);
  2234. }
  2235. }
  2236. #ifdef SIS_LINUX_KERNEL
  2237. sisfb_write_nbridge_pci_dword(SiS_Pr, 0x50, templ);
  2238. templ = sisfb_read_nbridge_pci_dword(SiS_Pr, 0xA0);
  2239. #else
  2240. pciWriteLong(0x00000000, 0x50, templ);
  2241. templ = pciReadLong(0x00000000, 0xA0);
  2242. #endif
  2243. /* GUI grant timer (PCI config 0xA3) */
  2244. if(SiS_Pr->ChipType == SIS_730) {
  2245. templ &= 0x00ffffff;
  2246. datal = queuedata[i] << 8;
  2247. templ |= (((datal & 0x0f00) | ((datal & 0x3000) >> 8)) << 20);
  2248. } else {
  2249. templ &= 0xf0ffffff;
  2250. templ |= ((queuedata[i] & 0x0f) << 24);
  2251. }
  2252. #ifdef SIS_LINUX_KERNEL
  2253. sisfb_write_nbridge_pci_dword(SiS_Pr, 0xA0, templ);
  2254. #else
  2255. pciWriteLong(0x00000000, 0xA0, templ);
  2256. #endif
  2257. }
  2258. #endif /* SIS300 */
  2259. #ifdef SIS315H
  2260. static void
  2261. SiS_SetCRT1FIFO_310(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
  2262. {
  2263. unsigned short modeflag;
  2264. /* disable auto-threshold */
  2265. SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x3D,0xFE);
  2266. modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
  2267. SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0xAE);
  2268. SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x09,0xF0);
  2269. if(ModeNo > 0x13) {
  2270. if(SiS_Pr->ChipType >= XGI_20) {
  2271. SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0x34);
  2272. SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x3D,0x01);
  2273. } else if(SiS_Pr->ChipType >= SIS_661) {
  2274. if(!(modeflag & HalfDCLK)) {
  2275. SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0x34);
  2276. SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x3D,0x01);
  2277. }
  2278. } else {
  2279. if((!(modeflag & DoubleScanMode)) || (!(modeflag & HalfDCLK))) {
  2280. SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0x34);
  2281. SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x3D,0x01);
  2282. }
  2283. }
  2284. }
  2285. }
  2286. #endif
  2287. /*********************************************/
  2288. /* MODE REGISTERS */
  2289. /*********************************************/
  2290. static void
  2291. SiS_SetVCLKState(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
  2292. unsigned short RefreshRateTableIndex, unsigned short ModeIdIndex)
  2293. {
  2294. unsigned short data = 0, VCLK = 0, index = 0;
  2295. if(ModeNo > 0x13) {
  2296. if(SiS_Pr->UseCustomMode) {
  2297. VCLK = SiS_Pr->CSRClock;
  2298. } else {
  2299. index = SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
  2300. VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;
  2301. }
  2302. }
  2303. if(SiS_Pr->ChipType < SIS_315H) {
  2304. #ifdef SIS300
  2305. if(VCLK > 150) data |= 0x80;
  2306. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0x7B,data);
  2307. data = 0x00;
  2308. if(VCLK >= 150) data |= 0x08;
  2309. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xF7,data);
  2310. #endif
  2311. } else if(SiS_Pr->ChipType < XGI_20) {
  2312. #ifdef SIS315H
  2313. if(VCLK >= 166) data |= 0x0c;
  2314. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xf3,data);
  2315. if(VCLK >= 166) {
  2316. SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1f,0xe7);
  2317. }
  2318. #endif
  2319. } else {
  2320. #ifdef SIS315H
  2321. if(VCLK >= 200) data |= 0x0c;
  2322. if(SiS_Pr->ChipType == XGI_20) data &= ~0x04;
  2323. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xf3,data);
  2324. if(SiS_Pr->ChipType != XGI_20) {
  2325. data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x1f) & 0xe7;
  2326. if(VCLK < 200) data |= 0x10;
  2327. SiS_SetReg(SiS_Pr->SiS_P3c4,0x1f,data);
  2328. }
  2329. #endif
  2330. }
  2331. /* DAC speed */
  2332. if(SiS_Pr->ChipType >= SIS_661) {
  2333. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xE8,0x10);
  2334. } else {
  2335. data = 0x03;
  2336. if(VCLK >= 260) data = 0x00;
  2337. else if(VCLK >= 160) data = 0x01;
  2338. else if(VCLK >= 135) data = 0x02;
  2339. if(SiS_Pr->ChipType == SIS_540) {
  2340. if((VCLK == 203) || (VCLK < 234)) data = 0x02;
  2341. }
  2342. if(SiS_Pr->ChipType < SIS_315H) {
  2343. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xFC,data);
  2344. } else {
  2345. if(SiS_Pr->ChipType > SIS_315PRO) {
  2346. if(ModeNo > 0x13) data &= 0xfc;
  2347. }
  2348. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xF8,data);
  2349. }
  2350. }
  2351. }
  2352. static void
  2353. SiS_SetCRT1ModeRegs(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
  2354. unsigned short ModeIdIndex, unsigned short RRTI)
  2355. {
  2356. unsigned short data, infoflag = 0, modeflag, resindex;
  2357. #ifdef SIS315H
  2358. unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
  2359. unsigned short data2, data3;
  2360. #endif
  2361. modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
  2362. if(SiS_Pr->UseCustomMode) {
  2363. infoflag = SiS_Pr->CInfoFlag;
  2364. } else {
  2365. resindex = SiS_GetResInfo(SiS_Pr, ModeNo, ModeIdIndex);
  2366. if(ModeNo > 0x13) {
  2367. infoflag = SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag;
  2368. }
  2369. }
  2370. /* Disable DPMS */
  2371. SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1F,0x3F);
  2372. data = 0;
  2373. if(ModeNo > 0x13) {
  2374. if(SiS_Pr->SiS_ModeType > ModeEGA) {
  2375. data |= 0x02;
  2376. data |= ((SiS_Pr->SiS_ModeType - ModeVGA) << 2);
  2377. }
  2378. if(infoflag & InterlaceMode) data |= 0x20;
  2379. }
  2380. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x06,0xC0,data);
  2381. if(SiS_Pr->ChipType != SIS_300) {
  2382. data = 0;
  2383. if(infoflag & InterlaceMode) {
  2384. /* data = (Hsync / 8) - ((Htotal / 8) / 2) + 3 */
  2385. int hrs = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x04) |
  2386. ((SiS_GetReg(SiS_Pr->SiS_P3c4,0x0b) & 0xc0) << 2)) - 3;
  2387. int hto = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x00) |
  2388. ((SiS_GetReg(SiS_Pr->SiS_P3c4,0x0b) & 0x03) << 8)) + 5;
  2389. data = hrs - (hto >> 1) + 3;
  2390. }
  2391. SiS_SetReg(SiS_Pr->SiS_P3d4,0x19,data);
  2392. SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x1a,0xFC,((data >> 8) & 0x03));
  2393. }
  2394. if(modeflag & HalfDCLK) {
  2395. SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x08);
  2396. }
  2397. data = 0;
  2398. if(modeflag & LineCompareOff) data = 0x08;
  2399. if(SiS_Pr->ChipType == SIS_300) {
  2400. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xF7,data);
  2401. } else {
  2402. if(SiS_Pr->ChipType >= XGI_20) data |= 0x20;
  2403. if(SiS_Pr->SiS_ModeType == ModeEGA) {
  2404. if(ModeNo > 0x13) {
  2405. data |= 0x40;
  2406. }
  2407. }
  2408. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xB7,data);
  2409. }
  2410. #ifdef SIS315H
  2411. if(SiS_Pr->ChipType >= SIS_315H) {
  2412. SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x31,0xfb);
  2413. }
  2414. if(SiS_Pr->ChipType == SIS_315PRO) {
  2415. data = SiS_Pr->SiS_SR15[(2 * 4) + SiS_Get310DRAMType(SiS_Pr)];
  2416. if(SiS_Pr->SiS_ModeType == ModeText) {
  2417. data &= 0xc7;
  2418. } else {
  2419. data2 = SiS_GetOffset(SiS_Pr, ModeNo, ModeIdIndex, RRTI) >> 1;
  2420. if(infoflag & InterlaceMode) data2 >>= 1;
  2421. data3 = SiS_GetColorDepth(SiS_Pr, ModeNo, ModeIdIndex) >> 1;
  2422. if(data3) data2 /= data3;
  2423. if(data2 >= 0x50) {
  2424. data &= 0x0f;
  2425. data |= 0x50;
  2426. }
  2427. }
  2428. SiS_SetReg(SiS_Pr->SiS_P3c4,0x17,data);
  2429. } else if((SiS_Pr->ChipType == SIS_330) || (SiS_Pr->SiS_SysFlags & SF_760LFB)) {
  2430. data = SiS_Get310DRAMType(SiS_Pr);
  2431. if(SiS_Pr->ChipType == SIS_330) {
  2432. data = SiS_Pr->SiS_SR15[(2 * 4) + data];
  2433. } else {
  2434. if(SiS_Pr->SiS_ROMNew) data = ROMAddr[0xf6];
  2435. else if(SiS_Pr->SiS_UseROM) data = ROMAddr[0x100 + data];
  2436. else data = 0xba;
  2437. }
  2438. if(SiS_Pr->SiS_ModeType <= ModeEGA) {
  2439. data &= 0xc7;
  2440. } else {
  2441. if(SiS_Pr->UseCustomMode) {
  2442. data2 = SiS_Pr->CSRClock;
  2443. } else {
  2444. data2 = SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RRTI);
  2445. data2 = SiS_Pr->SiS_VCLKData[data2].CLOCK;
  2446. }
  2447. data3 = SiS_GetColorDepth(SiS_Pr, ModeNo, ModeIdIndex) >> 1;
  2448. if(data3) data2 *= data3;
  2449. data2 = ((unsigned int)(SiS_GetMCLK(SiS_Pr) * 1024)) / data2;
  2450. if(SiS_Pr->ChipType == SIS_330) {
  2451. if(SiS_Pr->SiS_ModeType != Mode16Bpp) {
  2452. if (data2 >= 0x19c) data = 0xba;
  2453. else if(data2 >= 0x140) data = 0x7a;
  2454. else if(data2 >= 0x101) data = 0x3a;
  2455. else if(data2 >= 0xf5) data = 0x32;
  2456. else if(data2 >= 0xe2) data = 0x2a;
  2457. else if(data2 >= 0xc4) data = 0x22;
  2458. else if(data2 >= 0xac) data = 0x1a;
  2459. else if(data2 >= 0x9e) data = 0x12;
  2460. else if(data2 >= 0x8e) data = 0x0a;
  2461. else data = 0x02;
  2462. } else {
  2463. if(data2 >= 0x127) data = 0xba;
  2464. else data = 0x7a;
  2465. }
  2466. } else { /* 76x+LFB */
  2467. if (data2 >= 0x190) data = 0xba;
  2468. else if(data2 >= 0xff) data = 0x7a;
  2469. else if(data2 >= 0xd3) data = 0x3a;
  2470. else if(data2 >= 0xa9) data = 0x1a;
  2471. else if(data2 >= 0x93) data = 0x0a;
  2472. else data = 0x02;
  2473. }
  2474. }
  2475. SiS_SetReg(SiS_Pr->SiS_P3c4,0x17,data);
  2476. }
  2477. /* XGI: Nothing. */
  2478. /* TODO: Check SiS340 */
  2479. #endif
  2480. data = 0x60;
  2481. if(SiS_Pr->SiS_ModeType != ModeText) {
  2482. data ^= 0x60;
  2483. if(SiS_Pr->SiS_ModeType != ModeEGA) {
  2484. data ^= 0xA0;
  2485. }
  2486. }
  2487. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x21,0x1F,data);
  2488. SiS_SetVCLKState(SiS_Pr, ModeNo, RRTI, ModeIdIndex);
  2489. #ifdef SIS315H
  2490. if(((SiS_Pr->ChipType >= SIS_315H) && (SiS_Pr->ChipType < SIS_661)) ||
  2491. (SiS_Pr->ChipType == XGI_40)) {
  2492. if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40) {
  2493. SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x2c);
  2494. } else {
  2495. SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x6c);
  2496. }
  2497. } else if(SiS_Pr->ChipType == XGI_20) {
  2498. if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40) {
  2499. SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x33);
  2500. } else {
  2501. SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x73);
  2502. }
  2503. SiS_SetReg(SiS_Pr->SiS_P3d4,0x51,0x02);
  2504. }
  2505. #endif
  2506. }
  2507. #ifdef SIS315H
  2508. static void
  2509. SiS_SetupDualChip(struct SiS_Private *SiS_Pr)
  2510. {
  2511. #if 0
  2512. /* TODO: Find out about IOAddress2 */
  2513. SISIOADDRESS P2_3c2 = SiS_Pr->IOAddress2 + 0x12;
  2514. SISIOADDRESS P2_3c4 = SiS_Pr->IOAddress2 + 0x14;
  2515. SISIOADDRESS P2_3ce = SiS_Pr->IOAddress2 + 0x1e;
  2516. int i;
  2517. if((SiS_Pr->ChipRevision != 0) ||
  2518. (!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x3a) & 0x04)))
  2519. return;
  2520. for(i = 0; i <= 4; i++) { /* SR00 - SR04 */
  2521. SiS_SetReg(P2_3c4,i,SiS_GetReg(SiS_Pr->SiS_P3c4,i));
  2522. }
  2523. for(i = 0; i <= 8; i++) { /* GR00 - GR08 */
  2524. SiS_SetReg(P2_3ce,i,SiS_GetReg(SiS_Pr->SiS_P3ce,i));
  2525. }
  2526. SiS_SetReg(P2_3c4,0x05,0x86);
  2527. SiS_SetReg(P2_3c4,0x06,SiS_GetReg(SiS_Pr->SiS_P3c4,0x06)); /* SR06 */
  2528. SiS_SetReg(P2_3c4,0x21,SiS_GetReg(SiS_Pr->SiS_P3c4,0x21)); /* SR21 */
  2529. SiS_SetRegByte(P2_3c2,SiS_GetRegByte(SiS_Pr->SiS_P3cc)); /* MISC */
  2530. SiS_SetReg(P2_3c4,0x05,0x00);
  2531. #endif
  2532. }
  2533. #endif
  2534. /*********************************************/
  2535. /* LOAD DAC */
  2536. /*********************************************/
  2537. static void
  2538. SiS_WriteDAC(struct SiS_Private *SiS_Pr, SISIOADDRESS DACData, unsigned short shiftflag,
  2539. unsigned short dl, unsigned short ah, unsigned short al, unsigned short dh)
  2540. {
  2541. unsigned short d1, d2, d3;
  2542. switch(dl) {
  2543. case 0: d1 = dh; d2 = ah; d3 = al; break;
  2544. case 1: d1 = ah; d2 = al; d3 = dh; break;
  2545. default: d1 = al; d2 = dh; d3 = ah;
  2546. }
  2547. SiS_SetRegByte(DACData, (d1 << shiftflag));
  2548. SiS_SetRegByte(DACData, (d2 << shiftflag));
  2549. SiS_SetRegByte(DACData, (d3 << shiftflag));
  2550. }
  2551. void
  2552. SiS_LoadDAC(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
  2553. {
  2554. unsigned short data, data2, time, i, j, k, m, n, o;
  2555. unsigned short si, di, bx, sf;
  2556. SISIOADDRESS DACAddr, DACData;
  2557. const unsigned char *table = NULL;
  2558. data = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex) & DACInfoFlag;
  2559. j = time = 64;
  2560. if(data == 0x00) table = SiS_MDA_DAC;
  2561. else if(data == 0x08) table = SiS_CGA_DAC;
  2562. else if(data == 0x10) table = SiS_EGA_DAC;
  2563. else if(data == 0x18) {
  2564. j = 16;
  2565. time = 256;
  2566. table = SiS_VGA_DAC;
  2567. }
  2568. if( ( (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && /* 301B-DH LCD */
  2569. (SiS_Pr->SiS_VBType & VB_NoLCD) ) ||
  2570. (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) || /* LCDA */
  2571. (!(SiS_Pr->SiS_SetFlag & ProgrammingCRT2)) ) { /* Programming CRT1 */
  2572. SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
  2573. DACAddr = SiS_Pr->SiS_P3c8;
  2574. DACData = SiS_Pr->SiS_P3c9;
  2575. sf = 0;
  2576. } else {
  2577. DACAddr = SiS_Pr->SiS_Part5Port;
  2578. DACData = SiS_Pr->SiS_Part5Port + 1;
  2579. sf = 2;
  2580. }
  2581. SiS_SetRegByte(DACAddr,0x00);
  2582. for(i = 0; i < j; i++) {
  2583. data = table[i];
  2584. for(k = 0; k < 3; k++) {
  2585. data2 = 0;
  2586. if(data & 0x01) data2 += 0x2A;
  2587. if(data & 0x02) data2 += 0x15;
  2588. SiS_SetRegByte(DACData, (data2 << sf));
  2589. data >>= 2;
  2590. }
  2591. }
  2592. if(time == 256) {
  2593. for(i = 16; i < 32; i++) {
  2594. data = table[i] << sf;
  2595. for(k = 0; k < 3; k++) SiS_SetRegByte(DACData, data);
  2596. }
  2597. si = 32;
  2598. for(m = 0; m < 9; m++) {
  2599. di = si;
  2600. bx = si + 4;
  2601. for(n = 0; n < 3; n++) {
  2602. for(o = 0; o < 5; o++) {
  2603. SiS_WriteDAC(SiS_Pr, DACData, sf, n, table[di], table[bx], table[si]);
  2604. si++;
  2605. }
  2606. si -= 2;
  2607. for(o = 0; o < 3; o++) {
  2608. SiS_WriteDAC(SiS_Pr, DACData, sf, n, table[di], table[si], table[bx]);
  2609. si--;
  2610. }
  2611. } /* for n < 3 */
  2612. si += 5;
  2613. } /* for m < 9 */
  2614. }
  2615. }
  2616. /*********************************************/
  2617. /* SET CRT1 REGISTER GROUP */
  2618. /*********************************************/
  2619. static void
  2620. SiS_SetCRT1Group(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
  2621. {
  2622. unsigned short StandTableIndex, RefreshRateTableIndex;
  2623. SiS_Pr->SiS_CRT1Mode = ModeNo;
  2624. StandTableIndex = SiS_GetModePtr(SiS_Pr, ModeNo, ModeIdIndex);
  2625. if(SiS_Pr->SiS_SetFlag & LowModeTests) {
  2626. if(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2)) {
  2627. SiS_DisableBridge(SiS_Pr);
  2628. }
  2629. }
  2630. SiS_ResetSegmentRegisters(SiS_Pr);
  2631. SiS_SetSeqRegs(SiS_Pr, StandTableIndex);
  2632. SiS_SetMiscRegs(SiS_Pr, StandTableIndex);
  2633. SiS_SetCRTCRegs(SiS_Pr, StandTableIndex);
  2634. SiS_SetATTRegs(SiS_Pr, StandTableIndex);
  2635. SiS_SetGRCRegs(SiS_Pr, StandTableIndex);
  2636. SiS_ClearExt1Regs(SiS_Pr, ModeNo);
  2637. SiS_ResetCRT1VCLK(SiS_Pr);
  2638. SiS_Pr->SiS_SelectCRT2Rate = 0;
  2639. SiS_Pr->SiS_SetFlag &= (~ProgrammingCRT2);
  2640. if(SiS_Pr->SiS_VBInfo & SetSimuScanMode) {
  2641. if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
  2642. SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
  2643. }
  2644. }
  2645. if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
  2646. SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
  2647. }
  2648. RefreshRateTableIndex = SiS_GetRatePtr(SiS_Pr, ModeNo, ModeIdIndex);
  2649. if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
  2650. SiS_Pr->SiS_SetFlag &= ~ProgrammingCRT2;
  2651. }
  2652. if(RefreshRateTableIndex != 0xFFFF) {
  2653. SiS_SetCRT1Sync(SiS_Pr, RefreshRateTableIndex);
  2654. SiS_SetCRT1CRTC(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
  2655. SiS_SetCRT1Offset(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
  2656. SiS_SetCRT1VCLK(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
  2657. }
  2658. switch(SiS_Pr->ChipType) {
  2659. #ifdef SIS300
  2660. case SIS_300:
  2661. SiS_SetCRT1FIFO_300(SiS_Pr, ModeNo, RefreshRateTableIndex);
  2662. break;
  2663. case SIS_540:
  2664. case SIS_630:
  2665. case SIS_730:
  2666. SiS_SetCRT1FIFO_630(SiS_Pr, ModeNo, RefreshRateTableIndex);
  2667. break;
  2668. #endif
  2669. default:
  2670. #ifdef SIS315H
  2671. if(SiS_Pr->ChipType == XGI_20) {
  2672. unsigned char sr2b = 0, sr2c = 0;
  2673. switch(ModeNo) {
  2674. case 0x00:
  2675. case 0x01: sr2b = 0x4e; sr2c = 0xe9; break;
  2676. case 0x04:
  2677. case 0x05:
  2678. case 0x0d: sr2b = 0x1b; sr2c = 0xe3; break;
  2679. }
  2680. if(sr2b) {
  2681. SiS_SetReg(SiS_Pr->SiS_P3c4,0x2b,sr2b);
  2682. SiS_SetReg(SiS_Pr->SiS_P3c4,0x2c,sr2c);
  2683. SiS_SetRegByte(SiS_Pr->SiS_P3c2,(SiS_GetRegByte(SiS_Pr->SiS_P3cc) | 0x0c));
  2684. }
  2685. }
  2686. SiS_SetCRT1FIFO_310(SiS_Pr, ModeNo, ModeIdIndex);
  2687. #endif
  2688. break;
  2689. }
  2690. SiS_SetCRT1ModeRegs(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
  2691. #ifdef SIS315H
  2692. if(SiS_Pr->ChipType == XGI_40) {
  2693. SiS_SetupDualChip(SiS_Pr);
  2694. }
  2695. #endif
  2696. SiS_LoadDAC(SiS_Pr, ModeNo, ModeIdIndex);
  2697. #ifdef SIS_LINUX_KERNEL
  2698. if(SiS_Pr->SiS_flag_clearbuffer) {
  2699. SiS_ClearBuffer(SiS_Pr, ModeNo);
  2700. }
  2701. #endif
  2702. if(!(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2 | SetCRT2ToLCDA))) {
  2703. SiS_WaitRetrace1(SiS_Pr);
  2704. SiS_DisplayOn(SiS_Pr);
  2705. }
  2706. }
  2707. /*********************************************/
  2708. /* HELPER: VIDEO BRIDGE PROG CLK */
  2709. /*********************************************/
  2710. static void
  2711. SiS_InitVB(struct SiS_Private *SiS_Pr)
  2712. {
  2713. unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
  2714. SiS_Pr->Init_P4_0E = 0;
  2715. if(SiS_Pr->SiS_ROMNew) {
  2716. SiS_Pr->Init_P4_0E = ROMAddr[0x82];
  2717. } else if(SiS_Pr->ChipType >= XGI_40) {
  2718. if(SiS_Pr->SiS_XGIROM) {
  2719. SiS_Pr->Init_P4_0E = ROMAddr[0x80];
  2720. }
  2721. }
  2722. }
  2723. static void
  2724. SiS_ResetVB(struct SiS_Private *SiS_Pr)
  2725. {
  2726. #ifdef SIS315H
  2727. unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
  2728. unsigned short temp;
  2729. /* VB programming clock */
  2730. if(SiS_Pr->SiS_UseROM) {
  2731. if(SiS_Pr->ChipType < SIS_330) {
  2732. temp = ROMAddr[VB310Data_1_2_Offset] | 0x40;
  2733. if(SiS_Pr->SiS_ROMNew) temp = ROMAddr[0x80] | 0x40;
  2734. SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp);
  2735. } else if(SiS_Pr->ChipType >= SIS_661 && SiS_Pr->ChipType < XGI_20) {
  2736. temp = ROMAddr[0x7e] | 0x40;
  2737. if(SiS_Pr->SiS_ROMNew) temp = ROMAddr[0x80] | 0x40;
  2738. SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp);
  2739. }
  2740. } else if(SiS_Pr->ChipType >= XGI_40) {
  2741. temp = 0x40;
  2742. if(SiS_Pr->SiS_XGIROM) temp |= ROMAddr[0x7e];
  2743. /* Can we do this on any chipset? */
  2744. SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp);
  2745. }
  2746. #endif
  2747. }
  2748. /*********************************************/
  2749. /* HELPER: SET VIDEO/CAPTURE REGISTERS */
  2750. /*********************************************/
  2751. static void
  2752. SiS_StrangeStuff(struct SiS_Private *SiS_Pr)
  2753. {
  2754. /* SiS65x and XGI set up some sort of "lock mode" for text
  2755. * which locks CRT2 in some way to CRT1 timing. Disable
  2756. * this here.
  2757. */
  2758. #ifdef SIS315H
  2759. if((IS_SIS651) || (IS_SISM650) ||
  2760. SiS_Pr->ChipType == SIS_340 ||
  2761. SiS_Pr->ChipType == XGI_40) {
  2762. SiS_SetReg(SiS_Pr->SiS_VidCapt, 0x3f, 0x00); /* Fiddle with capture regs */
  2763. SiS_SetReg(SiS_Pr->SiS_VidCapt, 0x00, 0x00);
  2764. SiS_SetReg(SiS_Pr->SiS_VidPlay, 0x00, 0x86); /* (BIOS does NOT unlock) */
  2765. SiS_SetRegAND(SiS_Pr->SiS_VidPlay, 0x30, 0xfe); /* Fiddle with video regs */
  2766. SiS_SetRegAND(SiS_Pr->SiS_VidPlay, 0x3f, 0xef);
  2767. }
  2768. /* !!! This does not support modes < 0x13 !!! */
  2769. #endif
  2770. }
  2771. /*********************************************/
  2772. /* HELPER: SET AGP TIMING FOR SiS760 */
  2773. /*********************************************/
  2774. static void
  2775. SiS_Handle760(struct SiS_Private *SiS_Pr)
  2776. {
  2777. #ifdef SIS315H
  2778. unsigned int somebase;
  2779. unsigned char temp1, temp2, temp3;
  2780. if( (SiS_Pr->ChipType != SIS_760) ||
  2781. ((SiS_GetReg(SiS_Pr->SiS_P3d4, 0x5c) & 0xf8) != 0x80) ||
  2782. (!(SiS_Pr->SiS_SysFlags & SF_760LFB)) ||
  2783. (!(SiS_Pr->SiS_SysFlags & SF_760UMA)) )
  2784. return;
  2785. #ifdef SIS_LINUX_KERNEL
  2786. somebase = sisfb_read_mio_pci_word(SiS_Pr, 0x74);
  2787. #else
  2788. somebase = pciReadWord(0x00001000, 0x74);
  2789. #endif
  2790. somebase &= 0xffff;
  2791. if(somebase == 0) return;
  2792. temp3 = SiS_GetRegByte((somebase + 0x85)) & 0xb7;
  2793. if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40) {
  2794. temp1 = 0x21;
  2795. temp2 = 0x03;
  2796. temp3 |= 0x08;
  2797. } else {
  2798. temp1 = 0x25;
  2799. temp2 = 0x0b;
  2800. }
  2801. #ifdef SIS_LINUX_KERNEL
  2802. sisfb_write_nbridge_pci_byte(SiS_Pr, 0x7e, temp1);
  2803. sisfb_write_nbridge_pci_byte(SiS_Pr, 0x8d, temp2);
  2804. #else
  2805. pciWriteByte(0x00000000, 0x7e, temp1);
  2806. pciWriteByte(0x00000000, 0x8d, temp2);
  2807. #endif
  2808. SiS_SetRegByte((somebase + 0x85), temp3);
  2809. #endif
  2810. }
  2811. /*********************************************/
  2812. /* SiSSetMode() */
  2813. /*********************************************/
  2814. bool
  2815. SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
  2816. {
  2817. SISIOADDRESS BaseAddr = SiS_Pr->IOAddress;
  2818. unsigned short RealModeNo, ModeIdIndex;
  2819. unsigned char backupreg = 0;
  2820. #ifdef SIS_LINUX_KERNEL
  2821. unsigned short KeepLockReg;
  2822. SiS_Pr->UseCustomMode = false;
  2823. SiS_Pr->CRT1UsesCustomMode = false;
  2824. #endif
  2825. SiS_Pr->SiS_flag_clearbuffer = 0;
  2826. if(SiS_Pr->UseCustomMode) {
  2827. ModeNo = 0xfe;
  2828. } else {
  2829. #ifdef SIS_LINUX_KERNEL
  2830. if(!(ModeNo & 0x80)) SiS_Pr->SiS_flag_clearbuffer = 1;
  2831. #endif
  2832. ModeNo &= 0x7f;
  2833. }
  2834. /* Don't use FSTN mode for CRT1 */
  2835. RealModeNo = ModeNo;
  2836. if(ModeNo == 0x5b) ModeNo = 0x56;
  2837. SiSInitPtr(SiS_Pr);
  2838. SiSRegInit(SiS_Pr, BaseAddr);
  2839. SiS_GetSysFlags(SiS_Pr);
  2840. SiS_Pr->SiS_VGAINFO = 0x11;
  2841. #ifdef SIS_LINUX_KERNEL
  2842. KeepLockReg = SiS_GetReg(SiS_Pr->SiS_P3c4,0x05);
  2843. #endif
  2844. SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86);
  2845. SiSInitPCIetc(SiS_Pr);
  2846. SiSSetLVDSetc(SiS_Pr);
  2847. SiSDetermineROMUsage(SiS_Pr);
  2848. SiS_UnLockCRT2(SiS_Pr);
  2849. if(!SiS_Pr->UseCustomMode) {
  2850. if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return false;
  2851. } else {
  2852. ModeIdIndex = 0;
  2853. }
  2854. SiS_GetVBType(SiS_Pr);
  2855. /* Init/restore some VB registers */
  2856. SiS_InitVB(SiS_Pr);
  2857. if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
  2858. if(SiS_Pr->ChipType >= SIS_315H) {
  2859. SiS_ResetVB(SiS_Pr);
  2860. SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x32,0x10);
  2861. SiS_SetRegOR(SiS_Pr->SiS_Part2Port,0x00,0x0c);
  2862. backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
  2863. } else {
  2864. backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
  2865. }
  2866. }
  2867. /* Get VB information (connectors, connected devices) */
  2868. SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, (SiS_Pr->UseCustomMode) ? 0 : 1);
  2869. SiS_SetYPbPr(SiS_Pr);
  2870. SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex);
  2871. SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex);
  2872. SiS_SetLowModeTest(SiS_Pr, ModeNo);
  2873. #ifdef SIS_LINUX_KERNEL
  2874. /* Check memory size (kernel framebuffer driver only) */
  2875. if(!SiS_CheckMemorySize(SiS_Pr, ModeNo, ModeIdIndex)) {
  2876. return false;
  2877. }
  2878. #endif
  2879. SiS_OpenCRTC(SiS_Pr);
  2880. if(SiS_Pr->UseCustomMode) {
  2881. SiS_Pr->CRT1UsesCustomMode = true;
  2882. SiS_Pr->CSRClock_CRT1 = SiS_Pr->CSRClock;
  2883. SiS_Pr->CModeFlag_CRT1 = SiS_Pr->CModeFlag;
  2884. } else {
  2885. SiS_Pr->CRT1UsesCustomMode = false;
  2886. }
  2887. /* Set mode on CRT1 */
  2888. if( (SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SetCRT2ToLCDA)) ||
  2889. (!(SiS_Pr->SiS_VBInfo & SwitchCRT2)) ) {
  2890. SiS_SetCRT1Group(SiS_Pr, ModeNo, ModeIdIndex);
  2891. }
  2892. /* Set mode on CRT2 */
  2893. if(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2 | SetCRT2ToLCDA)) {
  2894. if( (SiS_Pr->SiS_VBType & VB_SISVB) ||
  2895. (SiS_Pr->SiS_IF_DEF_LVDS == 1) ||
  2896. (SiS_Pr->SiS_IF_DEF_CH70xx != 0) ||
  2897. (SiS_Pr->SiS_IF_DEF_TRUMPION != 0) ) {
  2898. SiS_SetCRT2Group(SiS_Pr, RealModeNo);
  2899. }
  2900. }
  2901. SiS_HandleCRT1(SiS_Pr);
  2902. SiS_StrangeStuff(SiS_Pr);
  2903. SiS_DisplayOn(SiS_Pr);
  2904. SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
  2905. #ifdef SIS315H
  2906. if(SiS_Pr->ChipType >= SIS_315H) {
  2907. if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
  2908. if(!(SiS_IsDualEdge(SiS_Pr))) {
  2909. SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb);
  2910. }
  2911. }
  2912. }
  2913. #endif
  2914. if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
  2915. if(SiS_Pr->ChipType >= SIS_315H) {
  2916. #ifdef SIS315H
  2917. if(!SiS_Pr->SiS_ROMNew) {
  2918. if(SiS_IsVAMode(SiS_Pr)) {
  2919. SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01);
  2920. } else {
  2921. SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x35,0xFE);
  2922. }
  2923. }
  2924. SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupreg);
  2925. if((IS_SIS650) && (SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & 0xfc)) {
  2926. if((ModeNo == 0x03) || (ModeNo == 0x10)) {
  2927. SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x51,0x80);
  2928. SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x56,0x08);
  2929. }
  2930. }
  2931. if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & SetCRT2ToLCD) {
  2932. SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xfc);
  2933. }
  2934. #endif
  2935. } else if((SiS_Pr->ChipType == SIS_630) ||
  2936. (SiS_Pr->ChipType == SIS_730)) {
  2937. SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg);
  2938. }
  2939. }
  2940. SiS_CloseCRTC(SiS_Pr);
  2941. SiS_Handle760(SiS_Pr);
  2942. #ifdef SIS_LINUX_KERNEL
  2943. /* We never lock registers in XF86 */
  2944. if(KeepLockReg != 0xA1) SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x00);
  2945. #endif
  2946. return true;
  2947. }
  2948. #ifndef GETBITSTR
  2949. #define BITMASK(h,l) (((unsigned)(1U << ((h)-(l)+1))-1)<<(l))
  2950. #define GENMASK(mask) BITMASK(1?mask,0?mask)
  2951. #define GETBITS(var,mask) (((var) & GENMASK(mask)) >> (0?mask))
  2952. #define GETBITSTR(val,from,to) ((GETBITS(val,from)) << (0?to))
  2953. #endif
  2954. void
  2955. SiS_CalcCRRegisters(struct SiS_Private *SiS_Pr, int depth)
  2956. {
  2957. int x = 1; /* Fix sync */
  2958. SiS_Pr->CCRT1CRTC[0] = ((SiS_Pr->CHTotal >> 3) - 5) & 0xff; /* CR0 */
  2959. SiS_Pr->CCRT1CRTC[1] = (SiS_Pr->CHDisplay >> 3) - 1; /* CR1 */
  2960. SiS_Pr->CCRT1CRTC[2] = (SiS_Pr->CHBlankStart >> 3) - 1; /* CR2 */
  2961. SiS_Pr->CCRT1CRTC[3] = (((SiS_Pr->CHBlankEnd >> 3) - 1) & 0x1F) | 0x80; /* CR3 */
  2962. SiS_Pr->CCRT1CRTC[4] = (SiS_Pr->CHSyncStart >> 3) + 3; /* CR4 */
  2963. SiS_Pr->CCRT1CRTC[5] = ((((SiS_Pr->CHBlankEnd >> 3) - 1) & 0x20) << 2) | /* CR5 */
  2964. (((SiS_Pr->CHSyncEnd >> 3) + 3) & 0x1F);
  2965. SiS_Pr->CCRT1CRTC[6] = (SiS_Pr->CVTotal - 2) & 0xFF; /* CR6 */
  2966. SiS_Pr->CCRT1CRTC[7] = (((SiS_Pr->CVTotal - 2) & 0x100) >> 8) /* CR7 */
  2967. | (((SiS_Pr->CVDisplay - 1) & 0x100) >> 7)
  2968. | (((SiS_Pr->CVSyncStart - x) & 0x100) >> 6)
  2969. | (((SiS_Pr->CVBlankStart- 1) & 0x100) >> 5)
  2970. | 0x10
  2971. | (((SiS_Pr->CVTotal - 2) & 0x200) >> 4)
  2972. | (((SiS_Pr->CVDisplay - 1) & 0x200) >> 3)
  2973. | (((SiS_Pr->CVSyncStart - x) & 0x200) >> 2);
  2974. SiS_Pr->CCRT1CRTC[16] = ((((SiS_Pr->CVBlankStart - 1) & 0x200) >> 4) >> 5); /* CR9 */
  2975. if(depth != 8) {
  2976. if(SiS_Pr->CHDisplay >= 1600) SiS_Pr->CCRT1CRTC[16] |= 0x60; /* SRE */
  2977. else if(SiS_Pr->CHDisplay >= 640) SiS_Pr->CCRT1CRTC[16] |= 0x40;
  2978. }
  2979. SiS_Pr->CCRT1CRTC[8] = (SiS_Pr->CVSyncStart - x) & 0xFF; /* CR10 */
  2980. SiS_Pr->CCRT1CRTC[9] = ((SiS_Pr->CVSyncEnd - x) & 0x0F) | 0x80; /* CR11 */
  2981. SiS_Pr->CCRT1CRTC[10] = (SiS_Pr->CVDisplay - 1) & 0xFF; /* CR12 */
  2982. SiS_Pr->CCRT1CRTC[11] = (SiS_Pr->CVBlankStart - 1) & 0xFF; /* CR15 */
  2983. SiS_Pr->CCRT1CRTC[12] = (SiS_Pr->CVBlankEnd - 1) & 0xFF; /* CR16 */
  2984. SiS_Pr->CCRT1CRTC[13] = /* SRA */
  2985. GETBITSTR((SiS_Pr->CVTotal -2), 10:10, 0:0) |
  2986. GETBITSTR((SiS_Pr->CVDisplay -1), 10:10, 1:1) |
  2987. GETBITSTR((SiS_Pr->CVBlankStart-1), 10:10, 2:2) |
  2988. GETBITSTR((SiS_Pr->CVSyncStart -x), 10:10, 3:3) |
  2989. GETBITSTR((SiS_Pr->CVBlankEnd -1), 8:8, 4:4) |
  2990. GETBITSTR((SiS_Pr->CVSyncEnd ), 4:4, 5:5) ;
  2991. SiS_Pr->CCRT1CRTC[14] = /* SRB */
  2992. GETBITSTR((SiS_Pr->CHTotal >> 3) - 5, 9:8, 1:0) |
  2993. GETBITSTR((SiS_Pr->CHDisplay >> 3) - 1, 9:8, 3:2) |
  2994. GETBITSTR((SiS_Pr->CHBlankStart >> 3) - 1, 9:8, 5:4) |
  2995. GETBITSTR((SiS_Pr->CHSyncStart >> 3) + 3, 9:8, 7:6) ;
  2996. SiS_Pr->CCRT1CRTC[15] = /* SRC */
  2997. GETBITSTR((SiS_Pr->CHBlankEnd >> 3) - 1, 7:6, 1:0) |
  2998. GETBITSTR((SiS_Pr->CHSyncEnd >> 3) + 3, 5:5, 2:2) ;
  2999. }
  3000. void
  3001. SiS_CalcLCDACRT1Timing(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
  3002. unsigned short ModeIdIndex)
  3003. {
  3004. unsigned short modeflag, tempax, tempbx = 0, remaining = 0;
  3005. unsigned short VGAHDE = SiS_Pr->SiS_VGAHDE;
  3006. int i, j;
  3007. /* 1:1 data: use data set by setcrt1crtc() */
  3008. if(SiS_Pr->SiS_LCDInfo & LCDPass11) return;
  3009. modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
  3010. if(modeflag & HalfDCLK) VGAHDE >>= 1;
  3011. SiS_Pr->CHDisplay = VGAHDE;
  3012. SiS_Pr->CHBlankStart = VGAHDE;
  3013. SiS_Pr->CVDisplay = SiS_Pr->SiS_VGAVDE;
  3014. SiS_Pr->CVBlankStart = SiS_Pr->SiS_VGAVDE;
  3015. if(SiS_Pr->ChipType < SIS_315H) {
  3016. #ifdef SIS300
  3017. tempbx = SiS_Pr->SiS_VGAHT;
  3018. if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
  3019. tempbx = SiS_Pr->PanelHT;
  3020. }
  3021. if(modeflag & HalfDCLK) tempbx >>= 1;
  3022. remaining = tempbx % 8;
  3023. #endif
  3024. } else {
  3025. #ifdef SIS315H
  3026. /* OK for LCDA, LVDS */
  3027. tempbx = SiS_Pr->PanelHT - SiS_Pr->PanelXRes;
  3028. tempax = SiS_Pr->SiS_VGAHDE; /* not /2 ! */
  3029. if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
  3030. tempax = SiS_Pr->PanelXRes;
  3031. }
  3032. tempbx += tempax;
  3033. if(modeflag & HalfDCLK) tempbx -= VGAHDE;
  3034. #endif
  3035. }
  3036. SiS_Pr->CHTotal = SiS_Pr->CHBlankEnd = tempbx;
  3037. if(SiS_Pr->ChipType < SIS_315H) {
  3038. #ifdef SIS300
  3039. if(SiS_Pr->SiS_VGAHDE == SiS_Pr->PanelXRes) {
  3040. SiS_Pr->CHSyncStart = SiS_Pr->SiS_VGAHDE + ((SiS_Pr->PanelHRS + 1) & ~1);
  3041. SiS_Pr->CHSyncEnd = SiS_Pr->CHSyncStart + SiS_Pr->PanelHRE;
  3042. if(modeflag & HalfDCLK) {
  3043. SiS_Pr->CHSyncStart >>= 1;
  3044. SiS_Pr->CHSyncEnd >>= 1;
  3045. }
  3046. } else if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
  3047. tempax = (SiS_Pr->PanelXRes - SiS_Pr->SiS_VGAHDE) >> 1;
  3048. tempbx = (SiS_Pr->PanelHRS + 1) & ~1;
  3049. if(modeflag & HalfDCLK) {
  3050. tempax >>= 1;
  3051. tempbx >>= 1;
  3052. }
  3053. SiS_Pr->CHSyncStart = (VGAHDE + tempax + tempbx + 7) & ~7;
  3054. tempax = SiS_Pr->PanelHRE + 7;
  3055. if(modeflag & HalfDCLK) tempax >>= 1;
  3056. SiS_Pr->CHSyncEnd = (SiS_Pr->CHSyncStart + tempax) & ~7;
  3057. } else {
  3058. SiS_Pr->CHSyncStart = SiS_Pr->SiS_VGAHDE;
  3059. if(modeflag & HalfDCLK) {
  3060. SiS_Pr->CHSyncStart >>= 1;
  3061. tempax = ((SiS_Pr->CHTotal - SiS_Pr->CHSyncStart) / 3) << 1;
  3062. SiS_Pr->CHSyncEnd = SiS_Pr->CHSyncStart + tempax;
  3063. } else {
  3064. SiS_Pr->CHSyncEnd = (SiS_Pr->CHSyncStart + (SiS_Pr->CHTotal / 10) + 7) & ~7;
  3065. SiS_Pr->CHSyncStart += 8;
  3066. }
  3067. }
  3068. #endif
  3069. } else {
  3070. #ifdef SIS315H
  3071. tempax = VGAHDE;
  3072. if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
  3073. tempbx = SiS_Pr->PanelXRes;
  3074. if(modeflag & HalfDCLK) tempbx >>= 1;
  3075. tempax += ((tempbx - tempax) >> 1);
  3076. }
  3077. tempax += SiS_Pr->PanelHRS;
  3078. SiS_Pr->CHSyncStart = tempax;
  3079. tempax += SiS_Pr->PanelHRE;
  3080. SiS_Pr->CHSyncEnd = tempax;
  3081. #endif
  3082. }
  3083. tempbx = SiS_Pr->PanelVT - SiS_Pr->PanelYRes;
  3084. tempax = SiS_Pr->SiS_VGAVDE;
  3085. if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
  3086. tempax = SiS_Pr->PanelYRes;
  3087. } else if(SiS_Pr->ChipType < SIS_315H) {
  3088. #ifdef SIS300
  3089. /* Stupid hack for 640x400/320x200 */
  3090. if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) {
  3091. if((tempax + tempbx) == 438) tempbx += 16;
  3092. } else if((SiS_Pr->SiS_LCDResInfo == Panel_800x600) ||
  3093. (SiS_Pr->SiS_LCDResInfo == Panel_1024x600)) {
  3094. tempax = 0;
  3095. tempbx = SiS_Pr->SiS_VGAVT;
  3096. }
  3097. #endif
  3098. }
  3099. SiS_Pr->CVTotal = SiS_Pr->CVBlankEnd = tempbx + tempax;
  3100. tempax = SiS_Pr->SiS_VGAVDE;
  3101. if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
  3102. tempax += (SiS_Pr->PanelYRes - tempax) >> 1;
  3103. }
  3104. tempax += SiS_Pr->PanelVRS;
  3105. SiS_Pr->CVSyncStart = tempax;
  3106. tempax += SiS_Pr->PanelVRE;
  3107. SiS_Pr->CVSyncEnd = tempax;
  3108. if(SiS_Pr->ChipType < SIS_315H) {
  3109. SiS_Pr->CVSyncStart--;
  3110. SiS_Pr->CVSyncEnd--;
  3111. }
  3112. SiS_CalcCRRegisters(SiS_Pr, 8);
  3113. SiS_Pr->CCRT1CRTC[15] &= ~0xF8;
  3114. SiS_Pr->CCRT1CRTC[15] |= (remaining << 4);
  3115. SiS_Pr->CCRT1CRTC[16] &= ~0xE0;
  3116. SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f);
  3117. for(i = 0, j = 0; i <= 7; i++, j++) {
  3118. SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
  3119. }
  3120. for(j = 0x10; i <= 10; i++, j++) {
  3121. SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
  3122. }
  3123. for(j = 0x15; i <= 12; i++, j++) {
  3124. SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
  3125. }
  3126. for(j = 0x0A; i <= 15; i++, j++) {
  3127. SiS_SetReg(SiS_Pr->SiS_P3c4,j,SiS_Pr->CCRT1CRTC[i]);
  3128. }
  3129. tempax = SiS_Pr->CCRT1CRTC[16] & 0xE0;
  3130. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0x1F,tempax);
  3131. tempax = (SiS_Pr->CCRT1CRTC[16] & 0x01) << 5;
  3132. if(modeflag & DoubleScanMode) tempax |= 0x80;
  3133. SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,tempax);
  3134. }
  3135. void
  3136. SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata,
  3137. int xres, int yres,
  3138. #ifdef SIS_LINUX_KERNEL
  3139. struct fb_var_screeninfo *var, bool writeres
  3140. #endif
  3141. )
  3142. {
  3143. unsigned short HRE, HBE, HRS, HBS, HDE, HT;
  3144. unsigned short VRE, VBE, VRS, VBS, VDE, VT;
  3145. unsigned char sr_data, cr_data, cr_data2;
  3146. int A, B, C, D, E, F, temp;
  3147. sr_data = crdata[14];
  3148. /* Horizontal total */
  3149. HT = crdata[0] | ((unsigned short)(sr_data & 0x03) << 8);
  3150. A = HT + 5;
  3151. /* Horizontal display enable end */
  3152. HDE = crdata[1] | ((unsigned short)(sr_data & 0x0C) << 6);
  3153. E = HDE + 1;
  3154. /* Horizontal retrace (=sync) start */
  3155. HRS = crdata[4] | ((unsigned short)(sr_data & 0xC0) << 2);
  3156. F = HRS - E - 3;
  3157. /* Horizontal blank start */
  3158. HBS = crdata[2] | ((unsigned short)(sr_data & 0x30) << 4);
  3159. sr_data = crdata[15];
  3160. cr_data = crdata[5];
  3161. /* Horizontal blank end */
  3162. HBE = (crdata[3] & 0x1f) |
  3163. ((unsigned short)(cr_data & 0x80) >> 2) |
  3164. ((unsigned short)(sr_data & 0x03) << 6);
  3165. /* Horizontal retrace (=sync) end */
  3166. HRE = (cr_data & 0x1f) | ((sr_data & 0x04) << 3);
  3167. temp = HBE - ((E - 1) & 255);
  3168. B = (temp > 0) ? temp : (temp + 256);
  3169. temp = HRE - ((E + F + 3) & 63);
  3170. C = (temp > 0) ? temp : (temp + 64);
  3171. D = B - F - C;
  3172. #ifdef SIS_LINUX_KERNEL
  3173. if(writeres) var->xres = xres = E * 8;
  3174. var->left_margin = D * 8;
  3175. var->right_margin = F * 8;
  3176. var->hsync_len = C * 8;
  3177. #endif
  3178. /* Vertical */
  3179. sr_data = crdata[13];
  3180. cr_data = crdata[7];
  3181. /* Vertical total */
  3182. VT = crdata[6] |
  3183. ((unsigned short)(cr_data & 0x01) << 8) |
  3184. ((unsigned short)(cr_data & 0x20) << 4) |
  3185. ((unsigned short)(sr_data & 0x01) << 10);
  3186. A = VT + 2;
  3187. /* Vertical display enable end */
  3188. VDE = crdata[10] |
  3189. ((unsigned short)(cr_data & 0x02) << 7) |
  3190. ((unsigned short)(cr_data & 0x40) << 3) |
  3191. ((unsigned short)(sr_data & 0x02) << 9);
  3192. E = VDE + 1;
  3193. /* Vertical retrace (=sync) start */
  3194. VRS = crdata[8] |
  3195. ((unsigned short)(cr_data & 0x04) << 6) |
  3196. ((unsigned short)(cr_data & 0x80) << 2) |
  3197. ((unsigned short)(sr_data & 0x08) << 7);
  3198. F = VRS + 1 - E;
  3199. cr_data2 = (crdata[16] & 0x01) << 5;
  3200. /* Vertical blank start */
  3201. VBS = crdata[11] |
  3202. ((unsigned short)(cr_data & 0x08) << 5) |
  3203. ((unsigned short)(cr_data2 & 0x20) << 4) |
  3204. ((unsigned short)(sr_data & 0x04) << 8);
  3205. /* Vertical blank end */
  3206. VBE = crdata[12] | ((unsigned short)(sr_data & 0x10) << 4);
  3207. temp = VBE - ((E - 1) & 511);
  3208. B = (temp > 0) ? temp : (temp + 512);
  3209. /* Vertical retrace (=sync) end */
  3210. VRE = (crdata[9] & 0x0f) | ((sr_data & 0x20) >> 1);
  3211. temp = VRE - ((E + F - 1) & 31);
  3212. C = (temp > 0) ? temp : (temp + 32);
  3213. D = B - F - C;
  3214. #ifdef SIS_LINUX_KERNEL
  3215. if(writeres) var->yres = yres = E;
  3216. var->upper_margin = D;
  3217. var->lower_margin = F;
  3218. var->vsync_len = C;
  3219. #endif
  3220. if((xres == 320) && ((yres == 200) || (yres == 240))) {
  3221. /* Terrible hack, but correct CRTC data for
  3222. * these modes only produces a black screen...
  3223. * (HRE is 0, leading into a too large C and
  3224. * a negative D. The CRT controller does not
  3225. * seem to like correcting HRE to 50)
  3226. */
  3227. #ifdef SIS_LINUX_KERNEL
  3228. var->left_margin = (400 - 376);
  3229. var->right_margin = (328 - 320);
  3230. var->hsync_len = (376 - 328);
  3231. #endif
  3232. }
  3233. }