e1000_main.c 136 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20. *******************************************************************************/
  21. #include "e1000.h"
  22. char e1000_driver_name[] = "e1000";
  23. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  24. #ifndef CONFIG_E1000_NAPI
  25. #define DRIVERNAPI
  26. #else
  27. #define DRIVERNAPI "-NAPI"
  28. #endif
  29. #define DRV_VERSION "7.1.9-k6"DRIVERNAPI
  30. char e1000_driver_version[] = DRV_VERSION;
  31. static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
  32. /* e1000_pci_tbl - PCI Device ID Table
  33. *
  34. * Last entry must be all 0s
  35. *
  36. * Macro expands to...
  37. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  38. */
  39. static struct pci_device_id e1000_pci_tbl[] = {
  40. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  41. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  42. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  43. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  44. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  45. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  46. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  47. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  48. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  49. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  50. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  51. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  52. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  53. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  54. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  55. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  56. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  57. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  58. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  59. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  60. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  61. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  62. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  63. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  64. INTEL_E1000_ETHERNET_DEVICE(0x1049),
  65. INTEL_E1000_ETHERNET_DEVICE(0x104A),
  66. INTEL_E1000_ETHERNET_DEVICE(0x104B),
  67. INTEL_E1000_ETHERNET_DEVICE(0x104C),
  68. INTEL_E1000_ETHERNET_DEVICE(0x104D),
  69. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  70. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  71. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  72. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  73. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  74. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  75. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  76. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  77. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  78. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  79. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  80. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  81. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  82. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  83. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  84. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  85. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  86. INTEL_E1000_ETHERNET_DEVICE(0x1096),
  87. INTEL_E1000_ETHERNET_DEVICE(0x1098),
  88. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  89. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  90. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  91. INTEL_E1000_ETHERNET_DEVICE(0x10B9),
  92. INTEL_E1000_ETHERNET_DEVICE(0x10BA),
  93. INTEL_E1000_ETHERNET_DEVICE(0x10BB),
  94. /* required last entry */
  95. {0,}
  96. };
  97. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  98. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  99. struct e1000_tx_ring *txdr);
  100. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  101. struct e1000_rx_ring *rxdr);
  102. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  103. struct e1000_tx_ring *tx_ring);
  104. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  105. struct e1000_rx_ring *rx_ring);
  106. /* Local Function Prototypes */
  107. static int e1000_init_module(void);
  108. static void e1000_exit_module(void);
  109. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  110. static void __devexit e1000_remove(struct pci_dev *pdev);
  111. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  112. static int e1000_sw_init(struct e1000_adapter *adapter);
  113. static int e1000_open(struct net_device *netdev);
  114. static int e1000_close(struct net_device *netdev);
  115. static void e1000_configure_tx(struct e1000_adapter *adapter);
  116. static void e1000_configure_rx(struct e1000_adapter *adapter);
  117. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  118. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  119. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  120. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  121. struct e1000_tx_ring *tx_ring);
  122. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  123. struct e1000_rx_ring *rx_ring);
  124. static void e1000_set_multi(struct net_device *netdev);
  125. static void e1000_update_phy_info(unsigned long data);
  126. static void e1000_watchdog(unsigned long data);
  127. static void e1000_82547_tx_fifo_stall(unsigned long data);
  128. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  129. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  130. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  131. static int e1000_set_mac(struct net_device *netdev, void *p);
  132. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  133. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  134. struct e1000_tx_ring *tx_ring);
  135. #ifdef CONFIG_E1000_NAPI
  136. static int e1000_clean(struct net_device *poll_dev, int *budget);
  137. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  138. struct e1000_rx_ring *rx_ring,
  139. int *work_done, int work_to_do);
  140. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  141. struct e1000_rx_ring *rx_ring,
  142. int *work_done, int work_to_do);
  143. #else
  144. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  145. struct e1000_rx_ring *rx_ring);
  146. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  147. struct e1000_rx_ring *rx_ring);
  148. #endif
  149. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  150. struct e1000_rx_ring *rx_ring,
  151. int cleaned_count);
  152. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  153. struct e1000_rx_ring *rx_ring,
  154. int cleaned_count);
  155. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  156. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  157. int cmd);
  158. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  159. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  160. static void e1000_tx_timeout(struct net_device *dev);
  161. static void e1000_reset_task(struct net_device *dev);
  162. static void e1000_smartspeed(struct e1000_adapter *adapter);
  163. static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  164. struct sk_buff *skb);
  165. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  166. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  167. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  168. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  169. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  170. #ifdef CONFIG_PM
  171. static int e1000_resume(struct pci_dev *pdev);
  172. #endif
  173. static void e1000_shutdown(struct pci_dev *pdev);
  174. #ifdef CONFIG_NET_POLL_CONTROLLER
  175. /* for netdump / net console */
  176. static void e1000_netpoll (struct net_device *netdev);
  177. #endif
  178. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
  179. pci_channel_state_t state);
  180. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
  181. static void e1000_io_resume(struct pci_dev *pdev);
  182. static struct pci_error_handlers e1000_err_handler = {
  183. .error_detected = e1000_io_error_detected,
  184. .slot_reset = e1000_io_slot_reset,
  185. .resume = e1000_io_resume,
  186. };
  187. static struct pci_driver e1000_driver = {
  188. .name = e1000_driver_name,
  189. .id_table = e1000_pci_tbl,
  190. .probe = e1000_probe,
  191. .remove = __devexit_p(e1000_remove),
  192. /* Power Managment Hooks */
  193. .suspend = e1000_suspend,
  194. #ifdef CONFIG_PM
  195. .resume = e1000_resume,
  196. #endif
  197. .shutdown = e1000_shutdown,
  198. .err_handler = &e1000_err_handler
  199. };
  200. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  201. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  202. MODULE_LICENSE("GPL");
  203. MODULE_VERSION(DRV_VERSION);
  204. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  205. module_param(debug, int, 0);
  206. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  207. /**
  208. * e1000_init_module - Driver Registration Routine
  209. *
  210. * e1000_init_module is the first routine called when the driver is
  211. * loaded. All it does is register with the PCI subsystem.
  212. **/
  213. static int __init
  214. e1000_init_module(void)
  215. {
  216. int ret;
  217. printk(KERN_INFO "%s - version %s\n",
  218. e1000_driver_string, e1000_driver_version);
  219. printk(KERN_INFO "%s\n", e1000_copyright);
  220. ret = pci_register_driver(&e1000_driver);
  221. return ret;
  222. }
  223. module_init(e1000_init_module);
  224. /**
  225. * e1000_exit_module - Driver Exit Cleanup Routine
  226. *
  227. * e1000_exit_module is called just before the driver is removed
  228. * from memory.
  229. **/
  230. static void __exit
  231. e1000_exit_module(void)
  232. {
  233. pci_unregister_driver(&e1000_driver);
  234. }
  235. module_exit(e1000_exit_module);
  236. static int e1000_request_irq(struct e1000_adapter *adapter)
  237. {
  238. struct net_device *netdev = adapter->netdev;
  239. int flags, err = 0;
  240. flags = IRQF_SHARED;
  241. #ifdef CONFIG_PCI_MSI
  242. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  243. adapter->have_msi = TRUE;
  244. if ((err = pci_enable_msi(adapter->pdev))) {
  245. DPRINTK(PROBE, ERR,
  246. "Unable to allocate MSI interrupt Error: %d\n", err);
  247. adapter->have_msi = FALSE;
  248. }
  249. }
  250. if (adapter->have_msi)
  251. flags &= ~IRQF_SHARED;
  252. #endif
  253. if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
  254. netdev->name, netdev)))
  255. DPRINTK(PROBE, ERR,
  256. "Unable to allocate interrupt Error: %d\n", err);
  257. return err;
  258. }
  259. static void e1000_free_irq(struct e1000_adapter *adapter)
  260. {
  261. struct net_device *netdev = adapter->netdev;
  262. free_irq(adapter->pdev->irq, netdev);
  263. #ifdef CONFIG_PCI_MSI
  264. if (adapter->have_msi)
  265. pci_disable_msi(adapter->pdev);
  266. #endif
  267. }
  268. /**
  269. * e1000_irq_disable - Mask off interrupt generation on the NIC
  270. * @adapter: board private structure
  271. **/
  272. static void
  273. e1000_irq_disable(struct e1000_adapter *adapter)
  274. {
  275. atomic_inc(&adapter->irq_sem);
  276. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  277. E1000_WRITE_FLUSH(&adapter->hw);
  278. synchronize_irq(adapter->pdev->irq);
  279. }
  280. /**
  281. * e1000_irq_enable - Enable default interrupt generation settings
  282. * @adapter: board private structure
  283. **/
  284. static void
  285. e1000_irq_enable(struct e1000_adapter *adapter)
  286. {
  287. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  288. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  289. E1000_WRITE_FLUSH(&adapter->hw);
  290. }
  291. }
  292. static void
  293. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  294. {
  295. struct net_device *netdev = adapter->netdev;
  296. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  297. uint16_t old_vid = adapter->mng_vlan_id;
  298. if (adapter->vlgrp) {
  299. if (!adapter->vlgrp->vlan_devices[vid]) {
  300. if (adapter->hw.mng_cookie.status &
  301. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  302. e1000_vlan_rx_add_vid(netdev, vid);
  303. adapter->mng_vlan_id = vid;
  304. } else
  305. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  306. if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  307. (vid != old_vid) &&
  308. !adapter->vlgrp->vlan_devices[old_vid])
  309. e1000_vlan_rx_kill_vid(netdev, old_vid);
  310. } else
  311. adapter->mng_vlan_id = vid;
  312. }
  313. }
  314. /**
  315. * e1000_release_hw_control - release control of the h/w to f/w
  316. * @adapter: address of board private structure
  317. *
  318. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  319. * For ASF and Pass Through versions of f/w this means that the
  320. * driver is no longer loaded. For AMT version (only with 82573) i
  321. * of the f/w this means that the netowrk i/f is closed.
  322. *
  323. **/
  324. static void
  325. e1000_release_hw_control(struct e1000_adapter *adapter)
  326. {
  327. uint32_t ctrl_ext;
  328. uint32_t swsm;
  329. uint32_t extcnf;
  330. /* Let firmware taken over control of h/w */
  331. switch (adapter->hw.mac_type) {
  332. case e1000_82571:
  333. case e1000_82572:
  334. case e1000_80003es2lan:
  335. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  336. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  337. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  338. break;
  339. case e1000_82573:
  340. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  341. E1000_WRITE_REG(&adapter->hw, SWSM,
  342. swsm & ~E1000_SWSM_DRV_LOAD);
  343. case e1000_ich8lan:
  344. extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  345. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  346. extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
  347. break;
  348. default:
  349. break;
  350. }
  351. }
  352. /**
  353. * e1000_get_hw_control - get control of the h/w from f/w
  354. * @adapter: address of board private structure
  355. *
  356. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  357. * For ASF and Pass Through versions of f/w this means that
  358. * the driver is loaded. For AMT version (only with 82573)
  359. * of the f/w this means that the netowrk i/f is open.
  360. *
  361. **/
  362. static void
  363. e1000_get_hw_control(struct e1000_adapter *adapter)
  364. {
  365. uint32_t ctrl_ext;
  366. uint32_t swsm;
  367. uint32_t extcnf;
  368. /* Let firmware know the driver has taken over */
  369. switch (adapter->hw.mac_type) {
  370. case e1000_82571:
  371. case e1000_82572:
  372. case e1000_80003es2lan:
  373. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  374. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  375. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  376. break;
  377. case e1000_82573:
  378. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  379. E1000_WRITE_REG(&adapter->hw, SWSM,
  380. swsm | E1000_SWSM_DRV_LOAD);
  381. break;
  382. case e1000_ich8lan:
  383. extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
  384. E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
  385. extcnf | E1000_EXTCNF_CTRL_SWFLAG);
  386. break;
  387. default:
  388. break;
  389. }
  390. }
  391. int
  392. e1000_up(struct e1000_adapter *adapter)
  393. {
  394. struct net_device *netdev = adapter->netdev;
  395. int i;
  396. /* hardware has been reset, we need to reload some things */
  397. e1000_set_multi(netdev);
  398. e1000_restore_vlan(adapter);
  399. e1000_configure_tx(adapter);
  400. e1000_setup_rctl(adapter);
  401. e1000_configure_rx(adapter);
  402. /* call E1000_DESC_UNUSED which always leaves
  403. * at least 1 descriptor unused to make sure
  404. * next_to_use != next_to_clean */
  405. for (i = 0; i < adapter->num_rx_queues; i++) {
  406. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  407. adapter->alloc_rx_buf(adapter, ring,
  408. E1000_DESC_UNUSED(ring));
  409. }
  410. adapter->tx_queue_len = netdev->tx_queue_len;
  411. mod_timer(&adapter->watchdog_timer, jiffies);
  412. #ifdef CONFIG_E1000_NAPI
  413. netif_poll_enable(netdev);
  414. #endif
  415. e1000_irq_enable(adapter);
  416. return 0;
  417. }
  418. /**
  419. * e1000_power_up_phy - restore link in case the phy was powered down
  420. * @adapter: address of board private structure
  421. *
  422. * The phy may be powered down to save power and turn off link when the
  423. * driver is unloaded and wake on lan is not enabled (among others)
  424. * *** this routine MUST be followed by a call to e1000_reset ***
  425. *
  426. **/
  427. void e1000_power_up_phy(struct e1000_adapter *adapter)
  428. {
  429. uint16_t mii_reg = 0;
  430. /* Just clear the power down bit to wake the phy back up */
  431. if (adapter->hw.media_type == e1000_media_type_copper) {
  432. /* according to the manual, the phy will retain its
  433. * settings across a power-down/up cycle */
  434. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  435. mii_reg &= ~MII_CR_POWER_DOWN;
  436. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  437. }
  438. }
  439. static void e1000_power_down_phy(struct e1000_adapter *adapter)
  440. {
  441. boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
  442. e1000_check_mng_mode(&adapter->hw);
  443. /* Power down the PHY so no link is implied when interface is down
  444. * The PHY cannot be powered down if any of the following is TRUE
  445. * (a) WoL is enabled
  446. * (b) AMT is active
  447. * (c) SoL/IDER session is active */
  448. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  449. adapter->hw.mac_type != e1000_ich8lan &&
  450. adapter->hw.media_type == e1000_media_type_copper &&
  451. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
  452. !mng_mode_enabled &&
  453. !e1000_check_phy_reset_block(&adapter->hw)) {
  454. uint16_t mii_reg = 0;
  455. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  456. mii_reg |= MII_CR_POWER_DOWN;
  457. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  458. mdelay(1);
  459. }
  460. }
  461. void
  462. e1000_down(struct e1000_adapter *adapter)
  463. {
  464. struct net_device *netdev = adapter->netdev;
  465. e1000_irq_disable(adapter);
  466. del_timer_sync(&adapter->tx_fifo_stall_timer);
  467. del_timer_sync(&adapter->watchdog_timer);
  468. del_timer_sync(&adapter->phy_info_timer);
  469. #ifdef CONFIG_E1000_NAPI
  470. netif_poll_disable(netdev);
  471. #endif
  472. netdev->tx_queue_len = adapter->tx_queue_len;
  473. adapter->link_speed = 0;
  474. adapter->link_duplex = 0;
  475. netif_carrier_off(netdev);
  476. netif_stop_queue(netdev);
  477. e1000_reset(adapter);
  478. e1000_clean_all_tx_rings(adapter);
  479. e1000_clean_all_rx_rings(adapter);
  480. }
  481. void
  482. e1000_reinit_locked(struct e1000_adapter *adapter)
  483. {
  484. WARN_ON(in_interrupt());
  485. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  486. msleep(1);
  487. e1000_down(adapter);
  488. e1000_up(adapter);
  489. clear_bit(__E1000_RESETTING, &adapter->flags);
  490. }
  491. void
  492. e1000_reset(struct e1000_adapter *adapter)
  493. {
  494. uint32_t pba, manc;
  495. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  496. /* Repartition Pba for greater than 9k mtu
  497. * To take effect CTRL.RST is required.
  498. */
  499. switch (adapter->hw.mac_type) {
  500. case e1000_82547:
  501. case e1000_82547_rev_2:
  502. pba = E1000_PBA_30K;
  503. break;
  504. case e1000_82571:
  505. case e1000_82572:
  506. case e1000_80003es2lan:
  507. pba = E1000_PBA_38K;
  508. break;
  509. case e1000_82573:
  510. pba = E1000_PBA_12K;
  511. break;
  512. case e1000_ich8lan:
  513. pba = E1000_PBA_8K;
  514. break;
  515. default:
  516. pba = E1000_PBA_48K;
  517. break;
  518. }
  519. if ((adapter->hw.mac_type != e1000_82573) &&
  520. (adapter->netdev->mtu > E1000_RXBUFFER_8192))
  521. pba -= 8; /* allocate more FIFO for Tx */
  522. if (adapter->hw.mac_type == e1000_82547) {
  523. adapter->tx_fifo_head = 0;
  524. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  525. adapter->tx_fifo_size =
  526. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  527. atomic_set(&adapter->tx_fifo_stall, 0);
  528. }
  529. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  530. /* flow control settings */
  531. /* Set the FC high water mark to 90% of the FIFO size.
  532. * Required to clear last 3 LSB */
  533. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  534. /* We can't use 90% on small FIFOs because the remainder
  535. * would be less than 1 full frame. In this case, we size
  536. * it to allow at least a full frame above the high water
  537. * mark. */
  538. if (pba < E1000_PBA_16K)
  539. fc_high_water_mark = (pba * 1024) - 1600;
  540. adapter->hw.fc_high_water = fc_high_water_mark;
  541. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  542. if (adapter->hw.mac_type == e1000_80003es2lan)
  543. adapter->hw.fc_pause_time = 0xFFFF;
  544. else
  545. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  546. adapter->hw.fc_send_xon = 1;
  547. adapter->hw.fc = adapter->hw.original_fc;
  548. /* Allow time for pending master requests to run */
  549. e1000_reset_hw(&adapter->hw);
  550. if (adapter->hw.mac_type >= e1000_82544)
  551. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  552. if (e1000_init_hw(&adapter->hw))
  553. DPRINTK(PROBE, ERR, "Hardware Error\n");
  554. e1000_update_mng_vlan(adapter);
  555. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  556. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  557. e1000_reset_adaptive(&adapter->hw);
  558. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  559. if (!adapter->smart_power_down &&
  560. (adapter->hw.mac_type == e1000_82571 ||
  561. adapter->hw.mac_type == e1000_82572)) {
  562. uint16_t phy_data = 0;
  563. /* speed up time to link by disabling smart power down, ignore
  564. * the return value of this function because there is nothing
  565. * different we would do if it failed */
  566. e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
  567. &phy_data);
  568. phy_data &= ~IGP02E1000_PM_SPD;
  569. e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
  570. phy_data);
  571. }
  572. if (adapter->hw.mac_type < e1000_ich8lan)
  573. /* FIXME: this code is duplicate and wrong for PCI Express */
  574. if (adapter->en_mng_pt) {
  575. manc = E1000_READ_REG(&adapter->hw, MANC);
  576. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  577. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  578. }
  579. }
  580. /**
  581. * e1000_probe - Device Initialization Routine
  582. * @pdev: PCI device information struct
  583. * @ent: entry in e1000_pci_tbl
  584. *
  585. * Returns 0 on success, negative on failure
  586. *
  587. * e1000_probe initializes an adapter identified by a pci_dev structure.
  588. * The OS initialization, configuring of the adapter private structure,
  589. * and a hardware reset occur.
  590. **/
  591. static int __devinit
  592. e1000_probe(struct pci_dev *pdev,
  593. const struct pci_device_id *ent)
  594. {
  595. struct net_device *netdev;
  596. struct e1000_adapter *adapter;
  597. unsigned long mmio_start, mmio_len;
  598. unsigned long flash_start, flash_len;
  599. static int cards_found = 0;
  600. static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */
  601. int i, err, pci_using_dac;
  602. uint16_t eeprom_data;
  603. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  604. if ((err = pci_enable_device(pdev)))
  605. return err;
  606. if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
  607. !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
  608. pci_using_dac = 1;
  609. } else {
  610. if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
  611. (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
  612. E1000_ERR("No usable DMA configuration, aborting\n");
  613. goto err_dma;
  614. }
  615. pci_using_dac = 0;
  616. }
  617. if ((err = pci_request_regions(pdev, e1000_driver_name)))
  618. goto err_pci_reg;
  619. pci_set_master(pdev);
  620. err = -ENOMEM;
  621. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  622. if (!netdev)
  623. goto err_alloc_etherdev;
  624. SET_MODULE_OWNER(netdev);
  625. SET_NETDEV_DEV(netdev, &pdev->dev);
  626. pci_set_drvdata(pdev, netdev);
  627. adapter = netdev_priv(netdev);
  628. adapter->netdev = netdev;
  629. adapter->pdev = pdev;
  630. adapter->hw.back = adapter;
  631. adapter->msg_enable = (1 << debug) - 1;
  632. mmio_start = pci_resource_start(pdev, BAR_0);
  633. mmio_len = pci_resource_len(pdev, BAR_0);
  634. err = -EIO;
  635. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  636. if (!adapter->hw.hw_addr)
  637. goto err_ioremap;
  638. for (i = BAR_1; i <= BAR_5; i++) {
  639. if (pci_resource_len(pdev, i) == 0)
  640. continue;
  641. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  642. adapter->hw.io_base = pci_resource_start(pdev, i);
  643. break;
  644. }
  645. }
  646. netdev->open = &e1000_open;
  647. netdev->stop = &e1000_close;
  648. netdev->hard_start_xmit = &e1000_xmit_frame;
  649. netdev->get_stats = &e1000_get_stats;
  650. netdev->set_multicast_list = &e1000_set_multi;
  651. netdev->set_mac_address = &e1000_set_mac;
  652. netdev->change_mtu = &e1000_change_mtu;
  653. netdev->do_ioctl = &e1000_ioctl;
  654. e1000_set_ethtool_ops(netdev);
  655. netdev->tx_timeout = &e1000_tx_timeout;
  656. netdev->watchdog_timeo = 5 * HZ;
  657. #ifdef CONFIG_E1000_NAPI
  658. netdev->poll = &e1000_clean;
  659. netdev->weight = 64;
  660. #endif
  661. netdev->vlan_rx_register = e1000_vlan_rx_register;
  662. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  663. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  664. #ifdef CONFIG_NET_POLL_CONTROLLER
  665. netdev->poll_controller = e1000_netpoll;
  666. #endif
  667. strcpy(netdev->name, pci_name(pdev));
  668. netdev->mem_start = mmio_start;
  669. netdev->mem_end = mmio_start + mmio_len;
  670. netdev->base_addr = adapter->hw.io_base;
  671. adapter->bd_number = cards_found;
  672. /* setup the private structure */
  673. if ((err = e1000_sw_init(adapter)))
  674. goto err_sw_init;
  675. err = -EIO;
  676. /* Flash BAR mapping must happen after e1000_sw_init
  677. * because it depends on mac_type */
  678. if ((adapter->hw.mac_type == e1000_ich8lan) &&
  679. (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
  680. flash_start = pci_resource_start(pdev, 1);
  681. flash_len = pci_resource_len(pdev, 1);
  682. adapter->hw.flash_address = ioremap(flash_start, flash_len);
  683. if (!adapter->hw.flash_address)
  684. goto err_flashmap;
  685. }
  686. if (e1000_check_phy_reset_block(&adapter->hw))
  687. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  688. /* if ksp3, indicate if it's port a being setup */
  689. if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 &&
  690. e1000_ksp3_port_a == 0)
  691. adapter->ksp3_port_a = 1;
  692. e1000_ksp3_port_a++;
  693. /* Reset for multiple KP3 adapters */
  694. if (e1000_ksp3_port_a == 4)
  695. e1000_ksp3_port_a = 0;
  696. if (adapter->hw.mac_type >= e1000_82543) {
  697. netdev->features = NETIF_F_SG |
  698. NETIF_F_HW_CSUM |
  699. NETIF_F_HW_VLAN_TX |
  700. NETIF_F_HW_VLAN_RX |
  701. NETIF_F_HW_VLAN_FILTER;
  702. if (adapter->hw.mac_type == e1000_ich8lan)
  703. netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
  704. }
  705. #ifdef NETIF_F_TSO
  706. if ((adapter->hw.mac_type >= e1000_82544) &&
  707. (adapter->hw.mac_type != e1000_82547))
  708. netdev->features |= NETIF_F_TSO;
  709. #ifdef NETIF_F_TSO_IPV6
  710. if (adapter->hw.mac_type > e1000_82547_rev_2)
  711. netdev->features |= NETIF_F_TSO_IPV6;
  712. #endif
  713. #endif
  714. if (pci_using_dac)
  715. netdev->features |= NETIF_F_HIGHDMA;
  716. netdev->features |= NETIF_F_LLTX;
  717. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  718. /* initialize eeprom parameters */
  719. if (e1000_init_eeprom_params(&adapter->hw)) {
  720. E1000_ERR("EEPROM initialization failed\n");
  721. goto err_eeprom;
  722. }
  723. /* before reading the EEPROM, reset the controller to
  724. * put the device in a known good starting state */
  725. e1000_reset_hw(&adapter->hw);
  726. /* make sure the EEPROM is good */
  727. if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  728. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  729. goto err_eeprom;
  730. }
  731. /* copy the MAC address out of the EEPROM */
  732. if (e1000_read_mac_addr(&adapter->hw))
  733. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  734. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  735. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  736. if (!is_valid_ether_addr(netdev->perm_addr)) {
  737. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  738. goto err_eeprom;
  739. }
  740. e1000_get_bus_info(&adapter->hw);
  741. init_timer(&adapter->tx_fifo_stall_timer);
  742. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  743. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  744. init_timer(&adapter->watchdog_timer);
  745. adapter->watchdog_timer.function = &e1000_watchdog;
  746. adapter->watchdog_timer.data = (unsigned long) adapter;
  747. init_timer(&adapter->phy_info_timer);
  748. adapter->phy_info_timer.function = &e1000_update_phy_info;
  749. adapter->phy_info_timer.data = (unsigned long) adapter;
  750. INIT_WORK(&adapter->reset_task,
  751. (void (*)(void *))e1000_reset_task, netdev);
  752. /* we're going to reset, so assume we have no link for now */
  753. netif_carrier_off(netdev);
  754. netif_stop_queue(netdev);
  755. e1000_check_options(adapter);
  756. /* Initial Wake on LAN setting
  757. * If APM wake is enabled in the EEPROM,
  758. * enable the ACPI Magic Packet filter
  759. */
  760. switch (adapter->hw.mac_type) {
  761. case e1000_82542_rev2_0:
  762. case e1000_82542_rev2_1:
  763. case e1000_82543:
  764. break;
  765. case e1000_82544:
  766. e1000_read_eeprom(&adapter->hw,
  767. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  768. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  769. break;
  770. case e1000_ich8lan:
  771. e1000_read_eeprom(&adapter->hw,
  772. EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
  773. eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
  774. break;
  775. case e1000_82546:
  776. case e1000_82546_rev_3:
  777. case e1000_82571:
  778. case e1000_80003es2lan:
  779. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
  780. e1000_read_eeprom(&adapter->hw,
  781. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  782. break;
  783. }
  784. /* Fall Through */
  785. default:
  786. e1000_read_eeprom(&adapter->hw,
  787. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  788. break;
  789. }
  790. if (eeprom_data & eeprom_apme_mask)
  791. adapter->wol |= E1000_WUFC_MAG;
  792. /* print bus type/speed/width info */
  793. {
  794. struct e1000_hw *hw = &adapter->hw;
  795. DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
  796. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
  797. (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
  798. ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
  799. (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
  800. (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
  801. (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
  802. (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
  803. ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
  804. (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
  805. (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
  806. "32-bit"));
  807. }
  808. for (i = 0; i < 6; i++)
  809. printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
  810. /* reset the hardware with the new settings */
  811. e1000_reset(adapter);
  812. /* If the controller is 82573 and f/w is AMT, do not set
  813. * DRV_LOAD until the interface is up. For all other cases,
  814. * let the f/w know that the h/w is now under the control
  815. * of the driver. */
  816. if (adapter->hw.mac_type != e1000_82573 ||
  817. !e1000_check_mng_mode(&adapter->hw))
  818. e1000_get_hw_control(adapter);
  819. strcpy(netdev->name, "eth%d");
  820. if ((err = register_netdev(netdev)))
  821. goto err_register;
  822. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  823. cards_found++;
  824. return 0;
  825. err_register:
  826. e1000_release_hw_control(adapter);
  827. err_eeprom:
  828. if (!e1000_check_phy_reset_block(&adapter->hw))
  829. e1000_phy_hw_reset(&adapter->hw);
  830. if (adapter->hw.flash_address)
  831. iounmap(adapter->hw.flash_address);
  832. err_flashmap:
  833. #ifdef CONFIG_E1000_NAPI
  834. for (i = 0; i < adapter->num_rx_queues; i++)
  835. dev_put(&adapter->polling_netdev[i]);
  836. #endif
  837. kfree(adapter->tx_ring);
  838. kfree(adapter->rx_ring);
  839. #ifdef CONFIG_E1000_NAPI
  840. kfree(adapter->polling_netdev);
  841. #endif
  842. err_sw_init:
  843. iounmap(adapter->hw.hw_addr);
  844. err_ioremap:
  845. free_netdev(netdev);
  846. err_alloc_etherdev:
  847. pci_release_regions(pdev);
  848. err_pci_reg:
  849. err_dma:
  850. pci_disable_device(pdev);
  851. return err;
  852. }
  853. /**
  854. * e1000_remove - Device Removal Routine
  855. * @pdev: PCI device information struct
  856. *
  857. * e1000_remove is called by the PCI subsystem to alert the driver
  858. * that it should release a PCI device. The could be caused by a
  859. * Hot-Plug event, or because the driver is going to be removed from
  860. * memory.
  861. **/
  862. static void __devexit
  863. e1000_remove(struct pci_dev *pdev)
  864. {
  865. struct net_device *netdev = pci_get_drvdata(pdev);
  866. struct e1000_adapter *adapter = netdev_priv(netdev);
  867. uint32_t manc;
  868. #ifdef CONFIG_E1000_NAPI
  869. int i;
  870. #endif
  871. flush_scheduled_work();
  872. if (adapter->hw.mac_type >= e1000_82540 &&
  873. adapter->hw.mac_type != e1000_ich8lan &&
  874. adapter->hw.media_type == e1000_media_type_copper) {
  875. manc = E1000_READ_REG(&adapter->hw, MANC);
  876. if (manc & E1000_MANC_SMBUS_EN) {
  877. manc |= E1000_MANC_ARP_EN;
  878. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  879. }
  880. }
  881. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  882. * would have already happened in close and is redundant. */
  883. e1000_release_hw_control(adapter);
  884. unregister_netdev(netdev);
  885. #ifdef CONFIG_E1000_NAPI
  886. for (i = 0; i < adapter->num_rx_queues; i++)
  887. dev_put(&adapter->polling_netdev[i]);
  888. #endif
  889. if (!e1000_check_phy_reset_block(&adapter->hw))
  890. e1000_phy_hw_reset(&adapter->hw);
  891. kfree(adapter->tx_ring);
  892. kfree(adapter->rx_ring);
  893. #ifdef CONFIG_E1000_NAPI
  894. kfree(adapter->polling_netdev);
  895. #endif
  896. iounmap(adapter->hw.hw_addr);
  897. if (adapter->hw.flash_address)
  898. iounmap(adapter->hw.flash_address);
  899. pci_release_regions(pdev);
  900. free_netdev(netdev);
  901. pci_disable_device(pdev);
  902. }
  903. /**
  904. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  905. * @adapter: board private structure to initialize
  906. *
  907. * e1000_sw_init initializes the Adapter private data structure.
  908. * Fields are initialized based on PCI device information and
  909. * OS network device settings (MTU size).
  910. **/
  911. static int __devinit
  912. e1000_sw_init(struct e1000_adapter *adapter)
  913. {
  914. struct e1000_hw *hw = &adapter->hw;
  915. struct net_device *netdev = adapter->netdev;
  916. struct pci_dev *pdev = adapter->pdev;
  917. #ifdef CONFIG_E1000_NAPI
  918. int i;
  919. #endif
  920. /* PCI config space info */
  921. hw->vendor_id = pdev->vendor;
  922. hw->device_id = pdev->device;
  923. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  924. hw->subsystem_id = pdev->subsystem_device;
  925. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  926. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  927. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  928. adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
  929. hw->max_frame_size = netdev->mtu +
  930. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  931. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  932. /* identify the MAC */
  933. if (e1000_set_mac_type(hw)) {
  934. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  935. return -EIO;
  936. }
  937. switch (hw->mac_type) {
  938. default:
  939. break;
  940. case e1000_82541:
  941. case e1000_82547:
  942. case e1000_82541_rev_2:
  943. case e1000_82547_rev_2:
  944. hw->phy_init_script = 1;
  945. break;
  946. }
  947. e1000_set_media_type(hw);
  948. hw->wait_autoneg_complete = FALSE;
  949. hw->tbi_compatibility_en = TRUE;
  950. hw->adaptive_ifs = TRUE;
  951. /* Copper options */
  952. if (hw->media_type == e1000_media_type_copper) {
  953. hw->mdix = AUTO_ALL_MODES;
  954. hw->disable_polarity_correction = FALSE;
  955. hw->master_slave = E1000_MASTER_SLAVE;
  956. }
  957. adapter->num_tx_queues = 1;
  958. adapter->num_rx_queues = 1;
  959. if (e1000_alloc_queues(adapter)) {
  960. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  961. return -ENOMEM;
  962. }
  963. #ifdef CONFIG_E1000_NAPI
  964. for (i = 0; i < adapter->num_rx_queues; i++) {
  965. adapter->polling_netdev[i].priv = adapter;
  966. adapter->polling_netdev[i].poll = &e1000_clean;
  967. adapter->polling_netdev[i].weight = 64;
  968. dev_hold(&adapter->polling_netdev[i]);
  969. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  970. }
  971. spin_lock_init(&adapter->tx_queue_lock);
  972. #endif
  973. atomic_set(&adapter->irq_sem, 1);
  974. spin_lock_init(&adapter->stats_lock);
  975. return 0;
  976. }
  977. /**
  978. * e1000_alloc_queues - Allocate memory for all rings
  979. * @adapter: board private structure to initialize
  980. *
  981. * We allocate one ring per queue at run-time since we don't know the
  982. * number of queues at compile-time. The polling_netdev array is
  983. * intended for Multiqueue, but should work fine with a single queue.
  984. **/
  985. static int __devinit
  986. e1000_alloc_queues(struct e1000_adapter *adapter)
  987. {
  988. int size;
  989. size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  990. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  991. if (!adapter->tx_ring)
  992. return -ENOMEM;
  993. memset(adapter->tx_ring, 0, size);
  994. size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  995. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  996. if (!adapter->rx_ring) {
  997. kfree(adapter->tx_ring);
  998. return -ENOMEM;
  999. }
  1000. memset(adapter->rx_ring, 0, size);
  1001. #ifdef CONFIG_E1000_NAPI
  1002. size = sizeof(struct net_device) * adapter->num_rx_queues;
  1003. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  1004. if (!adapter->polling_netdev) {
  1005. kfree(adapter->tx_ring);
  1006. kfree(adapter->rx_ring);
  1007. return -ENOMEM;
  1008. }
  1009. memset(adapter->polling_netdev, 0, size);
  1010. #endif
  1011. return E1000_SUCCESS;
  1012. }
  1013. /**
  1014. * e1000_open - Called when a network interface is made active
  1015. * @netdev: network interface device structure
  1016. *
  1017. * Returns 0 on success, negative value on failure
  1018. *
  1019. * The open entry point is called when a network interface is made
  1020. * active by the system (IFF_UP). At this point all resources needed
  1021. * for transmit and receive operations are allocated, the interrupt
  1022. * handler is registered with the OS, the watchdog timer is started,
  1023. * and the stack is notified that the interface is ready.
  1024. **/
  1025. static int
  1026. e1000_open(struct net_device *netdev)
  1027. {
  1028. struct e1000_adapter *adapter = netdev_priv(netdev);
  1029. int err;
  1030. /* disallow open during test */
  1031. if (test_bit(__E1000_DRIVER_TESTING, &adapter->flags))
  1032. return -EBUSY;
  1033. /* allocate transmit descriptors */
  1034. if ((err = e1000_setup_all_tx_resources(adapter)))
  1035. goto err_setup_tx;
  1036. /* allocate receive descriptors */
  1037. if ((err = e1000_setup_all_rx_resources(adapter)))
  1038. goto err_setup_rx;
  1039. err = e1000_request_irq(adapter);
  1040. if (err)
  1041. goto err_req_irq;
  1042. e1000_power_up_phy(adapter);
  1043. if ((err = e1000_up(adapter)))
  1044. goto err_up;
  1045. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  1046. if ((adapter->hw.mng_cookie.status &
  1047. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1048. e1000_update_mng_vlan(adapter);
  1049. }
  1050. /* If AMT is enabled, let the firmware know that the network
  1051. * interface is now open */
  1052. if (adapter->hw.mac_type == e1000_82573 &&
  1053. e1000_check_mng_mode(&adapter->hw))
  1054. e1000_get_hw_control(adapter);
  1055. return E1000_SUCCESS;
  1056. err_up:
  1057. e1000_power_down_phy(adapter);
  1058. e1000_free_irq(adapter);
  1059. err_req_irq:
  1060. e1000_free_all_rx_resources(adapter);
  1061. err_setup_rx:
  1062. e1000_free_all_tx_resources(adapter);
  1063. err_setup_tx:
  1064. e1000_reset(adapter);
  1065. return err;
  1066. }
  1067. /**
  1068. * e1000_close - Disables a network interface
  1069. * @netdev: network interface device structure
  1070. *
  1071. * Returns 0, this is not allowed to fail
  1072. *
  1073. * The close entry point is called when an interface is de-activated
  1074. * by the OS. The hardware is still under the drivers control, but
  1075. * needs to be disabled. A global MAC reset is issued to stop the
  1076. * hardware, and all transmit and receive resources are freed.
  1077. **/
  1078. static int
  1079. e1000_close(struct net_device *netdev)
  1080. {
  1081. struct e1000_adapter *adapter = netdev_priv(netdev);
  1082. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  1083. e1000_down(adapter);
  1084. e1000_power_down_phy(adapter);
  1085. e1000_free_irq(adapter);
  1086. e1000_free_all_tx_resources(adapter);
  1087. e1000_free_all_rx_resources(adapter);
  1088. if ((adapter->hw.mng_cookie.status &
  1089. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1090. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  1091. }
  1092. /* If AMT is enabled, let the firmware know that the network
  1093. * interface is now closed */
  1094. if (adapter->hw.mac_type == e1000_82573 &&
  1095. e1000_check_mng_mode(&adapter->hw))
  1096. e1000_release_hw_control(adapter);
  1097. return 0;
  1098. }
  1099. /**
  1100. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1101. * @adapter: address of board private structure
  1102. * @start: address of beginning of memory
  1103. * @len: length of memory
  1104. **/
  1105. static boolean_t
  1106. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1107. void *start, unsigned long len)
  1108. {
  1109. unsigned long begin = (unsigned long) start;
  1110. unsigned long end = begin + len;
  1111. /* First rev 82545 and 82546 need to not allow any memory
  1112. * write location to cross 64k boundary due to errata 23 */
  1113. if (adapter->hw.mac_type == e1000_82545 ||
  1114. adapter->hw.mac_type == e1000_82546) {
  1115. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  1116. }
  1117. return TRUE;
  1118. }
  1119. /**
  1120. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1121. * @adapter: board private structure
  1122. * @txdr: tx descriptor ring (for a specific queue) to setup
  1123. *
  1124. * Return 0 on success, negative on failure
  1125. **/
  1126. static int
  1127. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1128. struct e1000_tx_ring *txdr)
  1129. {
  1130. struct pci_dev *pdev = adapter->pdev;
  1131. int size;
  1132. size = sizeof(struct e1000_buffer) * txdr->count;
  1133. txdr->buffer_info = vmalloc(size);
  1134. if (!txdr->buffer_info) {
  1135. DPRINTK(PROBE, ERR,
  1136. "Unable to allocate memory for the transmit descriptor ring\n");
  1137. return -ENOMEM;
  1138. }
  1139. memset(txdr->buffer_info, 0, size);
  1140. /* round up to nearest 4K */
  1141. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1142. E1000_ROUNDUP(txdr->size, 4096);
  1143. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1144. if (!txdr->desc) {
  1145. setup_tx_desc_die:
  1146. vfree(txdr->buffer_info);
  1147. DPRINTK(PROBE, ERR,
  1148. "Unable to allocate memory for the transmit descriptor ring\n");
  1149. return -ENOMEM;
  1150. }
  1151. /* Fix for errata 23, can't cross 64kB boundary */
  1152. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1153. void *olddesc = txdr->desc;
  1154. dma_addr_t olddma = txdr->dma;
  1155. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1156. "at %p\n", txdr->size, txdr->desc);
  1157. /* Try again, without freeing the previous */
  1158. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1159. /* Failed allocation, critical failure */
  1160. if (!txdr->desc) {
  1161. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1162. goto setup_tx_desc_die;
  1163. }
  1164. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1165. /* give up */
  1166. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1167. txdr->dma);
  1168. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1169. DPRINTK(PROBE, ERR,
  1170. "Unable to allocate aligned memory "
  1171. "for the transmit descriptor ring\n");
  1172. vfree(txdr->buffer_info);
  1173. return -ENOMEM;
  1174. } else {
  1175. /* Free old allocation, new allocation was successful */
  1176. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1177. }
  1178. }
  1179. memset(txdr->desc, 0, txdr->size);
  1180. txdr->next_to_use = 0;
  1181. txdr->next_to_clean = 0;
  1182. spin_lock_init(&txdr->tx_lock);
  1183. return 0;
  1184. }
  1185. /**
  1186. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1187. * (Descriptors) for all queues
  1188. * @adapter: board private structure
  1189. *
  1190. * Return 0 on success, negative on failure
  1191. **/
  1192. int
  1193. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1194. {
  1195. int i, err = 0;
  1196. for (i = 0; i < adapter->num_tx_queues; i++) {
  1197. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1198. if (err) {
  1199. DPRINTK(PROBE, ERR,
  1200. "Allocation for Tx Queue %u failed\n", i);
  1201. for (i-- ; i >= 0; i--)
  1202. e1000_free_tx_resources(adapter,
  1203. &adapter->tx_ring[i]);
  1204. break;
  1205. }
  1206. }
  1207. return err;
  1208. }
  1209. /**
  1210. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1211. * @adapter: board private structure
  1212. *
  1213. * Configure the Tx unit of the MAC after a reset.
  1214. **/
  1215. static void
  1216. e1000_configure_tx(struct e1000_adapter *adapter)
  1217. {
  1218. uint64_t tdba;
  1219. struct e1000_hw *hw = &adapter->hw;
  1220. uint32_t tdlen, tctl, tipg, tarc;
  1221. uint32_t ipgr1, ipgr2;
  1222. /* Setup the HW Tx Head and Tail descriptor pointers */
  1223. switch (adapter->num_tx_queues) {
  1224. case 1:
  1225. default:
  1226. tdba = adapter->tx_ring[0].dma;
  1227. tdlen = adapter->tx_ring[0].count *
  1228. sizeof(struct e1000_tx_desc);
  1229. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1230. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1231. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1232. E1000_WRITE_REG(hw, TDT, 0);
  1233. E1000_WRITE_REG(hw, TDH, 0);
  1234. adapter->tx_ring[0].tdh = E1000_TDH;
  1235. adapter->tx_ring[0].tdt = E1000_TDT;
  1236. break;
  1237. }
  1238. /* Set the default values for the Tx Inter Packet Gap timer */
  1239. if (hw->media_type == e1000_media_type_fiber ||
  1240. hw->media_type == e1000_media_type_internal_serdes)
  1241. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1242. else
  1243. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1244. switch (hw->mac_type) {
  1245. case e1000_82542_rev2_0:
  1246. case e1000_82542_rev2_1:
  1247. tipg = DEFAULT_82542_TIPG_IPGT;
  1248. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1249. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1250. break;
  1251. case e1000_80003es2lan:
  1252. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1253. ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
  1254. break;
  1255. default:
  1256. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1257. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1258. break;
  1259. }
  1260. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1261. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1262. E1000_WRITE_REG(hw, TIPG, tipg);
  1263. /* Set the Tx Interrupt Delay register */
  1264. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1265. if (hw->mac_type >= e1000_82540)
  1266. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1267. /* Program the Transmit Control Register */
  1268. tctl = E1000_READ_REG(hw, TCTL);
  1269. tctl &= ~E1000_TCTL_CT;
  1270. tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1271. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1272. #ifdef DISABLE_MULR
  1273. /* disable Multiple Reads for debugging */
  1274. tctl &= ~E1000_TCTL_MULR;
  1275. #endif
  1276. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1277. tarc = E1000_READ_REG(hw, TARC0);
  1278. tarc |= ((1 << 25) | (1 << 21));
  1279. E1000_WRITE_REG(hw, TARC0, tarc);
  1280. tarc = E1000_READ_REG(hw, TARC1);
  1281. tarc |= (1 << 25);
  1282. if (tctl & E1000_TCTL_MULR)
  1283. tarc &= ~(1 << 28);
  1284. else
  1285. tarc |= (1 << 28);
  1286. E1000_WRITE_REG(hw, TARC1, tarc);
  1287. } else if (hw->mac_type == e1000_80003es2lan) {
  1288. tarc = E1000_READ_REG(hw, TARC0);
  1289. tarc |= 1;
  1290. E1000_WRITE_REG(hw, TARC0, tarc);
  1291. tarc = E1000_READ_REG(hw, TARC1);
  1292. tarc |= 1;
  1293. E1000_WRITE_REG(hw, TARC1, tarc);
  1294. }
  1295. e1000_config_collision_dist(hw);
  1296. /* Setup Transmit Descriptor Settings for eop descriptor */
  1297. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1298. E1000_TXD_CMD_IFCS;
  1299. if (hw->mac_type < e1000_82543)
  1300. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1301. else
  1302. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1303. /* Cache if we're 82544 running in PCI-X because we'll
  1304. * need this to apply a workaround later in the send path. */
  1305. if (hw->mac_type == e1000_82544 &&
  1306. hw->bus_type == e1000_bus_type_pcix)
  1307. adapter->pcix_82544 = 1;
  1308. E1000_WRITE_REG(hw, TCTL, tctl);
  1309. }
  1310. /**
  1311. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1312. * @adapter: board private structure
  1313. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1314. *
  1315. * Returns 0 on success, negative on failure
  1316. **/
  1317. static int
  1318. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1319. struct e1000_rx_ring *rxdr)
  1320. {
  1321. struct pci_dev *pdev = adapter->pdev;
  1322. int size, desc_len;
  1323. size = sizeof(struct e1000_buffer) * rxdr->count;
  1324. rxdr->buffer_info = vmalloc(size);
  1325. if (!rxdr->buffer_info) {
  1326. DPRINTK(PROBE, ERR,
  1327. "Unable to allocate memory for the receive descriptor ring\n");
  1328. return -ENOMEM;
  1329. }
  1330. memset(rxdr->buffer_info, 0, size);
  1331. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1332. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1333. if (!rxdr->ps_page) {
  1334. vfree(rxdr->buffer_info);
  1335. DPRINTK(PROBE, ERR,
  1336. "Unable to allocate memory for the receive descriptor ring\n");
  1337. return -ENOMEM;
  1338. }
  1339. memset(rxdr->ps_page, 0, size);
  1340. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1341. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1342. if (!rxdr->ps_page_dma) {
  1343. vfree(rxdr->buffer_info);
  1344. kfree(rxdr->ps_page);
  1345. DPRINTK(PROBE, ERR,
  1346. "Unable to allocate memory for the receive descriptor ring\n");
  1347. return -ENOMEM;
  1348. }
  1349. memset(rxdr->ps_page_dma, 0, size);
  1350. if (adapter->hw.mac_type <= e1000_82547_rev_2)
  1351. desc_len = sizeof(struct e1000_rx_desc);
  1352. else
  1353. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1354. /* Round up to nearest 4K */
  1355. rxdr->size = rxdr->count * desc_len;
  1356. E1000_ROUNDUP(rxdr->size, 4096);
  1357. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1358. if (!rxdr->desc) {
  1359. DPRINTK(PROBE, ERR,
  1360. "Unable to allocate memory for the receive descriptor ring\n");
  1361. setup_rx_desc_die:
  1362. vfree(rxdr->buffer_info);
  1363. kfree(rxdr->ps_page);
  1364. kfree(rxdr->ps_page_dma);
  1365. return -ENOMEM;
  1366. }
  1367. /* Fix for errata 23, can't cross 64kB boundary */
  1368. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1369. void *olddesc = rxdr->desc;
  1370. dma_addr_t olddma = rxdr->dma;
  1371. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1372. "at %p\n", rxdr->size, rxdr->desc);
  1373. /* Try again, without freeing the previous */
  1374. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1375. /* Failed allocation, critical failure */
  1376. if (!rxdr->desc) {
  1377. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1378. DPRINTK(PROBE, ERR,
  1379. "Unable to allocate memory "
  1380. "for the receive descriptor ring\n");
  1381. goto setup_rx_desc_die;
  1382. }
  1383. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1384. /* give up */
  1385. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1386. rxdr->dma);
  1387. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1388. DPRINTK(PROBE, ERR,
  1389. "Unable to allocate aligned memory "
  1390. "for the receive descriptor ring\n");
  1391. goto setup_rx_desc_die;
  1392. } else {
  1393. /* Free old allocation, new allocation was successful */
  1394. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1395. }
  1396. }
  1397. memset(rxdr->desc, 0, rxdr->size);
  1398. rxdr->next_to_clean = 0;
  1399. rxdr->next_to_use = 0;
  1400. return 0;
  1401. }
  1402. /**
  1403. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1404. * (Descriptors) for all queues
  1405. * @adapter: board private structure
  1406. *
  1407. * Return 0 on success, negative on failure
  1408. **/
  1409. int
  1410. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1411. {
  1412. int i, err = 0;
  1413. for (i = 0; i < adapter->num_rx_queues; i++) {
  1414. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1415. if (err) {
  1416. DPRINTK(PROBE, ERR,
  1417. "Allocation for Rx Queue %u failed\n", i);
  1418. for (i-- ; i >= 0; i--)
  1419. e1000_free_rx_resources(adapter,
  1420. &adapter->rx_ring[i]);
  1421. break;
  1422. }
  1423. }
  1424. return err;
  1425. }
  1426. /**
  1427. * e1000_setup_rctl - configure the receive control registers
  1428. * @adapter: Board private structure
  1429. **/
  1430. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1431. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1432. static void
  1433. e1000_setup_rctl(struct e1000_adapter *adapter)
  1434. {
  1435. uint32_t rctl, rfctl;
  1436. uint32_t psrctl = 0;
  1437. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1438. uint32_t pages = 0;
  1439. #endif
  1440. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1441. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1442. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1443. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1444. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1445. if (adapter->hw.tbi_compatibility_on == 1)
  1446. rctl |= E1000_RCTL_SBP;
  1447. else
  1448. rctl &= ~E1000_RCTL_SBP;
  1449. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1450. rctl &= ~E1000_RCTL_LPE;
  1451. else
  1452. rctl |= E1000_RCTL_LPE;
  1453. /* Setup buffer sizes */
  1454. rctl &= ~E1000_RCTL_SZ_4096;
  1455. rctl |= E1000_RCTL_BSEX;
  1456. switch (adapter->rx_buffer_len) {
  1457. case E1000_RXBUFFER_256:
  1458. rctl |= E1000_RCTL_SZ_256;
  1459. rctl &= ~E1000_RCTL_BSEX;
  1460. break;
  1461. case E1000_RXBUFFER_512:
  1462. rctl |= E1000_RCTL_SZ_512;
  1463. rctl &= ~E1000_RCTL_BSEX;
  1464. break;
  1465. case E1000_RXBUFFER_1024:
  1466. rctl |= E1000_RCTL_SZ_1024;
  1467. rctl &= ~E1000_RCTL_BSEX;
  1468. break;
  1469. case E1000_RXBUFFER_2048:
  1470. default:
  1471. rctl |= E1000_RCTL_SZ_2048;
  1472. rctl &= ~E1000_RCTL_BSEX;
  1473. break;
  1474. case E1000_RXBUFFER_4096:
  1475. rctl |= E1000_RCTL_SZ_4096;
  1476. break;
  1477. case E1000_RXBUFFER_8192:
  1478. rctl |= E1000_RCTL_SZ_8192;
  1479. break;
  1480. case E1000_RXBUFFER_16384:
  1481. rctl |= E1000_RCTL_SZ_16384;
  1482. break;
  1483. }
  1484. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1485. /* 82571 and greater support packet-split where the protocol
  1486. * header is placed in skb->data and the packet data is
  1487. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1488. * In the case of a non-split, skb->data is linearly filled,
  1489. * followed by the page buffers. Therefore, skb->data is
  1490. * sized to hold the largest protocol header.
  1491. */
  1492. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1493. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1494. PAGE_SIZE <= 16384)
  1495. adapter->rx_ps_pages = pages;
  1496. else
  1497. adapter->rx_ps_pages = 0;
  1498. #endif
  1499. if (adapter->rx_ps_pages) {
  1500. /* Configure extra packet-split registers */
  1501. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1502. rfctl |= E1000_RFCTL_EXTEN;
  1503. /* disable IPv6 packet split support */
  1504. rfctl |= E1000_RFCTL_IPV6_DIS;
  1505. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1506. rctl |= E1000_RCTL_DTYP_PS;
  1507. psrctl |= adapter->rx_ps_bsize0 >>
  1508. E1000_PSRCTL_BSIZE0_SHIFT;
  1509. switch (adapter->rx_ps_pages) {
  1510. case 3:
  1511. psrctl |= PAGE_SIZE <<
  1512. E1000_PSRCTL_BSIZE3_SHIFT;
  1513. case 2:
  1514. psrctl |= PAGE_SIZE <<
  1515. E1000_PSRCTL_BSIZE2_SHIFT;
  1516. case 1:
  1517. psrctl |= PAGE_SIZE >>
  1518. E1000_PSRCTL_BSIZE1_SHIFT;
  1519. break;
  1520. }
  1521. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1522. }
  1523. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1524. }
  1525. /**
  1526. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1527. * @adapter: board private structure
  1528. *
  1529. * Configure the Rx unit of the MAC after a reset.
  1530. **/
  1531. static void
  1532. e1000_configure_rx(struct e1000_adapter *adapter)
  1533. {
  1534. uint64_t rdba;
  1535. struct e1000_hw *hw = &adapter->hw;
  1536. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1537. if (adapter->rx_ps_pages) {
  1538. /* this is a 32 byte descriptor */
  1539. rdlen = adapter->rx_ring[0].count *
  1540. sizeof(union e1000_rx_desc_packet_split);
  1541. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1542. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1543. } else {
  1544. rdlen = adapter->rx_ring[0].count *
  1545. sizeof(struct e1000_rx_desc);
  1546. adapter->clean_rx = e1000_clean_rx_irq;
  1547. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1548. }
  1549. /* disable receives while setting up the descriptors */
  1550. rctl = E1000_READ_REG(hw, RCTL);
  1551. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1552. /* set the Receive Delay Timer Register */
  1553. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1554. if (hw->mac_type >= e1000_82540) {
  1555. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1556. if (adapter->itr > 1)
  1557. E1000_WRITE_REG(hw, ITR,
  1558. 1000000000 / (adapter->itr * 256));
  1559. }
  1560. if (hw->mac_type >= e1000_82571) {
  1561. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1562. /* Reset delay timers after every interrupt */
  1563. ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
  1564. #ifdef CONFIG_E1000_NAPI
  1565. /* Auto-Mask interrupts upon ICR read. */
  1566. ctrl_ext |= E1000_CTRL_EXT_IAME;
  1567. #endif
  1568. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1569. E1000_WRITE_REG(hw, IAM, ~0);
  1570. E1000_WRITE_FLUSH(hw);
  1571. }
  1572. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1573. * the Base and Length of the Rx Descriptor Ring */
  1574. switch (adapter->num_rx_queues) {
  1575. case 1:
  1576. default:
  1577. rdba = adapter->rx_ring[0].dma;
  1578. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1579. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1580. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1581. E1000_WRITE_REG(hw, RDT, 0);
  1582. E1000_WRITE_REG(hw, RDH, 0);
  1583. adapter->rx_ring[0].rdh = E1000_RDH;
  1584. adapter->rx_ring[0].rdt = E1000_RDT;
  1585. break;
  1586. }
  1587. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1588. if (hw->mac_type >= e1000_82543) {
  1589. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1590. if (adapter->rx_csum == TRUE) {
  1591. rxcsum |= E1000_RXCSUM_TUOFL;
  1592. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1593. * Must be used in conjunction with packet-split. */
  1594. if ((hw->mac_type >= e1000_82571) &&
  1595. (adapter->rx_ps_pages)) {
  1596. rxcsum |= E1000_RXCSUM_IPPCSE;
  1597. }
  1598. } else {
  1599. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1600. /* don't need to clear IPPCSE as it defaults to 0 */
  1601. }
  1602. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1603. }
  1604. /* Enable Receives */
  1605. E1000_WRITE_REG(hw, RCTL, rctl);
  1606. }
  1607. /**
  1608. * e1000_free_tx_resources - Free Tx Resources per Queue
  1609. * @adapter: board private structure
  1610. * @tx_ring: Tx descriptor ring for a specific queue
  1611. *
  1612. * Free all transmit software resources
  1613. **/
  1614. static void
  1615. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1616. struct e1000_tx_ring *tx_ring)
  1617. {
  1618. struct pci_dev *pdev = adapter->pdev;
  1619. e1000_clean_tx_ring(adapter, tx_ring);
  1620. vfree(tx_ring->buffer_info);
  1621. tx_ring->buffer_info = NULL;
  1622. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1623. tx_ring->desc = NULL;
  1624. }
  1625. /**
  1626. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1627. * @adapter: board private structure
  1628. *
  1629. * Free all transmit software resources
  1630. **/
  1631. void
  1632. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1633. {
  1634. int i;
  1635. for (i = 0; i < adapter->num_tx_queues; i++)
  1636. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1637. }
  1638. static void
  1639. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1640. struct e1000_buffer *buffer_info)
  1641. {
  1642. if (buffer_info->dma) {
  1643. pci_unmap_page(adapter->pdev,
  1644. buffer_info->dma,
  1645. buffer_info->length,
  1646. PCI_DMA_TODEVICE);
  1647. }
  1648. if (buffer_info->skb)
  1649. dev_kfree_skb_any(buffer_info->skb);
  1650. memset(buffer_info, 0, sizeof(struct e1000_buffer));
  1651. }
  1652. /**
  1653. * e1000_clean_tx_ring - Free Tx Buffers
  1654. * @adapter: board private structure
  1655. * @tx_ring: ring to be cleaned
  1656. **/
  1657. static void
  1658. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1659. struct e1000_tx_ring *tx_ring)
  1660. {
  1661. struct e1000_buffer *buffer_info;
  1662. unsigned long size;
  1663. unsigned int i;
  1664. /* Free all the Tx ring sk_buffs */
  1665. for (i = 0; i < tx_ring->count; i++) {
  1666. buffer_info = &tx_ring->buffer_info[i];
  1667. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1668. }
  1669. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1670. memset(tx_ring->buffer_info, 0, size);
  1671. /* Zero out the descriptor ring */
  1672. memset(tx_ring->desc, 0, tx_ring->size);
  1673. tx_ring->next_to_use = 0;
  1674. tx_ring->next_to_clean = 0;
  1675. tx_ring->last_tx_tso = 0;
  1676. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1677. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1678. }
  1679. /**
  1680. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1681. * @adapter: board private structure
  1682. **/
  1683. static void
  1684. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1685. {
  1686. int i;
  1687. for (i = 0; i < adapter->num_tx_queues; i++)
  1688. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1689. }
  1690. /**
  1691. * e1000_free_rx_resources - Free Rx Resources
  1692. * @adapter: board private structure
  1693. * @rx_ring: ring to clean the resources from
  1694. *
  1695. * Free all receive software resources
  1696. **/
  1697. static void
  1698. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1699. struct e1000_rx_ring *rx_ring)
  1700. {
  1701. struct pci_dev *pdev = adapter->pdev;
  1702. e1000_clean_rx_ring(adapter, rx_ring);
  1703. vfree(rx_ring->buffer_info);
  1704. rx_ring->buffer_info = NULL;
  1705. kfree(rx_ring->ps_page);
  1706. rx_ring->ps_page = NULL;
  1707. kfree(rx_ring->ps_page_dma);
  1708. rx_ring->ps_page_dma = NULL;
  1709. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1710. rx_ring->desc = NULL;
  1711. }
  1712. /**
  1713. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1714. * @adapter: board private structure
  1715. *
  1716. * Free all receive software resources
  1717. **/
  1718. void
  1719. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1720. {
  1721. int i;
  1722. for (i = 0; i < adapter->num_rx_queues; i++)
  1723. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1724. }
  1725. /**
  1726. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1727. * @adapter: board private structure
  1728. * @rx_ring: ring to free buffers from
  1729. **/
  1730. static void
  1731. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1732. struct e1000_rx_ring *rx_ring)
  1733. {
  1734. struct e1000_buffer *buffer_info;
  1735. struct e1000_ps_page *ps_page;
  1736. struct e1000_ps_page_dma *ps_page_dma;
  1737. struct pci_dev *pdev = adapter->pdev;
  1738. unsigned long size;
  1739. unsigned int i, j;
  1740. /* Free all the Rx ring sk_buffs */
  1741. for (i = 0; i < rx_ring->count; i++) {
  1742. buffer_info = &rx_ring->buffer_info[i];
  1743. if (buffer_info->skb) {
  1744. pci_unmap_single(pdev,
  1745. buffer_info->dma,
  1746. buffer_info->length,
  1747. PCI_DMA_FROMDEVICE);
  1748. dev_kfree_skb(buffer_info->skb);
  1749. buffer_info->skb = NULL;
  1750. }
  1751. ps_page = &rx_ring->ps_page[i];
  1752. ps_page_dma = &rx_ring->ps_page_dma[i];
  1753. for (j = 0; j < adapter->rx_ps_pages; j++) {
  1754. if (!ps_page->ps_page[j]) break;
  1755. pci_unmap_page(pdev,
  1756. ps_page_dma->ps_page_dma[j],
  1757. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1758. ps_page_dma->ps_page_dma[j] = 0;
  1759. put_page(ps_page->ps_page[j]);
  1760. ps_page->ps_page[j] = NULL;
  1761. }
  1762. }
  1763. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1764. memset(rx_ring->buffer_info, 0, size);
  1765. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1766. memset(rx_ring->ps_page, 0, size);
  1767. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1768. memset(rx_ring->ps_page_dma, 0, size);
  1769. /* Zero out the descriptor ring */
  1770. memset(rx_ring->desc, 0, rx_ring->size);
  1771. rx_ring->next_to_clean = 0;
  1772. rx_ring->next_to_use = 0;
  1773. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1774. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1775. }
  1776. /**
  1777. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1778. * @adapter: board private structure
  1779. **/
  1780. static void
  1781. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1782. {
  1783. int i;
  1784. for (i = 0; i < adapter->num_rx_queues; i++)
  1785. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1786. }
  1787. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1788. * and memory write and invalidate disabled for certain operations
  1789. */
  1790. static void
  1791. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1792. {
  1793. struct net_device *netdev = adapter->netdev;
  1794. uint32_t rctl;
  1795. e1000_pci_clear_mwi(&adapter->hw);
  1796. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1797. rctl |= E1000_RCTL_RST;
  1798. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1799. E1000_WRITE_FLUSH(&adapter->hw);
  1800. mdelay(5);
  1801. if (netif_running(netdev))
  1802. e1000_clean_all_rx_rings(adapter);
  1803. }
  1804. static void
  1805. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1806. {
  1807. struct net_device *netdev = adapter->netdev;
  1808. uint32_t rctl;
  1809. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1810. rctl &= ~E1000_RCTL_RST;
  1811. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1812. E1000_WRITE_FLUSH(&adapter->hw);
  1813. mdelay(5);
  1814. if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1815. e1000_pci_set_mwi(&adapter->hw);
  1816. if (netif_running(netdev)) {
  1817. /* No need to loop, because 82542 supports only 1 queue */
  1818. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1819. e1000_configure_rx(adapter);
  1820. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1821. }
  1822. }
  1823. /**
  1824. * e1000_set_mac - Change the Ethernet Address of the NIC
  1825. * @netdev: network interface device structure
  1826. * @p: pointer to an address structure
  1827. *
  1828. * Returns 0 on success, negative on failure
  1829. **/
  1830. static int
  1831. e1000_set_mac(struct net_device *netdev, void *p)
  1832. {
  1833. struct e1000_adapter *adapter = netdev_priv(netdev);
  1834. struct sockaddr *addr = p;
  1835. if (!is_valid_ether_addr(addr->sa_data))
  1836. return -EADDRNOTAVAIL;
  1837. /* 82542 2.0 needs to be in reset to write receive address registers */
  1838. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1839. e1000_enter_82542_rst(adapter);
  1840. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1841. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1842. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1843. /* With 82571 controllers, LAA may be overwritten (with the default)
  1844. * due to controller reset from the other port. */
  1845. if (adapter->hw.mac_type == e1000_82571) {
  1846. /* activate the work around */
  1847. adapter->hw.laa_is_present = 1;
  1848. /* Hold a copy of the LAA in RAR[14] This is done so that
  1849. * between the time RAR[0] gets clobbered and the time it
  1850. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1851. * of the RARs and no incoming packets directed to this port
  1852. * are dropped. Eventaully the LAA will be in RAR[0] and
  1853. * RAR[14] */
  1854. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1855. E1000_RAR_ENTRIES - 1);
  1856. }
  1857. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1858. e1000_leave_82542_rst(adapter);
  1859. return 0;
  1860. }
  1861. /**
  1862. * e1000_set_multi - Multicast and Promiscuous mode set
  1863. * @netdev: network interface device structure
  1864. *
  1865. * The set_multi entry point is called whenever the multicast address
  1866. * list or the network interface flags are updated. This routine is
  1867. * responsible for configuring the hardware for proper multicast,
  1868. * promiscuous mode, and all-multi behavior.
  1869. **/
  1870. static void
  1871. e1000_set_multi(struct net_device *netdev)
  1872. {
  1873. struct e1000_adapter *adapter = netdev_priv(netdev);
  1874. struct e1000_hw *hw = &adapter->hw;
  1875. struct dev_mc_list *mc_ptr;
  1876. uint32_t rctl;
  1877. uint32_t hash_value;
  1878. int i, rar_entries = E1000_RAR_ENTRIES;
  1879. int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
  1880. E1000_NUM_MTA_REGISTERS_ICH8LAN :
  1881. E1000_NUM_MTA_REGISTERS;
  1882. if (adapter->hw.mac_type == e1000_ich8lan)
  1883. rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
  1884. /* reserve RAR[14] for LAA over-write work-around */
  1885. if (adapter->hw.mac_type == e1000_82571)
  1886. rar_entries--;
  1887. /* Check for Promiscuous and All Multicast modes */
  1888. rctl = E1000_READ_REG(hw, RCTL);
  1889. if (netdev->flags & IFF_PROMISC) {
  1890. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1891. } else if (netdev->flags & IFF_ALLMULTI) {
  1892. rctl |= E1000_RCTL_MPE;
  1893. rctl &= ~E1000_RCTL_UPE;
  1894. } else {
  1895. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1896. }
  1897. E1000_WRITE_REG(hw, RCTL, rctl);
  1898. /* 82542 2.0 needs to be in reset to write receive address registers */
  1899. if (hw->mac_type == e1000_82542_rev2_0)
  1900. e1000_enter_82542_rst(adapter);
  1901. /* load the first 14 multicast address into the exact filters 1-14
  1902. * RAR 0 is used for the station MAC adddress
  1903. * if there are not 14 addresses, go ahead and clear the filters
  1904. * -- with 82571 controllers only 0-13 entries are filled here
  1905. */
  1906. mc_ptr = netdev->mc_list;
  1907. for (i = 1; i < rar_entries; i++) {
  1908. if (mc_ptr) {
  1909. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1910. mc_ptr = mc_ptr->next;
  1911. } else {
  1912. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1913. E1000_WRITE_FLUSH(hw);
  1914. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1915. E1000_WRITE_FLUSH(hw);
  1916. }
  1917. }
  1918. /* clear the old settings from the multicast hash table */
  1919. for (i = 0; i < mta_reg_count; i++) {
  1920. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1921. E1000_WRITE_FLUSH(hw);
  1922. }
  1923. /* load any remaining addresses into the hash table */
  1924. for (; mc_ptr; mc_ptr = mc_ptr->next) {
  1925. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1926. e1000_mta_set(hw, hash_value);
  1927. }
  1928. if (hw->mac_type == e1000_82542_rev2_0)
  1929. e1000_leave_82542_rst(adapter);
  1930. }
  1931. /* Need to wait a few seconds after link up to get diagnostic information from
  1932. * the phy */
  1933. static void
  1934. e1000_update_phy_info(unsigned long data)
  1935. {
  1936. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1937. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1938. }
  1939. /**
  1940. * e1000_82547_tx_fifo_stall - Timer Call-back
  1941. * @data: pointer to adapter cast into an unsigned long
  1942. **/
  1943. static void
  1944. e1000_82547_tx_fifo_stall(unsigned long data)
  1945. {
  1946. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1947. struct net_device *netdev = adapter->netdev;
  1948. uint32_t tctl;
  1949. if (atomic_read(&adapter->tx_fifo_stall)) {
  1950. if ((E1000_READ_REG(&adapter->hw, TDT) ==
  1951. E1000_READ_REG(&adapter->hw, TDH)) &&
  1952. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1953. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1954. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1955. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1956. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1957. E1000_WRITE_REG(&adapter->hw, TCTL,
  1958. tctl & ~E1000_TCTL_EN);
  1959. E1000_WRITE_REG(&adapter->hw, TDFT,
  1960. adapter->tx_head_addr);
  1961. E1000_WRITE_REG(&adapter->hw, TDFH,
  1962. adapter->tx_head_addr);
  1963. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1964. adapter->tx_head_addr);
  1965. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1966. adapter->tx_head_addr);
  1967. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1968. E1000_WRITE_FLUSH(&adapter->hw);
  1969. adapter->tx_fifo_head = 0;
  1970. atomic_set(&adapter->tx_fifo_stall, 0);
  1971. netif_wake_queue(netdev);
  1972. } else {
  1973. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  1974. }
  1975. }
  1976. }
  1977. /**
  1978. * e1000_watchdog - Timer Call-back
  1979. * @data: pointer to adapter cast into an unsigned long
  1980. **/
  1981. static void
  1982. e1000_watchdog(unsigned long data)
  1983. {
  1984. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1985. struct net_device *netdev = adapter->netdev;
  1986. struct e1000_tx_ring *txdr = adapter->tx_ring;
  1987. uint32_t link, tctl;
  1988. int32_t ret_val;
  1989. ret_val = e1000_check_for_link(&adapter->hw);
  1990. if ((ret_val == E1000_ERR_PHY) &&
  1991. (adapter->hw.phy_type == e1000_phy_igp_3) &&
  1992. (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
  1993. /* See e1000_kumeran_lock_loss_workaround() */
  1994. DPRINTK(LINK, INFO,
  1995. "Gigabit has been disabled, downgrading speed\n");
  1996. }
  1997. if (adapter->hw.mac_type == e1000_82573) {
  1998. e1000_enable_tx_pkt_filtering(&adapter->hw);
  1999. if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  2000. e1000_update_mng_vlan(adapter);
  2001. }
  2002. if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  2003. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  2004. link = !adapter->hw.serdes_link_down;
  2005. else
  2006. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  2007. if (link) {
  2008. if (!netif_carrier_ok(netdev)) {
  2009. boolean_t txb2b = 1;
  2010. e1000_get_speed_and_duplex(&adapter->hw,
  2011. &adapter->link_speed,
  2012. &adapter->link_duplex);
  2013. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  2014. adapter->link_speed,
  2015. adapter->link_duplex == FULL_DUPLEX ?
  2016. "Full Duplex" : "Half Duplex");
  2017. /* tweak tx_queue_len according to speed/duplex
  2018. * and adjust the timeout factor */
  2019. netdev->tx_queue_len = adapter->tx_queue_len;
  2020. adapter->tx_timeout_factor = 1;
  2021. switch (adapter->link_speed) {
  2022. case SPEED_10:
  2023. txb2b = 0;
  2024. netdev->tx_queue_len = 10;
  2025. adapter->tx_timeout_factor = 8;
  2026. break;
  2027. case SPEED_100:
  2028. txb2b = 0;
  2029. netdev->tx_queue_len = 100;
  2030. /* maybe add some timeout factor ? */
  2031. break;
  2032. }
  2033. if ((adapter->hw.mac_type == e1000_82571 ||
  2034. adapter->hw.mac_type == e1000_82572) &&
  2035. txb2b == 0) {
  2036. #define SPEED_MODE_BIT (1 << 21)
  2037. uint32_t tarc0;
  2038. tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
  2039. tarc0 &= ~SPEED_MODE_BIT;
  2040. E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
  2041. }
  2042. #ifdef NETIF_F_TSO
  2043. /* disable TSO for pcie and 10/100 speeds, to avoid
  2044. * some hardware issues */
  2045. if (!adapter->tso_force &&
  2046. adapter->hw.bus_type == e1000_bus_type_pci_express){
  2047. switch (adapter->link_speed) {
  2048. case SPEED_10:
  2049. case SPEED_100:
  2050. DPRINTK(PROBE,INFO,
  2051. "10/100 speed: disabling TSO\n");
  2052. netdev->features &= ~NETIF_F_TSO;
  2053. break;
  2054. case SPEED_1000:
  2055. netdev->features |= NETIF_F_TSO;
  2056. break;
  2057. default:
  2058. /* oops */
  2059. break;
  2060. }
  2061. }
  2062. #endif
  2063. /* enable transmits in the hardware, need to do this
  2064. * after setting TARC0 */
  2065. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  2066. tctl |= E1000_TCTL_EN;
  2067. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  2068. netif_carrier_on(netdev);
  2069. netif_wake_queue(netdev);
  2070. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2071. adapter->smartspeed = 0;
  2072. }
  2073. } else {
  2074. if (netif_carrier_ok(netdev)) {
  2075. adapter->link_speed = 0;
  2076. adapter->link_duplex = 0;
  2077. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  2078. netif_carrier_off(netdev);
  2079. netif_stop_queue(netdev);
  2080. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2081. /* 80003ES2LAN workaround--
  2082. * For packet buffer work-around on link down event;
  2083. * disable receives in the ISR and
  2084. * reset device here in the watchdog
  2085. */
  2086. if (adapter->hw.mac_type == e1000_80003es2lan)
  2087. /* reset device */
  2088. schedule_work(&adapter->reset_task);
  2089. }
  2090. e1000_smartspeed(adapter);
  2091. }
  2092. e1000_update_stats(adapter);
  2093. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  2094. adapter->tpt_old = adapter->stats.tpt;
  2095. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  2096. adapter->colc_old = adapter->stats.colc;
  2097. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  2098. adapter->gorcl_old = adapter->stats.gorcl;
  2099. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  2100. adapter->gotcl_old = adapter->stats.gotcl;
  2101. e1000_update_adaptive(&adapter->hw);
  2102. if (!netif_carrier_ok(netdev)) {
  2103. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  2104. /* We've lost link, so the controller stops DMA,
  2105. * but we've got queued Tx work that's never going
  2106. * to get done, so reset controller to flush Tx.
  2107. * (Do the reset outside of interrupt context). */
  2108. adapter->tx_timeout_count++;
  2109. schedule_work(&adapter->reset_task);
  2110. }
  2111. }
  2112. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  2113. if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  2114. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  2115. * asymmetrical Tx or Rx gets ITR=8000; everyone
  2116. * else is between 2000-8000. */
  2117. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  2118. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  2119. adapter->gotcl - adapter->gorcl :
  2120. adapter->gorcl - adapter->gotcl) / 10000;
  2121. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  2122. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  2123. }
  2124. /* Cause software interrupt to ensure rx ring is cleaned */
  2125. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  2126. /* Force detection of hung controller every watchdog period */
  2127. adapter->detect_tx_hung = TRUE;
  2128. /* With 82571 controllers, LAA may be overwritten due to controller
  2129. * reset from the other port. Set the appropriate LAA in RAR[0] */
  2130. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  2131. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2132. /* Reset the timer */
  2133. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  2134. }
  2135. #define E1000_TX_FLAGS_CSUM 0x00000001
  2136. #define E1000_TX_FLAGS_VLAN 0x00000002
  2137. #define E1000_TX_FLAGS_TSO 0x00000004
  2138. #define E1000_TX_FLAGS_IPV4 0x00000008
  2139. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2140. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2141. static int
  2142. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2143. struct sk_buff *skb)
  2144. {
  2145. #ifdef NETIF_F_TSO
  2146. struct e1000_context_desc *context_desc;
  2147. struct e1000_buffer *buffer_info;
  2148. unsigned int i;
  2149. uint32_t cmd_length = 0;
  2150. uint16_t ipcse = 0, tucse, mss;
  2151. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  2152. int err;
  2153. if (skb_is_gso(skb)) {
  2154. if (skb_header_cloned(skb)) {
  2155. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2156. if (err)
  2157. return err;
  2158. }
  2159. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2160. mss = skb_shinfo(skb)->gso_size;
  2161. if (skb->protocol == htons(ETH_P_IP)) {
  2162. skb->nh.iph->tot_len = 0;
  2163. skb->nh.iph->check = 0;
  2164. skb->h.th->check =
  2165. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  2166. skb->nh.iph->daddr,
  2167. 0,
  2168. IPPROTO_TCP,
  2169. 0);
  2170. cmd_length = E1000_TXD_CMD_IP;
  2171. ipcse = skb->h.raw - skb->data - 1;
  2172. #ifdef NETIF_F_TSO_IPV6
  2173. } else if (skb->protocol == htons(ETH_P_IPV6)) {
  2174. skb->nh.ipv6h->payload_len = 0;
  2175. skb->h.th->check =
  2176. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  2177. &skb->nh.ipv6h->daddr,
  2178. 0,
  2179. IPPROTO_TCP,
  2180. 0);
  2181. ipcse = 0;
  2182. #endif
  2183. }
  2184. ipcss = skb->nh.raw - skb->data;
  2185. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  2186. tucss = skb->h.raw - skb->data;
  2187. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  2188. tucse = 0;
  2189. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2190. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2191. i = tx_ring->next_to_use;
  2192. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2193. buffer_info = &tx_ring->buffer_info[i];
  2194. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2195. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2196. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2197. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2198. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2199. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2200. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2201. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2202. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2203. buffer_info->time_stamp = jiffies;
  2204. if (++i == tx_ring->count) i = 0;
  2205. tx_ring->next_to_use = i;
  2206. return TRUE;
  2207. }
  2208. #endif
  2209. return FALSE;
  2210. }
  2211. static boolean_t
  2212. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2213. struct sk_buff *skb)
  2214. {
  2215. struct e1000_context_desc *context_desc;
  2216. struct e1000_buffer *buffer_info;
  2217. unsigned int i;
  2218. uint8_t css;
  2219. if (likely(skb->ip_summed == CHECKSUM_HW)) {
  2220. css = skb->h.raw - skb->data;
  2221. i = tx_ring->next_to_use;
  2222. buffer_info = &tx_ring->buffer_info[i];
  2223. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2224. context_desc->upper_setup.tcp_fields.tucss = css;
  2225. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2226. context_desc->upper_setup.tcp_fields.tucse = 0;
  2227. context_desc->tcp_seg_setup.data = 0;
  2228. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2229. buffer_info->time_stamp = jiffies;
  2230. if (unlikely(++i == tx_ring->count)) i = 0;
  2231. tx_ring->next_to_use = i;
  2232. return TRUE;
  2233. }
  2234. return FALSE;
  2235. }
  2236. #define E1000_MAX_TXD_PWR 12
  2237. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2238. static int
  2239. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2240. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2241. unsigned int nr_frags, unsigned int mss)
  2242. {
  2243. struct e1000_buffer *buffer_info;
  2244. unsigned int len = skb->len;
  2245. unsigned int offset = 0, size, count = 0, i;
  2246. unsigned int f;
  2247. len -= skb->data_len;
  2248. i = tx_ring->next_to_use;
  2249. while (len) {
  2250. buffer_info = &tx_ring->buffer_info[i];
  2251. size = min(len, max_per_txd);
  2252. #ifdef NETIF_F_TSO
  2253. /* Workaround for Controller erratum --
  2254. * descriptor for non-tso packet in a linear SKB that follows a
  2255. * tso gets written back prematurely before the data is fully
  2256. * DMA'd to the controller */
  2257. if (!skb->data_len && tx_ring->last_tx_tso &&
  2258. !skb_is_gso(skb)) {
  2259. tx_ring->last_tx_tso = 0;
  2260. size -= 4;
  2261. }
  2262. /* Workaround for premature desc write-backs
  2263. * in TSO mode. Append 4-byte sentinel desc */
  2264. if (unlikely(mss && !nr_frags && size == len && size > 8))
  2265. size -= 4;
  2266. #endif
  2267. /* work-around for errata 10 and it applies
  2268. * to all controllers in PCI-X mode
  2269. * The fix is to make sure that the first descriptor of a
  2270. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2271. */
  2272. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2273. (size > 2015) && count == 0))
  2274. size = 2015;
  2275. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2276. * terminating buffers within evenly-aligned dwords. */
  2277. if (unlikely(adapter->pcix_82544 &&
  2278. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2279. size > 4))
  2280. size -= 4;
  2281. buffer_info->length = size;
  2282. buffer_info->dma =
  2283. pci_map_single(adapter->pdev,
  2284. skb->data + offset,
  2285. size,
  2286. PCI_DMA_TODEVICE);
  2287. buffer_info->time_stamp = jiffies;
  2288. len -= size;
  2289. offset += size;
  2290. count++;
  2291. if (unlikely(++i == tx_ring->count)) i = 0;
  2292. }
  2293. for (f = 0; f < nr_frags; f++) {
  2294. struct skb_frag_struct *frag;
  2295. frag = &skb_shinfo(skb)->frags[f];
  2296. len = frag->size;
  2297. offset = frag->page_offset;
  2298. while (len) {
  2299. buffer_info = &tx_ring->buffer_info[i];
  2300. size = min(len, max_per_txd);
  2301. #ifdef NETIF_F_TSO
  2302. /* Workaround for premature desc write-backs
  2303. * in TSO mode. Append 4-byte sentinel desc */
  2304. if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2305. size -= 4;
  2306. #endif
  2307. /* Workaround for potential 82544 hang in PCI-X.
  2308. * Avoid terminating buffers within evenly-aligned
  2309. * dwords. */
  2310. if (unlikely(adapter->pcix_82544 &&
  2311. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2312. size > 4))
  2313. size -= 4;
  2314. buffer_info->length = size;
  2315. buffer_info->dma =
  2316. pci_map_page(adapter->pdev,
  2317. frag->page,
  2318. offset,
  2319. size,
  2320. PCI_DMA_TODEVICE);
  2321. buffer_info->time_stamp = jiffies;
  2322. len -= size;
  2323. offset += size;
  2324. count++;
  2325. if (unlikely(++i == tx_ring->count)) i = 0;
  2326. }
  2327. }
  2328. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2329. tx_ring->buffer_info[i].skb = skb;
  2330. tx_ring->buffer_info[first].next_to_watch = i;
  2331. return count;
  2332. }
  2333. static void
  2334. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2335. int tx_flags, int count)
  2336. {
  2337. struct e1000_tx_desc *tx_desc = NULL;
  2338. struct e1000_buffer *buffer_info;
  2339. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2340. unsigned int i;
  2341. if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2342. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2343. E1000_TXD_CMD_TSE;
  2344. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2345. if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2346. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2347. }
  2348. if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2349. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2350. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2351. }
  2352. if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2353. txd_lower |= E1000_TXD_CMD_VLE;
  2354. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2355. }
  2356. i = tx_ring->next_to_use;
  2357. while (count--) {
  2358. buffer_info = &tx_ring->buffer_info[i];
  2359. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2360. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2361. tx_desc->lower.data =
  2362. cpu_to_le32(txd_lower | buffer_info->length);
  2363. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2364. if (unlikely(++i == tx_ring->count)) i = 0;
  2365. }
  2366. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2367. /* Force memory writes to complete before letting h/w
  2368. * know there are new descriptors to fetch. (Only
  2369. * applicable for weak-ordered memory model archs,
  2370. * such as IA-64). */
  2371. wmb();
  2372. tx_ring->next_to_use = i;
  2373. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2374. }
  2375. /**
  2376. * 82547 workaround to avoid controller hang in half-duplex environment.
  2377. * The workaround is to avoid queuing a large packet that would span
  2378. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2379. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2380. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2381. * to the beginning of the Tx FIFO.
  2382. **/
  2383. #define E1000_FIFO_HDR 0x10
  2384. #define E1000_82547_PAD_LEN 0x3E0
  2385. static int
  2386. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2387. {
  2388. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2389. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2390. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2391. if (adapter->link_duplex != HALF_DUPLEX)
  2392. goto no_fifo_stall_required;
  2393. if (atomic_read(&adapter->tx_fifo_stall))
  2394. return 1;
  2395. if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2396. atomic_set(&adapter->tx_fifo_stall, 1);
  2397. return 1;
  2398. }
  2399. no_fifo_stall_required:
  2400. adapter->tx_fifo_head += skb_fifo_len;
  2401. if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2402. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2403. return 0;
  2404. }
  2405. #define MINIMUM_DHCP_PACKET_SIZE 282
  2406. static int
  2407. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2408. {
  2409. struct e1000_hw *hw = &adapter->hw;
  2410. uint16_t length, offset;
  2411. if (vlan_tx_tag_present(skb)) {
  2412. if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2413. ( adapter->hw.mng_cookie.status &
  2414. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2415. return 0;
  2416. }
  2417. if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
  2418. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2419. if ((htons(ETH_P_IP) == eth->h_proto)) {
  2420. const struct iphdr *ip =
  2421. (struct iphdr *)((uint8_t *)skb->data+14);
  2422. if (IPPROTO_UDP == ip->protocol) {
  2423. struct udphdr *udp =
  2424. (struct udphdr *)((uint8_t *)ip +
  2425. (ip->ihl << 2));
  2426. if (ntohs(udp->dest) == 67) {
  2427. offset = (uint8_t *)udp + 8 - skb->data;
  2428. length = skb->len - offset;
  2429. return e1000_mng_write_dhcp_info(hw,
  2430. (uint8_t *)udp + 8,
  2431. length);
  2432. }
  2433. }
  2434. }
  2435. }
  2436. return 0;
  2437. }
  2438. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2439. static int
  2440. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2441. {
  2442. struct e1000_adapter *adapter = netdev_priv(netdev);
  2443. struct e1000_tx_ring *tx_ring;
  2444. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2445. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2446. unsigned int tx_flags = 0;
  2447. unsigned int len = skb->len;
  2448. unsigned long flags;
  2449. unsigned int nr_frags = 0;
  2450. unsigned int mss = 0;
  2451. int count = 0;
  2452. int tso;
  2453. unsigned int f;
  2454. len -= skb->data_len;
  2455. tx_ring = adapter->tx_ring;
  2456. if (unlikely(skb->len <= 0)) {
  2457. dev_kfree_skb_any(skb);
  2458. return NETDEV_TX_OK;
  2459. }
  2460. #ifdef NETIF_F_TSO
  2461. mss = skb_shinfo(skb)->gso_size;
  2462. /* The controller does a simple calculation to
  2463. * make sure there is enough room in the FIFO before
  2464. * initiating the DMA for each buffer. The calc is:
  2465. * 4 = ceil(buffer len/mss). To make sure we don't
  2466. * overrun the FIFO, adjust the max buffer len if mss
  2467. * drops. */
  2468. if (mss) {
  2469. uint8_t hdr_len;
  2470. max_per_txd = min(mss << 2, max_per_txd);
  2471. max_txd_pwr = fls(max_per_txd) - 1;
  2472. /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
  2473. * points to just header, pull a few bytes of payload from
  2474. * frags into skb->data */
  2475. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2476. if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
  2477. switch (adapter->hw.mac_type) {
  2478. unsigned int pull_size;
  2479. case e1000_82571:
  2480. case e1000_82572:
  2481. case e1000_82573:
  2482. case e1000_ich8lan:
  2483. pull_size = min((unsigned int)4, skb->data_len);
  2484. if (!__pskb_pull_tail(skb, pull_size)) {
  2485. DPRINTK(DRV, ERR,
  2486. "__pskb_pull_tail failed.\n");
  2487. dev_kfree_skb_any(skb);
  2488. return NETDEV_TX_OK;
  2489. }
  2490. len = skb->len - skb->data_len;
  2491. break;
  2492. default:
  2493. /* do nothing */
  2494. break;
  2495. }
  2496. }
  2497. }
  2498. /* reserve a descriptor for the offload context */
  2499. if ((mss) || (skb->ip_summed == CHECKSUM_HW))
  2500. count++;
  2501. count++;
  2502. #else
  2503. if (skb->ip_summed == CHECKSUM_HW)
  2504. count++;
  2505. #endif
  2506. #ifdef NETIF_F_TSO
  2507. /* Controller Erratum workaround */
  2508. if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
  2509. count++;
  2510. #endif
  2511. count += TXD_USE_COUNT(len, max_txd_pwr);
  2512. if (adapter->pcix_82544)
  2513. count++;
  2514. /* work-around for errata 10 and it applies to all controllers
  2515. * in PCI-X mode, so add one more descriptor to the count
  2516. */
  2517. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2518. (len > 2015)))
  2519. count++;
  2520. nr_frags = skb_shinfo(skb)->nr_frags;
  2521. for (f = 0; f < nr_frags; f++)
  2522. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2523. max_txd_pwr);
  2524. if (adapter->pcix_82544)
  2525. count += nr_frags;
  2526. if (adapter->hw.tx_pkt_filtering &&
  2527. (adapter->hw.mac_type == e1000_82573))
  2528. e1000_transfer_dhcp_info(adapter, skb);
  2529. local_irq_save(flags);
  2530. if (!spin_trylock(&tx_ring->tx_lock)) {
  2531. /* Collision - tell upper layer to requeue */
  2532. local_irq_restore(flags);
  2533. return NETDEV_TX_LOCKED;
  2534. }
  2535. /* need: count + 2 desc gap to keep tail from touching
  2536. * head, otherwise try next time */
  2537. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2538. netif_stop_queue(netdev);
  2539. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2540. return NETDEV_TX_BUSY;
  2541. }
  2542. if (unlikely(adapter->hw.mac_type == e1000_82547)) {
  2543. if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2544. netif_stop_queue(netdev);
  2545. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2546. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2547. return NETDEV_TX_BUSY;
  2548. }
  2549. }
  2550. if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2551. tx_flags |= E1000_TX_FLAGS_VLAN;
  2552. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2553. }
  2554. first = tx_ring->next_to_use;
  2555. tso = e1000_tso(adapter, tx_ring, skb);
  2556. if (tso < 0) {
  2557. dev_kfree_skb_any(skb);
  2558. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2559. return NETDEV_TX_OK;
  2560. }
  2561. if (likely(tso)) {
  2562. tx_ring->last_tx_tso = 1;
  2563. tx_flags |= E1000_TX_FLAGS_TSO;
  2564. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2565. tx_flags |= E1000_TX_FLAGS_CSUM;
  2566. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2567. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2568. * no longer assume, we must. */
  2569. if (likely(skb->protocol == htons(ETH_P_IP)))
  2570. tx_flags |= E1000_TX_FLAGS_IPV4;
  2571. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2572. e1000_tx_map(adapter, tx_ring, skb, first,
  2573. max_per_txd, nr_frags, mss));
  2574. netdev->trans_start = jiffies;
  2575. /* Make sure there is space in the ring for the next send. */
  2576. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2577. netif_stop_queue(netdev);
  2578. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2579. return NETDEV_TX_OK;
  2580. }
  2581. /**
  2582. * e1000_tx_timeout - Respond to a Tx Hang
  2583. * @netdev: network interface device structure
  2584. **/
  2585. static void
  2586. e1000_tx_timeout(struct net_device *netdev)
  2587. {
  2588. struct e1000_adapter *adapter = netdev_priv(netdev);
  2589. /* Do the reset outside of interrupt context */
  2590. adapter->tx_timeout_count++;
  2591. schedule_work(&adapter->reset_task);
  2592. }
  2593. static void
  2594. e1000_reset_task(struct net_device *netdev)
  2595. {
  2596. struct e1000_adapter *adapter = netdev_priv(netdev);
  2597. e1000_reinit_locked(adapter);
  2598. }
  2599. /**
  2600. * e1000_get_stats - Get System Network Statistics
  2601. * @netdev: network interface device structure
  2602. *
  2603. * Returns the address of the device statistics structure.
  2604. * The statistics are actually updated from the timer callback.
  2605. **/
  2606. static struct net_device_stats *
  2607. e1000_get_stats(struct net_device *netdev)
  2608. {
  2609. struct e1000_adapter *adapter = netdev_priv(netdev);
  2610. /* only return the current stats */
  2611. return &adapter->net_stats;
  2612. }
  2613. /**
  2614. * e1000_change_mtu - Change the Maximum Transfer Unit
  2615. * @netdev: network interface device structure
  2616. * @new_mtu: new value for maximum frame size
  2617. *
  2618. * Returns 0 on success, negative on failure
  2619. **/
  2620. static int
  2621. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2622. {
  2623. struct e1000_adapter *adapter = netdev_priv(netdev);
  2624. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2625. uint16_t eeprom_data = 0;
  2626. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2627. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2628. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2629. return -EINVAL;
  2630. }
  2631. /* Adapter-specific max frame size limits. */
  2632. switch (adapter->hw.mac_type) {
  2633. case e1000_undefined ... e1000_82542_rev2_1:
  2634. case e1000_ich8lan:
  2635. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2636. DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
  2637. return -EINVAL;
  2638. }
  2639. break;
  2640. case e1000_82573:
  2641. /* only enable jumbo frames if ASPM is disabled completely
  2642. * this means both bits must be zero in 0x1A bits 3:2 */
  2643. e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
  2644. &eeprom_data);
  2645. if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
  2646. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2647. DPRINTK(PROBE, ERR,
  2648. "Jumbo Frames not supported.\n");
  2649. return -EINVAL;
  2650. }
  2651. break;
  2652. }
  2653. /* fall through to get support */
  2654. case e1000_82571:
  2655. case e1000_82572:
  2656. case e1000_80003es2lan:
  2657. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2658. if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2659. DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
  2660. return -EINVAL;
  2661. }
  2662. break;
  2663. default:
  2664. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  2665. break;
  2666. }
  2667. /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
  2668. * means we reserve 2 more, this pushes us to allocate from the next
  2669. * larger slab size
  2670. * i.e. RXBUFFER_2048 --> size-4096 slab */
  2671. if (max_frame <= E1000_RXBUFFER_256)
  2672. adapter->rx_buffer_len = E1000_RXBUFFER_256;
  2673. else if (max_frame <= E1000_RXBUFFER_512)
  2674. adapter->rx_buffer_len = E1000_RXBUFFER_512;
  2675. else if (max_frame <= E1000_RXBUFFER_1024)
  2676. adapter->rx_buffer_len = E1000_RXBUFFER_1024;
  2677. else if (max_frame <= E1000_RXBUFFER_2048)
  2678. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2679. else if (max_frame <= E1000_RXBUFFER_4096)
  2680. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  2681. else if (max_frame <= E1000_RXBUFFER_8192)
  2682. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  2683. else if (max_frame <= E1000_RXBUFFER_16384)
  2684. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  2685. /* adjust allocation if LPE protects us, and we aren't using SBP */
  2686. if (!adapter->hw.tbi_compatibility_on &&
  2687. ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
  2688. (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
  2689. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  2690. netdev->mtu = new_mtu;
  2691. if (netif_running(netdev))
  2692. e1000_reinit_locked(adapter);
  2693. adapter->hw.max_frame_size = max_frame;
  2694. return 0;
  2695. }
  2696. /**
  2697. * e1000_update_stats - Update the board statistics counters
  2698. * @adapter: board private structure
  2699. **/
  2700. void
  2701. e1000_update_stats(struct e1000_adapter *adapter)
  2702. {
  2703. struct e1000_hw *hw = &adapter->hw;
  2704. struct pci_dev *pdev = adapter->pdev;
  2705. unsigned long flags;
  2706. uint16_t phy_tmp;
  2707. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2708. /*
  2709. * Prevent stats update while adapter is being reset, or if the pci
  2710. * connection is down.
  2711. */
  2712. if (adapter->link_speed == 0)
  2713. return;
  2714. if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
  2715. return;
  2716. spin_lock_irqsave(&adapter->stats_lock, flags);
  2717. /* these counters are modified from e1000_adjust_tbi_stats,
  2718. * called from the interrupt context, so they must only
  2719. * be written while holding adapter->stats_lock
  2720. */
  2721. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2722. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2723. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2724. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2725. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2726. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2727. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2728. if (adapter->hw.mac_type != e1000_ich8lan) {
  2729. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2730. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2731. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2732. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2733. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2734. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2735. }
  2736. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2737. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2738. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2739. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2740. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2741. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2742. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2743. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2744. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2745. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2746. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2747. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2748. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2749. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2750. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2751. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2752. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2753. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2754. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2755. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2756. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2757. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2758. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2759. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2760. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2761. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2762. if (adapter->hw.mac_type != e1000_ich8lan) {
  2763. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2764. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2765. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2766. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2767. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2768. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2769. }
  2770. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2771. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2772. /* used for adaptive IFS */
  2773. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2774. adapter->stats.tpt += hw->tx_packet_delta;
  2775. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2776. adapter->stats.colc += hw->collision_delta;
  2777. if (hw->mac_type >= e1000_82543) {
  2778. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2779. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2780. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2781. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2782. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2783. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2784. }
  2785. if (hw->mac_type > e1000_82547_rev_2) {
  2786. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2787. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2788. if (adapter->hw.mac_type != e1000_ich8lan) {
  2789. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2790. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2791. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2792. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2793. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2794. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2795. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2796. }
  2797. }
  2798. /* Fill out the OS statistics structure */
  2799. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2800. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2801. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2802. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2803. adapter->net_stats.multicast = adapter->stats.mprc;
  2804. adapter->net_stats.collisions = adapter->stats.colc;
  2805. /* Rx Errors */
  2806. /* RLEC on some newer hardware can be incorrect so build
  2807. * our own version based on RUC and ROC */
  2808. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2809. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2810. adapter->stats.ruc + adapter->stats.roc +
  2811. adapter->stats.cexterr;
  2812. adapter->net_stats.rx_length_errors = adapter->stats.ruc +
  2813. adapter->stats.roc;
  2814. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2815. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2816. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2817. /* Tx Errors */
  2818. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2819. adapter->stats.latecol;
  2820. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2821. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2822. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2823. /* Tx Dropped needs to be maintained elsewhere */
  2824. /* Phy Stats */
  2825. if (hw->media_type == e1000_media_type_copper) {
  2826. if ((adapter->link_speed == SPEED_1000) &&
  2827. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2828. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2829. adapter->phy_stats.idle_errors += phy_tmp;
  2830. }
  2831. if ((hw->mac_type <= e1000_82546) &&
  2832. (hw->phy_type == e1000_phy_m88) &&
  2833. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2834. adapter->phy_stats.receive_errors += phy_tmp;
  2835. }
  2836. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2837. }
  2838. /**
  2839. * e1000_intr - Interrupt Handler
  2840. * @irq: interrupt number
  2841. * @data: pointer to a network interface device structure
  2842. * @pt_regs: CPU registers structure
  2843. **/
  2844. static irqreturn_t
  2845. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2846. {
  2847. struct net_device *netdev = data;
  2848. struct e1000_adapter *adapter = netdev_priv(netdev);
  2849. struct e1000_hw *hw = &adapter->hw;
  2850. uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
  2851. #ifndef CONFIG_E1000_NAPI
  2852. int i;
  2853. #else
  2854. /* Interrupt Auto-Mask...upon reading ICR,
  2855. * interrupts are masked. No need for the
  2856. * IMC write, but it does mean we should
  2857. * account for it ASAP. */
  2858. if (likely(hw->mac_type >= e1000_82571))
  2859. atomic_inc(&adapter->irq_sem);
  2860. #endif
  2861. if (unlikely(!icr)) {
  2862. #ifdef CONFIG_E1000_NAPI
  2863. if (hw->mac_type >= e1000_82571)
  2864. e1000_irq_enable(adapter);
  2865. #endif
  2866. return IRQ_NONE; /* Not our interrupt */
  2867. }
  2868. if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2869. hw->get_link_status = 1;
  2870. /* 80003ES2LAN workaround--
  2871. * For packet buffer work-around on link down event;
  2872. * disable receives here in the ISR and
  2873. * reset adapter in watchdog
  2874. */
  2875. if (netif_carrier_ok(netdev) &&
  2876. (adapter->hw.mac_type == e1000_80003es2lan)) {
  2877. /* disable receives */
  2878. rctl = E1000_READ_REG(hw, RCTL);
  2879. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  2880. }
  2881. mod_timer(&adapter->watchdog_timer, jiffies);
  2882. }
  2883. #ifdef CONFIG_E1000_NAPI
  2884. if (unlikely(hw->mac_type < e1000_82571)) {
  2885. atomic_inc(&adapter->irq_sem);
  2886. E1000_WRITE_REG(hw, IMC, ~0);
  2887. E1000_WRITE_FLUSH(hw);
  2888. }
  2889. if (likely(netif_rx_schedule_prep(netdev)))
  2890. __netif_rx_schedule(netdev);
  2891. else
  2892. e1000_irq_enable(adapter);
  2893. #else
  2894. /* Writing IMC and IMS is needed for 82547.
  2895. * Due to Hub Link bus being occupied, an interrupt
  2896. * de-assertion message is not able to be sent.
  2897. * When an interrupt assertion message is generated later,
  2898. * two messages are re-ordered and sent out.
  2899. * That causes APIC to think 82547 is in de-assertion
  2900. * state, while 82547 is in assertion state, resulting
  2901. * in dead lock. Writing IMC forces 82547 into
  2902. * de-assertion state.
  2903. */
  2904. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
  2905. atomic_inc(&adapter->irq_sem);
  2906. E1000_WRITE_REG(hw, IMC, ~0);
  2907. }
  2908. for (i = 0; i < E1000_MAX_INTR; i++)
  2909. if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2910. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2911. break;
  2912. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2913. e1000_irq_enable(adapter);
  2914. #endif
  2915. return IRQ_HANDLED;
  2916. }
  2917. #ifdef CONFIG_E1000_NAPI
  2918. /**
  2919. * e1000_clean - NAPI Rx polling callback
  2920. * @adapter: board private structure
  2921. **/
  2922. static int
  2923. e1000_clean(struct net_device *poll_dev, int *budget)
  2924. {
  2925. struct e1000_adapter *adapter;
  2926. int work_to_do = min(*budget, poll_dev->quota);
  2927. int tx_cleaned = 0, work_done = 0;
  2928. /* Must NOT use netdev_priv macro here. */
  2929. adapter = poll_dev->priv;
  2930. /* Keep link state information with original netdev */
  2931. if (!netif_carrier_ok(poll_dev))
  2932. goto quit_polling;
  2933. /* e1000_clean is called per-cpu. This lock protects
  2934. * tx_ring[0] from being cleaned by multiple cpus
  2935. * simultaneously. A failure obtaining the lock means
  2936. * tx_ring[0] is currently being cleaned anyway. */
  2937. if (spin_trylock(&adapter->tx_queue_lock)) {
  2938. tx_cleaned = e1000_clean_tx_irq(adapter,
  2939. &adapter->tx_ring[0]);
  2940. spin_unlock(&adapter->tx_queue_lock);
  2941. }
  2942. adapter->clean_rx(adapter, &adapter->rx_ring[0],
  2943. &work_done, work_to_do);
  2944. *budget -= work_done;
  2945. poll_dev->quota -= work_done;
  2946. /* If no Tx and not enough Rx work done, exit the polling mode */
  2947. if ((!tx_cleaned && (work_done == 0)) ||
  2948. !netif_running(poll_dev)) {
  2949. quit_polling:
  2950. netif_rx_complete(poll_dev);
  2951. e1000_irq_enable(adapter);
  2952. return 0;
  2953. }
  2954. return 1;
  2955. }
  2956. #endif
  2957. /**
  2958. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2959. * @adapter: board private structure
  2960. **/
  2961. static boolean_t
  2962. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2963. struct e1000_tx_ring *tx_ring)
  2964. {
  2965. struct net_device *netdev = adapter->netdev;
  2966. struct e1000_tx_desc *tx_desc, *eop_desc;
  2967. struct e1000_buffer *buffer_info;
  2968. unsigned int i, eop;
  2969. #ifdef CONFIG_E1000_NAPI
  2970. unsigned int count = 0;
  2971. #endif
  2972. boolean_t cleaned = FALSE;
  2973. i = tx_ring->next_to_clean;
  2974. eop = tx_ring->buffer_info[i].next_to_watch;
  2975. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2976. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2977. for (cleaned = FALSE; !cleaned; ) {
  2978. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2979. buffer_info = &tx_ring->buffer_info[i];
  2980. cleaned = (i == eop);
  2981. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  2982. memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
  2983. if (unlikely(++i == tx_ring->count)) i = 0;
  2984. }
  2985. eop = tx_ring->buffer_info[i].next_to_watch;
  2986. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2987. #ifdef CONFIG_E1000_NAPI
  2988. #define E1000_TX_WEIGHT 64
  2989. /* weight of a sort for tx, to avoid endless transmit cleanup */
  2990. if (count++ == E1000_TX_WEIGHT) break;
  2991. #endif
  2992. }
  2993. tx_ring->next_to_clean = i;
  2994. #define TX_WAKE_THRESHOLD 32
  2995. if (unlikely(cleaned && netif_queue_stopped(netdev) &&
  2996. netif_carrier_ok(netdev))) {
  2997. spin_lock(&tx_ring->tx_lock);
  2998. if (netif_queue_stopped(netdev) &&
  2999. (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))
  3000. netif_wake_queue(netdev);
  3001. spin_unlock(&tx_ring->tx_lock);
  3002. }
  3003. if (adapter->detect_tx_hung) {
  3004. /* Detect a transmit hang in hardware, this serializes the
  3005. * check with the clearing of time_stamp and movement of i */
  3006. adapter->detect_tx_hung = FALSE;
  3007. if (tx_ring->buffer_info[eop].dma &&
  3008. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  3009. (adapter->tx_timeout_factor * HZ))
  3010. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  3011. E1000_STATUS_TXOFF)) {
  3012. /* detected Tx unit hang */
  3013. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  3014. " Tx Queue <%lu>\n"
  3015. " TDH <%x>\n"
  3016. " TDT <%x>\n"
  3017. " next_to_use <%x>\n"
  3018. " next_to_clean <%x>\n"
  3019. "buffer_info[next_to_clean]\n"
  3020. " time_stamp <%lx>\n"
  3021. " next_to_watch <%x>\n"
  3022. " jiffies <%lx>\n"
  3023. " next_to_watch.status <%x>\n",
  3024. (unsigned long)((tx_ring - adapter->tx_ring) /
  3025. sizeof(struct e1000_tx_ring)),
  3026. readl(adapter->hw.hw_addr + tx_ring->tdh),
  3027. readl(adapter->hw.hw_addr + tx_ring->tdt),
  3028. tx_ring->next_to_use,
  3029. tx_ring->next_to_clean,
  3030. tx_ring->buffer_info[eop].time_stamp,
  3031. eop,
  3032. jiffies,
  3033. eop_desc->upper.fields.status);
  3034. netif_stop_queue(netdev);
  3035. }
  3036. }
  3037. return cleaned;
  3038. }
  3039. /**
  3040. * e1000_rx_checksum - Receive Checksum Offload for 82543
  3041. * @adapter: board private structure
  3042. * @status_err: receive descriptor status and error fields
  3043. * @csum: receive descriptor csum field
  3044. * @sk_buff: socket buffer with received data
  3045. **/
  3046. static void
  3047. e1000_rx_checksum(struct e1000_adapter *adapter,
  3048. uint32_t status_err, uint32_t csum,
  3049. struct sk_buff *skb)
  3050. {
  3051. uint16_t status = (uint16_t)status_err;
  3052. uint8_t errors = (uint8_t)(status_err >> 24);
  3053. skb->ip_summed = CHECKSUM_NONE;
  3054. /* 82543 or newer only */
  3055. if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
  3056. /* Ignore Checksum bit is set */
  3057. if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
  3058. /* TCP/UDP checksum error bit is set */
  3059. if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
  3060. /* let the stack verify checksum errors */
  3061. adapter->hw_csum_err++;
  3062. return;
  3063. }
  3064. /* TCP/UDP Checksum has not been calculated */
  3065. if (adapter->hw.mac_type <= e1000_82547_rev_2) {
  3066. if (!(status & E1000_RXD_STAT_TCPCS))
  3067. return;
  3068. } else {
  3069. if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  3070. return;
  3071. }
  3072. /* It must be a TCP or UDP packet with a valid checksum */
  3073. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  3074. /* TCP checksum is good */
  3075. skb->ip_summed = CHECKSUM_UNNECESSARY;
  3076. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  3077. /* IP fragment with UDP payload */
  3078. /* Hardware complements the payload checksum, so we undo it
  3079. * and then put the value in host order for further stack use.
  3080. */
  3081. csum = ntohl(csum ^ 0xFFFF);
  3082. skb->csum = csum;
  3083. skb->ip_summed = CHECKSUM_HW;
  3084. }
  3085. adapter->hw_csum_good++;
  3086. }
  3087. /**
  3088. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  3089. * @adapter: board private structure
  3090. **/
  3091. static boolean_t
  3092. #ifdef CONFIG_E1000_NAPI
  3093. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3094. struct e1000_rx_ring *rx_ring,
  3095. int *work_done, int work_to_do)
  3096. #else
  3097. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3098. struct e1000_rx_ring *rx_ring)
  3099. #endif
  3100. {
  3101. struct net_device *netdev = adapter->netdev;
  3102. struct pci_dev *pdev = adapter->pdev;
  3103. struct e1000_rx_desc *rx_desc, *next_rxd;
  3104. struct e1000_buffer *buffer_info, *next_buffer;
  3105. unsigned long flags;
  3106. uint32_t length;
  3107. uint8_t last_byte;
  3108. unsigned int i;
  3109. int cleaned_count = 0;
  3110. boolean_t cleaned = FALSE;
  3111. i = rx_ring->next_to_clean;
  3112. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3113. buffer_info = &rx_ring->buffer_info[i];
  3114. while (rx_desc->status & E1000_RXD_STAT_DD) {
  3115. struct sk_buff *skb;
  3116. u8 status;
  3117. #ifdef CONFIG_E1000_NAPI
  3118. if (*work_done >= work_to_do)
  3119. break;
  3120. (*work_done)++;
  3121. #endif
  3122. status = rx_desc->status;
  3123. skb = buffer_info->skb;
  3124. buffer_info->skb = NULL;
  3125. prefetch(skb->data - NET_IP_ALIGN);
  3126. if (++i == rx_ring->count) i = 0;
  3127. next_rxd = E1000_RX_DESC(*rx_ring, i);
  3128. prefetch(next_rxd);
  3129. next_buffer = &rx_ring->buffer_info[i];
  3130. cleaned = TRUE;
  3131. cleaned_count++;
  3132. pci_unmap_single(pdev,
  3133. buffer_info->dma,
  3134. buffer_info->length,
  3135. PCI_DMA_FROMDEVICE);
  3136. length = le16_to_cpu(rx_desc->length);
  3137. /* adjust length to remove Ethernet CRC */
  3138. length -= 4;
  3139. if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
  3140. /* All receives must fit into a single buffer */
  3141. E1000_DBG("%s: Receive packet consumed multiple"
  3142. " buffers\n", netdev->name);
  3143. /* recycle */
  3144. buffer_info->skb = skb;
  3145. goto next_desc;
  3146. }
  3147. if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3148. last_byte = *(skb->data + length - 1);
  3149. if (TBI_ACCEPT(&adapter->hw, status,
  3150. rx_desc->errors, length, last_byte)) {
  3151. spin_lock_irqsave(&adapter->stats_lock, flags);
  3152. e1000_tbi_adjust_stats(&adapter->hw,
  3153. &adapter->stats,
  3154. length, skb->data);
  3155. spin_unlock_irqrestore(&adapter->stats_lock,
  3156. flags);
  3157. length--;
  3158. } else {
  3159. /* recycle */
  3160. buffer_info->skb = skb;
  3161. goto next_desc;
  3162. }
  3163. }
  3164. /* code added for copybreak, this should improve
  3165. * performance for small packets with large amounts
  3166. * of reassembly being done in the stack */
  3167. #define E1000_CB_LENGTH 256
  3168. if (length < E1000_CB_LENGTH) {
  3169. struct sk_buff *new_skb =
  3170. netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
  3171. if (new_skb) {
  3172. skb_reserve(new_skb, NET_IP_ALIGN);
  3173. new_skb->dev = netdev;
  3174. memcpy(new_skb->data - NET_IP_ALIGN,
  3175. skb->data - NET_IP_ALIGN,
  3176. length + NET_IP_ALIGN);
  3177. /* save the skb in buffer_info as good */
  3178. buffer_info->skb = skb;
  3179. skb = new_skb;
  3180. skb_put(skb, length);
  3181. }
  3182. } else
  3183. skb_put(skb, length);
  3184. /* end copybreak code */
  3185. /* Receive Checksum Offload */
  3186. e1000_rx_checksum(adapter,
  3187. (uint32_t)(status) |
  3188. ((uint32_t)(rx_desc->errors) << 24),
  3189. le16_to_cpu(rx_desc->csum), skb);
  3190. skb->protocol = eth_type_trans(skb, netdev);
  3191. #ifdef CONFIG_E1000_NAPI
  3192. if (unlikely(adapter->vlgrp &&
  3193. (status & E1000_RXD_STAT_VP))) {
  3194. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3195. le16_to_cpu(rx_desc->special) &
  3196. E1000_RXD_SPC_VLAN_MASK);
  3197. } else {
  3198. netif_receive_skb(skb);
  3199. }
  3200. #else /* CONFIG_E1000_NAPI */
  3201. if (unlikely(adapter->vlgrp &&
  3202. (status & E1000_RXD_STAT_VP))) {
  3203. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3204. le16_to_cpu(rx_desc->special) &
  3205. E1000_RXD_SPC_VLAN_MASK);
  3206. } else {
  3207. netif_rx(skb);
  3208. }
  3209. #endif /* CONFIG_E1000_NAPI */
  3210. netdev->last_rx = jiffies;
  3211. next_desc:
  3212. rx_desc->status = 0;
  3213. /* return some buffers to hardware, one at a time is too slow */
  3214. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3215. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3216. cleaned_count = 0;
  3217. }
  3218. /* use prefetched values */
  3219. rx_desc = next_rxd;
  3220. buffer_info = next_buffer;
  3221. }
  3222. rx_ring->next_to_clean = i;
  3223. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3224. if (cleaned_count)
  3225. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3226. return cleaned;
  3227. }
  3228. /**
  3229. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3230. * @adapter: board private structure
  3231. **/
  3232. static boolean_t
  3233. #ifdef CONFIG_E1000_NAPI
  3234. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3235. struct e1000_rx_ring *rx_ring,
  3236. int *work_done, int work_to_do)
  3237. #else
  3238. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3239. struct e1000_rx_ring *rx_ring)
  3240. #endif
  3241. {
  3242. union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
  3243. struct net_device *netdev = adapter->netdev;
  3244. struct pci_dev *pdev = adapter->pdev;
  3245. struct e1000_buffer *buffer_info, *next_buffer;
  3246. struct e1000_ps_page *ps_page;
  3247. struct e1000_ps_page_dma *ps_page_dma;
  3248. struct sk_buff *skb;
  3249. unsigned int i, j;
  3250. uint32_t length, staterr;
  3251. int cleaned_count = 0;
  3252. boolean_t cleaned = FALSE;
  3253. i = rx_ring->next_to_clean;
  3254. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3255. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3256. buffer_info = &rx_ring->buffer_info[i];
  3257. while (staterr & E1000_RXD_STAT_DD) {
  3258. ps_page = &rx_ring->ps_page[i];
  3259. ps_page_dma = &rx_ring->ps_page_dma[i];
  3260. #ifdef CONFIG_E1000_NAPI
  3261. if (unlikely(*work_done >= work_to_do))
  3262. break;
  3263. (*work_done)++;
  3264. #endif
  3265. skb = buffer_info->skb;
  3266. /* in the packet split case this is header only */
  3267. prefetch(skb->data - NET_IP_ALIGN);
  3268. if (++i == rx_ring->count) i = 0;
  3269. next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
  3270. prefetch(next_rxd);
  3271. next_buffer = &rx_ring->buffer_info[i];
  3272. cleaned = TRUE;
  3273. cleaned_count++;
  3274. pci_unmap_single(pdev, buffer_info->dma,
  3275. buffer_info->length,
  3276. PCI_DMA_FROMDEVICE);
  3277. if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3278. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3279. " the full packet\n", netdev->name);
  3280. dev_kfree_skb_irq(skb);
  3281. goto next_desc;
  3282. }
  3283. if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3284. dev_kfree_skb_irq(skb);
  3285. goto next_desc;
  3286. }
  3287. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3288. if (unlikely(!length)) {
  3289. E1000_DBG("%s: Last part of the packet spanning"
  3290. " multiple descriptors\n", netdev->name);
  3291. dev_kfree_skb_irq(skb);
  3292. goto next_desc;
  3293. }
  3294. /* Good Receive */
  3295. skb_put(skb, length);
  3296. {
  3297. /* this looks ugly, but it seems compiler issues make it
  3298. more efficient than reusing j */
  3299. int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
  3300. /* page alloc/put takes too long and effects small packet
  3301. * throughput, so unsplit small packets and save the alloc/put*/
  3302. if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
  3303. u8 *vaddr;
  3304. /* there is no documentation about how to call
  3305. * kmap_atomic, so we can't hold the mapping
  3306. * very long */
  3307. pci_dma_sync_single_for_cpu(pdev,
  3308. ps_page_dma->ps_page_dma[0],
  3309. PAGE_SIZE,
  3310. PCI_DMA_FROMDEVICE);
  3311. vaddr = kmap_atomic(ps_page->ps_page[0],
  3312. KM_SKB_DATA_SOFTIRQ);
  3313. memcpy(skb->tail, vaddr, l1);
  3314. kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
  3315. pci_dma_sync_single_for_device(pdev,
  3316. ps_page_dma->ps_page_dma[0],
  3317. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3318. /* remove the CRC */
  3319. l1 -= 4;
  3320. skb_put(skb, l1);
  3321. goto copydone;
  3322. } /* if */
  3323. }
  3324. for (j = 0; j < adapter->rx_ps_pages; j++) {
  3325. if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
  3326. break;
  3327. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3328. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3329. ps_page_dma->ps_page_dma[j] = 0;
  3330. skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
  3331. length);
  3332. ps_page->ps_page[j] = NULL;
  3333. skb->len += length;
  3334. skb->data_len += length;
  3335. skb->truesize += length;
  3336. }
  3337. /* strip the ethernet crc, problem is we're using pages now so
  3338. * this whole operation can get a little cpu intensive */
  3339. pskb_trim(skb, skb->len - 4);
  3340. copydone:
  3341. e1000_rx_checksum(adapter, staterr,
  3342. le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
  3343. skb->protocol = eth_type_trans(skb, netdev);
  3344. if (likely(rx_desc->wb.upper.header_status &
  3345. cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
  3346. adapter->rx_hdr_split++;
  3347. #ifdef CONFIG_E1000_NAPI
  3348. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3349. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3350. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3351. E1000_RXD_SPC_VLAN_MASK);
  3352. } else {
  3353. netif_receive_skb(skb);
  3354. }
  3355. #else /* CONFIG_E1000_NAPI */
  3356. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3357. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3358. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3359. E1000_RXD_SPC_VLAN_MASK);
  3360. } else {
  3361. netif_rx(skb);
  3362. }
  3363. #endif /* CONFIG_E1000_NAPI */
  3364. netdev->last_rx = jiffies;
  3365. next_desc:
  3366. rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
  3367. buffer_info->skb = NULL;
  3368. /* return some buffers to hardware, one at a time is too slow */
  3369. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3370. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3371. cleaned_count = 0;
  3372. }
  3373. /* use prefetched values */
  3374. rx_desc = next_rxd;
  3375. buffer_info = next_buffer;
  3376. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3377. }
  3378. rx_ring->next_to_clean = i;
  3379. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3380. if (cleaned_count)
  3381. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3382. return cleaned;
  3383. }
  3384. /**
  3385. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3386. * @adapter: address of board private structure
  3387. **/
  3388. static void
  3389. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3390. struct e1000_rx_ring *rx_ring,
  3391. int cleaned_count)
  3392. {
  3393. struct net_device *netdev = adapter->netdev;
  3394. struct pci_dev *pdev = adapter->pdev;
  3395. struct e1000_rx_desc *rx_desc;
  3396. struct e1000_buffer *buffer_info;
  3397. struct sk_buff *skb;
  3398. unsigned int i;
  3399. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3400. i = rx_ring->next_to_use;
  3401. buffer_info = &rx_ring->buffer_info[i];
  3402. while (cleaned_count--) {
  3403. if (!(skb = buffer_info->skb))
  3404. skb = netdev_alloc_skb(netdev, bufsz);
  3405. else {
  3406. skb_trim(skb, 0);
  3407. goto map_skb;
  3408. }
  3409. if (unlikely(!skb)) {
  3410. /* Better luck next round */
  3411. adapter->alloc_rx_buff_failed++;
  3412. break;
  3413. }
  3414. /* Fix for errata 23, can't cross 64kB boundary */
  3415. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3416. struct sk_buff *oldskb = skb;
  3417. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3418. "at %p\n", bufsz, skb->data);
  3419. /* Try again, without freeing the previous */
  3420. skb = netdev_alloc_skb(netdev, bufsz);
  3421. /* Failed allocation, critical failure */
  3422. if (!skb) {
  3423. dev_kfree_skb(oldskb);
  3424. break;
  3425. }
  3426. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3427. /* give up */
  3428. dev_kfree_skb(skb);
  3429. dev_kfree_skb(oldskb);
  3430. break; /* while !buffer_info->skb */
  3431. } else {
  3432. /* Use new allocation */
  3433. dev_kfree_skb(oldskb);
  3434. }
  3435. }
  3436. /* Make buffer alignment 2 beyond a 16 byte boundary
  3437. * this will result in a 16 byte aligned IP header after
  3438. * the 14 byte MAC header is removed
  3439. */
  3440. skb_reserve(skb, NET_IP_ALIGN);
  3441. skb->dev = netdev;
  3442. buffer_info->skb = skb;
  3443. buffer_info->length = adapter->rx_buffer_len;
  3444. map_skb:
  3445. buffer_info->dma = pci_map_single(pdev,
  3446. skb->data,
  3447. adapter->rx_buffer_len,
  3448. PCI_DMA_FROMDEVICE);
  3449. /* Fix for errata 23, can't cross 64kB boundary */
  3450. if (!e1000_check_64k_bound(adapter,
  3451. (void *)(unsigned long)buffer_info->dma,
  3452. adapter->rx_buffer_len)) {
  3453. DPRINTK(RX_ERR, ERR,
  3454. "dma align check failed: %u bytes at %p\n",
  3455. adapter->rx_buffer_len,
  3456. (void *)(unsigned long)buffer_info->dma);
  3457. dev_kfree_skb(skb);
  3458. buffer_info->skb = NULL;
  3459. pci_unmap_single(pdev, buffer_info->dma,
  3460. adapter->rx_buffer_len,
  3461. PCI_DMA_FROMDEVICE);
  3462. break; /* while !buffer_info->skb */
  3463. }
  3464. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3465. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3466. if (unlikely(++i == rx_ring->count))
  3467. i = 0;
  3468. buffer_info = &rx_ring->buffer_info[i];
  3469. }
  3470. if (likely(rx_ring->next_to_use != i)) {
  3471. rx_ring->next_to_use = i;
  3472. if (unlikely(i-- == 0))
  3473. i = (rx_ring->count - 1);
  3474. /* Force memory writes to complete before letting h/w
  3475. * know there are new descriptors to fetch. (Only
  3476. * applicable for weak-ordered memory model archs,
  3477. * such as IA-64). */
  3478. wmb();
  3479. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3480. }
  3481. }
  3482. /**
  3483. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3484. * @adapter: address of board private structure
  3485. **/
  3486. static void
  3487. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3488. struct e1000_rx_ring *rx_ring,
  3489. int cleaned_count)
  3490. {
  3491. struct net_device *netdev = adapter->netdev;
  3492. struct pci_dev *pdev = adapter->pdev;
  3493. union e1000_rx_desc_packet_split *rx_desc;
  3494. struct e1000_buffer *buffer_info;
  3495. struct e1000_ps_page *ps_page;
  3496. struct e1000_ps_page_dma *ps_page_dma;
  3497. struct sk_buff *skb;
  3498. unsigned int i, j;
  3499. i = rx_ring->next_to_use;
  3500. buffer_info = &rx_ring->buffer_info[i];
  3501. ps_page = &rx_ring->ps_page[i];
  3502. ps_page_dma = &rx_ring->ps_page_dma[i];
  3503. while (cleaned_count--) {
  3504. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3505. for (j = 0; j < PS_PAGE_BUFFERS; j++) {
  3506. if (j < adapter->rx_ps_pages) {
  3507. if (likely(!ps_page->ps_page[j])) {
  3508. ps_page->ps_page[j] =
  3509. alloc_page(GFP_ATOMIC);
  3510. if (unlikely(!ps_page->ps_page[j])) {
  3511. adapter->alloc_rx_buff_failed++;
  3512. goto no_buffers;
  3513. }
  3514. ps_page_dma->ps_page_dma[j] =
  3515. pci_map_page(pdev,
  3516. ps_page->ps_page[j],
  3517. 0, PAGE_SIZE,
  3518. PCI_DMA_FROMDEVICE);
  3519. }
  3520. /* Refresh the desc even if buffer_addrs didn't
  3521. * change because each write-back erases
  3522. * this info.
  3523. */
  3524. rx_desc->read.buffer_addr[j+1] =
  3525. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3526. } else
  3527. rx_desc->read.buffer_addr[j+1] = ~0;
  3528. }
  3529. skb = netdev_alloc_skb(netdev,
  3530. adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3531. if (unlikely(!skb)) {
  3532. adapter->alloc_rx_buff_failed++;
  3533. break;
  3534. }
  3535. /* Make buffer alignment 2 beyond a 16 byte boundary
  3536. * this will result in a 16 byte aligned IP header after
  3537. * the 14 byte MAC header is removed
  3538. */
  3539. skb_reserve(skb, NET_IP_ALIGN);
  3540. skb->dev = netdev;
  3541. buffer_info->skb = skb;
  3542. buffer_info->length = adapter->rx_ps_bsize0;
  3543. buffer_info->dma = pci_map_single(pdev, skb->data,
  3544. adapter->rx_ps_bsize0,
  3545. PCI_DMA_FROMDEVICE);
  3546. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3547. if (unlikely(++i == rx_ring->count)) i = 0;
  3548. buffer_info = &rx_ring->buffer_info[i];
  3549. ps_page = &rx_ring->ps_page[i];
  3550. ps_page_dma = &rx_ring->ps_page_dma[i];
  3551. }
  3552. no_buffers:
  3553. if (likely(rx_ring->next_to_use != i)) {
  3554. rx_ring->next_to_use = i;
  3555. if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
  3556. /* Force memory writes to complete before letting h/w
  3557. * know there are new descriptors to fetch. (Only
  3558. * applicable for weak-ordered memory model archs,
  3559. * such as IA-64). */
  3560. wmb();
  3561. /* Hardware increments by 16 bytes, but packet split
  3562. * descriptors are 32 bytes...so we increment tail
  3563. * twice as much.
  3564. */
  3565. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3566. }
  3567. }
  3568. /**
  3569. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3570. * @adapter:
  3571. **/
  3572. static void
  3573. e1000_smartspeed(struct e1000_adapter *adapter)
  3574. {
  3575. uint16_t phy_status;
  3576. uint16_t phy_ctrl;
  3577. if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3578. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3579. return;
  3580. if (adapter->smartspeed == 0) {
  3581. /* If Master/Slave config fault is asserted twice,
  3582. * we assume back-to-back */
  3583. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3584. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3585. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3586. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3587. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3588. if (phy_ctrl & CR_1000T_MS_ENABLE) {
  3589. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3590. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3591. phy_ctrl);
  3592. adapter->smartspeed++;
  3593. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3594. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3595. &phy_ctrl)) {
  3596. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3597. MII_CR_RESTART_AUTO_NEG);
  3598. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3599. phy_ctrl);
  3600. }
  3601. }
  3602. return;
  3603. } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3604. /* If still no link, perhaps using 2/3 pair cable */
  3605. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3606. phy_ctrl |= CR_1000T_MS_ENABLE;
  3607. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3608. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3609. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3610. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3611. MII_CR_RESTART_AUTO_NEG);
  3612. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3613. }
  3614. }
  3615. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3616. if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3617. adapter->smartspeed = 0;
  3618. }
  3619. /**
  3620. * e1000_ioctl -
  3621. * @netdev:
  3622. * @ifreq:
  3623. * @cmd:
  3624. **/
  3625. static int
  3626. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3627. {
  3628. switch (cmd) {
  3629. case SIOCGMIIPHY:
  3630. case SIOCGMIIREG:
  3631. case SIOCSMIIREG:
  3632. return e1000_mii_ioctl(netdev, ifr, cmd);
  3633. default:
  3634. return -EOPNOTSUPP;
  3635. }
  3636. }
  3637. /**
  3638. * e1000_mii_ioctl -
  3639. * @netdev:
  3640. * @ifreq:
  3641. * @cmd:
  3642. **/
  3643. static int
  3644. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3645. {
  3646. struct e1000_adapter *adapter = netdev_priv(netdev);
  3647. struct mii_ioctl_data *data = if_mii(ifr);
  3648. int retval;
  3649. uint16_t mii_reg;
  3650. uint16_t spddplx;
  3651. unsigned long flags;
  3652. if (adapter->hw.media_type != e1000_media_type_copper)
  3653. return -EOPNOTSUPP;
  3654. switch (cmd) {
  3655. case SIOCGMIIPHY:
  3656. data->phy_id = adapter->hw.phy_addr;
  3657. break;
  3658. case SIOCGMIIREG:
  3659. if (!capable(CAP_NET_ADMIN))
  3660. return -EPERM;
  3661. spin_lock_irqsave(&adapter->stats_lock, flags);
  3662. if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3663. &data->val_out)) {
  3664. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3665. return -EIO;
  3666. }
  3667. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3668. break;
  3669. case SIOCSMIIREG:
  3670. if (!capable(CAP_NET_ADMIN))
  3671. return -EPERM;
  3672. if (data->reg_num & ~(0x1F))
  3673. return -EFAULT;
  3674. mii_reg = data->val_in;
  3675. spin_lock_irqsave(&adapter->stats_lock, flags);
  3676. if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3677. mii_reg)) {
  3678. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3679. return -EIO;
  3680. }
  3681. if (adapter->hw.media_type == e1000_media_type_copper) {
  3682. switch (data->reg_num) {
  3683. case PHY_CTRL:
  3684. if (mii_reg & MII_CR_POWER_DOWN)
  3685. break;
  3686. if (mii_reg & MII_CR_AUTO_NEG_EN) {
  3687. adapter->hw.autoneg = 1;
  3688. adapter->hw.autoneg_advertised = 0x2F;
  3689. } else {
  3690. if (mii_reg & 0x40)
  3691. spddplx = SPEED_1000;
  3692. else if (mii_reg & 0x2000)
  3693. spddplx = SPEED_100;
  3694. else
  3695. spddplx = SPEED_10;
  3696. spddplx += (mii_reg & 0x100)
  3697. ? DUPLEX_FULL :
  3698. DUPLEX_HALF;
  3699. retval = e1000_set_spd_dplx(adapter,
  3700. spddplx);
  3701. if (retval) {
  3702. spin_unlock_irqrestore(
  3703. &adapter->stats_lock,
  3704. flags);
  3705. return retval;
  3706. }
  3707. }
  3708. if (netif_running(adapter->netdev))
  3709. e1000_reinit_locked(adapter);
  3710. else
  3711. e1000_reset(adapter);
  3712. break;
  3713. case M88E1000_PHY_SPEC_CTRL:
  3714. case M88E1000_EXT_PHY_SPEC_CTRL:
  3715. if (e1000_phy_reset(&adapter->hw)) {
  3716. spin_unlock_irqrestore(
  3717. &adapter->stats_lock, flags);
  3718. return -EIO;
  3719. }
  3720. break;
  3721. }
  3722. } else {
  3723. switch (data->reg_num) {
  3724. case PHY_CTRL:
  3725. if (mii_reg & MII_CR_POWER_DOWN)
  3726. break;
  3727. if (netif_running(adapter->netdev))
  3728. e1000_reinit_locked(adapter);
  3729. else
  3730. e1000_reset(adapter);
  3731. break;
  3732. }
  3733. }
  3734. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3735. break;
  3736. default:
  3737. return -EOPNOTSUPP;
  3738. }
  3739. return E1000_SUCCESS;
  3740. }
  3741. void
  3742. e1000_pci_set_mwi(struct e1000_hw *hw)
  3743. {
  3744. struct e1000_adapter *adapter = hw->back;
  3745. int ret_val = pci_set_mwi(adapter->pdev);
  3746. if (ret_val)
  3747. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3748. }
  3749. void
  3750. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3751. {
  3752. struct e1000_adapter *adapter = hw->back;
  3753. pci_clear_mwi(adapter->pdev);
  3754. }
  3755. void
  3756. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3757. {
  3758. struct e1000_adapter *adapter = hw->back;
  3759. pci_read_config_word(adapter->pdev, reg, value);
  3760. }
  3761. void
  3762. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3763. {
  3764. struct e1000_adapter *adapter = hw->back;
  3765. pci_write_config_word(adapter->pdev, reg, *value);
  3766. }
  3767. #if 0
  3768. uint32_t
  3769. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3770. {
  3771. return inl(port);
  3772. }
  3773. #endif /* 0 */
  3774. void
  3775. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3776. {
  3777. outl(value, port);
  3778. }
  3779. static void
  3780. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3781. {
  3782. struct e1000_adapter *adapter = netdev_priv(netdev);
  3783. uint32_t ctrl, rctl;
  3784. e1000_irq_disable(adapter);
  3785. adapter->vlgrp = grp;
  3786. if (grp) {
  3787. /* enable VLAN tag insert/strip */
  3788. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3789. ctrl |= E1000_CTRL_VME;
  3790. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3791. if (adapter->hw.mac_type != e1000_ich8lan) {
  3792. /* enable VLAN receive filtering */
  3793. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3794. rctl |= E1000_RCTL_VFE;
  3795. rctl &= ~E1000_RCTL_CFIEN;
  3796. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3797. e1000_update_mng_vlan(adapter);
  3798. }
  3799. } else {
  3800. /* disable VLAN tag insert/strip */
  3801. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3802. ctrl &= ~E1000_CTRL_VME;
  3803. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3804. if (adapter->hw.mac_type != e1000_ich8lan) {
  3805. /* disable VLAN filtering */
  3806. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3807. rctl &= ~E1000_RCTL_VFE;
  3808. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3809. if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3810. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3811. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3812. }
  3813. }
  3814. }
  3815. e1000_irq_enable(adapter);
  3816. }
  3817. static void
  3818. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3819. {
  3820. struct e1000_adapter *adapter = netdev_priv(netdev);
  3821. uint32_t vfta, index;
  3822. if ((adapter->hw.mng_cookie.status &
  3823. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3824. (vid == adapter->mng_vlan_id))
  3825. return;
  3826. /* add VID to filter table */
  3827. index = (vid >> 5) & 0x7F;
  3828. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3829. vfta |= (1 << (vid & 0x1F));
  3830. e1000_write_vfta(&adapter->hw, index, vfta);
  3831. }
  3832. static void
  3833. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3834. {
  3835. struct e1000_adapter *adapter = netdev_priv(netdev);
  3836. uint32_t vfta, index;
  3837. e1000_irq_disable(adapter);
  3838. if (adapter->vlgrp)
  3839. adapter->vlgrp->vlan_devices[vid] = NULL;
  3840. e1000_irq_enable(adapter);
  3841. if ((adapter->hw.mng_cookie.status &
  3842. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3843. (vid == adapter->mng_vlan_id)) {
  3844. /* release control to f/w */
  3845. e1000_release_hw_control(adapter);
  3846. return;
  3847. }
  3848. /* remove VID from filter table */
  3849. index = (vid >> 5) & 0x7F;
  3850. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3851. vfta &= ~(1 << (vid & 0x1F));
  3852. e1000_write_vfta(&adapter->hw, index, vfta);
  3853. }
  3854. static void
  3855. e1000_restore_vlan(struct e1000_adapter *adapter)
  3856. {
  3857. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3858. if (adapter->vlgrp) {
  3859. uint16_t vid;
  3860. for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3861. if (!adapter->vlgrp->vlan_devices[vid])
  3862. continue;
  3863. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3864. }
  3865. }
  3866. }
  3867. int
  3868. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3869. {
  3870. adapter->hw.autoneg = 0;
  3871. /* Fiber NICs only allow 1000 gbps Full duplex */
  3872. if ((adapter->hw.media_type == e1000_media_type_fiber) &&
  3873. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3874. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3875. return -EINVAL;
  3876. }
  3877. switch (spddplx) {
  3878. case SPEED_10 + DUPLEX_HALF:
  3879. adapter->hw.forced_speed_duplex = e1000_10_half;
  3880. break;
  3881. case SPEED_10 + DUPLEX_FULL:
  3882. adapter->hw.forced_speed_duplex = e1000_10_full;
  3883. break;
  3884. case SPEED_100 + DUPLEX_HALF:
  3885. adapter->hw.forced_speed_duplex = e1000_100_half;
  3886. break;
  3887. case SPEED_100 + DUPLEX_FULL:
  3888. adapter->hw.forced_speed_duplex = e1000_100_full;
  3889. break;
  3890. case SPEED_1000 + DUPLEX_FULL:
  3891. adapter->hw.autoneg = 1;
  3892. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3893. break;
  3894. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3895. default:
  3896. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3897. return -EINVAL;
  3898. }
  3899. return 0;
  3900. }
  3901. #ifdef CONFIG_PM
  3902. /* Save/restore 16 or 64 dwords of PCI config space depending on which
  3903. * bus we're on (PCI(X) vs. PCI-E)
  3904. */
  3905. #define PCIE_CONFIG_SPACE_LEN 256
  3906. #define PCI_CONFIG_SPACE_LEN 64
  3907. static int
  3908. e1000_pci_save_state(struct e1000_adapter *adapter)
  3909. {
  3910. struct pci_dev *dev = adapter->pdev;
  3911. int size;
  3912. int i;
  3913. if (adapter->hw.mac_type >= e1000_82571)
  3914. size = PCIE_CONFIG_SPACE_LEN;
  3915. else
  3916. size = PCI_CONFIG_SPACE_LEN;
  3917. WARN_ON(adapter->config_space != NULL);
  3918. adapter->config_space = kmalloc(size, GFP_KERNEL);
  3919. if (!adapter->config_space) {
  3920. DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
  3921. return -ENOMEM;
  3922. }
  3923. for (i = 0; i < (size / 4); i++)
  3924. pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
  3925. return 0;
  3926. }
  3927. static void
  3928. e1000_pci_restore_state(struct e1000_adapter *adapter)
  3929. {
  3930. struct pci_dev *dev = adapter->pdev;
  3931. int size;
  3932. int i;
  3933. if (adapter->config_space == NULL)
  3934. return;
  3935. if (adapter->hw.mac_type >= e1000_82571)
  3936. size = PCIE_CONFIG_SPACE_LEN;
  3937. else
  3938. size = PCI_CONFIG_SPACE_LEN;
  3939. for (i = 0; i < (size / 4); i++)
  3940. pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
  3941. kfree(adapter->config_space);
  3942. adapter->config_space = NULL;
  3943. return;
  3944. }
  3945. #endif /* CONFIG_PM */
  3946. static int
  3947. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3948. {
  3949. struct net_device *netdev = pci_get_drvdata(pdev);
  3950. struct e1000_adapter *adapter = netdev_priv(netdev);
  3951. uint32_t ctrl, ctrl_ext, rctl, manc, status;
  3952. uint32_t wufc = adapter->wol;
  3953. #ifdef CONFIG_PM
  3954. int retval = 0;
  3955. #endif
  3956. netif_device_detach(netdev);
  3957. if (netif_running(netdev)) {
  3958. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  3959. e1000_down(adapter);
  3960. }
  3961. #ifdef CONFIG_PM
  3962. /* Implement our own version of pci_save_state(pdev) because pci-
  3963. * express adapters have 256-byte config spaces. */
  3964. retval = e1000_pci_save_state(adapter);
  3965. if (retval)
  3966. return retval;
  3967. #endif
  3968. status = E1000_READ_REG(&adapter->hw, STATUS);
  3969. if (status & E1000_STATUS_LU)
  3970. wufc &= ~E1000_WUFC_LNKC;
  3971. if (wufc) {
  3972. e1000_setup_rctl(adapter);
  3973. e1000_set_multi(netdev);
  3974. /* turn on all-multi mode if wake on multicast is enabled */
  3975. if (adapter->wol & E1000_WUFC_MC) {
  3976. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3977. rctl |= E1000_RCTL_MPE;
  3978. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3979. }
  3980. if (adapter->hw.mac_type >= e1000_82540) {
  3981. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3982. /* advertise wake from D3Cold */
  3983. #define E1000_CTRL_ADVD3WUC 0x00100000
  3984. /* phy power management enable */
  3985. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3986. ctrl |= E1000_CTRL_ADVD3WUC |
  3987. E1000_CTRL_EN_PHY_PWR_MGMT;
  3988. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3989. }
  3990. if (adapter->hw.media_type == e1000_media_type_fiber ||
  3991. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3992. /* keep the laser running in D3 */
  3993. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3994. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3995. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3996. }
  3997. /* Allow time for pending master requests to run */
  3998. e1000_disable_pciex_master(&adapter->hw);
  3999. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  4000. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  4001. pci_enable_wake(pdev, PCI_D3hot, 1);
  4002. pci_enable_wake(pdev, PCI_D3cold, 1);
  4003. } else {
  4004. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  4005. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  4006. pci_enable_wake(pdev, PCI_D3hot, 0);
  4007. pci_enable_wake(pdev, PCI_D3cold, 0);
  4008. }
  4009. /* FIXME: this code is incorrect for PCI Express */
  4010. if (adapter->hw.mac_type >= e1000_82540 &&
  4011. adapter->hw.mac_type != e1000_ich8lan &&
  4012. adapter->hw.media_type == e1000_media_type_copper) {
  4013. manc = E1000_READ_REG(&adapter->hw, MANC);
  4014. if (manc & E1000_MANC_SMBUS_EN) {
  4015. manc |= E1000_MANC_ARP_EN;
  4016. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4017. pci_enable_wake(pdev, PCI_D3hot, 1);
  4018. pci_enable_wake(pdev, PCI_D3cold, 1);
  4019. }
  4020. }
  4021. if (adapter->hw.phy_type == e1000_phy_igp_3)
  4022. e1000_phy_powerdown_workaround(&adapter->hw);
  4023. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  4024. * would have already happened in close and is redundant. */
  4025. e1000_release_hw_control(adapter);
  4026. pci_disable_device(pdev);
  4027. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  4028. return 0;
  4029. }
  4030. #ifdef CONFIG_PM
  4031. static int
  4032. e1000_resume(struct pci_dev *pdev)
  4033. {
  4034. struct net_device *netdev = pci_get_drvdata(pdev);
  4035. struct e1000_adapter *adapter = netdev_priv(netdev);
  4036. uint32_t manc, err;
  4037. pci_set_power_state(pdev, PCI_D0);
  4038. e1000_pci_restore_state(adapter);
  4039. if ((err = pci_enable_device(pdev))) {
  4040. printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
  4041. return err;
  4042. }
  4043. pci_set_master(pdev);
  4044. pci_enable_wake(pdev, PCI_D3hot, 0);
  4045. pci_enable_wake(pdev, PCI_D3cold, 0);
  4046. e1000_reset(adapter);
  4047. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  4048. if (netif_running(netdev))
  4049. e1000_up(adapter);
  4050. netif_device_attach(netdev);
  4051. /* FIXME: this code is incorrect for PCI Express */
  4052. if (adapter->hw.mac_type >= e1000_82540 &&
  4053. adapter->hw.mac_type != e1000_ich8lan &&
  4054. adapter->hw.media_type == e1000_media_type_copper) {
  4055. manc = E1000_READ_REG(&adapter->hw, MANC);
  4056. manc &= ~(E1000_MANC_ARP_EN);
  4057. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4058. }
  4059. /* If the controller is 82573 and f/w is AMT, do not set
  4060. * DRV_LOAD until the interface is up. For all other cases,
  4061. * let the f/w know that the h/w is now under the control
  4062. * of the driver. */
  4063. if (adapter->hw.mac_type != e1000_82573 ||
  4064. !e1000_check_mng_mode(&adapter->hw))
  4065. e1000_get_hw_control(adapter);
  4066. return 0;
  4067. }
  4068. #endif
  4069. static void e1000_shutdown(struct pci_dev *pdev)
  4070. {
  4071. e1000_suspend(pdev, PMSG_SUSPEND);
  4072. }
  4073. #ifdef CONFIG_NET_POLL_CONTROLLER
  4074. /*
  4075. * Polling 'interrupt' - used by things like netconsole to send skbs
  4076. * without having to re-enable interrupts. It's not called while
  4077. * the interrupt routine is executing.
  4078. */
  4079. static void
  4080. e1000_netpoll(struct net_device *netdev)
  4081. {
  4082. struct e1000_adapter *adapter = netdev_priv(netdev);
  4083. disable_irq(adapter->pdev->irq);
  4084. e1000_intr(adapter->pdev->irq, netdev, NULL);
  4085. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  4086. #ifndef CONFIG_E1000_NAPI
  4087. adapter->clean_rx(adapter, adapter->rx_ring);
  4088. #endif
  4089. enable_irq(adapter->pdev->irq);
  4090. }
  4091. #endif
  4092. /**
  4093. * e1000_io_error_detected - called when PCI error is detected
  4094. * @pdev: Pointer to PCI device
  4095. * @state: The current pci conneection state
  4096. *
  4097. * This function is called after a PCI bus error affecting
  4098. * this device has been detected.
  4099. */
  4100. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
  4101. {
  4102. struct net_device *netdev = pci_get_drvdata(pdev);
  4103. struct e1000_adapter *adapter = netdev->priv;
  4104. netif_device_detach(netdev);
  4105. if (netif_running(netdev))
  4106. e1000_down(adapter);
  4107. /* Request a slot slot reset. */
  4108. return PCI_ERS_RESULT_NEED_RESET;
  4109. }
  4110. /**
  4111. * e1000_io_slot_reset - called after the pci bus has been reset.
  4112. * @pdev: Pointer to PCI device
  4113. *
  4114. * Restart the card from scratch, as if from a cold-boot. Implementation
  4115. * resembles the first-half of the e1000_resume routine.
  4116. */
  4117. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
  4118. {
  4119. struct net_device *netdev = pci_get_drvdata(pdev);
  4120. struct e1000_adapter *adapter = netdev->priv;
  4121. if (pci_enable_device(pdev)) {
  4122. printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
  4123. return PCI_ERS_RESULT_DISCONNECT;
  4124. }
  4125. pci_set_master(pdev);
  4126. pci_enable_wake(pdev, 3, 0);
  4127. pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
  4128. /* Perform card reset only on one instance of the card */
  4129. if (PCI_FUNC (pdev->devfn) != 0)
  4130. return PCI_ERS_RESULT_RECOVERED;
  4131. e1000_reset(adapter);
  4132. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  4133. return PCI_ERS_RESULT_RECOVERED;
  4134. }
  4135. /**
  4136. * e1000_io_resume - called when traffic can start flowing again.
  4137. * @pdev: Pointer to PCI device
  4138. *
  4139. * This callback is called when the error recovery driver tells us that
  4140. * its OK to resume normal operation. Implementation resembles the
  4141. * second-half of the e1000_resume routine.
  4142. */
  4143. static void e1000_io_resume(struct pci_dev *pdev)
  4144. {
  4145. struct net_device *netdev = pci_get_drvdata(pdev);
  4146. struct e1000_adapter *adapter = netdev->priv;
  4147. uint32_t manc, swsm;
  4148. if (netif_running(netdev)) {
  4149. if (e1000_up(adapter)) {
  4150. printk("e1000: can't bring device back up after reset\n");
  4151. return;
  4152. }
  4153. }
  4154. netif_device_attach(netdev);
  4155. if (adapter->hw.mac_type >= e1000_82540 &&
  4156. adapter->hw.media_type == e1000_media_type_copper) {
  4157. manc = E1000_READ_REG(&adapter->hw, MANC);
  4158. manc &= ~(E1000_MANC_ARP_EN);
  4159. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4160. }
  4161. switch (adapter->hw.mac_type) {
  4162. case e1000_82573:
  4163. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  4164. E1000_WRITE_REG(&adapter->hw, SWSM,
  4165. swsm | E1000_SWSM_DRV_LOAD);
  4166. break;
  4167. default:
  4168. break;
  4169. }
  4170. if (netif_running(netdev))
  4171. mod_timer(&adapter->watchdog_timer, jiffies);
  4172. }
  4173. /* e1000_main.c */