pci-sysfs.c 27 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/topology.h>
  21. #include <linux/mm.h>
  22. #include <linux/capability.h>
  23. #include <linux/pci-aspm.h>
  24. #include "pci.h"
  25. static int sysfs_initialized; /* = 0 */
  26. /* show configuration fields */
  27. #define pci_config_attr(field, format_string) \
  28. static ssize_t \
  29. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  30. { \
  31. struct pci_dev *pdev; \
  32. \
  33. pdev = to_pci_dev (dev); \
  34. return sprintf (buf, format_string, pdev->field); \
  35. }
  36. pci_config_attr(vendor, "0x%04x\n");
  37. pci_config_attr(device, "0x%04x\n");
  38. pci_config_attr(subsystem_vendor, "0x%04x\n");
  39. pci_config_attr(subsystem_device, "0x%04x\n");
  40. pci_config_attr(class, "0x%06x\n");
  41. pci_config_attr(irq, "%u\n");
  42. static ssize_t broken_parity_status_show(struct device *dev,
  43. struct device_attribute *attr,
  44. char *buf)
  45. {
  46. struct pci_dev *pdev = to_pci_dev(dev);
  47. return sprintf (buf, "%u\n", pdev->broken_parity_status);
  48. }
  49. static ssize_t broken_parity_status_store(struct device *dev,
  50. struct device_attribute *attr,
  51. const char *buf, size_t count)
  52. {
  53. struct pci_dev *pdev = to_pci_dev(dev);
  54. unsigned long val;
  55. if (strict_strtoul(buf, 0, &val) < 0)
  56. return -EINVAL;
  57. pdev->broken_parity_status = !!val;
  58. return count;
  59. }
  60. static ssize_t local_cpus_show(struct device *dev,
  61. struct device_attribute *attr, char *buf)
  62. {
  63. const struct cpumask *mask;
  64. int len;
  65. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  66. len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
  67. buf[len++] = '\n';
  68. buf[len] = '\0';
  69. return len;
  70. }
  71. static ssize_t local_cpulist_show(struct device *dev,
  72. struct device_attribute *attr, char *buf)
  73. {
  74. const struct cpumask *mask;
  75. int len;
  76. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  77. len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
  78. buf[len++] = '\n';
  79. buf[len] = '\0';
  80. return len;
  81. }
  82. /* show resources */
  83. static ssize_t
  84. resource_show(struct device * dev, struct device_attribute *attr, char * buf)
  85. {
  86. struct pci_dev * pci_dev = to_pci_dev(dev);
  87. char * str = buf;
  88. int i;
  89. int max;
  90. resource_size_t start, end;
  91. if (pci_dev->subordinate)
  92. max = DEVICE_COUNT_RESOURCE;
  93. else
  94. max = PCI_BRIDGE_RESOURCES;
  95. for (i = 0; i < max; i++) {
  96. struct resource *res = &pci_dev->resource[i];
  97. pci_resource_to_user(pci_dev, i, res, &start, &end);
  98. str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
  99. (unsigned long long)start,
  100. (unsigned long long)end,
  101. (unsigned long long)res->flags);
  102. }
  103. return (str - buf);
  104. }
  105. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
  106. {
  107. struct pci_dev *pci_dev = to_pci_dev(dev);
  108. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
  109. pci_dev->vendor, pci_dev->device,
  110. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  111. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  112. (u8)(pci_dev->class));
  113. }
  114. static ssize_t is_enabled_store(struct device *dev,
  115. struct device_attribute *attr, const char *buf,
  116. size_t count)
  117. {
  118. struct pci_dev *pdev = to_pci_dev(dev);
  119. unsigned long val;
  120. ssize_t result = strict_strtoul(buf, 0, &val);
  121. if (result < 0)
  122. return result;
  123. /* this can crash the machine when done on the "wrong" device */
  124. if (!capable(CAP_SYS_ADMIN))
  125. return -EPERM;
  126. if (!val) {
  127. if (atomic_read(&pdev->enable_cnt) != 0)
  128. pci_disable_device(pdev);
  129. else
  130. result = -EIO;
  131. } else
  132. result = pci_enable_device(pdev);
  133. return result < 0 ? result : count;
  134. }
  135. static ssize_t is_enabled_show(struct device *dev,
  136. struct device_attribute *attr, char *buf)
  137. {
  138. struct pci_dev *pdev;
  139. pdev = to_pci_dev (dev);
  140. return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
  141. }
  142. #ifdef CONFIG_NUMA
  143. static ssize_t
  144. numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
  145. {
  146. return sprintf (buf, "%d\n", dev->numa_node);
  147. }
  148. #endif
  149. static ssize_t
  150. msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
  151. {
  152. struct pci_dev *pdev = to_pci_dev(dev);
  153. if (!pdev->subordinate)
  154. return 0;
  155. return sprintf (buf, "%u\n",
  156. !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
  157. }
  158. static ssize_t
  159. msi_bus_store(struct device *dev, struct device_attribute *attr,
  160. const char *buf, size_t count)
  161. {
  162. struct pci_dev *pdev = to_pci_dev(dev);
  163. unsigned long val;
  164. if (strict_strtoul(buf, 0, &val) < 0)
  165. return -EINVAL;
  166. /* bad things may happen if the no_msi flag is changed
  167. * while some drivers are loaded */
  168. if (!capable(CAP_SYS_ADMIN))
  169. return -EPERM;
  170. /* Maybe pci devices without subordinate busses shouldn't even have this
  171. * attribute in the first place? */
  172. if (!pdev->subordinate)
  173. return count;
  174. /* Is the flag going to change, or keep the value it already had? */
  175. if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
  176. !!val) {
  177. pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
  178. dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
  179. " bad things could happen\n", val ? "" : " not");
  180. }
  181. return count;
  182. }
  183. #ifdef CONFIG_HOTPLUG
  184. static DEFINE_MUTEX(pci_remove_rescan_mutex);
  185. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  186. size_t count)
  187. {
  188. unsigned long val;
  189. struct pci_bus *b = NULL;
  190. if (strict_strtoul(buf, 0, &val) < 0)
  191. return -EINVAL;
  192. if (val) {
  193. mutex_lock(&pci_remove_rescan_mutex);
  194. while ((b = pci_find_next_bus(b)) != NULL)
  195. pci_rescan_bus(b);
  196. mutex_unlock(&pci_remove_rescan_mutex);
  197. }
  198. return count;
  199. }
  200. struct bus_attribute pci_bus_attrs[] = {
  201. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
  202. __ATTR_NULL
  203. };
  204. static ssize_t
  205. dev_rescan_store(struct device *dev, struct device_attribute *attr,
  206. const char *buf, size_t count)
  207. {
  208. unsigned long val;
  209. struct pci_dev *pdev = to_pci_dev(dev);
  210. if (strict_strtoul(buf, 0, &val) < 0)
  211. return -EINVAL;
  212. if (val) {
  213. mutex_lock(&pci_remove_rescan_mutex);
  214. pci_rescan_bus(pdev->bus);
  215. mutex_unlock(&pci_remove_rescan_mutex);
  216. }
  217. return count;
  218. }
  219. static void remove_callback(struct device *dev)
  220. {
  221. struct pci_dev *pdev = to_pci_dev(dev);
  222. mutex_lock(&pci_remove_rescan_mutex);
  223. pci_remove_bus_device(pdev);
  224. mutex_unlock(&pci_remove_rescan_mutex);
  225. }
  226. static ssize_t
  227. remove_store(struct device *dev, struct device_attribute *dummy,
  228. const char *buf, size_t count)
  229. {
  230. int ret = 0;
  231. unsigned long val;
  232. struct pci_dev *pdev = to_pci_dev(dev);
  233. if (strict_strtoul(buf, 0, &val) < 0)
  234. return -EINVAL;
  235. if (pci_is_root_bus(pdev->bus))
  236. return -EBUSY;
  237. /* An attribute cannot be unregistered by one of its own methods,
  238. * so we have to use this roundabout approach.
  239. */
  240. if (val)
  241. ret = device_schedule_callback(dev, remove_callback);
  242. if (ret)
  243. count = ret;
  244. return count;
  245. }
  246. #endif
  247. struct device_attribute pci_dev_attrs[] = {
  248. __ATTR_RO(resource),
  249. __ATTR_RO(vendor),
  250. __ATTR_RO(device),
  251. __ATTR_RO(subsystem_vendor),
  252. __ATTR_RO(subsystem_device),
  253. __ATTR_RO(class),
  254. __ATTR_RO(irq),
  255. __ATTR_RO(local_cpus),
  256. __ATTR_RO(local_cpulist),
  257. __ATTR_RO(modalias),
  258. #ifdef CONFIG_NUMA
  259. __ATTR_RO(numa_node),
  260. #endif
  261. __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
  262. __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
  263. broken_parity_status_show,broken_parity_status_store),
  264. __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
  265. #ifdef CONFIG_HOTPLUG
  266. __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store),
  267. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store),
  268. #endif
  269. __ATTR_NULL,
  270. };
  271. static ssize_t
  272. boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
  273. {
  274. struct pci_dev *pdev = to_pci_dev(dev);
  275. return sprintf(buf, "%u\n",
  276. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  277. IORESOURCE_ROM_SHADOW));
  278. }
  279. struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  280. static ssize_t
  281. pci_read_config(struct kobject *kobj, struct bin_attribute *bin_attr,
  282. char *buf, loff_t off, size_t count)
  283. {
  284. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  285. unsigned int size = 64;
  286. loff_t init_off = off;
  287. u8 *data = (u8*) buf;
  288. /* Several chips lock up trying to read undefined config space */
  289. if (capable(CAP_SYS_ADMIN)) {
  290. size = dev->cfg_size;
  291. } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
  292. size = 128;
  293. }
  294. if (off > size)
  295. return 0;
  296. if (off + count > size) {
  297. size -= off;
  298. count = size;
  299. } else {
  300. size = count;
  301. }
  302. if ((off & 1) && size) {
  303. u8 val;
  304. pci_user_read_config_byte(dev, off, &val);
  305. data[off - init_off] = val;
  306. off++;
  307. size--;
  308. }
  309. if ((off & 3) && size > 2) {
  310. u16 val;
  311. pci_user_read_config_word(dev, off, &val);
  312. data[off - init_off] = val & 0xff;
  313. data[off - init_off + 1] = (val >> 8) & 0xff;
  314. off += 2;
  315. size -= 2;
  316. }
  317. while (size > 3) {
  318. u32 val;
  319. pci_user_read_config_dword(dev, off, &val);
  320. data[off - init_off] = val & 0xff;
  321. data[off - init_off + 1] = (val >> 8) & 0xff;
  322. data[off - init_off + 2] = (val >> 16) & 0xff;
  323. data[off - init_off + 3] = (val >> 24) & 0xff;
  324. off += 4;
  325. size -= 4;
  326. }
  327. if (size >= 2) {
  328. u16 val;
  329. pci_user_read_config_word(dev, off, &val);
  330. data[off - init_off] = val & 0xff;
  331. data[off - init_off + 1] = (val >> 8) & 0xff;
  332. off += 2;
  333. size -= 2;
  334. }
  335. if (size > 0) {
  336. u8 val;
  337. pci_user_read_config_byte(dev, off, &val);
  338. data[off - init_off] = val;
  339. off++;
  340. --size;
  341. }
  342. return count;
  343. }
  344. static ssize_t
  345. pci_write_config(struct kobject *kobj, struct bin_attribute *bin_attr,
  346. char *buf, loff_t off, size_t count)
  347. {
  348. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  349. unsigned int size = count;
  350. loff_t init_off = off;
  351. u8 *data = (u8*) buf;
  352. if (off > dev->cfg_size)
  353. return 0;
  354. if (off + count > dev->cfg_size) {
  355. size = dev->cfg_size - off;
  356. count = size;
  357. }
  358. if ((off & 1) && size) {
  359. pci_user_write_config_byte(dev, off, data[off - init_off]);
  360. off++;
  361. size--;
  362. }
  363. if ((off & 3) && size > 2) {
  364. u16 val = data[off - init_off];
  365. val |= (u16) data[off - init_off + 1] << 8;
  366. pci_user_write_config_word(dev, off, val);
  367. off += 2;
  368. size -= 2;
  369. }
  370. while (size > 3) {
  371. u32 val = data[off - init_off];
  372. val |= (u32) data[off - init_off + 1] << 8;
  373. val |= (u32) data[off - init_off + 2] << 16;
  374. val |= (u32) data[off - init_off + 3] << 24;
  375. pci_user_write_config_dword(dev, off, val);
  376. off += 4;
  377. size -= 4;
  378. }
  379. if (size >= 2) {
  380. u16 val = data[off - init_off];
  381. val |= (u16) data[off - init_off + 1] << 8;
  382. pci_user_write_config_word(dev, off, val);
  383. off += 2;
  384. size -= 2;
  385. }
  386. if (size) {
  387. pci_user_write_config_byte(dev, off, data[off - init_off]);
  388. off++;
  389. --size;
  390. }
  391. return count;
  392. }
  393. static ssize_t
  394. read_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
  395. char *buf, loff_t off, size_t count)
  396. {
  397. struct pci_dev *dev =
  398. to_pci_dev(container_of(kobj, struct device, kobj));
  399. if (off > bin_attr->size)
  400. count = 0;
  401. else if (count > bin_attr->size - off)
  402. count = bin_attr->size - off;
  403. return pci_read_vpd(dev, off, count, buf);
  404. }
  405. static ssize_t
  406. write_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
  407. char *buf, loff_t off, size_t count)
  408. {
  409. struct pci_dev *dev =
  410. to_pci_dev(container_of(kobj, struct device, kobj));
  411. if (off > bin_attr->size)
  412. count = 0;
  413. else if (count > bin_attr->size - off)
  414. count = bin_attr->size - off;
  415. return pci_write_vpd(dev, off, count, buf);
  416. }
  417. #ifdef HAVE_PCI_LEGACY
  418. /**
  419. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  420. * @kobj: kobject corresponding to file to read from
  421. * @buf: buffer to store results
  422. * @off: offset into legacy I/O port space
  423. * @count: number of bytes to read
  424. *
  425. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  426. * callback routine (pci_legacy_read).
  427. */
  428. static ssize_t
  429. pci_read_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
  430. char *buf, loff_t off, size_t count)
  431. {
  432. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  433. struct device,
  434. kobj));
  435. /* Only support 1, 2 or 4 byte accesses */
  436. if (count != 1 && count != 2 && count != 4)
  437. return -EINVAL;
  438. return pci_legacy_read(bus, off, (u32 *)buf, count);
  439. }
  440. /**
  441. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  442. * @kobj: kobject corresponding to file to read from
  443. * @buf: buffer containing value to be written
  444. * @off: offset into legacy I/O port space
  445. * @count: number of bytes to write
  446. *
  447. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  448. * callback routine (pci_legacy_write).
  449. */
  450. static ssize_t
  451. pci_write_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
  452. char *buf, loff_t off, size_t count)
  453. {
  454. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  455. struct device,
  456. kobj));
  457. /* Only support 1, 2 or 4 byte accesses */
  458. if (count != 1 && count != 2 && count != 4)
  459. return -EINVAL;
  460. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  461. }
  462. /**
  463. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  464. * @kobj: kobject corresponding to device to be mapped
  465. * @attr: struct bin_attribute for this file
  466. * @vma: struct vm_area_struct passed to mmap
  467. *
  468. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  469. * legacy memory space (first meg of bus space) into application virtual
  470. * memory space.
  471. */
  472. static int
  473. pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
  474. struct vm_area_struct *vma)
  475. {
  476. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  477. struct device,
  478. kobj));
  479. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  480. }
  481. /**
  482. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  483. * @kobj: kobject corresponding to device to be mapped
  484. * @attr: struct bin_attribute for this file
  485. * @vma: struct vm_area_struct passed to mmap
  486. *
  487. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  488. * legacy IO space (first meg of bus space) into application virtual
  489. * memory space. Returns -ENOSYS if the operation isn't supported
  490. */
  491. static int
  492. pci_mmap_legacy_io(struct kobject *kobj, struct bin_attribute *attr,
  493. struct vm_area_struct *vma)
  494. {
  495. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  496. struct device,
  497. kobj));
  498. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  499. }
  500. /**
  501. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  502. * @b: bus to create files under
  503. * @mmap_type: I/O port or memory
  504. *
  505. * Stub implementation. Can be overridden by arch if necessary.
  506. */
  507. void __weak
  508. pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
  509. {
  510. return;
  511. }
  512. /**
  513. * pci_create_legacy_files - create legacy I/O port and memory files
  514. * @b: bus to create files under
  515. *
  516. * Some platforms allow access to legacy I/O port and ISA memory space on
  517. * a per-bus basis. This routine creates the files and ties them into
  518. * their associated read, write and mmap files from pci-sysfs.c
  519. *
  520. * On error unwind, but don't propogate the error to the caller
  521. * as it is ok to set up the PCI bus without these files.
  522. */
  523. void pci_create_legacy_files(struct pci_bus *b)
  524. {
  525. int error;
  526. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  527. GFP_ATOMIC);
  528. if (!b->legacy_io)
  529. goto kzalloc_err;
  530. b->legacy_io->attr.name = "legacy_io";
  531. b->legacy_io->size = 0xffff;
  532. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  533. b->legacy_io->read = pci_read_legacy_io;
  534. b->legacy_io->write = pci_write_legacy_io;
  535. b->legacy_io->mmap = pci_mmap_legacy_io;
  536. pci_adjust_legacy_attr(b, pci_mmap_io);
  537. error = device_create_bin_file(&b->dev, b->legacy_io);
  538. if (error)
  539. goto legacy_io_err;
  540. /* Allocated above after the legacy_io struct */
  541. b->legacy_mem = b->legacy_io + 1;
  542. b->legacy_mem->attr.name = "legacy_mem";
  543. b->legacy_mem->size = 1024*1024;
  544. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  545. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  546. pci_adjust_legacy_attr(b, pci_mmap_mem);
  547. error = device_create_bin_file(&b->dev, b->legacy_mem);
  548. if (error)
  549. goto legacy_mem_err;
  550. return;
  551. legacy_mem_err:
  552. device_remove_bin_file(&b->dev, b->legacy_io);
  553. legacy_io_err:
  554. kfree(b->legacy_io);
  555. b->legacy_io = NULL;
  556. kzalloc_err:
  557. printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
  558. "and ISA memory resources to sysfs\n");
  559. return;
  560. }
  561. void pci_remove_legacy_files(struct pci_bus *b)
  562. {
  563. if (b->legacy_io) {
  564. device_remove_bin_file(&b->dev, b->legacy_io);
  565. device_remove_bin_file(&b->dev, b->legacy_mem);
  566. kfree(b->legacy_io); /* both are allocated here */
  567. }
  568. }
  569. #endif /* HAVE_PCI_LEGACY */
  570. #ifdef HAVE_PCI_MMAP
  571. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma)
  572. {
  573. unsigned long nr, start, size;
  574. nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
  575. start = vma->vm_pgoff;
  576. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  577. if (start < size && size - start >= nr)
  578. return 1;
  579. WARN(1, "process \"%s\" tried to map 0x%08lx-0x%08lx on %s BAR %d (size 0x%08lx)\n",
  580. current->comm, start, start+nr, pci_name(pdev), resno, size);
  581. return 0;
  582. }
  583. /**
  584. * pci_mmap_resource - map a PCI resource into user memory space
  585. * @kobj: kobject for mapping
  586. * @attr: struct bin_attribute for the file being mapped
  587. * @vma: struct vm_area_struct passed into the mmap
  588. * @write_combine: 1 for write_combine mapping
  589. *
  590. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  591. */
  592. static int
  593. pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  594. struct vm_area_struct *vma, int write_combine)
  595. {
  596. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  597. struct device, kobj));
  598. struct resource *res = (struct resource *)attr->private;
  599. enum pci_mmap_state mmap_type;
  600. resource_size_t start, end;
  601. int i;
  602. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  603. if (res == &pdev->resource[i])
  604. break;
  605. if (i >= PCI_ROM_RESOURCE)
  606. return -ENODEV;
  607. if (!pci_mmap_fits(pdev, i, vma))
  608. return -EINVAL;
  609. /* pci_mmap_page_range() expects the same kind of entry as coming
  610. * from /proc/bus/pci/ which is a "user visible" value. If this is
  611. * different from the resource itself, arch will do necessary fixup.
  612. */
  613. pci_resource_to_user(pdev, i, res, &start, &end);
  614. vma->vm_pgoff += start >> PAGE_SHIFT;
  615. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  616. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
  617. return -EINVAL;
  618. return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
  619. }
  620. static int
  621. pci_mmap_resource_uc(struct kobject *kobj, struct bin_attribute *attr,
  622. struct vm_area_struct *vma)
  623. {
  624. return pci_mmap_resource(kobj, attr, vma, 0);
  625. }
  626. static int
  627. pci_mmap_resource_wc(struct kobject *kobj, struct bin_attribute *attr,
  628. struct vm_area_struct *vma)
  629. {
  630. return pci_mmap_resource(kobj, attr, vma, 1);
  631. }
  632. /**
  633. * pci_remove_resource_files - cleanup resource files
  634. * @dev: dev to cleanup
  635. *
  636. * If we created resource files for @dev, remove them from sysfs and
  637. * free their resources.
  638. */
  639. static void
  640. pci_remove_resource_files(struct pci_dev *pdev)
  641. {
  642. int i;
  643. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  644. struct bin_attribute *res_attr;
  645. res_attr = pdev->res_attr[i];
  646. if (res_attr) {
  647. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  648. kfree(res_attr);
  649. }
  650. res_attr = pdev->res_attr_wc[i];
  651. if (res_attr) {
  652. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  653. kfree(res_attr);
  654. }
  655. }
  656. }
  657. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  658. {
  659. /* allocate attribute structure, piggyback attribute name */
  660. int name_len = write_combine ? 13 : 10;
  661. struct bin_attribute *res_attr;
  662. int retval;
  663. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  664. if (res_attr) {
  665. char *res_attr_name = (char *)(res_attr + 1);
  666. if (write_combine) {
  667. pdev->res_attr_wc[num] = res_attr;
  668. sprintf(res_attr_name, "resource%d_wc", num);
  669. res_attr->mmap = pci_mmap_resource_wc;
  670. } else {
  671. pdev->res_attr[num] = res_attr;
  672. sprintf(res_attr_name, "resource%d", num);
  673. res_attr->mmap = pci_mmap_resource_uc;
  674. }
  675. res_attr->attr.name = res_attr_name;
  676. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  677. res_attr->size = pci_resource_len(pdev, num);
  678. res_attr->private = &pdev->resource[num];
  679. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  680. } else
  681. retval = -ENOMEM;
  682. return retval;
  683. }
  684. /**
  685. * pci_create_resource_files - create resource files in sysfs for @dev
  686. * @dev: dev in question
  687. *
  688. * Walk the resources in @dev creating files for each resource available.
  689. */
  690. static int pci_create_resource_files(struct pci_dev *pdev)
  691. {
  692. int i;
  693. int retval;
  694. /* Expose the PCI resources from this device as files */
  695. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  696. /* skip empty resources */
  697. if (!pci_resource_len(pdev, i))
  698. continue;
  699. retval = pci_create_attr(pdev, i, 0);
  700. /* for prefetchable resources, create a WC mappable file */
  701. if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
  702. retval = pci_create_attr(pdev, i, 1);
  703. if (retval) {
  704. pci_remove_resource_files(pdev);
  705. return retval;
  706. }
  707. }
  708. return 0;
  709. }
  710. #else /* !HAVE_PCI_MMAP */
  711. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  712. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  713. #endif /* HAVE_PCI_MMAP */
  714. /**
  715. * pci_write_rom - used to enable access to the PCI ROM display
  716. * @kobj: kernel object handle
  717. * @buf: user input
  718. * @off: file offset
  719. * @count: number of byte in input
  720. *
  721. * writing anything except 0 enables it
  722. */
  723. static ssize_t
  724. pci_write_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
  725. char *buf, loff_t off, size_t count)
  726. {
  727. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  728. if ((off == 0) && (*buf == '0') && (count == 2))
  729. pdev->rom_attr_enabled = 0;
  730. else
  731. pdev->rom_attr_enabled = 1;
  732. return count;
  733. }
  734. /**
  735. * pci_read_rom - read a PCI ROM
  736. * @kobj: kernel object handle
  737. * @buf: where to put the data we read from the ROM
  738. * @off: file offset
  739. * @count: number of bytes to read
  740. *
  741. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  742. * device corresponding to @kobj.
  743. */
  744. static ssize_t
  745. pci_read_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
  746. char *buf, loff_t off, size_t count)
  747. {
  748. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  749. void __iomem *rom;
  750. size_t size;
  751. if (!pdev->rom_attr_enabled)
  752. return -EINVAL;
  753. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  754. if (!rom || !size)
  755. return -EIO;
  756. if (off >= size)
  757. count = 0;
  758. else {
  759. if (off + count > size)
  760. count = size - off;
  761. memcpy_fromio(buf, rom + off, count);
  762. }
  763. pci_unmap_rom(pdev, rom);
  764. return count;
  765. }
  766. static struct bin_attribute pci_config_attr = {
  767. .attr = {
  768. .name = "config",
  769. .mode = S_IRUGO | S_IWUSR,
  770. },
  771. .size = PCI_CFG_SPACE_SIZE,
  772. .read = pci_read_config,
  773. .write = pci_write_config,
  774. };
  775. static struct bin_attribute pcie_config_attr = {
  776. .attr = {
  777. .name = "config",
  778. .mode = S_IRUGO | S_IWUSR,
  779. },
  780. .size = PCI_CFG_SPACE_EXP_SIZE,
  781. .read = pci_read_config,
  782. .write = pci_write_config,
  783. };
  784. int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
  785. {
  786. return 0;
  787. }
  788. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  789. {
  790. int retval;
  791. struct bin_attribute *attr;
  792. /* If the device has VPD, try to expose it in sysfs. */
  793. if (dev->vpd) {
  794. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  795. if (!attr)
  796. return -ENOMEM;
  797. attr->size = dev->vpd->len;
  798. attr->attr.name = "vpd";
  799. attr->attr.mode = S_IRUSR | S_IWUSR;
  800. attr->read = read_vpd_attr;
  801. attr->write = write_vpd_attr;
  802. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  803. if (retval) {
  804. kfree(dev->vpd->attr);
  805. return retval;
  806. }
  807. dev->vpd->attr = attr;
  808. }
  809. /* Active State Power Management */
  810. pcie_aspm_create_sysfs_dev_files(dev);
  811. return 0;
  812. }
  813. int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
  814. {
  815. int retval;
  816. int rom_size = 0;
  817. struct bin_attribute *attr;
  818. if (!sysfs_initialized)
  819. return -EACCES;
  820. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  821. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  822. else
  823. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  824. if (retval)
  825. goto err;
  826. retval = pci_create_resource_files(pdev);
  827. if (retval)
  828. goto err_config_file;
  829. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  830. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  831. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  832. rom_size = 0x20000;
  833. /* If the device has a ROM, try to expose it in sysfs. */
  834. if (rom_size) {
  835. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  836. if (!attr) {
  837. retval = -ENOMEM;
  838. goto err_resource_files;
  839. }
  840. attr->size = rom_size;
  841. attr->attr.name = "rom";
  842. attr->attr.mode = S_IRUSR;
  843. attr->read = pci_read_rom;
  844. attr->write = pci_write_rom;
  845. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  846. if (retval) {
  847. kfree(attr);
  848. goto err_resource_files;
  849. }
  850. pdev->rom_attr = attr;
  851. }
  852. if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
  853. retval = device_create_file(&pdev->dev, &vga_attr);
  854. if (retval)
  855. goto err_rom_file;
  856. }
  857. /* add platform-specific attributes */
  858. retval = pcibios_add_platform_entries(pdev);
  859. if (retval)
  860. goto err_vga_file;
  861. /* add sysfs entries for various capabilities */
  862. retval = pci_create_capabilities_sysfs(pdev);
  863. if (retval)
  864. goto err_vga_file;
  865. return 0;
  866. err_vga_file:
  867. if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
  868. device_remove_file(&pdev->dev, &vga_attr);
  869. err_rom_file:
  870. if (rom_size) {
  871. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  872. kfree(pdev->rom_attr);
  873. pdev->rom_attr = NULL;
  874. }
  875. err_resource_files:
  876. pci_remove_resource_files(pdev);
  877. err_config_file:
  878. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  879. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  880. else
  881. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  882. err:
  883. return retval;
  884. }
  885. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  886. {
  887. if (dev->vpd && dev->vpd->attr) {
  888. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  889. kfree(dev->vpd->attr);
  890. }
  891. pcie_aspm_remove_sysfs_dev_files(dev);
  892. }
  893. /**
  894. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  895. * @pdev: device whose entries we should free
  896. *
  897. * Cleanup when @pdev is removed from sysfs.
  898. */
  899. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  900. {
  901. int rom_size = 0;
  902. if (!sysfs_initialized)
  903. return;
  904. pci_remove_capabilities_sysfs(pdev);
  905. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  906. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  907. else
  908. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  909. pci_remove_resource_files(pdev);
  910. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  911. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  912. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  913. rom_size = 0x20000;
  914. if (rom_size && pdev->rom_attr) {
  915. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  916. kfree(pdev->rom_attr);
  917. }
  918. }
  919. static int __init pci_sysfs_init(void)
  920. {
  921. struct pci_dev *pdev = NULL;
  922. int retval;
  923. sysfs_initialized = 1;
  924. for_each_pci_dev(pdev) {
  925. retval = pci_create_sysfs_dev_files(pdev);
  926. if (retval) {
  927. pci_dev_put(pdev);
  928. return retval;
  929. }
  930. }
  931. return 0;
  932. }
  933. late_initcall(pci_sysfs_init);