at91_adc.c 19 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783
  1. /*
  2. * Driver for the ADC present in the Atmel AT91 evaluation boards.
  3. *
  4. * Copyright 2011 Free Electrons
  5. *
  6. * Licensed under the GPLv2 or later.
  7. */
  8. #include <linux/bitmap.h>
  9. #include <linux/bitops.h>
  10. #include <linux/clk.h>
  11. #include <linux/err.h>
  12. #include <linux/io.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/jiffies.h>
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/of.h>
  18. #include <linux/of_device.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/sched.h>
  21. #include <linux/slab.h>
  22. #include <linux/wait.h>
  23. #include <linux/platform_data/at91_adc.h>
  24. #include <linux/iio/iio.h>
  25. #include <linux/iio/buffer.h>
  26. #include <linux/iio/trigger.h>
  27. #include <linux/iio/trigger_consumer.h>
  28. #include <linux/iio/triggered_buffer.h>
  29. #include <mach/at91_adc.h>
  30. #define AT91_ADC_CHAN(st, ch) \
  31. (st->registers->channel_base + (ch * 4))
  32. #define at91_adc_readl(st, reg) \
  33. (readl_relaxed(st->reg_base + reg))
  34. #define at91_adc_writel(st, reg, val) \
  35. (writel_relaxed(val, st->reg_base + reg))
  36. struct at91_adc_state {
  37. struct clk *adc_clk;
  38. u16 *buffer;
  39. unsigned long channels_mask;
  40. struct clk *clk;
  41. bool done;
  42. int irq;
  43. u16 last_value;
  44. struct mutex lock;
  45. u8 num_channels;
  46. void __iomem *reg_base;
  47. struct at91_adc_reg_desc *registers;
  48. u8 startup_time;
  49. bool sleep_mode;
  50. struct iio_trigger **trig;
  51. struct at91_adc_trigger *trigger_list;
  52. u32 trigger_number;
  53. bool use_external;
  54. u32 vref_mv;
  55. u32 res; /* resolution used for convertions */
  56. bool low_res; /* the resolution corresponds to the lowest one */
  57. wait_queue_head_t wq_data_avail;
  58. };
  59. static irqreturn_t at91_adc_trigger_handler(int irq, void *p)
  60. {
  61. struct iio_poll_func *pf = p;
  62. struct iio_dev *idev = pf->indio_dev;
  63. struct at91_adc_state *st = iio_priv(idev);
  64. int i, j = 0;
  65. for (i = 0; i < idev->masklength; i++) {
  66. if (!test_bit(i, idev->active_scan_mask))
  67. continue;
  68. st->buffer[j] = at91_adc_readl(st, AT91_ADC_CHAN(st, i));
  69. j++;
  70. }
  71. if (idev->scan_timestamp) {
  72. s64 *timestamp = (s64 *)((u8 *)st->buffer +
  73. ALIGN(j, sizeof(s64)));
  74. *timestamp = pf->timestamp;
  75. }
  76. iio_push_to_buffers(idev, (u8 *)st->buffer);
  77. iio_trigger_notify_done(idev->trig);
  78. /* Needed to ACK the DRDY interruption */
  79. at91_adc_readl(st, AT91_ADC_LCDR);
  80. enable_irq(st->irq);
  81. return IRQ_HANDLED;
  82. }
  83. static irqreturn_t at91_adc_eoc_trigger(int irq, void *private)
  84. {
  85. struct iio_dev *idev = private;
  86. struct at91_adc_state *st = iio_priv(idev);
  87. u32 status = at91_adc_readl(st, st->registers->status_register);
  88. if (!(status & st->registers->drdy_mask))
  89. return IRQ_HANDLED;
  90. if (iio_buffer_enabled(idev)) {
  91. disable_irq_nosync(irq);
  92. iio_trigger_poll(idev->trig, iio_get_time_ns());
  93. } else {
  94. st->last_value = at91_adc_readl(st, AT91_ADC_LCDR);
  95. st->done = true;
  96. wake_up_interruptible(&st->wq_data_avail);
  97. }
  98. return IRQ_HANDLED;
  99. }
  100. static int at91_adc_channel_init(struct iio_dev *idev)
  101. {
  102. struct at91_adc_state *st = iio_priv(idev);
  103. struct iio_chan_spec *chan_array, *timestamp;
  104. int bit, idx = 0;
  105. idev->num_channels = bitmap_weight(&st->channels_mask,
  106. st->num_channels) + 1;
  107. chan_array = devm_kzalloc(&idev->dev,
  108. ((idev->num_channels + 1) *
  109. sizeof(struct iio_chan_spec)),
  110. GFP_KERNEL);
  111. if (!chan_array)
  112. return -ENOMEM;
  113. for_each_set_bit(bit, &st->channels_mask, st->num_channels) {
  114. struct iio_chan_spec *chan = chan_array + idx;
  115. chan->type = IIO_VOLTAGE;
  116. chan->indexed = 1;
  117. chan->channel = bit;
  118. chan->scan_index = idx;
  119. chan->scan_type.sign = 'u';
  120. chan->scan_type.realbits = st->res;
  121. chan->scan_type.storagebits = 16;
  122. chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
  123. chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
  124. idx++;
  125. }
  126. timestamp = chan_array + idx;
  127. timestamp->type = IIO_TIMESTAMP;
  128. timestamp->channel = -1;
  129. timestamp->scan_index = idx;
  130. timestamp->scan_type.sign = 's';
  131. timestamp->scan_type.realbits = 64;
  132. timestamp->scan_type.storagebits = 64;
  133. idev->channels = chan_array;
  134. return idev->num_channels;
  135. }
  136. static u8 at91_adc_get_trigger_value_by_name(struct iio_dev *idev,
  137. struct at91_adc_trigger *triggers,
  138. const char *trigger_name)
  139. {
  140. struct at91_adc_state *st = iio_priv(idev);
  141. u8 value = 0;
  142. int i;
  143. for (i = 0; i < st->trigger_number; i++) {
  144. char *name = kasprintf(GFP_KERNEL,
  145. "%s-dev%d-%s",
  146. idev->name,
  147. idev->id,
  148. triggers[i].name);
  149. if (!name)
  150. return -ENOMEM;
  151. if (strcmp(trigger_name, name) == 0) {
  152. value = triggers[i].value;
  153. kfree(name);
  154. break;
  155. }
  156. kfree(name);
  157. }
  158. return value;
  159. }
  160. static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state)
  161. {
  162. struct iio_dev *idev = iio_trigger_get_drvdata(trig);
  163. struct at91_adc_state *st = iio_priv(idev);
  164. struct iio_buffer *buffer = idev->buffer;
  165. struct at91_adc_reg_desc *reg = st->registers;
  166. u32 status = at91_adc_readl(st, reg->trigger_register);
  167. u8 value;
  168. u8 bit;
  169. value = at91_adc_get_trigger_value_by_name(idev,
  170. st->trigger_list,
  171. idev->trig->name);
  172. if (value == 0)
  173. return -EINVAL;
  174. if (state) {
  175. st->buffer = kmalloc(idev->scan_bytes, GFP_KERNEL);
  176. if (st->buffer == NULL)
  177. return -ENOMEM;
  178. at91_adc_writel(st, reg->trigger_register,
  179. status | value);
  180. for_each_set_bit(bit, buffer->scan_mask,
  181. st->num_channels) {
  182. struct iio_chan_spec const *chan = idev->channels + bit;
  183. at91_adc_writel(st, AT91_ADC_CHER,
  184. AT91_ADC_CH(chan->channel));
  185. }
  186. at91_adc_writel(st, AT91_ADC_IER, reg->drdy_mask);
  187. } else {
  188. at91_adc_writel(st, AT91_ADC_IDR, reg->drdy_mask);
  189. at91_adc_writel(st, reg->trigger_register,
  190. status & ~value);
  191. for_each_set_bit(bit, buffer->scan_mask,
  192. st->num_channels) {
  193. struct iio_chan_spec const *chan = idev->channels + bit;
  194. at91_adc_writel(st, AT91_ADC_CHDR,
  195. AT91_ADC_CH(chan->channel));
  196. }
  197. kfree(st->buffer);
  198. }
  199. return 0;
  200. }
  201. static const struct iio_trigger_ops at91_adc_trigger_ops = {
  202. .owner = THIS_MODULE,
  203. .set_trigger_state = &at91_adc_configure_trigger,
  204. };
  205. static struct iio_trigger *at91_adc_allocate_trigger(struct iio_dev *idev,
  206. struct at91_adc_trigger *trigger)
  207. {
  208. struct iio_trigger *trig;
  209. int ret;
  210. trig = iio_trigger_alloc("%s-dev%d-%s", idev->name,
  211. idev->id, trigger->name);
  212. if (trig == NULL)
  213. return NULL;
  214. trig->dev.parent = idev->dev.parent;
  215. iio_trigger_set_drvdata(trig, idev);
  216. trig->ops = &at91_adc_trigger_ops;
  217. ret = iio_trigger_register(trig);
  218. if (ret)
  219. return NULL;
  220. return trig;
  221. }
  222. static int at91_adc_trigger_init(struct iio_dev *idev)
  223. {
  224. struct at91_adc_state *st = iio_priv(idev);
  225. int i, ret;
  226. st->trig = devm_kzalloc(&idev->dev,
  227. st->trigger_number * sizeof(st->trig),
  228. GFP_KERNEL);
  229. if (st->trig == NULL) {
  230. ret = -ENOMEM;
  231. goto error_ret;
  232. }
  233. for (i = 0; i < st->trigger_number; i++) {
  234. if (st->trigger_list[i].is_external && !(st->use_external))
  235. continue;
  236. st->trig[i] = at91_adc_allocate_trigger(idev,
  237. st->trigger_list + i);
  238. if (st->trig[i] == NULL) {
  239. dev_err(&idev->dev,
  240. "Could not allocate trigger %d\n", i);
  241. ret = -ENOMEM;
  242. goto error_trigger;
  243. }
  244. }
  245. return 0;
  246. error_trigger:
  247. for (i--; i >= 0; i--) {
  248. iio_trigger_unregister(st->trig[i]);
  249. iio_trigger_free(st->trig[i]);
  250. }
  251. error_ret:
  252. return ret;
  253. }
  254. static void at91_adc_trigger_remove(struct iio_dev *idev)
  255. {
  256. struct at91_adc_state *st = iio_priv(idev);
  257. int i;
  258. for (i = 0; i < st->trigger_number; i++) {
  259. iio_trigger_unregister(st->trig[i]);
  260. iio_trigger_free(st->trig[i]);
  261. }
  262. }
  263. static int at91_adc_buffer_init(struct iio_dev *idev)
  264. {
  265. return iio_triggered_buffer_setup(idev, &iio_pollfunc_store_time,
  266. &at91_adc_trigger_handler, NULL);
  267. }
  268. static void at91_adc_buffer_remove(struct iio_dev *idev)
  269. {
  270. iio_triggered_buffer_cleanup(idev);
  271. }
  272. static int at91_adc_read_raw(struct iio_dev *idev,
  273. struct iio_chan_spec const *chan,
  274. int *val, int *val2, long mask)
  275. {
  276. struct at91_adc_state *st = iio_priv(idev);
  277. int ret;
  278. switch (mask) {
  279. case IIO_CHAN_INFO_RAW:
  280. mutex_lock(&st->lock);
  281. at91_adc_writel(st, AT91_ADC_CHER,
  282. AT91_ADC_CH(chan->channel));
  283. at91_adc_writel(st, AT91_ADC_IER, st->registers->drdy_mask);
  284. at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_START);
  285. ret = wait_event_interruptible_timeout(st->wq_data_avail,
  286. st->done,
  287. msecs_to_jiffies(1000));
  288. if (ret == 0)
  289. ret = -ETIMEDOUT;
  290. if (ret < 0) {
  291. mutex_unlock(&st->lock);
  292. return ret;
  293. }
  294. *val = st->last_value;
  295. at91_adc_writel(st, AT91_ADC_CHDR,
  296. AT91_ADC_CH(chan->channel));
  297. at91_adc_writel(st, AT91_ADC_IDR, st->registers->drdy_mask);
  298. st->last_value = 0;
  299. st->done = false;
  300. mutex_unlock(&st->lock);
  301. return IIO_VAL_INT;
  302. case IIO_CHAN_INFO_SCALE:
  303. *val = (st->vref_mv * 1000) >> chan->scan_type.realbits;
  304. *val2 = 0;
  305. return IIO_VAL_INT_PLUS_MICRO;
  306. default:
  307. break;
  308. }
  309. return -EINVAL;
  310. }
  311. static int at91_adc_of_get_resolution(struct at91_adc_state *st,
  312. struct platform_device *pdev)
  313. {
  314. struct iio_dev *idev = iio_priv_to_dev(st);
  315. struct device_node *np = pdev->dev.of_node;
  316. int count, i, ret = 0;
  317. char *res_name, *s;
  318. u32 *resolutions;
  319. count = of_property_count_strings(np, "atmel,adc-res-names");
  320. if (count < 2) {
  321. dev_err(&idev->dev, "You must specified at least two resolution names for "
  322. "adc-res-names property in the DT\n");
  323. return count;
  324. }
  325. resolutions = kmalloc(count * sizeof(*resolutions), GFP_KERNEL);
  326. if (!resolutions)
  327. return -ENOMEM;
  328. if (of_property_read_u32_array(np, "atmel,adc-res", resolutions, count)) {
  329. dev_err(&idev->dev, "Missing adc-res property in the DT.\n");
  330. ret = -ENODEV;
  331. goto ret;
  332. }
  333. if (of_property_read_string(np, "atmel,adc-use-res", (const char **)&res_name))
  334. res_name = "highres";
  335. for (i = 0; i < count; i++) {
  336. if (of_property_read_string_index(np, "atmel,adc-res-names", i, (const char **)&s))
  337. continue;
  338. if (strcmp(res_name, s))
  339. continue;
  340. st->res = resolutions[i];
  341. if (!strcmp(res_name, "lowres"))
  342. st->low_res = true;
  343. else
  344. st->low_res = false;
  345. dev_info(&idev->dev, "Resolution used: %u bits\n", st->res);
  346. goto ret;
  347. }
  348. dev_err(&idev->dev, "There is no resolution for %s\n", res_name);
  349. ret:
  350. kfree(resolutions);
  351. return ret;
  352. }
  353. static int at91_adc_probe_dt(struct at91_adc_state *st,
  354. struct platform_device *pdev)
  355. {
  356. struct iio_dev *idev = iio_priv_to_dev(st);
  357. struct device_node *node = pdev->dev.of_node;
  358. struct device_node *trig_node;
  359. int i = 0, ret;
  360. u32 prop;
  361. if (!node)
  362. return -EINVAL;
  363. st->use_external = of_property_read_bool(node, "atmel,adc-use-external-triggers");
  364. if (of_property_read_u32(node, "atmel,adc-channels-used", &prop)) {
  365. dev_err(&idev->dev, "Missing adc-channels-used property in the DT.\n");
  366. ret = -EINVAL;
  367. goto error_ret;
  368. }
  369. st->channels_mask = prop;
  370. if (of_property_read_u32(node, "atmel,adc-num-channels", &prop)) {
  371. dev_err(&idev->dev, "Missing adc-num-channels property in the DT.\n");
  372. ret = -EINVAL;
  373. goto error_ret;
  374. }
  375. st->num_channels = prop;
  376. st->sleep_mode = of_property_read_bool(node, "atmel,adc-sleep-mode");
  377. if (of_property_read_u32(node, "atmel,adc-startup-time", &prop)) {
  378. dev_err(&idev->dev, "Missing adc-startup-time property in the DT.\n");
  379. ret = -EINVAL;
  380. goto error_ret;
  381. }
  382. st->startup_time = prop;
  383. if (of_property_read_u32(node, "atmel,adc-vref", &prop)) {
  384. dev_err(&idev->dev, "Missing adc-vref property in the DT.\n");
  385. ret = -EINVAL;
  386. goto error_ret;
  387. }
  388. st->vref_mv = prop;
  389. ret = at91_adc_of_get_resolution(st, pdev);
  390. if (ret)
  391. goto error_ret;
  392. st->registers = devm_kzalloc(&idev->dev,
  393. sizeof(struct at91_adc_reg_desc),
  394. GFP_KERNEL);
  395. if (!st->registers) {
  396. dev_err(&idev->dev, "Could not allocate register memory.\n");
  397. ret = -ENOMEM;
  398. goto error_ret;
  399. }
  400. if (of_property_read_u32(node, "atmel,adc-channel-base", &prop)) {
  401. dev_err(&idev->dev, "Missing adc-channel-base property in the DT.\n");
  402. ret = -EINVAL;
  403. goto error_ret;
  404. }
  405. st->registers->channel_base = prop;
  406. if (of_property_read_u32(node, "atmel,adc-drdy-mask", &prop)) {
  407. dev_err(&idev->dev, "Missing adc-drdy-mask property in the DT.\n");
  408. ret = -EINVAL;
  409. goto error_ret;
  410. }
  411. st->registers->drdy_mask = prop;
  412. if (of_property_read_u32(node, "atmel,adc-status-register", &prop)) {
  413. dev_err(&idev->dev, "Missing adc-status-register property in the DT.\n");
  414. ret = -EINVAL;
  415. goto error_ret;
  416. }
  417. st->registers->status_register = prop;
  418. if (of_property_read_u32(node, "atmel,adc-trigger-register", &prop)) {
  419. dev_err(&idev->dev, "Missing adc-trigger-register property in the DT.\n");
  420. ret = -EINVAL;
  421. goto error_ret;
  422. }
  423. st->registers->trigger_register = prop;
  424. st->trigger_number = of_get_child_count(node);
  425. st->trigger_list = devm_kzalloc(&idev->dev, st->trigger_number *
  426. sizeof(struct at91_adc_trigger),
  427. GFP_KERNEL);
  428. if (!st->trigger_list) {
  429. dev_err(&idev->dev, "Could not allocate trigger list memory.\n");
  430. ret = -ENOMEM;
  431. goto error_ret;
  432. }
  433. for_each_child_of_node(node, trig_node) {
  434. struct at91_adc_trigger *trig = st->trigger_list + i;
  435. const char *name;
  436. if (of_property_read_string(trig_node, "trigger-name", &name)) {
  437. dev_err(&idev->dev, "Missing trigger-name property in the DT.\n");
  438. ret = -EINVAL;
  439. goto error_ret;
  440. }
  441. trig->name = name;
  442. if (of_property_read_u32(trig_node, "trigger-value", &prop)) {
  443. dev_err(&idev->dev, "Missing trigger-value property in the DT.\n");
  444. ret = -EINVAL;
  445. goto error_ret;
  446. }
  447. trig->value = prop;
  448. trig->is_external = of_property_read_bool(trig_node, "trigger-external");
  449. i++;
  450. }
  451. return 0;
  452. error_ret:
  453. return ret;
  454. }
  455. static int at91_adc_probe_pdata(struct at91_adc_state *st,
  456. struct platform_device *pdev)
  457. {
  458. struct at91_adc_data *pdata = pdev->dev.platform_data;
  459. if (!pdata)
  460. return -EINVAL;
  461. st->use_external = pdata->use_external_triggers;
  462. st->vref_mv = pdata->vref;
  463. st->channels_mask = pdata->channels_used;
  464. st->num_channels = pdata->num_channels;
  465. st->startup_time = pdata->startup_time;
  466. st->trigger_number = pdata->trigger_number;
  467. st->trigger_list = pdata->trigger_list;
  468. st->registers = pdata->registers;
  469. return 0;
  470. }
  471. static const struct iio_info at91_adc_info = {
  472. .driver_module = THIS_MODULE,
  473. .read_raw = &at91_adc_read_raw,
  474. };
  475. static int at91_adc_probe(struct platform_device *pdev)
  476. {
  477. unsigned int prsc, mstrclk, ticks, adc_clk;
  478. int ret;
  479. struct iio_dev *idev;
  480. struct at91_adc_state *st;
  481. struct resource *res;
  482. u32 reg;
  483. idev = iio_device_alloc(sizeof(struct at91_adc_state));
  484. if (idev == NULL) {
  485. ret = -ENOMEM;
  486. goto error_ret;
  487. }
  488. st = iio_priv(idev);
  489. if (pdev->dev.of_node)
  490. ret = at91_adc_probe_dt(st, pdev);
  491. else
  492. ret = at91_adc_probe_pdata(st, pdev);
  493. if (ret) {
  494. dev_err(&pdev->dev, "No platform data available.\n");
  495. ret = -EINVAL;
  496. goto error_free_device;
  497. }
  498. platform_set_drvdata(pdev, idev);
  499. idev->dev.parent = &pdev->dev;
  500. idev->name = dev_name(&pdev->dev);
  501. idev->modes = INDIO_DIRECT_MODE;
  502. idev->info = &at91_adc_info;
  503. st->irq = platform_get_irq(pdev, 0);
  504. if (st->irq < 0) {
  505. dev_err(&pdev->dev, "No IRQ ID is designated\n");
  506. ret = -ENODEV;
  507. goto error_free_device;
  508. }
  509. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  510. st->reg_base = devm_ioremap_resource(&pdev->dev, res);
  511. if (IS_ERR(st->reg_base)) {
  512. ret = PTR_ERR(st->reg_base);
  513. goto error_free_device;
  514. }
  515. /*
  516. * Disable all IRQs before setting up the handler
  517. */
  518. at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_SWRST);
  519. at91_adc_writel(st, AT91_ADC_IDR, 0xFFFFFFFF);
  520. ret = request_irq(st->irq,
  521. at91_adc_eoc_trigger,
  522. 0,
  523. pdev->dev.driver->name,
  524. idev);
  525. if (ret) {
  526. dev_err(&pdev->dev, "Failed to allocate IRQ.\n");
  527. goto error_free_device;
  528. }
  529. st->clk = devm_clk_get(&pdev->dev, "adc_clk");
  530. if (IS_ERR(st->clk)) {
  531. dev_err(&pdev->dev, "Failed to get the clock.\n");
  532. ret = PTR_ERR(st->clk);
  533. goto error_free_irq;
  534. }
  535. ret = clk_prepare_enable(st->clk);
  536. if (ret) {
  537. dev_err(&pdev->dev,
  538. "Could not prepare or enable the clock.\n");
  539. goto error_free_irq;
  540. }
  541. st->adc_clk = devm_clk_get(&pdev->dev, "adc_op_clk");
  542. if (IS_ERR(st->adc_clk)) {
  543. dev_err(&pdev->dev, "Failed to get the ADC clock.\n");
  544. ret = PTR_ERR(st->adc_clk);
  545. goto error_disable_clk;
  546. }
  547. ret = clk_prepare_enable(st->adc_clk);
  548. if (ret) {
  549. dev_err(&pdev->dev,
  550. "Could not prepare or enable the ADC clock.\n");
  551. goto error_disable_clk;
  552. }
  553. /*
  554. * Prescaler rate computation using the formula from the Atmel's
  555. * datasheet : ADC Clock = MCK / ((Prescaler + 1) * 2), ADC Clock being
  556. * specified by the electrical characteristics of the board.
  557. */
  558. mstrclk = clk_get_rate(st->clk);
  559. adc_clk = clk_get_rate(st->adc_clk);
  560. prsc = (mstrclk / (2 * adc_clk)) - 1;
  561. if (!st->startup_time) {
  562. dev_err(&pdev->dev, "No startup time available.\n");
  563. ret = -EINVAL;
  564. goto error_disable_adc_clk;
  565. }
  566. /*
  567. * Number of ticks needed to cover the startup time of the ADC as
  568. * defined in the electrical characteristics of the board, divided by 8.
  569. * The formula thus is : Startup Time = (ticks + 1) * 8 / ADC Clock
  570. */
  571. ticks = round_up((st->startup_time * adc_clk /
  572. 1000000) - 1, 8) / 8;
  573. reg = AT91_ADC_PRESCAL_(prsc) & AT91_ADC_PRESCAL;
  574. reg |= AT91_ADC_STARTUP_(ticks) & AT91_ADC_STARTUP;
  575. if (st->low_res)
  576. reg |= AT91_ADC_LOWRES;
  577. if (st->sleep_mode)
  578. reg |= AT91_ADC_SLEEP;
  579. at91_adc_writel(st, AT91_ADC_MR, reg);
  580. /* Setup the ADC channels available on the board */
  581. ret = at91_adc_channel_init(idev);
  582. if (ret < 0) {
  583. dev_err(&pdev->dev, "Couldn't initialize the channels.\n");
  584. goto error_disable_adc_clk;
  585. }
  586. init_waitqueue_head(&st->wq_data_avail);
  587. mutex_init(&st->lock);
  588. ret = at91_adc_buffer_init(idev);
  589. if (ret < 0) {
  590. dev_err(&pdev->dev, "Couldn't initialize the buffer.\n");
  591. goto error_disable_adc_clk;
  592. }
  593. ret = at91_adc_trigger_init(idev);
  594. if (ret < 0) {
  595. dev_err(&pdev->dev, "Couldn't setup the triggers.\n");
  596. goto error_unregister_buffer;
  597. }
  598. ret = iio_device_register(idev);
  599. if (ret < 0) {
  600. dev_err(&pdev->dev, "Couldn't register the device.\n");
  601. goto error_remove_triggers;
  602. }
  603. return 0;
  604. error_remove_triggers:
  605. at91_adc_trigger_remove(idev);
  606. error_unregister_buffer:
  607. at91_adc_buffer_remove(idev);
  608. error_disable_adc_clk:
  609. clk_disable_unprepare(st->adc_clk);
  610. error_disable_clk:
  611. clk_disable_unprepare(st->clk);
  612. error_free_irq:
  613. free_irq(st->irq, idev);
  614. error_free_device:
  615. iio_device_free(idev);
  616. error_ret:
  617. return ret;
  618. }
  619. static int at91_adc_remove(struct platform_device *pdev)
  620. {
  621. struct iio_dev *idev = platform_get_drvdata(pdev);
  622. struct at91_adc_state *st = iio_priv(idev);
  623. iio_device_unregister(idev);
  624. at91_adc_trigger_remove(idev);
  625. at91_adc_buffer_remove(idev);
  626. clk_disable_unprepare(st->adc_clk);
  627. clk_disable_unprepare(st->clk);
  628. free_irq(st->irq, idev);
  629. iio_device_free(idev);
  630. return 0;
  631. }
  632. static const struct of_device_id at91_adc_dt_ids[] = {
  633. { .compatible = "atmel,at91sam9260-adc" },
  634. {},
  635. };
  636. MODULE_DEVICE_TABLE(of, at91_adc_dt_ids);
  637. static struct platform_driver at91_adc_driver = {
  638. .probe = at91_adc_probe,
  639. .remove = at91_adc_remove,
  640. .driver = {
  641. .name = "at91_adc",
  642. .of_match_table = of_match_ptr(at91_adc_dt_ids),
  643. },
  644. };
  645. module_platform_driver(at91_adc_driver);
  646. MODULE_LICENSE("GPL");
  647. MODULE_DESCRIPTION("Atmel AT91 ADC Driver");
  648. MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");