intel_sdvo.c 79 KB

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  1. /*
  2. * Copyright 2006 Dave Airlie <airlied@linux.ie>
  3. * Copyright © 2006-2007 Intel Corporation
  4. * Jesse Barnes <jesse.barnes@intel.com>
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the next
  14. * paragraph) shall be included in all copies or substantial portions of the
  15. * Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23. * DEALINGS IN THE SOFTWARE.
  24. *
  25. * Authors:
  26. * Eric Anholt <eric@anholt.net>
  27. */
  28. #include <linux/i2c.h>
  29. #include <linux/slab.h>
  30. #include <linux/delay.h>
  31. #include <linux/export.h>
  32. #include "drmP.h"
  33. #include "drm.h"
  34. #include "drm_crtc.h"
  35. #include "drm_edid.h"
  36. #include "intel_drv.h"
  37. #include "i915_drm.h"
  38. #include "i915_drv.h"
  39. #include "intel_sdvo_regs.h"
  40. #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  41. #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  42. #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  43. #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  44. #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  45. SDVO_TV_MASK)
  46. #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
  47. #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
  48. #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
  49. #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  50. #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  51. static const char *tv_format_names[] = {
  52. "NTSC_M" , "NTSC_J" , "NTSC_443",
  53. "PAL_B" , "PAL_D" , "PAL_G" ,
  54. "PAL_H" , "PAL_I" , "PAL_M" ,
  55. "PAL_N" , "PAL_NC" , "PAL_60" ,
  56. "SECAM_B" , "SECAM_D" , "SECAM_G" ,
  57. "SECAM_K" , "SECAM_K1", "SECAM_L" ,
  58. "SECAM_60"
  59. };
  60. #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
  61. struct intel_sdvo {
  62. struct intel_encoder base;
  63. struct i2c_adapter *i2c;
  64. u8 slave_addr;
  65. struct i2c_adapter ddc;
  66. /* Register for the SDVO device: SDVOB or SDVOC */
  67. uint32_t sdvo_reg;
  68. /* Active outputs controlled by this SDVO output */
  69. uint16_t controlled_output;
  70. /*
  71. * Capabilities of the SDVO device returned by
  72. * i830_sdvo_get_capabilities()
  73. */
  74. struct intel_sdvo_caps caps;
  75. /* Pixel clock limitations reported by the SDVO device, in kHz */
  76. int pixel_clock_min, pixel_clock_max;
  77. /*
  78. * For multiple function SDVO device,
  79. * this is for current attached outputs.
  80. */
  81. uint16_t attached_output;
  82. /*
  83. * Hotplug activation bits for this device
  84. */
  85. uint8_t hotplug_active[2];
  86. /**
  87. * This is used to select the color range of RBG outputs in HDMI mode.
  88. * It is only valid when using TMDS encoding and 8 bit per color mode.
  89. */
  90. uint32_t color_range;
  91. /**
  92. * This is set if we're going to treat the device as TV-out.
  93. *
  94. * While we have these nice friendly flags for output types that ought
  95. * to decide this for us, the S-Video output on our HDMI+S-Video card
  96. * shows up as RGB1 (VGA).
  97. */
  98. bool is_tv;
  99. /* On different gens SDVOB is at different places. */
  100. bool is_sdvob;
  101. /* This is for current tv format name */
  102. int tv_format_index;
  103. /**
  104. * This is set if we treat the device as HDMI, instead of DVI.
  105. */
  106. bool is_hdmi;
  107. bool has_hdmi_monitor;
  108. bool has_hdmi_audio;
  109. /**
  110. * This is set if we detect output of sdvo device as LVDS and
  111. * have a valid fixed mode to use with the panel.
  112. */
  113. bool is_lvds;
  114. /**
  115. * This is sdvo fixed pannel mode pointer
  116. */
  117. struct drm_display_mode *sdvo_lvds_fixed_mode;
  118. /* DDC bus used by this SDVO encoder */
  119. uint8_t ddc_bus;
  120. /* Input timings for adjusted_mode */
  121. struct intel_sdvo_dtd input_dtd;
  122. };
  123. struct intel_sdvo_connector {
  124. struct intel_connector base;
  125. /* Mark the type of connector */
  126. uint16_t output_flag;
  127. enum hdmi_force_audio force_audio;
  128. /* This contains all current supported TV format */
  129. u8 tv_format_supported[TV_FORMAT_NUM];
  130. int format_supported_num;
  131. struct drm_property *tv_format;
  132. /* add the property for the SDVO-TV */
  133. struct drm_property *left;
  134. struct drm_property *right;
  135. struct drm_property *top;
  136. struct drm_property *bottom;
  137. struct drm_property *hpos;
  138. struct drm_property *vpos;
  139. struct drm_property *contrast;
  140. struct drm_property *saturation;
  141. struct drm_property *hue;
  142. struct drm_property *sharpness;
  143. struct drm_property *flicker_filter;
  144. struct drm_property *flicker_filter_adaptive;
  145. struct drm_property *flicker_filter_2d;
  146. struct drm_property *tv_chroma_filter;
  147. struct drm_property *tv_luma_filter;
  148. struct drm_property *dot_crawl;
  149. /* add the property for the SDVO-TV/LVDS */
  150. struct drm_property *brightness;
  151. /* Add variable to record current setting for the above property */
  152. u32 left_margin, right_margin, top_margin, bottom_margin;
  153. /* this is to get the range of margin.*/
  154. u32 max_hscan, max_vscan;
  155. u32 max_hpos, cur_hpos;
  156. u32 max_vpos, cur_vpos;
  157. u32 cur_brightness, max_brightness;
  158. u32 cur_contrast, max_contrast;
  159. u32 cur_saturation, max_saturation;
  160. u32 cur_hue, max_hue;
  161. u32 cur_sharpness, max_sharpness;
  162. u32 cur_flicker_filter, max_flicker_filter;
  163. u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
  164. u32 cur_flicker_filter_2d, max_flicker_filter_2d;
  165. u32 cur_tv_chroma_filter, max_tv_chroma_filter;
  166. u32 cur_tv_luma_filter, max_tv_luma_filter;
  167. u32 cur_dot_crawl, max_dot_crawl;
  168. };
  169. static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
  170. {
  171. return container_of(encoder, struct intel_sdvo, base.base);
  172. }
  173. static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
  174. {
  175. return container_of(intel_attached_encoder(connector),
  176. struct intel_sdvo, base);
  177. }
  178. static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
  179. {
  180. return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
  181. }
  182. static bool
  183. intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
  184. static bool
  185. intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
  186. struct intel_sdvo_connector *intel_sdvo_connector,
  187. int type);
  188. static bool
  189. intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
  190. struct intel_sdvo_connector *intel_sdvo_connector);
  191. /**
  192. * Writes the SDVOB or SDVOC with the given value, but always writes both
  193. * SDVOB and SDVOC to work around apparent hardware issues (according to
  194. * comments in the BIOS).
  195. */
  196. static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
  197. {
  198. struct drm_device *dev = intel_sdvo->base.base.dev;
  199. struct drm_i915_private *dev_priv = dev->dev_private;
  200. u32 bval = val, cval = val;
  201. int i;
  202. if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
  203. I915_WRITE(intel_sdvo->sdvo_reg, val);
  204. I915_READ(intel_sdvo->sdvo_reg);
  205. return;
  206. }
  207. if (intel_sdvo->sdvo_reg == SDVOB) {
  208. cval = I915_READ(SDVOC);
  209. } else {
  210. bval = I915_READ(SDVOB);
  211. }
  212. /*
  213. * Write the registers twice for luck. Sometimes,
  214. * writing them only once doesn't appear to 'stick'.
  215. * The BIOS does this too. Yay, magic
  216. */
  217. for (i = 0; i < 2; i++)
  218. {
  219. I915_WRITE(SDVOB, bval);
  220. I915_READ(SDVOB);
  221. I915_WRITE(SDVOC, cval);
  222. I915_READ(SDVOC);
  223. }
  224. }
  225. static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
  226. {
  227. struct i2c_msg msgs[] = {
  228. {
  229. .addr = intel_sdvo->slave_addr,
  230. .flags = 0,
  231. .len = 1,
  232. .buf = &addr,
  233. },
  234. {
  235. .addr = intel_sdvo->slave_addr,
  236. .flags = I2C_M_RD,
  237. .len = 1,
  238. .buf = ch,
  239. }
  240. };
  241. int ret;
  242. if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
  243. return true;
  244. DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
  245. return false;
  246. }
  247. #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
  248. /** Mapping of command numbers to names, for debug output */
  249. static const struct _sdvo_cmd_name {
  250. u8 cmd;
  251. const char *name;
  252. } sdvo_cmd_names[] = {
  253. SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
  254. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
  255. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
  256. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
  257. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
  258. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
  259. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
  260. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
  261. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
  262. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
  263. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
  264. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
  265. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
  266. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
  267. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
  268. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
  269. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
  270. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
  271. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
  272. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
  273. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
  274. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
  275. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
  276. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
  277. SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
  278. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
  279. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
  280. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
  281. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
  282. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
  283. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
  284. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
  285. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
  286. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
  287. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
  288. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
  289. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
  290. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
  291. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
  292. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
  293. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
  294. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
  295. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
  296. /* Add the op code for SDVO enhancements */
  297. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
  298. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
  299. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
  300. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
  301. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
  302. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
  303. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
  304. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
  305. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
  306. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
  307. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
  308. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
  309. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
  310. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
  311. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
  312. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
  313. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
  314. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
  315. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
  316. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
  317. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
  318. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
  319. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
  320. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
  321. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
  322. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
  323. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
  324. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
  325. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
  326. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
  327. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
  328. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
  329. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
  330. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
  331. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
  332. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
  333. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
  334. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
  335. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
  336. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
  337. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
  338. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
  339. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
  340. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
  341. /* HDMI op code */
  342. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
  343. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
  344. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
  345. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
  346. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
  347. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
  348. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
  349. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
  350. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
  351. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
  352. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
  353. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
  354. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
  355. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
  356. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
  357. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
  358. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
  359. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
  360. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
  361. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
  362. };
  363. #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
  364. static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
  365. const void *args, int args_len)
  366. {
  367. int i;
  368. DRM_DEBUG_KMS("%s: W: %02X ",
  369. SDVO_NAME(intel_sdvo), cmd);
  370. for (i = 0; i < args_len; i++)
  371. DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
  372. for (; i < 8; i++)
  373. DRM_LOG_KMS(" ");
  374. for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
  375. if (cmd == sdvo_cmd_names[i].cmd) {
  376. DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
  377. break;
  378. }
  379. }
  380. if (i == ARRAY_SIZE(sdvo_cmd_names))
  381. DRM_LOG_KMS("(%02X)", cmd);
  382. DRM_LOG_KMS("\n");
  383. }
  384. static const char *cmd_status_names[] = {
  385. "Power on",
  386. "Success",
  387. "Not supported",
  388. "Invalid arg",
  389. "Pending",
  390. "Target not specified",
  391. "Scaling not supported"
  392. };
  393. static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
  394. const void *args, int args_len)
  395. {
  396. u8 *buf, status;
  397. struct i2c_msg *msgs;
  398. int i, ret = true;
  399. buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);
  400. if (!buf)
  401. return false;
  402. msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
  403. if (!msgs)
  404. return false;
  405. intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
  406. for (i = 0; i < args_len; i++) {
  407. msgs[i].addr = intel_sdvo->slave_addr;
  408. msgs[i].flags = 0;
  409. msgs[i].len = 2;
  410. msgs[i].buf = buf + 2 *i;
  411. buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
  412. buf[2*i + 1] = ((u8*)args)[i];
  413. }
  414. msgs[i].addr = intel_sdvo->slave_addr;
  415. msgs[i].flags = 0;
  416. msgs[i].len = 2;
  417. msgs[i].buf = buf + 2*i;
  418. buf[2*i + 0] = SDVO_I2C_OPCODE;
  419. buf[2*i + 1] = cmd;
  420. /* the following two are to read the response */
  421. status = SDVO_I2C_CMD_STATUS;
  422. msgs[i+1].addr = intel_sdvo->slave_addr;
  423. msgs[i+1].flags = 0;
  424. msgs[i+1].len = 1;
  425. msgs[i+1].buf = &status;
  426. msgs[i+2].addr = intel_sdvo->slave_addr;
  427. msgs[i+2].flags = I2C_M_RD;
  428. msgs[i+2].len = 1;
  429. msgs[i+2].buf = &status;
  430. ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
  431. if (ret < 0) {
  432. DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
  433. ret = false;
  434. goto out;
  435. }
  436. if (ret != i+3) {
  437. /* failure in I2C transfer */
  438. DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
  439. ret = false;
  440. }
  441. out:
  442. kfree(msgs);
  443. kfree(buf);
  444. return ret;
  445. }
  446. static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
  447. void *response, int response_len)
  448. {
  449. u8 retry = 5;
  450. u8 status;
  451. int i;
  452. DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
  453. /*
  454. * The documentation states that all commands will be
  455. * processed within 15µs, and that we need only poll
  456. * the status byte a maximum of 3 times in order for the
  457. * command to be complete.
  458. *
  459. * Check 5 times in case the hardware failed to read the docs.
  460. */
  461. if (!intel_sdvo_read_byte(intel_sdvo,
  462. SDVO_I2C_CMD_STATUS,
  463. &status))
  464. goto log_fail;
  465. while (status == SDVO_CMD_STATUS_PENDING && retry--) {
  466. udelay(15);
  467. if (!intel_sdvo_read_byte(intel_sdvo,
  468. SDVO_I2C_CMD_STATUS,
  469. &status))
  470. goto log_fail;
  471. }
  472. if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
  473. DRM_LOG_KMS("(%s)", cmd_status_names[status]);
  474. else
  475. DRM_LOG_KMS("(??? %d)", status);
  476. if (status != SDVO_CMD_STATUS_SUCCESS)
  477. goto log_fail;
  478. /* Read the command response */
  479. for (i = 0; i < response_len; i++) {
  480. if (!intel_sdvo_read_byte(intel_sdvo,
  481. SDVO_I2C_RETURN_0 + i,
  482. &((u8 *)response)[i]))
  483. goto log_fail;
  484. DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
  485. }
  486. DRM_LOG_KMS("\n");
  487. return true;
  488. log_fail:
  489. DRM_LOG_KMS("... failed\n");
  490. return false;
  491. }
  492. static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
  493. {
  494. if (mode->clock >= 100000)
  495. return 1;
  496. else if (mode->clock >= 50000)
  497. return 2;
  498. else
  499. return 4;
  500. }
  501. static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
  502. u8 ddc_bus)
  503. {
  504. /* This must be the immediately preceding write before the i2c xfer */
  505. return intel_sdvo_write_cmd(intel_sdvo,
  506. SDVO_CMD_SET_CONTROL_BUS_SWITCH,
  507. &ddc_bus, 1);
  508. }
  509. static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
  510. {
  511. if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
  512. return false;
  513. return intel_sdvo_read_response(intel_sdvo, NULL, 0);
  514. }
  515. static bool
  516. intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
  517. {
  518. if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
  519. return false;
  520. return intel_sdvo_read_response(intel_sdvo, value, len);
  521. }
  522. static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
  523. {
  524. struct intel_sdvo_set_target_input_args targets = {0};
  525. return intel_sdvo_set_value(intel_sdvo,
  526. SDVO_CMD_SET_TARGET_INPUT,
  527. &targets, sizeof(targets));
  528. }
  529. /**
  530. * Return whether each input is trained.
  531. *
  532. * This function is making an assumption about the layout of the response,
  533. * which should be checked against the docs.
  534. */
  535. static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
  536. {
  537. struct intel_sdvo_get_trained_inputs_response response;
  538. BUILD_BUG_ON(sizeof(response) != 1);
  539. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
  540. &response, sizeof(response)))
  541. return false;
  542. *input_1 = response.input0_trained;
  543. *input_2 = response.input1_trained;
  544. return true;
  545. }
  546. static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
  547. u16 outputs)
  548. {
  549. return intel_sdvo_set_value(intel_sdvo,
  550. SDVO_CMD_SET_ACTIVE_OUTPUTS,
  551. &outputs, sizeof(outputs));
  552. }
  553. static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
  554. int mode)
  555. {
  556. u8 state = SDVO_ENCODER_STATE_ON;
  557. switch (mode) {
  558. case DRM_MODE_DPMS_ON:
  559. state = SDVO_ENCODER_STATE_ON;
  560. break;
  561. case DRM_MODE_DPMS_STANDBY:
  562. state = SDVO_ENCODER_STATE_STANDBY;
  563. break;
  564. case DRM_MODE_DPMS_SUSPEND:
  565. state = SDVO_ENCODER_STATE_SUSPEND;
  566. break;
  567. case DRM_MODE_DPMS_OFF:
  568. state = SDVO_ENCODER_STATE_OFF;
  569. break;
  570. }
  571. return intel_sdvo_set_value(intel_sdvo,
  572. SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
  573. }
  574. static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
  575. int *clock_min,
  576. int *clock_max)
  577. {
  578. struct intel_sdvo_pixel_clock_range clocks;
  579. BUILD_BUG_ON(sizeof(clocks) != 4);
  580. if (!intel_sdvo_get_value(intel_sdvo,
  581. SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
  582. &clocks, sizeof(clocks)))
  583. return false;
  584. /* Convert the values from units of 10 kHz to kHz. */
  585. *clock_min = clocks.min * 10;
  586. *clock_max = clocks.max * 10;
  587. return true;
  588. }
  589. static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
  590. u16 outputs)
  591. {
  592. return intel_sdvo_set_value(intel_sdvo,
  593. SDVO_CMD_SET_TARGET_OUTPUT,
  594. &outputs, sizeof(outputs));
  595. }
  596. static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
  597. struct intel_sdvo_dtd *dtd)
  598. {
  599. return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
  600. intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
  601. }
  602. static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
  603. struct intel_sdvo_dtd *dtd)
  604. {
  605. return intel_sdvo_set_timing(intel_sdvo,
  606. SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
  607. }
  608. static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
  609. struct intel_sdvo_dtd *dtd)
  610. {
  611. return intel_sdvo_set_timing(intel_sdvo,
  612. SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
  613. }
  614. static bool
  615. intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
  616. uint16_t clock,
  617. uint16_t width,
  618. uint16_t height)
  619. {
  620. struct intel_sdvo_preferred_input_timing_args args;
  621. memset(&args, 0, sizeof(args));
  622. args.clock = clock;
  623. args.width = width;
  624. args.height = height;
  625. args.interlace = 0;
  626. if (intel_sdvo->is_lvds &&
  627. (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
  628. intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
  629. args.scaled = 1;
  630. return intel_sdvo_set_value(intel_sdvo,
  631. SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
  632. &args, sizeof(args));
  633. }
  634. static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
  635. struct intel_sdvo_dtd *dtd)
  636. {
  637. BUILD_BUG_ON(sizeof(dtd->part1) != 8);
  638. BUILD_BUG_ON(sizeof(dtd->part2) != 8);
  639. return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
  640. &dtd->part1, sizeof(dtd->part1)) &&
  641. intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
  642. &dtd->part2, sizeof(dtd->part2));
  643. }
  644. static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
  645. {
  646. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
  647. }
  648. static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
  649. const struct drm_display_mode *mode)
  650. {
  651. uint16_t width, height;
  652. uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
  653. uint16_t h_sync_offset, v_sync_offset;
  654. int mode_clock;
  655. width = mode->hdisplay;
  656. height = mode->vdisplay;
  657. /* do some mode translations */
  658. h_blank_len = mode->htotal - mode->hdisplay;
  659. h_sync_len = mode->hsync_end - mode->hsync_start;
  660. v_blank_len = mode->vtotal - mode->vdisplay;
  661. v_sync_len = mode->vsync_end - mode->vsync_start;
  662. h_sync_offset = mode->hsync_start - mode->hdisplay;
  663. v_sync_offset = mode->vsync_start - mode->vdisplay;
  664. mode_clock = mode->clock;
  665. mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
  666. mode_clock /= 10;
  667. dtd->part1.clock = mode_clock;
  668. dtd->part1.h_active = width & 0xff;
  669. dtd->part1.h_blank = h_blank_len & 0xff;
  670. dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
  671. ((h_blank_len >> 8) & 0xf);
  672. dtd->part1.v_active = height & 0xff;
  673. dtd->part1.v_blank = v_blank_len & 0xff;
  674. dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
  675. ((v_blank_len >> 8) & 0xf);
  676. dtd->part2.h_sync_off = h_sync_offset & 0xff;
  677. dtd->part2.h_sync_width = h_sync_len & 0xff;
  678. dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
  679. (v_sync_len & 0xf);
  680. dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
  681. ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
  682. ((v_sync_len & 0x30) >> 4);
  683. dtd->part2.dtd_flags = 0x18;
  684. if (mode->flags & DRM_MODE_FLAG_PHSYNC)
  685. dtd->part2.dtd_flags |= 0x2;
  686. if (mode->flags & DRM_MODE_FLAG_PVSYNC)
  687. dtd->part2.dtd_flags |= 0x4;
  688. dtd->part2.sdvo_flags = 0;
  689. dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
  690. dtd->part2.reserved = 0;
  691. }
  692. static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
  693. const struct intel_sdvo_dtd *dtd)
  694. {
  695. mode->hdisplay = dtd->part1.h_active;
  696. mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
  697. mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
  698. mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
  699. mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
  700. mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
  701. mode->htotal = mode->hdisplay + dtd->part1.h_blank;
  702. mode->htotal += (dtd->part1.h_high & 0xf) << 8;
  703. mode->vdisplay = dtd->part1.v_active;
  704. mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
  705. mode->vsync_start = mode->vdisplay;
  706. mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
  707. mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
  708. mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
  709. mode->vsync_end = mode->vsync_start +
  710. (dtd->part2.v_sync_off_width & 0xf);
  711. mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
  712. mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
  713. mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
  714. mode->clock = dtd->part1.clock * 10;
  715. mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
  716. if (dtd->part2.dtd_flags & 0x2)
  717. mode->flags |= DRM_MODE_FLAG_PHSYNC;
  718. if (dtd->part2.dtd_flags & 0x4)
  719. mode->flags |= DRM_MODE_FLAG_PVSYNC;
  720. }
  721. static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
  722. {
  723. struct intel_sdvo_encode encode;
  724. BUILD_BUG_ON(sizeof(encode) != 2);
  725. return intel_sdvo_get_value(intel_sdvo,
  726. SDVO_CMD_GET_SUPP_ENCODE,
  727. &encode, sizeof(encode));
  728. }
  729. static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
  730. uint8_t mode)
  731. {
  732. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
  733. }
  734. static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
  735. uint8_t mode)
  736. {
  737. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
  738. }
  739. #if 0
  740. static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
  741. {
  742. int i, j;
  743. uint8_t set_buf_index[2];
  744. uint8_t av_split;
  745. uint8_t buf_size;
  746. uint8_t buf[48];
  747. uint8_t *pos;
  748. intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
  749. for (i = 0; i <= av_split; i++) {
  750. set_buf_index[0] = i; set_buf_index[1] = 0;
  751. intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
  752. set_buf_index, 2);
  753. intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
  754. intel_sdvo_read_response(encoder, &buf_size, 1);
  755. pos = buf;
  756. for (j = 0; j <= buf_size; j += 8) {
  757. intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
  758. NULL, 0);
  759. intel_sdvo_read_response(encoder, pos, 8);
  760. pos += 8;
  761. }
  762. }
  763. }
  764. #endif
  765. static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
  766. {
  767. struct dip_infoframe avi_if = {
  768. .type = DIP_TYPE_AVI,
  769. .ver = DIP_VERSION_AVI,
  770. .len = DIP_LEN_AVI,
  771. };
  772. uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
  773. uint8_t set_buf_index[2] = { 1, 0 };
  774. uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
  775. uint64_t *data = (uint64_t *)sdvo_data;
  776. unsigned i;
  777. intel_dip_infoframe_csum(&avi_if);
  778. /* sdvo spec says that the ecc is handled by the hw, and it looks like
  779. * we must not send the ecc field, either. */
  780. memcpy(sdvo_data, &avi_if, 3);
  781. sdvo_data[3] = avi_if.checksum;
  782. memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
  783. if (!intel_sdvo_set_value(intel_sdvo,
  784. SDVO_CMD_SET_HBUF_INDEX,
  785. set_buf_index, 2))
  786. return false;
  787. for (i = 0; i < sizeof(sdvo_data); i += 8) {
  788. if (!intel_sdvo_set_value(intel_sdvo,
  789. SDVO_CMD_SET_HBUF_DATA,
  790. data, 8))
  791. return false;
  792. data++;
  793. }
  794. return intel_sdvo_set_value(intel_sdvo,
  795. SDVO_CMD_SET_HBUF_TXRATE,
  796. &tx_rate, 1);
  797. }
  798. static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
  799. {
  800. struct intel_sdvo_tv_format format;
  801. uint32_t format_map;
  802. format_map = 1 << intel_sdvo->tv_format_index;
  803. memset(&format, 0, sizeof(format));
  804. memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
  805. BUILD_BUG_ON(sizeof(format) != 6);
  806. return intel_sdvo_set_value(intel_sdvo,
  807. SDVO_CMD_SET_TV_FORMAT,
  808. &format, sizeof(format));
  809. }
  810. static bool
  811. intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
  812. struct drm_display_mode *mode)
  813. {
  814. struct intel_sdvo_dtd output_dtd;
  815. if (!intel_sdvo_set_target_output(intel_sdvo,
  816. intel_sdvo->attached_output))
  817. return false;
  818. intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
  819. if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
  820. return false;
  821. return true;
  822. }
  823. static bool
  824. intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
  825. struct drm_display_mode *mode,
  826. struct drm_display_mode *adjusted_mode)
  827. {
  828. /* Reset the input timing to the screen. Assume always input 0. */
  829. if (!intel_sdvo_set_target_input(intel_sdvo))
  830. return false;
  831. if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
  832. mode->clock / 10,
  833. mode->hdisplay,
  834. mode->vdisplay))
  835. return false;
  836. if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
  837. &intel_sdvo->input_dtd))
  838. return false;
  839. intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
  840. return true;
  841. }
  842. static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
  843. struct drm_display_mode *mode,
  844. struct drm_display_mode *adjusted_mode)
  845. {
  846. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  847. int multiplier;
  848. /* We need to construct preferred input timings based on our
  849. * output timings. To do that, we have to set the output
  850. * timings, even though this isn't really the right place in
  851. * the sequence to do it. Oh well.
  852. */
  853. if (intel_sdvo->is_tv) {
  854. if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
  855. return false;
  856. (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
  857. mode,
  858. adjusted_mode);
  859. } else if (intel_sdvo->is_lvds) {
  860. if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
  861. intel_sdvo->sdvo_lvds_fixed_mode))
  862. return false;
  863. (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
  864. mode,
  865. adjusted_mode);
  866. }
  867. /* Make the CRTC code factor in the SDVO pixel multiplier. The
  868. * SDVO device will factor out the multiplier during mode_set.
  869. */
  870. multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
  871. intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
  872. return true;
  873. }
  874. static void intel_sdvo_mode_set(struct drm_encoder *encoder,
  875. struct drm_display_mode *mode,
  876. struct drm_display_mode *adjusted_mode)
  877. {
  878. struct drm_device *dev = encoder->dev;
  879. struct drm_i915_private *dev_priv = dev->dev_private;
  880. struct drm_crtc *crtc = encoder->crtc;
  881. struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  882. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  883. u32 sdvox;
  884. struct intel_sdvo_in_out_map in_out;
  885. struct intel_sdvo_dtd input_dtd, output_dtd;
  886. int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
  887. int rate;
  888. if (!mode)
  889. return;
  890. /* First, set the input mapping for the first input to our controlled
  891. * output. This is only correct if we're a single-input device, in
  892. * which case the first input is the output from the appropriate SDVO
  893. * channel on the motherboard. In a two-input device, the first input
  894. * will be SDVOB and the second SDVOC.
  895. */
  896. in_out.in0 = intel_sdvo->attached_output;
  897. in_out.in1 = 0;
  898. intel_sdvo_set_value(intel_sdvo,
  899. SDVO_CMD_SET_IN_OUT_MAP,
  900. &in_out, sizeof(in_out));
  901. /* Set the output timings to the screen */
  902. if (!intel_sdvo_set_target_output(intel_sdvo,
  903. intel_sdvo->attached_output))
  904. return;
  905. /* lvds has a special fixed output timing. */
  906. if (intel_sdvo->is_lvds)
  907. intel_sdvo_get_dtd_from_mode(&output_dtd,
  908. intel_sdvo->sdvo_lvds_fixed_mode);
  909. else
  910. intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
  911. (void) intel_sdvo_set_output_timing(intel_sdvo, &output_dtd);
  912. /* Set the input timing to the screen. Assume always input 0. */
  913. if (!intel_sdvo_set_target_input(intel_sdvo))
  914. return;
  915. if (intel_sdvo->has_hdmi_monitor) {
  916. intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
  917. intel_sdvo_set_colorimetry(intel_sdvo,
  918. SDVO_COLORIMETRY_RGB256);
  919. intel_sdvo_set_avi_infoframe(intel_sdvo);
  920. } else
  921. intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
  922. if (intel_sdvo->is_tv &&
  923. !intel_sdvo_set_tv_format(intel_sdvo))
  924. return;
  925. /* We have tried to get input timing in mode_fixup, and filled into
  926. * adjusted_mode.
  927. */
  928. intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
  929. (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
  930. switch (pixel_multiplier) {
  931. default:
  932. case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
  933. case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
  934. case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
  935. }
  936. if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
  937. return;
  938. /* Set the SDVO control regs. */
  939. if (INTEL_INFO(dev)->gen >= 4) {
  940. /* The real mode polarity is set by the SDVO commands, using
  941. * struct intel_sdvo_dtd. */
  942. sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
  943. if (intel_sdvo->is_hdmi)
  944. sdvox |= intel_sdvo->color_range;
  945. if (INTEL_INFO(dev)->gen < 5)
  946. sdvox |= SDVO_BORDER_ENABLE;
  947. } else {
  948. sdvox = I915_READ(intel_sdvo->sdvo_reg);
  949. switch (intel_sdvo->sdvo_reg) {
  950. case SDVOB:
  951. sdvox &= SDVOB_PRESERVE_MASK;
  952. break;
  953. case SDVOC:
  954. sdvox &= SDVOC_PRESERVE_MASK;
  955. break;
  956. }
  957. sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
  958. }
  959. if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
  960. sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
  961. else
  962. sdvox |= TRANSCODER(intel_crtc->pipe);
  963. if (intel_sdvo->has_hdmi_audio)
  964. sdvox |= SDVO_AUDIO_ENABLE;
  965. if (INTEL_INFO(dev)->gen >= 4) {
  966. /* done in crtc_mode_set as the dpll_md reg must be written early */
  967. } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
  968. /* done in crtc_mode_set as it lives inside the dpll register */
  969. } else {
  970. sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
  971. }
  972. if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
  973. INTEL_INFO(dev)->gen < 5)
  974. sdvox |= SDVO_STALL_SELECT;
  975. intel_sdvo_write_sdvox(intel_sdvo, sdvox);
  976. }
  977. static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
  978. {
  979. struct drm_device *dev = encoder->dev;
  980. struct drm_i915_private *dev_priv = dev->dev_private;
  981. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  982. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
  983. u32 temp;
  984. if (mode != DRM_MODE_DPMS_ON) {
  985. intel_sdvo_set_active_outputs(intel_sdvo, 0);
  986. if (0)
  987. intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
  988. if (mode == DRM_MODE_DPMS_OFF) {
  989. temp = I915_READ(intel_sdvo->sdvo_reg);
  990. if ((temp & SDVO_ENABLE) != 0) {
  991. intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
  992. }
  993. }
  994. } else {
  995. bool input1, input2;
  996. int i;
  997. u8 status;
  998. temp = I915_READ(intel_sdvo->sdvo_reg);
  999. if ((temp & SDVO_ENABLE) == 0)
  1000. intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
  1001. for (i = 0; i < 2; i++)
  1002. intel_wait_for_vblank(dev, intel_crtc->pipe);
  1003. status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
  1004. /* Warn if the device reported failure to sync.
  1005. * A lot of SDVO devices fail to notify of sync, but it's
  1006. * a given it the status is a success, we succeeded.
  1007. */
  1008. if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
  1009. DRM_DEBUG_KMS("First %s output reported failure to "
  1010. "sync\n", SDVO_NAME(intel_sdvo));
  1011. }
  1012. if (0)
  1013. intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
  1014. intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
  1015. }
  1016. return;
  1017. }
  1018. static int intel_sdvo_mode_valid(struct drm_connector *connector,
  1019. struct drm_display_mode *mode)
  1020. {
  1021. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1022. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  1023. return MODE_NO_DBLESCAN;
  1024. if (intel_sdvo->pixel_clock_min > mode->clock)
  1025. return MODE_CLOCK_LOW;
  1026. if (intel_sdvo->pixel_clock_max < mode->clock)
  1027. return MODE_CLOCK_HIGH;
  1028. if (intel_sdvo->is_lvds) {
  1029. if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
  1030. return MODE_PANEL;
  1031. if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
  1032. return MODE_PANEL;
  1033. }
  1034. return MODE_OK;
  1035. }
  1036. static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
  1037. {
  1038. BUILD_BUG_ON(sizeof(*caps) != 8);
  1039. if (!intel_sdvo_get_value(intel_sdvo,
  1040. SDVO_CMD_GET_DEVICE_CAPS,
  1041. caps, sizeof(*caps)))
  1042. return false;
  1043. DRM_DEBUG_KMS("SDVO capabilities:\n"
  1044. " vendor_id: %d\n"
  1045. " device_id: %d\n"
  1046. " device_rev_id: %d\n"
  1047. " sdvo_version_major: %d\n"
  1048. " sdvo_version_minor: %d\n"
  1049. " sdvo_inputs_mask: %d\n"
  1050. " smooth_scaling: %d\n"
  1051. " sharp_scaling: %d\n"
  1052. " up_scaling: %d\n"
  1053. " down_scaling: %d\n"
  1054. " stall_support: %d\n"
  1055. " output_flags: %d\n",
  1056. caps->vendor_id,
  1057. caps->device_id,
  1058. caps->device_rev_id,
  1059. caps->sdvo_version_major,
  1060. caps->sdvo_version_minor,
  1061. caps->sdvo_inputs_mask,
  1062. caps->smooth_scaling,
  1063. caps->sharp_scaling,
  1064. caps->up_scaling,
  1065. caps->down_scaling,
  1066. caps->stall_support,
  1067. caps->output_flags);
  1068. return true;
  1069. }
  1070. static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
  1071. {
  1072. u8 response[2];
  1073. return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
  1074. &response, 2) && response[0];
  1075. }
  1076. static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
  1077. {
  1078. struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
  1079. intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &intel_sdvo->hotplug_active, 2);
  1080. }
  1081. static bool
  1082. intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
  1083. {
  1084. /* Is there more than one type of output? */
  1085. return hweight16(intel_sdvo->caps.output_flags) > 1;
  1086. }
  1087. static struct edid *
  1088. intel_sdvo_get_edid(struct drm_connector *connector)
  1089. {
  1090. struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
  1091. return drm_get_edid(connector, &sdvo->ddc);
  1092. }
  1093. /* Mac mini hack -- use the same DDC as the analog connector */
  1094. static struct edid *
  1095. intel_sdvo_get_analog_edid(struct drm_connector *connector)
  1096. {
  1097. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1098. return drm_get_edid(connector,
  1099. intel_gmbus_get_adapter(dev_priv,
  1100. dev_priv->crt_ddc_pin));
  1101. }
  1102. static enum drm_connector_status
  1103. intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
  1104. {
  1105. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1106. enum drm_connector_status status;
  1107. struct edid *edid;
  1108. edid = intel_sdvo_get_edid(connector);
  1109. if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
  1110. u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
  1111. /*
  1112. * Don't use the 1 as the argument of DDC bus switch to get
  1113. * the EDID. It is used for SDVO SPD ROM.
  1114. */
  1115. for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
  1116. intel_sdvo->ddc_bus = ddc;
  1117. edid = intel_sdvo_get_edid(connector);
  1118. if (edid)
  1119. break;
  1120. }
  1121. /*
  1122. * If we found the EDID on the other bus,
  1123. * assume that is the correct DDC bus.
  1124. */
  1125. if (edid == NULL)
  1126. intel_sdvo->ddc_bus = saved_ddc;
  1127. }
  1128. /*
  1129. * When there is no edid and no monitor is connected with VGA
  1130. * port, try to use the CRT ddc to read the EDID for DVI-connector.
  1131. */
  1132. if (edid == NULL)
  1133. edid = intel_sdvo_get_analog_edid(connector);
  1134. status = connector_status_unknown;
  1135. if (edid != NULL) {
  1136. /* DDC bus is shared, match EDID to connector type */
  1137. if (edid->input & DRM_EDID_INPUT_DIGITAL) {
  1138. status = connector_status_connected;
  1139. if (intel_sdvo->is_hdmi) {
  1140. intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
  1141. intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
  1142. }
  1143. } else
  1144. status = connector_status_disconnected;
  1145. connector->display_info.raw_edid = NULL;
  1146. kfree(edid);
  1147. }
  1148. if (status == connector_status_connected) {
  1149. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1150. if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
  1151. intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
  1152. }
  1153. return status;
  1154. }
  1155. static bool
  1156. intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
  1157. struct edid *edid)
  1158. {
  1159. bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
  1160. bool connector_is_digital = !!IS_DIGITAL(sdvo);
  1161. DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
  1162. connector_is_digital, monitor_is_digital);
  1163. return connector_is_digital == monitor_is_digital;
  1164. }
  1165. static enum drm_connector_status
  1166. intel_sdvo_detect(struct drm_connector *connector, bool force)
  1167. {
  1168. uint16_t response;
  1169. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1170. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1171. enum drm_connector_status ret;
  1172. if (!intel_sdvo_write_cmd(intel_sdvo,
  1173. SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
  1174. return connector_status_unknown;
  1175. /* add 30ms delay when the output type might be TV */
  1176. if (intel_sdvo->caps.output_flags & SDVO_TV_MASK)
  1177. mdelay(30);
  1178. if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
  1179. return connector_status_unknown;
  1180. DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
  1181. response & 0xff, response >> 8,
  1182. intel_sdvo_connector->output_flag);
  1183. if (response == 0)
  1184. return connector_status_disconnected;
  1185. intel_sdvo->attached_output = response;
  1186. intel_sdvo->has_hdmi_monitor = false;
  1187. intel_sdvo->has_hdmi_audio = false;
  1188. if ((intel_sdvo_connector->output_flag & response) == 0)
  1189. ret = connector_status_disconnected;
  1190. else if (IS_TMDS(intel_sdvo_connector))
  1191. ret = intel_sdvo_tmds_sink_detect(connector);
  1192. else {
  1193. struct edid *edid;
  1194. /* if we have an edid check it matches the connection */
  1195. edid = intel_sdvo_get_edid(connector);
  1196. if (edid == NULL)
  1197. edid = intel_sdvo_get_analog_edid(connector);
  1198. if (edid != NULL) {
  1199. if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
  1200. edid))
  1201. ret = connector_status_connected;
  1202. else
  1203. ret = connector_status_disconnected;
  1204. connector->display_info.raw_edid = NULL;
  1205. kfree(edid);
  1206. } else
  1207. ret = connector_status_connected;
  1208. }
  1209. /* May update encoder flag for like clock for SDVO TV, etc.*/
  1210. if (ret == connector_status_connected) {
  1211. intel_sdvo->is_tv = false;
  1212. intel_sdvo->is_lvds = false;
  1213. intel_sdvo->base.needs_tv_clock = false;
  1214. if (response & SDVO_TV_MASK) {
  1215. intel_sdvo->is_tv = true;
  1216. intel_sdvo->base.needs_tv_clock = true;
  1217. }
  1218. if (response & SDVO_LVDS_MASK)
  1219. intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
  1220. }
  1221. return ret;
  1222. }
  1223. static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
  1224. {
  1225. struct edid *edid;
  1226. /* set the bus switch and get the modes */
  1227. edid = intel_sdvo_get_edid(connector);
  1228. /*
  1229. * Mac mini hack. On this device, the DVI-I connector shares one DDC
  1230. * link between analog and digital outputs. So, if the regular SDVO
  1231. * DDC fails, check to see if the analog output is disconnected, in
  1232. * which case we'll look there for the digital DDC data.
  1233. */
  1234. if (edid == NULL)
  1235. edid = intel_sdvo_get_analog_edid(connector);
  1236. if (edid != NULL) {
  1237. if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
  1238. edid)) {
  1239. drm_mode_connector_update_edid_property(connector, edid);
  1240. drm_add_edid_modes(connector, edid);
  1241. }
  1242. connector->display_info.raw_edid = NULL;
  1243. kfree(edid);
  1244. }
  1245. }
  1246. /*
  1247. * Set of SDVO TV modes.
  1248. * Note! This is in reply order (see loop in get_tv_modes).
  1249. * XXX: all 60Hz refresh?
  1250. */
  1251. static const struct drm_display_mode sdvo_tv_modes[] = {
  1252. { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
  1253. 416, 0, 200, 201, 232, 233, 0,
  1254. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1255. { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
  1256. 416, 0, 240, 241, 272, 273, 0,
  1257. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1258. { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
  1259. 496, 0, 300, 301, 332, 333, 0,
  1260. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1261. { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
  1262. 736, 0, 350, 351, 382, 383, 0,
  1263. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1264. { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
  1265. 736, 0, 400, 401, 432, 433, 0,
  1266. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1267. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
  1268. 736, 0, 480, 481, 512, 513, 0,
  1269. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1270. { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
  1271. 800, 0, 480, 481, 512, 513, 0,
  1272. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1273. { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
  1274. 800, 0, 576, 577, 608, 609, 0,
  1275. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1276. { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
  1277. 816, 0, 350, 351, 382, 383, 0,
  1278. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1279. { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
  1280. 816, 0, 400, 401, 432, 433, 0,
  1281. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1282. { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
  1283. 816, 0, 480, 481, 512, 513, 0,
  1284. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1285. { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
  1286. 816, 0, 540, 541, 572, 573, 0,
  1287. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1288. { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
  1289. 816, 0, 576, 577, 608, 609, 0,
  1290. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1291. { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
  1292. 864, 0, 576, 577, 608, 609, 0,
  1293. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1294. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
  1295. 896, 0, 600, 601, 632, 633, 0,
  1296. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1297. { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
  1298. 928, 0, 624, 625, 656, 657, 0,
  1299. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1300. { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
  1301. 1016, 0, 766, 767, 798, 799, 0,
  1302. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1303. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
  1304. 1120, 0, 768, 769, 800, 801, 0,
  1305. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1306. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
  1307. 1376, 0, 1024, 1025, 1056, 1057, 0,
  1308. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1309. };
  1310. static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
  1311. {
  1312. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1313. struct intel_sdvo_sdtv_resolution_request tv_res;
  1314. uint32_t reply = 0, format_map = 0;
  1315. int i;
  1316. /* Read the list of supported input resolutions for the selected TV
  1317. * format.
  1318. */
  1319. format_map = 1 << intel_sdvo->tv_format_index;
  1320. memcpy(&tv_res, &format_map,
  1321. min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
  1322. if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
  1323. return;
  1324. BUILD_BUG_ON(sizeof(tv_res) != 3);
  1325. if (!intel_sdvo_write_cmd(intel_sdvo,
  1326. SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
  1327. &tv_res, sizeof(tv_res)))
  1328. return;
  1329. if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
  1330. return;
  1331. for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
  1332. if (reply & (1 << i)) {
  1333. struct drm_display_mode *nmode;
  1334. nmode = drm_mode_duplicate(connector->dev,
  1335. &sdvo_tv_modes[i]);
  1336. if (nmode)
  1337. drm_mode_probed_add(connector, nmode);
  1338. }
  1339. }
  1340. static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
  1341. {
  1342. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1343. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1344. struct drm_display_mode *newmode;
  1345. /*
  1346. * Attempt to get the mode list from DDC.
  1347. * Assume that the preferred modes are
  1348. * arranged in priority order.
  1349. */
  1350. intel_ddc_get_modes(connector, intel_sdvo->i2c);
  1351. if (list_empty(&connector->probed_modes) == false)
  1352. goto end;
  1353. /* Fetch modes from VBT */
  1354. if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
  1355. newmode = drm_mode_duplicate(connector->dev,
  1356. dev_priv->sdvo_lvds_vbt_mode);
  1357. if (newmode != NULL) {
  1358. /* Guarantee the mode is preferred */
  1359. newmode->type = (DRM_MODE_TYPE_PREFERRED |
  1360. DRM_MODE_TYPE_DRIVER);
  1361. drm_mode_probed_add(connector, newmode);
  1362. }
  1363. }
  1364. end:
  1365. list_for_each_entry(newmode, &connector->probed_modes, head) {
  1366. if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
  1367. intel_sdvo->sdvo_lvds_fixed_mode =
  1368. drm_mode_duplicate(connector->dev, newmode);
  1369. intel_sdvo->is_lvds = true;
  1370. break;
  1371. }
  1372. }
  1373. }
  1374. static int intel_sdvo_get_modes(struct drm_connector *connector)
  1375. {
  1376. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1377. if (IS_TV(intel_sdvo_connector))
  1378. intel_sdvo_get_tv_modes(connector);
  1379. else if (IS_LVDS(intel_sdvo_connector))
  1380. intel_sdvo_get_lvds_modes(connector);
  1381. else
  1382. intel_sdvo_get_ddc_modes(connector);
  1383. return !list_empty(&connector->probed_modes);
  1384. }
  1385. static void
  1386. intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
  1387. {
  1388. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1389. struct drm_device *dev = connector->dev;
  1390. if (intel_sdvo_connector->left)
  1391. drm_property_destroy(dev, intel_sdvo_connector->left);
  1392. if (intel_sdvo_connector->right)
  1393. drm_property_destroy(dev, intel_sdvo_connector->right);
  1394. if (intel_sdvo_connector->top)
  1395. drm_property_destroy(dev, intel_sdvo_connector->top);
  1396. if (intel_sdvo_connector->bottom)
  1397. drm_property_destroy(dev, intel_sdvo_connector->bottom);
  1398. if (intel_sdvo_connector->hpos)
  1399. drm_property_destroy(dev, intel_sdvo_connector->hpos);
  1400. if (intel_sdvo_connector->vpos)
  1401. drm_property_destroy(dev, intel_sdvo_connector->vpos);
  1402. if (intel_sdvo_connector->saturation)
  1403. drm_property_destroy(dev, intel_sdvo_connector->saturation);
  1404. if (intel_sdvo_connector->contrast)
  1405. drm_property_destroy(dev, intel_sdvo_connector->contrast);
  1406. if (intel_sdvo_connector->hue)
  1407. drm_property_destroy(dev, intel_sdvo_connector->hue);
  1408. if (intel_sdvo_connector->sharpness)
  1409. drm_property_destroy(dev, intel_sdvo_connector->sharpness);
  1410. if (intel_sdvo_connector->flicker_filter)
  1411. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
  1412. if (intel_sdvo_connector->flicker_filter_2d)
  1413. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
  1414. if (intel_sdvo_connector->flicker_filter_adaptive)
  1415. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
  1416. if (intel_sdvo_connector->tv_luma_filter)
  1417. drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
  1418. if (intel_sdvo_connector->tv_chroma_filter)
  1419. drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
  1420. if (intel_sdvo_connector->dot_crawl)
  1421. drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
  1422. if (intel_sdvo_connector->brightness)
  1423. drm_property_destroy(dev, intel_sdvo_connector->brightness);
  1424. }
  1425. static void intel_sdvo_destroy(struct drm_connector *connector)
  1426. {
  1427. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1428. if (intel_sdvo_connector->tv_format)
  1429. drm_property_destroy(connector->dev,
  1430. intel_sdvo_connector->tv_format);
  1431. intel_sdvo_destroy_enhance_property(connector);
  1432. drm_sysfs_connector_remove(connector);
  1433. drm_connector_cleanup(connector);
  1434. kfree(connector);
  1435. }
  1436. static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
  1437. {
  1438. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1439. struct edid *edid;
  1440. bool has_audio = false;
  1441. if (!intel_sdvo->is_hdmi)
  1442. return false;
  1443. edid = intel_sdvo_get_edid(connector);
  1444. if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
  1445. has_audio = drm_detect_monitor_audio(edid);
  1446. return has_audio;
  1447. }
  1448. static int
  1449. intel_sdvo_set_property(struct drm_connector *connector,
  1450. struct drm_property *property,
  1451. uint64_t val)
  1452. {
  1453. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1454. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1455. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1456. uint16_t temp_value;
  1457. uint8_t cmd;
  1458. int ret;
  1459. ret = drm_connector_property_set_value(connector, property, val);
  1460. if (ret)
  1461. return ret;
  1462. if (property == dev_priv->force_audio_property) {
  1463. int i = val;
  1464. bool has_audio;
  1465. if (i == intel_sdvo_connector->force_audio)
  1466. return 0;
  1467. intel_sdvo_connector->force_audio = i;
  1468. if (i == HDMI_AUDIO_AUTO)
  1469. has_audio = intel_sdvo_detect_hdmi_audio(connector);
  1470. else
  1471. has_audio = (i == HDMI_AUDIO_ON);
  1472. if (has_audio == intel_sdvo->has_hdmi_audio)
  1473. return 0;
  1474. intel_sdvo->has_hdmi_audio = has_audio;
  1475. goto done;
  1476. }
  1477. if (property == dev_priv->broadcast_rgb_property) {
  1478. if (val == !!intel_sdvo->color_range)
  1479. return 0;
  1480. intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
  1481. goto done;
  1482. }
  1483. #define CHECK_PROPERTY(name, NAME) \
  1484. if (intel_sdvo_connector->name == property) { \
  1485. if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
  1486. if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
  1487. cmd = SDVO_CMD_SET_##NAME; \
  1488. intel_sdvo_connector->cur_##name = temp_value; \
  1489. goto set_value; \
  1490. }
  1491. if (property == intel_sdvo_connector->tv_format) {
  1492. if (val >= TV_FORMAT_NUM)
  1493. return -EINVAL;
  1494. if (intel_sdvo->tv_format_index ==
  1495. intel_sdvo_connector->tv_format_supported[val])
  1496. return 0;
  1497. intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
  1498. goto done;
  1499. } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
  1500. temp_value = val;
  1501. if (intel_sdvo_connector->left == property) {
  1502. drm_connector_property_set_value(connector,
  1503. intel_sdvo_connector->right, val);
  1504. if (intel_sdvo_connector->left_margin == temp_value)
  1505. return 0;
  1506. intel_sdvo_connector->left_margin = temp_value;
  1507. intel_sdvo_connector->right_margin = temp_value;
  1508. temp_value = intel_sdvo_connector->max_hscan -
  1509. intel_sdvo_connector->left_margin;
  1510. cmd = SDVO_CMD_SET_OVERSCAN_H;
  1511. goto set_value;
  1512. } else if (intel_sdvo_connector->right == property) {
  1513. drm_connector_property_set_value(connector,
  1514. intel_sdvo_connector->left, val);
  1515. if (intel_sdvo_connector->right_margin == temp_value)
  1516. return 0;
  1517. intel_sdvo_connector->left_margin = temp_value;
  1518. intel_sdvo_connector->right_margin = temp_value;
  1519. temp_value = intel_sdvo_connector->max_hscan -
  1520. intel_sdvo_connector->left_margin;
  1521. cmd = SDVO_CMD_SET_OVERSCAN_H;
  1522. goto set_value;
  1523. } else if (intel_sdvo_connector->top == property) {
  1524. drm_connector_property_set_value(connector,
  1525. intel_sdvo_connector->bottom, val);
  1526. if (intel_sdvo_connector->top_margin == temp_value)
  1527. return 0;
  1528. intel_sdvo_connector->top_margin = temp_value;
  1529. intel_sdvo_connector->bottom_margin = temp_value;
  1530. temp_value = intel_sdvo_connector->max_vscan -
  1531. intel_sdvo_connector->top_margin;
  1532. cmd = SDVO_CMD_SET_OVERSCAN_V;
  1533. goto set_value;
  1534. } else if (intel_sdvo_connector->bottom == property) {
  1535. drm_connector_property_set_value(connector,
  1536. intel_sdvo_connector->top, val);
  1537. if (intel_sdvo_connector->bottom_margin == temp_value)
  1538. return 0;
  1539. intel_sdvo_connector->top_margin = temp_value;
  1540. intel_sdvo_connector->bottom_margin = temp_value;
  1541. temp_value = intel_sdvo_connector->max_vscan -
  1542. intel_sdvo_connector->top_margin;
  1543. cmd = SDVO_CMD_SET_OVERSCAN_V;
  1544. goto set_value;
  1545. }
  1546. CHECK_PROPERTY(hpos, HPOS)
  1547. CHECK_PROPERTY(vpos, VPOS)
  1548. CHECK_PROPERTY(saturation, SATURATION)
  1549. CHECK_PROPERTY(contrast, CONTRAST)
  1550. CHECK_PROPERTY(hue, HUE)
  1551. CHECK_PROPERTY(brightness, BRIGHTNESS)
  1552. CHECK_PROPERTY(sharpness, SHARPNESS)
  1553. CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
  1554. CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
  1555. CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
  1556. CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
  1557. CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
  1558. CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
  1559. }
  1560. return -EINVAL; /* unknown property */
  1561. set_value:
  1562. if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
  1563. return -EIO;
  1564. done:
  1565. if (intel_sdvo->base.base.crtc) {
  1566. struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
  1567. drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
  1568. crtc->y, crtc->fb);
  1569. }
  1570. return 0;
  1571. #undef CHECK_PROPERTY
  1572. }
  1573. static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
  1574. .dpms = intel_sdvo_dpms,
  1575. .mode_fixup = intel_sdvo_mode_fixup,
  1576. .prepare = intel_encoder_prepare,
  1577. .mode_set = intel_sdvo_mode_set,
  1578. .commit = intel_encoder_commit,
  1579. };
  1580. static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
  1581. .dpms = drm_helper_connector_dpms,
  1582. .detect = intel_sdvo_detect,
  1583. .fill_modes = drm_helper_probe_single_connector_modes,
  1584. .set_property = intel_sdvo_set_property,
  1585. .destroy = intel_sdvo_destroy,
  1586. };
  1587. static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
  1588. .get_modes = intel_sdvo_get_modes,
  1589. .mode_valid = intel_sdvo_mode_valid,
  1590. .best_encoder = intel_best_encoder,
  1591. };
  1592. static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
  1593. {
  1594. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  1595. if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
  1596. drm_mode_destroy(encoder->dev,
  1597. intel_sdvo->sdvo_lvds_fixed_mode);
  1598. i2c_del_adapter(&intel_sdvo->ddc);
  1599. intel_encoder_destroy(encoder);
  1600. }
  1601. static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
  1602. .destroy = intel_sdvo_enc_destroy,
  1603. };
  1604. static void
  1605. intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
  1606. {
  1607. uint16_t mask = 0;
  1608. unsigned int num_bits;
  1609. /* Make a mask of outputs less than or equal to our own priority in the
  1610. * list.
  1611. */
  1612. switch (sdvo->controlled_output) {
  1613. case SDVO_OUTPUT_LVDS1:
  1614. mask |= SDVO_OUTPUT_LVDS1;
  1615. case SDVO_OUTPUT_LVDS0:
  1616. mask |= SDVO_OUTPUT_LVDS0;
  1617. case SDVO_OUTPUT_TMDS1:
  1618. mask |= SDVO_OUTPUT_TMDS1;
  1619. case SDVO_OUTPUT_TMDS0:
  1620. mask |= SDVO_OUTPUT_TMDS0;
  1621. case SDVO_OUTPUT_RGB1:
  1622. mask |= SDVO_OUTPUT_RGB1;
  1623. case SDVO_OUTPUT_RGB0:
  1624. mask |= SDVO_OUTPUT_RGB0;
  1625. break;
  1626. }
  1627. /* Count bits to find what number we are in the priority list. */
  1628. mask &= sdvo->caps.output_flags;
  1629. num_bits = hweight16(mask);
  1630. /* If more than 3 outputs, default to DDC bus 3 for now. */
  1631. if (num_bits > 3)
  1632. num_bits = 3;
  1633. /* Corresponds to SDVO_CONTROL_BUS_DDCx */
  1634. sdvo->ddc_bus = 1 << num_bits;
  1635. }
  1636. /**
  1637. * Choose the appropriate DDC bus for control bus switch command for this
  1638. * SDVO output based on the controlled output.
  1639. *
  1640. * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
  1641. * outputs, then LVDS outputs.
  1642. */
  1643. static void
  1644. intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
  1645. struct intel_sdvo *sdvo, u32 reg)
  1646. {
  1647. struct sdvo_device_mapping *mapping;
  1648. if (sdvo->is_sdvob)
  1649. mapping = &(dev_priv->sdvo_mappings[0]);
  1650. else
  1651. mapping = &(dev_priv->sdvo_mappings[1]);
  1652. if (mapping->initialized)
  1653. sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
  1654. else
  1655. intel_sdvo_guess_ddc_bus(sdvo);
  1656. }
  1657. static void
  1658. intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
  1659. struct intel_sdvo *sdvo, u32 reg)
  1660. {
  1661. struct sdvo_device_mapping *mapping;
  1662. u8 pin;
  1663. if (sdvo->is_sdvob)
  1664. mapping = &dev_priv->sdvo_mappings[0];
  1665. else
  1666. mapping = &dev_priv->sdvo_mappings[1];
  1667. pin = GMBUS_PORT_DPB;
  1668. if (mapping->initialized)
  1669. pin = mapping->i2c_pin;
  1670. if (intel_gmbus_is_port_valid(pin)) {
  1671. sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
  1672. intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
  1673. intel_gmbus_force_bit(sdvo->i2c, true);
  1674. } else {
  1675. sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
  1676. }
  1677. }
  1678. static bool
  1679. intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
  1680. {
  1681. return intel_sdvo_check_supp_encode(intel_sdvo);
  1682. }
  1683. static u8
  1684. intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
  1685. {
  1686. struct drm_i915_private *dev_priv = dev->dev_private;
  1687. struct sdvo_device_mapping *my_mapping, *other_mapping;
  1688. if (sdvo->is_sdvob) {
  1689. my_mapping = &dev_priv->sdvo_mappings[0];
  1690. other_mapping = &dev_priv->sdvo_mappings[1];
  1691. } else {
  1692. my_mapping = &dev_priv->sdvo_mappings[1];
  1693. other_mapping = &dev_priv->sdvo_mappings[0];
  1694. }
  1695. /* If the BIOS described our SDVO device, take advantage of it. */
  1696. if (my_mapping->slave_addr)
  1697. return my_mapping->slave_addr;
  1698. /* If the BIOS only described a different SDVO device, use the
  1699. * address that it isn't using.
  1700. */
  1701. if (other_mapping->slave_addr) {
  1702. if (other_mapping->slave_addr == 0x70)
  1703. return 0x72;
  1704. else
  1705. return 0x70;
  1706. }
  1707. /* No SDVO device info is found for another DVO port,
  1708. * so use mapping assumption we had before BIOS parsing.
  1709. */
  1710. if (sdvo->is_sdvob)
  1711. return 0x70;
  1712. else
  1713. return 0x72;
  1714. }
  1715. static void
  1716. intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
  1717. struct intel_sdvo *encoder)
  1718. {
  1719. drm_connector_init(encoder->base.base.dev,
  1720. &connector->base.base,
  1721. &intel_sdvo_connector_funcs,
  1722. connector->base.base.connector_type);
  1723. drm_connector_helper_add(&connector->base.base,
  1724. &intel_sdvo_connector_helper_funcs);
  1725. connector->base.base.interlace_allowed = 1;
  1726. connector->base.base.doublescan_allowed = 0;
  1727. connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
  1728. intel_connector_attach_encoder(&connector->base, &encoder->base);
  1729. drm_sysfs_connector_add(&connector->base.base);
  1730. }
  1731. static void
  1732. intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
  1733. {
  1734. struct drm_device *dev = connector->base.base.dev;
  1735. intel_attach_force_audio_property(&connector->base.base);
  1736. if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
  1737. intel_attach_broadcast_rgb_property(&connector->base.base);
  1738. }
  1739. static bool
  1740. intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
  1741. {
  1742. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1743. struct drm_connector *connector;
  1744. struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
  1745. struct intel_connector *intel_connector;
  1746. struct intel_sdvo_connector *intel_sdvo_connector;
  1747. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1748. if (!intel_sdvo_connector)
  1749. return false;
  1750. if (device == 0) {
  1751. intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
  1752. intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
  1753. } else if (device == 1) {
  1754. intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
  1755. intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
  1756. }
  1757. intel_connector = &intel_sdvo_connector->base;
  1758. connector = &intel_connector->base;
  1759. if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
  1760. connector->polled = DRM_CONNECTOR_POLL_HPD;
  1761. intel_sdvo->hotplug_active[0] |= 1 << device;
  1762. /* Some SDVO devices have one-shot hotplug interrupts.
  1763. * Ensure that they get re-enabled when an interrupt happens.
  1764. */
  1765. intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
  1766. intel_sdvo_enable_hotplug(intel_encoder);
  1767. }
  1768. else
  1769. connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
  1770. encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
  1771. connector->connector_type = DRM_MODE_CONNECTOR_DVID;
  1772. if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
  1773. connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
  1774. intel_sdvo->is_hdmi = true;
  1775. }
  1776. intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
  1777. (1 << INTEL_ANALOG_CLONE_BIT));
  1778. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1779. if (intel_sdvo->is_hdmi)
  1780. intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
  1781. return true;
  1782. }
  1783. static bool
  1784. intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
  1785. {
  1786. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1787. struct drm_connector *connector;
  1788. struct intel_connector *intel_connector;
  1789. struct intel_sdvo_connector *intel_sdvo_connector;
  1790. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1791. if (!intel_sdvo_connector)
  1792. return false;
  1793. intel_connector = &intel_sdvo_connector->base;
  1794. connector = &intel_connector->base;
  1795. encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
  1796. connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
  1797. intel_sdvo->controlled_output |= type;
  1798. intel_sdvo_connector->output_flag = type;
  1799. intel_sdvo->is_tv = true;
  1800. intel_sdvo->base.needs_tv_clock = true;
  1801. intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
  1802. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1803. if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
  1804. goto err;
  1805. if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
  1806. goto err;
  1807. return true;
  1808. err:
  1809. intel_sdvo_destroy(connector);
  1810. return false;
  1811. }
  1812. static bool
  1813. intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
  1814. {
  1815. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1816. struct drm_connector *connector;
  1817. struct intel_connector *intel_connector;
  1818. struct intel_sdvo_connector *intel_sdvo_connector;
  1819. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1820. if (!intel_sdvo_connector)
  1821. return false;
  1822. intel_connector = &intel_sdvo_connector->base;
  1823. connector = &intel_connector->base;
  1824. connector->polled = DRM_CONNECTOR_POLL_CONNECT;
  1825. encoder->encoder_type = DRM_MODE_ENCODER_DAC;
  1826. connector->connector_type = DRM_MODE_CONNECTOR_VGA;
  1827. if (device == 0) {
  1828. intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
  1829. intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
  1830. } else if (device == 1) {
  1831. intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
  1832. intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
  1833. }
  1834. intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
  1835. (1 << INTEL_ANALOG_CLONE_BIT));
  1836. intel_sdvo_connector_init(intel_sdvo_connector,
  1837. intel_sdvo);
  1838. return true;
  1839. }
  1840. static bool
  1841. intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
  1842. {
  1843. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1844. struct drm_connector *connector;
  1845. struct intel_connector *intel_connector;
  1846. struct intel_sdvo_connector *intel_sdvo_connector;
  1847. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1848. if (!intel_sdvo_connector)
  1849. return false;
  1850. intel_connector = &intel_sdvo_connector->base;
  1851. connector = &intel_connector->base;
  1852. encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
  1853. connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
  1854. if (device == 0) {
  1855. intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
  1856. intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
  1857. } else if (device == 1) {
  1858. intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
  1859. intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
  1860. }
  1861. intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
  1862. (1 << INTEL_SDVO_LVDS_CLONE_BIT));
  1863. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1864. if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
  1865. goto err;
  1866. return true;
  1867. err:
  1868. intel_sdvo_destroy(connector);
  1869. return false;
  1870. }
  1871. static bool
  1872. intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
  1873. {
  1874. intel_sdvo->is_tv = false;
  1875. intel_sdvo->base.needs_tv_clock = false;
  1876. intel_sdvo->is_lvds = false;
  1877. /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
  1878. if (flags & SDVO_OUTPUT_TMDS0)
  1879. if (!intel_sdvo_dvi_init(intel_sdvo, 0))
  1880. return false;
  1881. if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
  1882. if (!intel_sdvo_dvi_init(intel_sdvo, 1))
  1883. return false;
  1884. /* TV has no XXX1 function block */
  1885. if (flags & SDVO_OUTPUT_SVID0)
  1886. if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
  1887. return false;
  1888. if (flags & SDVO_OUTPUT_CVBS0)
  1889. if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
  1890. return false;
  1891. if (flags & SDVO_OUTPUT_YPRPB0)
  1892. if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
  1893. return false;
  1894. if (flags & SDVO_OUTPUT_RGB0)
  1895. if (!intel_sdvo_analog_init(intel_sdvo, 0))
  1896. return false;
  1897. if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
  1898. if (!intel_sdvo_analog_init(intel_sdvo, 1))
  1899. return false;
  1900. if (flags & SDVO_OUTPUT_LVDS0)
  1901. if (!intel_sdvo_lvds_init(intel_sdvo, 0))
  1902. return false;
  1903. if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
  1904. if (!intel_sdvo_lvds_init(intel_sdvo, 1))
  1905. return false;
  1906. if ((flags & SDVO_OUTPUT_MASK) == 0) {
  1907. unsigned char bytes[2];
  1908. intel_sdvo->controlled_output = 0;
  1909. memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
  1910. DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
  1911. SDVO_NAME(intel_sdvo),
  1912. bytes[0], bytes[1]);
  1913. return false;
  1914. }
  1915. intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  1916. return true;
  1917. }
  1918. static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
  1919. struct intel_sdvo_connector *intel_sdvo_connector,
  1920. int type)
  1921. {
  1922. struct drm_device *dev = intel_sdvo->base.base.dev;
  1923. struct intel_sdvo_tv_format format;
  1924. uint32_t format_map, i;
  1925. if (!intel_sdvo_set_target_output(intel_sdvo, type))
  1926. return false;
  1927. BUILD_BUG_ON(sizeof(format) != 6);
  1928. if (!intel_sdvo_get_value(intel_sdvo,
  1929. SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
  1930. &format, sizeof(format)))
  1931. return false;
  1932. memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
  1933. if (format_map == 0)
  1934. return false;
  1935. intel_sdvo_connector->format_supported_num = 0;
  1936. for (i = 0 ; i < TV_FORMAT_NUM; i++)
  1937. if (format_map & (1 << i))
  1938. intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
  1939. intel_sdvo_connector->tv_format =
  1940. drm_property_create(dev, DRM_MODE_PROP_ENUM,
  1941. "mode", intel_sdvo_connector->format_supported_num);
  1942. if (!intel_sdvo_connector->tv_format)
  1943. return false;
  1944. for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
  1945. drm_property_add_enum(
  1946. intel_sdvo_connector->tv_format, i,
  1947. i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
  1948. intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
  1949. drm_connector_attach_property(&intel_sdvo_connector->base.base,
  1950. intel_sdvo_connector->tv_format, 0);
  1951. return true;
  1952. }
  1953. #define ENHANCEMENT(name, NAME) do { \
  1954. if (enhancements.name) { \
  1955. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
  1956. !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
  1957. return false; \
  1958. intel_sdvo_connector->max_##name = data_value[0]; \
  1959. intel_sdvo_connector->cur_##name = response; \
  1960. intel_sdvo_connector->name = \
  1961. drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
  1962. if (!intel_sdvo_connector->name) return false; \
  1963. drm_connector_attach_property(connector, \
  1964. intel_sdvo_connector->name, \
  1965. intel_sdvo_connector->cur_##name); \
  1966. DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
  1967. data_value[0], data_value[1], response); \
  1968. } \
  1969. } while (0)
  1970. static bool
  1971. intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
  1972. struct intel_sdvo_connector *intel_sdvo_connector,
  1973. struct intel_sdvo_enhancements_reply enhancements)
  1974. {
  1975. struct drm_device *dev = intel_sdvo->base.base.dev;
  1976. struct drm_connector *connector = &intel_sdvo_connector->base.base;
  1977. uint16_t response, data_value[2];
  1978. /* when horizontal overscan is supported, Add the left/right property */
  1979. if (enhancements.overscan_h) {
  1980. if (!intel_sdvo_get_value(intel_sdvo,
  1981. SDVO_CMD_GET_MAX_OVERSCAN_H,
  1982. &data_value, 4))
  1983. return false;
  1984. if (!intel_sdvo_get_value(intel_sdvo,
  1985. SDVO_CMD_GET_OVERSCAN_H,
  1986. &response, 2))
  1987. return false;
  1988. intel_sdvo_connector->max_hscan = data_value[0];
  1989. intel_sdvo_connector->left_margin = data_value[0] - response;
  1990. intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
  1991. intel_sdvo_connector->left =
  1992. drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
  1993. if (!intel_sdvo_connector->left)
  1994. return false;
  1995. drm_connector_attach_property(connector,
  1996. intel_sdvo_connector->left,
  1997. intel_sdvo_connector->left_margin);
  1998. intel_sdvo_connector->right =
  1999. drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
  2000. if (!intel_sdvo_connector->right)
  2001. return false;
  2002. drm_connector_attach_property(connector,
  2003. intel_sdvo_connector->right,
  2004. intel_sdvo_connector->right_margin);
  2005. DRM_DEBUG_KMS("h_overscan: max %d, "
  2006. "default %d, current %d\n",
  2007. data_value[0], data_value[1], response);
  2008. }
  2009. if (enhancements.overscan_v) {
  2010. if (!intel_sdvo_get_value(intel_sdvo,
  2011. SDVO_CMD_GET_MAX_OVERSCAN_V,
  2012. &data_value, 4))
  2013. return false;
  2014. if (!intel_sdvo_get_value(intel_sdvo,
  2015. SDVO_CMD_GET_OVERSCAN_V,
  2016. &response, 2))
  2017. return false;
  2018. intel_sdvo_connector->max_vscan = data_value[0];
  2019. intel_sdvo_connector->top_margin = data_value[0] - response;
  2020. intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
  2021. intel_sdvo_connector->top =
  2022. drm_property_create_range(dev, 0,
  2023. "top_margin", 0, data_value[0]);
  2024. if (!intel_sdvo_connector->top)
  2025. return false;
  2026. drm_connector_attach_property(connector,
  2027. intel_sdvo_connector->top,
  2028. intel_sdvo_connector->top_margin);
  2029. intel_sdvo_connector->bottom =
  2030. drm_property_create_range(dev, 0,
  2031. "bottom_margin", 0, data_value[0]);
  2032. if (!intel_sdvo_connector->bottom)
  2033. return false;
  2034. drm_connector_attach_property(connector,
  2035. intel_sdvo_connector->bottom,
  2036. intel_sdvo_connector->bottom_margin);
  2037. DRM_DEBUG_KMS("v_overscan: max %d, "
  2038. "default %d, current %d\n",
  2039. data_value[0], data_value[1], response);
  2040. }
  2041. ENHANCEMENT(hpos, HPOS);
  2042. ENHANCEMENT(vpos, VPOS);
  2043. ENHANCEMENT(saturation, SATURATION);
  2044. ENHANCEMENT(contrast, CONTRAST);
  2045. ENHANCEMENT(hue, HUE);
  2046. ENHANCEMENT(sharpness, SHARPNESS);
  2047. ENHANCEMENT(brightness, BRIGHTNESS);
  2048. ENHANCEMENT(flicker_filter, FLICKER_FILTER);
  2049. ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
  2050. ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
  2051. ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
  2052. ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
  2053. if (enhancements.dot_crawl) {
  2054. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
  2055. return false;
  2056. intel_sdvo_connector->max_dot_crawl = 1;
  2057. intel_sdvo_connector->cur_dot_crawl = response & 0x1;
  2058. intel_sdvo_connector->dot_crawl =
  2059. drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
  2060. if (!intel_sdvo_connector->dot_crawl)
  2061. return false;
  2062. drm_connector_attach_property(connector,
  2063. intel_sdvo_connector->dot_crawl,
  2064. intel_sdvo_connector->cur_dot_crawl);
  2065. DRM_DEBUG_KMS("dot crawl: current %d\n", response);
  2066. }
  2067. return true;
  2068. }
  2069. static bool
  2070. intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
  2071. struct intel_sdvo_connector *intel_sdvo_connector,
  2072. struct intel_sdvo_enhancements_reply enhancements)
  2073. {
  2074. struct drm_device *dev = intel_sdvo->base.base.dev;
  2075. struct drm_connector *connector = &intel_sdvo_connector->base.base;
  2076. uint16_t response, data_value[2];
  2077. ENHANCEMENT(brightness, BRIGHTNESS);
  2078. return true;
  2079. }
  2080. #undef ENHANCEMENT
  2081. static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
  2082. struct intel_sdvo_connector *intel_sdvo_connector)
  2083. {
  2084. union {
  2085. struct intel_sdvo_enhancements_reply reply;
  2086. uint16_t response;
  2087. } enhancements;
  2088. BUILD_BUG_ON(sizeof(enhancements) != 2);
  2089. enhancements.response = 0;
  2090. intel_sdvo_get_value(intel_sdvo,
  2091. SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
  2092. &enhancements, sizeof(enhancements));
  2093. if (enhancements.response == 0) {
  2094. DRM_DEBUG_KMS("No enhancement is supported\n");
  2095. return true;
  2096. }
  2097. if (IS_TV(intel_sdvo_connector))
  2098. return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
  2099. else if (IS_LVDS(intel_sdvo_connector))
  2100. return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
  2101. else
  2102. return true;
  2103. }
  2104. static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
  2105. struct i2c_msg *msgs,
  2106. int num)
  2107. {
  2108. struct intel_sdvo *sdvo = adapter->algo_data;
  2109. if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
  2110. return -EIO;
  2111. return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
  2112. }
  2113. static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
  2114. {
  2115. struct intel_sdvo *sdvo = adapter->algo_data;
  2116. return sdvo->i2c->algo->functionality(sdvo->i2c);
  2117. }
  2118. static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
  2119. .master_xfer = intel_sdvo_ddc_proxy_xfer,
  2120. .functionality = intel_sdvo_ddc_proxy_func
  2121. };
  2122. static bool
  2123. intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
  2124. struct drm_device *dev)
  2125. {
  2126. sdvo->ddc.owner = THIS_MODULE;
  2127. sdvo->ddc.class = I2C_CLASS_DDC;
  2128. snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
  2129. sdvo->ddc.dev.parent = &dev->pdev->dev;
  2130. sdvo->ddc.algo_data = sdvo;
  2131. sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
  2132. return i2c_add_adapter(&sdvo->ddc) == 0;
  2133. }
  2134. bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
  2135. {
  2136. struct drm_i915_private *dev_priv = dev->dev_private;
  2137. struct intel_encoder *intel_encoder;
  2138. struct intel_sdvo *intel_sdvo;
  2139. int i;
  2140. intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
  2141. if (!intel_sdvo)
  2142. return false;
  2143. intel_sdvo->sdvo_reg = sdvo_reg;
  2144. intel_sdvo->is_sdvob = is_sdvob;
  2145. intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
  2146. intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
  2147. if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
  2148. kfree(intel_sdvo);
  2149. return false;
  2150. }
  2151. /* encoder type will be decided later */
  2152. intel_encoder = &intel_sdvo->base;
  2153. intel_encoder->type = INTEL_OUTPUT_SDVO;
  2154. drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
  2155. /* Read the regs to test if we can talk to the device */
  2156. for (i = 0; i < 0x40; i++) {
  2157. u8 byte;
  2158. if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
  2159. DRM_DEBUG_KMS("No SDVO device found on %s\n",
  2160. SDVO_NAME(intel_sdvo));
  2161. goto err;
  2162. }
  2163. }
  2164. if (intel_sdvo->is_sdvob)
  2165. dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
  2166. else
  2167. dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
  2168. drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
  2169. /* In default case sdvo lvds is false */
  2170. if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
  2171. goto err;
  2172. /* Set up hotplug command - note paranoia about contents of reply.
  2173. * We assume that the hardware is in a sane state, and only touch
  2174. * the bits we think we understand.
  2175. */
  2176. intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG,
  2177. &intel_sdvo->hotplug_active, 2);
  2178. intel_sdvo->hotplug_active[0] &= ~0x3;
  2179. if (intel_sdvo_output_setup(intel_sdvo,
  2180. intel_sdvo->caps.output_flags) != true) {
  2181. DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
  2182. SDVO_NAME(intel_sdvo));
  2183. goto err;
  2184. }
  2185. intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
  2186. /* Set the input timing to the screen. Assume always input 0. */
  2187. if (!intel_sdvo_set_target_input(intel_sdvo))
  2188. goto err;
  2189. if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
  2190. &intel_sdvo->pixel_clock_min,
  2191. &intel_sdvo->pixel_clock_max))
  2192. goto err;
  2193. DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
  2194. "clock range %dMHz - %dMHz, "
  2195. "input 1: %c, input 2: %c, "
  2196. "output 1: %c, output 2: %c\n",
  2197. SDVO_NAME(intel_sdvo),
  2198. intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
  2199. intel_sdvo->caps.device_rev_id,
  2200. intel_sdvo->pixel_clock_min / 1000,
  2201. intel_sdvo->pixel_clock_max / 1000,
  2202. (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
  2203. (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
  2204. /* check currently supported outputs */
  2205. intel_sdvo->caps.output_flags &
  2206. (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
  2207. intel_sdvo->caps.output_flags &
  2208. (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
  2209. return true;
  2210. err:
  2211. drm_encoder_cleanup(&intel_encoder->base);
  2212. i2c_del_adapter(&intel_sdvo->ddc);
  2213. kfree(intel_sdvo);
  2214. return false;
  2215. }