common.c 10 KB

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  1. /*
  2. * arch/arm/mach-orion5x/common.c
  3. *
  4. * Core functions for Marvell Orion 5x SoCs
  5. *
  6. * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
  7. *
  8. * This file is licensed under the terms of the GNU General Public
  9. * License version 2. This program is licensed "as is" without any
  10. * warranty of any kind, whether express or implied.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/init.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/serial_8250.h>
  16. #include <linux/mbus.h>
  17. #include <linux/mv643xx_eth.h>
  18. #include <linux/mv643xx_i2c.h>
  19. #include <linux/ata_platform.h>
  20. #include <asm/page.h>
  21. #include <asm/setup.h>
  22. #include <asm/timex.h>
  23. #include <asm/mach/arch.h>
  24. #include <asm/mach/map.h>
  25. #include <asm/mach/time.h>
  26. #include <asm/arch/hardware.h>
  27. #include <asm/arch/orion5x.h>
  28. #include <asm/plat-orion/ehci-orion.h>
  29. #include <asm/plat-orion/orion_nand.h>
  30. #include <asm/plat-orion/time.h>
  31. #include "common.h"
  32. /*****************************************************************************
  33. * I/O Address Mapping
  34. ****************************************************************************/
  35. static struct map_desc orion5x_io_desc[] __initdata = {
  36. {
  37. .virtual = ORION5X_REGS_VIRT_BASE,
  38. .pfn = __phys_to_pfn(ORION5X_REGS_PHYS_BASE),
  39. .length = ORION5X_REGS_SIZE,
  40. .type = MT_DEVICE,
  41. }, {
  42. .virtual = ORION5X_PCIE_IO_VIRT_BASE,
  43. .pfn = __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE),
  44. .length = ORION5X_PCIE_IO_SIZE,
  45. .type = MT_DEVICE,
  46. }, {
  47. .virtual = ORION5X_PCI_IO_VIRT_BASE,
  48. .pfn = __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE),
  49. .length = ORION5X_PCI_IO_SIZE,
  50. .type = MT_DEVICE,
  51. }, {
  52. .virtual = ORION5X_PCIE_WA_VIRT_BASE,
  53. .pfn = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE),
  54. .length = ORION5X_PCIE_WA_SIZE,
  55. .type = MT_DEVICE,
  56. },
  57. };
  58. void __init orion5x_map_io(void)
  59. {
  60. iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc));
  61. }
  62. /*****************************************************************************
  63. * UART
  64. ****************************************************************************/
  65. static struct resource orion5x_uart_resources[] = {
  66. {
  67. .start = UART0_PHYS_BASE,
  68. .end = UART0_PHYS_BASE + 0xff,
  69. .flags = IORESOURCE_MEM,
  70. }, {
  71. .start = IRQ_ORION5X_UART0,
  72. .end = IRQ_ORION5X_UART0,
  73. .flags = IORESOURCE_IRQ,
  74. }, {
  75. .start = UART1_PHYS_BASE,
  76. .end = UART1_PHYS_BASE + 0xff,
  77. .flags = IORESOURCE_MEM,
  78. }, {
  79. .start = IRQ_ORION5X_UART1,
  80. .end = IRQ_ORION5X_UART1,
  81. .flags = IORESOURCE_IRQ,
  82. },
  83. };
  84. static struct plat_serial8250_port orion5x_uart_data[] = {
  85. {
  86. .mapbase = UART0_PHYS_BASE,
  87. .membase = (char *)UART0_VIRT_BASE,
  88. .irq = IRQ_ORION5X_UART0,
  89. .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
  90. .iotype = UPIO_MEM,
  91. .regshift = 2,
  92. .uartclk = ORION5X_TCLK,
  93. }, {
  94. .mapbase = UART1_PHYS_BASE,
  95. .membase = (char *)UART1_VIRT_BASE,
  96. .irq = IRQ_ORION5X_UART1,
  97. .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
  98. .iotype = UPIO_MEM,
  99. .regshift = 2,
  100. .uartclk = ORION5X_TCLK,
  101. }, {
  102. },
  103. };
  104. static struct platform_device orion5x_uart = {
  105. .name = "serial8250",
  106. .id = PLAT8250_DEV_PLATFORM,
  107. .dev = {
  108. .platform_data = orion5x_uart_data,
  109. },
  110. .resource = orion5x_uart_resources,
  111. .num_resources = ARRAY_SIZE(orion5x_uart_resources),
  112. };
  113. /*******************************************************************************
  114. * USB Controller - 2 interfaces
  115. ******************************************************************************/
  116. static struct resource orion5x_ehci0_resources[] = {
  117. {
  118. .start = ORION5X_USB0_PHYS_BASE,
  119. .end = ORION5X_USB0_PHYS_BASE + SZ_4K - 1,
  120. .flags = IORESOURCE_MEM,
  121. }, {
  122. .start = IRQ_ORION5X_USB0_CTRL,
  123. .end = IRQ_ORION5X_USB0_CTRL,
  124. .flags = IORESOURCE_IRQ,
  125. },
  126. };
  127. static struct resource orion5x_ehci1_resources[] = {
  128. {
  129. .start = ORION5X_USB1_PHYS_BASE,
  130. .end = ORION5X_USB1_PHYS_BASE + SZ_4K - 1,
  131. .flags = IORESOURCE_MEM,
  132. }, {
  133. .start = IRQ_ORION5X_USB1_CTRL,
  134. .end = IRQ_ORION5X_USB1_CTRL,
  135. .flags = IORESOURCE_IRQ,
  136. },
  137. };
  138. static struct orion_ehci_data orion5x_ehci_data = {
  139. .dram = &orion5x_mbus_dram_info,
  140. };
  141. static u64 ehci_dmamask = 0xffffffffUL;
  142. static struct platform_device orion5x_ehci0 = {
  143. .name = "orion-ehci",
  144. .id = 0,
  145. .dev = {
  146. .dma_mask = &ehci_dmamask,
  147. .coherent_dma_mask = 0xffffffff,
  148. .platform_data = &orion5x_ehci_data,
  149. },
  150. .resource = orion5x_ehci0_resources,
  151. .num_resources = ARRAY_SIZE(orion5x_ehci0_resources),
  152. };
  153. static struct platform_device orion5x_ehci1 = {
  154. .name = "orion-ehci",
  155. .id = 1,
  156. .dev = {
  157. .dma_mask = &ehci_dmamask,
  158. .coherent_dma_mask = 0xffffffff,
  159. .platform_data = &orion5x_ehci_data,
  160. },
  161. .resource = orion5x_ehci1_resources,
  162. .num_resources = ARRAY_SIZE(orion5x_ehci1_resources),
  163. };
  164. /*****************************************************************************
  165. * Gigabit Ethernet port
  166. * (The Orion and Discovery (MV643xx) families use the same Ethernet driver)
  167. ****************************************************************************/
  168. struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = {
  169. .dram = &orion5x_mbus_dram_info,
  170. .t_clk = ORION5X_TCLK,
  171. };
  172. static struct resource orion5x_eth_shared_resources[] = {
  173. {
  174. .start = ORION5X_ETH_PHYS_BASE + 0x2000,
  175. .end = ORION5X_ETH_PHYS_BASE + 0x3fff,
  176. .flags = IORESOURCE_MEM,
  177. },
  178. };
  179. static struct platform_device orion5x_eth_shared = {
  180. .name = MV643XX_ETH_SHARED_NAME,
  181. .id = 0,
  182. .dev = {
  183. .platform_data = &orion5x_eth_shared_data,
  184. },
  185. .num_resources = 1,
  186. .resource = orion5x_eth_shared_resources,
  187. };
  188. static struct resource orion5x_eth_resources[] = {
  189. {
  190. .name = "eth irq",
  191. .start = IRQ_ORION5X_ETH_SUM,
  192. .end = IRQ_ORION5X_ETH_SUM,
  193. .flags = IORESOURCE_IRQ,
  194. },
  195. };
  196. static struct platform_device orion5x_eth = {
  197. .name = MV643XX_ETH_NAME,
  198. .id = 0,
  199. .num_resources = 1,
  200. .resource = orion5x_eth_resources,
  201. };
  202. void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
  203. {
  204. eth_data->shared = &orion5x_eth_shared;
  205. orion5x_eth.dev.platform_data = eth_data;
  206. platform_device_register(&orion5x_eth_shared);
  207. platform_device_register(&orion5x_eth);
  208. }
  209. /*****************************************************************************
  210. * I2C controller
  211. * (The Orion and Discovery (MV643xx) families share the same I2C controller)
  212. ****************************************************************************/
  213. static struct mv64xxx_i2c_pdata orion5x_i2c_pdata = {
  214. .freq_m = 8, /* assumes 166 MHz TCLK */
  215. .freq_n = 3,
  216. .timeout = 1000, /* Default timeout of 1 second */
  217. };
  218. static struct resource orion5x_i2c_resources[] = {
  219. {
  220. .name = "i2c base",
  221. .start = I2C_PHYS_BASE,
  222. .end = I2C_PHYS_BASE + 0x20 -1,
  223. .flags = IORESOURCE_MEM,
  224. }, {
  225. .name = "i2c irq",
  226. .start = IRQ_ORION5X_I2C,
  227. .end = IRQ_ORION5X_I2C,
  228. .flags = IORESOURCE_IRQ,
  229. },
  230. };
  231. static struct platform_device orion5x_i2c = {
  232. .name = MV64XXX_I2C_CTLR_NAME,
  233. .id = 0,
  234. .num_resources = ARRAY_SIZE(orion5x_i2c_resources),
  235. .resource = orion5x_i2c_resources,
  236. .dev = {
  237. .platform_data = &orion5x_i2c_pdata,
  238. },
  239. };
  240. /*****************************************************************************
  241. * Sata port
  242. ****************************************************************************/
  243. static struct resource orion5x_sata_resources[] = {
  244. {
  245. .name = "sata base",
  246. .start = ORION5X_SATA_PHYS_BASE,
  247. .end = ORION5X_SATA_PHYS_BASE + 0x5000 - 1,
  248. .flags = IORESOURCE_MEM,
  249. }, {
  250. .name = "sata irq",
  251. .start = IRQ_ORION5X_SATA,
  252. .end = IRQ_ORION5X_SATA,
  253. .flags = IORESOURCE_IRQ,
  254. },
  255. };
  256. static struct platform_device orion5x_sata = {
  257. .name = "sata_mv",
  258. .id = 0,
  259. .dev = {
  260. .coherent_dma_mask = 0xffffffff,
  261. },
  262. .num_resources = ARRAY_SIZE(orion5x_sata_resources),
  263. .resource = orion5x_sata_resources,
  264. };
  265. void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
  266. {
  267. sata_data->dram = &orion5x_mbus_dram_info;
  268. orion5x_sata.dev.platform_data = sata_data;
  269. platform_device_register(&orion5x_sata);
  270. }
  271. /*****************************************************************************
  272. * Time handling
  273. ****************************************************************************/
  274. static void orion5x_timer_init(void)
  275. {
  276. orion_time_init(IRQ_ORION5X_BRIDGE, ORION5X_TCLK);
  277. }
  278. struct sys_timer orion5x_timer = {
  279. .init = orion5x_timer_init,
  280. };
  281. /*****************************************************************************
  282. * General
  283. ****************************************************************************/
  284. /*
  285. * Identify device ID and rev from PCIe configuration header space '0'.
  286. */
  287. static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
  288. {
  289. orion5x_pcie_id(dev, rev);
  290. if (*dev == MV88F5281_DEV_ID) {
  291. if (*rev == MV88F5281_REV_D2) {
  292. *dev_name = "MV88F5281-D2";
  293. } else if (*rev == MV88F5281_REV_D1) {
  294. *dev_name = "MV88F5281-D1";
  295. } else {
  296. *dev_name = "MV88F5281-Rev-Unsupported";
  297. }
  298. } else if (*dev == MV88F5182_DEV_ID) {
  299. if (*rev == MV88F5182_REV_A2) {
  300. *dev_name = "MV88F5182-A2";
  301. } else {
  302. *dev_name = "MV88F5182-Rev-Unsupported";
  303. }
  304. } else if (*dev == MV88F5181_DEV_ID) {
  305. if (*rev == MV88F5181_REV_B1) {
  306. *dev_name = "MV88F5181-Rev-B1";
  307. } else {
  308. *dev_name = "MV88F5181-Rev-Unsupported";
  309. }
  310. } else {
  311. *dev_name = "Device-Unknown";
  312. }
  313. }
  314. void __init orion5x_init(void)
  315. {
  316. char *dev_name;
  317. u32 dev, rev;
  318. orion5x_id(&dev, &rev, &dev_name);
  319. printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, ORION5X_TCLK);
  320. /*
  321. * Setup Orion address map
  322. */
  323. orion5x_setup_cpu_mbus_bridge();
  324. /*
  325. * Register devices.
  326. */
  327. platform_device_register(&orion5x_uart);
  328. platform_device_register(&orion5x_ehci0);
  329. if (dev == MV88F5182_DEV_ID)
  330. platform_device_register(&orion5x_ehci1);
  331. platform_device_register(&orion5x_i2c);
  332. }
  333. /*
  334. * Many orion-based systems have buggy bootloader implementations.
  335. * This is a common fixup for bogus memory tags.
  336. */
  337. void __init tag_fixup_mem32(struct machine_desc *mdesc, struct tag *t,
  338. char **from, struct meminfo *meminfo)
  339. {
  340. for (; t->hdr.size; t = tag_next(t))
  341. if (t->hdr.tag == ATAG_MEM &&
  342. (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK ||
  343. t->u.mem.start & ~PAGE_MASK)) {
  344. printk(KERN_WARNING
  345. "Clearing invalid memory bank %dKB@0x%08x\n",
  346. t->u.mem.size / 1024, t->u.mem.start);
  347. t->hdr.tag = 0;
  348. }
  349. }