w83627hf.c 43 KB

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  1. /*
  2. w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
  3. monitoring
  4. Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>,
  5. Philip Edelbrock <phil@netroedge.com>,
  6. and Mark Studebaker <mdsxyz123@yahoo.com>
  7. Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
  8. This program is free software; you can redistribute it and/or modify
  9. it under the terms of the GNU General Public License as published by
  10. the Free Software Foundation; either version 2 of the License, or
  11. (at your option) any later version.
  12. This program is distributed in the hope that it will be useful,
  13. but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. GNU General Public License for more details.
  16. You should have received a copy of the GNU General Public License
  17. along with this program; if not, write to the Free Software
  18. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. /*
  21. Supports following chips:
  22. Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
  23. w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
  24. w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
  25. w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)
  26. w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
  27. For other winbond chips, and for i2c support in the above chips,
  28. use w83781d.c.
  29. Note: automatic ("cruise") fan control for 697, 637 & 627thf not
  30. supported yet.
  31. */
  32. #include <linux/module.h>
  33. #include <linux/init.h>
  34. #include <linux/slab.h>
  35. #include <linux/jiffies.h>
  36. #include <linux/i2c.h>
  37. #include <linux/i2c-isa.h>
  38. #include <linux/i2c-sensor.h>
  39. #include <linux/i2c-vid.h>
  40. #include <linux/hwmon.h>
  41. #include <linux/err.h>
  42. #include <asm/io.h>
  43. #include "lm75.h"
  44. static u16 force_addr;
  45. module_param(force_addr, ushort, 0);
  46. MODULE_PARM_DESC(force_addr,
  47. "Initialize the base address of the sensors");
  48. static u8 force_i2c = 0x1f;
  49. module_param(force_i2c, byte, 0);
  50. MODULE_PARM_DESC(force_i2c,
  51. "Initialize the i2c address of the sensors");
  52. /* The actual ISA address is read from Super-I/O configuration space */
  53. static unsigned short address;
  54. /* Insmod parameters */
  55. enum chips { any_chip, w83627hf, w83627thf, w83697hf, w83637hf };
  56. static int init = 1;
  57. module_param(init, bool, 0);
  58. MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
  59. /* modified from kernel/include/traps.c */
  60. static int REG; /* The register to read/write */
  61. #define DEV 0x07 /* Register: Logical device select */
  62. static int VAL; /* The value to read/write */
  63. /* logical device numbers for superio_select (below) */
  64. #define W83627HF_LD_FDC 0x00
  65. #define W83627HF_LD_PRT 0x01
  66. #define W83627HF_LD_UART1 0x02
  67. #define W83627HF_LD_UART2 0x03
  68. #define W83627HF_LD_KBC 0x05
  69. #define W83627HF_LD_CIR 0x06 /* w83627hf only */
  70. #define W83627HF_LD_GAME 0x07
  71. #define W83627HF_LD_MIDI 0x07
  72. #define W83627HF_LD_GPIO1 0x07
  73. #define W83627HF_LD_GPIO5 0x07 /* w83627thf only */
  74. #define W83627HF_LD_GPIO2 0x08
  75. #define W83627HF_LD_GPIO3 0x09
  76. #define W83627HF_LD_GPIO4 0x09 /* w83627thf only */
  77. #define W83627HF_LD_ACPI 0x0a
  78. #define W83627HF_LD_HWM 0x0b
  79. #define DEVID 0x20 /* Register: Device ID */
  80. #define W83627THF_GPIO5_EN 0x30 /* w83627thf only */
  81. #define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */
  82. #define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */
  83. static inline void
  84. superio_outb(int reg, int val)
  85. {
  86. outb(reg, REG);
  87. outb(val, VAL);
  88. }
  89. static inline int
  90. superio_inb(int reg)
  91. {
  92. outb(reg, REG);
  93. return inb(VAL);
  94. }
  95. static inline void
  96. superio_select(int ld)
  97. {
  98. outb(DEV, REG);
  99. outb(ld, VAL);
  100. }
  101. static inline void
  102. superio_enter(void)
  103. {
  104. outb(0x87, REG);
  105. outb(0x87, REG);
  106. }
  107. static inline void
  108. superio_exit(void)
  109. {
  110. outb(0xAA, REG);
  111. }
  112. #define W627_DEVID 0x52
  113. #define W627THF_DEVID 0x82
  114. #define W697_DEVID 0x60
  115. #define W637_DEVID 0x70
  116. #define WINB_ACT_REG 0x30
  117. #define WINB_BASE_REG 0x60
  118. /* Constants specified below */
  119. /* Length of ISA address segment */
  120. #define WINB_EXTENT 8
  121. /* Where are the ISA address/data registers relative to the base address */
  122. #define W83781D_ADDR_REG_OFFSET 5
  123. #define W83781D_DATA_REG_OFFSET 6
  124. /* The W83781D registers */
  125. /* The W83782D registers for nr=7,8 are in bank 5 */
  126. #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
  127. (0x554 + (((nr) - 7) * 2)))
  128. #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
  129. (0x555 + (((nr) - 7) * 2)))
  130. #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
  131. (0x550 + (nr) - 7))
  132. #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
  133. #define W83781D_REG_FAN(nr) (0x27 + (nr))
  134. #define W83781D_REG_TEMP2_CONFIG 0x152
  135. #define W83781D_REG_TEMP3_CONFIG 0x252
  136. #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
  137. ((nr == 2) ? (0x0150) : \
  138. (0x27)))
  139. #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
  140. ((nr == 2) ? (0x153) : \
  141. (0x3A)))
  142. #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
  143. ((nr == 2) ? (0x155) : \
  144. (0x39)))
  145. #define W83781D_REG_BANK 0x4E
  146. #define W83781D_REG_CONFIG 0x40
  147. #define W83781D_REG_ALARM1 0x41
  148. #define W83781D_REG_ALARM2 0x42
  149. #define W83781D_REG_ALARM3 0x450
  150. #define W83781D_REG_IRQ 0x4C
  151. #define W83781D_REG_BEEP_CONFIG 0x4D
  152. #define W83781D_REG_BEEP_INTS1 0x56
  153. #define W83781D_REG_BEEP_INTS2 0x57
  154. #define W83781D_REG_BEEP_INTS3 0x453
  155. #define W83781D_REG_VID_FANDIV 0x47
  156. #define W83781D_REG_CHIPID 0x49
  157. #define W83781D_REG_WCHIPID 0x58
  158. #define W83781D_REG_CHIPMAN 0x4F
  159. #define W83781D_REG_PIN 0x4B
  160. #define W83781D_REG_VBAT 0x5D
  161. #define W83627HF_REG_PWM1 0x5A
  162. #define W83627HF_REG_PWM2 0x5B
  163. #define W83627HF_REG_PWMCLK12 0x5C
  164. #define W83627THF_REG_PWM1 0x01 /* 697HF and 637HF too */
  165. #define W83627THF_REG_PWM2 0x03 /* 697HF and 637HF too */
  166. #define W83627THF_REG_PWM3 0x11 /* 637HF too */
  167. #define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF too */
  168. static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
  169. static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
  170. W83627THF_REG_PWM3 };
  171. #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
  172. regpwm_627hf[(nr) - 1] : regpwm[(nr) - 1])
  173. #define W83781D_REG_I2C_ADDR 0x48
  174. #define W83781D_REG_I2C_SUBADDR 0x4A
  175. /* Sensor selection */
  176. #define W83781D_REG_SCFG1 0x5D
  177. static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
  178. #define W83781D_REG_SCFG2 0x59
  179. static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
  180. #define W83781D_DEFAULT_BETA 3435
  181. /* Conversions. Limit checking is only done on the TO_REG
  182. variants. Note that you should be a bit careful with which arguments
  183. these macros are called: arguments may be evaluated more than once.
  184. Fixing this is just not worth it. */
  185. #define IN_TO_REG(val) (SENSORS_LIMIT((((val) + 8)/16),0,255))
  186. #define IN_FROM_REG(val) ((val) * 16)
  187. static inline u8 FAN_TO_REG(long rpm, int div)
  188. {
  189. if (rpm == 0)
  190. return 255;
  191. rpm = SENSORS_LIMIT(rpm, 1, 1000000);
  192. return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1,
  193. 254);
  194. }
  195. #define TEMP_MIN (-128000)
  196. #define TEMP_MAX ( 127000)
  197. /* TEMP: 0.001C/bit (-128C to +127C)
  198. REG: 1C/bit, two's complement */
  199. static u8 TEMP_TO_REG(int temp)
  200. {
  201. int ntemp = SENSORS_LIMIT(temp, TEMP_MIN, TEMP_MAX);
  202. ntemp += (ntemp<0 ? -500 : 500);
  203. return (u8)(ntemp / 1000);
  204. }
  205. static int TEMP_FROM_REG(u8 reg)
  206. {
  207. return (s8)reg * 1000;
  208. }
  209. #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
  210. #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
  211. #define BEEP_MASK_FROM_REG(val) (val)
  212. #define BEEP_MASK_TO_REG(val) ((val) & 0xffffff)
  213. #define BEEP_ENABLE_TO_REG(val) ((val)?1:0)
  214. #define BEEP_ENABLE_FROM_REG(val) ((val)?1:0)
  215. #define DIV_FROM_REG(val) (1 << (val))
  216. static inline u8 DIV_TO_REG(long val)
  217. {
  218. int i;
  219. val = SENSORS_LIMIT(val, 1, 128) >> 1;
  220. for (i = 0; i < 7; i++) {
  221. if (val == 0)
  222. break;
  223. val >>= 1;
  224. }
  225. return ((u8) i);
  226. }
  227. /* For each registered chip, we need to keep some data in memory. That
  228. data is pointed to by w83627hf_list[NR]->data. The structure itself is
  229. dynamically allocated, at the same time when a new client is allocated. */
  230. struct w83627hf_data {
  231. struct i2c_client client;
  232. struct class_device *class_dev;
  233. struct semaphore lock;
  234. enum chips type;
  235. struct semaphore update_lock;
  236. char valid; /* !=0 if following fields are valid */
  237. unsigned long last_updated; /* In jiffies */
  238. struct i2c_client *lm75; /* for secondary I2C addresses */
  239. /* pointer to array of 2 subclients */
  240. u8 in[9]; /* Register value */
  241. u8 in_max[9]; /* Register value */
  242. u8 in_min[9]; /* Register value */
  243. u8 fan[3]; /* Register value */
  244. u8 fan_min[3]; /* Register value */
  245. u8 temp;
  246. u8 temp_max; /* Register value */
  247. u8 temp_max_hyst; /* Register value */
  248. u16 temp_add[2]; /* Register value */
  249. u16 temp_max_add[2]; /* Register value */
  250. u16 temp_max_hyst_add[2]; /* Register value */
  251. u8 fan_div[3]; /* Register encoding, shifted right */
  252. u8 vid; /* Register encoding, combined */
  253. u32 alarms; /* Register encoding, combined */
  254. u32 beep_mask; /* Register encoding, combined */
  255. u8 beep_enable; /* Boolean */
  256. u8 pwm[3]; /* Register value */
  257. u16 sens[3]; /* 782D/783S only.
  258. 1 = pentium diode; 2 = 3904 diode;
  259. 3000-5000 = thermistor beta.
  260. Default = 3435.
  261. Other Betas unimplemented */
  262. u8 vrm;
  263. u8 vrm_ovt; /* Register value, 627thf & 637hf only */
  264. };
  265. static int w83627hf_detect(struct i2c_adapter *adapter);
  266. static int w83627hf_detach_client(struct i2c_client *client);
  267. static int w83627hf_read_value(struct i2c_client *client, u16 register);
  268. static int w83627hf_write_value(struct i2c_client *client, u16 register,
  269. u16 value);
  270. static struct w83627hf_data *w83627hf_update_device(struct device *dev);
  271. static void w83627hf_init_client(struct i2c_client *client);
  272. static struct i2c_driver w83627hf_driver = {
  273. .owner = THIS_MODULE,
  274. .name = "w83627hf",
  275. .attach_adapter = w83627hf_detect,
  276. .detach_client = w83627hf_detach_client,
  277. };
  278. /* following are the sysfs callback functions */
  279. #define show_in_reg(reg) \
  280. static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
  281. { \
  282. struct w83627hf_data *data = w83627hf_update_device(dev); \
  283. return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr])); \
  284. }
  285. show_in_reg(in)
  286. show_in_reg(in_min)
  287. show_in_reg(in_max)
  288. #define store_in_reg(REG, reg) \
  289. static ssize_t \
  290. store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
  291. { \
  292. struct i2c_client *client = to_i2c_client(dev); \
  293. struct w83627hf_data *data = i2c_get_clientdata(client); \
  294. u32 val; \
  295. \
  296. val = simple_strtoul(buf, NULL, 10); \
  297. \
  298. down(&data->update_lock); \
  299. data->in_##reg[nr] = IN_TO_REG(val); \
  300. w83627hf_write_value(client, W83781D_REG_IN_##REG(nr), \
  301. data->in_##reg[nr]); \
  302. \
  303. up(&data->update_lock); \
  304. return count; \
  305. }
  306. store_in_reg(MIN, min)
  307. store_in_reg(MAX, max)
  308. #define sysfs_in_offset(offset) \
  309. static ssize_t \
  310. show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  311. { \
  312. return show_in(dev, buf, offset); \
  313. } \
  314. static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
  315. #define sysfs_in_reg_offset(reg, offset) \
  316. static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  317. { \
  318. return show_in_##reg (dev, buf, offset); \
  319. } \
  320. static ssize_t \
  321. store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, \
  322. const char *buf, size_t count) \
  323. { \
  324. return store_in_##reg (dev, buf, count, offset); \
  325. } \
  326. static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, \
  327. show_regs_in_##reg##offset, store_regs_in_##reg##offset);
  328. #define sysfs_in_offsets(offset) \
  329. sysfs_in_offset(offset) \
  330. sysfs_in_reg_offset(min, offset) \
  331. sysfs_in_reg_offset(max, offset)
  332. sysfs_in_offsets(1);
  333. sysfs_in_offsets(2);
  334. sysfs_in_offsets(3);
  335. sysfs_in_offsets(4);
  336. sysfs_in_offsets(5);
  337. sysfs_in_offsets(6);
  338. sysfs_in_offsets(7);
  339. sysfs_in_offsets(8);
  340. /* use a different set of functions for in0 */
  341. static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
  342. {
  343. long in0;
  344. if ((data->vrm_ovt & 0x01) &&
  345. (w83627thf == data->type || w83637hf == data->type))
  346. /* use VRM9 calculation */
  347. in0 = (long)((reg * 488 + 70000 + 50) / 100);
  348. else
  349. /* use VRM8 (standard) calculation */
  350. in0 = (long)IN_FROM_REG(reg);
  351. return sprintf(buf,"%ld\n", in0);
  352. }
  353. static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf)
  354. {
  355. struct w83627hf_data *data = w83627hf_update_device(dev);
  356. return show_in_0(data, buf, data->in[0]);
  357. }
  358. static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf)
  359. {
  360. struct w83627hf_data *data = w83627hf_update_device(dev);
  361. return show_in_0(data, buf, data->in_min[0]);
  362. }
  363. static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf)
  364. {
  365. struct w83627hf_data *data = w83627hf_update_device(dev);
  366. return show_in_0(data, buf, data->in_max[0]);
  367. }
  368. static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr,
  369. const char *buf, size_t count)
  370. {
  371. struct i2c_client *client = to_i2c_client(dev);
  372. struct w83627hf_data *data = i2c_get_clientdata(client);
  373. u32 val;
  374. val = simple_strtoul(buf, NULL, 10);
  375. down(&data->update_lock);
  376. if ((data->vrm_ovt & 0x01) &&
  377. (w83627thf == data->type || w83637hf == data->type))
  378. /* use VRM9 calculation */
  379. data->in_min[0] = (u8)(((val * 100) - 70000 + 244) / 488);
  380. else
  381. /* use VRM8 (standard) calculation */
  382. data->in_min[0] = IN_TO_REG(val);
  383. w83627hf_write_value(client, W83781D_REG_IN_MIN(0), data->in_min[0]);
  384. up(&data->update_lock);
  385. return count;
  386. }
  387. static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr,
  388. const char *buf, size_t count)
  389. {
  390. struct i2c_client *client = to_i2c_client(dev);
  391. struct w83627hf_data *data = i2c_get_clientdata(client);
  392. u32 val;
  393. val = simple_strtoul(buf, NULL, 10);
  394. down(&data->update_lock);
  395. if ((data->vrm_ovt & 0x01) &&
  396. (w83627thf == data->type || w83637hf == data->type))
  397. /* use VRM9 calculation */
  398. data->in_max[0] = (u8)(((val * 100) - 70000 + 244) / 488);
  399. else
  400. /* use VRM8 (standard) calculation */
  401. data->in_max[0] = IN_TO_REG(val);
  402. w83627hf_write_value(client, W83781D_REG_IN_MAX(0), data->in_max[0]);
  403. up(&data->update_lock);
  404. return count;
  405. }
  406. static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL);
  407. static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
  408. show_regs_in_min0, store_regs_in_min0);
  409. static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
  410. show_regs_in_max0, store_regs_in_max0);
  411. #define device_create_file_in(client, offset) \
  412. do { \
  413. device_create_file(&client->dev, &dev_attr_in##offset##_input); \
  414. device_create_file(&client->dev, &dev_attr_in##offset##_min); \
  415. device_create_file(&client->dev, &dev_attr_in##offset##_max); \
  416. } while (0)
  417. #define show_fan_reg(reg) \
  418. static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
  419. { \
  420. struct w83627hf_data *data = w83627hf_update_device(dev); \
  421. return sprintf(buf,"%ld\n", \
  422. FAN_FROM_REG(data->reg[nr-1], \
  423. (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
  424. }
  425. show_fan_reg(fan);
  426. show_fan_reg(fan_min);
  427. static ssize_t
  428. store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
  429. {
  430. struct i2c_client *client = to_i2c_client(dev);
  431. struct w83627hf_data *data = i2c_get_clientdata(client);
  432. u32 val;
  433. val = simple_strtoul(buf, NULL, 10);
  434. down(&data->update_lock);
  435. data->fan_min[nr - 1] =
  436. FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
  437. w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr),
  438. data->fan_min[nr - 1]);
  439. up(&data->update_lock);
  440. return count;
  441. }
  442. #define sysfs_fan_offset(offset) \
  443. static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  444. { \
  445. return show_fan(dev, buf, offset); \
  446. } \
  447. static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
  448. #define sysfs_fan_min_offset(offset) \
  449. static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  450. { \
  451. return show_fan_min(dev, buf, offset); \
  452. } \
  453. static ssize_t \
  454. store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
  455. { \
  456. return store_fan_min(dev, buf, count, offset); \
  457. } \
  458. static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
  459. show_regs_fan_min##offset, store_regs_fan_min##offset);
  460. sysfs_fan_offset(1);
  461. sysfs_fan_min_offset(1);
  462. sysfs_fan_offset(2);
  463. sysfs_fan_min_offset(2);
  464. sysfs_fan_offset(3);
  465. sysfs_fan_min_offset(3);
  466. #define device_create_file_fan(client, offset) \
  467. do { \
  468. device_create_file(&client->dev, &dev_attr_fan##offset##_input); \
  469. device_create_file(&client->dev, &dev_attr_fan##offset##_min); \
  470. } while (0)
  471. #define show_temp_reg(reg) \
  472. static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
  473. { \
  474. struct w83627hf_data *data = w83627hf_update_device(dev); \
  475. if (nr >= 2) { /* TEMP2 and TEMP3 */ \
  476. return sprintf(buf,"%ld\n", \
  477. (long)LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
  478. } else { /* TEMP1 */ \
  479. return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
  480. } \
  481. }
  482. show_temp_reg(temp);
  483. show_temp_reg(temp_max);
  484. show_temp_reg(temp_max_hyst);
  485. #define store_temp_reg(REG, reg) \
  486. static ssize_t \
  487. store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
  488. { \
  489. struct i2c_client *client = to_i2c_client(dev); \
  490. struct w83627hf_data *data = i2c_get_clientdata(client); \
  491. u32 val; \
  492. \
  493. val = simple_strtoul(buf, NULL, 10); \
  494. \
  495. down(&data->update_lock); \
  496. \
  497. if (nr >= 2) { /* TEMP2 and TEMP3 */ \
  498. data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
  499. w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
  500. data->temp_##reg##_add[nr-2]); \
  501. } else { /* TEMP1 */ \
  502. data->temp_##reg = TEMP_TO_REG(val); \
  503. w83627hf_write_value(client, W83781D_REG_TEMP_##REG(nr), \
  504. data->temp_##reg); \
  505. } \
  506. \
  507. up(&data->update_lock); \
  508. return count; \
  509. }
  510. store_temp_reg(OVER, max);
  511. store_temp_reg(HYST, max_hyst);
  512. #define sysfs_temp_offset(offset) \
  513. static ssize_t \
  514. show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  515. { \
  516. return show_temp(dev, buf, offset); \
  517. } \
  518. static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
  519. #define sysfs_temp_reg_offset(reg, offset) \
  520. static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  521. { \
  522. return show_temp_##reg (dev, buf, offset); \
  523. } \
  524. static ssize_t \
  525. store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, \
  526. const char *buf, size_t count) \
  527. { \
  528. return store_temp_##reg (dev, buf, count, offset); \
  529. } \
  530. static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, \
  531. show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
  532. #define sysfs_temp_offsets(offset) \
  533. sysfs_temp_offset(offset) \
  534. sysfs_temp_reg_offset(max, offset) \
  535. sysfs_temp_reg_offset(max_hyst, offset)
  536. sysfs_temp_offsets(1);
  537. sysfs_temp_offsets(2);
  538. sysfs_temp_offsets(3);
  539. #define device_create_file_temp(client, offset) \
  540. do { \
  541. device_create_file(&client->dev, &dev_attr_temp##offset##_input); \
  542. device_create_file(&client->dev, &dev_attr_temp##offset##_max); \
  543. device_create_file(&client->dev, &dev_attr_temp##offset##_max_hyst); \
  544. } while (0)
  545. static ssize_t
  546. show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
  547. {
  548. struct w83627hf_data *data = w83627hf_update_device(dev);
  549. return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
  550. }
  551. static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
  552. #define device_create_file_vid(client) \
  553. device_create_file(&client->dev, &dev_attr_cpu0_vid)
  554. static ssize_t
  555. show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
  556. {
  557. struct w83627hf_data *data = w83627hf_update_device(dev);
  558. return sprintf(buf, "%ld\n", (long) data->vrm);
  559. }
  560. static ssize_t
  561. store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
  562. {
  563. struct i2c_client *client = to_i2c_client(dev);
  564. struct w83627hf_data *data = i2c_get_clientdata(client);
  565. u32 val;
  566. val = simple_strtoul(buf, NULL, 10);
  567. data->vrm = val;
  568. return count;
  569. }
  570. static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
  571. #define device_create_file_vrm(client) \
  572. device_create_file(&client->dev, &dev_attr_vrm)
  573. static ssize_t
  574. show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
  575. {
  576. struct w83627hf_data *data = w83627hf_update_device(dev);
  577. return sprintf(buf, "%ld\n", (long) data->alarms);
  578. }
  579. static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
  580. #define device_create_file_alarms(client) \
  581. device_create_file(&client->dev, &dev_attr_alarms)
  582. #define show_beep_reg(REG, reg) \
  583. static ssize_t show_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
  584. { \
  585. struct w83627hf_data *data = w83627hf_update_device(dev); \
  586. return sprintf(buf,"%ld\n", \
  587. (long)BEEP_##REG##_FROM_REG(data->beep_##reg)); \
  588. }
  589. show_beep_reg(ENABLE, enable)
  590. show_beep_reg(MASK, mask)
  591. #define BEEP_ENABLE 0 /* Store beep_enable */
  592. #define BEEP_MASK 1 /* Store beep_mask */
  593. static ssize_t
  594. store_beep_reg(struct device *dev, const char *buf, size_t count,
  595. int update_mask)
  596. {
  597. struct i2c_client *client = to_i2c_client(dev);
  598. struct w83627hf_data *data = i2c_get_clientdata(client);
  599. u32 val, val2;
  600. val = simple_strtoul(buf, NULL, 10);
  601. down(&data->update_lock);
  602. if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
  603. data->beep_mask = BEEP_MASK_TO_REG(val);
  604. w83627hf_write_value(client, W83781D_REG_BEEP_INTS1,
  605. data->beep_mask & 0xff);
  606. w83627hf_write_value(client, W83781D_REG_BEEP_INTS3,
  607. ((data->beep_mask) >> 16) & 0xff);
  608. val2 = (data->beep_mask >> 8) & 0x7f;
  609. } else { /* We are storing beep_enable */
  610. val2 =
  611. w83627hf_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
  612. data->beep_enable = BEEP_ENABLE_TO_REG(val);
  613. }
  614. w83627hf_write_value(client, W83781D_REG_BEEP_INTS2,
  615. val2 | data->beep_enable << 7);
  616. up(&data->update_lock);
  617. return count;
  618. }
  619. #define sysfs_beep(REG, reg) \
  620. static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
  621. { \
  622. return show_beep_##reg(dev, attr, buf); \
  623. } \
  624. static ssize_t \
  625. store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
  626. { \
  627. return store_beep_reg(dev, buf, count, BEEP_##REG); \
  628. } \
  629. static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, \
  630. show_regs_beep_##reg, store_regs_beep_##reg);
  631. sysfs_beep(ENABLE, enable);
  632. sysfs_beep(MASK, mask);
  633. #define device_create_file_beep(client) \
  634. do { \
  635. device_create_file(&client->dev, &dev_attr_beep_enable); \
  636. device_create_file(&client->dev, &dev_attr_beep_mask); \
  637. } while (0)
  638. static ssize_t
  639. show_fan_div_reg(struct device *dev, char *buf, int nr)
  640. {
  641. struct w83627hf_data *data = w83627hf_update_device(dev);
  642. return sprintf(buf, "%ld\n",
  643. (long) DIV_FROM_REG(data->fan_div[nr - 1]));
  644. }
  645. /* Note: we save and restore the fan minimum here, because its value is
  646. determined in part by the fan divisor. This follows the principle of
  647. least suprise; the user doesn't expect the fan minimum to change just
  648. because the divisor changed. */
  649. static ssize_t
  650. store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
  651. {
  652. struct i2c_client *client = to_i2c_client(dev);
  653. struct w83627hf_data *data = i2c_get_clientdata(client);
  654. unsigned long min;
  655. u8 reg;
  656. unsigned long val = simple_strtoul(buf, NULL, 10);
  657. down(&data->update_lock);
  658. /* Save fan_min */
  659. min = FAN_FROM_REG(data->fan_min[nr],
  660. DIV_FROM_REG(data->fan_div[nr]));
  661. data->fan_div[nr] = DIV_TO_REG(val);
  662. reg = (w83627hf_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
  663. & (nr==0 ? 0xcf : 0x3f))
  664. | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
  665. w83627hf_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
  666. reg = (w83627hf_read_value(client, W83781D_REG_VBAT)
  667. & ~(1 << (5 + nr)))
  668. | ((data->fan_div[nr] & 0x04) << (3 + nr));
  669. w83627hf_write_value(client, W83781D_REG_VBAT, reg);
  670. /* Restore fan_min */
  671. data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
  672. w83627hf_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
  673. up(&data->update_lock);
  674. return count;
  675. }
  676. #define sysfs_fan_div(offset) \
  677. static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  678. { \
  679. return show_fan_div_reg(dev, buf, offset); \
  680. } \
  681. static ssize_t \
  682. store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, \
  683. const char *buf, size_t count) \
  684. { \
  685. return store_fan_div_reg(dev, buf, count, offset - 1); \
  686. } \
  687. static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
  688. show_regs_fan_div_##offset, store_regs_fan_div_##offset);
  689. sysfs_fan_div(1);
  690. sysfs_fan_div(2);
  691. sysfs_fan_div(3);
  692. #define device_create_file_fan_div(client, offset) \
  693. do { \
  694. device_create_file(&client->dev, &dev_attr_fan##offset##_div); \
  695. } while (0)
  696. static ssize_t
  697. show_pwm_reg(struct device *dev, char *buf, int nr)
  698. {
  699. struct w83627hf_data *data = w83627hf_update_device(dev);
  700. return sprintf(buf, "%ld\n", (long) data->pwm[nr - 1]);
  701. }
  702. static ssize_t
  703. store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
  704. {
  705. struct i2c_client *client = to_i2c_client(dev);
  706. struct w83627hf_data *data = i2c_get_clientdata(client);
  707. u32 val;
  708. val = simple_strtoul(buf, NULL, 10);
  709. down(&data->update_lock);
  710. if (data->type == w83627thf) {
  711. /* bits 0-3 are reserved in 627THF */
  712. data->pwm[nr - 1] = PWM_TO_REG(val) & 0xf0;
  713. w83627hf_write_value(client,
  714. W836X7HF_REG_PWM(data->type, nr),
  715. data->pwm[nr - 1] |
  716. (w83627hf_read_value(client,
  717. W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
  718. } else {
  719. data->pwm[nr - 1] = PWM_TO_REG(val);
  720. w83627hf_write_value(client,
  721. W836X7HF_REG_PWM(data->type, nr),
  722. data->pwm[nr - 1]);
  723. }
  724. up(&data->update_lock);
  725. return count;
  726. }
  727. #define sysfs_pwm(offset) \
  728. static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  729. { \
  730. return show_pwm_reg(dev, buf, offset); \
  731. } \
  732. static ssize_t \
  733. store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
  734. { \
  735. return store_pwm_reg(dev, buf, count, offset); \
  736. } \
  737. static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
  738. show_regs_pwm_##offset, store_regs_pwm_##offset);
  739. sysfs_pwm(1);
  740. sysfs_pwm(2);
  741. sysfs_pwm(3);
  742. #define device_create_file_pwm(client, offset) \
  743. do { \
  744. device_create_file(&client->dev, &dev_attr_pwm##offset); \
  745. } while (0)
  746. static ssize_t
  747. show_sensor_reg(struct device *dev, char *buf, int nr)
  748. {
  749. struct w83627hf_data *data = w83627hf_update_device(dev);
  750. return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
  751. }
  752. static ssize_t
  753. store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
  754. {
  755. struct i2c_client *client = to_i2c_client(dev);
  756. struct w83627hf_data *data = i2c_get_clientdata(client);
  757. u32 val, tmp;
  758. val = simple_strtoul(buf, NULL, 10);
  759. down(&data->update_lock);
  760. switch (val) {
  761. case 1: /* PII/Celeron diode */
  762. tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
  763. w83627hf_write_value(client, W83781D_REG_SCFG1,
  764. tmp | BIT_SCFG1[nr - 1]);
  765. tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
  766. w83627hf_write_value(client, W83781D_REG_SCFG2,
  767. tmp | BIT_SCFG2[nr - 1]);
  768. data->sens[nr - 1] = val;
  769. break;
  770. case 2: /* 3904 */
  771. tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
  772. w83627hf_write_value(client, W83781D_REG_SCFG1,
  773. tmp | BIT_SCFG1[nr - 1]);
  774. tmp = w83627hf_read_value(client, W83781D_REG_SCFG2);
  775. w83627hf_write_value(client, W83781D_REG_SCFG2,
  776. tmp & ~BIT_SCFG2[nr - 1]);
  777. data->sens[nr - 1] = val;
  778. break;
  779. case W83781D_DEFAULT_BETA: /* thermistor */
  780. tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
  781. w83627hf_write_value(client, W83781D_REG_SCFG1,
  782. tmp & ~BIT_SCFG1[nr - 1]);
  783. data->sens[nr - 1] = val;
  784. break;
  785. default:
  786. dev_err(&client->dev,
  787. "Invalid sensor type %ld; must be 1, 2, or %d\n",
  788. (long) val, W83781D_DEFAULT_BETA);
  789. break;
  790. }
  791. up(&data->update_lock);
  792. return count;
  793. }
  794. #define sysfs_sensor(offset) \
  795. static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
  796. { \
  797. return show_sensor_reg(dev, buf, offset); \
  798. } \
  799. static ssize_t \
  800. store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
  801. { \
  802. return store_sensor_reg(dev, buf, count, offset); \
  803. } \
  804. static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
  805. show_regs_sensor_##offset, store_regs_sensor_##offset);
  806. sysfs_sensor(1);
  807. sysfs_sensor(2);
  808. sysfs_sensor(3);
  809. #define device_create_file_sensor(client, offset) \
  810. do { \
  811. device_create_file(&client->dev, &dev_attr_temp##offset##_type); \
  812. } while (0)
  813. static int __init w83627hf_find(int sioaddr, unsigned short *addr)
  814. {
  815. u16 val;
  816. REG = sioaddr;
  817. VAL = sioaddr + 1;
  818. superio_enter();
  819. val= superio_inb(DEVID);
  820. if(val != W627_DEVID &&
  821. val != W627THF_DEVID &&
  822. val != W697_DEVID &&
  823. val != W637_DEVID) {
  824. superio_exit();
  825. return -ENODEV;
  826. }
  827. superio_select(W83627HF_LD_HWM);
  828. val = (superio_inb(WINB_BASE_REG) << 8) |
  829. superio_inb(WINB_BASE_REG + 1);
  830. *addr = val & ~(WINB_EXTENT - 1);
  831. if (*addr == 0 && force_addr == 0) {
  832. superio_exit();
  833. return -ENODEV;
  834. }
  835. superio_exit();
  836. return 0;
  837. }
  838. static int w83627hf_detect(struct i2c_adapter *adapter)
  839. {
  840. int val, kind;
  841. struct i2c_client *new_client;
  842. struct w83627hf_data *data;
  843. int err = 0;
  844. const char *client_name = "";
  845. if(force_addr)
  846. address = force_addr & ~(WINB_EXTENT - 1);
  847. if (!request_region(address, WINB_EXTENT, w83627hf_driver.name)) {
  848. err = -EBUSY;
  849. goto ERROR0;
  850. }
  851. if(force_addr) {
  852. printk("w83627hf.o: forcing ISA address 0x%04X\n", address);
  853. superio_enter();
  854. superio_select(W83627HF_LD_HWM);
  855. superio_outb(WINB_BASE_REG, address >> 8);
  856. superio_outb(WINB_BASE_REG+1, address & 0xff);
  857. superio_exit();
  858. }
  859. superio_enter();
  860. val= superio_inb(DEVID);
  861. if(val == W627_DEVID)
  862. kind = w83627hf;
  863. else if(val == W697_DEVID)
  864. kind = w83697hf;
  865. else if(val == W627THF_DEVID)
  866. kind = w83627thf;
  867. else if(val == W637_DEVID)
  868. kind = w83637hf;
  869. else {
  870. dev_info(&adapter->dev,
  871. "Unsupported chip (dev_id=0x%02X).\n", val);
  872. goto ERROR1;
  873. }
  874. superio_select(W83627HF_LD_HWM);
  875. if((val = 0x01 & superio_inb(WINB_ACT_REG)) == 0)
  876. superio_outb(WINB_ACT_REG, 1);
  877. superio_exit();
  878. /* OK. For now, we presume we have a valid client. We now create the
  879. client structure, even though we cannot fill it completely yet.
  880. But it allows us to access w83627hf_{read,write}_value. */
  881. if (!(data = kmalloc(sizeof(struct w83627hf_data), GFP_KERNEL))) {
  882. err = -ENOMEM;
  883. goto ERROR1;
  884. }
  885. memset(data, 0, sizeof(struct w83627hf_data));
  886. new_client = &data->client;
  887. i2c_set_clientdata(new_client, data);
  888. new_client->addr = address;
  889. init_MUTEX(&data->lock);
  890. new_client->adapter = adapter;
  891. new_client->driver = &w83627hf_driver;
  892. new_client->flags = 0;
  893. if (kind == w83627hf) {
  894. client_name = "w83627hf";
  895. } else if (kind == w83627thf) {
  896. client_name = "w83627thf";
  897. } else if (kind == w83697hf) {
  898. client_name = "w83697hf";
  899. } else if (kind == w83637hf) {
  900. client_name = "w83637hf";
  901. }
  902. /* Fill in the remaining client fields and put into the global list */
  903. strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
  904. data->type = kind;
  905. data->valid = 0;
  906. init_MUTEX(&data->update_lock);
  907. /* Tell the I2C layer a new client has arrived */
  908. if ((err = i2c_attach_client(new_client)))
  909. goto ERROR2;
  910. data->lm75 = NULL;
  911. /* Initialize the chip */
  912. w83627hf_init_client(new_client);
  913. /* A few vars need to be filled upon startup */
  914. data->fan_min[0] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(1));
  915. data->fan_min[1] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(2));
  916. data->fan_min[2] = w83627hf_read_value(new_client, W83781D_REG_FAN_MIN(3));
  917. /* Register sysfs hooks */
  918. data->class_dev = hwmon_device_register(&new_client->dev);
  919. if (IS_ERR(data->class_dev)) {
  920. err = PTR_ERR(data->class_dev);
  921. goto ERROR3;
  922. }
  923. device_create_file_in(new_client, 0);
  924. if (kind != w83697hf)
  925. device_create_file_in(new_client, 1);
  926. device_create_file_in(new_client, 2);
  927. device_create_file_in(new_client, 3);
  928. device_create_file_in(new_client, 4);
  929. if (kind != w83627thf && kind != w83637hf) {
  930. device_create_file_in(new_client, 5);
  931. device_create_file_in(new_client, 6);
  932. }
  933. device_create_file_in(new_client, 7);
  934. device_create_file_in(new_client, 8);
  935. device_create_file_fan(new_client, 1);
  936. device_create_file_fan(new_client, 2);
  937. if (kind != w83697hf)
  938. device_create_file_fan(new_client, 3);
  939. device_create_file_temp(new_client, 1);
  940. device_create_file_temp(new_client, 2);
  941. if (kind != w83697hf)
  942. device_create_file_temp(new_client, 3);
  943. if (kind != w83697hf)
  944. device_create_file_vid(new_client);
  945. if (kind != w83697hf)
  946. device_create_file_vrm(new_client);
  947. device_create_file_fan_div(new_client, 1);
  948. device_create_file_fan_div(new_client, 2);
  949. if (kind != w83697hf)
  950. device_create_file_fan_div(new_client, 3);
  951. device_create_file_alarms(new_client);
  952. device_create_file_beep(new_client);
  953. device_create_file_pwm(new_client, 1);
  954. device_create_file_pwm(new_client, 2);
  955. if (kind == w83627thf || kind == w83637hf)
  956. device_create_file_pwm(new_client, 3);
  957. device_create_file_sensor(new_client, 1);
  958. device_create_file_sensor(new_client, 2);
  959. if (kind != w83697hf)
  960. device_create_file_sensor(new_client, 3);
  961. return 0;
  962. ERROR3:
  963. i2c_detach_client(new_client);
  964. ERROR2:
  965. kfree(data);
  966. ERROR1:
  967. release_region(address, WINB_EXTENT);
  968. ERROR0:
  969. return err;
  970. }
  971. static int w83627hf_detach_client(struct i2c_client *client)
  972. {
  973. struct w83627hf_data *data = i2c_get_clientdata(client);
  974. int err;
  975. hwmon_device_unregister(data->class_dev);
  976. if ((err = i2c_detach_client(client)))
  977. return err;
  978. release_region(client->addr, WINB_EXTENT);
  979. kfree(data);
  980. return 0;
  981. }
  982. /*
  983. ISA access must always be locked explicitly!
  984. We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
  985. would slow down the W83781D access and should not be necessary.
  986. There are some ugly typecasts here, but the good news is - they should
  987. nowhere else be necessary! */
  988. static int w83627hf_read_value(struct i2c_client *client, u16 reg)
  989. {
  990. struct w83627hf_data *data = i2c_get_clientdata(client);
  991. int res, word_sized;
  992. down(&data->lock);
  993. word_sized = (((reg & 0xff00) == 0x100)
  994. || ((reg & 0xff00) == 0x200))
  995. && (((reg & 0x00ff) == 0x50)
  996. || ((reg & 0x00ff) == 0x53)
  997. || ((reg & 0x00ff) == 0x55));
  998. if (reg & 0xff00) {
  999. outb_p(W83781D_REG_BANK,
  1000. client->addr + W83781D_ADDR_REG_OFFSET);
  1001. outb_p(reg >> 8,
  1002. client->addr + W83781D_DATA_REG_OFFSET);
  1003. }
  1004. outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
  1005. res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
  1006. if (word_sized) {
  1007. outb_p((reg & 0xff) + 1,
  1008. client->addr + W83781D_ADDR_REG_OFFSET);
  1009. res =
  1010. (res << 8) + inb_p(client->addr +
  1011. W83781D_DATA_REG_OFFSET);
  1012. }
  1013. if (reg & 0xff00) {
  1014. outb_p(W83781D_REG_BANK,
  1015. client->addr + W83781D_ADDR_REG_OFFSET);
  1016. outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
  1017. }
  1018. up(&data->lock);
  1019. return res;
  1020. }
  1021. static int w83627thf_read_gpio5(struct i2c_client *client)
  1022. {
  1023. int res = 0xff, sel;
  1024. superio_enter();
  1025. superio_select(W83627HF_LD_GPIO5);
  1026. /* Make sure these GPIO pins are enabled */
  1027. if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) {
  1028. dev_dbg(&client->dev, "GPIO5 disabled, no VID function\n");
  1029. goto exit;
  1030. }
  1031. /* Make sure the pins are configured for input
  1032. There must be at least five (VRM 9), and possibly 6 (VRM 10) */
  1033. sel = superio_inb(W83627THF_GPIO5_IOSR);
  1034. if ((sel & 0x1f) != 0x1f) {
  1035. dev_dbg(&client->dev, "GPIO5 not configured for VID "
  1036. "function\n");
  1037. goto exit;
  1038. }
  1039. dev_info(&client->dev, "Reading VID from GPIO5\n");
  1040. res = superio_inb(W83627THF_GPIO5_DR) & sel;
  1041. exit:
  1042. superio_exit();
  1043. return res;
  1044. }
  1045. static int w83627hf_write_value(struct i2c_client *client, u16 reg, u16 value)
  1046. {
  1047. struct w83627hf_data *data = i2c_get_clientdata(client);
  1048. int word_sized;
  1049. down(&data->lock);
  1050. word_sized = (((reg & 0xff00) == 0x100)
  1051. || ((reg & 0xff00) == 0x200))
  1052. && (((reg & 0x00ff) == 0x53)
  1053. || ((reg & 0x00ff) == 0x55));
  1054. if (reg & 0xff00) {
  1055. outb_p(W83781D_REG_BANK,
  1056. client->addr + W83781D_ADDR_REG_OFFSET);
  1057. outb_p(reg >> 8,
  1058. client->addr + W83781D_DATA_REG_OFFSET);
  1059. }
  1060. outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
  1061. if (word_sized) {
  1062. outb_p(value >> 8,
  1063. client->addr + W83781D_DATA_REG_OFFSET);
  1064. outb_p((reg & 0xff) + 1,
  1065. client->addr + W83781D_ADDR_REG_OFFSET);
  1066. }
  1067. outb_p(value & 0xff,
  1068. client->addr + W83781D_DATA_REG_OFFSET);
  1069. if (reg & 0xff00) {
  1070. outb_p(W83781D_REG_BANK,
  1071. client->addr + W83781D_ADDR_REG_OFFSET);
  1072. outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
  1073. }
  1074. up(&data->lock);
  1075. return 0;
  1076. }
  1077. /* Called when we have found a new W83781D. It should set limits, etc. */
  1078. static void w83627hf_init_client(struct i2c_client *client)
  1079. {
  1080. struct w83627hf_data *data = i2c_get_clientdata(client);
  1081. int i;
  1082. int type = data->type;
  1083. u8 tmp;
  1084. if(init) {
  1085. /* save this register */
  1086. i = w83627hf_read_value(client, W83781D_REG_BEEP_CONFIG);
  1087. /* Reset all except Watchdog values and last conversion values
  1088. This sets fan-divs to 2, among others */
  1089. w83627hf_write_value(client, W83781D_REG_CONFIG, 0x80);
  1090. /* Restore the register and disable power-on abnormal beep.
  1091. This saves FAN 1/2/3 input/output values set by BIOS. */
  1092. w83627hf_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
  1093. /* Disable master beep-enable (reset turns it on).
  1094. Individual beeps should be reset to off but for some reason
  1095. disabling this bit helps some people not get beeped */
  1096. w83627hf_write_value(client, W83781D_REG_BEEP_INTS2, 0);
  1097. }
  1098. /* Minimize conflicts with other winbond i2c-only clients... */
  1099. /* disable i2c subclients... how to disable main i2c client?? */
  1100. /* force i2c address to relatively uncommon address */
  1101. w83627hf_write_value(client, W83781D_REG_I2C_SUBADDR, 0x89);
  1102. w83627hf_write_value(client, W83781D_REG_I2C_ADDR, force_i2c);
  1103. /* Read VID only once */
  1104. if (w83627hf == data->type || w83637hf == data->type) {
  1105. int lo = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
  1106. int hi = w83627hf_read_value(client, W83781D_REG_CHIPID);
  1107. data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
  1108. } else if (w83627thf == data->type) {
  1109. data->vid = w83627thf_read_gpio5(client) & 0x3f;
  1110. }
  1111. /* Read VRM & OVT Config only once */
  1112. if (w83627thf == data->type || w83637hf == data->type) {
  1113. data->vrm_ovt =
  1114. w83627hf_read_value(client, W83627THF_REG_VRM_OVT_CFG);
  1115. data->vrm = (data->vrm_ovt & 0x01) ? 90 : 82;
  1116. } else {
  1117. /* Convert VID to voltage based on default VRM */
  1118. data->vrm = i2c_which_vrm();
  1119. }
  1120. tmp = w83627hf_read_value(client, W83781D_REG_SCFG1);
  1121. for (i = 1; i <= 3; i++) {
  1122. if (!(tmp & BIT_SCFG1[i - 1])) {
  1123. data->sens[i - 1] = W83781D_DEFAULT_BETA;
  1124. } else {
  1125. if (w83627hf_read_value
  1126. (client,
  1127. W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
  1128. data->sens[i - 1] = 1;
  1129. else
  1130. data->sens[i - 1] = 2;
  1131. }
  1132. if ((type == w83697hf) && (i == 2))
  1133. break;
  1134. }
  1135. if(init) {
  1136. /* Enable temp2 */
  1137. tmp = w83627hf_read_value(client, W83781D_REG_TEMP2_CONFIG);
  1138. if (tmp & 0x01) {
  1139. dev_warn(&client->dev, "Enabling temp2, readings "
  1140. "might not make sense\n");
  1141. w83627hf_write_value(client, W83781D_REG_TEMP2_CONFIG,
  1142. tmp & 0xfe);
  1143. }
  1144. /* Enable temp3 */
  1145. if (type != w83697hf) {
  1146. tmp = w83627hf_read_value(client,
  1147. W83781D_REG_TEMP3_CONFIG);
  1148. if (tmp & 0x01) {
  1149. dev_warn(&client->dev, "Enabling temp3, "
  1150. "readings might not make sense\n");
  1151. w83627hf_write_value(client,
  1152. W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
  1153. }
  1154. }
  1155. if (type == w83627hf) {
  1156. /* enable PWM2 control (can't hurt since PWM reg
  1157. should have been reset to 0xff) */
  1158. w83627hf_write_value(client, W83627HF_REG_PWMCLK12,
  1159. 0x19);
  1160. }
  1161. /* enable comparator mode for temp2 and temp3 so
  1162. alarm indication will work correctly */
  1163. i = w83627hf_read_value(client, W83781D_REG_IRQ);
  1164. if (!(i & 0x40))
  1165. w83627hf_write_value(client, W83781D_REG_IRQ,
  1166. i | 0x40);
  1167. }
  1168. /* Start monitoring */
  1169. w83627hf_write_value(client, W83781D_REG_CONFIG,
  1170. (w83627hf_read_value(client,
  1171. W83781D_REG_CONFIG) & 0xf7)
  1172. | 0x01);
  1173. }
  1174. static struct w83627hf_data *w83627hf_update_device(struct device *dev)
  1175. {
  1176. struct i2c_client *client = to_i2c_client(dev);
  1177. struct w83627hf_data *data = i2c_get_clientdata(client);
  1178. int i;
  1179. down(&data->update_lock);
  1180. if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
  1181. || !data->valid) {
  1182. for (i = 0; i <= 8; i++) {
  1183. /* skip missing sensors */
  1184. if (((data->type == w83697hf) && (i == 1)) ||
  1185. ((data->type == w83627thf || data->type == w83637hf)
  1186. && (i == 4 || i == 5)))
  1187. continue;
  1188. data->in[i] =
  1189. w83627hf_read_value(client, W83781D_REG_IN(i));
  1190. data->in_min[i] =
  1191. w83627hf_read_value(client,
  1192. W83781D_REG_IN_MIN(i));
  1193. data->in_max[i] =
  1194. w83627hf_read_value(client,
  1195. W83781D_REG_IN_MAX(i));
  1196. }
  1197. for (i = 1; i <= 3; i++) {
  1198. data->fan[i - 1] =
  1199. w83627hf_read_value(client, W83781D_REG_FAN(i));
  1200. data->fan_min[i - 1] =
  1201. w83627hf_read_value(client,
  1202. W83781D_REG_FAN_MIN(i));
  1203. }
  1204. for (i = 1; i <= 3; i++) {
  1205. u8 tmp = w83627hf_read_value(client,
  1206. W836X7HF_REG_PWM(data->type, i));
  1207. /* bits 0-3 are reserved in 627THF */
  1208. if (data->type == w83627thf)
  1209. tmp &= 0xf0;
  1210. data->pwm[i - 1] = tmp;
  1211. if(i == 2 &&
  1212. (data->type == w83627hf || data->type == w83697hf))
  1213. break;
  1214. }
  1215. data->temp = w83627hf_read_value(client, W83781D_REG_TEMP(1));
  1216. data->temp_max =
  1217. w83627hf_read_value(client, W83781D_REG_TEMP_OVER(1));
  1218. data->temp_max_hyst =
  1219. w83627hf_read_value(client, W83781D_REG_TEMP_HYST(1));
  1220. data->temp_add[0] =
  1221. w83627hf_read_value(client, W83781D_REG_TEMP(2));
  1222. data->temp_max_add[0] =
  1223. w83627hf_read_value(client, W83781D_REG_TEMP_OVER(2));
  1224. data->temp_max_hyst_add[0] =
  1225. w83627hf_read_value(client, W83781D_REG_TEMP_HYST(2));
  1226. if (data->type != w83697hf) {
  1227. data->temp_add[1] =
  1228. w83627hf_read_value(client, W83781D_REG_TEMP(3));
  1229. data->temp_max_add[1] =
  1230. w83627hf_read_value(client, W83781D_REG_TEMP_OVER(3));
  1231. data->temp_max_hyst_add[1] =
  1232. w83627hf_read_value(client, W83781D_REG_TEMP_HYST(3));
  1233. }
  1234. i = w83627hf_read_value(client, W83781D_REG_VID_FANDIV);
  1235. data->fan_div[0] = (i >> 4) & 0x03;
  1236. data->fan_div[1] = (i >> 6) & 0x03;
  1237. if (data->type != w83697hf) {
  1238. data->fan_div[2] = (w83627hf_read_value(client,
  1239. W83781D_REG_PIN) >> 6) & 0x03;
  1240. }
  1241. i = w83627hf_read_value(client, W83781D_REG_VBAT);
  1242. data->fan_div[0] |= (i >> 3) & 0x04;
  1243. data->fan_div[1] |= (i >> 4) & 0x04;
  1244. if (data->type != w83697hf)
  1245. data->fan_div[2] |= (i >> 5) & 0x04;
  1246. data->alarms =
  1247. w83627hf_read_value(client, W83781D_REG_ALARM1) |
  1248. (w83627hf_read_value(client, W83781D_REG_ALARM2) << 8) |
  1249. (w83627hf_read_value(client, W83781D_REG_ALARM3) << 16);
  1250. i = w83627hf_read_value(client, W83781D_REG_BEEP_INTS2);
  1251. data->beep_enable = i >> 7;
  1252. data->beep_mask = ((i & 0x7f) << 8) |
  1253. w83627hf_read_value(client, W83781D_REG_BEEP_INTS1) |
  1254. w83627hf_read_value(client, W83781D_REG_BEEP_INTS3) << 16;
  1255. data->last_updated = jiffies;
  1256. data->valid = 1;
  1257. }
  1258. up(&data->update_lock);
  1259. return data;
  1260. }
  1261. static int __init sensors_w83627hf_init(void)
  1262. {
  1263. if (w83627hf_find(0x2e, &address)
  1264. && w83627hf_find(0x4e, &address)) {
  1265. return -ENODEV;
  1266. }
  1267. return i2c_isa_add_driver(&w83627hf_driver);
  1268. }
  1269. static void __exit sensors_w83627hf_exit(void)
  1270. {
  1271. i2c_isa_del_driver(&w83627hf_driver);
  1272. }
  1273. MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
  1274. "Philip Edelbrock <phil@netroedge.com>, "
  1275. "and Mark Studebaker <mdsxyz123@yahoo.com>");
  1276. MODULE_DESCRIPTION("W83627HF driver");
  1277. MODULE_LICENSE("GPL");
  1278. module_init(sensors_w83627hf_init);
  1279. module_exit(sensors_w83627hf_exit);