rtl8187_dev.c 38 KB

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  1. /*
  2. * Linux device driver for RTL8187
  3. *
  4. * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
  5. * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
  6. *
  7. * Based on the r8187 driver, which is:
  8. * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
  9. *
  10. * Magic delays and register offsets below are taken from the original
  11. * r8187 driver sources. Thanks to Realtek for their support!
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. */
  17. #include <linux/init.h>
  18. #include <linux/usb.h>
  19. #include <linux/delay.h>
  20. #include <linux/etherdevice.h>
  21. #include <linux/eeprom_93cx6.h>
  22. #include <net/mac80211.h>
  23. #include "rtl8187.h"
  24. #include "rtl8187_rtl8225.h"
  25. MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  26. MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  27. MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
  28. MODULE_LICENSE("GPL");
  29. static struct usb_device_id rtl8187_table[] __devinitdata = {
  30. /* Asus */
  31. {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187},
  32. /* Belkin */
  33. {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B},
  34. /* Realtek */
  35. {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
  36. {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
  37. {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
  38. {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B},
  39. /* Netgear */
  40. {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
  41. {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
  42. {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B},
  43. /* HP */
  44. {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
  45. /* Sitecom */
  46. {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
  47. {}
  48. };
  49. MODULE_DEVICE_TABLE(usb, rtl8187_table);
  50. static const struct ieee80211_rate rtl818x_rates[] = {
  51. { .bitrate = 10, .hw_value = 0, },
  52. { .bitrate = 20, .hw_value = 1, },
  53. { .bitrate = 55, .hw_value = 2, },
  54. { .bitrate = 110, .hw_value = 3, },
  55. { .bitrate = 60, .hw_value = 4, },
  56. { .bitrate = 90, .hw_value = 5, },
  57. { .bitrate = 120, .hw_value = 6, },
  58. { .bitrate = 180, .hw_value = 7, },
  59. { .bitrate = 240, .hw_value = 8, },
  60. { .bitrate = 360, .hw_value = 9, },
  61. { .bitrate = 480, .hw_value = 10, },
  62. { .bitrate = 540, .hw_value = 11, },
  63. };
  64. static const struct ieee80211_channel rtl818x_channels[] = {
  65. { .center_freq = 2412 },
  66. { .center_freq = 2417 },
  67. { .center_freq = 2422 },
  68. { .center_freq = 2427 },
  69. { .center_freq = 2432 },
  70. { .center_freq = 2437 },
  71. { .center_freq = 2442 },
  72. { .center_freq = 2447 },
  73. { .center_freq = 2452 },
  74. { .center_freq = 2457 },
  75. { .center_freq = 2462 },
  76. { .center_freq = 2467 },
  77. { .center_freq = 2472 },
  78. { .center_freq = 2484 },
  79. };
  80. static void rtl8187_iowrite_async_cb(struct urb *urb)
  81. {
  82. kfree(urb->context);
  83. usb_free_urb(urb);
  84. }
  85. static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
  86. void *data, u16 len)
  87. {
  88. struct usb_ctrlrequest *dr;
  89. struct urb *urb;
  90. struct rtl8187_async_write_data {
  91. u8 data[4];
  92. struct usb_ctrlrequest dr;
  93. } *buf;
  94. int rc;
  95. buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
  96. if (!buf)
  97. return;
  98. urb = usb_alloc_urb(0, GFP_ATOMIC);
  99. if (!urb) {
  100. kfree(buf);
  101. return;
  102. }
  103. dr = &buf->dr;
  104. dr->bRequestType = RTL8187_REQT_WRITE;
  105. dr->bRequest = RTL8187_REQ_SET_REG;
  106. dr->wValue = addr;
  107. dr->wIndex = 0;
  108. dr->wLength = cpu_to_le16(len);
  109. memcpy(buf, data, len);
  110. usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
  111. (unsigned char *)dr, buf, len,
  112. rtl8187_iowrite_async_cb, buf);
  113. rc = usb_submit_urb(urb, GFP_ATOMIC);
  114. if (rc < 0) {
  115. kfree(buf);
  116. usb_free_urb(urb);
  117. }
  118. }
  119. static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
  120. __le32 *addr, u32 val)
  121. {
  122. __le32 buf = cpu_to_le32(val);
  123. rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
  124. &buf, sizeof(buf));
  125. }
  126. void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
  127. {
  128. struct rtl8187_priv *priv = dev->priv;
  129. data <<= 8;
  130. data |= addr | 0x80;
  131. rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
  132. rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
  133. rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
  134. rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
  135. msleep(1);
  136. }
  137. static void rtl8187_tx_cb(struct urb *urb)
  138. {
  139. struct sk_buff *skb = (struct sk_buff *)urb->context;
  140. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  141. struct ieee80211_hw *hw = info->rate_driver_data[0];
  142. struct rtl8187_priv *priv = hw->priv;
  143. usb_free_urb(info->rate_driver_data[1]);
  144. skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
  145. sizeof(struct rtl8187_tx_hdr));
  146. ieee80211_tx_info_clear_status(info);
  147. info->flags |= IEEE80211_TX_STAT_ACK;
  148. ieee80211_tx_status_irqsafe(hw, skb);
  149. }
  150. static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
  151. {
  152. struct rtl8187_priv *priv = dev->priv;
  153. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  154. unsigned int ep;
  155. void *buf;
  156. struct urb *urb;
  157. __le16 rts_dur = 0;
  158. u32 flags;
  159. int rc;
  160. urb = usb_alloc_urb(0, GFP_ATOMIC);
  161. if (!urb) {
  162. kfree_skb(skb);
  163. return 0;
  164. }
  165. flags = skb->len;
  166. flags |= RTL818X_TX_DESC_FLAG_NO_ENC;
  167. flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
  168. if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control))
  169. flags |= RTL818X_TX_DESC_FLAG_MOREFRAG;
  170. if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  171. flags |= RTL818X_TX_DESC_FLAG_RTS;
  172. flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
  173. rts_dur = ieee80211_rts_duration(dev, priv->vif,
  174. skb->len, info);
  175. } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  176. flags |= RTL818X_TX_DESC_FLAG_CTS;
  177. flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
  178. }
  179. if (!priv->is_rtl8187b) {
  180. struct rtl8187_tx_hdr *hdr =
  181. (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
  182. hdr->flags = cpu_to_le32(flags);
  183. hdr->len = 0;
  184. hdr->rts_duration = rts_dur;
  185. hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
  186. buf = hdr;
  187. ep = 2;
  188. } else {
  189. /* fc needs to be calculated before skb_push() */
  190. unsigned int epmap[4] = { 6, 7, 5, 4 };
  191. struct ieee80211_hdr *tx_hdr =
  192. (struct ieee80211_hdr *)(skb->data);
  193. u16 fc = le16_to_cpu(tx_hdr->frame_control);
  194. struct rtl8187b_tx_hdr *hdr =
  195. (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr));
  196. struct ieee80211_rate *txrate =
  197. ieee80211_get_tx_rate(dev, info);
  198. memset(hdr, 0, sizeof(*hdr));
  199. hdr->flags = cpu_to_le32(flags);
  200. hdr->rts_duration = rts_dur;
  201. hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
  202. hdr->tx_duration =
  203. ieee80211_generic_frame_duration(dev, priv->vif,
  204. skb->len, txrate);
  205. buf = hdr;
  206. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  207. ep = 12;
  208. else
  209. ep = epmap[skb_get_queue_mapping(skb)];
  210. }
  211. info->rate_driver_data[0] = dev;
  212. info->rate_driver_data[1] = urb;
  213. usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
  214. buf, skb->len, rtl8187_tx_cb, skb);
  215. rc = usb_submit_urb(urb, GFP_ATOMIC);
  216. if (rc < 0) {
  217. usb_free_urb(urb);
  218. kfree_skb(skb);
  219. }
  220. return 0;
  221. }
  222. static void rtl8187_rx_cb(struct urb *urb)
  223. {
  224. struct sk_buff *skb = (struct sk_buff *)urb->context;
  225. struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
  226. struct ieee80211_hw *dev = info->dev;
  227. struct rtl8187_priv *priv = dev->priv;
  228. struct ieee80211_rx_status rx_status = { 0 };
  229. int rate, signal;
  230. u32 flags;
  231. u32 quality;
  232. spin_lock(&priv->rx_queue.lock);
  233. if (skb->next)
  234. __skb_unlink(skb, &priv->rx_queue);
  235. else {
  236. spin_unlock(&priv->rx_queue.lock);
  237. return;
  238. }
  239. spin_unlock(&priv->rx_queue.lock);
  240. if (unlikely(urb->status)) {
  241. usb_free_urb(urb);
  242. dev_kfree_skb_irq(skb);
  243. return;
  244. }
  245. skb_put(skb, urb->actual_length);
  246. if (!priv->is_rtl8187b) {
  247. struct rtl8187_rx_hdr *hdr =
  248. (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
  249. flags = le32_to_cpu(hdr->flags);
  250. signal = hdr->signal & 0x7f;
  251. rx_status.antenna = (hdr->signal >> 7) & 1;
  252. rx_status.noise = hdr->noise;
  253. rx_status.mactime = le64_to_cpu(hdr->mac_time);
  254. priv->quality = signal;
  255. rx_status.qual = priv->quality;
  256. priv->noise = hdr->noise;
  257. rate = (flags >> 20) & 0xF;
  258. if (rate > 3) { /* OFDM rate */
  259. if (signal > 90)
  260. signal = 90;
  261. else if (signal < 25)
  262. signal = 25;
  263. signal = 90 - signal;
  264. } else { /* CCK rate */
  265. if (signal > 95)
  266. signal = 95;
  267. else if (signal < 30)
  268. signal = 30;
  269. signal = 95 - signal;
  270. }
  271. rx_status.signal = signal;
  272. priv->signal = signal;
  273. } else {
  274. struct rtl8187b_rx_hdr *hdr =
  275. (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
  276. /* The Realtek datasheet for the RTL8187B shows that the RX
  277. * header contains the following quantities: signal quality,
  278. * RSSI, AGC, the received power in dB, and the measured SNR.
  279. * In testing, none of these quantities show qualitative
  280. * agreement with AP signal strength, except for the AGC,
  281. * which is inversely proportional to the strength of the
  282. * signal. In the following, the quality and signal strength
  283. * are derived from the AGC. The arbitrary scaling constants
  284. * are chosen to make the results close to the values obtained
  285. * for a BCM4312 using b43 as the driver. The noise is ignored
  286. * for now.
  287. */
  288. flags = le32_to_cpu(hdr->flags);
  289. quality = 170 - hdr->agc;
  290. if (quality > 100)
  291. quality = 100;
  292. signal = 14 - hdr->agc / 2;
  293. rx_status.qual = quality;
  294. priv->quality = quality;
  295. rx_status.signal = signal;
  296. priv->signal = signal;
  297. rx_status.antenna = (hdr->rssi >> 7) & 1;
  298. rx_status.mactime = le64_to_cpu(hdr->mac_time);
  299. rate = (flags >> 20) & 0xF;
  300. }
  301. skb_trim(skb, flags & 0x0FFF);
  302. rx_status.rate_idx = rate;
  303. rx_status.freq = dev->conf.channel->center_freq;
  304. rx_status.band = dev->conf.channel->band;
  305. rx_status.flag |= RX_FLAG_TSFT;
  306. if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
  307. rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
  308. ieee80211_rx_irqsafe(dev, skb, &rx_status);
  309. skb = dev_alloc_skb(RTL8187_MAX_RX);
  310. if (unlikely(!skb)) {
  311. usb_free_urb(urb);
  312. /* TODO check rx queue length and refill *somewhere* */
  313. return;
  314. }
  315. info = (struct rtl8187_rx_info *)skb->cb;
  316. info->urb = urb;
  317. info->dev = dev;
  318. urb->transfer_buffer = skb_tail_pointer(skb);
  319. urb->context = skb;
  320. skb_queue_tail(&priv->rx_queue, skb);
  321. usb_submit_urb(urb, GFP_ATOMIC);
  322. }
  323. static int rtl8187_init_urbs(struct ieee80211_hw *dev)
  324. {
  325. struct rtl8187_priv *priv = dev->priv;
  326. struct urb *entry;
  327. struct sk_buff *skb;
  328. struct rtl8187_rx_info *info;
  329. while (skb_queue_len(&priv->rx_queue) < 8) {
  330. skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
  331. if (!skb)
  332. break;
  333. entry = usb_alloc_urb(0, GFP_KERNEL);
  334. if (!entry) {
  335. kfree_skb(skb);
  336. break;
  337. }
  338. usb_fill_bulk_urb(entry, priv->udev,
  339. usb_rcvbulkpipe(priv->udev,
  340. priv->is_rtl8187b ? 3 : 1),
  341. skb_tail_pointer(skb),
  342. RTL8187_MAX_RX, rtl8187_rx_cb, skb);
  343. info = (struct rtl8187_rx_info *)skb->cb;
  344. info->urb = entry;
  345. info->dev = dev;
  346. skb_queue_tail(&priv->rx_queue, skb);
  347. usb_submit_urb(entry, GFP_KERNEL);
  348. }
  349. return 0;
  350. }
  351. static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
  352. {
  353. struct rtl8187_priv *priv = dev->priv;
  354. u8 reg;
  355. int i;
  356. reg = rtl818x_ioread8(priv, &priv->map->CMD);
  357. reg &= (1 << 1);
  358. reg |= RTL818X_CMD_RESET;
  359. rtl818x_iowrite8(priv, &priv->map->CMD, reg);
  360. i = 10;
  361. do {
  362. msleep(2);
  363. if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
  364. RTL818X_CMD_RESET))
  365. break;
  366. } while (--i);
  367. if (!i) {
  368. printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
  369. return -ETIMEDOUT;
  370. }
  371. /* reload registers from eeprom */
  372. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
  373. i = 10;
  374. do {
  375. msleep(4);
  376. if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
  377. RTL818X_EEPROM_CMD_CONFIG))
  378. break;
  379. } while (--i);
  380. if (!i) {
  381. printk(KERN_ERR "%s: eeprom reset timeout!\n",
  382. wiphy_name(dev->wiphy));
  383. return -ETIMEDOUT;
  384. }
  385. return 0;
  386. }
  387. static int rtl8187_init_hw(struct ieee80211_hw *dev)
  388. {
  389. struct rtl8187_priv *priv = dev->priv;
  390. u8 reg;
  391. int res;
  392. /* reset */
  393. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
  394. RTL818X_EEPROM_CMD_CONFIG);
  395. reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
  396. rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg |
  397. RTL818X_CONFIG3_ANAPARAM_WRITE);
  398. rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
  399. RTL8187_RTL8225_ANAPARAM_ON);
  400. rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
  401. RTL8187_RTL8225_ANAPARAM2_ON);
  402. rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg &
  403. ~RTL818X_CONFIG3_ANAPARAM_WRITE);
  404. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
  405. RTL818X_EEPROM_CMD_NORMAL);
  406. rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
  407. msleep(200);
  408. rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
  409. rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
  410. rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
  411. msleep(200);
  412. res = rtl8187_cmd_reset(dev);
  413. if (res)
  414. return res;
  415. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  416. reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
  417. rtl818x_iowrite8(priv, &priv->map->CONFIG3,
  418. reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
  419. rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
  420. RTL8187_RTL8225_ANAPARAM_ON);
  421. rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
  422. RTL8187_RTL8225_ANAPARAM2_ON);
  423. rtl818x_iowrite8(priv, &priv->map->CONFIG3,
  424. reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
  425. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  426. /* setup card */
  427. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
  428. rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
  429. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
  430. rtl818x_iowrite8(priv, &priv->map->GPIO, 1);
  431. rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
  432. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  433. rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
  434. reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
  435. reg &= 0x3F;
  436. reg |= 0x80;
  437. rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
  438. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  439. rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
  440. rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
  441. rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
  442. // TODO: set RESP_RATE and BRSR properly
  443. rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
  444. rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
  445. /* host_usb_init */
  446. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
  447. rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
  448. reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
  449. rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
  450. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
  451. rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20);
  452. rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
  453. rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
  454. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
  455. rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
  456. msleep(100);
  457. rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
  458. rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
  459. rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
  460. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
  461. RTL818X_EEPROM_CMD_CONFIG);
  462. rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
  463. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
  464. RTL818X_EEPROM_CMD_NORMAL);
  465. rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
  466. msleep(100);
  467. priv->rf->init(dev);
  468. rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
  469. reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
  470. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
  471. rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
  472. rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
  473. rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
  474. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
  475. return 0;
  476. }
  477. static const u8 rtl8187b_reg_table[][3] = {
  478. {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
  479. {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
  480. {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
  481. {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
  482. {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
  483. {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
  484. {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xE0, 0xFF, 1}, {0xE1, 0x0F, 1},
  485. {0xE2, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, {0xF2, 0x02, 1},
  486. {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, {0xF6, 0x06, 1},
  487. {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
  488. {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
  489. {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
  490. {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
  491. {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
  492. {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
  493. {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
  494. {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2},
  495. {0x73, 0x9A, 2},
  496. {0x34, 0xF0, 0}, {0x35, 0x0F, 0}, {0x5B, 0x40, 0}, {0x84, 0x88, 0},
  497. {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0},
  498. {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0},
  499. {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0},
  500. {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x91, 0x03, 0},
  501. {0x4C, 0x00, 2}, {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0},
  502. {0x8E, 0x08, 0}, {0x8F, 0x00, 0}
  503. };
  504. static int rtl8187b_init_hw(struct ieee80211_hw *dev)
  505. {
  506. struct rtl8187_priv *priv = dev->priv;
  507. int res, i;
  508. u8 reg;
  509. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
  510. RTL818X_EEPROM_CMD_CONFIG);
  511. reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
  512. reg |= RTL818X_CONFIG3_ANAPARAM_WRITE | RTL818X_CONFIG3_GNT_SELECT;
  513. rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
  514. rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
  515. RTL8187B_RTL8225_ANAPARAM2_ON);
  516. rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
  517. RTL8187B_RTL8225_ANAPARAM_ON);
  518. rtl818x_iowrite8(priv, &priv->map->ANAPARAM3,
  519. RTL8187B_RTL8225_ANAPARAM3_ON);
  520. rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
  521. reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
  522. rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
  523. rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
  524. reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
  525. reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
  526. rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
  527. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
  528. RTL818X_EEPROM_CMD_NORMAL);
  529. res = rtl8187_cmd_reset(dev);
  530. if (res)
  531. return res;
  532. rtl818x_iowrite16(priv, (__le16 *)0xFF2D, 0x0FFF);
  533. reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
  534. reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
  535. rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
  536. reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
  537. reg |= RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT |
  538. RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
  539. rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
  540. rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
  541. reg = rtl818x_ioread8(priv, &priv->map->RATE_FALLBACK);
  542. reg |= RTL818X_RATE_FALLBACK_ENABLE;
  543. rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, reg);
  544. rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
  545. rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
  546. rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
  547. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
  548. RTL818X_EEPROM_CMD_CONFIG);
  549. reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
  550. rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
  551. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
  552. RTL818X_EEPROM_CMD_NORMAL);
  553. rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
  554. for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
  555. rtl818x_iowrite8_idx(priv,
  556. (u8 *)(uintptr_t)
  557. (rtl8187b_reg_table[i][0] | 0xFF00),
  558. rtl8187b_reg_table[i][1],
  559. rtl8187b_reg_table[i][2]);
  560. }
  561. rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
  562. rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
  563. rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
  564. rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
  565. rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
  566. rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
  567. rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
  568. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
  569. RTL818X_EEPROM_CMD_CONFIG);
  570. reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
  571. reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
  572. rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
  573. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
  574. RTL818X_EEPROM_CMD_NORMAL);
  575. rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
  576. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
  577. rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
  578. msleep(1100);
  579. priv->rf->init(dev);
  580. reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
  581. rtl818x_iowrite8(priv, &priv->map->CMD, reg);
  582. rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
  583. rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
  584. rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
  585. rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
  586. rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
  587. rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
  588. rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
  589. rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
  590. reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
  591. rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
  592. rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
  593. rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
  594. rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
  595. rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
  596. rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
  597. rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
  598. rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
  599. rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
  600. rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
  601. rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
  602. rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
  603. rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
  604. rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
  605. return 0;
  606. }
  607. static int rtl8187_start(struct ieee80211_hw *dev)
  608. {
  609. struct rtl8187_priv *priv = dev->priv;
  610. u32 reg;
  611. int ret;
  612. ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
  613. rtl8187b_init_hw(dev);
  614. if (ret)
  615. return ret;
  616. mutex_lock(&priv->conf_mutex);
  617. if (priv->is_rtl8187b) {
  618. reg = RTL818X_RX_CONF_MGMT |
  619. RTL818X_RX_CONF_DATA |
  620. RTL818X_RX_CONF_BROADCAST |
  621. RTL818X_RX_CONF_NICMAC |
  622. RTL818X_RX_CONF_BSSID |
  623. (7 << 13 /* RX FIFO threshold NONE */) |
  624. (7 << 10 /* MAX RX DMA */) |
  625. RTL818X_RX_CONF_RX_AUTORESETPHY |
  626. RTL818X_RX_CONF_ONLYERLPKT |
  627. RTL818X_RX_CONF_MULTICAST;
  628. priv->rx_conf = reg;
  629. rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
  630. rtl818x_iowrite32(priv, &priv->map->TX_CONF,
  631. RTL818X_TX_CONF_HW_SEQNUM |
  632. RTL818X_TX_CONF_DISREQQSIZE |
  633. (7 << 8 /* short retry limit */) |
  634. (7 << 0 /* long retry limit */) |
  635. (7 << 21 /* MAX TX DMA */));
  636. rtl8187_init_urbs(dev);
  637. mutex_unlock(&priv->conf_mutex);
  638. return 0;
  639. }
  640. rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
  641. rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
  642. rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
  643. rtl8187_init_urbs(dev);
  644. reg = RTL818X_RX_CONF_ONLYERLPKT |
  645. RTL818X_RX_CONF_RX_AUTORESETPHY |
  646. RTL818X_RX_CONF_BSSID |
  647. RTL818X_RX_CONF_MGMT |
  648. RTL818X_RX_CONF_DATA |
  649. (7 << 13 /* RX FIFO threshold NONE */) |
  650. (7 << 10 /* MAX RX DMA */) |
  651. RTL818X_RX_CONF_BROADCAST |
  652. RTL818X_RX_CONF_NICMAC;
  653. priv->rx_conf = reg;
  654. rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
  655. reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
  656. reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
  657. reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
  658. rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
  659. reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
  660. reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
  661. reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
  662. reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
  663. rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
  664. reg = RTL818X_TX_CONF_CW_MIN |
  665. (7 << 21 /* MAX TX DMA */) |
  666. RTL818X_TX_CONF_NO_ICV;
  667. rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
  668. reg = rtl818x_ioread8(priv, &priv->map->CMD);
  669. reg |= RTL818X_CMD_TX_ENABLE;
  670. reg |= RTL818X_CMD_RX_ENABLE;
  671. rtl818x_iowrite8(priv, &priv->map->CMD, reg);
  672. mutex_unlock(&priv->conf_mutex);
  673. return 0;
  674. }
  675. static void rtl8187_stop(struct ieee80211_hw *dev)
  676. {
  677. struct rtl8187_priv *priv = dev->priv;
  678. struct rtl8187_rx_info *info;
  679. struct sk_buff *skb;
  680. u32 reg;
  681. mutex_lock(&priv->conf_mutex);
  682. rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
  683. reg = rtl818x_ioread8(priv, &priv->map->CMD);
  684. reg &= ~RTL818X_CMD_TX_ENABLE;
  685. reg &= ~RTL818X_CMD_RX_ENABLE;
  686. rtl818x_iowrite8(priv, &priv->map->CMD, reg);
  687. priv->rf->stop(dev);
  688. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  689. reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
  690. rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
  691. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  692. while ((skb = skb_dequeue(&priv->rx_queue))) {
  693. info = (struct rtl8187_rx_info *)skb->cb;
  694. usb_kill_urb(info->urb);
  695. kfree_skb(skb);
  696. }
  697. mutex_unlock(&priv->conf_mutex);
  698. }
  699. static int rtl8187_add_interface(struct ieee80211_hw *dev,
  700. struct ieee80211_if_init_conf *conf)
  701. {
  702. struct rtl8187_priv *priv = dev->priv;
  703. int i;
  704. if (priv->mode != NL80211_IFTYPE_MONITOR)
  705. return -EOPNOTSUPP;
  706. switch (conf->type) {
  707. case NL80211_IFTYPE_STATION:
  708. priv->mode = conf->type;
  709. break;
  710. default:
  711. return -EOPNOTSUPP;
  712. }
  713. mutex_lock(&priv->conf_mutex);
  714. priv->vif = conf->vif;
  715. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  716. for (i = 0; i < ETH_ALEN; i++)
  717. rtl818x_iowrite8(priv, &priv->map->MAC[i],
  718. ((u8 *)conf->mac_addr)[i]);
  719. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  720. mutex_unlock(&priv->conf_mutex);
  721. return 0;
  722. }
  723. static void rtl8187_remove_interface(struct ieee80211_hw *dev,
  724. struct ieee80211_if_init_conf *conf)
  725. {
  726. struct rtl8187_priv *priv = dev->priv;
  727. mutex_lock(&priv->conf_mutex);
  728. priv->mode = NL80211_IFTYPE_MONITOR;
  729. priv->vif = NULL;
  730. mutex_unlock(&priv->conf_mutex);
  731. }
  732. static int rtl8187_config(struct ieee80211_hw *dev, u32 changed)
  733. {
  734. struct rtl8187_priv *priv = dev->priv;
  735. struct ieee80211_conf *conf = &dev->conf;
  736. u32 reg;
  737. mutex_lock(&priv->conf_mutex);
  738. reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
  739. /* Enable TX loopback on MAC level to avoid TX during channel
  740. * changes, as this has be seen to causes problems and the
  741. * card will stop work until next reset
  742. */
  743. rtl818x_iowrite32(priv, &priv->map->TX_CONF,
  744. reg | RTL818X_TX_CONF_LOOPBACK_MAC);
  745. msleep(10);
  746. priv->rf->set_chan(dev, conf);
  747. msleep(10);
  748. rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
  749. rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
  750. rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
  751. rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
  752. rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
  753. mutex_unlock(&priv->conf_mutex);
  754. return 0;
  755. }
  756. static int rtl8187_config_interface(struct ieee80211_hw *dev,
  757. struct ieee80211_vif *vif,
  758. struct ieee80211_if_conf *conf)
  759. {
  760. struct rtl8187_priv *priv = dev->priv;
  761. int i;
  762. u8 reg;
  763. mutex_lock(&priv->conf_mutex);
  764. for (i = 0; i < ETH_ALEN; i++)
  765. rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
  766. if (is_valid_ether_addr(conf->bssid)) {
  767. reg = RTL818X_MSR_INFRA;
  768. if (priv->is_rtl8187b)
  769. reg |= RTL818X_MSR_ENEDCA;
  770. rtl818x_iowrite8(priv, &priv->map->MSR, reg);
  771. } else {
  772. reg = RTL818X_MSR_NO_LINK;
  773. rtl818x_iowrite8(priv, &priv->map->MSR, reg);
  774. }
  775. mutex_unlock(&priv->conf_mutex);
  776. return 0;
  777. }
  778. static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot,
  779. bool use_short_preamble)
  780. {
  781. if (priv->is_rtl8187b) {
  782. u8 difs, eifs, slot_time;
  783. u16 ack_timeout;
  784. if (use_short_slot) {
  785. slot_time = 0x9;
  786. difs = 0x1c;
  787. eifs = 0x53;
  788. } else {
  789. slot_time = 0x14;
  790. difs = 0x32;
  791. eifs = 0x5b;
  792. }
  793. rtl818x_iowrite8(priv, &priv->map->SIFS, 0xa);
  794. rtl818x_iowrite8(priv, &priv->map->SLOT, slot_time);
  795. rtl818x_iowrite8(priv, &priv->map->DIFS, difs);
  796. /*
  797. * BRSR+1 on 8187B is in fact EIFS register
  798. * Value in units of 4 us
  799. */
  800. rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs);
  801. /*
  802. * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout
  803. * register. In units of 4 us like eifs register
  804. * ack_timeout = ack duration + plcp + difs + preamble
  805. */
  806. ack_timeout = 112 + 48 + difs;
  807. if (use_short_preamble)
  808. ack_timeout += 72;
  809. else
  810. ack_timeout += 144;
  811. rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER,
  812. DIV_ROUND_UP(ack_timeout, 4));
  813. } else {
  814. rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
  815. if (use_short_slot) {
  816. rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
  817. rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
  818. rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
  819. rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0x73);
  820. } else {
  821. rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
  822. rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
  823. rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
  824. rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0xa5);
  825. }
  826. }
  827. }
  828. static void rtl8187_bss_info_changed(struct ieee80211_hw *dev,
  829. struct ieee80211_vif *vif,
  830. struct ieee80211_bss_conf *info,
  831. u32 changed)
  832. {
  833. struct rtl8187_priv *priv = dev->priv;
  834. if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE))
  835. rtl8187_conf_erp(priv, info->use_short_slot,
  836. info->use_short_preamble);
  837. }
  838. static void rtl8187_configure_filter(struct ieee80211_hw *dev,
  839. unsigned int changed_flags,
  840. unsigned int *total_flags,
  841. int mc_count, struct dev_addr_list *mclist)
  842. {
  843. struct rtl8187_priv *priv = dev->priv;
  844. if (changed_flags & FIF_FCSFAIL)
  845. priv->rx_conf ^= RTL818X_RX_CONF_FCS;
  846. if (changed_flags & FIF_CONTROL)
  847. priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
  848. if (changed_flags & FIF_OTHER_BSS)
  849. priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
  850. if (*total_flags & FIF_ALLMULTI || mc_count > 0)
  851. priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
  852. else
  853. priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
  854. *total_flags = 0;
  855. if (priv->rx_conf & RTL818X_RX_CONF_FCS)
  856. *total_flags |= FIF_FCSFAIL;
  857. if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
  858. *total_flags |= FIF_CONTROL;
  859. if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
  860. *total_flags |= FIF_OTHER_BSS;
  861. if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
  862. *total_flags |= FIF_ALLMULTI;
  863. rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
  864. }
  865. static const struct ieee80211_ops rtl8187_ops = {
  866. .tx = rtl8187_tx,
  867. .start = rtl8187_start,
  868. .stop = rtl8187_stop,
  869. .add_interface = rtl8187_add_interface,
  870. .remove_interface = rtl8187_remove_interface,
  871. .config = rtl8187_config,
  872. .config_interface = rtl8187_config_interface,
  873. .bss_info_changed = rtl8187_bss_info_changed,
  874. .configure_filter = rtl8187_configure_filter,
  875. };
  876. static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
  877. {
  878. struct ieee80211_hw *dev = eeprom->data;
  879. struct rtl8187_priv *priv = dev->priv;
  880. u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
  881. eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
  882. eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
  883. eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
  884. eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
  885. }
  886. static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
  887. {
  888. struct ieee80211_hw *dev = eeprom->data;
  889. struct rtl8187_priv *priv = dev->priv;
  890. u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
  891. if (eeprom->reg_data_in)
  892. reg |= RTL818X_EEPROM_CMD_WRITE;
  893. if (eeprom->reg_data_out)
  894. reg |= RTL818X_EEPROM_CMD_READ;
  895. if (eeprom->reg_data_clock)
  896. reg |= RTL818X_EEPROM_CMD_CK;
  897. if (eeprom->reg_chip_select)
  898. reg |= RTL818X_EEPROM_CMD_CS;
  899. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
  900. udelay(10);
  901. }
  902. static int __devinit rtl8187_probe(struct usb_interface *intf,
  903. const struct usb_device_id *id)
  904. {
  905. struct usb_device *udev = interface_to_usbdev(intf);
  906. struct ieee80211_hw *dev;
  907. struct rtl8187_priv *priv;
  908. struct eeprom_93cx6 eeprom;
  909. struct ieee80211_channel *channel;
  910. const char *chip_name;
  911. u16 txpwr, reg;
  912. int err, i;
  913. dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
  914. if (!dev) {
  915. printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
  916. return -ENOMEM;
  917. }
  918. priv = dev->priv;
  919. priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
  920. SET_IEEE80211_DEV(dev, &intf->dev);
  921. usb_set_intfdata(intf, dev);
  922. priv->udev = udev;
  923. usb_get_dev(udev);
  924. skb_queue_head_init(&priv->rx_queue);
  925. BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
  926. BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
  927. memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
  928. memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
  929. priv->map = (struct rtl818x_csr *)0xFF00;
  930. priv->band.band = IEEE80211_BAND_2GHZ;
  931. priv->band.channels = priv->channels;
  932. priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
  933. priv->band.bitrates = priv->rates;
  934. priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
  935. dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
  936. priv->mode = NL80211_IFTYPE_MONITOR;
  937. dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
  938. IEEE80211_HW_RX_INCLUDES_FCS;
  939. eeprom.data = dev;
  940. eeprom.register_read = rtl8187_eeprom_register_read;
  941. eeprom.register_write = rtl8187_eeprom_register_write;
  942. if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
  943. eeprom.width = PCI_EEPROM_WIDTH_93C66;
  944. else
  945. eeprom.width = PCI_EEPROM_WIDTH_93C46;
  946. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  947. udelay(10);
  948. eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
  949. (__le16 __force *)dev->wiphy->perm_addr, 3);
  950. if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
  951. printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
  952. "generated MAC address\n");
  953. random_ether_addr(dev->wiphy->perm_addr);
  954. }
  955. channel = priv->channels;
  956. for (i = 0; i < 3; i++) {
  957. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
  958. &txpwr);
  959. (*channel++).hw_value = txpwr & 0xFF;
  960. (*channel++).hw_value = txpwr >> 8;
  961. }
  962. for (i = 0; i < 2; i++) {
  963. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
  964. &txpwr);
  965. (*channel++).hw_value = txpwr & 0xFF;
  966. (*channel++).hw_value = txpwr >> 8;
  967. }
  968. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
  969. &priv->txpwr_base);
  970. reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
  971. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
  972. /* 0 means asic B-cut, we should use SW 3 wire
  973. * bit-by-bit banging for radio. 1 means we can use
  974. * USB specific request to write radio registers */
  975. priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
  976. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
  977. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  978. if (!priv->is_rtl8187b) {
  979. u32 reg32;
  980. reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
  981. reg32 &= RTL818X_TX_CONF_HWVER_MASK;
  982. switch (reg32) {
  983. case RTL818X_TX_CONF_R8187vD_B:
  984. /* Some RTL8187B devices have a USB ID of 0x8187
  985. * detect them here */
  986. chip_name = "RTL8187BvB(early)";
  987. priv->is_rtl8187b = 1;
  988. priv->hw_rev = RTL8187BvB;
  989. break;
  990. case RTL818X_TX_CONF_R8187vD:
  991. chip_name = "RTL8187vD";
  992. break;
  993. default:
  994. chip_name = "RTL8187vB (default)";
  995. }
  996. } else {
  997. /*
  998. * Force USB request to write radio registers for 8187B, Realtek
  999. * only uses it in their sources
  1000. */
  1001. /*if (priv->asic_rev == 0) {
  1002. printk(KERN_WARNING "rtl8187: Forcing use of USB "
  1003. "requests to write to radio registers\n");
  1004. priv->asic_rev = 1;
  1005. }*/
  1006. switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
  1007. case RTL818X_R8187B_B:
  1008. chip_name = "RTL8187BvB";
  1009. priv->hw_rev = RTL8187BvB;
  1010. break;
  1011. case RTL818X_R8187B_D:
  1012. chip_name = "RTL8187BvD";
  1013. priv->hw_rev = RTL8187BvD;
  1014. break;
  1015. case RTL818X_R8187B_E:
  1016. chip_name = "RTL8187BvE";
  1017. priv->hw_rev = RTL8187BvE;
  1018. break;
  1019. default:
  1020. chip_name = "RTL8187BvB (default)";
  1021. priv->hw_rev = RTL8187BvB;
  1022. }
  1023. }
  1024. if (!priv->is_rtl8187b) {
  1025. for (i = 0; i < 2; i++) {
  1026. eeprom_93cx6_read(&eeprom,
  1027. RTL8187_EEPROM_TXPWR_CHAN_6 + i,
  1028. &txpwr);
  1029. (*channel++).hw_value = txpwr & 0xFF;
  1030. (*channel++).hw_value = txpwr >> 8;
  1031. }
  1032. } else {
  1033. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6,
  1034. &txpwr);
  1035. (*channel++).hw_value = txpwr & 0xFF;
  1036. eeprom_93cx6_read(&eeprom, 0x0A, &txpwr);
  1037. (*channel++).hw_value = txpwr & 0xFF;
  1038. eeprom_93cx6_read(&eeprom, 0x1C, &txpwr);
  1039. (*channel++).hw_value = txpwr & 0xFF;
  1040. (*channel++).hw_value = txpwr >> 8;
  1041. }
  1042. if (priv->is_rtl8187b) {
  1043. printk(KERN_WARNING "rtl8187: 8187B chip detected. Support "
  1044. "is EXPERIMENTAL, and could damage your\n"
  1045. " hardware, use at your own risk\n");
  1046. dev->flags |= IEEE80211_HW_SIGNAL_DBM;
  1047. } else {
  1048. dev->flags |= IEEE80211_HW_SIGNAL_UNSPEC;
  1049. dev->max_signal = 65;
  1050. }
  1051. /*
  1052. * XXX: Once this driver supports anything that requires
  1053. * beacons it must implement IEEE80211_TX_CTL_ASSIGN_SEQ.
  1054. */
  1055. dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
  1056. if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
  1057. printk(KERN_INFO "rtl8187: inconsistency between id with OEM"
  1058. " info!\n");
  1059. priv->rf = rtl8187_detect_rf(dev);
  1060. dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
  1061. sizeof(struct rtl8187_tx_hdr) :
  1062. sizeof(struct rtl8187b_tx_hdr);
  1063. if (!priv->is_rtl8187b)
  1064. dev->queues = 1;
  1065. else
  1066. dev->queues = 4;
  1067. err = ieee80211_register_hw(dev);
  1068. if (err) {
  1069. printk(KERN_ERR "rtl8187: Cannot register device\n");
  1070. goto err_free_dev;
  1071. }
  1072. mutex_init(&priv->conf_mutex);
  1073. printk(KERN_INFO "%s: hwaddr %pM, %s V%d + %s\n",
  1074. wiphy_name(dev->wiphy), dev->wiphy->perm_addr,
  1075. chip_name, priv->asic_rev, priv->rf->name);
  1076. return 0;
  1077. err_free_dev:
  1078. ieee80211_free_hw(dev);
  1079. usb_set_intfdata(intf, NULL);
  1080. usb_put_dev(udev);
  1081. return err;
  1082. }
  1083. static void __devexit rtl8187_disconnect(struct usb_interface *intf)
  1084. {
  1085. struct ieee80211_hw *dev = usb_get_intfdata(intf);
  1086. struct rtl8187_priv *priv;
  1087. if (!dev)
  1088. return;
  1089. ieee80211_unregister_hw(dev);
  1090. priv = dev->priv;
  1091. usb_put_dev(interface_to_usbdev(intf));
  1092. ieee80211_free_hw(dev);
  1093. }
  1094. static struct usb_driver rtl8187_driver = {
  1095. .name = KBUILD_MODNAME,
  1096. .id_table = rtl8187_table,
  1097. .probe = rtl8187_probe,
  1098. .disconnect = __devexit_p(rtl8187_disconnect),
  1099. };
  1100. static int __init rtl8187_init(void)
  1101. {
  1102. return usb_register(&rtl8187_driver);
  1103. }
  1104. static void __exit rtl8187_exit(void)
  1105. {
  1106. usb_deregister(&rtl8187_driver);
  1107. }
  1108. module_init(rtl8187_init);
  1109. module_exit(rtl8187_exit);